diff --git a/arch/powerpc/cpu/mpc8xxx/ddr/ddr2_dimm_params.c b/arch/powerpc/cpu/mpc8xxx/ddr/ddr2_dimm_params.c
index d9d0fa70eeb7d8be78af62d4fd1b1daac0e8ac03..dcb37cea1f99e4aff566f59e83c9e5d0444d6147 100644
--- a/arch/powerpc/cpu/mpc8xxx/ddr/ddr2_dimm_params.c
+++ b/arch/powerpc/cpu/mpc8xxx/ddr/ddr2_dimm_params.c
@@ -175,8 +175,8 @@ determine_refresh_rate_ps(const unsigned int spd_refresh)
  * ordinal 2, ddr2_speed_bins[1] contains tCK for CL=3
  * Not certain if any good value exists for CL=2
  */
-				 /* CL2   CL3   CL4   CL5   CL6 */
-unsigned short ddr2_speed_bins[] = {   0, 5000, 3750, 3000, 2500 };
+				 /* CL2   CL3   CL4   CL5   CL6  CL7*/
+unsigned short ddr2_speed_bins[] = {   0, 5000, 3750, 3000, 2500, 1875 };
 
 unsigned int
 compute_derated_DDR2_CAS_latency(unsigned int mclk_ps)
diff --git a/common/ddr_spd.c b/common/ddr_spd.c
index c058e4f18a314c9fbc1890591d38bcb53ef0d803..a7a30de22bb567777f600f00e0b9d670523a316e 100644
--- a/common/ddr_spd.c
+++ b/common/ddr_spd.c
@@ -20,11 +20,15 @@ spd_check(const u8 *buf, u8 spd_rev, u8 spd_cksum)
 	 * Check SPD revision supported
 	 * Rev 1.2 or less supported by this code
 	 */
-	if (spd_rev > 0x12) {
+	if (spd_rev >= 0x20) {
 		printf("SPD revision %02X not supported by this code\n",
 		       spd_rev);
 		return 1;
 	}
+	if (spd_rev > 0x13) {
+		printf("SPD revision %02X not verified by this code\n",
+		       spd_rev);
+	}
 
 	/*
 	 * Calculate checksum