diff --git a/board/freescale/mpc8610hpcd/mpc8610hpcd.c b/board/freescale/mpc8610hpcd/mpc8610hpcd.c
index dacd2a911fe2829787c964b7243b46992f529381..8d3b822fe390d4e976735fda0fea478ba9d501fd 100644
--- a/board/freescale/mpc8610hpcd/mpc8610hpcd.c
+++ b/board/freescale/mpc8610hpcd/mpc8610hpcd.c
@@ -36,10 +36,6 @@
 
 #include "../common/pixis.h"
 
-#if defined(CONFIG_DDR_ECC) && !defined(CONFIG_ECC_INIT_VIA_DDRCONTROLLER)
-extern void ddr_enable_ecc(unsigned int dram_size);
-#endif
-
 void sdram_init(void);
 long int fixed_sdram(void);
 void mpc8610hpcd_diu_init(void);
@@ -134,13 +130,6 @@ initdram(int board_type)
 	return dram_size;
 #endif
 
-#if defined(CONFIG_DDR_ECC) && !defined(CONFIG_ECC_INIT_VIA_DDRCONTROLLER)
-	/*
-	 * Initialize and enable DDR ECC.
-	 */
-	ddr_enable_ecc(dram_size);
-#endif
-
 	puts(" DDR: ");
 	return dram_size;
 }
diff --git a/board/freescale/mpc8641hpcn/law.c b/board/freescale/mpc8641hpcn/law.c
index 182b4c58498eec57b1e9ab5d115d58130a654c64..8e137289df6cded1520eaf359db45b5c69c51f1b 100644
--- a/board/freescale/mpc8641hpcn/law.c
+++ b/board/freescale/mpc8641hpcn/law.c
@@ -55,9 +55,6 @@ struct law_entry law_table[] = {
 	SET_LAW(CONFIG_SYS_PCI1_IO_PHYS, LAW_SIZE_16M, LAW_TRGT_IF_PCI_1),
 	SET_LAW(CONFIG_SYS_PCI2_IO_PHYS, LAW_SIZE_16M, LAW_TRGT_IF_PCI_2),
 	SET_LAW((CONFIG_SYS_FLASH_BASE & 0xfe000000), LAW_SIZE_32M, LAW_TRGT_IF_LBC),
-#if !defined(CONFIG_SPD_EEPROM)
-	SET_LAW(CONFIG_SYS_DDR_SDRAM_BASE, LAW_SIZE_256M, LAW_TRGT_IF_DDR_2),
-#endif
 	SET_LAW(CONFIG_SYS_RIO_MEM_PHYS, LAW_SIZE_512M, LAW_TRGT_IF_RIO)
 };
 
diff --git a/board/freescale/mpc8641hpcn/mpc8641hpcn.c b/board/freescale/mpc8641hpcn/mpc8641hpcn.c
index 6b4d6cec9d8e235cc89b20f953b21e1055883e99..0069b9cd471107aef89f1268823b19ec6d044ef7 100644
--- a/board/freescale/mpc8641hpcn/mpc8641hpcn.c
+++ b/board/freescale/mpc8641hpcn/mpc8641hpcn.c
@@ -33,10 +33,6 @@
 
 #include "../common/pixis.h"
 
-#if defined(CONFIG_DDR_ECC) && !defined(CONFIG_ECC_INIT_VIA_DDRCONTROLLER)
-extern void ddr_enable_ecc(unsigned int dram_size);
-#endif
-
 long int fixed_sdram(void);
 
 int board_early_init_f(void)
@@ -70,13 +66,6 @@ initdram(int board_type)
 	return dram_size;
 #endif
 
-#if defined(CONFIG_DDR_ECC) && !defined(CONFIG_ECC_INIT_VIA_DDRCONTROLLER)
-	/*
-	 * Initialize and enable DDR ECC.
-	 */
-	ddr_enable_ecc(dram_size);
-#endif
-
 	puts("    DDR: ");
 	return dram_size;
 }
diff --git a/board/sbc8641d/sbc8641d.c b/board/sbc8641d/sbc8641d.c
index 191045a239528ed8283fcc2bee96fb76d52b687c..e33dbee9d85102e75115f19bf0351b227a3bbd22 100644
--- a/board/sbc8641d/sbc8641d.c
+++ b/board/sbc8641d/sbc8641d.c
@@ -38,10 +38,6 @@
 #include <libfdt.h>
 #include <fdt_support.h>
 
-#if defined(CONFIG_DDR_ECC) && !defined(CONFIG_ECC_INIT_VIA_DDRCONTROLLER)
-extern void ddr_enable_ecc (unsigned int dram_size);
-#endif
-
 long int fixed_sdram (void);
 
 int board_early_init_f (void)
@@ -71,13 +67,6 @@ phys_size_t initdram (int board_type)
 	return dram_size;
 #endif
 
-#if defined(CONFIG_DDR_ECC) && !defined(CONFIG_ECC_INIT_VIA_DDRCONTROLLER)
-	/*
-	 * Initialize and enable DDR ECC.
-	 */
-	ddr_enable_ecc (dram_size);
-#endif
-
 	puts ("    DDR: ");
 	return dram_size;
 }
diff --git a/cpu/mpc86xx/start.S b/cpu/mpc86xx/start.S
index 159f3e174385b98e86acbe91cc852ce434d58c4f..75e431764b53a3a8912c0edeed4d8ee89a625201 100644
--- a/cpu/mpc86xx/start.S
+++ b/cpu/mpc86xx/start.S
@@ -202,8 +202,12 @@ boot_warm:
 	mtmsr	0
 #endif
 
+	/* Invalidate BATs */
 	bl	invalidate_bats
 	sync
+	/* Invalidate all of TLB before MMU turn on */
+	bl      clear_tlbs
+	sync
 
 #ifdef CONFIG_SYS_L2
 	/* init the L2 cache */
@@ -275,7 +279,6 @@ in_flash:
 
 	/* setup the rest of the bats */
 	bl      setup_bats
-	bl      clear_tlbs
 	sync
 
 #if (CONFIG_SYS_CCSRBAR_DEFAULT != CONFIG_SYS_CCSRBAR)
@@ -617,7 +620,6 @@ relocate_code:
 
 	mr	r1,  r3		/* Set new stack pointer		*/
 	mr	r9,  r4		/* Save copy of Global Data pointer	*/
-	mr	r2,  r9		/* Save for DECLARE_GLOBAL_DATA_PTR	*/
 	mr	r10, r5		/* Save copy of Destination Address	*/
 
 	mr	r3,  r5				/* Destination Address	*/
@@ -644,16 +646,6 @@ relocate_code:
 	/*
 	 * Now relocate code
 	 */
-#ifdef CONFIG_ECC
-	bl	board_relocate_rom
-	sync
-	mr	r3, r10				/* Destination Address	*/
-	lis	r4, CONFIG_SYS_MONITOR_BASE@h		/* Source      Address	*/
-	ori	r4, r4, CONFIG_SYS_MONITOR_BASE@l
-	lwz	r5, GOT(__init_end)
-	sub	r5, r5, r4
-	li	r6, CONFIG_SYS_CACHELINE_SIZE		/* Cache Line Size	*/
-#else
 	cmplw	cr1,r3,r4
 	addi	r0,r5,3
 	srwi.	r0,r0,2
@@ -675,7 +667,6 @@ relocate_code:
 3:	lwzu	r0,-4(r8)
 	stwu	r0,-4(r7)
 	bdnz	3b
-#endif
 /*
  * Now flush the cache: note that we must start from a cache aligned
  * address. Otherwise we might miss one cache line.
@@ -708,9 +699,6 @@ relocate_code:
 	blr
 
 in_ram:
-#ifdef CONFIG_ECC
-	bl	board_init_ecc
-#endif
 	/*
 	 * Relocation Function, r14 point to got2+0x8000
 	 *
diff --git a/include/configs/MPC8610HPCD.h b/include/configs/MPC8610HPCD.h
index fe80e5d21f73bcb0e002e167790e760778e5f901..67b2764289ac4203360c0e97e1eaac15b024de43 100644
--- a/include/configs/MPC8610HPCD.h
+++ b/include/configs/MPC8610HPCD.h
@@ -126,15 +126,6 @@
 #define CONFIG_SYS_DDR_ERR_DIS		0x00000000
 #define CONFIG_SYS_DDR_SBE		0x000f0000
 
-/*
- * FIXME: Not used in fixed_sdram function
- */
-#define CONFIG_SYS_DDR_MODE		0x00000022
-#define CONFIG_SYS_DDR_CS1_BNDS	0x00000000
-#define CONFIG_SYS_DDR_CS2_BNDS	0x00000FFF	/* Not done */
-#define CONFIG_SYS_DDR_CS3_BNDS	0x00000FFF	/* Not done */
-#define CONFIG_SYS_DDR_CS4_BNDS	0x00000FFF	/* Not done */
-#define CONFIG_SYS_DDR_CS5_BNDS	0x00000FFF	/* Not done */
 #endif
 
 
diff --git a/include/configs/MPC8641HPCN.h b/include/configs/MPC8641HPCN.h
index 80c8beebd8cc5b47be05246584883d06c4f3fb73..542877bca508a805dc77daf4bc526dc925c31708 100644
--- a/include/configs/MPC8641HPCN.h
+++ b/include/configs/MPC8641HPCN.h
@@ -139,17 +139,6 @@ extern unsigned long get_board_sys_clk(unsigned long dummy);
 #define CONFIG_SYS_DDR_CONTROL		0xe3008000	/* Type = DDR2 */
 #define CONFIG_SYS_DDR_CONTROL2	0x04400000
 
-/*
- * FIXME: Not used in fixed_sdram function
- */
-#define CONFIG_SYS_DDR_MODE		0x00000022
-#define CONFIG_SYS_DDR_CS1_BNDS	0x00000000
-#define CONFIG_SYS_DDR_CS2_BNDS	0x00000FFF	/* Not done */
-#define CONFIG_SYS_DDR_CS3_BNDS	0x00000FFF	/* Not done */
-#define CONFIG_SYS_DDR_CS4_BNDS	0x00000FFF	/* Not done */
-#define CONFIG_SYS_DDR_CS5_BNDS	0x00000FFF	/* Not done */
-
-
 #define CONFIG_ID_EEPROM
 #define CONFIG_SYS_I2C_EEPROM_NXID
 #define CONFIG_ID_EEPROM