diff --git a/Makefile b/Makefile
index 9ff846e6810f62128210d2746f4a3da7827e9515..e427bc020fafa741378f824641ab2b906ffd0bb4 100644
--- a/Makefile
+++ b/Makefile
@@ -246,7 +246,6 @@ LIBS += drivers/misc/libmisc.a
LIBS += drivers/mmc/libmmc.a
LIBS += drivers/mtd/libmtd.a
LIBS += drivers/mtd/nand/libnand.a
-LIBS += drivers/mtd/nand_legacy/libnand_legacy.a
LIBS += drivers/mtd/onenand/libonenand.a
LIBS += drivers/mtd/ubi/libubi.a
LIBS += drivers/mtd/spi/libspi_flash.a
@@ -428,7 +427,6 @@ TAG_SUBDIRS += drivers/misc
TAG_SUBDIRS += drivers/mmc
TAG_SUBDIRS += drivers/mtd
TAG_SUBDIRS += drivers/mtd/nand
-TAG_SUBDIRS += drivers/mtd/nand_legacy
TAG_SUBDIRS += drivers/mtd/onenand
TAG_SUBDIRS += drivers/mtd/spi
TAG_SUBDIRS += drivers/net
diff --git a/README b/README
index 7e43c21d267f740b30d47edcd5bb1e0c6d58fa71..4c74cb79347ada1cb1c0906d5894cbfd0f5a465b 100644
--- a/README
+++ b/README
@@ -603,7 +603,6 @@ The following options need to be configured:
CONFIG_CMD_DATE * support for RTC, date/time...
CONFIG_CMD_DHCP * DHCP support
CONFIG_CMD_DIAG * Diagnostics
- CONFIG_CMD_DOC * Disk-On-Chip Support
CONFIG_CMD_DS4510 * ds4510 I2C gpio commands
CONFIG_CMD_DS4510_INFO * ds4510 I2C info command
CONFIG_CMD_DS4510_MEM * ds4510 I2C eeprom/sram commansd
diff --git a/board/delta/nand.c b/board/delta/nand.c
index aff7c54fc2460975910815b8518f7d103357d5f2..e87d502b2519b4b7ae6000eda0dd8a470b9ca643 100644
--- a/board/delta/nand.c
+++ b/board/delta/nand.c
@@ -23,7 +23,6 @@
#include <common.h>
#if defined(CONFIG_CMD_NAND)
-#if !defined(CONFIG_NAND_LEGACY)
#include <nand.h>
#include <asm/arch/pxa-regs.h>
@@ -550,7 +549,4 @@ int board_nand_init(struct nand_chip *nand)
return 0;
}
-#else
- #error "U-Boot legacy NAND support not available for Monahans DFC."
-#endif
#endif
diff --git a/board/esd/common/auto_update.c b/board/esd/common/auto_update.c
index 33aeb46d2647f3da33ff424bd52af8e87516ee76..c4a49e2f1828cf224914e0536806ba68dd1d1913 100644
--- a/board/esd/common/auto_update.c
+++ b/board/esd/common/auto_update.c
@@ -27,9 +27,6 @@
#include <command.h>
#include <image.h>
#include <asm/byteorder.h>
-#if defined(CONFIG_NAND_LEGACY)
-#include <linux/mtd/nand_legacy.h>
-#endif
#include <fat.h>
#include <part.h>
@@ -58,20 +55,6 @@ extern int flash_sect_erase(ulong, ulong);
extern int flash_sect_protect (int, ulong, ulong);
extern int flash_write (char *, ulong, ulong);
-#if defined(CONFIG_CMD_NAND) && defined(CONFIG_NAND_LEGACY)
-/* references to names in cmd_nand.c */
-#define NANDRW_READ 0x01
-#define NANDRW_WRITE 0x00
-#define NANDRW_JFFS2 0x02
-#define NANDRW_JFFS2_SKIP 0x04
-extern struct nand_chip nand_dev_desc[];
-extern int nand_legacy_rw(struct nand_chip* nand, int cmd,
- size_t start, size_t len,
- size_t * retlen, u_char * buf);
-extern int nand_legacy_erase(struct nand_chip* nand, size_t ofs,
- size_t len, int clean);
-#endif
-
extern block_dev_desc_t ide_dev_desc[CONFIG_SYS_IDE_MAXDEVICE];
int au_check_cksum_valid(int i, long nbytes)
@@ -158,9 +141,6 @@ int au_do_update(int i, long sz)
int off, rc;
uint nbytes;
int k;
-#if defined(CONFIG_CMD_NAND) && defined(CONFIG_NAND_LEGACY)
- int total;
-#endif
hdr = (image_header_t *)LOAD_ADDR;
#if defined(CONFIG_FIT)
@@ -240,15 +220,6 @@ int au_do_update(int i, long sz)
au_image[i].name);
debug ("flash_sect_erase(%lx, %lx);\n", start, end);
flash_sect_erase (start, end);
- } else {
-#if defined(CONFIG_CMD_NAND) && defined(CONFIG_NAND_LEGACY)
- printf ("Updating NAND FLASH with image %s\n",
- au_image[i].name);
- debug ("nand_legacy_erase(%lx, %lx);\n", start, end);
- rc = nand_legacy_erase (nand_dev_desc, start,
- end - start + 1, 0);
- debug ("nand_legacy_erase returned %x\n", rc);
-#endif
}
udelay(10000);
@@ -273,18 +244,7 @@ int au_do_update(int i, long sz)
rc = flash_write ((char *)addr, start,
(nbytes + 1) & ~1);
} else {
-#if defined(CONFIG_CMD_NAND) && defined(CONFIG_NAND_LEGACY)
- debug ("nand_legacy_rw(%p, %lx, %x)\n",
- addr, start, nbytes);
- rc = nand_legacy_rw (nand_dev_desc,
- NANDRW_WRITE | NANDRW_JFFS2,
- start, nbytes, (size_t *)&total,
- (uchar *)addr);
- debug ("nand_legacy_rw: ret=%x total=%d nbytes=%d\n",
- rc, total, nbytes);
-#else
rc = -1;
-#endif
}
if (rc != 0) {
printf ("Flashing failed due to error %d\n", rc);
@@ -297,16 +257,6 @@ int au_do_update(int i, long sz)
if (au_image[i].type != AU_NAND) {
rc = crc32 (0, (uchar *)(start + off),
image_get_data_size (hdr));
- } else {
-#if defined(CONFIG_CMD_NAND) && defined(CONFIG_NAND_LEGACY)
- rc = nand_legacy_rw (nand_dev_desc,
- NANDRW_READ | NANDRW_JFFS2 |
- NANDRW_JFFS2_SKIP,
- start, nbytes, (size_t *)&total,
- (uchar *)addr);
- rc = crc32 (0, (uchar *)(addr + off),
- image_get_data_size (hdr));
-#endif
}
if (rc != image_get_dcrc (hdr)) {
printf ("Image %s Bad Data Checksum After COPY\n",
diff --git a/board/g2000/g2000.c b/board/g2000/g2000.c
index 218f1bebf731e3190cf4a07cb035ad9e4344b552..f6f47197cdfc67d0124a60069c5d43ddf33617cd 100644
--- a/board/g2000/g2000.c
+++ b/board/g2000/g2000.c
@@ -148,21 +148,6 @@ phys_size_t initdram (int board_type)
return ret;
}
-
-#if defined(CONFIG_CMD_NAND)
-#include <linux/mtd/nand_legacy.h>
-extern struct nand_chip nand_dev_desc[CONFIG_SYS_MAX_NAND_DEVICE];
-
-void nand_init(void)
-{
- nand_probe(CONFIG_SYS_NAND_BASE);
- if (nand_dev_desc[0].ChipID != NAND_ChipID_UNKNOWN) {
- print_size(nand_dev_desc[0].totlen, "\n");
- }
-}
-#endif
-
-
#if 0 /* test-only !!! */
int do_dumpebc(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
{
diff --git a/board/netphone/netphone.c b/board/netphone/netphone.c
index 53d3172068d8dccb739374b1b56316bf2f8d253f..ce5f05169d343ba337ebe68759e39e595eb753be 100644
--- a/board/netphone/netphone.c
+++ b/board/netphone/netphone.c
@@ -597,22 +597,6 @@ int board_early_init_f(void)
return 0;
}
-#if defined(CONFIG_CMD_NAND)
-
-#include <linux/mtd/nand_legacy.h>
-
-extern ulong nand_probe(ulong physadr);
-extern struct nand_chip nand_dev_desc[CONFIG_SYS_MAX_NAND_DEVICE];
-
-void nand_init(void)
-{
- unsigned long totlen;
-
- totlen = nand_probe(CONFIG_SYS_NAND_BASE);
- printf ("%4lu MB\n", totlen >> 20);
-}
-#endif
-
#ifdef CONFIG_HW_WATCHDOG
void hw_watchdog_reset(void)
diff --git a/board/netta/netta.c b/board/netta/netta.c
index 02fd94cc2c08babd8901a6936128f982060fe93b..38c9d8919e0cac6c9667dc8e27eddb066e183677 100644
--- a/board/netta/netta.c
+++ b/board/netta/netta.c
@@ -555,21 +555,6 @@ int board_early_init_f(void)
return 0;
}
-#if defined(CONFIG_CMD_NAND) && defined(CONFIG_NAND_LEGACY)
-
-#include <linux/mtd/nand_legacy.h>
-
-extern ulong nand_probe(ulong physadr);
-extern struct nand_chip nand_dev_desc[CONFIG_SYS_MAX_NAND_DEVICE];
-
-void nand_init(void)
-{
- unsigned long totlen = nand_probe(CONFIG_SYS_NAND_BASE);
-
- printf ("%4lu MB\n", totlen >> 20);
-}
-#endif
-
#if defined(CONFIG_CMD_PCMCIA)
int pcmcia_init(void)
diff --git a/board/netta2/netta2.c b/board/netta2/netta2.c
index 2ce33cfddf94ae72fc4215570f1855758ebd2b95..3b0191dd78d55675e9dd8a20f39450490e65deee 100644
--- a/board/netta2/netta2.c
+++ b/board/netta2/netta2.c
@@ -595,22 +595,6 @@ int board_early_init_f(void)
return 0;
}
-#if defined(CONFIG_CMD_NAND)
-
-#include <linux/mtd/nand_legacy.h>
-
-extern ulong nand_probe(ulong physadr);
-extern struct nand_chip nand_dev_desc[CONFIG_SYS_MAX_NAND_DEVICE];
-
-void nand_init(void)
-{
- unsigned long totlen;
-
- totlen = nand_probe(CONFIG_SYS_NAND_BASE);
- printf ("%4lu MB\n", totlen >> 20);
-}
-#endif
-
#ifdef CONFIG_HW_WATCHDOG
void hw_watchdog_reset(void)
diff --git a/board/netvia/netvia.c b/board/netvia/netvia.c
index 0b032c4a740e2b5fec3e4a6a069a1d5d7ad06a2f..56069961eb891f4bfa8535ac066b8898a1ed7ba6 100644
--- a/board/netvia/netvia.c
+++ b/board/netvia/netvia.c
@@ -415,18 +415,3 @@ int board_early_init_f(void)
return 0;
}
-
-#if defined(CONFIG_CMD_NAND)
-
-#include <linux/mtd/nand_legacy.h>
-
-extern ulong nand_probe(ulong physadr);
-extern struct nand_chip nand_dev_desc[CONFIG_SYS_MAX_NAND_DEVICE];
-
-void nand_init(void)
-{
- unsigned long totlen = nand_probe(CONFIG_SYS_NAND_BASE);
-
- printf ("%4lu MB\n", totlen >> 20);
-}
-#endif
diff --git a/board/omap2420h4/omap2420h4.c b/board/omap2420h4/omap2420h4.c
index 0fe9380cc9ed9dc03963d7142deae3ae098e8b03..8d1823900c5350e6ea18aabc58bc4db0883cefba 100644
--- a/board/omap2420h4/omap2420h4.c
+++ b/board/omap2420h4/omap2420h4.c
@@ -31,10 +31,6 @@
#include <asm/arch/mem.h>
#include <i2c.h>
#include <asm/mach-types.h>
-#if defined(CONFIG_CMD_NAND)
-#include <linux/mtd/nand_legacy.h>
-extern struct nand_chip nand_dev_desc[CONFIG_SYS_MAX_NAND_DEVICE];
-#endif
DECLARE_GLOBAL_DATA_PTR;
@@ -846,22 +842,3 @@ void update_mux(u32 btype,u32 mtype)
}
}
}
-
-#if defined(CONFIG_CMD_NAND)
-void nand_init(void)
-{
- extern flash_info_t flash_info[];
-
- nand_probe(CONFIG_SYS_NAND_ADDR);
- if (nand_dev_desc[0].ChipID != NAND_ChipID_UNKNOWN) {
- print_size(nand_dev_desc[0].totlen, "\n");
- }
-
-#ifdef CONFIG_SYS_JFFS2_MEM_NAND
- flash_info[CONFIG_SYS_JFFS2_FIRST_BANK].flash_id = nand_dev_desc[0].id;
- flash_info[CONFIG_SYS_JFFS2_FIRST_BANK].size = 1024*1024*2; /* only read kernel single meg partition */
- flash_info[CONFIG_SYS_JFFS2_FIRST_BANK].sector_count = 1024; /* 1024 blocks in 16meg chip (use less for raw/copied partition) */
- flash_info[CONFIG_SYS_JFFS2_FIRST_BANK].start[0] = 0x80200000; /* ?, ram for now, open question, copy to RAM or adapt for NAND */
-#endif
-}
-#endif
diff --git a/board/samsung/smdk6400/smdk6400.c b/board/samsung/smdk6400/smdk6400.c
index bd2e45ac200a135e3e0f91a92cd037b053f777b7..52cd174a066b08bb4a30c43dc744204f5e7d1fb3 100644
--- a/board/samsung/smdk6400/smdk6400.c
+++ b/board/samsung/smdk6400/smdk6400.c
@@ -107,17 +107,6 @@ ulong virt_to_phy_smdk6400(ulong addr)
}
#endif
-#if defined(CONFIG_CMD_NAND) && defined(CONFIG_SYS_NAND_LEGACY)
-#include <linux/mtd/nand.h>
-extern struct nand_chip nand_dev_desc[CONFIG_SYS_MAX_NAND_DEVICE];
-void nand_init(void)
-{
- nand_probe(CONFIG_SYS_NAND_BASE);
- if (nand_dev_desc[0].ChipID != NAND_ChipID_UNKNOWN)
- print_size(nand_dev_desc[0].totlen, "\n");
-}
-#endif
-
ulong board_flash_get_legacy (ulong base, int banknum, flash_info_t *info)
{
if (banknum == 0) { /* non-CFI boot flash */
diff --git a/board/sixnet/sixnet.c b/board/sixnet/sixnet.c
index 6e39b0196c0651d0cf39a8be7b5cb922b1902d3d..edb5d133b727b44a343fc303aa626f1eaaaef5e8 100644
--- a/board/sixnet/sixnet.c
+++ b/board/sixnet/sixnet.c
@@ -33,11 +33,6 @@
# include <status_led.h>
#endif
-#if defined(CONFIG_CMD_NAND)
-#include <linux/mtd/nand_legacy.h>
-extern struct nand_chip nand_dev_desc[CONFIG_SYS_MAX_NAND_DEVICE];
-#endif
-
DECLARE_GLOBAL_DATA_PTR;
#define ORMASK(size) ((-size) & OR_AM_MSK)
diff --git a/board/stxxtc/stxxtc.c b/board/stxxtc/stxxtc.c
index a1a36c493a18b2ab19e953f82dd4ccb11d5616ba..717dbe20846b5b77eefb41578713b536a87dadef 100644
--- a/board/stxxtc/stxxtc.c
+++ b/board/stxxtc/stxxtc.c
@@ -574,22 +574,6 @@ int board_early_init_f(void)
return 0;
}
-#if defined(CONFIG_CMD_NAND)
-
-#include <linux/mtd/nand_legacy.h>
-
-extern ulong nand_probe(ulong physadr);
-extern struct nand_chip nand_dev_desc[CONFIG_SYS_MAX_NAND_DEVICE];
-
-void nand_init(void)
-{
- unsigned long totlen;
-
- totlen = nand_probe(CONFIG_SYS_NAND_BASE);
- printf ("%4lu MB\n", totlen >> 20);
-}
-#endif
-
#ifdef CONFIG_HW_WATCHDOG
void hw_watchdog_reset(void)
diff --git a/board/zylonite/nand.c b/board/zylonite/nand.c
index 899445ee6baec15ca2464b9ad123e1e3d43f6e3a..bec54cb72c945c55d99e9ab4d37f9a455194283a 100644
--- a/board/zylonite/nand.c
+++ b/board/zylonite/nand.c
@@ -23,7 +23,6 @@
#include <common.h>
#if defined(CONFIG_CMD_NAND)
-#ifdef CONFIG_NEW_NAND_CODE
#include <nand.h>
#include <asm/arch/pxa-regs.h>
@@ -554,7 +553,4 @@ int board_nand_init(struct nand_chip *nand)
return 0;
}
-#else
- #error "U-Boot legacy NAND support not available for Monahans DFC."
-#endif
#endif
diff --git a/common/Makefile b/common/Makefile
index f90e5dd2c3091f4d428c8bf4529fcb79c6be9394..89f1c883bc0ebb9c5a791900415e190abbc6f54b 100644
--- a/common/Makefile
+++ b/common/Makefile
@@ -83,7 +83,6 @@ ifdef CONFIG_POST
COBJS-$(CONFIG_CMD_DIAG) += cmd_diag.o
endif
COBJS-$(CONFIG_CMD_DISPLAY) += cmd_display.o
-COBJS-$(CONFIG_CMD_DOC) += cmd_doc.o
COBJS-$(CONFIG_CMD_DTT) += cmd_dtt.o
COBJS-$(CONFIG_ENV_IS_IN_EEPROM) += cmd_eeprom.o
COBJS-$(CONFIG_CMD_EEPROM) += cmd_eeprom.o
@@ -150,7 +149,6 @@ COBJS-$(CONFIG_VFD) += cmd_vfd.o
# others
COBJS-$(CONFIG_DDR_SPD) += ddr_spd.o
-COBJS-$(CONFIG_CMD_DOC) += docecc.o
COBJS-$(CONFIG_HWCONFIG) += hwconfig.o
COBJS-$(CONFIG_CONSOLE_MUX) += iomux.o
COBJS-y += flash.o
diff --git a/common/cmd_doc.c b/common/cmd_doc.c
deleted file mode 100644
index 5cc90f064d925e21bbe570fe17e33de0de37fb42..0000000000000000000000000000000000000000
--- a/common/cmd_doc.c
+++ /dev/null
@@ -1,1644 +0,0 @@
-/*
- * Driver for Disk-On-Chip 2000 and Millennium
- * (c) 1999 Machine Vision Holdings, Inc.
- * (c) 1999, 2000 David Woodhouse <dwmw2@infradead.org>
- *
- * $Id: doc2000.c,v 1.46 2001/10/02 15:05:13 dwmw2 Exp $
- */
-
-#include <common.h>
-#include <config.h>
-#include <command.h>
-#include <malloc.h>
-#include <asm/io.h>
-#include <linux/mtd/nftl.h>
-#include <linux/mtd/doc2000.h>
-
-#error This code is broken and will be removed outright in the next release.
-#error If you need diskonchip support, please update the Linux driver in
-#error drivers/mtd/nand/diskonchip.c to work with u-boot.
-
-/*
- * ! BROKEN !
- *
- * TODO: must be implemented and tested by someone with HW
- */
-#if 0
-#ifdef CONFIG_SYS_DOC_SUPPORT_2000
-#define DoC_is_2000(doc) (doc->ChipID == DOC_ChipID_Doc2k)
-#else
-#define DoC_is_2000(doc) (0)
-#endif
-
-#ifdef CONFIG_SYS_DOC_SUPPORT_MILLENNIUM
-#define DoC_is_Millennium(doc) (doc->ChipID == DOC_ChipID_DocMil)
-#else
-#define DoC_is_Millennium(doc) (0)
-#endif
-
-/* CONFIG_SYS_DOC_PASSIVE_PROBE:
- In order to ensure that the BIOS checksum is correct at boot time, and
- hence that the onboard BIOS extension gets executed, the DiskOnChip
- goes into reset mode when it is read sequentially: all registers
- return 0xff until the chip is woken up again by writing to the
- DOCControl register.
-
- Unfortunately, this means that the probe for the DiskOnChip is unsafe,
- because one of the first things it does is write to where it thinks
- the DOCControl register should be - which may well be shared memory
- for another device. I've had machines which lock up when this is
- attempted. Hence the possibility to do a passive probe, which will fail
- to detect a chip in reset mode, but is at least guaranteed not to lock
- the machine.
-
- If you have this problem, uncomment the following line:
-#define CONFIG_SYS_DOC_PASSIVE_PROBE
-*/
-
-#undef DOC_DEBUG
-#undef ECC_DEBUG
-#undef PSYCHO_DEBUG
-#undef NFTL_DEBUG
-
-static struct DiskOnChip doc_dev_desc[CONFIG_SYS_MAX_DOC_DEVICE];
-
-/* Current DOC Device */
-static int curr_device = -1;
-
-/* Supported NAND flash devices */
-static struct nand_flash_dev nand_flash_ids[] = {
- {"Toshiba TC5816BDC", NAND_MFR_TOSHIBA, 0x64, 21, 1, 2, 0x1000, 0},
- {"Toshiba TC5832DC", NAND_MFR_TOSHIBA, 0x6b, 22, 0, 2, 0x2000, 0},
- {"Toshiba TH58V128DC", NAND_MFR_TOSHIBA, 0x73, 24, 0, 2, 0x4000, 0},
- {"Toshiba TC58256FT/DC", NAND_MFR_TOSHIBA, 0x75, 25, 0, 2, 0x4000, 0},
- {"Toshiba TH58512FT", NAND_MFR_TOSHIBA, 0x76, 26, 0, 3, 0x4000, 0},
- {"Toshiba TC58V32DC", NAND_MFR_TOSHIBA, 0xe5, 22, 0, 2, 0x2000, 0},
- {"Toshiba TC58V64AFT/DC", NAND_MFR_TOSHIBA, 0xe6, 23, 0, 2, 0x2000, 0},
- {"Toshiba TC58V16BDC", NAND_MFR_TOSHIBA, 0xea, 21, 1, 2, 0x1000, 0},
- {"Toshiba TH58100FT", NAND_MFR_TOSHIBA, 0x79, 27, 0, 3, 0x4000, 0},
- {"Samsung KM29N16000", NAND_MFR_SAMSUNG, 0x64, 21, 1, 2, 0x1000, 0},
- {"Samsung unknown 4Mb", NAND_MFR_SAMSUNG, 0x6b, 22, 0, 2, 0x2000, 0},
- {"Samsung KM29U128T", NAND_MFR_SAMSUNG, 0x73, 24, 0, 2, 0x4000, 0},
- {"Samsung KM29U256T", NAND_MFR_SAMSUNG, 0x75, 25, 0, 2, 0x4000, 0},
- {"Samsung unknown 64Mb", NAND_MFR_SAMSUNG, 0x76, 26, 0, 3, 0x4000, 0},
- {"Samsung KM29W32000", NAND_MFR_SAMSUNG, 0xe3, 22, 0, 2, 0x2000, 0},
- {"Samsung unknown 4Mb", NAND_MFR_SAMSUNG, 0xe5, 22, 0, 2, 0x2000, 0},
- {"Samsung KM29U64000", NAND_MFR_SAMSUNG, 0xe6, 23, 0, 2, 0x2000, 0},
- {"Samsung KM29W16000", NAND_MFR_SAMSUNG, 0xea, 21, 1, 2, 0x1000, 0},
- {"Samsung K9F5616Q0C", NAND_MFR_SAMSUNG, 0x45, 25, 0, 2, 0x4000, 1},
- {"Samsung K9K1216Q0C", NAND_MFR_SAMSUNG, 0x46, 26, 0, 3, 0x4000, 1},
- {"Samsung K9F1G08U0M", NAND_MFR_SAMSUNG, 0xf1, 27, 0, 2, 0, 0},
- {NULL,}
-};
-
-/* ------------------------------------------------------------------------- */
-
-int do_doc (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
-{
- int rcode = 0;
-
- switch (argc) {
- case 0:
- case 1:
- cmd_usage(cmdtp);
- return 1;
- case 2:
- if (strcmp(argv[1],"info") == 0) {
- int i;
-
- putc ('\n');
-
- for (i=0; i<CONFIG_SYS_MAX_DOC_DEVICE; ++i) {
- if(doc_dev_desc[i].ChipID == DOC_ChipID_UNKNOWN)
- continue; /* list only known devices */
- printf ("Device %d: ", i);
- doc_print(&doc_dev_desc[i]);
- }
- return 0;
-
- } else if (strcmp(argv[1],"device") == 0) {
- if ((curr_device < 0) || (curr_device >= CONFIG_SYS_MAX_DOC_DEVICE)) {
- puts ("\nno devices available\n");
- return 1;
- }
- printf ("\nDevice %d: ", curr_device);
- doc_print(&doc_dev_desc[curr_device]);
- return 0;
- }
- cmd_usage(cmdtp);
- return 1;
- case 3:
- if (strcmp(argv[1],"device") == 0) {
- int dev = (int)simple_strtoul(argv[2], NULL, 10);
-
- printf ("\nDevice %d: ", dev);
- if (dev >= CONFIG_SYS_MAX_DOC_DEVICE) {
- puts ("unknown device\n");
- return 1;
- }
- doc_print(&doc_dev_desc[dev]);
- /*doc_print (dev);*/
-
- if (doc_dev_desc[dev].ChipID == DOC_ChipID_UNKNOWN) {
- return 1;
- }
-
- curr_device = dev;
-
- puts ("... is now current device\n");
-
- return 0;
- }
-
- cmd_usage(cmdtp);
- return 1;
- default:
- /* at least 4 args */
-
- if (strcmp(argv[1],"read") == 0 || strcmp(argv[1],"write") == 0) {
- ulong addr = simple_strtoul(argv[2], NULL, 16);
- ulong off = simple_strtoul(argv[3], NULL, 16);
- ulong size = simple_strtoul(argv[4], NULL, 16);
- int cmd = (strcmp(argv[1],"read") == 0);
- int ret, total;
-
- printf ("\nDOC %s: device %d offset %ld, size %ld ... ",
- cmd ? "read" : "write", curr_device, off, size);
-
- ret = doc_rw(doc_dev_desc + curr_device, cmd, off, size,
- (size_t *)&total, (u_char*)addr);
-
- printf ("%d bytes %s: %s\n", total, cmd ? "read" : "write",
- ret ? "ERROR" : "OK");
-
- return ret;
- } else if (strcmp(argv[1],"erase") == 0) {
- ulong off = simple_strtoul(argv[2], NULL, 16);
- ulong size = simple_strtoul(argv[3], NULL, 16);
- int ret;
-
- printf ("\nDOC erase: device %d offset %ld, size %ld ... ",
- curr_device, off, size);
-
- ret = doc_erase (doc_dev_desc + curr_device, off, size);
-
- printf("%s\n", ret ? "ERROR" : "OK");
-
- return ret;
- } else {
- cmd_usage(cmdtp);
- rcode = 1;
- }
-
- return rcode;
- }
-}
-U_BOOT_CMD(
- doc, 5, 1, do_doc,
- "Disk-On-Chip sub-system",
- "info - show available DOC devices\n"
- "doc device [dev] - show or set current device\n"
- "doc read addr off size\n"
- "doc write addr off size - read/write `size'"
- " bytes starting at offset `off'\n"
- " to/from memory address `addr'\n"
- "doc erase off size - erase `size' bytes of DOC from offset `off'"
-);
-
-int do_docboot (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
-{
- char *boot_device = NULL;
- char *ep;
- int dev;
- ulong cnt;
- ulong addr;
- ulong offset = 0;
- image_header_t *hdr;
- int rcode = 0;
-#if defined(CONFIG_FIT)
- const void *fit_hdr = NULL;
-#endif
-
- show_boot_progress (34);
- switch (argc) {
- case 1:
- addr = CONFIG_SYS_LOAD_ADDR;
- boot_device = getenv ("bootdevice");
- break;
- case 2:
- addr = simple_strtoul(argv[1], NULL, 16);
- boot_device = getenv ("bootdevice");
- break;
- case 3:
- addr = simple_strtoul(argv[1], NULL, 16);
- boot_device = argv[2];
- break;
- case 4:
- addr = simple_strtoul(argv[1], NULL, 16);
- boot_device = argv[2];
- offset = simple_strtoul(argv[3], NULL, 16);
- break;
- default:
- cmd_usage(cmdtp);
- show_boot_progress (-35);
- return 1;
- }
-
- show_boot_progress (35);
- if (!boot_device) {
- puts ("\n** No boot device **\n");
- show_boot_progress (-36);
- return 1;
- }
- show_boot_progress (36);
-
- dev = simple_strtoul(boot_device, &ep, 16);
-
- if ((dev >= CONFIG_SYS_MAX_DOC_DEVICE) ||
- (doc_dev_desc[dev].ChipID == DOC_ChipID_UNKNOWN)) {
- printf ("\n** Device %d not available\n", dev);
- show_boot_progress (-37);
- return 1;
- }
- show_boot_progress (37);
-
- printf ("\nLoading from device %d: %s at 0x%lX (offset 0x%lX)\n",
- dev, doc_dev_desc[dev].name, doc_dev_desc[dev].physadr,
- offset);
-
- if (doc_rw (doc_dev_desc + dev, 1, offset,
- SECTORSIZE, NULL, (u_char *)addr)) {
- printf ("** Read error on %d\n", dev);
- show_boot_progress (-38);
- return 1;
- }
- show_boot_progress (38);
-
- switch (genimg_get_format ((void *)addr)) {
- case IMAGE_FORMAT_LEGACY:
- hdr = (image_header_t *)addr;
-
- image_print_contents (hdr);
-
- cnt = image_get_image_size (hdr);
- break;
-#if defined(CONFIG_FIT)
- case IMAGE_FORMAT_FIT:
- fit_hdr = (const void *)addr;
- puts ("Fit image detected...\n");
-
- cnt = fit_get_size (fit_hdr);
- break;
-#endif
- default:
- show_boot_progress (-39);
- puts ("** Unknown image type\n");
- return 1;
- }
- show_boot_progress (39);
-
- cnt -= SECTORSIZE;
- if (doc_rw (doc_dev_desc + dev, 1, offset + SECTORSIZE, cnt,
- NULL, (u_char *)(addr+SECTORSIZE))) {
- printf ("** Read error on %d\n", dev);
- show_boot_progress (-40);
- return 1;
- }
- show_boot_progress (40);
-
-#if defined(CONFIG_FIT)
- /* This cannot be done earlier, we need complete FIT image in RAM first */
- if (genimg_get_format ((void *)addr) == IMAGE_FORMAT_FIT) {
- if (!fit_check_format (fit_hdr)) {
- show_boot_progress (-130);
- puts ("** Bad FIT image format\n");
- return 1;
- }
- show_boot_progress (131);
- fit_print_contents (fit_hdr);
- }
-#endif
-
- /* Loading ok, update default load address */
-
- load_addr = addr;
-
- /* Check if we should attempt an auto-start */
- if (((ep = getenv("autostart")) != NULL) && (strcmp(ep,"yes") == 0)) {
- char *local_args[2];
- extern int do_bootm (cmd_tbl_t *, int, int, char *[]);
-
- local_args[0] = argv[0];
- local_args[1] = NULL;
-
- printf ("Automatic boot of image at addr 0x%08lX ...\n", addr);
-
- do_bootm (cmdtp, 0, 1, local_args);
- rcode = 1;
- }
- return rcode;
-}
-
-U_BOOT_CMD(
- docboot, 4, 1, do_docboot,
- "boot from DOC device",
- "loadAddr dev"
-);
-
-int doc_rw (struct DiskOnChip* this, int cmd,
- loff_t from, size_t len,
- size_t * retlen, u_char * buf)
-{
- int noecc, ret = 0, n, total = 0;
- char eccbuf[6];
-
- while(len) {
- /* The ECC will not be calculated correctly if
- less than 512 is written or read */
- noecc = (from != (from | 0x1ff) + 1) || (len < 0x200);
-
- if (cmd)
- ret = doc_read_ecc(this, from, len,
- (size_t *)&n, (u_char*)buf,
- noecc ? (uchar *)NULL : (uchar *)eccbuf);
- else
- ret = doc_write_ecc(this, from, len,
- (size_t *)&n, (u_char*)buf,
- noecc ? (uchar *)NULL : (uchar *)eccbuf);
-
- if (ret)
- break;
-
- from += n;
- buf += n;
- total += n;
- len -= n;
- }
-
- if (retlen)
- *retlen = total;
-
- return ret;
-}
-
-void doc_print(struct DiskOnChip *this) {
- printf("%s at 0x%lX,\n"
- "\t %d chip%s %s, size %d MB, \n"
- "\t total size %ld MB, sector size %ld kB\n",
- this->name, this->physadr, this->numchips,
- this->numchips>1 ? "s" : "", this->chips_name,
- 1 << (this->chipshift - 20),
- this->totlen >> 20, this->erasesize >> 10);
-
- if (this->nftl_found) {
- struct NFTLrecord *nftl = &this->nftl;
- unsigned long bin_size, flash_size;
-
- bin_size = nftl->nb_boot_blocks * this->erasesize;
- flash_size = (nftl->nb_blocks - nftl->nb_boot_blocks) * this->erasesize;
-
- printf("\t NFTL boot record:\n"
- "\t Binary partition: size %ld%s\n"
- "\t Flash disk partition: size %ld%s, offset 0x%lx\n",
- bin_size > (1 << 20) ? bin_size >> 20 : bin_size >> 10,
- bin_size > (1 << 20) ? "MB" : "kB",
- flash_size > (1 << 20) ? flash_size >> 20 : flash_size >> 10,
- flash_size > (1 << 20) ? "MB" : "kB", bin_size);
- } else {
- puts ("\t No NFTL boot record found.\n");
- }
-}
-
-/* ------------------------------------------------------------------------- */
-
-/* This function is needed to avoid calls of the __ashrdi3 function. */
-static int shr(int val, int shift) {
- return val >> shift;
-}
-
-/* Perform the required delay cycles by reading from the appropriate register */
-static void DoC_Delay(struct DiskOnChip *doc, unsigned short cycles)
-{
- volatile char dummy;
- int i;
-
- for (i = 0; i < cycles; i++) {
- if (DoC_is_Millennium(doc))
- dummy = ReadDOC(doc->virtadr, NOP);
- else
- dummy = ReadDOC(doc->virtadr, DOCStatus);
- }
-
-}
-
-/* DOC_WaitReady: Wait for RDY line to be asserted by the flash chip */
-static int _DoC_WaitReady(struct DiskOnChip *doc)
-{
- unsigned long docptr = doc->virtadr;
- unsigned long start = get_timer(0);
-
-#ifdef PSYCHO_DEBUG
- puts ("_DoC_WaitReady called for out-of-line wait\n");
-#endif
-
- /* Out-of-line routine to wait for chip response */
- while (!(ReadDOC(docptr, CDSNControl) & CDSN_CTRL_FR_B)) {
-#ifdef CONFIG_SYS_DOC_SHORT_TIMEOUT
- /* it seems that after a certain time the DoC deasserts
- * the CDSN_CTRL_FR_B although it is not ready...
- * using a short timout solve this (timer increments every ms) */
- if (get_timer(start) > 10) {
- return DOC_ETIMEOUT;
- }
-#else
- if (get_timer(start) > 10 * 1000) {
- puts ("_DoC_WaitReady timed out.\n");
- return DOC_ETIMEOUT;
- }
-#endif
- udelay(1);
- }
-
- return 0;
-}
-
-static int DoC_WaitReady(struct DiskOnChip *doc)
-{
- unsigned long docptr = doc->virtadr;
- /* This is inline, to optimise the common case, where it's ready instantly */
- int ret = 0;
-
- /* 4 read form NOP register should be issued in prior to the read from CDSNControl
- see Software Requirement 11.4 item 2. */
- DoC_Delay(doc, 4);
-
- if (!(ReadDOC(docptr, CDSNControl) & CDSN_CTRL_FR_B))
- /* Call the out-of-line routine to wait */
- ret = _DoC_WaitReady(doc);
-
- /* issue 2 read from NOP register after reading from CDSNControl register
- see Software Requirement 11.4 item 2. */
- DoC_Delay(doc, 2);
-
- return ret;
-}
-
-/* DoC_Command: Send a flash command to the flash chip through the CDSN Slow IO register to
- bypass the internal pipeline. Each of 4 delay cycles (read from the NOP register) is
- required after writing to CDSN Control register, see Software Requirement 11.4 item 3. */
-
-static inline int DoC_Command(struct DiskOnChip *doc, unsigned char command,
- unsigned char xtraflags)
-{
- unsigned long docptr = doc->virtadr;
-
- if (DoC_is_2000(doc))
- xtraflags |= CDSN_CTRL_FLASH_IO;
-
- /* Assert the CLE (Command Latch Enable) line to the flash chip */
- WriteDOC(xtraflags | CDSN_CTRL_CLE | CDSN_CTRL_CE, docptr, CDSNControl);
- DoC_Delay(doc, 4); /* Software requirement 11.4.3 for Millennium */
-
- if (DoC_is_Millennium(doc))
- WriteDOC(command, docptr, CDSNSlowIO);
-
- /* Send the command */
- WriteDOC_(command, docptr, doc->ioreg);
-
- /* Lower the CLE line */
- WriteDOC(xtraflags | CDSN_CTRL_CE, docptr, CDSNControl);
- DoC_Delay(doc, 4); /* Software requirement 11.4.3 for Millennium */
-
- /* Wait for the chip to respond - Software requirement 11.4.1 (extended for any command) */
- return DoC_WaitReady(doc);
-}
-
-/* DoC_Address: Set the current address for the flash chip through the CDSN Slow IO register to
- bypass the internal pipeline. Each of 4 delay cycles (read from the NOP register) is
- required after writing to CDSN Control register, see Software Requirement 11.4 item 3. */
-
-static int DoC_Address(struct DiskOnChip *doc, int numbytes, unsigned long ofs,
- unsigned char xtraflags1, unsigned char xtraflags2)
-{
- unsigned long docptr;
- int i;
-
- docptr = doc->virtadr;
-
- if (DoC_is_2000(doc))
- xtraflags1 |= CDSN_CTRL_FLASH_IO;
-
- /* Assert the ALE (Address Latch Enable) line to the flash chip */
- WriteDOC(xtraflags1 | CDSN_CTRL_ALE | CDSN_CTRL_CE, docptr, CDSNControl);
-
- DoC_Delay(doc, 4); /* Software requirement 11.4.3 for Millennium */
-
- /* Send the address */
- /* Devices with 256-byte page are addressed as:
- Column (bits 0-7), Page (bits 8-15, 16-23, 24-31)
- * there is no device on the market with page256
- and more than 24 bits.
- Devices with 512-byte page are addressed as:
- Column (bits 0-7), Page (bits 9-16, 17-24, 25-31)
- * 25-31 is sent only if the chip support it.
- * bit 8 changes the read command to be sent
- (NAND_CMD_READ0 or NAND_CMD_READ1).
- */
-
- if (numbytes == ADDR_COLUMN || numbytes == ADDR_COLUMN_PAGE) {
- if (DoC_is_Millennium(doc))
- WriteDOC(ofs & 0xff, docptr, CDSNSlowIO);
- WriteDOC_(ofs & 0xff, docptr, doc->ioreg);
- }
-
- if (doc->page256) {
- ofs = ofs >> 8;
- } else {
- ofs = ofs >> 9;
- }
-
- if (numbytes == ADDR_PAGE || numbytes == ADDR_COLUMN_PAGE) {
- for (i = 0; i < doc->pageadrlen; i++, ofs = ofs >> 8) {
- if (DoC_is_Millennium(doc))
- WriteDOC(ofs & 0xff, docptr, CDSNSlowIO);
- WriteDOC_(ofs & 0xff, docptr, doc->ioreg);
- }
- }
-
- DoC_Delay(doc, 2); /* Needed for some slow flash chips. mf. */
-
- /* FIXME: The SlowIO's for millennium could be replaced by
- a single WritePipeTerm here. mf. */
-
- /* Lower the ALE line */
- WriteDOC(xtraflags1 | xtraflags2 | CDSN_CTRL_CE, docptr,
- CDSNControl);
-
- DoC_Delay(doc, 4); /* Software requirement 11.4.3 for Millennium */
-
- /* Wait for the chip to respond - Software requirement 11.4.1 */
- return DoC_WaitReady(doc);
-}
-
-/* Read a buffer from DoC, taking care of Millennium oddities */
-static void DoC_ReadBuf(struct DiskOnChip *doc, u_char * buf, int len)
-{
- volatile int dummy;
- int modulus = 0xffff;
- unsigned long docptr;
- int i;
-
- docptr = doc->virtadr;
-
- if (len <= 0)
- return;
-
- if (DoC_is_Millennium(doc)) {
- /* Read the data via the internal pipeline through CDSN IO register,
- see Pipelined Read Operations 11.3 */
- dummy = ReadDOC(docptr, ReadPipeInit);
-
- /* Millennium should use the LastDataRead register - Pipeline Reads */
- len--;
-
- /* This is needed for correctly ECC calculation */
- modulus = 0xff;
- }
-
- for (i = 0; i < len; i++)
- buf[i] = ReadDOC_(docptr, doc->ioreg + (i & modulus));
-
- if (DoC_is_Millennium(doc)) {
- buf[i] = ReadDOC(docptr, LastDataRead);
- }
-}
-
-/* Write a buffer to DoC, taking care of Millennium oddities */
-static void DoC_WriteBuf(struct DiskOnChip *doc, const u_char * buf, int len)
-{
- unsigned long docptr;
- int i;
-
- docptr = doc->virtadr;
-
- if (len <= 0)
- return;
-
- for (i = 0; i < len; i++)
- WriteDOC_(buf[i], docptr, doc->ioreg + i);
-
- if (DoC_is_Millennium(doc)) {
- WriteDOC(0x00, docptr, WritePipeTerm);
- }
-}
-
-
-/* DoC_SelectChip: Select a given flash chip within the current floor */
-
-static inline int DoC_SelectChip(struct DiskOnChip *doc, int chip)
-{
- unsigned long docptr = doc->virtadr;
-
- /* Software requirement 11.4.4 before writing DeviceSelect */
- /* Deassert the CE line to eliminate glitches on the FCE# outputs */
- WriteDOC(CDSN_CTRL_WP, docptr, CDSNControl);
- DoC_Delay(doc, 4); /* Software requirement 11.4.3 for Millennium */
-
- /* Select the individual flash chip requested */
- WriteDOC(chip, docptr, CDSNDeviceSelect);
- DoC_Delay(doc, 4);
-
- /* Reassert the CE line */
- WriteDOC(CDSN_CTRL_CE | CDSN_CTRL_FLASH_IO | CDSN_CTRL_WP, docptr,
- CDSNControl);
- DoC_Delay(doc, 4); /* Software requirement 11.4.3 for Millennium */
-
- /* Wait for it to be ready */
- return DoC_WaitReady(doc);
-}
-
-/* DoC_SelectFloor: Select a given floor (bank of flash chips) */
-
-static inline int DoC_SelectFloor(struct DiskOnChip *doc, int floor)
-{
- unsigned long docptr = doc->virtadr;
-
- /* Select the floor (bank) of chips required */
- WriteDOC(floor, docptr, FloorSelect);
-
- /* Wait for the chip to be ready */
- return DoC_WaitReady(doc);
-}
-
-/* DoC_IdentChip: Identify a given NAND chip given {floor,chip} */
-
-static int DoC_IdentChip(struct DiskOnChip *doc, int floor, int chip)
-{
- int mfr, id, i;
- volatile char dummy;
-
- /* Page in the required floor/chip */
- DoC_SelectFloor(doc, floor);
- DoC_SelectChip(doc, chip);
-
- /* Reset the chip */
- if (DoC_Command(doc, NAND_CMD_RESET, CDSN_CTRL_WP)) {
-#ifdef DOC_DEBUG
- printf("DoC_Command (reset) for %d,%d returned true\n",
- floor, chip);
-#endif
- return 0;
- }
-
-
- /* Read the NAND chip ID: 1. Send ReadID command */
- if (DoC_Command(doc, NAND_CMD_READID, CDSN_CTRL_WP)) {
-#ifdef DOC_DEBUG
- printf("DoC_Command (ReadID) for %d,%d returned true\n",
- floor, chip);
-#endif
- return 0;
- }
-
- /* Read the NAND chip ID: 2. Send address byte zero */
- DoC_Address(doc, ADDR_COLUMN, 0, CDSN_CTRL_WP, 0);
-
- /* Read the manufacturer and device id codes from the device */
-
- /* CDSN Slow IO register see Software Requirement 11.4 item 5. */
- dummy = ReadDOC(doc->virtadr, CDSNSlowIO);
- DoC_Delay(doc, 2);
- mfr = ReadDOC_(doc->virtadr, doc->ioreg);
-
- /* CDSN Slow IO register see Software Requirement 11.4 item 5. */
- dummy = ReadDOC(doc->virtadr, CDSNSlowIO);
- DoC_Delay(doc, 2);
- id = ReadDOC_(doc->virtadr, doc->ioreg);
-
- /* No response - return failure */
- if (mfr == 0xff || mfr == 0)
- return 0;
-
- /* Check it's the same as the first chip we identified.
- * M-Systems say that any given DiskOnChip device should only
- * contain _one_ type of flash part, although that's not a
- * hardware restriction. */
- if (doc->mfr) {
- if (doc->mfr == mfr && doc->id == id)
- return 1; /* This is another the same the first */
- else
- printf("Flash chip at floor %d, chip %d is different:\n",
- floor, chip);
- }
-
- /* Print and store the manufacturer and ID codes. */
- for (i = 0; nand_flash_ids[i].name != NULL; i++) {
- if (mfr == nand_flash_ids[i].manufacture_id &&
- id == nand_flash_ids[i].model_id) {
-#ifdef DOC_DEBUG
- printf("Flash chip found: Manufacturer ID: %2.2X, "
- "Chip ID: %2.2X (%s)\n", mfr, id,
- nand_flash_ids[i].name);
-#endif
- if (!doc->mfr) {
- doc->mfr = mfr;
- doc->id = id;
- doc->chipshift =
- nand_flash_ids[i].chipshift;
- doc->page256 = nand_flash_ids[i].page256;
- doc->pageadrlen =
- nand_flash_ids[i].pageadrlen;
- doc->erasesize =
- nand_flash_ids[i].erasesize;
- doc->chips_name =
- nand_flash_ids[i].name;
- return 1;
- }
- return 0;
- }
- }
-
-
-#ifdef DOC_DEBUG
- /* We haven't fully identified the chip. Print as much as we know. */
- printf("Unknown flash chip found: %2.2X %2.2X\n",
- id, mfr);
-#endif
-
- return 0;
-}
-
-/* DoC_ScanChips: Find all NAND chips present in a DiskOnChip, and identify them */
-
-static void DoC_ScanChips(struct DiskOnChip *this)
-{
- int floor, chip;
- int numchips[MAX_FLOORS];
- int maxchips = MAX_CHIPS;
- int ret = 1;
-
- this->numchips = 0;
- this->mfr = 0;
- this->id = 0;
-
- if (DoC_is_Millennium(this))
- maxchips = MAX_CHIPS_MIL;
-
- /* For each floor, find the number of valid chips it contains */
- for (floor = 0; floor < MAX_FLOORS; floor++) {
- ret = 1;
- numchips[floor] = 0;
- for (chip = 0; chip < maxchips && ret != 0; chip++) {
-
- ret = DoC_IdentChip(this, floor, chip);
- if (ret) {
- numchips[floor]++;
- this->numchips++;
- }
- }
- }
-
- /* If there are none at all that we recognise, bail */
- if (!this->numchips) {
- puts ("No flash chips recognised.\n");
- return;
- }
-
- /* Allocate an array to hold the information for each chip */
- this->chips = malloc(sizeof(struct Nand) * this->numchips);
- if (!this->chips) {
- puts ("No memory for allocating chip info structures\n");
- return;
- }
-
- ret = 0;
-
- /* Fill out the chip array with {floor, chipno} for each
- * detected chip in the device. */
- for (floor = 0; floor < MAX_FLOORS; floor++) {
- for (chip = 0; chip < numchips[floor]; chip++) {
- this->chips[ret].floor = floor;
- this->chips[ret].chip = chip;
- this->chips[ret].curadr = 0;
- this->chips[ret].curmode = 0x50;
- ret++;
- }
- }
-
- /* Calculate and print the total size of the device */
- this->totlen = this->numchips * (1 << this->chipshift);
-
-#ifdef DOC_DEBUG
- printf("%d flash chips found. Total DiskOnChip size: %ld MB\n",
- this->numchips, this->totlen >> 20);
-#endif
-}
-
-/* find_boot_record: Find the NFTL Media Header and its Spare copy which contains the
- * various device information of the NFTL partition and Bad Unit Table. Update
- * the ReplUnitTable[] table accroding to the Bad Unit Table. ReplUnitTable[]
- * is used for management of Erase Unit in other routines in nftl.c and nftlmount.c
- */
-static int find_boot_record(struct NFTLrecord *nftl)
-{
- struct nftl_uci1 h1;
- struct nftl_oob oob;
- unsigned int block, boot_record_count = 0;
- int retlen;
- u8 buf[SECTORSIZE];
- struct NFTLMediaHeader *mh = &nftl->MediaHdr;
- unsigned int i;
-
- nftl->MediaUnit = BLOCK_NIL;
- nftl->SpareMediaUnit = BLOCK_NIL;
-
- /* search for a valid boot record */
- for (block = 0; block < nftl->nb_blocks; block++) {
- int ret;
-
- /* Check for ANAND header first. Then can whinge if it's found but later
- checks fail */
- if ((ret = doc_read_ecc(nftl->mtd, block * nftl->EraseSize, SECTORSIZE,
- (size_t *)&retlen, buf, NULL))) {
- static int warncount = 5;
-
- if (warncount) {
- printf("Block read at 0x%x failed\n", block * nftl->EraseSize);
- if (!--warncount)
- puts ("Further failures for this block will not be printed\n");
- }
- continue;
- }
-
- if (retlen < 6 || memcmp(buf, "ANAND", 6)) {
- /* ANAND\0 not found. Continue */
-#ifdef PSYCHO_DEBUG
- printf("ANAND header not found at 0x%x\n", block * nftl->EraseSize);
-#endif
- continue;
- }
-
-#ifdef NFTL_DEBUG
- printf("ANAND header found at 0x%x\n", block * nftl->EraseSize);
-#endif
-
- /* To be safer with BIOS, also use erase mark as discriminant */
- if ((ret = doc_read_oob(nftl->mtd, block * nftl->EraseSize + SECTORSIZE + 8,
- 8, (size_t *)&retlen, (uchar *)&h1) < 0)) {
-#ifdef NFTL_DEBUG
- printf("ANAND header found at 0x%x, but OOB data read failed\n",
- block * nftl->EraseSize);
-#endif
- continue;
- }
-
- /* OK, we like it. */
-
- if (boot_record_count) {
- /* We've already processed one. So we just check if
- this one is the same as the first one we found */
- if (memcmp(mh, buf, sizeof(struct NFTLMediaHeader))) {
-#ifdef NFTL_DEBUG
- printf("NFTL Media Headers at 0x%x and 0x%x disagree.\n",
- nftl->MediaUnit * nftl->EraseSize, block * nftl->EraseSize);
-#endif
- /* if (debug) Print both side by side */
- return -1;
- }
- if (boot_record_count == 1)
- nftl->SpareMediaUnit = block;
-
- boot_record_count++;
- continue;
- }
-
- /* This is the first we've seen. Copy the media header structure into place */
- memcpy(mh, buf, sizeof(struct NFTLMediaHeader));
-
- /* Do some sanity checks on it */
- if (mh->UnitSizeFactor == 0) {
-#ifdef NFTL_DEBUG
- puts ("UnitSizeFactor 0x00 detected.\n"
- "This violates the spec but we think we know what it means...\n");
-#endif
- } else if (mh->UnitSizeFactor != 0xff) {
- printf ("Sorry, we don't support UnitSizeFactor "
- "of != 1 yet.\n");
- return -1;
- }
-
- nftl->nb_boot_blocks = le16_to_cpu(mh->FirstPhysicalEUN);
- if ((nftl->nb_boot_blocks + 2) >= nftl->nb_blocks) {
- printf ("NFTL Media Header sanity check failed:\n"
- "nb_boot_blocks (%d) + 2 > nb_blocks (%d)\n",
- nftl->nb_boot_blocks, nftl->nb_blocks);
- return -1;
- }
-
- nftl->numvunits = le32_to_cpu(mh->FormattedSize) / nftl->EraseSize;
- if (nftl->numvunits > (nftl->nb_blocks - nftl->nb_boot_blocks - 2)) {
- printf ("NFTL Media Header sanity check failed:\n"
- "numvunits (%d) > nb_blocks (%d) - nb_boot_blocks(%d) - 2\n",
- nftl->numvunits,
- nftl->nb_blocks,
- nftl->nb_boot_blocks);
- return -1;
- }
-
- nftl->nr_sects = nftl->numvunits * (nftl->EraseSize / SECTORSIZE);
-
- /* If we're not using the last sectors in the device for some reason,
- reduce nb_blocks accordingly so we forget they're there */
- nftl->nb_blocks = le16_to_cpu(mh->NumEraseUnits) + le16_to_cpu(mh->FirstPhysicalEUN);
-
- /* read the Bad Erase Unit Table and modify ReplUnitTable[] accordingly */
- for (i = 0; i < nftl->nb_blocks; i++) {
- if ((i & (SECTORSIZE - 1)) == 0) {
- /* read one sector for every SECTORSIZE of blocks */
- if ((ret = doc_read_ecc(nftl->mtd, block * nftl->EraseSize +
- i + SECTORSIZE, SECTORSIZE,
- (size_t *)&retlen, buf, (uchar *)&oob)) < 0) {
- puts ("Read of bad sector table failed\n");
- return -1;
- }
- }
- /* mark the Bad Erase Unit as RESERVED in ReplUnitTable */
- if (buf[i & (SECTORSIZE - 1)] != 0xff)
- nftl->ReplUnitTable[i] = BLOCK_RESERVED;
- }
-
- nftl->MediaUnit = block;
- boot_record_count++;
-
- } /* foreach (block) */
-
- return boot_record_count?0:-1;
-}
-
-/* This routine is made available to other mtd code via
- * inter_module_register. It must only be accessed through
- * inter_module_get which will bump the use count of this module. The
- * addresses passed back in mtd are valid as long as the use count of
- * this module is non-zero, i.e. between inter_module_get and
- * inter_module_put. Keith Owens <kaos@ocs.com.au> 29 Oct 2000.
- */
-static void DoC2k_init(struct DiskOnChip* this)
-{
- struct NFTLrecord *nftl;
-
- switch (this->ChipID) {
- case DOC_ChipID_Doc2k:
- this->name = "DiskOnChip 2000";
- this->ioreg = DoC_2k_CDSN_IO;
- break;
- case DOC_ChipID_DocMil:
- this->name = "DiskOnChip Millennium";
- this->ioreg = DoC_Mil_CDSN_IO;
- break;
- }
-
-#ifdef DOC_DEBUG
- printf("%s found at address 0x%lX\n", this->name,
- this->physadr);
-#endif
-
- this->totlen = 0;
- this->numchips = 0;
-
- this->curfloor = -1;
- this->curchip = -1;
-
- /* Ident all the chips present. */
- DoC_ScanChips(this);
- if ((!this->numchips) || (!this->chips))
- return;
-
- nftl = &this->nftl;
-
- /* Get physical parameters */
- nftl->EraseSize = this->erasesize;
- nftl->nb_blocks = this->totlen / this->erasesize;
- nftl->mtd = this;
-
- if (find_boot_record(nftl) != 0)
- this->nftl_found = 0;
- else
- this->nftl_found = 1;
-
- printf("%s @ 0x%lX, %ld MB\n", this->name, this->physadr, this->totlen >> 20);
-}
-
-int doc_read_ecc(struct DiskOnChip* this, loff_t from, size_t len,
- size_t * retlen, u_char * buf, u_char * eccbuf)
-{
- unsigned long docptr;
- struct Nand *mychip;
- unsigned char syndrome[6];
- volatile char dummy;
- int i, len256 = 0, ret=0;
-
- docptr = this->virtadr;
-
- /* Don't allow read past end of device */
- if (from >= this->totlen) {
- puts ("Out of flash\n");
- return DOC_EINVAL;
- }
-
- /* Don't allow a single read to cross a 512-byte block boundary */
- if (from + len > ((from | 0x1ff) + 1))
- len = ((from | 0x1ff) + 1) - from;
-
- /* The ECC will not be calculated correctly if less than 512 is read */
- if (len != 0x200 && eccbuf)
- printf("ECC needs a full sector read (adr: %lx size %lx)\n",
- (long) from, (long) len);
-
-#ifdef PSYCHO_DEBUG
- printf("DoC_Read (adr: %lx size %lx)\n", (long) from, (long) len);
-#endif
-
- /* Find the chip which is to be used and select it */
- mychip = &this->chips[shr(from, this->chipshift)];
-
- if (this->curfloor != mychip->floor) {
- DoC_SelectFloor(this, mychip->floor);
- DoC_SelectChip(this, mychip->chip);
- } else if (this->curchip != mychip->chip) {
- DoC_SelectChip(this, mychip->chip);
- }
-
- this->curfloor = mychip->floor;
- this->curchip = mychip->chip;
-
- DoC_Command(this,
- (!this->page256
- && (from & 0x100)) ? NAND_CMD_READ1 : NAND_CMD_READ0,
- CDSN_CTRL_WP);
- DoC_Address(this, ADDR_COLUMN_PAGE, from, CDSN_CTRL_WP,
- CDSN_CTRL_ECC_IO);
-
- if (eccbuf) {
- /* Prime the ECC engine */
- WriteDOC(DOC_ECC_RESET, docptr, ECCConf);
- WriteDOC(DOC_ECC_EN, docptr, ECCConf);
- } else {
- /* disable the ECC engine */
- WriteDOC(DOC_ECC_RESET, docptr, ECCConf);
- WriteDOC(DOC_ECC_DIS, docptr, ECCConf);
- }
-
- /* treat crossing 256-byte sector for 2M x 8bits devices */
- if (this->page256 && from + len > (from | 0xff) + 1) {
- len256 = (from | 0xff) + 1 - from;
- DoC_ReadBuf(this, buf, len256);
-
- DoC_Command(this, NAND_CMD_READ0, CDSN_CTRL_WP);
- DoC_Address(this, ADDR_COLUMN_PAGE, from + len256,
- CDSN_CTRL_WP, CDSN_CTRL_ECC_IO);
- }
-
- DoC_ReadBuf(this, &buf[len256], len - len256);
-
- /* Let the caller know we completed it */
- *retlen = len;
-
- if (eccbuf) {
- /* Read the ECC data through the DiskOnChip ECC logic */
- /* Note: this will work even with 2M x 8bit devices as */
- /* they have 8 bytes of OOB per 256 page. mf. */
- DoC_ReadBuf(this, eccbuf, 6);
-
- /* Flush the pipeline */
- if (DoC_is_Millennium(this)) {
- dummy = ReadDOC(docptr, ECCConf);
- dummy = ReadDOC(docptr, ECCConf);
- i = ReadDOC(docptr, ECCConf);
- } else {
- dummy = ReadDOC(docptr, 2k_ECCStatus);
- dummy = ReadDOC(docptr, 2k_ECCStatus);
- i = ReadDOC(docptr, 2k_ECCStatus);
- }
-
- /* Check the ECC Status */
- if (i & 0x80) {
- int nb_errors;
- /* There was an ECC error */
-#ifdef ECC_DEBUG
- printf("DiskOnChip ECC Error: Read at %lx\n", (long)from);
-#endif
- /* Read the ECC syndrom through the DiskOnChip ECC logic.
- These syndrome will be all ZERO when there is no error */
- for (i = 0; i < 6; i++) {
- syndrome[i] =
- ReadDOC(docptr, ECCSyndrome0 + i);
- }
- nb_errors = doc_decode_ecc(buf, syndrome);
-
-#ifdef ECC_DEBUG
- printf("Errors corrected: %x\n", nb_errors);
-#endif
- if (nb_errors < 0) {
- /* We return error, but have actually done the read. Not that
- this can be told to user-space, via sys_read(), but at least
- MTD-aware stuff can know about it by checking *retlen */
- printf("ECC Errors at %lx\n", (long)from);
- ret = DOC_EECC;
- }
- }
-
-#ifdef PSYCHO_DEBUG
- printf("ECC DATA at %lxB: %2.2X %2.2X %2.2X %2.2X %2.2X %2.2X\n",
- (long)from, eccbuf[0], eccbuf[1], eccbuf[2],
- eccbuf[3], eccbuf[4], eccbuf[5]);
-#endif
-
- /* disable the ECC engine */
- WriteDOC(DOC_ECC_DIS, docptr , ECCConf);
- }
-
- /* according to 11.4.1, we need to wait for the busy line
- * drop if we read to the end of the page. */
- if(0 == ((from + *retlen) & 0x1ff))
- {
- DoC_WaitReady(this);
- }
-
- return ret;
-}
-
-int doc_write_ecc(struct DiskOnChip* this, loff_t to, size_t len,
- size_t * retlen, const u_char * buf,
- u_char * eccbuf)
-{
- int di; /* Yes, DI is a hangover from when I was disassembling the binary driver */
- unsigned long docptr;
- volatile char dummy;
- int len256 = 0;
- struct Nand *mychip;
-
- docptr = this->virtadr;
-
- /* Don't allow write past end of device */
- if (to >= this->totlen) {
- puts ("Out of flash\n");
- return DOC_EINVAL;
- }
-
- /* Don't allow a single write to cross a 512-byte block boundary */
- if (to + len > ((to | 0x1ff) + 1))
- len = ((to | 0x1ff) + 1) - to;
-
- /* The ECC will not be calculated correctly if less than 512 is written */
- if (len != 0x200 && eccbuf)
- printf("ECC needs a full sector write (adr: %lx size %lx)\n",
- (long) to, (long) len);
-
- /* printf("DoC_Write (adr: %lx size %lx)\n", (long) to, (long) len); */
-
- /* Find the chip which is to be used and select it */
- mychip = &this->chips[shr(to, this->chipshift)];
-
- if (this->curfloor != mychip->floor) {
- DoC_SelectFloor(this, mychip->floor);
- DoC_SelectChip(this, mychip->chip);
- } else if (this->curchip != mychip->chip) {
- DoC_SelectChip(this, mychip->chip);
- }
-
- this->curfloor = mychip->floor;
- this->curchip = mychip->chip;
-
- /* Set device to main plane of flash */
- DoC_Command(this, NAND_CMD_RESET, CDSN_CTRL_WP);
- DoC_Command(this,
- (!this->page256
- && (to & 0x100)) ? NAND_CMD_READ1 : NAND_CMD_READ0,
- CDSN_CTRL_WP);
-
- DoC_Command(this, NAND_CMD_SEQIN, 0);
- DoC_Address(this, ADDR_COLUMN_PAGE, to, 0, CDSN_CTRL_ECC_IO);
-
- if (eccbuf) {
- /* Prime the ECC engine */
- WriteDOC(DOC_ECC_RESET, docptr, ECCConf);
- WriteDOC(DOC_ECC_EN | DOC_ECC_RW, docptr, ECCConf);
- } else {
- /* disable the ECC engine */
- WriteDOC(DOC_ECC_RESET, docptr, ECCConf);
- WriteDOC(DOC_ECC_DIS, docptr, ECCConf);
- }
-
- /* treat crossing 256-byte sector for 2M x 8bits devices */
- if (this->page256 && to + len > (to | 0xff) + 1) {
- len256 = (to | 0xff) + 1 - to;
- DoC_WriteBuf(this, buf, len256);
-
- DoC_Command(this, NAND_CMD_PAGEPROG, 0);
-
- DoC_Command(this, NAND_CMD_STATUS, CDSN_CTRL_WP);
- /* There's an implicit DoC_WaitReady() in DoC_Command */
-
- dummy = ReadDOC(docptr, CDSNSlowIO);
- DoC_Delay(this, 2);
-
- if (ReadDOC_(docptr, this->ioreg) & 1) {
- puts ("Error programming flash\n");
- /* Error in programming */
- *retlen = 0;
- return DOC_EIO;
- }
-
- DoC_Command(this, NAND_CMD_SEQIN, 0);
- DoC_Address(this, ADDR_COLUMN_PAGE, to + len256, 0,
- CDSN_CTRL_ECC_IO);
- }
-
- DoC_WriteBuf(this, &buf[len256], len - len256);
-
- if (eccbuf) {
- WriteDOC(CDSN_CTRL_ECC_IO | CDSN_CTRL_CE, docptr,
- CDSNControl);
-
- if (DoC_is_Millennium(this)) {
- WriteDOC(0, docptr, NOP);
- WriteDOC(0, docptr, NOP);
- WriteDOC(0, docptr, NOP);
- } else {
- WriteDOC_(0, docptr, this->ioreg);
- WriteDOC_(0, docptr, this->ioreg);
- WriteDOC_(0, docptr, this->ioreg);
- }
-
- /* Read the ECC data through the DiskOnChip ECC logic */
- for (di = 0; di < 6; di++) {
- eccbuf[di] = ReadDOC(docptr, ECCSyndrome0 + di);
- }
-
- /* Reset the ECC engine */
- WriteDOC(DOC_ECC_DIS, docptr, ECCConf);
-
-#ifdef PSYCHO_DEBUG
- printf
- ("OOB data at %lx is %2.2X %2.2X %2.2X %2.2X %2.2X %2.2X\n",
- (long) to, eccbuf[0], eccbuf[1], eccbuf[2], eccbuf[3],
- eccbuf[4], eccbuf[5]);
-#endif
- }
-
- DoC_Command(this, NAND_CMD_PAGEPROG, 0);
-
- DoC_Command(this, NAND_CMD_STATUS, CDSN_CTRL_WP);
- /* There's an implicit DoC_WaitReady() in DoC_Command */
-
- dummy = ReadDOC(docptr, CDSNSlowIO);
- DoC_Delay(this, 2);
-
- if (ReadDOC_(docptr, this->ioreg) & 1) {
- puts ("Error programming flash\n");
- /* Error in programming */
- *retlen = 0;
- return DOC_EIO;
- }
-
- /* Let the caller know we completed it */
- *retlen = len;
-
- if (eccbuf) {
- unsigned char x[8];
- size_t dummy;
- int ret;
-
- /* Write the ECC data to flash */
- for (di=0; di<6; di++)
- x[di] = eccbuf[di];
-
- x[6]=0x55;
- x[7]=0x55;
-
- ret = doc_write_oob(this, to, 8, &dummy, x);
- return ret;
- }
- return 0;
-}
-
-int doc_read_oob(struct DiskOnChip* this, loff_t ofs, size_t len,
- size_t * retlen, u_char * buf)
-{
- int len256 = 0, ret;
- unsigned long docptr;
- struct Nand *mychip;
-
- docptr = this->virtadr;
-
- mychip = &this->chips[shr(ofs, this->chipshift)];
-
- if (this->curfloor != mychip->floor) {
- DoC_SelectFloor(this, mychip->floor);
- DoC_SelectChip(this, mychip->chip);
- } else if (this->curchip != mychip->chip) {
- DoC_SelectChip(this, mychip->chip);
- }
- this->curfloor = mychip->floor;
- this->curchip = mychip->chip;
-
- /* update address for 2M x 8bit devices. OOB starts on the second */
- /* page to maintain compatibility with doc_read_ecc. */
- if (this->page256) {
- if (!(ofs & 0x8))
- ofs += 0x100;
- else
- ofs -= 0x8;
- }
-
- DoC_Command(this, NAND_CMD_READOOB, CDSN_CTRL_WP);
- DoC_Address(this, ADDR_COLUMN_PAGE, ofs, CDSN_CTRL_WP, 0);
-
- /* treat crossing 8-byte OOB data for 2M x 8bit devices */
- /* Note: datasheet says it should automaticaly wrap to the */
- /* next OOB block, but it didn't work here. mf. */
- if (this->page256 && ofs + len > (ofs | 0x7) + 1) {
- len256 = (ofs | 0x7) + 1 - ofs;
- DoC_ReadBuf(this, buf, len256);
-
- DoC_Command(this, NAND_CMD_READOOB, CDSN_CTRL_WP);
- DoC_Address(this, ADDR_COLUMN_PAGE, ofs & (~0x1ff),
- CDSN_CTRL_WP, 0);
- }
-
- DoC_ReadBuf(this, &buf[len256], len - len256);
-
- *retlen = len;
- /* Reading the full OOB data drops us off of the end of the page,
- * causing the flash device to go into busy mode, so we need
- * to wait until ready 11.4.1 and Toshiba TC58256FT docs */
-
- ret = DoC_WaitReady(this);
-
- return ret;
-
-}
-
-int doc_write_oob(struct DiskOnChip* this, loff_t ofs, size_t len,
- size_t * retlen, const u_char * buf)
-{
- int len256 = 0;
- unsigned long docptr = this->virtadr;
- struct Nand *mychip = &this->chips[shr(ofs, this->chipshift)];
- volatile int dummy;
-
-#ifdef PSYCHO_DEBUG
- printf("doc_write_oob(%lx, %d): %2.2X %2.2X %2.2X %2.2X ... %2.2X %2.2X .. %2.2X %2.2X\n",
- (long)ofs, len, buf[0], buf[1], buf[2], buf[3],
- buf[8], buf[9], buf[14],buf[15]);
-#endif
-
- /* Find the chip which is to be used and select it */
- if (this->curfloor != mychip->floor) {
- DoC_SelectFloor(this, mychip->floor);
- DoC_SelectChip(this, mychip->chip);
- } else if (this->curchip != mychip->chip) {
- DoC_SelectChip(this, mychip->chip);
- }
- this->curfloor = mychip->floor;
- this->curchip = mychip->chip;
-
- /* disable the ECC engine */
- WriteDOC (DOC_ECC_RESET, docptr, ECCConf);
- WriteDOC (DOC_ECC_DIS, docptr, ECCConf);
-
- /* Reset the chip, see Software Requirement 11.4 item 1. */
- DoC_Command(this, NAND_CMD_RESET, CDSN_CTRL_WP);
-
- /* issue the Read2 command to set the pointer to the Spare Data Area. */
- DoC_Command(this, NAND_CMD_READOOB, CDSN_CTRL_WP);
-
- /* update address for 2M x 8bit devices. OOB starts on the second */
- /* page to maintain compatibility with doc_read_ecc. */
- if (this->page256) {
- if (!(ofs & 0x8))
- ofs += 0x100;
- else
- ofs -= 0x8;
- }
-
- /* issue the Serial Data In command to initial the Page Program process */
- DoC_Command(this, NAND_CMD_SEQIN, 0);
- DoC_Address(this, ADDR_COLUMN_PAGE, ofs, 0, 0);
-
- /* treat crossing 8-byte OOB data for 2M x 8bit devices */
- /* Note: datasheet says it should automaticaly wrap to the */
- /* next OOB block, but it didn't work here. mf. */
- if (this->page256 && ofs + len > (ofs | 0x7) + 1) {
- len256 = (ofs | 0x7) + 1 - ofs;
- DoC_WriteBuf(this, buf, len256);
-
- DoC_Command(this, NAND_CMD_PAGEPROG, 0);
- DoC_Command(this, NAND_CMD_STATUS, 0);
- /* DoC_WaitReady() is implicit in DoC_Command */
-
- dummy = ReadDOC(docptr, CDSNSlowIO);
- DoC_Delay(this, 2);
-
- if (ReadDOC_(docptr, this->ioreg) & 1) {
- puts ("Error programming oob data\n");
- /* There was an error */
- *retlen = 0;
- return DOC_EIO;
- }
- DoC_Command(this, NAND_CMD_SEQIN, 0);
- DoC_Address(this, ADDR_COLUMN_PAGE, ofs & (~0x1ff), 0, 0);
- }
-
- DoC_WriteBuf(this, &buf[len256], len - len256);
-
- DoC_Command(this, NAND_CMD_PAGEPROG, 0);
- DoC_Command(this, NAND_CMD_STATUS, 0);
- /* DoC_WaitReady() is implicit in DoC_Command */
-
- dummy = ReadDOC(docptr, CDSNSlowIO);
- DoC_Delay(this, 2);
-
- if (ReadDOC_(docptr, this->ioreg) & 1) {
- puts ("Error programming oob data\n");
- /* There was an error */
- *retlen = 0;
- return DOC_EIO;
- }
-
- *retlen = len;
- return 0;
-
-}
-
-int doc_erase(struct DiskOnChip* this, loff_t ofs, size_t len)
-{
- volatile int dummy;
- unsigned long docptr;
- struct Nand *mychip;
-
- if (ofs & (this->erasesize-1) || len & (this->erasesize-1)) {
- puts ("Offset and size must be sector aligned\n");
- return DOC_EINVAL;
- }
-
- docptr = this->virtadr;
-
- /* FIXME: Do this in the background. Use timers or schedule_task() */
- while(len) {
- mychip = &this->chips[shr(ofs, this->chipshift)];
-
- if (this->curfloor != mychip->floor) {
- DoC_SelectFloor(this, mychip->floor);
- DoC_SelectChip(this, mychip->chip);
- } else if (this->curchip != mychip->chip) {
- DoC_SelectChip(this, mychip->chip);
- }
- this->curfloor = mychip->floor;
- this->curchip = mychip->chip;
-
- DoC_Command(this, NAND_CMD_ERASE1, 0);
- DoC_Address(this, ADDR_PAGE, ofs, 0, 0);
- DoC_Command(this, NAND_CMD_ERASE2, 0);
-
- DoC_Command(this, NAND_CMD_STATUS, CDSN_CTRL_WP);
-
- dummy = ReadDOC(docptr, CDSNSlowIO);
- DoC_Delay(this, 2);
-
- if (ReadDOC_(docptr, this->ioreg) & 1) {
- printf("Error erasing at 0x%lx\n", (long)ofs);
- /* There was an error */
- goto callback;
- }
- ofs += this->erasesize;
- len -= this->erasesize;
- }
-
- callback:
- return 0;
-}
-
-static inline int doccheck(unsigned long potential, unsigned long physadr)
-{
- unsigned long window=potential;
- unsigned char tmp, ChipID;
-#ifndef DOC_PASSIVE_PROBE
- unsigned char tmp2;
-#endif
-
- /* Routine copied from the Linux DOC driver */
-
-#ifdef CONFIG_SYS_DOCPROBE_55AA
- /* Check for 0x55 0xAA signature at beginning of window,
- this is no longer true once we remove the IPL (for Millennium */
- if (ReadDOC(window, Sig1) != 0x55 || ReadDOC(window, Sig2) != 0xaa)
- return 0;
-#endif /* CONFIG_SYS_DOCPROBE_55AA */
-
-#ifndef DOC_PASSIVE_PROBE
- /* It's not possible to cleanly detect the DiskOnChip - the
- * bootup procedure will put the device into reset mode, and
- * it's not possible to talk to it without actually writing
- * to the DOCControl register. So we store the current contents
- * of the DOCControl register's location, in case we later decide
- * that it's not a DiskOnChip, and want to put it back how we
- * found it.
- */
- tmp2 = ReadDOC(window, DOCControl);
-
- /* Reset the DiskOnChip ASIC */
- WriteDOC(DOC_MODE_CLR_ERR | DOC_MODE_MDWREN | DOC_MODE_RESET,
- window, DOCControl);
- WriteDOC(DOC_MODE_CLR_ERR | DOC_MODE_MDWREN | DOC_MODE_RESET,
- window, DOCControl);
-
- /* Enable the DiskOnChip ASIC */
- WriteDOC(DOC_MODE_CLR_ERR | DOC_MODE_MDWREN | DOC_MODE_NORMAL,
- window, DOCControl);
- WriteDOC(DOC_MODE_CLR_ERR | DOC_MODE_MDWREN | DOC_MODE_NORMAL,
- window, DOCControl);
-#endif /* !DOC_PASSIVE_PROBE */
-
- ChipID = ReadDOC(window, ChipID);
-
- switch (ChipID) {
- case DOC_ChipID_Doc2k:
- /* Check the TOGGLE bit in the ECC register */
- tmp = ReadDOC(window, 2k_ECCStatus) & DOC_TOGGLE_BIT;
- if ((ReadDOC(window, 2k_ECCStatus) & DOC_TOGGLE_BIT) != tmp)
- return ChipID;
- break;
-
- case DOC_ChipID_DocMil:
- /* Check the TOGGLE bit in the ECC register */
- tmp = ReadDOC(window, ECCConf) & DOC_TOGGLE_BIT;
- if ((ReadDOC(window, ECCConf) & DOC_TOGGLE_BIT) != tmp)
- return ChipID;
- break;
-
- default:
-#ifndef CONFIG_SYS_DOCPROBE_55AA
-/*
- * if the ID isn't the DoC2000 or DoCMillenium ID, so we can assume
- * the DOC is missing
- */
-# if 0
- printf("Possible DiskOnChip with unknown ChipID %2.2X found at 0x%lx\n",
- ChipID, physadr);
-# endif
-#endif
-#ifndef DOC_PASSIVE_PROBE
- /* Put back the contents of the DOCControl register, in case it's not
- * actually a DiskOnChip.
- */
- WriteDOC(tmp2, window, DOCControl);
-#endif
- return 0;
- }
-
- puts ("DiskOnChip failed TOGGLE test, dropping.\n");
-
-#ifndef DOC_PASSIVE_PROBE
- /* Put back the contents of the DOCControl register: it's not a DiskOnChip */
- WriteDOC(tmp2, window, DOCControl);
-#endif
- return 0;
-}
-
-void doc_probe(unsigned long physadr)
-{
- struct DiskOnChip *this = NULL;
- int i=0, ChipID;
-
- if ((ChipID = doccheck(physadr, physadr))) {
-
- for (i=0; i<CONFIG_SYS_MAX_DOC_DEVICE; i++) {
- if (doc_dev_desc[i].ChipID == DOC_ChipID_UNKNOWN) {
- this = doc_dev_desc + i;
- break;
- }
- }
-
- if (!this) {
- puts ("Cannot allocate memory for data structures.\n");
- return;
- }
-
- if (curr_device == -1)
- curr_device = i;
-
- memset((char *)this, 0, sizeof(struct DiskOnChip));
-
- this->virtadr = physadr;
- this->physadr = physadr;
- this->ChipID = ChipID;
-
- DoC2k_init(this);
- } else {
- puts ("No DiskOnChip found\n");
- }
-}
-#else
-void doc_probe(unsigned long physadr) {}
-#endif
diff --git a/common/cmd_jffs2.c b/common/cmd_jffs2.c
index 4db4a83aa82b41e7ee1feecbdc010c267c7af73b..372ccb2aa3cba4279ac5475eb2457007bf4d87df 100644
--- a/common/cmd_jffs2.c
+++ b/common/cmd_jffs2.c
@@ -96,12 +96,8 @@
#include <cramfs/cramfs_fs.h>
#if defined(CONFIG_CMD_NAND)
-#ifdef CONFIG_NAND_LEGACY
-#include <linux/mtd/nand_legacy.h>
-#else /* !CONFIG_NAND_LEGACY */
#include <linux/mtd/nand.h>
#include <nand.h>
-#endif /* !CONFIG_NAND_LEGACY */
#endif
#if defined(CONFIG_CMD_ONENAND)
@@ -187,12 +183,7 @@ static int mtd_device_validate(u8 type, u8 num, u32 *size)
} else if (type == MTD_DEV_TYPE_NAND) {
#if defined(CONFIG_JFFS2_NAND) && defined(CONFIG_CMD_NAND)
if (num < CONFIG_SYS_MAX_NAND_DEVICE) {
-#ifndef CONFIG_NAND_LEGACY
*size = nand_info[num].size;
-#else
- extern struct nand_chip nand_dev_desc[CONFIG_SYS_MAX_NAND_DEVICE];
- *size = nand_dev_desc[num].totlen;
-#endif
return 0;
}
@@ -267,17 +258,11 @@ static int mtd_id_parse(const char *id, const char **ret_id, u8 *dev_type, u8 *d
static inline u32 get_part_sector_size_nand(struct mtdids *id)
{
#if defined(CONFIG_JFFS2_NAND) && defined(CONFIG_CMD_NAND)
-#if defined(CONFIG_NAND_LEGACY)
- extern struct nand_chip nand_dev_desc[CONFIG_SYS_MAX_NAND_DEVICE];
-
- return nand_dev_desc[id->num].erasesize;
-#else
nand_info_t *nand;
nand = &nand_info[id->num];
return nand->erasesize;
-#endif
#else
BUG();
return 0;
diff --git a/common/cmd_mtdparts.c b/common/cmd_mtdparts.c
index 2d1446ecb8d5ea9784da8f08e36c4a321dbe8490..665995d16bfffd9470368996c51e8c7fdf10bd04 100644
--- a/common/cmd_mtdparts.c
+++ b/common/cmd_mtdparts.c
@@ -94,12 +94,8 @@
#include <linux/mtd/mtd.h>
#if defined(CONFIG_CMD_NAND)
-#ifdef CONFIG_NAND_LEGACY
-#include <linux/mtd/nand_legacy.h>
-#else /* !CONFIG_NAND_LEGACY */
#include <linux/mtd/nand.h>
#include <nand.h>
-#endif /* !CONFIG_NAND_LEGACY */
#endif
#if defined(CONFIG_CMD_ONENAND)
@@ -462,9 +458,6 @@ static int part_del(struct mtd_device *dev, struct part_info *part)
}
}
-#ifdef CONFIG_NAND_LEGACY
- jffs2_free_cache(part);
-#endif
list_del(&part->link);
free(part);
dev->num_parts--;
@@ -491,9 +484,6 @@ static void part_delall(struct list_head *head)
list_for_each_safe(entry, n, head) {
part_tmp = list_entry(entry, struct part_info, link);
-#ifdef CONFIG_NAND_LEGACY
- jffs2_free_cache(part_tmp);
-#endif
list_del(entry);
free(part_tmp);
}
diff --git a/common/cmd_nand.c b/common/cmd_nand.c
index 2f705212262aa9e5cd981f9b0c8f093acbd32f35..158a55fa705db7534708df308938215b564fa97a 100644
--- a/common/cmd_nand.c
+++ b/common/cmd_nand.c
@@ -11,7 +11,6 @@
#include <common.h>
-#ifndef CONFIG_NAND_LEGACY
/*
*
* New NAND support
@@ -688,414 +687,3 @@ U_BOOT_CMD(nboot, 4, 1, do_nandboot,
"[partition] | [[[loadAddr] dev] offset]"
);
#endif
-
-#else /* CONFIG_NAND_LEGACY */
-/*
- *
- * Legacy NAND support - to be phased out
- *
- */
-#include <command.h>
-#include <malloc.h>
-#include <asm/io.h>
-#include <watchdog.h>
-
-#ifdef CONFIG_show_boot_progress
-# include <status_led.h>
-# define show_boot_progress(arg) show_boot_progress(arg)
-#else
-# define show_boot_progress(arg)
-#endif
-
-#if defined(CONFIG_CMD_NAND)
-#include <linux/mtd/nand_legacy.h>
-#if 0
-#include <linux/mtd/nand_ids.h>
-#include <jffs2/jffs2.h>
-#endif
-
-#ifdef CONFIG_OMAP1510
-void archflashwp(void *archdata, int wp);
-#endif
-
-#define ROUND_DOWN(value,boundary) ((value) & (~((boundary)-1)))
-
-#undef NAND_DEBUG
-#undef PSYCHO_DEBUG
-
-/* ****************** WARNING *********************
- * When ALLOW_ERASE_BAD_DEBUG is non-zero the erase command will
- * erase (or at least attempt to erase) blocks that are marked
- * bad. This can be very handy if you are _sure_ that the block
- * is OK, say because you marked a good block bad to test bad
- * block handling and you are done testing, or if you have
- * accidentally marked blocks bad.
- *
- * Erasing factory marked bad blocks is a _bad_ idea. If the
- * erase succeeds there is no reliable way to find them again,
- * and attempting to program or erase bad blocks can affect
- * the data in _other_ (good) blocks.
- */
-#define ALLOW_ERASE_BAD_DEBUG 0
-
-#define CONFIG_MTD_NAND_ECC /* enable ECC */
-#define CONFIG_MTD_NAND_ECC_JFFS2
-
-/* bits for nand_legacy_rw() `cmd'; or together as needed */
-#define NANDRW_READ 0x01
-#define NANDRW_WRITE 0x00
-#define NANDRW_JFFS2 0x02
-#define NANDRW_JFFS2_SKIP 0x04
-
-/*
- * Imports from nand_legacy.c
- */
-extern struct nand_chip nand_dev_desc[CONFIG_SYS_MAX_NAND_DEVICE];
-extern int curr_device;
-extern int nand_legacy_erase(struct nand_chip *nand, size_t ofs,
- size_t len, int clean);
-extern int nand_legacy_rw(struct nand_chip *nand, int cmd, size_t start,
- size_t len, size_t *retlen, u_char *buf);
-extern void nand_print(struct nand_chip *nand);
-extern void nand_print_bad(struct nand_chip *nand);
-extern int nand_read_oob(struct nand_chip *nand, size_t ofs,
- size_t len, size_t *retlen, u_char *buf);
-extern int nand_write_oob(struct nand_chip *nand, size_t ofs,
- size_t len, size_t *retlen, const u_char *buf);
-
-
-int do_nand (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
-{
- int rcode = 0;
-
- switch (argc) {
- case 0:
- case 1:
- cmd_usage(cmdtp);
- return 1;
- case 2:
- if (strcmp (argv[1], "info") == 0) {
- int i;
-
- putc ('\n');
-
- for (i = 0; i < CONFIG_SYS_MAX_NAND_DEVICE; ++i) {
- if (nand_dev_desc[i].ChipID ==
- NAND_ChipID_UNKNOWN)
- continue; /* list only known devices */
- printf ("Device %d: ", i);
- nand_print (&nand_dev_desc[i]);
- }
- return 0;
-
- } else if (strcmp (argv[1], "device") == 0) {
- if ((curr_device < 0)
- || (curr_device >= CONFIG_SYS_MAX_NAND_DEVICE)) {
- puts ("\nno devices available\n");
- return 1;
- }
- printf ("\nDevice %d: ", curr_device);
- nand_print (&nand_dev_desc[curr_device]);
- return 0;
-
- } else if (strcmp (argv[1], "bad") == 0) {
- if ((curr_device < 0)
- || (curr_device >= CONFIG_SYS_MAX_NAND_DEVICE)) {
- puts ("\nno devices available\n");
- return 1;
- }
- printf ("\nDevice %d bad blocks:\n", curr_device);
- nand_print_bad (&nand_dev_desc[curr_device]);
- return 0;
-
- }
- cmd_usage(cmdtp);
- return 1;
- case 3:
- if (strcmp (argv[1], "device") == 0) {
- int dev = (int) simple_strtoul (argv[2], NULL, 10);
-
- printf ("\nDevice %d: ", dev);
- if (dev >= CONFIG_SYS_MAX_NAND_DEVICE) {
- puts ("unknown device\n");
- return 1;
- }
- nand_print (&nand_dev_desc[dev]);
- /*nand_print (dev); */
-
- if (nand_dev_desc[dev].ChipID == NAND_ChipID_UNKNOWN) {
- return 1;
- }
-
- curr_device = dev;
-
- puts ("... is now current device\n");
-
- return 0;
- } else if (strcmp (argv[1], "erase") == 0
- && strcmp (argv[2], "clean") == 0) {
- struct nand_chip *nand = &nand_dev_desc[curr_device];
- ulong off = 0;
- ulong size = nand->totlen;
- int ret;
-
- printf ("\nNAND erase: device %d offset %ld, size %ld ... ", curr_device, off, size);
-
- ret = nand_legacy_erase (nand, off, size, 1);
-
- printf ("%s\n", ret ? "ERROR" : "OK");
-
- return ret;
- }
-
- cmd_usage(cmdtp);
- return 1;
- default:
- /* at least 4 args */
-
- if (strncmp (argv[1], "read", 4) == 0 ||
- strncmp (argv[1], "write", 5) == 0) {
- ulong addr = simple_strtoul (argv[2], NULL, 16);
- off_t off = simple_strtoul (argv[3], NULL, 16);
- size_t size = simple_strtoul (argv[4], NULL, 16);
- int cmd = (strncmp (argv[1], "read", 4) == 0) ?
- NANDRW_READ : NANDRW_WRITE;
- size_t total;
- int ret;
- char *cmdtail = strchr (argv[1], '.');
-
- if (cmdtail && !strncmp (cmdtail, ".oob", 2)) {
- /* read out-of-band data */
- if (cmd & NANDRW_READ) {
- ret = nand_read_oob (nand_dev_desc + curr_device,
- off, size, &total,
- (u_char *) addr);
- } else {
- ret = nand_write_oob (nand_dev_desc + curr_device,
- off, size, &total,
- (u_char *) addr);
- }
- return ret;
- } else if (cmdtail && !strncmp (cmdtail, ".jffs2s", 7)) {
- cmd |= NANDRW_JFFS2; /* skip bad blocks (on read too) */
- if (cmd & NANDRW_READ)
- cmd |= NANDRW_JFFS2_SKIP; /* skip bad blocks (on read too) */
- } else if (cmdtail && !strncmp (cmdtail, ".jffs2", 2))
- cmd |= NANDRW_JFFS2; /* skip bad blocks */
-#ifdef SXNI855T
- /* need ".e" same as ".j" for compatibility with older units */
- else if (cmdtail && !strcmp (cmdtail, ".e"))
- cmd |= NANDRW_JFFS2; /* skip bad blocks */
-#endif
-#ifdef CONFIG_SYS_NAND_SKIP_BAD_DOT_I
- /* need ".i" same as ".jffs2s" for compatibility with older units (esd) */
- /* ".i" for image -> read skips bad block (no 0xff) */
- else if (cmdtail && !strcmp (cmdtail, ".i")) {
- cmd |= NANDRW_JFFS2; /* skip bad blocks (on read too) */
- if (cmd & NANDRW_READ)
- cmd |= NANDRW_JFFS2_SKIP; /* skip bad blocks (on read too) */
- }
-#endif /* CONFIG_SYS_NAND_SKIP_BAD_DOT_I */
- else if (cmdtail) {
- cmd_usage(cmdtp);
- return 1;
- }
-
- printf ("\nNAND %s: device %d offset %ld, size %lu ...\n",
- (cmd & NANDRW_READ) ? "read" : "write",
- curr_device, off, (ulong)size);
-
- ret = nand_legacy_rw (nand_dev_desc + curr_device,
- cmd, off, size,
- &total, (u_char *) addr);
-
- printf (" %d bytes %s: %s\n", total,
- (cmd & NANDRW_READ) ? "read" : "written",
- ret ? "ERROR" : "OK");
-
- return ret;
- } else if (strcmp (argv[1], "erase") == 0 &&
- (argc == 4 || strcmp ("clean", argv[2]) == 0)) {
- int clean = argc == 5;
- ulong off =
- simple_strtoul (argv[2 + clean], NULL, 16);
- ulong size =
- simple_strtoul (argv[3 + clean], NULL, 16);
- int ret;
-
- printf ("\nNAND erase: device %d offset %ld, size %ld ...\n",
- curr_device, off, size);
-
- ret = nand_legacy_erase (nand_dev_desc + curr_device,
- off, size, clean);
-
- printf ("%s\n", ret ? "ERROR" : "OK");
-
- return ret;
- } else {
- cmd_usage(cmdtp);
- rcode = 1;
- }
-
- return rcode;
- }
-}
-
-U_BOOT_CMD(
- nand, 5, 1, do_nand,
- "legacy NAND sub-system",
- "info - show available NAND devices\n"
- "nand device [dev] - show or set current device\n"
- "nand read[.jffs2[s]] addr off size\n"
- "nand write[.jffs2] addr off size - read/write `size' bytes starting\n"
- " at offset `off' to/from memory address `addr'\n"
- "nand erase [clean] [off size] - erase `size' bytes from\n"
- " offset `off' (entire device if not specified)\n"
- "nand bad - show bad blocks\n"
- "nand read.oob addr off size - read out-of-band data\n"
- "nand write.oob addr off size - read out-of-band data"
-);
-
-int do_nandboot (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
-{
- char *boot_device = NULL;
- char *ep;
- int dev;
- ulong cnt;
- ulong addr;
- ulong offset = 0;
- image_header_t *hdr;
- int rcode = 0;
-#if defined(CONFIG_FIT)
- const void *fit_hdr = NULL;
-#endif
-
- show_boot_progress (52);
- switch (argc) {
- case 1:
- addr = CONFIG_SYS_LOAD_ADDR;
- boot_device = getenv ("bootdevice");
- break;
- case 2:
- addr = simple_strtoul(argv[1], NULL, 16);
- boot_device = getenv ("bootdevice");
- break;
- case 3:
- addr = simple_strtoul(argv[1], NULL, 16);
- boot_device = argv[2];
- break;
- case 4:
- addr = simple_strtoul(argv[1], NULL, 16);
- boot_device = argv[2];
- offset = simple_strtoul(argv[3], NULL, 16);
- break;
- default:
- cmd_usage(cmdtp);
- show_boot_progress (-53);
- return 1;
- }
-
- show_boot_progress (53);
- if (!boot_device) {
- puts ("\n** No boot device **\n");
- show_boot_progress (-54);
- return 1;
- }
- show_boot_progress (54);
-
- dev = simple_strtoul(boot_device, &ep, 16);
-
- if ((dev >= CONFIG_SYS_MAX_NAND_DEVICE) ||
- (nand_dev_desc[dev].ChipID == NAND_ChipID_UNKNOWN)) {
- printf ("\n** Device %d not available\n", dev);
- show_boot_progress (-55);
- return 1;
- }
- show_boot_progress (55);
-
- printf ("\nLoading from device %d: %s at 0x%lx (offset 0x%lx)\n",
- dev, nand_dev_desc[dev].name, nand_dev_desc[dev].IO_ADDR,
- offset);
-
- if (nand_legacy_rw (nand_dev_desc + dev, NANDRW_READ, offset,
- SECTORSIZE, NULL, (u_char *)addr)) {
- printf ("** Read error on %d\n", dev);
- show_boot_progress (-56);
- return 1;
- }
- show_boot_progress (56);
-
- switch (genimg_get_format ((void *)addr)) {
- case IMAGE_FORMAT_LEGACY:
- hdr = (image_header_t *)addr;
- image_print_contents (hdr);
-
- cnt = image_get_image_size (hdr);
- cnt -= SECTORSIZE;
- break;
-#if defined(CONFIG_FIT)
- case IMAGE_FORMAT_FIT:
- fit_hdr = (const void *)addr;
- puts ("Fit image detected...\n");
-
- cnt = fit_get_size (fit_hdr);
- break;
-#endif
- default:
- show_boot_progress (-57);
- puts ("** Unknown image type\n");
- return 1;
- }
- show_boot_progress (57);
-
- if (nand_legacy_rw (nand_dev_desc + dev, NANDRW_READ,
- offset + SECTORSIZE, cnt, NULL,
- (u_char *)(addr+SECTORSIZE))) {
- printf ("** Read error on %d\n", dev);
- show_boot_progress (-58);
- return 1;
- }
- show_boot_progress (58);
-
-#if defined(CONFIG_FIT)
- /* This cannot be done earlier, we need complete FIT image in RAM first */
- if (genimg_get_format ((void *)addr) == IMAGE_FORMAT_FIT) {
- if (!fit_check_format (fit_hdr)) {
- show_boot_progress (-150);
- puts ("** Bad FIT image format\n");
- return 1;
- }
- show_boot_progress (151);
- fit_print_contents (fit_hdr);
- }
-#endif
-
- /* Loading ok, update default load address */
-
- load_addr = addr;
-
- /* Check if we should attempt an auto-start */
- if (((ep = getenv("autostart")) != NULL) && (strcmp(ep,"yes") == 0)) {
- char *local_args[2];
- extern int do_bootm (cmd_tbl_t *, int, int, char *[]);
-
- local_args[0] = argv[0];
- local_args[1] = NULL;
-
- printf ("Automatic boot of image at addr 0x%08lx ...\n", addr);
-
- do_bootm (cmdtp, 0, 1, local_args);
- rcode = 1;
- }
- return rcode;
-}
-
-U_BOOT_CMD(
- nboot, 4, 1, do_nandboot,
- "boot from NAND device",
- "loadAddr dev"
-);
-
-#endif
-
-#endif /* CONFIG_NAND_LEGACY */
diff --git a/common/docecc.c b/common/docecc.c
deleted file mode 100644
index 3412affc795a6b0d319553a4982f8f5991a819b5..0000000000000000000000000000000000000000
--- a/common/docecc.c
+++ /dev/null
@@ -1,513 +0,0 @@
-/*
- * ECC algorithm for M-systems disk on chip. We use the excellent Reed
- * Solmon code of Phil Karn (karn@ka9q.ampr.org) available under the
- * GNU GPL License. The rest is simply to convert the disk on chip
- * syndrom into a standard syndom.
- *
- * Author: Fabrice Bellard (fabrice.bellard@netgem.com)
- * Copyright (C) 2000 Netgem S.A.
- *
- * $Id: docecc.c,v 1.4 2001/10/02 15:05:13 dwmw2 Exp $
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
- */
-
-#include <config.h>
-#include <common.h>
-#include <malloc.h>
-
-#undef ECC_DEBUG
-#undef PSYCHO_DEBUG
-
-#include <linux/mtd/doc2000.h>
-
-/* need to undef it (from asm/termbits.h) */
-#undef B0
-
-#define MM 10 /* Symbol size in bits */
-#define KK (1023-4) /* Number of data symbols per block */
-#define B0 510 /* First root of generator polynomial, alpha form */
-#define PRIM 1 /* power of alpha used to generate roots of generator poly */
-#define NN ((1 << MM) - 1)
-
-typedef unsigned short dtype;
-
-/* 1+x^3+x^10 */
-static const int Pp[MM+1] = { 1, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1 };
-
-/* This defines the type used to store an element of the Galois Field
- * used by the code. Make sure this is something larger than a char if
- * if anything larger than GF(256) is used.
- *
- * Note: unsigned char will work up to GF(256) but int seems to run
- * faster on the Pentium.
- */
-typedef int gf;
-
-/* No legal value in index form represents zero, so
- * we need a special value for this purpose
- */
-#define A0 (NN)
-
-/* Compute x % NN, where NN is 2**MM - 1,
- * without a slow divide
- */
-static inline gf
-modnn(int x)
-{
- while (x >= NN) {
- x -= NN;
- x = (x >> MM) + (x & NN);
- }
- return x;
-}
-
-#define CLEAR(a,n) {\
-int ci;\
-for(ci=(n)-1;ci >=0;ci--)\
-(a)[ci] = 0;\
-}
-
-#define COPY(a,b,n) {\
-int ci;\
-for(ci=(n)-1;ci >=0;ci--)\
-(a)[ci] = (b)[ci];\
-}
-
-#define COPYDOWN(a,b,n) {\
-int ci;\
-for(ci=(n)-1;ci >=0;ci--)\
-(a)[ci] = (b)[ci];\
-}
-
-#define Ldec 1
-
-/* generate GF(2**m) from the irreducible polynomial p(X) in Pp[0]..Pp[m]
- lookup tables: index->polynomial form alpha_to[] contains j=alpha**i;
- polynomial form -> index form index_of[j=alpha**i] = i
- alpha=2 is the primitive element of GF(2**m)
- HARI's COMMENT: (4/13/94) alpha_to[] can be used as follows:
- Let @ represent the primitive element commonly called "alpha" that
- is the root of the primitive polynomial p(x). Then in GF(2^m), for any
- 0 <= i <= 2^m-2,
- @^i = a(0) + a(1) @ + a(2) @^2 + ... + a(m-1) @^(m-1)
- where the binary vector (a(0),a(1),a(2),...,a(m-1)) is the representation
- of the integer "alpha_to[i]" with a(0) being the LSB and a(m-1) the MSB. Thus for
- example the polynomial representation of @^5 would be given by the binary
- representation of the integer "alpha_to[5]".
- Similarily, index_of[] can be used as follows:
- As above, let @ represent the primitive element of GF(2^m) that is
- the root of the primitive polynomial p(x). In order to find the power
- of @ (alpha) that has the polynomial representation
- a(0) + a(1) @ + a(2) @^2 + ... + a(m-1) @^(m-1)
- we consider the integer "i" whose binary representation with a(0) being LSB
- and a(m-1) MSB is (a(0),a(1),...,a(m-1)) and locate the entry
- "index_of[i]". Now, @^index_of[i] is that element whose polynomial
- representation is (a(0),a(1),a(2),...,a(m-1)).
- NOTE:
- The element alpha_to[2^m-1] = 0 always signifying that the
- representation of "@^infinity" = 0 is (0,0,0,...,0).
- Similarily, the element index_of[0] = A0 always signifying
- that the power of alpha which has the polynomial representation
- (0,0,...,0) is "infinity".
-
-*/
-
-static void
-generate_gf(dtype Alpha_to[NN + 1], dtype Index_of[NN + 1])
-{
- register int i, mask;
-
- mask = 1;
- Alpha_to[MM] = 0;
- for (i = 0; i < MM; i++) {
- Alpha_to[i] = mask;
- Index_of[Alpha_to[i]] = i;
- /* If Pp[i] == 1 then, term @^i occurs in poly-repr of @^MM */
- if (Pp[i] != 0)
- Alpha_to[MM] ^= mask; /* Bit-wise EXOR operation */
- mask <<= 1; /* single left-shift */
- }
- Index_of[Alpha_to[MM]] = MM;
- /*
- * Have obtained poly-repr of @^MM. Poly-repr of @^(i+1) is given by
- * poly-repr of @^i shifted left one-bit and accounting for any @^MM
- * term that may occur when poly-repr of @^i is shifted.
- */
- mask >>= 1;
- for (i = MM + 1; i < NN; i++) {
- if (Alpha_to[i - 1] >= mask)
- Alpha_to[i] = Alpha_to[MM] ^ ((Alpha_to[i - 1] ^ mask) << 1);
- else
- Alpha_to[i] = Alpha_to[i - 1] << 1;
- Index_of[Alpha_to[i]] = i;
- }
- Index_of[0] = A0;
- Alpha_to[NN] = 0;
-}
-
-/*
- * Performs ERRORS+ERASURES decoding of RS codes. bb[] is the content
- * of the feedback shift register after having processed the data and
- * the ECC.
- *
- * Return number of symbols corrected, or -1 if codeword is illegal
- * or uncorrectable. If eras_pos is non-null, the detected error locations
- * are written back. NOTE! This array must be at least NN-KK elements long.
- * The corrected data are written in eras_val[]. They must be xor with the data
- * to retrieve the correct data : data[erase_pos[i]] ^= erase_val[i] .
- *
- * First "no_eras" erasures are declared by the calling program. Then, the
- * maximum # of errors correctable is t_after_eras = floor((NN-KK-no_eras)/2).
- * If the number of channel errors is not greater than "t_after_eras" the
- * transmitted codeword will be recovered. Details of algorithm can be found
- * in R. Blahut's "Theory ... of Error-Correcting Codes".
-
- * Warning: the eras_pos[] array must not contain duplicate entries; decoder failure
- * will result. The decoder *could* check for this condition, but it would involve
- * extra time on every decoding operation.
- * */
-static int
-eras_dec_rs(dtype Alpha_to[NN + 1], dtype Index_of[NN + 1],
- gf bb[NN - KK + 1], gf eras_val[NN-KK], int eras_pos[NN-KK],
- int no_eras)
-{
- int deg_lambda, el, deg_omega;
- int i, j, r,k;
- gf u,q,tmp,num1,num2,den,discr_r;
- gf lambda[NN-KK + 1], s[NN-KK + 1]; /* Err+Eras Locator poly
- * and syndrome poly */
- gf b[NN-KK + 1], t[NN-KK + 1], omega[NN-KK + 1];
- gf root[NN-KK], reg[NN-KK + 1], loc[NN-KK];
- int syn_error, count;
-
- syn_error = 0;
- for(i=0;i<NN-KK;i++)
- syn_error |= bb[i];
-
- if (!syn_error) {
- /* if remainder is zero, data[] is a codeword and there are no
- * errors to correct. So return data[] unmodified
- */
- count = 0;
- goto finish;
- }
-
- for(i=1;i<=NN-KK;i++){
- s[i] = bb[0];
- }
- for(j=1;j<NN-KK;j++){
- if(bb[j] == 0)
- continue;
- tmp = Index_of[bb[j]];
-
- for(i=1;i<=NN-KK;i++)
- s[i] ^= Alpha_to[modnn(tmp + (B0+i-1)*PRIM*j)];
- }
-
- /* undo the feedback register implicit multiplication and convert
- syndromes to index form */
-
- for(i=1;i<=NN-KK;i++) {
- tmp = Index_of[s[i]];
- if (tmp != A0)
- tmp = modnn(tmp + 2 * KK * (B0+i-1)*PRIM);
- s[i] = tmp;
- }
-
- CLEAR(&lambda[1],NN-KK);
- lambda[0] = 1;
-
- if (no_eras > 0) {
- /* Init lambda to be the erasure locator polynomial */
- lambda[1] = Alpha_to[modnn(PRIM * eras_pos[0])];
- for (i = 1; i < no_eras; i++) {
- u = modnn(PRIM*eras_pos[i]);
- for (j = i+1; j > 0; j--) {
- tmp = Index_of[lambda[j - 1]];
- if(tmp != A0)
- lambda[j] ^= Alpha_to[modnn(u + tmp)];
- }
- }
-#ifdef ECC_DEBUG
- /* Test code that verifies the erasure locator polynomial just constructed
- Needed only for decoder debugging. */
-
- /* find roots of the erasure location polynomial */
- for(i=1;i<=no_eras;i++)
- reg[i] = Index_of[lambda[i]];
- count = 0;
- for (i = 1,k=NN-Ldec; i <= NN; i++,k = modnn(NN+k-Ldec)) {
- q = 1;
- for (j = 1; j <= no_eras; j++)
- if (reg[j] != A0) {
- reg[j] = modnn(reg[j] + j);
- q ^= Alpha_to[reg[j]];
- }
- if (q != 0)
- continue;
- /* store root and error location number indices */
- root[count] = i;
- loc[count] = k;
- count++;
- }
- if (count != no_eras) {
- printf("\n lambda(x) is WRONG\n");
- count = -1;
- goto finish;
- }
-#ifdef PSYCHO_DEBUG
- printf("\n Erasure positions as determined by roots of Eras Loc Poly:\n");
- for (i = 0; i < count; i++)
- printf("%d ", loc[i]);
- printf("\n");
-#endif
-#endif
- }
- for(i=0;i<NN-KK+1;i++)
- b[i] = Index_of[lambda[i]];
-
- /*
- * Begin Berlekamp-Massey algorithm to determine error+erasure
- * locator polynomial
- */
- r = no_eras;
- el = no_eras;
- while (++r <= NN-KK) { /* r is the step number */
- /* Compute discrepancy at the r-th step in poly-form */
- discr_r = 0;
- for (i = 0; i < r; i++){
- if ((lambda[i] != 0) && (s[r - i] != A0)) {
- discr_r ^= Alpha_to[modnn(Index_of[lambda[i]] + s[r - i])];
- }
- }
- discr_r = Index_of[discr_r]; /* Index form */
- if (discr_r == A0) {
- /* 2 lines below: B(x) <-- x*B(x) */
- COPYDOWN(&b[1],b,NN-KK);
- b[0] = A0;
- } else {
- /* 7 lines below: T(x) <-- lambda(x) - discr_r*x*b(x) */
- t[0] = lambda[0];
- for (i = 0 ; i < NN-KK; i++) {
- if(b[i] != A0)
- t[i+1] = lambda[i+1] ^ Alpha_to[modnn(discr_r + b[i])];
- else
- t[i+1] = lambda[i+1];
- }
- if (2 * el <= r + no_eras - 1) {
- el = r + no_eras - el;
- /*
- * 2 lines below: B(x) <-- inv(discr_r) *
- * lambda(x)
- */
- for (i = 0; i <= NN-KK; i++)
- b[i] = (lambda[i] == 0) ? A0 : modnn(Index_of[lambda[i]] - discr_r + NN);
- } else {
- /* 2 lines below: B(x) <-- x*B(x) */
- COPYDOWN(&b[1],b,NN-KK);
- b[0] = A0;
- }
- COPY(lambda,t,NN-KK+1);
- }
- }
-
- /* Convert lambda to index form and compute deg(lambda(x)) */
- deg_lambda = 0;
- for(i=0;i<NN-KK+1;i++){
- lambda[i] = Index_of[lambda[i]];
- if(lambda[i] != A0)
- deg_lambda = i;
- }
- /*
- * Find roots of the error+erasure locator polynomial by Chien
- * Search
- */
- COPY(®[1],&lambda[1],NN-KK);
- count = 0; /* Number of roots of lambda(x) */
- for (i = 1,k=NN-Ldec; i <= NN; i++,k = modnn(NN+k-Ldec)) {
- q = 1;
- for (j = deg_lambda; j > 0; j--){
- if (reg[j] != A0) {
- reg[j] = modnn(reg[j] + j);
- q ^= Alpha_to[reg[j]];
- }
- }
- if (q != 0)
- continue;
- /* store root (index-form) and error location number */
- root[count] = i;
- loc[count] = k;
- /* If we've already found max possible roots,
- * abort the search to save time
- */
- if(++count == deg_lambda)
- break;
- }
- if (deg_lambda != count) {
- /*
- * deg(lambda) unequal to number of roots => uncorrectable
- * error detected
- */
- count = -1;
- goto finish;
- }
- /*
- * Compute err+eras evaluator poly omega(x) = s(x)*lambda(x) (modulo
- * x**(NN-KK)). in index form. Also find deg(omega).
- */
- deg_omega = 0;
- for (i = 0; i < NN-KK;i++){
- tmp = 0;
- j = (deg_lambda < i) ? deg_lambda : i;
- for(;j >= 0; j--){
- if ((s[i + 1 - j] != A0) && (lambda[j] != A0))
- tmp ^= Alpha_to[modnn(s[i + 1 - j] + lambda[j])];
- }
- if(tmp != 0)
- deg_omega = i;
- omega[i] = Index_of[tmp];
- }
- omega[NN-KK] = A0;
-
- /*
- * Compute error values in poly-form. num1 = omega(inv(X(l))), num2 =
- * inv(X(l))**(B0-1) and den = lambda_pr(inv(X(l))) all in poly-form
- */
- for (j = count-1; j >=0; j--) {
- num1 = 0;
- for (i = deg_omega; i >= 0; i--) {
- if (omega[i] != A0)
- num1 ^= Alpha_to[modnn(omega[i] + i * root[j])];
- }
- num2 = Alpha_to[modnn(root[j] * (B0 - 1) + NN)];
- den = 0;
-
- /* lambda[i+1] for i even is the formal derivative lambda_pr of lambda[i] */
- for (i = min(deg_lambda,NN-KK-1) & ~1; i >= 0; i -=2) {
- if(lambda[i+1] != A0)
- den ^= Alpha_to[modnn(lambda[i+1] + i * root[j])];
- }
- if (den == 0) {
-#ifdef ECC_DEBUG
- printf("\n ERROR: denominator = 0\n");
-#endif
- /* Convert to dual- basis */
- count = -1;
- goto finish;
- }
- /* Apply error to data */
- if (num1 != 0) {
- eras_val[j] = Alpha_to[modnn(Index_of[num1] + Index_of[num2] + NN - Index_of[den])];
- } else {
- eras_val[j] = 0;
- }
- }
- finish:
- for(i=0;i<count;i++)
- eras_pos[i] = loc[i];
- return count;
-}
-
-/***************************************************************************/
-/* The DOC specific code begins here */
-
-#define SECTOR_SIZE 512
-/* The sector bytes are packed into NB_DATA MM bits words */
-#define NB_DATA (((SECTOR_SIZE + 1) * 8 + 6) / MM)
-
-/*
- * Correct the errors in 'sector[]' by using 'ecc1[]' which is the
- * content of the feedback shift register applyied to the sector and
- * the ECC. Return the number of errors corrected (and correct them in
- * sector), or -1 if error
- */
-int doc_decode_ecc(unsigned char sector[SECTOR_SIZE], unsigned char ecc1[6])
-{
- int parity, i, nb_errors;
- gf bb[NN - KK + 1];
- gf error_val[NN-KK];
- int error_pos[NN-KK], pos, bitpos, index, val;
- dtype *Alpha_to, *Index_of;
-
- /* init log and exp tables here to save memory. However, it is slower */
- Alpha_to = malloc((NN + 1) * sizeof(dtype));
- if (!Alpha_to)
- return -1;
-
- Index_of = malloc((NN + 1) * sizeof(dtype));
- if (!Index_of) {
- free(Alpha_to);
- return -1;
- }
-
- generate_gf(Alpha_to, Index_of);
-
- parity = ecc1[1];
-
- bb[0] = (ecc1[4] & 0xff) | ((ecc1[5] & 0x03) << 8);
- bb[1] = ((ecc1[5] & 0xfc) >> 2) | ((ecc1[2] & 0x0f) << 6);
- bb[2] = ((ecc1[2] & 0xf0) >> 4) | ((ecc1[3] & 0x3f) << 4);
- bb[3] = ((ecc1[3] & 0xc0) >> 6) | ((ecc1[0] & 0xff) << 2);
-
- nb_errors = eras_dec_rs(Alpha_to, Index_of, bb,
- error_val, error_pos, 0);
- if (nb_errors <= 0)
- goto the_end;
-
- /* correct the errors */
- for(i=0;i<nb_errors;i++) {
- pos = error_pos[i];
- if (pos >= NB_DATA && pos < KK) {
- nb_errors = -1;
- goto the_end;
- }
- if (pos < NB_DATA) {
- /* extract bit position (MSB first) */
- pos = 10 * (NB_DATA - 1 - pos) - 6;
- /* now correct the following 10 bits. At most two bytes
- can be modified since pos is even */
- index = (pos >> 3) ^ 1;
- bitpos = pos & 7;
- if ((index >= 0 && index < SECTOR_SIZE) ||
- index == (SECTOR_SIZE + 1)) {
- val = error_val[i] >> (2 + bitpos);
- parity ^= val;
- if (index < SECTOR_SIZE)
- sector[index] ^= val;
- }
- index = ((pos >> 3) + 1) ^ 1;
- bitpos = (bitpos + 10) & 7;
- if (bitpos == 0)
- bitpos = 8;
- if ((index >= 0 && index < SECTOR_SIZE) ||
- index == (SECTOR_SIZE + 1)) {
- val = error_val[i] << (8 - bitpos);
- parity ^= val;
- if (index < SECTOR_SIZE)
- sector[index] ^= val;
- }
- }
- }
-
- /* use parity to test extra errors */
- if ((parity & 0xff) != 0)
- nb_errors = -1;
-
- the_end:
- free(Alpha_to);
- free(Index_of);
- return nb_errors;
-}
diff --git a/common/env_nand.c b/common/env_nand.c
index 90a1c454720ae4fe5ad483cf78cddbba5b4194ec..8052fb79e58cd8bc313664ae813331067eb55dd2 100644
--- a/common/env_nand.c
+++ b/common/env_nand.c
@@ -57,10 +57,6 @@
#define CONFIG_ENV_RANGE CONFIG_ENV_SIZE
#endif
-int nand_legacy_rw (struct nand_chip* nand, int cmd,
- size_t start, size_t len,
- size_t * retlen, u_char * buf);
-
/* references to names in env_common.c */
extern uchar default_environment[];
extern int default_environment_size;
diff --git a/common/env_onenand.c b/common/env_onenand.c
index 48089a9603833f055726a0b4cbc35f2420ac8521..476fdbce2252a6e34e150d4244efbcd049f0de68 100644
--- a/common/env_onenand.c
+++ b/common/env_onenand.c
@@ -1,5 +1,5 @@
/*
- * (C) Copyright 2005-2007 Samsung Electronics
+ * (C) Copyright 2005-2009 Samsung Electronics
* Kyungmin Park <kyungmin.park@samsung.com>
*
* See file CREDITS for list of people who contributed to this
@@ -37,15 +37,16 @@ extern struct onenand_chip onenand_chip;
/* References to names in env_common.c */
extern uchar default_environment[];
-#define ONENAND_ENV_SIZE(mtd) (mtd.writesize - ENV_HEADER_SIZE)
-
char *env_name_spec = "OneNAND";
+#define ONENAND_MAX_ENV_SIZE 4096
+#define ONENAND_ENV_SIZE(mtd) (ONENAND_MAX_ENV_SIZE - ENV_HEADER_SIZE)
+
#ifdef ENV_IS_EMBEDDED
extern uchar environment[];
env_t *env_ptr = (env_t *) (&environment[0]);
#else /* ! ENV_IS_EMBEDDED */
-static unsigned char onenand_env[MAX_ONENAND_PAGESIZE];
+static unsigned char onenand_env[ONENAND_MAX_ENV_SIZE];
env_t *env_ptr = (env_t *) onenand_env;
#endif /* ENV_IS_EMBEDDED */
@@ -58,6 +59,7 @@ uchar env_get_char_spec(int index)
void env_relocate_spec(void)
{
+ struct mtd_info *mtd = &onenand_mtd;
loff_t env_addr;
int use_default = 0;
size_t retlen;
@@ -65,22 +67,21 @@ void env_relocate_spec(void)
env_addr = CONFIG_ENV_ADDR;
/* Check OneNAND exist */
- if (onenand_mtd.writesize)
+ if (mtd->writesize)
/* Ignore read fail */
- onenand_read(&onenand_mtd, env_addr, onenand_mtd.writesize,
+ mtd->read(mtd, env_addr, ONENAND_MAX_ENV_SIZE,
&retlen, (u_char *) env_ptr);
else
- onenand_mtd.writesize = MAX_ONENAND_PAGESIZE;
+ mtd->writesize = MAX_ONENAND_PAGESIZE;
- if (crc32(0, env_ptr->data, ONENAND_ENV_SIZE(onenand_mtd)) !=
- env_ptr->crc)
+ if (crc32(0, env_ptr->data, ONENAND_ENV_SIZE(mtd)) != env_ptr->crc)
use_default = 1;
if (use_default) {
memcpy(env_ptr->data, default_environment,
- ONENAND_ENV_SIZE(onenand_mtd));
+ ONENAND_ENV_SIZE(mtd));
env_ptr->crc =
- crc32(0, env_ptr->data, ONENAND_ENV_SIZE(onenand_mtd));
+ crc32(0, env_ptr->data, ONENAND_ENV_SIZE(mtd));
}
gd->env_addr = (ulong) & env_ptr->data;
@@ -89,7 +90,8 @@ void env_relocate_spec(void)
int saveenv(void)
{
- unsigned long env_addr = CONFIG_ENV_ADDR;
+ struct mtd_info *mtd = &onenand_mtd;
+ loff_t env_addr = CONFIG_ENV_ADDR;
struct erase_info instr = {
.callback = NULL,
};
@@ -97,17 +99,16 @@ int saveenv(void)
instr.len = CONFIG_ENV_SIZE;
instr.addr = env_addr;
- instr.mtd = &onenand_mtd;
- if (onenand_erase(&onenand_mtd, &instr)) {
+ instr.mtd = mtd;
+ if (mtd->erase(mtd, &instr)) {
printf("OneNAND: erase failed at 0x%08lx\n", env_addr);
return 1;
}
/* update crc */
- env_ptr->crc =
- crc32(0, env_ptr->data, ONENAND_ENV_SIZE(onenand_mtd));
+ env_ptr->crc = crc32(0, env_ptr->data, ONENAND_ENV_SIZE(mtd));
- if (onenand_write(&onenand_mtd, env_addr, onenand_mtd.writesize, &retlen,
+ if (mtd->write(mtd, env_addr, ONENAND_MAX_ENV_SIZE, &retlen,
(u_char *) env_ptr)) {
printf("OneNAND: write failed at 0x%llx\n", instr.addr);
return 2;
diff --git a/cpu/ppc4xx/Makefile b/cpu/ppc4xx/Makefile
index 96ab5c6a42a50de5492c25f92b11ad764194cb67..6f52dfd14f59fa8e7aecf865c21cd43466e09b95 100644
--- a/cpu/ppc4xx/Makefile
+++ b/cpu/ppc4xx/Makefile
@@ -51,7 +51,6 @@ COBJS += fdt.o
COBJS += i2c.o
COBJS += interrupts.o
COBJS += iop480_uart.o
-COBJS += ndfc.o
COBJS += sdram.o
COBJS += speed.o
COBJS += tlb.o
diff --git a/doc/README.nand b/doc/README.nand
index b077d9ab3b77f9aed6a1c731a7bd1e94359bc528..8eedb6c4d70a1e417a0677ed487ded7f6239c961 100644
--- a/doc/README.nand
+++ b/doc/README.nand
@@ -105,8 +105,7 @@ NOTE:
=====
The current NAND implementation is based on what is in recent
-Linux kernels. The old legacy implementation has been disabled,
-and will be removed soon.
+Linux kernels. The old legacy implementation has been removed.
If you have board code which used CONFIG_NAND_LEGACY, you'll need
to convert to the current NAND interface for it to continue to work.
diff --git a/doc/feature-removal-schedule.txt b/doc/feature-removal-schedule.txt
index 9bbdc0a83226aa1158ddd73d253e4742c0124159..0238d97d2f1779739cf169e1b002824d09a27065 100644
--- a/doc/feature-removal-schedule.txt
+++ b/doc/feature-removal-schedule.txt
@@ -56,11 +56,3 @@ Why: Over time, a couple of files have sneaked in into the U-Boot
for an old and probably incomplete list of such files.
Who: Wolfgang Denk <wd@denx.de> and board maintainers
-
----------------------------
-
-What: Legacy NAND code
-When: April 2009
-Why: Legacy NAND code is deprecated. Similar functionality exists in
- more recent NAND code ported from the Linux kernel.
-Who: Scott Wood <scottwood@freescale.com>
diff --git a/drivers/mtd/nand/Makefile b/drivers/mtd/nand/Makefile
index a5680e80ee55256378ad5410ade4ddc83ca9a49a..89ccec28029d9e4b65cc2de9493d9f1eee39c090 100644
--- a/drivers/mtd/nand/Makefile
+++ b/drivers/mtd/nand/Makefile
@@ -26,14 +26,12 @@ include $(TOPDIR)/config.mk
LIB := $(obj)libnand.a
ifdef CONFIG_CMD_NAND
-ifndef CONFIG_NAND_LEGACY
COBJS-y += nand.o
COBJS-y += nand_base.o
COBJS-y += nand_bbt.o
COBJS-y += nand_ecc.o
COBJS-y += nand_ids.o
COBJS-y += nand_util.o
-endif
COBJS-$(CONFIG_NAND_ATMEL) += atmel_nand.o
COBJS-$(CONFIG_DRIVER_NAND_BFIN) += bfin_nand.o
@@ -42,6 +40,7 @@ COBJS-$(CONFIG_NAND_FSL_ELBC) += fsl_elbc_nand.o
COBJS-$(CONFIG_NAND_FSL_UPM) += fsl_upm.o
COBJS-$(CONFIG_NAND_KIRKWOOD) += kirkwood_nand.o
COBJS-$(CONFIG_NAND_MPC5121_NFC) += mpc5121_nfc.o
+COBJS-$(CONFIG_NAND_NDFC) += ndfc.o
COBJS-$(CONFIG_NAND_NOMADIK) += nomadik.o
COBJS-$(CONFIG_NAND_S3C2410) += s3c2410_nand.o
COBJS-$(CONFIG_NAND_S3C64XX) += s3c64xx.o
diff --git a/drivers/mtd/nand/davinci_nand.c b/drivers/mtd/nand/davinci_nand.c
index ca40c6ac0977fe214cbbe4c2763c821d6804dc1c..7837a8e3275239ce3053388b158fdc2ca4b00f3a 100644
--- a/drivers/mtd/nand/davinci_nand.c
+++ b/drivers/mtd/nand/davinci_nand.c
@@ -182,7 +182,7 @@ static void nand_flash_init(void)
* knowledge of the clocks and what devices are hooked up ... and
* don't even do that unless no UBL handled it.
*/
-#ifdef CONFIG_SOC_DM6446
+#ifdef CONFIG_SOC_DM644X
u_int32_t acfg1 = 0x3ffffffc;
/*------------------------------------------------------------------*
diff --git a/drivers/mtd/nand/diskonchip.c b/drivers/mtd/nand/diskonchip.c
index e9dc4d1fd5d6412d18b3e20bfa0dc51c25bd24cd..edf3a099ba78d7148563e7328cf81e9251c1d0b0 100644
--- a/drivers/mtd/nand/diskonchip.c
+++ b/drivers/mtd/nand/diskonchip.c
@@ -19,8 +19,6 @@
#include <common.h>
-#if !defined(CONFIG_NAND_LEGACY)
-
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/sched.h>
@@ -1779,4 +1777,3 @@ module_exit(cleanup_nanddoc);
MODULE_LICENSE("GPL");
MODULE_AUTHOR("David Woodhouse <dwmw2@infradead.org>");
MODULE_DESCRIPTION("M-Systems DiskOnChip 2000, Millennium and Millennium Plus device driver\n");
-#endif
diff --git a/drivers/mtd/nand/nand_util.c b/drivers/mtd/nand/nand_util.c
index fc16282c2e1c9d6f127b83c70efd28ea22576889..694ead68a16d90c9370b882e01b35b904254e226 100644
--- a/drivers/mtd/nand/nand_util.c
+++ b/drivers/mtd/nand/nand_util.c
@@ -567,10 +567,10 @@ int nand_read_skip_bad(nand_info_t *nand, loff_t offset, size_t *length,
if (len_incl_bad == *length) {
rval = nand_read (nand, offset, length, buffer);
- if (rval != 0)
- printf ("NAND read from offset %llx failed %d\n",
- offset, rval);
-
+ if (!rval || rval == -EUCLEAN)
+ return 0;
+ printf ("NAND read from offset %llx failed %d\n",
+ offset, rval);
return rval;
}
@@ -591,7 +591,7 @@ int nand_read_skip_bad(nand_info_t *nand, loff_t offset, size_t *length,
read_length = nand->erasesize - block_offset;
rval = nand_read (nand, offset, &read_length, p_buffer);
- if (rval != 0) {
+ if (rval && rval != -EUCLEAN) {
printf ("NAND read from offset %llx failed %d\n",
offset, rval);
*length -= left_to_read;
diff --git a/cpu/ppc4xx/ndfc.c b/drivers/mtd/nand/ndfc.c
similarity index 98%
rename from cpu/ppc4xx/ndfc.c
rename to drivers/mtd/nand/ndfc.c
index 971e2ae6c73e4e6ff53cc2dd29ea604772584e77..528b22b49aeb32ec2a57720d385a080c12bd9a8d 100644
--- a/cpu/ppc4xx/ndfc.c
+++ b/drivers/mtd/nand/ndfc.c
@@ -30,10 +30,6 @@
*/
#include <common.h>
-
-#if defined(CONFIG_CMD_NAND) && !defined(CONFIG_NAND_LEGACY) && \
- defined(CONFIG_NAND_NDFC)
-
#include <nand.h>
#include <linux/mtd/ndfc.h>
#include <linux/mtd/nand_ecc.h>
@@ -219,5 +215,3 @@ int board_nand_init(struct nand_chip *nand)
return 0;
}
-
-#endif
diff --git a/drivers/mtd/nand_legacy/Makefile b/drivers/mtd/nand_legacy/Makefile
deleted file mode 100644
index a1a9cc92b593c65eb3ef79d76b7636f3d26ebec1..0000000000000000000000000000000000000000
--- a/drivers/mtd/nand_legacy/Makefile
+++ /dev/null
@@ -1,48 +0,0 @@
-#
-# (C) Copyright 2006
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-include $(TOPDIR)/config.mk
-
-LIB := $(obj)libnand_legacy.a
-
-ifdef CONFIG_CMD_NAND
-COBJS-$(CONFIG_NAND_LEGACY) := nand_legacy.o
-endif
-
-COBJS := $(COBJS-y)
-SRCS := $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-
-all: $(LIB)
-
-$(LIB): $(obj).depend $(OBJS)
- $(AR) $(ARFLAGS) $@ $(OBJS)
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
diff --git a/drivers/mtd/nand_legacy/nand_legacy.c b/drivers/mtd/nand_legacy/nand_legacy.c
deleted file mode 100644
index d9ae9c78bab0af8241639e098c1b1cae2ea04b78..0000000000000000000000000000000000000000
--- a/drivers/mtd/nand_legacy/nand_legacy.c
+++ /dev/null
@@ -1,1610 +0,0 @@
-/*
- * (C) 2006 Denx
- * Driver for NAND support, Rick Bronson
- * borrowed heavily from:
- * (c) 1999 Machine Vision Holdings, Inc.
- * (c) 1999, 2000 David Woodhouse <dwmw2@infradead.org>
- *
- * Added 16-bit nand support
- * (C) 2004 Texas Instruments
- */
-
-#include <common.h>
-#include <command.h>
-#include <malloc.h>
-#include <asm/io.h>
-#include <watchdog.h>
-#include <linux/mtd/nand_legacy.h>
-#include <linux/mtd/nand_ids.h>
-#include <jffs2/jffs2.h>
-
-#error Legacy NAND is deprecated. Please convert to the current NAND interface.
-#error This code will be removed outright in the next release.
-
-#ifdef CONFIG_OMAP1510
-void archflashwp(void *archdata, int wp);
-#endif
-
-#define ROUND_DOWN(value,boundary) ((value) & (~((boundary)-1)))
-
-#undef PSYCHO_DEBUG
-#undef NAND_DEBUG
-
-/* ****************** WARNING *********************
- * When ALLOW_ERASE_BAD_DEBUG is non-zero the erase command will
- * erase (or at least attempt to erase) blocks that are marked
- * bad. This can be very handy if you are _sure_ that the block
- * is OK, say because you marked a good block bad to test bad
- * block handling and you are done testing, or if you have
- * accidentally marked blocks bad.
- *
- * Erasing factory marked bad blocks is a _bad_ idea. If the
- * erase succeeds there is no reliable way to find them again,
- * and attempting to program or erase bad blocks can affect
- * the data in _other_ (good) blocks.
- */
-#define ALLOW_ERASE_BAD_DEBUG 0
-
-#define CONFIG_MTD_NAND_ECC /* enable ECC */
-#define CONFIG_MTD_NAND_ECC_JFFS2
-
-/* bits for nand_legacy_rw() `cmd'; or together as needed */
-#define NANDRW_READ 0x01
-#define NANDRW_WRITE 0x00
-#define NANDRW_JFFS2 0x02
-#define NANDRW_JFFS2_SKIP 0x04
-
-
-/*
- * Exported variables etc.
- */
-
-/* Definition of the out of band configuration structure */
-struct nand_oob_config {
- /* position of ECC bytes inside oob */
- int ecc_pos[6];
- /* position of bad blk flag inside oob -1 = inactive */
- int badblock_pos;
- /* position of ECC valid flag inside oob -1 = inactive */
- int eccvalid_pos;
-} oob_config = { {0}, 0, 0};
-
-struct nand_chip nand_dev_desc[CONFIG_SYS_MAX_NAND_DEVICE] = {{0}};
-
-int curr_device = -1; /* Current NAND Device */
-
-
-/*
- * Exported functionss
- */
-int nand_legacy_erase(struct nand_chip* nand, size_t ofs,
- size_t len, int clean);
-int nand_legacy_rw(struct nand_chip* nand, int cmd,
- size_t start, size_t len,
- size_t * retlen, u_char * buf);
-void nand_print(struct nand_chip *nand);
-void nand_print_bad(struct nand_chip *nand);
-int nand_read_oob(struct nand_chip* nand, size_t ofs, size_t len,
- size_t * retlen, u_char * buf);
-int nand_write_oob(struct nand_chip* nand, size_t ofs, size_t len,
- size_t * retlen, const u_char * buf);
-
-/*
- * Internals
- */
-static int NanD_WaitReady(struct nand_chip *nand, int ale_wait);
-static int nand_read_ecc(struct nand_chip *nand, size_t start, size_t len,
- size_t * retlen, u_char *buf, u_char *ecc_code);
-static int nand_write_ecc (struct nand_chip* nand, size_t to, size_t len,
- size_t * retlen, const u_char * buf,
- u_char * ecc_code);
-#ifdef CONFIG_MTD_NAND_ECC
-static int nand_correct_data (u_char *dat, u_char *read_ecc, u_char *calc_ecc);
-static void nand_calculate_ecc (const u_char *dat, u_char *ecc_code);
-#endif
-
-
-/*
- *
- * Function definitions
- *
- */
-
-/* returns 0 if block containing pos is OK:
- * valid erase block and
- * not marked bad, or no bad mark position is specified
- * returns 1 if marked bad or otherwise invalid
- */
-static int check_block (struct nand_chip *nand, unsigned long pos)
-{
- size_t retlen;
- uint8_t oob_data;
- uint16_t oob_data16[6];
- int page0 = pos & (-nand->erasesize);
- int page1 = page0 + nand->oobblock;
- int badpos = oob_config.badblock_pos;
-
- if (pos >= nand->totlen)
- return 1;
-
- if (badpos < 0)
- return 0; /* no way to check, assume OK */
-
- if (nand->bus16) {
- if (nand_read_oob(nand, (page0 + 0), 12, &retlen, (uint8_t *)oob_data16)
- || (oob_data16[2] & 0xff00) != 0xff00)
- return 1;
- if (nand_read_oob(nand, (page1 + 0), 12, &retlen, (uint8_t *)oob_data16)
- || (oob_data16[2] & 0xff00) != 0xff00)
- return 1;
- } else {
- /* Note - bad block marker can be on first or second page */
- if (nand_read_oob(nand, page0 + badpos, 1, &retlen, (unsigned char *)&oob_data)
- || oob_data != 0xff
- || nand_read_oob (nand, page1 + badpos, 1, &retlen, (unsigned char *)&oob_data)
- || oob_data != 0xff)
- return 1;
- }
-
- return 0;
-}
-
-/* print bad blocks in NAND flash */
-void nand_print_bad(struct nand_chip* nand)
-{
- unsigned long pos;
-
- for (pos = 0; pos < nand->totlen; pos += nand->erasesize) {
- if (check_block(nand, pos))
- printf(" 0x%8.8lx\n", pos);
- }
- puts("\n");
-}
-
-/* cmd: 0: NANDRW_WRITE write, fail on bad block
- * 1: NANDRW_READ read, fail on bad block
- * 2: NANDRW_WRITE | NANDRW_JFFS2 write, skip bad blocks
- * 3: NANDRW_READ | NANDRW_JFFS2 read, data all 0xff for bad blocks
- * 7: NANDRW_READ | NANDRW_JFFS2 | NANDRW_JFFS2_SKIP read, skip bad blocks
- */
-int nand_legacy_rw (struct nand_chip* nand, int cmd,
- size_t start, size_t len,
- size_t * retlen, u_char * buf)
-{
- int ret = 0, n, total = 0;
- char eccbuf[6];
- /* eblk (once set) is the start of the erase block containing the
- * data being processed.
- */
- unsigned long eblk = ~0; /* force mismatch on first pass */
- unsigned long erasesize = nand->erasesize;
-
- while (len) {
- if ((start & (-erasesize)) != eblk) {
- /* have crossed into new erase block, deal with
- * it if it is sure marked bad.
- */
- eblk = start & (-erasesize); /* start of block */
- if (check_block(nand, eblk)) {
- if (cmd == (NANDRW_READ | NANDRW_JFFS2)) {
- while (len > 0 &&
- start - eblk < erasesize) {
- *(buf++) = 0xff;
- ++start;
- ++total;
- --len;
- }
- continue;
- } else if (cmd == (NANDRW_READ | NANDRW_JFFS2 | NANDRW_JFFS2_SKIP)) {
- start += erasesize;
- continue;
- } else if (cmd == (NANDRW_WRITE | NANDRW_JFFS2)) {
- /* skip bad block */
- start += erasesize;
- continue;
- } else {
- ret = 1;
- break;
- }
- }
- }
- /* The ECC will not be calculated correctly if
- less than 512 is written or read */
- /* Is request at least 512 bytes AND it starts on a proper boundry */
- if((start != ROUND_DOWN(start, 0x200)) || (len < 0x200))
- printf("Warning block writes should be at least 512 bytes and start on a 512 byte boundry\n");
-
- if (cmd & NANDRW_READ) {
- ret = nand_read_ecc(nand, start,
- min(len, eblk + erasesize - start),
- (size_t *)&n, (u_char*)buf, (u_char *)eccbuf);
- } else {
- ret = nand_write_ecc(nand, start,
- min(len, eblk + erasesize - start),
- (size_t *)&n, (u_char*)buf, (u_char *)eccbuf);
- }
-
- if (ret)
- break;
-
- start += n;
- buf += n;
- total += n;
- len -= n;
- }
- if (retlen)
- *retlen = total;
-
- return ret;
-}
-
-void nand_print(struct nand_chip *nand)
-{
- if (nand->numchips > 1) {
- printf("%s at 0x%lx,\n"
- "\t %d chips %s, size %d MB, \n"
- "\t total size %ld MB, sector size %ld kB\n",
- nand->name, nand->IO_ADDR, nand->numchips,
- nand->chips_name, 1 << (nand->chipshift - 20),
- nand->totlen >> 20, nand->erasesize >> 10);
- }
- else {
- printf("%s at 0x%lx (", nand->chips_name, nand->IO_ADDR);
- print_size(nand->totlen, ", ");
- print_size(nand->erasesize, " sector)\n");
- }
-}
-
-/* ------------------------------------------------------------------------- */
-
-static int NanD_WaitReady(struct nand_chip *nand, int ale_wait)
-{
- /* This is inline, to optimise the common case, where it's ready instantly */
- int ret = 0;
-
-#ifdef NAND_NO_RB /* in config file, shorter delays currently wrap accesses */
- if(ale_wait)
- NAND_WAIT_READY(nand); /* do the worst case 25us wait */
- else
- udelay(10);
-#else /* has functional r/b signal */
- NAND_WAIT_READY(nand);
-#endif
- return ret;
-}
-
-/* NanD_Command: Send a flash command to the flash chip */
-
-static inline int NanD_Command(struct nand_chip *nand, unsigned char command)
-{
- unsigned long nandptr = nand->IO_ADDR;
-
- /* Assert the CLE (Command Latch Enable) line to the flash chip */
- NAND_CTL_SETCLE(nandptr);
-
- /* Send the command */
- WRITE_NAND_COMMAND(command, nandptr);
-
- /* Lower the CLE line */
- NAND_CTL_CLRCLE(nandptr);
-
-#ifdef NAND_NO_RB
- if(command == NAND_CMD_RESET){
- u_char ret_val;
- NanD_Command(nand, NAND_CMD_STATUS);
- do {
- ret_val = READ_NAND(nandptr);/* wait till ready */
- } while((ret_val & 0x40) != 0x40);
- }
-#endif
- return NanD_WaitReady(nand, 0);
-}
-
-/* NanD_Address: Set the current address for the flash chip */
-
-static int NanD_Address(struct nand_chip *nand, int numbytes, unsigned long ofs)
-{
- unsigned long nandptr;
- int i;
-
- nandptr = nand->IO_ADDR;
-
- /* Assert the ALE (Address Latch Enable) line to the flash chip */
- NAND_CTL_SETALE(nandptr);
-
- /* Send the address */
- /* Devices with 256-byte page are addressed as:
- * Column (bits 0-7), Page (bits 8-15, 16-23, 24-31)
- * there is no device on the market with page256
- * and more than 24 bits.
- * Devices with 512-byte page are addressed as:
- * Column (bits 0-7), Page (bits 9-16, 17-24, 25-31)
- * 25-31 is sent only if the chip support it.
- * bit 8 changes the read command to be sent
- * (NAND_CMD_READ0 or NAND_CMD_READ1).
- */
-
- if (numbytes == ADDR_COLUMN || numbytes == ADDR_COLUMN_PAGE)
- WRITE_NAND_ADDRESS(ofs, nandptr);
-
- ofs = ofs >> nand->page_shift;
-
- if (numbytes == ADDR_PAGE || numbytes == ADDR_COLUMN_PAGE) {
- for (i = 0; i < nand->pageadrlen; i++, ofs = ofs >> 8) {
- WRITE_NAND_ADDRESS(ofs, nandptr);
- }
- }
-
- /* Lower the ALE line */
- NAND_CTL_CLRALE(nandptr);
-
- /* Wait for the chip to respond */
- return NanD_WaitReady(nand, 1);
-}
-
-/* NanD_SelectChip: Select a given flash chip within the current floor */
-
-static inline int NanD_SelectChip(struct nand_chip *nand, int chip)
-{
- /* Wait for it to be ready */
- return NanD_WaitReady(nand, 0);
-}
-
-/* NanD_IdentChip: Identify a given NAND chip given {floor,chip} */
-
-static int NanD_IdentChip(struct nand_chip *nand, int floor, int chip)
-{
- int mfr, id, i;
-
- NAND_ENABLE_CE(nand); /* set pin low */
- /* Reset the chip */
- if (NanD_Command(nand, NAND_CMD_RESET)) {
-#ifdef NAND_DEBUG
- printf("NanD_Command (reset) for %d,%d returned true\n",
- floor, chip);
-#endif
- NAND_DISABLE_CE(nand); /* set pin high */
- return 0;
- }
-
- /* Read the NAND chip ID: 1. Send ReadID command */
- if (NanD_Command(nand, NAND_CMD_READID)) {
-#ifdef NAND_DEBUG
- printf("NanD_Command (ReadID) for %d,%d returned true\n",
- floor, chip);
-#endif
- NAND_DISABLE_CE(nand); /* set pin high */
- return 0;
- }
-
- /* Read the NAND chip ID: 2. Send address byte zero */
- NanD_Address(nand, ADDR_COLUMN, 0);
-
- /* Read the manufacturer and device id codes from the device */
-
- mfr = READ_NAND(nand->IO_ADDR);
-
- id = READ_NAND(nand->IO_ADDR);
-
- NAND_DISABLE_CE(nand); /* set pin high */
-
-#ifdef NAND_DEBUG
- printf("NanD_Command (ReadID) got %x %x\n", mfr, id);
-#endif
- if (mfr == 0xff || mfr == 0) {
- /* No response - return failure */
- return 0;
- }
-
- /* Check it's the same as the first chip we identified.
- * M-Systems say that any given nand_chip device should only
- * contain _one_ type of flash part, although that's not a
- * hardware restriction. */
- if (nand->mfr) {
- if (nand->mfr == mfr && nand->id == id) {
- return 1; /* This is another the same the first */
- } else {
- printf("Flash chip at floor %d, chip %d is different:\n",
- floor, chip);
- }
- }
-
- /* Print and store the manufacturer and ID codes. */
- for (i = 0; nand_flash_ids[i].name != NULL; i++) {
- if (mfr == nand_flash_ids[i].manufacture_id &&
- id == nand_flash_ids[i].model_id) {
-#ifdef NAND_DEBUG
- printf("Flash chip found:\n\t Manufacturer ID: 0x%2.2X, "
- "Chip ID: 0x%2.2X (%s)\n", mfr, id,
- nand_flash_ids[i].name);
-#endif
- if (!nand->mfr) {
- nand->mfr = mfr;
- nand->id = id;
- nand->chipshift =
- nand_flash_ids[i].chipshift;
- nand->page256 = nand_flash_ids[i].page256;
- nand->eccsize = 256;
- if (nand->page256) {
- nand->oobblock = 256;
- nand->oobsize = 8;
- nand->page_shift = 8;
- } else {
- nand->oobblock = 512;
- nand->oobsize = 16;
- nand->page_shift = 9;
- }
- nand->pageadrlen = nand_flash_ids[i].pageadrlen;
- nand->erasesize = nand_flash_ids[i].erasesize;
- nand->chips_name = nand_flash_ids[i].name;
- nand->bus16 = nand_flash_ids[i].bus16;
- return 1;
- }
- return 0;
- }
- }
-
-
-#ifdef NAND_DEBUG
- /* We haven't fully identified the chip. Print as much as we know. */
- printf("Unknown flash chip found: %2.2X %2.2X\n",
- id, mfr);
-#endif
-
- return 0;
-}
-
-/* NanD_ScanChips: Find all NAND chips present in a nand_chip, and identify them */
-
-static void NanD_ScanChips(struct nand_chip *nand)
-{
- int floor, chip;
- int numchips[NAND_MAX_FLOORS];
- int maxchips = CONFIG_SYS_NAND_MAX_CHIPS;
- int ret = 1;
-
- nand->numchips = 0;
- nand->mfr = 0;
- nand->id = 0;
-
-
- /* For each floor, find the number of valid chips it contains */
- for (floor = 0; floor < NAND_MAX_FLOORS; floor++) {
- ret = 1;
- numchips[floor] = 0;
- for (chip = 0; chip < maxchips && ret != 0; chip++) {
-
- ret = NanD_IdentChip(nand, floor, chip);
- if (ret) {
- numchips[floor]++;
- nand->numchips++;
- }
- }
- }
-
- /* If there are none at all that we recognise, bail */
- if (!nand->numchips) {
-#ifdef NAND_DEBUG
- puts ("No NAND flash chips recognised.\n");
-#endif
- return;
- }
-
- /* Allocate an array to hold the information for each chip */
- nand->chips = malloc(sizeof(struct Nand) * nand->numchips);
- if (!nand->chips) {
- puts ("No memory for allocating chip info structures\n");
- return;
- }
-
- ret = 0;
-
- /* Fill out the chip array with {floor, chipno} for each
- * detected chip in the device. */
- for (floor = 0; floor < NAND_MAX_FLOORS; floor++) {
- for (chip = 0; chip < numchips[floor]; chip++) {
- nand->chips[ret].floor = floor;
- nand->chips[ret].chip = chip;
- nand->chips[ret].curadr = 0;
- nand->chips[ret].curmode = 0x50;
- ret++;
- }
- }
-
- /* Calculate and print the total size of the device */
- nand->totlen = nand->numchips * (1 << nand->chipshift);
-
-#ifdef NAND_DEBUG
- printf("%d flash chips found. Total nand_chip size: %ld MB\n",
- nand->numchips, nand->totlen >> 20);
-#endif
-}
-
-/* we need to be fast here, 1 us per read translates to 1 second per meg */
-static void NanD_ReadBuf (struct nand_chip *nand, u_char * data_buf, int cntr)
-{
- unsigned long nandptr = nand->IO_ADDR;
-
- NanD_Command (nand, NAND_CMD_READ0);
-
- if (nand->bus16) {
- u16 val;
-
- while (cntr >= 16) {
- val = READ_NAND (nandptr);
- *data_buf++ = val & 0xff;
- *data_buf++ = val >> 8;
- val = READ_NAND (nandptr);
- *data_buf++ = val & 0xff;
- *data_buf++ = val >> 8;
- val = READ_NAND (nandptr);
- *data_buf++ = val & 0xff;
- *data_buf++ = val >> 8;
- val = READ_NAND (nandptr);
- *data_buf++ = val & 0xff;
- *data_buf++ = val >> 8;
- val = READ_NAND (nandptr);
- *data_buf++ = val & 0xff;
- *data_buf++ = val >> 8;
- val = READ_NAND (nandptr);
- *data_buf++ = val & 0xff;
- *data_buf++ = val >> 8;
- val = READ_NAND (nandptr);
- *data_buf++ = val & 0xff;
- *data_buf++ = val >> 8;
- val = READ_NAND (nandptr);
- *data_buf++ = val & 0xff;
- *data_buf++ = val >> 8;
- cntr -= 16;
- }
-
- while (cntr > 0) {
- val = READ_NAND (nandptr);
- *data_buf++ = val & 0xff;
- *data_buf++ = val >> 8;
- cntr -= 2;
- }
- } else {
- while (cntr >= 16) {
- *data_buf++ = READ_NAND (nandptr);
- *data_buf++ = READ_NAND (nandptr);
- *data_buf++ = READ_NAND (nandptr);
- *data_buf++ = READ_NAND (nandptr);
- *data_buf++ = READ_NAND (nandptr);
- *data_buf++ = READ_NAND (nandptr);
- *data_buf++ = READ_NAND (nandptr);
- *data_buf++ = READ_NAND (nandptr);
- *data_buf++ = READ_NAND (nandptr);
- *data_buf++ = READ_NAND (nandptr);
- *data_buf++ = READ_NAND (nandptr);
- *data_buf++ = READ_NAND (nandptr);
- *data_buf++ = READ_NAND (nandptr);
- *data_buf++ = READ_NAND (nandptr);
- *data_buf++ = READ_NAND (nandptr);
- *data_buf++ = READ_NAND (nandptr);
- cntr -= 16;
- }
-
- while (cntr > 0) {
- *data_buf++ = READ_NAND (nandptr);
- cntr--;
- }
- }
-}
-
-/*
- * NAND read with ECC
- */
-static int nand_read_ecc(struct nand_chip *nand, size_t start, size_t len,
- size_t * retlen, u_char *buf, u_char *ecc_code)
-{
- int col, page;
- int ecc_status = 0;
-#ifdef CONFIG_MTD_NAND_ECC
- int j;
- int ecc_failed = 0;
- u_char *data_poi;
- u_char ecc_calc[6];
-#endif
-
- /* Do not allow reads past end of device */
- if ((start + len) > nand->totlen) {
- printf ("%s: Attempt read beyond end of device %x %x %x\n",
- __FUNCTION__, (uint) start, (uint) len, (uint) nand->totlen);
- *retlen = 0;
- return -1;
- }
-
- /* First we calculate the starting page */
- /*page = shr(start, nand->page_shift);*/
- page = start >> nand->page_shift;
-
- /* Get raw starting column */
- col = start & (nand->oobblock - 1);
-
- /* Initialize return value */
- *retlen = 0;
-
- /* Select the NAND device */
- NAND_ENABLE_CE(nand); /* set pin low */
-
- /* Loop until all data read */
- while (*retlen < len) {
-
-#ifdef CONFIG_MTD_NAND_ECC
- /* Do we have this page in cache ? */
- if (nand->cache_page == page)
- goto readdata;
- /* Send the read command */
- NanD_Command(nand, NAND_CMD_READ0);
- if (nand->bus16) {
- NanD_Address(nand, ADDR_COLUMN_PAGE,
- (page << nand->page_shift) + (col >> 1));
- } else {
- NanD_Address(nand, ADDR_COLUMN_PAGE,
- (page << nand->page_shift) + col);
- }
-
- /* Read in a page + oob data */
- NanD_ReadBuf(nand, nand->data_buf, nand->oobblock + nand->oobsize);
-
- /* copy data into cache, for read out of cache and if ecc fails */
- if (nand->data_cache) {
- memcpy (nand->data_cache, nand->data_buf,
- nand->oobblock + nand->oobsize);
- }
-
- /* Pick the ECC bytes out of the oob data */
- for (j = 0; j < 6; j++) {
- ecc_code[j] = nand->data_buf[(nand->oobblock + oob_config.ecc_pos[j])];
- }
-
- /* Calculate the ECC and verify it */
- /* If block was not written with ECC, skip ECC */
- if (oob_config.eccvalid_pos != -1 &&
- (nand->data_buf[nand->oobblock + oob_config.eccvalid_pos] & 0x0f) != 0x0f) {
-
- nand_calculate_ecc (&nand->data_buf[0], &ecc_calc[0]);
- switch (nand_correct_data (&nand->data_buf[0], &ecc_code[0], &ecc_calc[0])) {
- case -1:
- printf ("%s: Failed ECC read, page 0x%08x\n", __FUNCTION__, page);
- ecc_failed++;
- break;
- case 1:
- case 2: /* transfer ECC corrected data to cache */
- if (nand->data_cache)
- memcpy (nand->data_cache, nand->data_buf, 256);
- break;
- }
- }
-
- if (oob_config.eccvalid_pos != -1 &&
- nand->oobblock == 512 && (nand->data_buf[nand->oobblock + oob_config.eccvalid_pos] & 0xf0) != 0xf0) {
-
- nand_calculate_ecc (&nand->data_buf[256], &ecc_calc[3]);
- switch (nand_correct_data (&nand->data_buf[256], &ecc_code[3], &ecc_calc[3])) {
- case -1:
- printf ("%s: Failed ECC read, page 0x%08x\n", __FUNCTION__, page);
- ecc_failed++;
- break;
- case 1:
- case 2: /* transfer ECC corrected data to cache */
- if (nand->data_cache)
- memcpy (&nand->data_cache[256], &nand->data_buf[256], 256);
- break;
- }
- }
-readdata:
- /* Read the data from ECC data buffer into return buffer */
- data_poi = (nand->data_cache) ? nand->data_cache : nand->data_buf;
- data_poi += col;
- if ((*retlen + (nand->oobblock - col)) >= len) {
- memcpy (buf + *retlen, data_poi, len - *retlen);
- *retlen = len;
- } else {
- memcpy (buf + *retlen, data_poi, nand->oobblock - col);
- *retlen += nand->oobblock - col;
- }
- /* Set cache page address, invalidate, if ecc_failed */
- nand->cache_page = (nand->data_cache && !ecc_failed) ? page : -1;
-
- ecc_status += ecc_failed;
- ecc_failed = 0;
-
-#else
- /* Send the read command */
- NanD_Command(nand, NAND_CMD_READ0);
- if (nand->bus16) {
- NanD_Address(nand, ADDR_COLUMN_PAGE,
- (page << nand->page_shift) + (col >> 1));
- } else {
- NanD_Address(nand, ADDR_COLUMN_PAGE,
- (page << nand->page_shift) + col);
- }
-
- /* Read the data directly into the return buffer */
- if ((*retlen + (nand->oobblock - col)) >= len) {
- NanD_ReadBuf(nand, buf + *retlen, len - *retlen);
- *retlen = len;
- /* We're done */
- continue;
- } else {
- NanD_ReadBuf(nand, buf + *retlen, nand->oobblock - col);
- *retlen += nand->oobblock - col;
- }
-#endif
- /* For subsequent reads align to page boundary. */
- col = 0;
- /* Increment page address */
- page++;
- }
-
- /* De-select the NAND device */
- NAND_DISABLE_CE(nand); /* set pin high */
-
- /*
- * Return success, if no ECC failures, else -EIO
- * fs driver will take care of that, because
- * retlen == desired len and result == -EIO
- */
- return ecc_status ? -1 : 0;
-}
-
-/*
- * Nand_page_program function is used for write and writev !
- */
-static int nand_write_page (struct nand_chip *nand,
- int page, int col, int last, u_char * ecc_code)
-{
-
- int i;
- unsigned long nandptr = nand->IO_ADDR;
-
-#ifdef CONFIG_MTD_NAND_ECC
-#ifdef CONFIG_MTD_NAND_VERIFY_WRITE
- int ecc_bytes = (nand->oobblock == 512) ? 6 : 3;
-#endif
-#endif
- /* pad oob area */
- for (i = nand->oobblock; i < nand->oobblock + nand->oobsize; i++)
- nand->data_buf[i] = 0xff;
-
-#ifdef CONFIG_MTD_NAND_ECC
- /* Zero out the ECC array */
- for (i = 0; i < 6; i++)
- ecc_code[i] = 0x00;
-
- /* Read back previous written data, if col > 0 */
- if (col) {
- NanD_Command (nand, NAND_CMD_READ0);
- if (nand->bus16) {
- NanD_Address (nand, ADDR_COLUMN_PAGE,
- (page << nand->page_shift) + (col >> 1));
- } else {
- NanD_Address (nand, ADDR_COLUMN_PAGE,
- (page << nand->page_shift) + col);
- }
-
- if (nand->bus16) {
- u16 val;
-
- for (i = 0; i < col; i += 2) {
- val = READ_NAND (nandptr);
- nand->data_buf[i] = val & 0xff;
- nand->data_buf[i + 1] = val >> 8;
- }
- } else {
- for (i = 0; i < col; i++)
- nand->data_buf[i] = READ_NAND (nandptr);
- }
- }
-
- /* Calculate and write the ECC if we have enough data */
- if ((col < nand->eccsize) && (last >= nand->eccsize)) {
- nand_calculate_ecc (&nand->data_buf[0], &(ecc_code[0]));
- for (i = 0; i < 3; i++) {
- nand->data_buf[(nand->oobblock +
- oob_config.ecc_pos[i])] = ecc_code[i];
- }
- if (oob_config.eccvalid_pos != -1) {
- nand->data_buf[nand->oobblock +
- oob_config.eccvalid_pos] = 0xf0;
- }
- }
-
- /* Calculate and write the second ECC if we have enough data */
- if ((nand->oobblock == 512) && (last == nand->oobblock)) {
- nand_calculate_ecc (&nand->data_buf[256], &(ecc_code[3]));
- for (i = 3; i < 6; i++) {
- nand->data_buf[(nand->oobblock +
- oob_config.ecc_pos[i])] = ecc_code[i];
- }
- if (oob_config.eccvalid_pos != -1) {
- nand->data_buf[nand->oobblock +
- oob_config.eccvalid_pos] &= 0x0f;
- }
- }
-#endif
- /* Prepad for partial page programming !!! */
- for (i = 0; i < col; i++)
- nand->data_buf[i] = 0xff;
-
- /* Postpad for partial page programming !!! oob is already padded */
- for (i = last; i < nand->oobblock; i++)
- nand->data_buf[i] = 0xff;
-
- /* Send command to begin auto page programming */
- NanD_Command (nand, NAND_CMD_READ0);
- NanD_Command (nand, NAND_CMD_SEQIN);
- if (nand->bus16) {
- NanD_Address (nand, ADDR_COLUMN_PAGE,
- (page << nand->page_shift) + (col >> 1));
- } else {
- NanD_Address (nand, ADDR_COLUMN_PAGE,
- (page << nand->page_shift) + col);
- }
-
- /* Write out complete page of data */
- if (nand->bus16) {
- for (i = 0; i < (nand->oobblock + nand->oobsize); i += 2) {
- WRITE_NAND (nand->data_buf[i] +
- (nand->data_buf[i + 1] << 8),
- nand->IO_ADDR);
- }
- } else {
- for (i = 0; i < (nand->oobblock + nand->oobsize); i++)
- WRITE_NAND (nand->data_buf[i], nand->IO_ADDR);
- }
-
- /* Send command to actually program the data */
- NanD_Command (nand, NAND_CMD_PAGEPROG);
- NanD_Command (nand, NAND_CMD_STATUS);
-#ifdef NAND_NO_RB
- {
- u_char ret_val;
-
- do {
- ret_val = READ_NAND (nandptr); /* wait till ready */
- } while ((ret_val & 0x40) != 0x40);
- }
-#endif
- /* See if device thinks it succeeded */
- if (READ_NAND (nand->IO_ADDR) & 0x01) {
- printf ("%s: Failed write, page 0x%08x, ", __FUNCTION__,
- page);
- return -1;
- }
-#ifdef CONFIG_MTD_NAND_VERIFY_WRITE
- /*
- * The NAND device assumes that it is always writing to
- * a cleanly erased page. Hence, it performs its internal
- * write verification only on bits that transitioned from
- * 1 to 0. The device does NOT verify the whole page on a
- * byte by byte basis. It is possible that the page was
- * not completely erased or the page is becoming unusable
- * due to wear. The read with ECC would catch the error
- * later when the ECC page check fails, but we would rather
- * catch it early in the page write stage. Better to write
- * no data than invalid data.
- */
-
- /* Send command to read back the page */
- if (col < nand->eccsize)
- NanD_Command (nand, NAND_CMD_READ0);
- else
- NanD_Command (nand, NAND_CMD_READ1);
- if (nand->bus16) {
- NanD_Address (nand, ADDR_COLUMN_PAGE,
- (page << nand->page_shift) + (col >> 1));
- } else {
- NanD_Address (nand, ADDR_COLUMN_PAGE,
- (page << nand->page_shift) + col);
- }
-
- /* Loop through and verify the data */
- if (nand->bus16) {
- for (i = col; i < last; i = +2) {
- if ((nand->data_buf[i] +
- (nand->data_buf[i + 1] << 8)) != READ_NAND (nand->IO_ADDR)) {
- printf ("%s: Failed write verify, page 0x%08x ",
- __FUNCTION__, page);
- return -1;
- }
- }
- } else {
- for (i = col; i < last; i++) {
- if (nand->data_buf[i] != READ_NAND (nand->IO_ADDR)) {
- printf ("%s: Failed write verify, page 0x%08x ",
- __FUNCTION__, page);
- return -1;
- }
- }
- }
-
-#ifdef CONFIG_MTD_NAND_ECC
- /*
- * We also want to check that the ECC bytes wrote
- * correctly for the same reasons stated above.
- */
- NanD_Command (nand, NAND_CMD_READOOB);
- if (nand->bus16) {
- NanD_Address (nand, ADDR_COLUMN_PAGE,
- (page << nand->page_shift) + (col >> 1));
- } else {
- NanD_Address (nand, ADDR_COLUMN_PAGE,
- (page << nand->page_shift) + col);
- }
- if (nand->bus16) {
- for (i = 0; i < nand->oobsize; i += 2) {
- u16 val;
-
- val = READ_NAND (nand->IO_ADDR);
- nand->data_buf[i] = val & 0xff;
- nand->data_buf[i + 1] = val >> 8;
- }
- } else {
- for (i = 0; i < nand->oobsize; i++) {
- nand->data_buf[i] = READ_NAND (nand->IO_ADDR);
- }
- }
- for (i = 0; i < ecc_bytes; i++) {
- if ((nand->data_buf[(oob_config.ecc_pos[i])] != ecc_code[i]) && ecc_code[i]) {
- printf ("%s: Failed ECC write "
- "verify, page 0x%08x, "
- "%6i bytes were succesful\n",
- __FUNCTION__, page, i);
- return -1;
- }
- }
-#endif /* CONFIG_MTD_NAND_ECC */
-#endif /* CONFIG_MTD_NAND_VERIFY_WRITE */
- return 0;
-}
-
-static int nand_write_ecc (struct nand_chip* nand, size_t to, size_t len,
- size_t * retlen, const u_char * buf, u_char * ecc_code)
-{
- int i, page, col, cnt, ret = 0;
-
- /* Do not allow write past end of device */
- if ((to + len) > nand->totlen) {
- printf ("%s: Attempt to write past end of page\n", __FUNCTION__);
- return -1;
- }
-
- /* Shift to get page */
- page = ((int) to) >> nand->page_shift;
-
- /* Get the starting column */
- col = to & (nand->oobblock - 1);
-
- /* Initialize return length value */
- *retlen = 0;
-
- /* Select the NAND device */
-#ifdef CONFIG_OMAP1510
- archflashwp(0,0);
-#endif
-#ifdef CONFIG_SYS_NAND_WP
- NAND_WP_OFF();
-#endif
-
- NAND_ENABLE_CE(nand); /* set pin low */
-
- /* Check the WP bit */
- NanD_Command(nand, NAND_CMD_STATUS);
- if (!(READ_NAND(nand->IO_ADDR) & 0x80)) {
- printf ("%s: Device is write protected!!!\n", __FUNCTION__);
- ret = -1;
- goto out;
- }
-
- /* Loop until all data is written */
- while (*retlen < len) {
- /* Invalidate cache, if we write to this page */
- if (nand->cache_page == page)
- nand->cache_page = -1;
-
- /* Write data into buffer */
- if ((col + len) >= nand->oobblock) {
- for (i = col, cnt = 0; i < nand->oobblock; i++, cnt++) {
- nand->data_buf[i] = buf[(*retlen + cnt)];
- }
- } else {
- for (i = col, cnt = 0; cnt < (len - *retlen); i++, cnt++) {
- nand->data_buf[i] = buf[(*retlen + cnt)];
- }
- }
- /* We use the same function for write and writev !) */
- ret = nand_write_page (nand, page, col, i, ecc_code);
- if (ret)
- goto out;
-
- /* Next data start at page boundary */
- col = 0;
-
- /* Update written bytes count */
- *retlen += cnt;
-
- /* Increment page address */
- page++;
- }
-
- /* Return happy */
- *retlen = len;
-
-out:
- /* De-select the NAND device */
- NAND_DISABLE_CE(nand); /* set pin high */
-#ifdef CONFIG_OMAP1510
- archflashwp(0,1);
-#endif
-#ifdef CONFIG_SYS_NAND_WP
- NAND_WP_ON();
-#endif
-
- return ret;
-}
-
-/* read from the 16 bytes of oob data that correspond to a 512 byte
- * page or 2 256-byte pages.
- */
-int nand_read_oob(struct nand_chip* nand, size_t ofs, size_t len,
- size_t * retlen, u_char * buf)
-{
- int len256 = 0;
- struct Nand *mychip;
- int ret = 0;
-
- mychip = &nand->chips[ofs >> nand->chipshift];
-
- /* update address for 2M x 8bit devices. OOB starts on the second */
- /* page to maintain compatibility with nand_read_ecc. */
- if (nand->page256) {
- if (!(ofs & 0x8))
- ofs += 0x100;
- else
- ofs -= 0x8;
- }
-
- NAND_ENABLE_CE(nand); /* set pin low */
- NanD_Command(nand, NAND_CMD_READOOB);
- if (nand->bus16) {
- NanD_Address(nand, ADDR_COLUMN_PAGE,
- ((ofs >> nand->page_shift) << nand->page_shift) +
- ((ofs & (nand->oobblock - 1)) >> 1));
- } else {
- NanD_Address(nand, ADDR_COLUMN_PAGE, ofs);
- }
-
- /* treat crossing 8-byte OOB data for 2M x 8bit devices */
- /* Note: datasheet says it should automaticaly wrap to the */
- /* next OOB block, but it didn't work here. mf. */
- if (nand->page256 && ofs + len > (ofs | 0x7) + 1) {
- len256 = (ofs | 0x7) + 1 - ofs;
- NanD_ReadBuf(nand, buf, len256);
-
- NanD_Command(nand, NAND_CMD_READOOB);
- NanD_Address(nand, ADDR_COLUMN_PAGE, ofs & (~0x1ff));
- }
-
- NanD_ReadBuf(nand, &buf[len256], len - len256);
-
- *retlen = len;
- /* Reading the full OOB data drops us off of the end of the page,
- * causing the flash device to go into busy mode, so we need
- * to wait until ready 11.4.1 and Toshiba TC58256FT nands */
-
- ret = NanD_WaitReady(nand, 1);
- NAND_DISABLE_CE(nand); /* set pin high */
-
- return ret;
-
-}
-
-/* write to the 16 bytes of oob data that correspond to a 512 byte
- * page or 2 256-byte pages.
- */
-int nand_write_oob(struct nand_chip* nand, size_t ofs, size_t len,
- size_t * retlen, const u_char * buf)
-{
- int len256 = 0;
- int i;
- unsigned long nandptr = nand->IO_ADDR;
-
-#ifdef PSYCHO_DEBUG
- printf("nand_write_oob(%lx, %d): %2.2X %2.2X %2.2X %2.2X ... %2.2X %2.2X .. %2.2X %2.2X\n",
- (long)ofs, len, buf[0], buf[1], buf[2], buf[3],
- buf[8], buf[9], buf[14],buf[15]);
-#endif
-
- NAND_ENABLE_CE(nand); /* set pin low to enable chip */
-
- /* Reset the chip */
- NanD_Command(nand, NAND_CMD_RESET);
-
- /* issue the Read2 command to set the pointer to the Spare Data Area. */
- NanD_Command(nand, NAND_CMD_READOOB);
- if (nand->bus16) {
- NanD_Address(nand, ADDR_COLUMN_PAGE,
- ((ofs >> nand->page_shift) << nand->page_shift) +
- ((ofs & (nand->oobblock - 1)) >> 1));
- } else {
- NanD_Address(nand, ADDR_COLUMN_PAGE, ofs);
- }
-
- /* update address for 2M x 8bit devices. OOB starts on the second */
- /* page to maintain compatibility with nand_read_ecc. */
- if (nand->page256) {
- if (!(ofs & 0x8))
- ofs += 0x100;
- else
- ofs -= 0x8;
- }
-
- /* issue the Serial Data In command to initial the Page Program process */
- NanD_Command(nand, NAND_CMD_SEQIN);
- if (nand->bus16) {
- NanD_Address(nand, ADDR_COLUMN_PAGE,
- ((ofs >> nand->page_shift) << nand->page_shift) +
- ((ofs & (nand->oobblock - 1)) >> 1));
- } else {
- NanD_Address(nand, ADDR_COLUMN_PAGE, ofs);
- }
-
- /* treat crossing 8-byte OOB data for 2M x 8bit devices */
- /* Note: datasheet says it should automaticaly wrap to the */
- /* next OOB block, but it didn't work here. mf. */
- if (nand->page256 && ofs + len > (ofs | 0x7) + 1) {
- len256 = (ofs | 0x7) + 1 - ofs;
- for (i = 0; i < len256; i++)
- WRITE_NAND(buf[i], nandptr);
-
- NanD_Command(nand, NAND_CMD_PAGEPROG);
- NanD_Command(nand, NAND_CMD_STATUS);
-#ifdef NAND_NO_RB
- { u_char ret_val;
- do {
- ret_val = READ_NAND(nandptr); /* wait till ready */
- } while ((ret_val & 0x40) != 0x40);
- }
-#endif
- if (READ_NAND(nandptr) & 1) {
- puts ("Error programming oob data\n");
- /* There was an error */
- NAND_DISABLE_CE(nand); /* set pin high */
- *retlen = 0;
- return -1;
- }
- NanD_Command(nand, NAND_CMD_SEQIN);
- NanD_Address(nand, ADDR_COLUMN_PAGE, ofs & (~0x1ff));
- }
-
- if (nand->bus16) {
- for (i = len256; i < len; i += 2) {
- WRITE_NAND(buf[i] + (buf[i+1] << 8), nandptr);
- }
- } else {
- for (i = len256; i < len; i++)
- WRITE_NAND(buf[i], nandptr);
- }
-
- NanD_Command(nand, NAND_CMD_PAGEPROG);
- NanD_Command(nand, NAND_CMD_STATUS);
-#ifdef NAND_NO_RB
- { u_char ret_val;
- do {
- ret_val = READ_NAND(nandptr); /* wait till ready */
- } while ((ret_val & 0x40) != 0x40);
- }
-#endif
- if (READ_NAND(nandptr) & 1) {
- puts ("Error programming oob data\n");
- /* There was an error */
- NAND_DISABLE_CE(nand); /* set pin high */
- *retlen = 0;
- return -1;
- }
-
- NAND_DISABLE_CE(nand); /* set pin high */
- *retlen = len;
- return 0;
-
-}
-
-int nand_legacy_erase(struct nand_chip* nand, size_t ofs, size_t len, int clean)
-{
- /* This is defined as a structure so it will work on any system
- * using native endian jffs2 (the default).
- */
- static struct jffs2_unknown_node clean_marker = {
- JFFS2_MAGIC_BITMASK,
- JFFS2_NODETYPE_CLEANMARKER,
- 8 /* 8 bytes in this node */
- };
- unsigned long nandptr;
- struct Nand *mychip;
- int ret = 0;
-
- if (ofs & (nand->erasesize-1) || len & (nand->erasesize-1)) {
- printf ("Offset and size must be sector aligned, erasesize = %d\n",
- (int) nand->erasesize);
- return -1;
- }
-
- nandptr = nand->IO_ADDR;
-
- /* Select the NAND device */
-#ifdef CONFIG_OMAP1510
- archflashwp(0,0);
-#endif
-#ifdef CONFIG_SYS_NAND_WP
- NAND_WP_OFF();
-#endif
- NAND_ENABLE_CE(nand); /* set pin low */
-
- /* Check the WP bit */
- NanD_Command(nand, NAND_CMD_STATUS);
- if (!(READ_NAND(nand->IO_ADDR) & 0x80)) {
- printf ("nand_write_ecc: Device is write protected!!!\n");
- ret = -1;
- goto out;
- }
-
- /* Check the WP bit */
- NanD_Command(nand, NAND_CMD_STATUS);
- if (!(READ_NAND(nand->IO_ADDR) & 0x80)) {
- printf ("%s: Device is write protected!!!\n", __FUNCTION__);
- ret = -1;
- goto out;
- }
-
- /* FIXME: Do nand in the background. Use timers or schedule_task() */
- while(len) {
- /*mychip = &nand->chips[shr(ofs, nand->chipshift)];*/
- mychip = &nand->chips[ofs >> nand->chipshift];
-
- /* always check for bad block first, genuine bad blocks
- * should _never_ be erased.
- */
- if (ALLOW_ERASE_BAD_DEBUG || !check_block(nand, ofs)) {
- /* Select the NAND device */
- NAND_ENABLE_CE(nand); /* set pin low */
-
- NanD_Command(nand, NAND_CMD_ERASE1);
- NanD_Address(nand, ADDR_PAGE, ofs);
- NanD_Command(nand, NAND_CMD_ERASE2);
-
- NanD_Command(nand, NAND_CMD_STATUS);
-
-#ifdef NAND_NO_RB
- { u_char ret_val;
- do {
- ret_val = READ_NAND(nandptr); /* wait till ready */
- } while ((ret_val & 0x40) != 0x40);
- }
-#endif
- if (READ_NAND(nandptr) & 1) {
- printf ("%s: Error erasing at 0x%lx\n",
- __FUNCTION__, (long)ofs);
- /* There was an error */
- ret = -1;
- goto out;
- }
- if (clean) {
- int n; /* return value not used */
- int p, l;
-
- /* clean marker position and size depend
- * on the page size, since 256 byte pages
- * only have 8 bytes of oob data
- */
- if (nand->page256) {
- p = NAND_JFFS2_OOB8_FSDAPOS;
- l = NAND_JFFS2_OOB8_FSDALEN;
- } else {
- p = NAND_JFFS2_OOB16_FSDAPOS;
- l = NAND_JFFS2_OOB16_FSDALEN;
- }
-
- ret = nand_write_oob(nand, ofs + p, l, (size_t *)&n,
- (u_char *)&clean_marker);
- /* quit here if write failed */
- if (ret)
- goto out;
- }
- }
- ofs += nand->erasesize;
- len -= nand->erasesize;
- }
-
-out:
- /* De-select the NAND device */
- NAND_DISABLE_CE(nand); /* set pin high */
-#ifdef CONFIG_OMAP1510
- archflashwp(0,1);
-#endif
-#ifdef CONFIG_SYS_NAND_WP
- NAND_WP_ON();
-#endif
-
- return ret;
-}
-
-
-static inline int nandcheck(unsigned long potential, unsigned long physadr)
-{
- return 0;
-}
-
-unsigned long nand_probe(unsigned long physadr)
-{
- struct nand_chip *nand = NULL;
- int i = 0, ChipID = 1;
-
-#ifdef CONFIG_MTD_NAND_ECC_JFFS2
- oob_config.ecc_pos[0] = NAND_JFFS2_OOB_ECCPOS0;
- oob_config.ecc_pos[1] = NAND_JFFS2_OOB_ECCPOS1;
- oob_config.ecc_pos[2] = NAND_JFFS2_OOB_ECCPOS2;
- oob_config.ecc_pos[3] = NAND_JFFS2_OOB_ECCPOS3;
- oob_config.ecc_pos[4] = NAND_JFFS2_OOB_ECCPOS4;
- oob_config.ecc_pos[5] = NAND_JFFS2_OOB_ECCPOS5;
- oob_config.eccvalid_pos = 4;
-#else
- oob_config.ecc_pos[0] = NAND_NOOB_ECCPOS0;
- oob_config.ecc_pos[1] = NAND_NOOB_ECCPOS1;
- oob_config.ecc_pos[2] = NAND_NOOB_ECCPOS2;
- oob_config.ecc_pos[3] = NAND_NOOB_ECCPOS3;
- oob_config.ecc_pos[4] = NAND_NOOB_ECCPOS4;
- oob_config.ecc_pos[5] = NAND_NOOB_ECCPOS5;
- oob_config.eccvalid_pos = NAND_NOOB_ECCVPOS;
-#endif
- oob_config.badblock_pos = 5;
-
- for (i=0; i<CONFIG_SYS_MAX_NAND_DEVICE; i++) {
- if (nand_dev_desc[i].ChipID == NAND_ChipID_UNKNOWN) {
- nand = &nand_dev_desc[i];
- break;
- }
- }
- if (!nand)
- return (0);
-
- memset((char *)nand, 0, sizeof(struct nand_chip));
-
- nand->IO_ADDR = physadr;
- nand->cache_page = -1; /* init the cache page */
- NanD_ScanChips(nand);
-
- if (nand->totlen == 0) {
- /* no chips found, clean up and quit */
- memset((char *)nand, 0, sizeof(struct nand_chip));
- nand->ChipID = NAND_ChipID_UNKNOWN;
- return (0);
- }
-
- nand->ChipID = ChipID;
- if (curr_device == -1)
- curr_device = i;
-
- nand->data_buf = malloc (nand->oobblock + nand->oobsize);
- if (!nand->data_buf) {
- puts ("Cannot allocate memory for data structures.\n");
- return (0);
- }
-
- return (nand->totlen);
-}
-
-#ifdef CONFIG_MTD_NAND_ECC
-/*
- * Pre-calculated 256-way 1 byte column parity
- */
-static const u_char nand_ecc_precalc_table[] = {
- 0x00, 0x55, 0x56, 0x03, 0x59, 0x0c, 0x0f, 0x5a,
- 0x5a, 0x0f, 0x0c, 0x59, 0x03, 0x56, 0x55, 0x00,
- 0x65, 0x30, 0x33, 0x66, 0x3c, 0x69, 0x6a, 0x3f,
- 0x3f, 0x6a, 0x69, 0x3c, 0x66, 0x33, 0x30, 0x65,
- 0x66, 0x33, 0x30, 0x65, 0x3f, 0x6a, 0x69, 0x3c,
- 0x3c, 0x69, 0x6a, 0x3f, 0x65, 0x30, 0x33, 0x66,
- 0x03, 0x56, 0x55, 0x00, 0x5a, 0x0f, 0x0c, 0x59,
- 0x59, 0x0c, 0x0f, 0x5a, 0x00, 0x55, 0x56, 0x03,
- 0x69, 0x3c, 0x3f, 0x6a, 0x30, 0x65, 0x66, 0x33,
- 0x33, 0x66, 0x65, 0x30, 0x6a, 0x3f, 0x3c, 0x69,
- 0x0c, 0x59, 0x5a, 0x0f, 0x55, 0x00, 0x03, 0x56,
- 0x56, 0x03, 0x00, 0x55, 0x0f, 0x5a, 0x59, 0x0c,
- 0x0f, 0x5a, 0x59, 0x0c, 0x56, 0x03, 0x00, 0x55,
- 0x55, 0x00, 0x03, 0x56, 0x0c, 0x59, 0x5a, 0x0f,
- 0x6a, 0x3f, 0x3c, 0x69, 0x33, 0x66, 0x65, 0x30,
- 0x30, 0x65, 0x66, 0x33, 0x69, 0x3c, 0x3f, 0x6a,
- 0x6a, 0x3f, 0x3c, 0x69, 0x33, 0x66, 0x65, 0x30,
- 0x30, 0x65, 0x66, 0x33, 0x69, 0x3c, 0x3f, 0x6a,
- 0x0f, 0x5a, 0x59, 0x0c, 0x56, 0x03, 0x00, 0x55,
- 0x55, 0x00, 0x03, 0x56, 0x0c, 0x59, 0x5a, 0x0f,
- 0x0c, 0x59, 0x5a, 0x0f, 0x55, 0x00, 0x03, 0x56,
- 0x56, 0x03, 0x00, 0x55, 0x0f, 0x5a, 0x59, 0x0c,
- 0x69, 0x3c, 0x3f, 0x6a, 0x30, 0x65, 0x66, 0x33,
- 0x33, 0x66, 0x65, 0x30, 0x6a, 0x3f, 0x3c, 0x69,
- 0x03, 0x56, 0x55, 0x00, 0x5a, 0x0f, 0x0c, 0x59,
- 0x59, 0x0c, 0x0f, 0x5a, 0x00, 0x55, 0x56, 0x03,
- 0x66, 0x33, 0x30, 0x65, 0x3f, 0x6a, 0x69, 0x3c,
- 0x3c, 0x69, 0x6a, 0x3f, 0x65, 0x30, 0x33, 0x66,
- 0x65, 0x30, 0x33, 0x66, 0x3c, 0x69, 0x6a, 0x3f,
- 0x3f, 0x6a, 0x69, 0x3c, 0x66, 0x33, 0x30, 0x65,
- 0x00, 0x55, 0x56, 0x03, 0x59, 0x0c, 0x0f, 0x5a,
- 0x5a, 0x0f, 0x0c, 0x59, 0x03, 0x56, 0x55, 0x00
-};
-
-
-/*
- * Creates non-inverted ECC code from line parity
- */
-static void nand_trans_result(u_char reg2, u_char reg3,
- u_char *ecc_code)
-{
- u_char a, b, i, tmp1, tmp2;
-
- /* Initialize variables */
- a = b = 0x80;
- tmp1 = tmp2 = 0;
-
- /* Calculate first ECC byte */
- for (i = 0; i < 4; i++) {
- if (reg3 & a) /* LP15,13,11,9 --> ecc_code[0] */
- tmp1 |= b;
- b >>= 1;
- if (reg2 & a) /* LP14,12,10,8 --> ecc_code[0] */
- tmp1 |= b;
- b >>= 1;
- a >>= 1;
- }
-
- /* Calculate second ECC byte */
- b = 0x80;
- for (i = 0; i < 4; i++) {
- if (reg3 & a) /* LP7,5,3,1 --> ecc_code[1] */
- tmp2 |= b;
- b >>= 1;
- if (reg2 & a) /* LP6,4,2,0 --> ecc_code[1] */
- tmp2 |= b;
- b >>= 1;
- a >>= 1;
- }
-
- /* Store two of the ECC bytes */
- ecc_code[0] = tmp1;
- ecc_code[1] = tmp2;
-}
-
-/*
- * Calculate 3 byte ECC code for 256 byte block
- */
-static void nand_calculate_ecc (const u_char *dat, u_char *ecc_code)
-{
- u_char idx, reg1, reg3;
- int j;
-
- /* Initialize variables */
- reg1 = reg3 = 0;
- ecc_code[0] = ecc_code[1] = ecc_code[2] = 0;
-
- /* Build up column parity */
- for(j = 0; j < 256; j++) {
-
- /* Get CP0 - CP5 from table */
- idx = nand_ecc_precalc_table[dat[j]];
- reg1 ^= idx;
-
- /* All bit XOR = 1 ? */
- if (idx & 0x40) {
- reg3 ^= (u_char) j;
- }
- }
-
- /* Create non-inverted ECC code from line parity */
- nand_trans_result((reg1 & 0x40) ? ~reg3 : reg3, reg3, ecc_code);
-
- /* Calculate final ECC code */
- ecc_code[0] = ~ecc_code[0];
- ecc_code[1] = ~ecc_code[1];
- ecc_code[2] = ((~reg1) << 2) | 0x03;
-}
-
-/*
- * Detect and correct a 1 bit error for 256 byte block
- */
-static int nand_correct_data (u_char *dat, u_char *read_ecc, u_char *calc_ecc)
-{
- u_char a, b, c, d1, d2, d3, add, bit, i;
-
- /* Do error detection */
- d1 = calc_ecc[0] ^ read_ecc[0];
- d2 = calc_ecc[1] ^ read_ecc[1];
- d3 = calc_ecc[2] ^ read_ecc[2];
-
- if ((d1 | d2 | d3) == 0) {
- /* No errors */
- return 0;
- } else {
- a = (d1 ^ (d1 >> 1)) & 0x55;
- b = (d2 ^ (d2 >> 1)) & 0x55;
- c = (d3 ^ (d3 >> 1)) & 0x54;
-
- /* Found and will correct single bit error in the data */
- if ((a == 0x55) && (b == 0x55) && (c == 0x54)) {
- c = 0x80;
- add = 0;
- a = 0x80;
- for (i=0; i<4; i++) {
- if (d1 & c)
- add |= a;
- c >>= 2;
- a >>= 1;
- }
- c = 0x80;
- for (i=0; i<4; i++) {
- if (d2 & c)
- add |= a;
- c >>= 2;
- a >>= 1;
- }
- bit = 0;
- b = 0x04;
- c = 0x80;
- for (i=0; i<3; i++) {
- if (d3 & c)
- bit |= b;
- c >>= 2;
- b >>= 1;
- }
- b = 0x01;
- a = dat[add];
- a ^= (b << bit);
- dat[add] = a;
- return 1;
- }
- else {
- i = 0;
- while (d1) {
- if (d1 & 0x01)
- ++i;
- d1 >>= 1;
- }
- while (d2) {
- if (d2 & 0x01)
- ++i;
- d2 >>= 1;
- }
- while (d3) {
- if (d3 & 0x01)
- ++i;
- d3 >>= 1;
- }
- if (i == 1) {
- /* ECC Code Error Correction */
- read_ecc[0] = calc_ecc[0];
- read_ecc[1] = calc_ecc[1];
- read_ecc[2] = calc_ecc[2];
- return 2;
- }
- else {
- /* Uncorrectable Error */
- return -1;
- }
- }
- }
-
- /* Should never happen */
- return -1;
-}
-
-#endif
-
-#ifdef CONFIG_JFFS2_NAND
-int read_jffs2_nand(size_t start, size_t len,
- size_t * retlen, u_char * buf, int nanddev)
-{
- return nand_legacy_rw(nand_dev_desc + nanddev, NANDRW_READ | NANDRW_JFFS2,
- start, len, retlen, buf);
-}
-#endif /* CONFIG_JFFS2_NAND */
diff --git a/fs/jffs2/jffs2_1pass.c b/fs/jffs2/jffs2_1pass.c
index 11b66ab4b30847dc6b4f28ef9d72fb1cda7dc0a2..8c9e2eb426b014df7017a31039e0002474d29549 100644
--- a/fs/jffs2/jffs2_1pass.c
+++ b/fs/jffs2/jffs2_1pass.c
@@ -146,11 +146,7 @@ static struct part_info *current_part;
#if (defined(CONFIG_JFFS2_NAND) && \
defined(CONFIG_CMD_NAND) )
-#if defined(CONFIG_NAND_LEGACY)
-#include <linux/mtd/nand_legacy.h>
-#else
#include <nand.h>
-#endif
/*
* Support for jffs2 on top of NAND-flash
*
@@ -161,12 +157,6 @@ static struct part_info *current_part;
*
*/
-#if defined(CONFIG_NAND_LEGACY)
-/* this one defined in nand_legacy.c */
-int read_jffs2_nand(size_t start, size_t len,
- size_t * retlen, u_char * buf, int nanddev);
-#endif
-
#define NAND_PAGE_SIZE 512
#define NAND_PAGE_SHIFT 9
#define NAND_PAGE_MASK (~(NAND_PAGE_SIZE-1))
@@ -201,15 +191,6 @@ static int read_nand_cached(u32 off, u32 size, u_char *buf)
}
}
-#if defined(CONFIG_NAND_LEGACY)
- if (read_jffs2_nand(nand_cache_off, NAND_CACHE_SIZE,
- &retlen, nand_cache, id->num) < 0 ||
- retlen != NAND_CACHE_SIZE) {
- printf("read_nand_cached: error reading nand off %#x size %d bytes\n",
- nand_cache_off, NAND_CACHE_SIZE);
- return -1;
- }
-#else
retlen = NAND_CACHE_SIZE;
if (nand_read(&nand_info[id->num], nand_cache_off,
&retlen, nand_cache) != 0 ||
@@ -218,7 +199,6 @@ static int read_nand_cached(u32 off, u32 size, u_char *buf)
nand_cache_off, NAND_CACHE_SIZE);
return -1;
}
-#endif
}
cpy_bytes = nand_cache_off + NAND_CACHE_SIZE - (off + bytes_read);
if (cpy_bytes > size - bytes_read)
diff --git a/fs/jffs2/jffs2_nand_1pass.c b/fs/jffs2/jffs2_nand_1pass.c
index 6eb674550ac19d936c1acce7f0a2e27ed67a1f44..fe8c70d91d4282b2c06210ba459184b33f28ccfa 100644
--- a/fs/jffs2/jffs2_nand_1pass.c
+++ b/fs/jffs2/jffs2_nand_1pass.c
@@ -1,7 +1,5 @@
#include <common.h>
-#if !defined(CONFIG_NAND_LEGACY)
-
#include <malloc.h>
#include <linux/stat.h>
#include <linux/time.h>
@@ -1034,5 +1032,3 @@ jffs2_1pass_info(struct part_info * part)
}
return 1;
}
-
-#endif
diff --git a/include/configs/BMW.h b/include/configs/BMW.h
index 24ffb005380ee7e33032286eef4bb286a4c8f393..98f63962381e599a507575bf3a715d19a3f41e6a 100644
--- a/include/configs/BMW.h
+++ b/include/configs/BMW.h
@@ -81,13 +81,9 @@
#include <config_cmd_default.h>
#define CONFIG_CMD_DATE
-#define CONFIG_CMD_DOC
#define CONFIG_CMD_ELF
-/* CONFIG_CMD_DOC required legacy NAND support */
-#define CONFIG_NAND_LEGACY
-
#if 0
#define CONFIG_PCI 1
#define CONFIG_PCI_PNP 1 /* PCI plug-and-play */
diff --git a/include/configs/CATcenter.h b/include/configs/CATcenter.h
index 39f41e6a2dc197fcb2ae69cb96a2566e4152064c..229a5138e5811ce88756a134adf0342cc590fd8e 100644
--- a/include/configs/CATcenter.h
+++ b/include/configs/CATcenter.h
@@ -209,16 +209,8 @@
/* For CATcenter there is only NAND on the module */
#define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of NAND devices */
-#define SECTORSIZE 512
#define NAND_NO_RB
-#define ADDR_COLUMN 1
-#define ADDR_PAGE 2
-#define ADDR_COLUMN_PAGE 3
-
-#define NAND_ChipID_UNKNOWN 0x00
-#define NAND_MAX_FLOORS 1
-
#define CONFIG_SYS_NAND0_CE (0x80000000 >> 1) /* our CE is GPIO1 */
#define CONFIG_SYS_NAND0_CLE (0x80000000 >> 2) /* our CLE is GPIO2 */
#define CONFIG_SYS_NAND0_ALE (0x80000000 >> 3) /* our ALE is GPIO3 */
diff --git a/include/configs/CPU86.h b/include/configs/CPU86.h
index cf21fd90ee3714670d09db837d8f8d647d7f8a53..6d76d9ff8d4d909183ca8f87d3154a9d253e6752 100644
--- a/include/configs/CPU86.h
+++ b/include/configs/CPU86.h
@@ -145,15 +145,6 @@
#undef CONFIG_WATCHDOG /* watchdog disabled */
-/*-----------------------------------------------------------------------
- * Disk-On-Chip configuration
- */
-
-#define CONFIG_SYS_MAX_DOC_DEVICE 1 /* Max number of DOC devices */
-
-#define CONFIG_SYS_DOC_SUPPORT_2000
-#define CONFIG_SYS_DOC_SUPPORT_MILLENNIUM
-
/*-----------------------------------------------------------------------
* Miscellaneous configuration options
*/
@@ -179,7 +170,6 @@
#define CONFIG_CMD_BEDBUG
#define CONFIG_CMD_DATE
#define CONFIG_CMD_DHCP
-#define CONFIG_CMD_DOC
#define CONFIG_CMD_EEPROM
#define CONFIG_CMD_I2C
#define CONFIG_CMD_NFS
diff --git a/include/configs/CPU87.h b/include/configs/CPU87.h
index 489378a1834c12b3371930697ad0fe55d46647a6..83b010cb66ce57aade87e4ab709ae84907b374d2 100644
--- a/include/configs/CPU87.h
+++ b/include/configs/CPU87.h
@@ -182,7 +182,6 @@
#define CONFIG_CMD_BEDBUG
#define CONFIG_CMD_DATE
-#define CONFIG_CMD_DOC
#define CONFIG_CMD_EEPROM
#define CONFIG_CMD_I2C
@@ -190,9 +189,6 @@
#define CONFIG_CMD_PCI
#endif
-
-#define CONFIG_NAND_LEGACY
-
/*
* Miscellaneous configurable options
*/
diff --git a/include/configs/G2000.h b/include/configs/G2000.h
index bf9fd827532706a16494aa00fdd7743a6af91c13..6819c3e3620988eab1abe81ba2e0ef12b9ccf188 100644
--- a/include/configs/G2000.h
+++ b/include/configs/G2000.h
@@ -196,32 +196,12 @@
*-----------------------------------------------------------------------
*/
#define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of NAND devices */
-#define SECTORSIZE 512
-
-#define ADDR_COLUMN 1
-#define ADDR_PAGE 2
-#define ADDR_COLUMN_PAGE 3
-
-#define NAND_ChipID_UNKNOWN 0x00
-#define NAND_MAX_FLOORS 1
#define CONFIG_SYS_NAND_CE (0x80000000 >> 1) /* our CE is GPIO1 */
#define CONFIG_SYS_NAND_CLE (0x80000000 >> 2) /* our CLE is GPIO2 */
#define CONFIG_SYS_NAND_ALE (0x80000000 >> 3) /* our ALE is GPIO3 */
#define CONFIG_SYS_NAND_RDY (0x80000000 >> 4) /* our RDY is GPIO4 */
-#define NAND_DISABLE_CE(nand) do { out32(GPIO0_OR, in32(GPIO0_OR) | CONFIG_SYS_NAND_CE);} while(0)
-#define NAND_ENABLE_CE(nand) do { out32(GPIO0_OR, in32(GPIO0_OR) & ~CONFIG_SYS_NAND_CE);} while(0)
-#define NAND_CTL_CLRALE(nandptr) do { out32(GPIO0_OR, in32(GPIO0_OR) & ~CONFIG_SYS_NAND_ALE);} while(0)
-#define NAND_CTL_SETALE(nandptr) do { out32(GPIO0_OR, in32(GPIO0_OR) | CONFIG_SYS_NAND_ALE);} while(0)
-#define NAND_CTL_CLRCLE(nandptr) do { out32(GPIO0_OR, in32(GPIO0_OR) & ~CONFIG_SYS_NAND_CLE);} while(0)
-#define NAND_CTL_SETCLE(nandptr) do { out32(GPIO0_OR, in32(GPIO0_OR) | CONFIG_SYS_NAND_CLE);} while(0)
-#define NAND_WAIT_READY(nand) while (!(in32(GPIO0_IR) & CONFIG_SYS_NAND_RDY))
-
-#define WRITE_NAND_COMMAND(d, adr) do{ *(volatile __u8 *)((unsigned long)adr) = (__u8)(d); } while(0)
-#define WRITE_NAND_ADDRESS(d, adr) do{ *(volatile __u8 *)((unsigned long)adr) = (__u8)(d); } while(0)
-#define WRITE_NAND(d, adr) do{ *(volatile __u8 *)((unsigned long)adr) = (__u8)d; } while(0)
-#define READ_NAND(adr) ((volatile unsigned char)(*(volatile __u8 *)(unsigned long)adr))
#endif
/*-----------------------------------------------------------------------
diff --git a/include/configs/GEN860T.h b/include/configs/GEN860T.h
index 8f18ab242d742ebcd75090b4a38ba56101336abc..12f879a0e0012e3c05728e32895098a1c1631bd3 100644
--- a/include/configs/GEN860T.h
+++ b/include/configs/GEN860T.h
@@ -244,10 +244,6 @@
#define CONFIG_CMD_MII
#define CONFIG_CMD_BEDBUG
-#if !defined(CONFIG_SC)
- #define CONFIG_CMD_DOC
-#endif
-
#ifdef CONFIG_POST
#define CONFIG_CMD_DIAG
#endif
@@ -279,9 +275,6 @@
#define CONFIG_FPGA_VIRTEX2
#define CONFIG_SYS_FPGA_PROG_FEEDBACK
-
-#define CONFIG_NAND_LEGACY
-
/*
* Verbose help from command monitor.
*/
@@ -737,16 +730,6 @@
#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
#define BOOTFLAG_WARM 0x02 /* Software reboot */
-/*
- * Disk On Chip (millenium) configuration
- */
-#if !defined(CONFIG_SC)
-#define CONFIG_SYS_MAX_DOC_DEVICE 1
-#undef CONFIG_SYS_DOC_SUPPORT_2000
-#define CONFIG_SYS_DOC_SUPPORT_MILLENNIUM
-#undef CONFIG_SYS_DOC_PASSIVE_PROBE
-#endif
-
/*
* FEC interrupt assignment
*/
diff --git a/include/configs/MIP405.h b/include/configs/MIP405.h
index da9b1cfff628639b0b566e6b971815988c85b55e..7ac934225191bd82eee64e564fdc11169170e84c 100644
--- a/include/configs/MIP405.h
+++ b/include/configs/MIP405.h
@@ -84,12 +84,9 @@
#if !defined(CONFIG_MIP405T)
#define CONFIG_CMD_USB
- #define CONFIG_CMD_DOC
#endif
-#define CONFIG_NAND_LEGACY
-
#define CONFIG_SYS_HUSH_PARSER
#define CONFIG_SYS_PROMPT_HUSH_PS2 "> "
/**************************************************************
@@ -383,13 +380,6 @@
#define CONFIG_MAC_PARTITION
#define CONFIG_ISO_PARTITION /* Experimental */
-/************************************************************
- * Disk-On-Chip configuration
- ************************************************************/
-#define CONFIG_SYS_MAX_DOC_DEVICE 1 /* Max number of DOC devices */
-#define CONFIG_SYS_DOC_SHORT_TIMEOUT
-#define CONFIG_SYS_DOC_SUPPORT_2000
-#define CONFIG_SYS_DOC_SUPPORT_MILLENNIUM
/************************************************************
* Keyboard support
************************************************************/
diff --git a/include/configs/NETPHONE.h b/include/configs/NETPHONE.h
index 796938a518476c778f052892225ac8963953b4dd..8a197ad9900b2e33e58aad6e217e54703e99948b 100644
--- a/include/configs/NETPHONE.h
+++ b/include/configs/NETPHONE.h
@@ -497,95 +497,9 @@
#define DSP_BASE 0xF1000000
#define NAND_BASE 0xF1010000
-/****************************************************************/
-
-/* NAND */
-#define CONFIG_NAND_LEGACY
-#define CONFIG_SYS_NAND_BASE NAND_BASE
-#define CONFIG_MTD_NAND_ECC_JFFS2
-#define CONFIG_MTD_NAND_VERIFY_WRITE
-#define CONFIG_MTD_NAND_UNSAFE
-
-#define CONFIG_SYS_MAX_NAND_DEVICE 1
-
-#define SECTORSIZE 512
-#define ADDR_COLUMN 1
-#define ADDR_PAGE 2
-#define ADDR_COLUMN_PAGE 3
-#define NAND_ChipID_UNKNOWN 0x00
-#define NAND_MAX_FLOORS 1
-
-/* ALE = PD17, CLE = PE18, CE = PE20, F_RY_BY = PE31 */
-#define NAND_DISABLE_CE(nand) \
- do { \
- (((volatile immap_t *)CONFIG_SYS_IMMR)->im_cpm.cp_pedat) |= (1 << (31 - 20)); \
- } while(0)
-
-#define NAND_ENABLE_CE(nand) \
- do { \
- (((volatile immap_t *)CONFIG_SYS_IMMR)->im_cpm.cp_pedat) &= ~(1 << (31 - 20)); \
- } while(0)
-
-#define NAND_CTL_CLRALE(nandptr) \
- do { \
- (((volatile immap_t *)CONFIG_SYS_IMMR)->im_cpm.cp_pedat) &= ~(1 << (31 - 17)); \
- } while(0)
-
-#define NAND_CTL_SETALE(nandptr) \
- do { \
- (((volatile immap_t *)CONFIG_SYS_IMMR)->im_cpm.cp_pedat) |= (1 << (31 - 17)); \
- } while(0)
-
-#define NAND_CTL_CLRCLE(nandptr) \
- do { \
- (((volatile immap_t *)CONFIG_SYS_IMMR)->im_cpm.cp_pedat) &= ~(1 << (31 - 18)); \
- } while(0)
-
-#define NAND_CTL_SETCLE(nandptr) \
- do { \
- (((volatile immap_t *)CONFIG_SYS_IMMR)->im_cpm.cp_pedat) |= (1 << (31 - 18)); \
- } while(0)
-
-#if CONFIG_NETPHONE_VERSION == 1
-#define NAND_WAIT_READY(nand) \
- do { \
- int _tries = 0; \
- while ((((volatile immap_t *)CONFIG_SYS_IMMR)->im_cpm.cp_pedat & (1 << (31 - 31))) == 0) \
- if (++_tries > 100000) \
- break; \
- } while (0)
-#elif CONFIG_NETPHONE_VERSION == 2
-#define NAND_WAIT_READY(nand) \
- do { \
- int _tries = 0; \
- while ((((volatile immap_t *)CONFIG_SYS_IMMR)->im_ioport.iop_pcdat & (1 << (15 - 15))) == 0) \
- if (++_tries > 100000) \
- break; \
- } while (0)
-#endif
-
-#define WRITE_NAND_COMMAND(d, adr) \
- do { \
- *(volatile unsigned char *)((unsigned long)(adr)) = (unsigned char)(d); \
- } while(0)
-
-#define WRITE_NAND_ADDRESS(d, adr) \
- do { \
- *(volatile unsigned char *)((unsigned long)(adr)) = (unsigned char)(d); \
- } while(0)
-
-#define WRITE_NAND(d, adr) \
- do { \
- *(volatile unsigned char *)((unsigned long)(adr)) = (unsigned char)(d); \
- } while(0)
-
-#define READ_NAND(adr) \
- ((unsigned char)(*(volatile unsigned char *)(unsigned long)(adr)))
-
/*****************************************************************************/
#define CONFIG_SYS_DIRECT_FLASH_TFTP
-#define CONFIG_SYS_DIRECT_NAND_TFTP
/*****************************************************************************/
diff --git a/include/configs/NETTA.h b/include/configs/NETTA.h
index 724e8073981d4aee46a7bc86f4987433850245ba..dda61797533e30757cc3410b9a9fb3551db18c08 100644
--- a/include/configs/NETTA.h
+++ b/include/configs/NETTA.h
@@ -616,105 +616,6 @@
#define ER_BASE 0xF1020000
#define DUMMY_BASE 0xF1FF0000
-/****************************************************************/
-
-/* NAND */
-#define CONFIG_NAND_LEGACY
-#define CONFIG_SYS_NAND_BASE NAND_BASE
-#define CONFIG_MTD_NAND_VERIFY_WRITE
-#define CONFIG_MTD_NAND_UNSAFE
-
-#define CONFIG_SYS_MAX_NAND_DEVICE 1
-/* #define NAND_NO_RB */
-
-#define SECTORSIZE 512
-#define ADDR_COLUMN 1
-#define ADDR_PAGE 2
-#define ADDR_COLUMN_PAGE 3
-#define NAND_ChipID_UNKNOWN 0x00
-#define NAND_MAX_FLOORS 1
-
-/* ALE = PD3, CLE = PD4, CE = PD5, F_RY_BY = PC13 */
-#define NAND_DISABLE_CE(nand) \
- do { \
- (((volatile immap_t *)CONFIG_SYS_IMMR)->im_ioport.iop_pddat) |= (1 << (15 - 5)); \
- } while(0)
-
-#define NAND_ENABLE_CE(nand) \
- do { \
- (((volatile immap_t *)CONFIG_SYS_IMMR)->im_ioport.iop_pddat) &= ~(1 << (15 - 5)); \
- } while(0)
-
-#define NAND_CTL_CLRALE(nandptr) \
- do { \
- (((volatile immap_t *)CONFIG_SYS_IMMR)->im_ioport.iop_pddat) &= ~(1 << (15 - 3)); \
- } while(0)
-
-#define NAND_CTL_SETALE(nandptr) \
- do { \
- (((volatile immap_t *)CONFIG_SYS_IMMR)->im_ioport.iop_pddat) |= (1 << (15 - 3)); \
- } while(0)
-
-#define NAND_CTL_CLRCLE(nandptr) \
- do { \
- (((volatile immap_t *)CONFIG_SYS_IMMR)->im_ioport.iop_pddat) &= ~(1 << (15 - 4)); \
- } while(0)
-
-#define NAND_CTL_SETCLE(nandptr) \
- do { \
- (((volatile immap_t *)CONFIG_SYS_IMMR)->im_ioport.iop_pddat) |= (1 << (15 - 4)); \
- } while(0)
-
-#ifndef NAND_NO_RB
-#define NAND_WAIT_READY(nand) \
- do { \
- while ((((volatile immap_t *)CONFIG_SYS_IMMR)->im_ioport.iop_pcdat & (1 << (15 - 13))) == 0) { \
- WATCHDOG_RESET(); \
- } \
- } while (0)
-#else
-#define NAND_WAIT_READY(nand) udelay(12)
-#endif
-
-#define WRITE_NAND_COMMAND(d, adr) \
- do { \
- *(volatile unsigned char *)((unsigned long)(adr)) = (unsigned char)(d); \
- } while(0)
-
-#define WRITE_NAND_ADDRESS(d, adr) \
- do { \
- *(volatile unsigned char *)((unsigned long)(adr)) = (unsigned char)(d); \
- } while(0)
-
-#define WRITE_NAND(d, adr) \
- do { \
- *(volatile unsigned char *)((unsigned long)(adr)) = (unsigned char)(d); \
- } while(0)
-
-#define READ_NAND(adr) \
- ((unsigned char)(*(volatile unsigned char *)(unsigned long)(adr)))
-
-#define CONFIG_JFFS2_NAND 1 /* jffs2 on nand support */
-#define NAND_CACHE_PAGES 16 /* size of nand cache in 512 bytes pages */
-
-/*
- * JFFS2 partitions
- *
- */
-/* No command line, one static partition, whole device */
-#undef CONFIG_CMD_MTDPARTS
-#define CONFIG_JFFS2_DEV "nand0"
-#define CONFIG_JFFS2_PART_SIZE 0x00100000
-#define CONFIG_JFFS2_PART_OFFSET 0x00200000
-
-/* mtdparts command line support */
-/* Note: fake mtd_id used, no linux mtd map file */
-/*
-#define CONFIG_CMD_MTDPARTS
-#define MTDIDS_DEFAULT "nand0=netta-nand"
-#define MTDPARTS_DEFAULT "mtdparts=netta-nand:1m@2m(jffs2)"
-*/
-
/*****************************************************************************/
#define CONFIG_SYS_DIRECT_FLASH_TFTP
diff --git a/include/configs/NETTA2.h b/include/configs/NETTA2.h
index a14b2dd8971612210c4f739966204a7ca91a1e5b..167285e0aadcd3fdf5560dd10efc83f4835636aa 100644
--- a/include/configs/NETTA2.h
+++ b/include/configs/NETTA2.h
@@ -498,95 +498,9 @@
#define DSP_BASE 0xF1000000
#define NAND_BASE 0xF1010000
-/****************************************************************/
-
-/* NAND */
-#define CONFIG_NAND_LEGACY
-#define CONFIG_SYS_NAND_BASE NAND_BASE
-#define CONFIG_MTD_NAND_ECC_JFFS2
-#define CONFIG_MTD_NAND_VERIFY_WRITE
-#define CONFIG_MTD_NAND_UNSAFE
-
-#define CONFIG_SYS_MAX_NAND_DEVICE 1
-
-#define SECTORSIZE 512
-#define ADDR_COLUMN 1
-#define ADDR_PAGE 2
-#define ADDR_COLUMN_PAGE 3
-#define NAND_ChipID_UNKNOWN 0x00
-#define NAND_MAX_FLOORS 1
-
-/* ALE = PD17, CLE = PE18, CE = PE20, F_RY_BY = PE31 */
-#define NAND_DISABLE_CE(nand) \
- do { \
- (((volatile immap_t *)CONFIG_SYS_IMMR)->im_cpm.cp_pedat) |= (1 << (31 - 20)); \
- } while(0)
-
-#define NAND_ENABLE_CE(nand) \
- do { \
- (((volatile immap_t *)CONFIG_SYS_IMMR)->im_cpm.cp_pedat) &= ~(1 << (31 - 20)); \
- } while(0)
-
-#define NAND_CTL_CLRALE(nandptr) \
- do { \
- (((volatile immap_t *)CONFIG_SYS_IMMR)->im_cpm.cp_pedat) &= ~(1 << (31 - 17)); \
- } while(0)
-
-#define NAND_CTL_SETALE(nandptr) \
- do { \
- (((volatile immap_t *)CONFIG_SYS_IMMR)->im_cpm.cp_pedat) |= (1 << (31 - 17)); \
- } while(0)
-
-#define NAND_CTL_CLRCLE(nandptr) \
- do { \
- (((volatile immap_t *)CONFIG_SYS_IMMR)->im_cpm.cp_pedat) &= ~(1 << (31 - 18)); \
- } while(0)
-
-#define NAND_CTL_SETCLE(nandptr) \
- do { \
- (((volatile immap_t *)CONFIG_SYS_IMMR)->im_cpm.cp_pedat) |= (1 << (31 - 18)); \
- } while(0)
-
-#if CONFIG_NETTA2_VERSION == 1
-#define NAND_WAIT_READY(nand) \
- do { \
- int _tries = 0; \
- while ((((volatile immap_t *)CONFIG_SYS_IMMR)->im_cpm.cp_pedat & (1 << (31 - 31))) == 0) \
- if (++_tries > 100000) \
- break; \
- } while (0)
-#elif CONFIG_NETTA2_VERSION == 2
-#define NAND_WAIT_READY(nand) \
- do { \
- int _tries = 0; \
- while ((((volatile immap_t *)CONFIG_SYS_IMMR)->im_ioport.iop_pcdat & (1 << (15 - 15))) == 0) \
- if (++_tries > 100000) \
- break; \
- } while (0)
-#endif
-
-#define WRITE_NAND_COMMAND(d, adr) \
- do { \
- *(volatile unsigned char *)((unsigned long)(adr)) = (unsigned char)(d); \
- } while(0)
-
-#define WRITE_NAND_ADDRESS(d, adr) \
- do { \
- *(volatile unsigned char *)((unsigned long)(adr)) = (unsigned char)(d); \
- } while(0)
-
-#define WRITE_NAND(d, adr) \
- do { \
- *(volatile unsigned char *)((unsigned long)(adr)) = (unsigned char)(d); \
- } while(0)
-
-#define READ_NAND(adr) \
- ((unsigned char)(*(volatile unsigned char *)(unsigned long)(adr)))
-
/*****************************************************************************/
#define CONFIG_SYS_DIRECT_FLASH_TFTP
-#define CONFIG_SYS_DIRECT_NAND_TFTP
/*****************************************************************************/
diff --git a/include/configs/NETVIA.h b/include/configs/NETVIA.h
index f97bdcb72dd332afacb01a62e805f2fbedcf0f64..b9cf621633f61dfd9743b2596a1f8b16db7d417a 100644
--- a/include/configs/NETVIA.h
+++ b/include/configs/NETVIA.h
@@ -393,80 +393,6 @@
#endif
-/*****************************************************************************/
-
-#define CONFIG_NAND_LEGACY
-
-#if defined(CONFIG_NETVIA_VERSION) && CONFIG_NETVIA_VERSION >= 2
-
-/* NAND */
-#define CONFIG_SYS_NAND_BASE NAND_BASE
-#define CONFIG_MTD_NAND_ECC_JFFS2
-
-#define CONFIG_SYS_MAX_NAND_DEVICE 1
-
-#define SECTORSIZE 512
-#define ADDR_COLUMN 1
-#define ADDR_PAGE 2
-#define ADDR_COLUMN_PAGE 3
-#define NAND_ChipID_UNKNOWN 0x00
-#define NAND_MAX_FLOORS 1
-
-#define NAND_DISABLE_CE(nand) \
- do { \
- (((volatile immap_t *)CONFIG_SYS_IMMR)->im_ioport.iop_pddat) |= 0x0040; \
- } while(0)
-
-#define NAND_ENABLE_CE(nand) \
- do { \
- (((volatile immap_t *)CONFIG_SYS_IMMR)->im_ioport.iop_pddat) &= ~0x0040; \
- } while(0)
-
-#define NAND_CTL_CLRALE(nandptr) \
- do { \
- (((volatile immap_t *)CONFIG_SYS_IMMR)->im_ioport.iop_pddat) &= ~0x0100; \
- } while(0)
-
-#define NAND_CTL_SETALE(nandptr) \
- do { \
- (((volatile immap_t *)CONFIG_SYS_IMMR)->im_ioport.iop_pddat) |= 0x0100; \
- } while(0)
-
-#define NAND_CTL_CLRCLE(nandptr) \
- do { \
- (((volatile immap_t *)CONFIG_SYS_IMMR)->im_ioport.iop_pddat) &= ~0x0080; \
- } while(0)
-
-#define NAND_CTL_SETCLE(nandptr) \
- do { \
- (((volatile immap_t *)CONFIG_SYS_IMMR)->im_ioport.iop_pddat) |= 0x0080; \
- } while(0)
-
-#define NAND_WAIT_READY(nand) \
- do { \
- while ((((volatile immap_t *)CONFIG_SYS_IMMR)->im_ioport.iop_pcdat & 0x100) == 0) \
- ; \
- } while (0)
-
-#define WRITE_NAND_COMMAND(d, adr) \
- do { \
- *(volatile unsigned char *)((unsigned long)(adr)) = (unsigned char)(d); \
- } while(0)
-
-#define WRITE_NAND_ADDRESS(d, adr) \
- do { \
- *(volatile unsigned char *)((unsigned long)(adr)) = (unsigned char)(d); \
- } while(0)
-
-#define WRITE_NAND(d, adr) \
- do { \
- *(volatile unsigned char *)((unsigned long)(adr)) = (unsigned char)(d); \
- } while(0)
-
-#define READ_NAND(adr) \
- ((unsigned char)(*(volatile unsigned char *)(unsigned long)(adr)))
-
-#endif
/*****************************************************************************/
diff --git a/include/configs/PCIPPC2.h b/include/configs/PCIPPC2.h
index 5951d007d5151039ffb050e262b5a750d8cb50ef..99a8c4a6466d62695de3108ed5e72b0599ebd261 100644
--- a/include/configs/PCIPPC2.h
+++ b/include/configs/PCIPPC2.h
@@ -75,7 +75,6 @@
#define CONFIG_CMD_BSP
#define CONFIG_CMD_DATE
#define CONFIG_CMD_DHCP
-#define CONFIG_CMD_DOC
#define CONFIG_CMD_ELF
#define CONFIG_CMD_NFS
#define CONFIG_CMD_PCI
@@ -84,8 +83,6 @@
#define CONFIG_PCI 1
#define CONFIG_PCI_PNP 1 /* PCI plug-and-play */
-#define CONFIG_NAND_LEGACY
-
/*
* Miscellaneous configurable options
*/
@@ -250,15 +247,6 @@
#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
#define BOOTFLAG_WARM 0x02 /* Software reboot */
-/*-----------------------------------------------------------------------
- * Disk-On-Chip configuration
- */
-
-#define CONFIG_SYS_MAX_DOC_DEVICE 1 /* Max number of DOC devices */
-
-#define CONFIG_SYS_DOC_SUPPORT_2000
-#undef CONFIG_SYS_DOC_SUPPORT_MILLENNIUM
-
/*-----------------------------------------------------------------------
RTC m48t59
*/
diff --git a/include/configs/PCIPPC6.h b/include/configs/PCIPPC6.h
index a683a8fbb0a3e3d8470a190bb4aee959a459bce6..66e6d24817d3c91fb39cc809064a758ed152404b 100644
--- a/include/configs/PCIPPC6.h
+++ b/include/configs/PCIPPC6.h
@@ -75,7 +75,6 @@
#define CONFIG_CMD_BSP
#define CONFIG_CMD_DATE
#define CONFIG_CMD_DHCP
-#define CONFIG_CMD_DOC
#define CONFIG_CMD_ELF
#define CONFIG_CMD_NFS
#define CONFIG_CMD_PCI
@@ -86,8 +85,6 @@
#define CONFIG_PCI 1
#define CONFIG_PCI_PNP 1 /* PCI plug-and-play */
-#define CONFIG_NAND_LEGACY
-
/*
* Miscellaneous configurable options
*/
@@ -252,15 +249,6 @@
#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
#define BOOTFLAG_WARM 0x02 /* Software reboot */
-/*-----------------------------------------------------------------------
- * Disk-On-Chip configuration
- */
-
-#define CONFIG_SYS_MAX_DOC_DEVICE 1 /* Max number of DOC devices */
-
-#define CONFIG_SYS_DOC_SUPPORT_2000
-#undef CONFIG_SYS_DOC_SUPPORT_MILLENNIUM
-
/*-----------------------------------------------------------------------
RTC m48t59
*/
diff --git a/include/configs/PIP405.h b/include/configs/PIP405.h
index e301599b8a993e806dffe0b424aa49460b1cfdd2..962b29e95b56b494f14d2525cb99cf391af8d2ff 100644
--- a/include/configs/PIP405.h
+++ b/include/configs/PIP405.h
@@ -71,14 +71,10 @@
#define CONFIG_CMD_USB
#define CONFIG_CMD_MII
#define CONFIG_CMD_SDRAM
-#define CONFIG_CMD_DOC
#define CONFIG_CMD_PING
#define CONFIG_CMD_SAVES
#define CONFIG_CMD_BSP
-
-#define CONFIG_NAND_LEGACY
-
#define CONFIG_SYS_HUSH_PARSER
#define CONFIG_SYS_PROMPT_HUSH_PS2 "> "
/**************************************************************
diff --git a/include/configs/PM520.h b/include/configs/PM520.h
index ff73ef9a290e02b6fff2b714440319aa3332669c..f9687d2743f50c879f2381f70225dbb4e2005001 100644
--- a/include/configs/PM520.h
+++ b/include/configs/PM520.h
@@ -86,12 +86,6 @@
#define CONFIG_USB_STORAGE
#endif
-#if !defined(CONFIG_BOOT_ROM)
-/* DoC requires legacy NAND for now */
-#define CONFIG_NAND_LEGACY
-#endif
-
-
/*
* BOOTP options
*/
@@ -117,10 +111,6 @@
#define CONFIG_CMD_SNTP
#define CONFIG_CMD_USB
-#if !defined(CONFIG_BOOT_ROM)
-#define CONFIG_CMD_DOC
-#endif
-
#if defined(CONFIG_MPC5200)
#define CONFIG_CMD_PCI
#endif
@@ -186,15 +176,6 @@
#define CONFIG_RTC_PCF8563
#define CONFIG_SYS_I2C_RTC_ADDR 0x51
-/*
- * Disk-On-Chip configuration
- */
-
-#define CONFIG_SYS_DOC_SHORT_TIMEOUT
-#define CONFIG_SYS_MAX_DOC_DEVICE 1 /* Max number of DOC devices */
-
-#define CONFIG_SYS_DOC_SUPPORT_2000
-#define CONFIG_SYS_DOC_SUPPORT_MILLENNIUM
#define CONFIG_SYS_DOC_BASE 0xE0000000
#define CONFIG_SYS_DOC_SIZE 0x00100000
diff --git a/include/configs/PM826.h b/include/configs/PM826.h
index b58f529b964a4de91d01941e6cb75a355b9aec0a..636bd26a7a10d0f4cf9b5721d0229e6abcb10350 100644
--- a/include/configs/PM826.h
+++ b/include/configs/PM826.h
@@ -169,7 +169,6 @@
#define CONFIG_CMD_BEDBUG
#define CONFIG_CMD_DATE
#define CONFIG_CMD_DHCP
-#define CONFIG_CMD_DOC
#define CONFIG_CMD_EEPROM
#define CONFIG_CMD_I2C
#define CONFIG_CMD_NFS
@@ -179,19 +178,6 @@
#define CONFIG_CMD_PCI
#endif
-
-#define CONFIG_NAND_LEGACY
-
-/*
- * Disk-On-Chip configuration
- */
-
-#define CONFIG_SYS_DOC_SHORT_TIMEOUT
-#define CONFIG_SYS_MAX_DOC_DEVICE 1 /* Max number of DOC devices */
-
-#define CONFIG_SYS_DOC_SUPPORT_2000
-#define CONFIG_SYS_DOC_SUPPORT_MILLENNIUM
-
/*
* Miscellaneous configurable options
*/
diff --git a/include/configs/PM828.h b/include/configs/PM828.h
index 96c86f7e90130f9657bc08543e2a0088bf594c32..9d620af05ad3232de9baf82ee175a3273f63915d 100644
--- a/include/configs/PM828.h
+++ b/include/configs/PM828.h
@@ -169,7 +169,6 @@
#define CONFIG_CMD_BEDBUG
#define CONFIG_CMD_DATE
#define CONFIG_CMD_DHCP
-#define CONFIG_CMD_DOC
#define CONFIG_CMD_EEPROM
#define CONFIG_CMD_I2C
#define CONFIG_CMD_NFS
@@ -179,18 +178,6 @@
#define CONFIG_CMD_PCI
#endif
-
-/*
- * Disk-On-Chip configuration
- */
-#define CONFIG_NAND_LEGACY
-
-#define CONFIG_SYS_DOC_SHORT_TIMEOUT
-#define CONFIG_SYS_MAX_DOC_DEVICE 1 /* Max number of DOC devices */
-
-#define CONFIG_SYS_DOC_SUPPORT_2000
-#define CONFIG_SYS_DOC_SUPPORT_MILLENNIUM
-
/*
* Miscellaneous configurable options
*/
diff --git a/include/configs/PPChameleonEVB.h b/include/configs/PPChameleonEVB.h
index 6331464ec5624728360f56f42cfa9c6f96b8a8e1..6fba0caad2d5868e9a9c78af6a6835ea6cf038e8 100644
--- a/include/configs/PPChameleonEVB.h
+++ b/include/configs/PPChameleonEVB.h
@@ -312,32 +312,6 @@
} \
} while(0)
-#if 0
-#define SECTORSIZE 512
-#define NAND_NO_RB
-
-#define ADDR_COLUMN 1
-#define ADDR_PAGE 2
-#define ADDR_COLUMN_PAGE 3
-
-#define NAND_ChipID_UNKNOWN 0x00
-#define NAND_MAX_FLOORS 1
-
-#ifdef NAND_NO_RB
-/* constant delay (see also tR in the datasheet) */
-#define NAND_WAIT_READY(nand) do { \
- udelay(12); \
-} while (0)
-#else
-/* use the R/B pin */
-/* TBD */
-#endif
-
-#define WRITE_NAND_COMMAND(d, adr) do{ *(volatile __u8 *)((unsigned long)adr) = (__u8)(d); } while(0)
-#define WRITE_NAND_ADDRESS(d, adr) do{ *(volatile __u8 *)((unsigned long)adr) = (__u8)(d); } while(0)
-#define WRITE_NAND(d, adr) do{ *(volatile __u8 *)((unsigned long)adr) = (__u8)d; } while(0)
-#define READ_NAND(adr) ((volatile unsigned char)(*(volatile __u8 *)(unsigned long)adr))
-#endif
/*-----------------------------------------------------------------------
* PCI stuff
*-----------------------------------------------------------------------
diff --git a/include/configs/RBC823.h b/include/configs/RBC823.h
index f36244d12c8b71a76f8a4539677d049a1ac62a79..00ac6cf1f3a685c3749e4a9bd72da4124a74b3ba 100644
--- a/include/configs/RBC823.h
+++ b/include/configs/RBC823.h
@@ -114,7 +114,6 @@
#define CONFIG_CMD_CDP
#define CONFIG_CMD_DHCP
#define CONFIG_CMD_DIAG
-#define CONFIG_CMD_DOC
#define CONFIG_CMD_EEPROM
#define CONFIG_CMD_ELF
#define CONFIG_CMD_FAT
@@ -329,14 +328,6 @@
#endif
-/************************************************************
- * Disk-On-Chip configuration
- ************************************************************/
-#define CONFIG_SYS_MAX_DOC_DEVICE 1 /* Max number of DOC devices */
-#define CONFIG_SYS_DOC_SHORT_TIMEOUT
-#define CONFIG_SYS_DOC_SUPPORT_2000
-#define CONFIG_SYS_DOC_SUPPORT_MILLENNIUM
-
/*-----------------------------------------------------------------------
*
*-----------------------------------------------------------------------
diff --git a/include/configs/SXNI855T.h b/include/configs/SXNI855T.h
index cac04b4017a9beb6cc516e490d61424c29d23f93..8ee8cbf0b5198f627893965f3bb11b79dff44ba9 100644
--- a/include/configs/SXNI855T.h
+++ b/include/configs/SXNI855T.h
@@ -163,75 +163,8 @@
#define CONFIG_CMD_EEPROM
#define CONFIG_CMD_JFFS2
-#define CONFIG_CMD_NAND
#define CONFIG_CMD_DATE
-
-#define CONFIG_SYS_JFFS2_SORT_FRAGMENTS
-
-/*
- * JFFS2 partitions
- *
- */
-/* No command line, one static partition */
-#undef CONFIG_CMD_MTDPARTS
-
-/*
-#define CONFIG_JFFS2_DEV "nor0"
-#define CONFIG_JFFS2_PART_SIZE 0x00780000
-#define CONFIG_JFFS2_PART_OFFSET 0x00080000
-*/
-
-#define CONFIG_JFFS2_DEV "nand0"
-#define CONFIG_JFFS2_PART_SIZE 0x00200000
-#define CONFIG_JFFS2_PART_OFFSET 0x00000000
-
-/* mtdparts command line support */
-/* Note: fake mtd_id used, no linux mtd map file */
-/*
-#define CONFIG_CMD_MTDPARTS
-#define MTDIDS_DEFAULT "nor0=sixnet-0,nand0=sixnet-nand"
-#define MTDPARTS_DEFAULT "mtdparts=sixnet-0:7680k@512k();sixnet-nand:2m(jffs2-nand)"
-*/
-
-/* NAND flash support */
-#define CONFIG_NAND_LEGACY
-#define CONFIG_MTD_NAND_ECC_JFFS2
-#define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of NAND devices */
-#define SECTORSIZE 512
-
-#define ADDR_COLUMN 1
-#define ADDR_PAGE 2
-#define ADDR_COLUMN_PAGE 3
-
-#define NAND_ChipID_UNKNOWN 0x00
-#define NAND_MAX_FLOORS 1
-
-/* DFBUSY is available on Port C, bit 12; 0 if busy */
-#define NAND_WAIT_READY(nand) \
- while (!(((volatile immap_t *)CONFIG_SYS_IMMR)->im_ioport.iop_pcdat & 0x0008));
-#define WRITE_NAND_COMMAND(d, adr) WRITE_NAND((d), (adr))
-#define WRITE_NAND_ADDRESS(d, adr) WRITE_NAND((d), (adr))
-#define WRITE_NAND(d, adr) \
- do { (*(volatile uint8_t *)(adr) = (uint8_t)(d)); } while (0)
-#define READ_NAND(adr) (*(volatile uint8_t *)(adr))
-#define CLE_LO 0x01 /* 0 selects CLE mode (CLE high) */
-#define ALE_LO 0x02 /* 0 selects ALE mode (ALE high) */
-#define CE_LO 0x04 /* 1 selects chip (CE low) */
-#define nand_setcr(cr, val) do {*(volatile uint8_t*)(cr) = (val);} while (0)
-#define NAND_DISABLE_CE(nand) \
- nand_setcr((nand)->IO_ADDR + 1, ALE_LO | CLE_LO)
-#define NAND_ENABLE_CE(nand) \
- nand_setcr((nand)->IO_ADDR + 1, CE_LO | ALE_LO | CLE_LO)
-#define NAND_CTL_CLRALE(nandptr) \
- nand_setcr((nandptr) + 1, CE_LO | ALE_LO | CLE_LO)
-#define NAND_CTL_SETALE(nandptr) \
- nand_setcr((nandptr) + 1, CE_LO | CLE_LO)
-#define NAND_CTL_CLRCLE(nandptr) \
- nand_setcr((nandptr) + 1, CE_LO | ALE_LO | CLE_LO)
-#define NAND_CTL_SETCLE(nandptr) \
- nand_setcr((nandptr) + 1, CE_LO | ALE_LO)
-
/*
* Miscellaneous configurable options
*/
diff --git a/include/configs/TQM85xx.h b/include/configs/TQM85xx.h
index cc3649e50c75eea7fcdf99a792402b2872c4fbf9..1fbf4bf49244b3e2591af55836b36d86feba3b22 100644
--- a/include/configs/TQM85xx.h
+++ b/include/configs/TQM85xx.h
@@ -351,8 +351,6 @@
/* NAND FLASH */
#ifdef CONFIG_NAND
-#undef CONFIG_NAND_LEGACY
-
#define CONFIG_NAND_FSL_UPM 1
#define CONFIG_MTD_NAND_ECC_JFFS2 1 /* use JFFS2 ECC */
diff --git a/include/configs/VCMA9.h b/include/configs/VCMA9.h
index 7edea6a0478bbf6547e6ae2b72ae0e6c50337b9b..6051480254339a33c9cf490b0a6875329a0d7e5d 100644
--- a/include/configs/VCMA9.h
+++ b/include/configs/VCMA9.h
@@ -246,42 +246,4 @@
#define MULTI_PURPOSE_SOCKET_ADDR 0x08000000
-/*-----------------------------------------------------------------------
- * NAND flash settings
- */
-#if defined(CONFIG_CMD_NAND)
-
-#define CONFIG_NAND_LEGACY
-#define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of NAND devices */
-#define SECTORSIZE 512
-
-#define ADDR_COLUMN 1
-#define ADDR_PAGE 2
-#define ADDR_COLUMN_PAGE 3
-
-#define NAND_ChipID_UNKNOWN 0x00
-#define NAND_MAX_FLOORS 1
-
-#define NAND_WAIT_READY(nand) NF_WaitRB()
-
-#define NAND_DISABLE_CE(nand) NF_SetCE(NFCE_HIGH)
-#define NAND_ENABLE_CE(nand) NF_SetCE(NFCE_LOW)
-
-
-#define WRITE_NAND_COMMAND(d, adr) NF_Cmd(d)
-#define WRITE_NAND_COMMANDW(d, adr) NF_CmdW(d)
-#define WRITE_NAND_ADDRESS(d, adr) NF_Addr(d)
-#define WRITE_NAND(d, adr) NF_Write(d)
-#define READ_NAND(adr) NF_Read()
-/* the following functions are NOP's because S3C24X0 handles this in hardware */
-#define NAND_CTL_CLRALE(nandptr)
-#define NAND_CTL_SETALE(nandptr)
-#define NAND_CTL_CLRCLE(nandptr)
-#define NAND_CTL_SETCLE(nandptr)
-
-#define CONFIG_MTD_NAND_VERIFY_WRITE 1
-#define CONFIG_MTD_NAND_ECC_JFFS2 1
-
-#endif
-
#endif /* __CONFIG_H */
diff --git a/include/configs/at91rm9200dk.h b/include/configs/at91rm9200dk.h
index 56128c153ee7c59376e5940cc2fc04c92838947b..2017b666a73556192c4508e9f545115b092f437e 100644
--- a/include/configs/at91rm9200dk.h
+++ b/include/configs/at91rm9200dk.h
@@ -117,38 +117,8 @@
#define CONFIG_CMD_DHCP
#define CONFIG_CMD_MII
-#define CONFIG_CMD_NAND
-
-#define CONFIG_NAND_LEGACY
-
-#define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of NAND devices */
-#define SECTORSIZE 512
-
-#define ADDR_COLUMN 1
-#define ADDR_PAGE 2
-#define ADDR_COLUMN_PAGE 3
-
-#define NAND_ChipID_UNKNOWN 0x00
-#define NAND_MAX_FLOORS 1
-
-#define AT91_SMART_MEDIA_ALE (1 << 22) /* our ALE is AD22 */
-#define AT91_SMART_MEDIA_CLE (1 << 21) /* our CLE is AD21 */
#include <asm/arch/AT91RM9200.h> /* needed for port definitions */
-#define NAND_DISABLE_CE(nand) do { *AT91C_PIOC_SODR = AT91C_PIO_PC0;} while(0)
-#define NAND_ENABLE_CE(nand) do { *AT91C_PIOC_CODR = AT91C_PIO_PC0;} while(0)
-
-#define NAND_WAIT_READY(nand) while (!(*AT91C_PIOC_PDSR & AT91C_PIO_PC2))
-
-#define WRITE_NAND_COMMAND(d, adr) do{ *(volatile __u8 *)((unsigned long)adr | AT91_SMART_MEDIA_CLE) = (__u8)(d); } while(0)
-#define WRITE_NAND_ADDRESS(d, adr) do{ *(volatile __u8 *)((unsigned long)adr | AT91_SMART_MEDIA_ALE) = (__u8)(d); } while(0)
-#define WRITE_NAND(d, adr) do{ *(volatile __u8 *)((unsigned long)adr) = (__u8)d; } while(0)
-#define READ_NAND(adr) ((volatile unsigned char)(*(volatile __u8 *)(unsigned long)adr))
-/* the following are NOP's in our implementation */
-#define NAND_CTL_CLRALE(nandptr)
-#define NAND_CTL_SETALE(nandptr)
-#define NAND_CTL_CLRCLE(nandptr)
-#define NAND_CTL_SETCLE(nandptr)
#define CONFIG_NR_DRAM_BANKS 1
#define PHYS_SDRAM 0x20000000
diff --git a/include/configs/csb637.h b/include/configs/csb637.h
index e1cdc7f66ec1cb09ec1bf446965e63d61ec13206..7a5769696a83e71ee2bfad23273e4fdef09e4e18 100644
--- a/include/configs/csb637.h
+++ b/include/configs/csb637.h
@@ -121,38 +121,6 @@
#define CONFIG_CMD_JFFS2
#define CONFIG_CMD_PING
-#ifdef NAND_SUPPORT_HAS_BEEN_FIXED /* NAND support is broken / unimplemented */
-
-#define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of NAND devices */
-#define SECTORSIZE 512
-
-#define ADDR_COLUMN 1
-#define ADDR_PAGE 2
-#define ADDR_COLUMN_PAGE 3
-
-#define NAND_ChipID_UNKNOWN 0x00
-#define NAND_MAX_FLOORS 1
-
-#define AT91_SMART_MEDIA_ALE (1 << 22) /* our ALE is AD22 */
-#define AT91_SMART_MEDIA_CLE (1 << 21) /* our CLE is AD21 */
-
-#include <asm/arch/AT91RM9200.h> /* needed for port definitions */
-#define NAND_DISABLE_CE(nand) do { *AT91C_PIOC_SODR = AT91C_PIO_PC0;} while(0)
-#define NAND_ENABLE_CE(nand) do { *AT91C_PIOC_CODR = AT91C_PIO_PC0;} while(0)
-
-#define NAND_WAIT_READY(nand) while (!(*AT91C_PIOC_PDSR & AT91C_PIO_PC2))
-
-#define WRITE_NAND_COMMAND(d, adr) do{ *(volatile __u8 *)((unsigned long)adr | AT91_SMART_MEDIA_CLE) = (__u8)(d); } while(0)
-#define WRITE_NAND_ADDRESS(d, adr) do{ *(volatile __u8 *)((unsigned long)adr | AT91_SMART_MEDIA_ALE) = (__u8)(d); } while(0)
-#define WRITE_NAND(d, adr) do{ *(volatile __u8 *)((unsigned long)adr) = (__u8)d; } while(0)
-#define READ_NAND(adr) ((volatile unsigned char)(*(volatile __u8 *)(unsigned long)adr))
-/* the following are NOP's in our implementation */
-#define NAND_CTL_CLRALE(nandptr)
-#define NAND_CTL_SETALE(nandptr)
-#define NAND_CTL_CLRCLE(nandptr)
-#define NAND_CTL_SETCLE(nandptr)
-
-#endif /* NAND_SUPPORT_HAS_BEEN_FIXED */
#define CONFIG_NR_DRAM_BANKS 1
#define PHYS_SDRAM 0x20000000
diff --git a/include/configs/delta.h b/include/configs/delta.h
index 1572eef8a5b0f1a4bb8d8a6ad1f482d9e6538bdf..95e04f9e4a44dd8266201cd7820ce5a10be318cb 100644
--- a/include/configs/delta.h
+++ b/include/configs/delta.h
@@ -220,8 +220,6 @@
/*
* NAND Flash
*/
-#undef CONFIG_NAND_LEGACY
-
#define CONFIG_SYS_NAND0_BASE 0x0 /* 0x43100040 */ /* 0x10000000 */
#undef CONFIG_SYS_NAND1_BASE
@@ -257,13 +255,6 @@
#define CONFIG_MTD_DEBUG
#define CONFIG_MTD_DEBUG_VERBOSE 1
-#define ADDR_COLUMN 1
-#define ADDR_PAGE 2
-#define ADDR_COLUMN_PAGE 3
-
-#define NAND_ChipID_UNKNOWN 0x00
-#define NAND_MAX_FLOORS 1
-
#define CONFIG_SYS_NO_FLASH 1
#define CONFIG_ENV_IS_IN_NAND 1
diff --git a/include/configs/m501sk.h b/include/configs/m501sk.h
index 1e7d90ed98dc5af260f9bf8a148b5d4c041ffdbe..32a8194a2bd92e75339102f1d06b741c05fa5863 100644
--- a/include/configs/m501sk.h
+++ b/include/configs/m501sk.h
@@ -162,11 +162,6 @@
#define CONFIG_SYS_PROMPT_HUSH_PS2 ">>"
#define CONFIG_SYS_MAX_NAND_DEVICE 0 /* Max number of NAND devices */
-#define SECTORSIZE 512
-
-#define ADDR_COLUMN 1
-#define ADDR_PAGE 2
-#define ADDR_COLUMN_PAGE 3
#define CONFIG_NR_DRAM_BANKS 1
#define PHYS_SDRAM 0x20000000
diff --git a/include/configs/omap2420h4.h b/include/configs/omap2420h4.h
index 1803b1346c4f1c99b6e5f8539ba1faf1b366fc8e..9c1884244e8f553b58ec185474fee222dd18c5fb 100644
--- a/include/configs/omap2420h4.h
+++ b/include/configs/omap2420h4.h
@@ -147,42 +147,6 @@
#define CONFIG_BOOTP_HOSTNAME
#define CONFIG_BOOTP_BOOTPATH
-
-/*
- * Board NAND Info.
- */
-#define CONFIG_NAND_LEGACY
-#define CONFIG_SYS_NAND_ADDR 0x04000000 /* physical address to access nand at CS0*/
-
-#define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of NAND devices */
-#define SECTORSIZE 512
-
-#define ADDR_COLUMN 1
-#define ADDR_PAGE 2
-#define ADDR_COLUMN_PAGE 3
-
-#define NAND_ChipID_UNKNOWN 0x00
-#define NAND_MAX_FLOORS 1
-
-#define WRITE_NAND_COMMAND(d, adr) do {*(volatile u16 *)0x6800A07C = d;} while(0)
-#define WRITE_NAND_ADDRESS(d, adr) do {*(volatile u16 *)0x6800A080 = d;} while(0)
-#define WRITE_NAND(d, adr) do {*(volatile u16 *)0x6800A084 = d;} while(0)
-#define READ_NAND(adr) (*(volatile u16 *)0x6800A084)
-#define NAND_WAIT_READY(nand) udelay(10)
-
-#define NAND_NO_RB 1
-
-#define CONFIG_SYS_NAND_WP
-#define NAND_WP_OFF() do {*(volatile u32 *)(0x6800A050) |= 0x00000010;} while(0)
-#define NAND_WP_ON() do {*(volatile u32 *)(0x6800A050) &= ~0x00000010;} while(0)
-
-#define NAND_CTL_CLRALE(nandptr)
-#define NAND_CTL_SETALE(nandptr)
-#define NAND_CTL_CLRCLE(nandptr)
-#define NAND_CTL_SETCLE(nandptr)
-#define NAND_DISABLE_CE(nand)
-#define NAND_ENABLE_CE(nand)
-
#define CONFIG_BOOTDELAY 3
#ifdef NFS_BOOT_DEFAULTS
diff --git a/include/configs/sbc2410x.h b/include/configs/sbc2410x.h
index eab9629c077ce83f413024d9c55cb2a48abcd1da..f3dc7fe97939d24d340d4afb16a7f6780ccb60a1 100644
--- a/include/configs/sbc2410x.h
+++ b/include/configs/sbc2410x.h
@@ -201,29 +201,6 @@
#if defined(CONFIG_CMD_NAND)
#define CONFIG_NAND_S3C2410
#define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of NAND devices */
-#define SECTORSIZE 512
-
-#define ADDR_COLUMN 1
-#define ADDR_PAGE 2
-#define ADDR_COLUMN_PAGE 3
-
-#define NAND_ChipID_UNKNOWN 0x00
-#define NAND_MAX_FLOORS 1
-
-#define NAND_WAIT_READY(nand) NF_WaitRB()
-#define NAND_DISABLE_CE(nand) NF_SetCE(NFCE_HIGH)
-#define NAND_ENABLE_CE(nand) NF_SetCE(NFCE_LOW)
-#define WRITE_NAND_COMMAND(d, adr) NF_Cmd(d)
-#define WRITE_NAND_COMMANDW(d, adr) NF_CmdW(d)
-#define WRITE_NAND_ADDRESS(d, adr) NF_Addr(d)
-#define WRITE_NAND(d, adr) NF_Write(d)
-#define READ_NAND(adr) NF_Read()
-/* the following functions are NOP's because S3C24X0 handles this in hardware */
-#define NAND_CTL_CLRALE(nandptr)
-#define NAND_CTL_SETALE(nandptr)
-#define NAND_CTL_CLRCLE(nandptr)
-#define NAND_CTL_SETCLE(nandptr)
-/* #undef CONFIG_MTD_NAND_VERIFY_WRITE */
#endif /* CONFIG_CMD_NAND */
#define CONFIG_SETUP_MEMORY_TAGS
diff --git a/include/configs/stxxtc.h b/include/configs/stxxtc.h
index 147233df1e235d70eeea214ba7351de1694d8dce..d16262b6cffe8c0c422c5706ba420546edd27227 100644
--- a/include/configs/stxxtc.h
+++ b/include/configs/stxxtc.h
@@ -118,7 +118,6 @@
#define CONFIG_CMD_DHCP
#define CONFIG_CMD_MII
-#define CONFIG_CMD_NAND
#define CONFIG_CMD_NFS
#define CONFIG_CMD_PING
@@ -446,90 +445,9 @@
#define NAND_SIZE 0x00010000 /* 64K */
#define NAND_BASE 0xF1000000
-/****************************************************************/
-
-/* NAND */
-#define CONFIG_NAND_LEGACY
-#define CONFIG_SYS_NAND_BASE NAND_BASE
-#define CONFIG_MTD_NAND_ECC_JFFS2
-#define CONFIG_MTD_NAND_VERIFY_WRITE
-#define CONFIG_MTD_NAND_UNSAFE
-
-#define CONFIG_SYS_MAX_NAND_DEVICE 1
-#undef NAND_NO_RB
-
-#define SECTORSIZE 512
-#define ADDR_COLUMN 1
-#define ADDR_PAGE 2
-#define ADDR_COLUMN_PAGE 3
-#define NAND_ChipID_UNKNOWN 0x00
-#define NAND_MAX_FLOORS 1
-
-/* ALE = PC15, CLE = PB23, CE = PA7, F_RY_BY = PA6 */
-#define NAND_DISABLE_CE(nand) \
- do { \
- (((volatile immap_t *)CONFIG_SYS_IMMR)->im_ioport.iop_padat) |= (1 << (15 - 7)); \
- } while(0)
-
-#define NAND_ENABLE_CE(nand) \
- do { \
- (((volatile immap_t *)CONFIG_SYS_IMMR)->im_ioport.iop_padat) &= ~(1 << (15 - 7)); \
- } while(0)
-
-#define NAND_CTL_CLRALE(nandptr) \
- do { \
- (((volatile immap_t *)CONFIG_SYS_IMMR)->im_ioport.iop_pcdat) &= ~(1 << (15 - 15)); \
- } while(0)
-
-#define NAND_CTL_SETALE(nandptr) \
- do { \
- (((volatile immap_t *)CONFIG_SYS_IMMR)->im_ioport.iop_pcdat) |= (1 << (15 - 15)); \
- } while(0)
-
-#define NAND_CTL_CLRCLE(nandptr) \
- do { \
- (((volatile immap_t *)CONFIG_SYS_IMMR)->im_cpm.cp_pbdat) &= ~(1 << (31 - 23)); \
- } while(0)
-
-#define NAND_CTL_SETCLE(nandptr) \
- do { \
- (((volatile immap_t *)CONFIG_SYS_IMMR)->im_cpm.cp_pbdat) |= (1 << (31 - 23)); \
- } while(0)
-
-#ifndef NAND_NO_RB
-#define NAND_WAIT_READY(nand) \
- do { \
- int _tries = 0; \
- while ((((volatile immap_t *)CONFIG_SYS_IMMR)->im_ioport.iop_padat & (1 << (15 - 6))) == 0) \
- if (++_tries > 100000) \
- break; \
- } while (0)
-#else
-#define NAND_WAIT_READY(nand) udelay(12)
-#endif
-
-#define WRITE_NAND_COMMAND(d, adr) \
- do { \
- *(volatile unsigned char *)((unsigned long)(adr)) = (unsigned char)(d); \
- } while(0)
-
-#define WRITE_NAND_ADDRESS(d, adr) \
- do { \
- *(volatile unsigned char *)((unsigned long)(adr)) = (unsigned char)(d); \
- } while(0)
-
-#define WRITE_NAND(d, adr) \
- do { \
- *(volatile unsigned char *)((unsigned long)(adr)) = (unsigned char)(d); \
- } while(0)
-
-#define READ_NAND(adr) \
- ((unsigned char)(*(volatile unsigned char *)(unsigned long)(adr)))
-
/*****************************************************************************/
#define CONFIG_SYS_DIRECT_FLASH_TFTP
-#define CONFIG_SYS_DIRECT_NAND_TFTP
/*****************************************************************************/
diff --git a/include/configs/svm_sc8xx.h b/include/configs/svm_sc8xx.h
index 3917a1bdd27613a78811970e45e77aed392e522e..425f472a7fd6f06d76c7a6ea7b8b77256e14a039 100644
--- a/include/configs/svm_sc8xx.h
+++ b/include/configs/svm_sc8xx.h
@@ -147,12 +147,8 @@
#define CONFIG_CMD_ASKENV
#define CONFIG_CMD_DHCP
-#define CONFIG_CMD_DOC
#define CONFIG_CMD_DATE
-
-#define CONFIG_NAND_LEGACY
-
/*
* Miscellaneous configurable options
*/
diff --git a/include/configs/zylonite.h b/include/configs/zylonite.h
index 6b4586ef04f2dc9f0e7cccd882b48c96f27d62ea..86b6ea1e1842a67a786864cff3469047b39a5544 100644
--- a/include/configs/zylonite.h
+++ b/include/configs/zylonite.h
@@ -193,7 +193,6 @@
/*
* NAND Flash
*/
-#define CONFIG_NEW_NAND_CODE
#define CONFIG_SYS_NAND0_BASE 0x0
#undef CONFIG_SYS_NAND1_BASE
@@ -229,13 +228,6 @@
#define CONFIG_MTD_DEBUG
#define CONFIG_MTD_DEBUG_VERBOSE 1
-#define ADDR_COLUMN 1
-#define ADDR_PAGE 2
-#define ADDR_COLUMN_PAGE 3
-
-#define NAND_ChipID_UNKNOWN 0x00
-#define NAND_MAX_FLOORS 1
-
#define CONFIG_SYS_NO_FLASH 1
#define CONFIG_ENV_IS_IN_NAND 1
diff --git a/include/linux/mtd/nand.h b/include/linux/mtd/nand.h
index a4ad5711d6c662597f384385986819546c8edbb3..3e0044b94f2316360b0477544bcb71d8da052189 100644
--- a/include/linux/mtd/nand.h
+++ b/include/linux/mtd/nand.h
@@ -50,7 +50,7 @@ extern void nand_wait_ready(struct mtd_info *mtd);
* is supported now. If you add a chip with bigger oobsize/page
* adjust this accordingly.
*/
-#define NAND_MAX_OOBSIZE 128
+#define NAND_MAX_OOBSIZE 218
#define NAND_MAX_PAGESIZE 4096
/*
diff --git a/include/linux/mtd/nand_ids.h b/include/linux/mtd/nand_ids.h
deleted file mode 100644
index e7aa26df048752e54ba8bb0029cd6dd78d267dbd..0000000000000000000000000000000000000000
--- a/include/linux/mtd/nand_ids.h
+++ /dev/null
@@ -1,60 +0,0 @@
-/*
- * u-boot/include/linux/mtd/nand_ids.h
- *
- * Copyright (c) 2000 David Woodhouse <dwmw2@mvhi.com>
- * Steven J. Hill <sjhill@cotw.com>
- *
- * $Id: nand_ids.h,v 1.1 2000/10/13 16:16:26 mdeans Exp $
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- *
- * Info:
- * Contains standard defines and IDs for NAND flash devices
- *
- * Changelog:
- * 01-31-2000 DMW Created
- * 09-18-2000 SJH Moved structure out of the Disk-On-Chip drivers
- * so it can be used by other NAND flash device
- * drivers. I also changed the copyright since none
- * of the original contents of this file are specific
- * to DoC devices. David can whack me with a baseball
- * bat later if I did something naughty.
- * 10-11-2000 SJH Added private NAND flash structure for driver
- * 2000-10-13 BE Moved out of 'nand.h' - avoids duplication.
- */
-
-#ifndef __LINUX_MTD_NAND_IDS_H
-#define __LINUX_MTD_NAND_IDS_H
-
-#ifndef CONFIG_NAND_LEGACY
-#error This module is for the legacy NAND support
-#endif
-
-static struct nand_flash_dev nand_flash_ids[] = {
- {"Toshiba TC5816BDC", NAND_MFR_TOSHIBA, 0x64, 21, 1, 2, 0x1000, 0},
- {"Toshiba TC5832DC", NAND_MFR_TOSHIBA, 0x6b, 22, 0, 2, 0x2000, 0},
- {"Toshiba TH58V128DC", NAND_MFR_TOSHIBA, 0x73, 24, 0, 2, 0x4000, 0},
- {"Toshiba TC58256FT/DC", NAND_MFR_TOSHIBA, 0x75, 25, 0, 2, 0x4000, 0},
- {"Toshiba TH58512FT", NAND_MFR_TOSHIBA, 0x76, 26, 0, 3, 0x4000, 0},
- {"Toshiba TC58V32DC", NAND_MFR_TOSHIBA, 0xe5, 22, 0, 2, 0x2000, 0},
- {"Toshiba TC58V64AFT/DC", NAND_MFR_TOSHIBA, 0xe6, 23, 0, 2, 0x2000, 0},
- {"Toshiba TC58V16BDC", NAND_MFR_TOSHIBA, 0xea, 21, 1, 2, 0x1000, 0},
- {"Toshiba TH58100FT", NAND_MFR_TOSHIBA, 0x79, 27, 0, 3, 0x4000, 0},
- {"Samsung KM29N16000", NAND_MFR_SAMSUNG, 0x64, 21, 1, 2, 0x1000, 0},
- {"Samsung unknown 4Mb", NAND_MFR_SAMSUNG, 0x6b, 22, 0, 2, 0x2000, 0},
- {"Samsung KM29U128T", NAND_MFR_SAMSUNG, 0x73, 24, 0, 2, 0x4000, 0},
- {"Samsung KM29U256T", NAND_MFR_SAMSUNG, 0x75, 25, 0, 2, 0x4000, 0},
- {"Samsung unknown 64Mb", NAND_MFR_SAMSUNG, 0x76, 26, 0, 3, 0x4000, 0},
- {"Samsung KM29W32000", NAND_MFR_SAMSUNG, 0xe3, 22, 0, 2, 0x2000, 0},
- {"Samsung unknown 4Mb", NAND_MFR_SAMSUNG, 0xe5, 22, 0, 2, 0x2000, 0},
- {"Samsung KM29U64000", NAND_MFR_SAMSUNG, 0xe6, 23, 0, 2, 0x2000, 0},
- {"Samsung KM29W16000", NAND_MFR_SAMSUNG, 0xea, 21, 1, 2, 0x1000, 0},
- {"Samsung K9F5616Q0C", NAND_MFR_SAMSUNG, 0x45, 25, 0, 2, 0x4000, 1},
- {"Samsung K9K1216Q0C", NAND_MFR_SAMSUNG, 0x46, 26, 0, 3, 0x4000, 1},
- {"Samsung K9F1G08U0M", NAND_MFR_SAMSUNG, 0xf1, 27, 0, 2, 0, 0},
- {NULL,}
-};
-
-#endif /* __LINUX_MTD_NAND_IDS_H */
diff --git a/include/linux/mtd/nand_legacy.h b/include/linux/mtd/nand_legacy.h
deleted file mode 100644
index 43344481462198f360b408135652591f2d78fdfc..0000000000000000000000000000000000000000
--- a/include/linux/mtd/nand_legacy.h
+++ /dev/null
@@ -1,196 +0,0 @@
-/*
- * linux/include/linux/mtd/nand.h
- *
- * Copyright (c) 2000 David Woodhouse <dwmw2@mvhi.com>
- * Steven J. Hill <sjhill@cotw.com>
- * Thomas Gleixner <gleixner@autronix.de>
- *
- * $Id: nand.h,v 1.7 2003/07/24 23:30:46 a0384864 Exp $
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- *
- * Info:
- * Contains standard defines and IDs for NAND flash devices
- *
- * Changelog:
- * 01-31-2000 DMW Created
- * 09-18-2000 SJH Moved structure out of the Disk-On-Chip drivers
- * so it can be used by other NAND flash device
- * drivers. I also changed the copyright since none
- * of the original contents of this file are specific
- * to DoC devices. David can whack me with a baseball
- * bat later if I did something naughty.
- * 10-11-2000 SJH Added private NAND flash structure for driver
- * 10-24-2000 SJH Added prototype for 'nand_scan' function
- * 10-29-2001 TG changed nand_chip structure to support
- * hardwarespecific function for accessing control lines
- * 02-21-2002 TG added support for different read/write adress and
- * ready/busy line access function
- * 02-26-2002 TG added chip_delay to nand_chip structure to optimize
- * command delay times for different chips
- * 04-28-2002 TG OOB config defines moved from nand.c to avoid duplicate
- * defines in jffs2/wbuf.c
- */
-#ifndef __LINUX_MTD_NAND_LEGACY_H
-#define __LINUX_MTD_NAND_LEGACY_H
-
-#ifndef CONFIG_NAND_LEGACY
-#error This module is for the legacy NAND support
-#endif
-
-/* The maximum number of NAND chips in an array */
-#ifndef CONFIG_SYS_NAND_MAX_CHIPS
-#define CONFIG_SYS_NAND_MAX_CHIPS 1
-#endif
-
-/*
- * Standard NAND flash commands
- */
-#define NAND_CMD_READ0 0
-#define NAND_CMD_READ1 1
-#define NAND_CMD_PAGEPROG 0x10
-#define NAND_CMD_READOOB 0x50
-#define NAND_CMD_ERASE1 0x60
-#define NAND_CMD_STATUS 0x70
-#define NAND_CMD_SEQIN 0x80
-#define NAND_CMD_READID 0x90
-#define NAND_CMD_ERASE2 0xd0
-#define NAND_CMD_RESET 0xff
-
-/*
- * NAND Private Flash Chip Data
- *
- * Structure overview:
- *
- * IO_ADDR - address to access the 8 I/O lines of the flash device
- *
- * hwcontrol - hardwarespecific function for accesing control-lines
- *
- * dev_ready - hardwarespecific function for accesing device ready/busy line
- *
- * chip_lock - spinlock used to protect access to this structure
- *
- * wq - wait queue to sleep on if a NAND operation is in progress
- *
- * state - give the current state of the NAND device
- *
- * page_shift - number of address bits in a page (column address bits)
- *
- * data_buf - data buffer passed to/from MTD user modules
- *
- * data_cache - data cache for redundant page access and shadow for
- * ECC failure
- *
- * ecc_code_buf - used only for holding calculated or read ECCs for
- * a page read or written when ECC is in use
- *
- * reserved - padding to make structure fall on word boundary if
- * when ECC is in use
- */
-struct Nand {
- char floor, chip;
- unsigned long curadr;
- unsigned char curmode;
- /* Also some erase/write/pipeline info when we get that far */
-};
-
-struct nand_chip {
- int page_shift;
- u_char *data_buf;
- u_char *data_cache;
- int cache_page;
- u_char ecc_code_buf[6];
- u_char reserved[2];
- char ChipID; /* Type of DiskOnChip */
- struct Nand *chips;
- int chipshift;
- char* chips_name;
- unsigned long erasesize;
- unsigned long mfr; /* Flash IDs - only one type of flash per device */
- unsigned long id;
- char* name;
- int numchips;
- char page256;
- char pageadrlen;
- unsigned long IO_ADDR; /* address to access the 8 I/O lines to the flash device */
- unsigned long totlen;
- uint oobblock; /* Size of OOB blocks (e.g. 512) */
- uint oobsize; /* Amount of OOB data per block (e.g. 16) */
- uint eccsize;
- int bus16;
-};
-
-/*
- * NAND Flash Manufacturer ID Codes
- */
-#define NAND_MFR_TOSHIBA 0x98
-#define NAND_MFR_SAMSUNG 0xec
-
-/*
- * NAND Flash Device ID Structure
- *
- * Structure overview:
- *
- * name - Complete name of device
- *
- * manufacture_id - manufacturer ID code of device.
- *
- * model_id - model ID code of device.
- *
- * chipshift - total number of address bits for the device which
- * is used to calculate address offsets and the total
- * number of bytes the device is capable of.
- *
- * page256 - denotes if flash device has 256 byte pages or not.
- *
- * pageadrlen - number of bytes minus one needed to hold the
- * complete address into the flash array. Keep in
- * mind that when a read or write is done to a
- * specific address, the address is input serially
- * 8 bits at a time. This structure member is used
- * by the read/write routines as a loop index for
- * shifting the address out 8 bits at a time.
- *
- * erasesize - size of an erase block in the flash device.
- */
-struct nand_flash_dev {
- char * name;
- int manufacture_id;
- int model_id;
- int chipshift;
- char page256;
- char pageadrlen;
- unsigned long erasesize;
- int bus16;
-};
-
-/*
-* Constants for oob configuration
-*/
-#define NAND_NOOB_ECCPOS0 0
-#define NAND_NOOB_ECCPOS1 1
-#define NAND_NOOB_ECCPOS2 2
-#define NAND_NOOB_ECCPOS3 3
-#define NAND_NOOB_ECCPOS4 6
-#define NAND_NOOB_ECCPOS5 7
-#define NAND_NOOB_BADBPOS -1
-#define NAND_NOOB_ECCVPOS -1
-
-#define NAND_JFFS2_OOB_ECCPOS0 0
-#define NAND_JFFS2_OOB_ECCPOS1 1
-#define NAND_JFFS2_OOB_ECCPOS2 2
-#define NAND_JFFS2_OOB_ECCPOS3 3
-#define NAND_JFFS2_OOB_ECCPOS4 6
-#define NAND_JFFS2_OOB_ECCPOS5 7
-#define NAND_JFFS2_OOB_BADBPOS 5
-#define NAND_JFFS2_OOB_ECCVPOS 4
-
-#define NAND_JFFS2_OOB8_FSDAPOS 6
-#define NAND_JFFS2_OOB16_FSDAPOS 8
-#define NAND_JFFS2_OOB8_FSDALEN 2
-#define NAND_JFFS2_OOB16_FSDALEN 8
-
-unsigned long nand_probe(unsigned long physadr);
-#endif /* __LINUX_MTD_NAND_LEGACY_H */
diff --git a/include/nand.h b/include/nand.h
index 23f3ca1db823bdbe30bb8da70f2a83df9f1ac36a..2a81597a65d9bd4366b8dcbfe44929d85ad17dc5 100644
--- a/include/nand.h
+++ b/include/nand.h
@@ -26,7 +26,6 @@
extern void nand_init(void);
-#ifndef CONFIG_NAND_LEGACY
#include <linux/mtd/compat.h>
#include <linux/mtd/mtd.h>
#include <linux/mtd/nand.h>
@@ -130,5 +129,4 @@ void board_nand_select_device(struct nand_chip *nand, int chip);
__attribute__((noreturn)) void nand_boot(void);
-#endif /* !CONFIG_NAND_LEGACY */
#endif
diff --git a/lib_generic/crc32.c b/lib_generic/crc32.c
index 3927ce13c29669abf074e079c036532de827f875..b27048ceebf2f07075457aedc5f1b0a3cb6db381 100644
--- a/lib_generic/crc32.c
+++ b/lib_generic/crc32.c
@@ -172,9 +172,7 @@ uint32_t ZEXPORT crc32 (uint32_t crc, const Bytef *buf, uInt len)
return crc ^ 0xffffffffL;
}
-#if defined(CONFIG_CMD_JFFS2) || \
- (defined(CONFIG_CMD_NAND) \
- && !defined(CONFIG_NAND_LEGACY))
+#if defined(CONFIG_CMD_JFFS2) || defined(CONFIG_CMD_NAND)
/* No ones complement version. JFFS2 (and other things ?)
* don't use ones compliment in their CRC calculations.
diff --git a/nand_spl/board/amcc/acadia/Makefile b/nand_spl/board/amcc/acadia/Makefile
index 931f04b29ad39ba99abb7f39bb3e61e891f8949b..822f82f2b23789b953c58fca8a51960411525ea3 100644
--- a/nand_spl/board/amcc/acadia/Makefile
+++ b/nand_spl/board/amcc/acadia/Makefile
@@ -73,7 +73,7 @@ $(obj)gpio.c:
$(obj)ndfc.c:
@rm -f $(obj)ndfc.c
- ln -s $(SRCTREE)/cpu/ppc4xx/ndfc.c $(obj)ndfc.c
+ ln -s $(SRCTREE)/drivers/mtd/nand/ndfc.c $(obj)ndfc.c
$(obj)resetvec.S:
@rm -f $(obj)resetvec.S
diff --git a/nand_spl/board/amcc/bamboo/Makefile b/nand_spl/board/amcc/bamboo/Makefile
index e1c146750b721a85e4968890f2778f68bca355a2..293292732fc9999acc9a99c095c0d77db9a1ddc9 100644
--- a/nand_spl/board/amcc/bamboo/Makefile
+++ b/nand_spl/board/amcc/bamboo/Makefile
@@ -59,7 +59,7 @@ $(nandobj)u-boot-spl: $(OBJS)
# from cpu directory
$(obj)ndfc.c:
@rm -f $(obj)ndfc.c
- ln -s $(SRCTREE)/cpu/ppc4xx/ndfc.c $(obj)ndfc.c
+ ln -s $(SRCTREE)/drivers/mtd/nand/ndfc.c $(obj)ndfc.c
$(obj)resetvec.S:
@rm -f $(obj)resetvec.S
diff --git a/nand_spl/board/amcc/canyonlands/Makefile b/nand_spl/board/amcc/canyonlands/Makefile
index fb86752002d0bea98442ce60e67eec09e27df317..84b14548eea28826fb4a19e51be4b324ae69f5a0 100644
--- a/nand_spl/board/amcc/canyonlands/Makefile
+++ b/nand_spl/board/amcc/canyonlands/Makefile
@@ -64,7 +64,7 @@ $(nandobj)u-boot-spl: $(OBJS)
# from cpu directory
$(obj)ndfc.c:
@rm -f $(obj)ndfc.c
- ln -s $(SRCTREE)/cpu/ppc4xx/ndfc.c $(obj)ndfc.c
+ ln -s $(SRCTREE)/drivers/mtd/nand/ndfc.c $(obj)ndfc.c
$(obj)resetvec.S:
@rm -f $(obj)resetvec.S
diff --git a/nand_spl/board/amcc/kilauea/Makefile b/nand_spl/board/amcc/kilauea/Makefile
index cedc8e02e6e8847cde7a1889a7deeb2d23e0bae5..8a062fe4cd9d45b805b5973e2647c8c5e0da37b3 100644
--- a/nand_spl/board/amcc/kilauea/Makefile
+++ b/nand_spl/board/amcc/kilauea/Makefile
@@ -71,7 +71,7 @@ $(obj)ecc.h:
$(obj)ndfc.c:
@rm -f $(obj)ndfc.c
- ln -s $(SRCTREE)/cpu/ppc4xx/ndfc.c $(obj)ndfc.c
+ ln -s $(SRCTREE)/drivers/mtd/nand/ndfc.c $(obj)ndfc.c
$(obj)resetvec.S:
@rm -f $(obj)resetvec.S
diff --git a/nand_spl/board/amcc/sequoia/Makefile b/nand_spl/board/amcc/sequoia/Makefile
index fba0322a727307fa79e7779fe2ff498c40c1d84d..462005f4b27bd9190482af21b18fe00c642fc114 100644
--- a/nand_spl/board/amcc/sequoia/Makefile
+++ b/nand_spl/board/amcc/sequoia/Makefile
@@ -63,7 +63,7 @@ $(obj)denali_data_eye.c:
$(obj)ndfc.c:
@rm -f $(obj)ndfc.c
- ln -s $(SRCTREE)/cpu/ppc4xx/ndfc.c $(obj)ndfc.c
+ ln -s $(SRCTREE)/drivers/mtd/nand/ndfc.c $(obj)ndfc.c
$(obj)resetvec.S:
@rm -f $(obj)resetvec.S