diff --git a/arch/arm/include/asm/arch-omap5/omap.h b/arch/arm/include/asm/arch-omap5/omap.h index 06171d017b25c2ac292b302763f7e95b84ccb986..bb6a757dc03c875a9f9f883e0e7bc18edaae1194 100644 --- a/arch/arm/include/asm/arch-omap5/omap.h +++ b/arch/arm/include/asm/arch-omap5/omap.h @@ -106,9 +106,9 @@ /* CONTROL_EFUSE_2 */ #define CONTROL_EFUSE_2_NMOS_PMOS_PTV_CODE_1 0x00ffc000 +#define SDCARD_BIAS_PWRDNZ (1 << 27) #define SDCARD_PWRDNZ (1 << 26) #define SDCARD_BIAS_HIZ_MODE (1 << 25) -#define SDCARD_BIAS_PWRDNZ (1 << 22) #define SDCARD_PBIASLITE_VMODE (1 << 21) #ifndef __ASSEMBLY__ diff --git a/drivers/mmc/omap_hsmmc.c b/drivers/mmc/omap_hsmmc.c index afdfa886e8a013d44e6b3e759b8662ccc8c6bf80..975b2c5ba4d74b1ae875a205341efec5bd233e82 100644 --- a/drivers/mmc/omap_hsmmc.c +++ b/drivers/mmc/omap_hsmmc.c @@ -113,23 +113,21 @@ static void omap5_pbias_config(struct mmc *mmc) u32 value = 0; value = readl((*ctrl)->control_pbias); - value &= ~(SDCARD_PWRDNZ | SDCARD_BIAS_PWRDNZ); - value |= SDCARD_BIAS_HIZ_MODE; + value &= ~SDCARD_PWRDNZ; + writel(value, (*ctrl)->control_pbias); + udelay(10); /* wait 10 us */ + value &= ~SDCARD_BIAS_PWRDNZ; writel(value, (*ctrl)->control_pbias); palmas_mmc1_poweron_ldo(); value = readl((*ctrl)->control_pbias); - value &= ~SDCARD_BIAS_HIZ_MODE; - value |= SDCARD_PBIASLITE_VMODE | SDCARD_PWRDNZ | SDCARD_BIAS_PWRDNZ; + value |= SDCARD_BIAS_PWRDNZ; writel(value, (*ctrl)->control_pbias); - - value = readl((*ctrl)->control_pbias); - if (value & (1 << 23)) { - value &= ~(SDCARD_PWRDNZ | SDCARD_BIAS_PWRDNZ); - value |= SDCARD_BIAS_HIZ_MODE; - writel(value, (*ctrl)->control_pbias); - } + udelay(150); /* wait 150 us */ + value |= SDCARD_PWRDNZ; + writel(value, (*ctrl)->control_pbias); + udelay(150); /* wait 150 us */ } #endif diff --git a/include/configs/omap5_common.h b/include/configs/omap5_common.h index 83b91d1590dbd3358b078544408a015fa2e72f49..ddf2ad4fc2918307fe6489ef8788a36c057abc1d 100644 --- a/include/configs/omap5_common.h +++ b/include/configs/omap5_common.h @@ -238,6 +238,10 @@ #define CONFIG_SYS_DEFAULT_LPDDR2_TIMINGS #endif +#ifndef CONFIG_SPL_BUILD +#define CONFIG_PALMAS_POWER +#endif + /* Defines for SPL */ #define CONFIG_SPL #define CONFIG_SPL_FRAMEWORK diff --git a/include/configs/omap5_uevm.h b/include/configs/omap5_uevm.h index 7382aa25be5ea71f18d1ed98ce33d4fe5fec856b..dea05bc911cf6970ebd8197921e72625dbed0f37 100644 --- a/include/configs/omap5_uevm.h +++ b/include/configs/omap5_uevm.h @@ -39,11 +39,6 @@ #define CONFIG_SYS_NS16550_COM3 UART3_BASE #define CONFIG_BAUDRATE 115200 -/* TWL6035 */ -#ifndef CONFIG_SPL_BUILD -#define CONFIG_PALMAS_POWER -#endif - /* MMC ENV related defines */ #define CONFIG_ENV_IS_IN_MMC #define CONFIG_SYS_MMC_ENV_DEV 1 /* SLOT2: eMMC(1) */