diff --git a/arch/arm/cpu/arm1136/mx31/timer.c b/arch/arm/cpu/arm1136/mx31/timer.c
index 36266da5aa8d68430f9a88313020055cc382d18a..86916d1edb1c603f40039b5ab3ae8da05ef0cbc1 100644
--- a/arch/arm/cpu/arm1136/mx31/timer.c
+++ b/arch/arm/cpu/arm1136/mx31/timer.c
@@ -161,42 +161,3 @@ ulong get_tbclk(void)
{
return MXC_CLK32;
}
-
-void reset_cpu(ulong addr)
-{
- struct wdog_regs *wdog = (struct wdog_regs *)WDOG_BASE;
- wdog->wcr = WDOG_ENABLE;
- while (1)
- ;
-}
-
-#ifdef CONFIG_HW_WATCHDOG
-void mxc_hw_watchdog_enable(void)
-{
- struct wdog_regs *wdog = (struct wdog_regs *)WDOG_BASE;
- u16 secs;
-
- /*
- * The timer watchdog can be set between
- * 0.5 and 128 Seconds. If not defined
- * in configuration file, sets 64 Seconds
- */
-#ifdef CONFIG_SYS_WD_TIMER_SECS
- secs = (CONFIG_SYS_WD_TIMER_SECS << 1) & 0xFF;
- if (!secs) secs = 1;
-#else
- secs = 64;
-#endif
- setbits_le16(&wdog->wcr, (secs << WDOG_WT_SHIFT) | WDOG_ENABLE
- | WDOG_WDZST);
-}
-
-
-void mxc_hw_watchdog_reset(void)
-{
- struct wdog_regs *wdog = (struct wdog_regs *)WDOG_BASE;
-
- writew(0x5555, &wdog->wsr);
- writew(0xAAAA, &wdog->wsr);
-}
-#endif
diff --git a/arch/arm/cpu/arm1136/mx35/generic.c b/arch/arm/cpu/arm1136/mx35/generic.c
index 98aa4d15bccedaa1688a52e0eb3c122abbaebfc7..295a98ea4b6d5fabf9de1c01fb03a4f40c668b94 100644
--- a/arch/arm/cpu/arm1136/mx35/generic.c
+++ b/arch/arm/cpu/arm1136/mx35/generic.c
@@ -488,12 +488,6 @@ int get_clocks(void)
return 0;
}
-void reset_cpu(ulong addr)
-{
- struct wdog_regs *wdog = (struct wdog_regs *)WDOG_BASE_ADDR;
- writew(4, &wdog->wcr);
-}
-
#define RCSR_MEM_CTL_WEIM 0
#define RCSR_MEM_CTL_NAND 1
#define RCSR_MEM_CTL_ATA 2
diff --git a/arch/arm/cpu/armv7/mx6/lowlevel_init.S b/arch/arm/cpu/armv7/mx6/lowlevel_init.S
index acadef221c8e845873c56563be1a20385aeda964..7b60ca7454b88319aaf832f573087ca0213d2b8b 100644
--- a/arch/arm/cpu/armv7/mx6/lowlevel_init.S
+++ b/arch/arm/cpu/armv7/mx6/lowlevel_init.S
@@ -20,6 +20,16 @@
#include <linux/linkage.h>
+.macro init_arm_errata
+ /* ARM erratum ID #743622 */
+ mrc p15, 0, r10, c15, c0, 1 /* read diagnostic register */
+ orr r10, r10, #1 << 6 /* set bit #6 */
+ /* ARM erratum ID #751472 */
+ orr r10, r10, #1 << 11 /* set bit #11 */
+ mcr p15, 0, r10, c15, c0, 1 /* write diagnostic register */
+.endm
+
ENTRY(lowlevel_init)
+ init_arm_errata
mov pc, lr
ENDPROC(lowlevel_init)
diff --git a/arch/arm/imx-common/cpu.c b/arch/arm/imx-common/cpu.c
index 50819085550d363a7558166c378a6840c39c75de..a9b86c1173203a3bd8740a5e5b08fa299e8e8194 100644
--- a/arch/arm/imx-common/cpu.c
+++ b/arch/arm/imx-common/cpu.c
@@ -175,11 +175,6 @@ int cpu_mmc_init(bd_t *bis)
}
#endif
-void reset_cpu(ulong addr)
-{
- __raw_writew(4, WDOG1_BASE_ADDR);
-}
-
u32 get_ahb_clk(void)
{
struct mxc_ccm_reg *imx_ccm = (struct mxc_ccm_reg *)CCM_BASE_ADDR;
diff --git a/arch/arm/include/asm/arch-mx31/clock.h b/arch/arm/include/asm/arch-mx31/clock.h
index 1dbb8dabe97f29eb67f92dbca255c6c449b89970..25c3f70f6c41fda096b6fdead6fd60a738887db1 100644
--- a/arch/arm/include/asm/arch-mx31/clock.h
+++ b/arch/arm/include/asm/arch-mx31/clock.h
@@ -58,7 +58,5 @@ extern void mx31_set_gpr(enum iomux_gp_func gp, char en);
void mx31_uart1_hw_init(void);
void mx31_uart2_hw_init(void);
void mx31_spi2_hw_init(void);
-void mxc_hw_watchdog_enable(void);
-void mxc_hw_watchdog_reset(void);
#endif /* __ASM_ARCH_CLOCK_H */
diff --git a/arch/arm/include/asm/arch-mx31/imx-regs.h b/arch/arm/include/asm/arch-mx31/imx-regs.h
index ae3658b6393e4ade9155d7afd14026289c24ea33..3f58318b023b3d85fe6778f0855235f7838f759b 100644
--- a/arch/arm/include/asm/arch-mx31/imx-regs.h
+++ b/arch/arm/include/asm/arch-mx31/imx-regs.h
@@ -68,17 +68,6 @@ struct cspi_regs {
u32 test;
};
-/* Watchdog Timer (WDOG) registers */
-#define WDOG_ENABLE (1 << 2)
-#define WDOG_WT_SHIFT 8
-#define WDOG_WDZST (1 << 0)
-
-struct wdog_regs {
- u16 wcr; /* Control */
- u16 wsr; /* Service */
- u16 wrsr; /* Reset Status */
-};
-
/* IIM Control Registers */
struct iim_regs {
u32 iim_stat;
@@ -687,7 +676,7 @@ struct esdc_regs {
#define ARM_PPMRR 0x40000015
-#define WDOG_BASE 0x53FDC000
+#define WDOG1_BASE_ADDR 0x53FDC000
/*
* GPIO
diff --git a/arch/arm/include/asm/arch-mx35/imx-regs.h b/arch/arm/include/asm/arch-mx35/imx-regs.h
index 18c6816e489741c594d7a37c401e49d963df8dfe..7f337be557fd75067c9c1c17f865b7ecc884d6be 100644
--- a/arch/arm/include/asm/arch-mx35/imx-regs.h
+++ b/arch/arm/include/asm/arch-mx35/imx-regs.h
@@ -80,7 +80,7 @@
#define GPIO2_BASE_ADDR 0x53FD0000
#define SDMA_BASE_ADDR 0x53FD4000
#define RTC_BASE_ADDR 0x53FD8000
-#define WDOG_BASE_ADDR 0x53FDC000
+#define WDOG1_BASE_ADDR 0x53FDC000
#define PWM_BASE_ADDR 0x53FE0000
#define RTIC_BASE_ADDR 0x53FEC000
#define IIM_BASE_ADDR 0x53FF0000
@@ -292,15 +292,6 @@ struct cspi_regs {
u32 test;
};
-/* Watchdog Timer (WDOG) registers */
-struct wdog_regs {
- u16 wcr; /* Control */
- u16 wsr; /* Service */
- u16 wrsr; /* Reset Status */
- u16 wicr; /* Interrupt Control */
- u16 wmcr; /* Misc Control */
-};
-
struct esdc_regs {
u32 esdctl0;
u32 esdcfg0;
diff --git a/arch/arm/include/asm/arch-mx5/imx-regs.h b/arch/arm/include/asm/arch-mx5/imx-regs.h
index 1d060fd23ed0b13c8780a299c287d1450b22c604..249d15a5053ad0cbd7b48033c2c5c7c5b4c0c44c 100644
--- a/arch/arm/include/asm/arch-mx5/imx-regs.h
+++ b/arch/arm/include/asm/arch-mx5/imx-regs.h
@@ -218,16 +218,6 @@
*/
#define WBED 1
-/*
- * WEIM WCR
- */
-#define BCM 1
-#define GBCD(x) (((x) & 0x3) << 1)
-#define INTEN (1 << 4)
-#define INTPOL (1 << 5)
-#define WDOG_EN (1 << 8)
-#define WDOG_LIMIT(x) (((x) & 0x3) << 9)
-
#define CS0_128 0
#define CS0_64M_CS1_64M 1
#define CS0_64M_CS1_32M_CS2_32M 2
diff --git a/board/davedenx/qong/qong.c b/board/davedenx/qong/qong.c
index a3079dbca367e2b7cb60b5c25a5c50ac8f22bc14..06ca17c3cdec4acdc93621f9a2dabaffe4f61bec 100644
--- a/board/davedenx/qong/qong.c
+++ b/board/davedenx/qong/qong.c
@@ -37,13 +37,6 @@
DECLARE_GLOBAL_DATA_PTR;
-#ifdef CONFIG_HW_WATCHDOG
-void hw_watchdog_reset(void)
-{
- mxc_hw_watchdog_reset();
-}
-#endif
-
int dram_init(void)
{
/* dram_init must store complete ramsize in gd->ram_size */
@@ -188,7 +181,7 @@ int board_late_init(void)
pmic_reg_write(p, REG_INT_STATUS1, RTCRSTI);
#ifdef CONFIG_HW_WATCHDOG
- mxc_hw_watchdog_enable();
+ hw_watchdog_init();
#endif
return 0;
diff --git a/board/freescale/mx31pdk/mx31pdk.c b/board/freescale/mx31pdk/mx31pdk.c
index bc60632aa0b34662a10243f30c9f6a42f856bbb0..895396cd6231ce037493629f8742c70598ba7ef0 100644
--- a/board/freescale/mx31pdk/mx31pdk.c
+++ b/board/freescale/mx31pdk/mx31pdk.c
@@ -36,13 +36,6 @@
DECLARE_GLOBAL_DATA_PTR;
-#ifdef CONFIG_HW_WATCHDOG
-void hw_watchdog_reset(void)
-{
- mxc_hw_watchdog_reset();
-}
-#endif
-
int dram_init(void)
{
/* dram_init must store complete ramsize in gd->ram_size */
@@ -98,7 +91,7 @@ int board_late_init(void)
pmic_reg_write(p, REG_POWER_CTL0, val | COINCHEN);
pmic_reg_write(p, REG_INT_STATUS1, RTCRSTI);
#ifdef CONFIG_HW_WATCHDOG
- mxc_hw_watchdog_enable();
+ hw_watchdog_init();
#endif
return 0;
}
diff --git a/board/freescale/mx51evk/mx51evk.c b/board/freescale/mx51evk/mx51evk.c
index d1ef431895a0786f72eb4ae42413202ee9200e97..54c16b1f9d36eb1791a781fdaf91169dbbff0bf3 100644
--- a/board/freescale/mx51evk/mx51evk.c
+++ b/board/freescale/mx51evk/mx51evk.c
@@ -489,8 +489,6 @@ int board_init(void)
/* address of boot parameters */
gd->bd->bi_boot_params = PHYS_SDRAM_1 + 0x100;
- lcd_enable();
-
return 0;
}
diff --git a/board/freescale/mx51evk/mx51evk_video.c b/board/freescale/mx51evk/mx51evk_video.c
index f036cf73b2e4bc5360a90a8b189ca0624d6fa2ac..7be5c9befc377095b25c6390361419231d235528 100644
--- a/board/freescale/mx51evk/mx51evk_video.c
+++ b/board/freescale/mx51evk/mx51evk_video.c
@@ -48,6 +48,22 @@ static struct fb_videomode const claa_wvga = {
.vmode = FB_VMODE_NONINTERLACED
};
+static struct fb_videomode const dvi = {
+ .name = "DVI panel",
+ .refresh = 60,
+ .xres = 1024,
+ .yres = 768,
+ .pixclock = 15385,
+ .left_margin = 220,
+ .right_margin = 40,
+ .upper_margin = 21,
+ .lower_margin = 7,
+ .hsync_len = 60,
+ .vsync_len = 10,
+ .sync = 0,
+ .vmode = FB_VMODE_NONINTERLACED
+};
+
void setup_iomux_lcd(void)
{
/* DI2_PIN15 */
@@ -73,9 +89,26 @@ void setup_iomux_lcd(void)
gpio_direction_output(MX51EVK_LCD_BACKLIGHT, 1);
}
-void lcd_enable(void)
+int board_video_skip(void)
{
- int ret = ipuv3_fb_init(&claa_wvga, 1, IPU_PIX_FMT_RGB565);
+ int ret;
+ char const *e = getenv("panel");
+
+ if (e) {
+ if (strcmp(e, "claa") == 0) {
+ ret = ipuv3_fb_init(&claa_wvga, 1, IPU_PIX_FMT_RGB565);
+ if (ret)
+ printf("claa cannot be configured: %d\n", ret);
+ return ret;
+ }
+ }
+
+ /*
+ * 'panel' env variable not found or has different value than 'claa'
+ * Defaulting to dvi output.
+ */
+ ret = ipuv3_fb_init(&dvi, 0, IPU_PIX_FMT_RGB24);
if (ret)
- printf("LCD cannot be configured: %d\n", ret);
+ printf("dvi cannot be configured: %d\n", ret);
+ return ret;
}
diff --git a/board/freescale/mx53loco/mx53loco.c b/board/freescale/mx53loco/mx53loco.c
index 60cd4f0cfbae4388461a938b97e559dbef0f4d42..8f39c383f111111f83d6935b410d2893d83aadaa 100644
--- a/board/freescale/mx53loco/mx53loco.c
+++ b/board/freescale/mx53loco/mx53loco.c
@@ -503,8 +503,6 @@ int board_init(void)
mxc_set_sata_internal_clock();
setup_iomux_i2c();
- lcd_enable();
-
return 0;
}
diff --git a/board/freescale/mx53loco/mx53loco_video.c b/board/freescale/mx53loco/mx53loco_video.c
index 69991e85116ad26db13ff4c927888ae7f023f0e3..a4d5a6a3650dca0561cc7a39ad6a25fa53a0ec28 100644
--- a/board/freescale/mx53loco/mx53loco_video.c
+++ b/board/freescale/mx53loco/mx53loco_video.c
@@ -46,6 +46,21 @@ static struct fb_videomode const claa_wvga = {
.vmode = FB_VMODE_NONINTERLACED
};
+static struct fb_videomode const seiko_wvga = {
+ .name = "Seiko-43WVF1G",
+ .refresh = 60,
+ .xres = 800,
+ .yres = 480,
+ .pixclock = 29851, /* picosecond (33.5 MHz) */
+ .left_margin = 89,
+ .right_margin = 164,
+ .upper_margin = 23,
+ .lower_margin = 10,
+ .hsync_len = 10,
+ .vsync_len = 10,
+ .sync = 0,
+};
+
void setup_iomux_lcd(void)
{
mxc_request_iomux(MX53_PIN_DI0_DISP_CLK, IOMUX_CONFIG_ALT0);
@@ -86,9 +101,26 @@ void setup_iomux_lcd(void)
gpio_direction_output(IOMUX_TO_GPIO(MX53_PIN_GPIO_1), 1);
}
-void lcd_enable(void)
+int board_video_skip(void)
{
- int ret = ipuv3_fb_init(&claa_wvga, 0, IPU_PIX_FMT_RGB565);
+ int ret;
+ char const *e = getenv("panel");
+
+ if (e) {
+ if (strcmp(e, "seiko") == 0) {
+ ret = ipuv3_fb_init(&seiko_wvga, 0, IPU_PIX_FMT_RGB24);
+ if (ret)
+ printf("Seiko cannot be configured: %d\n", ret);
+ return ret;
+ }
+ }
+
+ /*
+ * 'panel' env variable not found or has different value than 'seiko'
+ * Defaulting to claa lcd.
+ */
+ ret = ipuv3_fb_init(&claa_wvga, 0, IPU_PIX_FMT_RGB565);
if (ret)
- printf("LCD cannot be configured: %d\n", ret);
+ printf("CLAA cannot be configured: %d\n", ret);
+ return ret;
}
diff --git a/board/hale/tt01/tt01.c b/board/hale/tt01/tt01.c
index 0c2cb795dd66448bb44e64fce3703609acaef16d..b4b8209317e4c056301e624d58a71c09c7a4545e 100644
--- a/board/hale/tt01/tt01.c
+++ b/board/hale/tt01/tt01.c
@@ -179,7 +179,7 @@ int board_init(void)
int board_late_init(void)
{
#ifdef CONFIG_HW_WATCHDOG
- mxc_hw_watchdog_enable();
+ hw_watchdog_init();
#endif
return 0;
diff --git a/doc/README.watchdog b/doc/README.watchdog
new file mode 100644
index 0000000000000000000000000000000000000000..ee65008b4bebe565b1d05f460cd37f56c25dc3ce
--- /dev/null
+++ b/doc/README.watchdog
@@ -0,0 +1,29 @@
+Watchdog driver general info
+
+CONFIG_HW_WATCHDOG
+ This enables hw_watchdog_reset to be called during various loops,
+ including waiting for a character on a serial port. But it
+ does not also call hw_watchdog_init. Boards which want this
+ enabled must call this function in their board file. This split
+ is useful because some rom's enable the watchdog when downloading
+ new code, so it must be serviced, but the board would rather it
+ was off. And, it cannot always be turned off once on.
+
+CONFIG_WATCHDOG_TIMEOUT_MSECS
+ Can be used to change the timeout for i.mx31/35/5x/6x.
+ If not given, will default to maximum timeout. This would
+ be 128000 msec for i.mx31/35/5x/6x.
+
+CONFIG_AT91SAM9_WATCHDOG
+ Available for AT91SAM9 to service the watchdog.
+
+CONFIG_FTWDT010_WATCHDOG
+ Available for FTWDT010 to service the watchdog.
+
+CONFIG_FTWDT010_HW_TIMEOUT
+ Can be used to change the timeout for FTWDT010.
+
+CONFIG_IMX_WATCHDOG
+ Available for i.mx31/35/5x/6x to service the watchdog. This is not
+ automatically set because some boards (vision2) still need to define
+ their own hw_watchdog_reset routine.
diff --git a/drivers/watchdog/Makefile b/drivers/watchdog/Makefile
index bc091239104afa042ec4516d32bdc9a51c139dac..b1f4e0f03f8b2b96222518bc6ea54d234995d743 100644
--- a/drivers/watchdog/Makefile
+++ b/drivers/watchdog/Makefile
@@ -27,6 +27,9 @@ LIB := $(obj)libwatchdog.o
COBJS-$(CONFIG_AT91SAM9_WATCHDOG) += at91sam9_wdt.o
COBJS-$(CONFIG_FTWDT010_WATCHDOG) += ftwdt010_wdt.o
+ifneq (,$(filter $(SOC), mx31 mx35 mx5 mx6))
+COBJS-y += imx_watchdog.o
+endif
COBJS-$(CONFIG_TNETV107X_WATCHDOG) += tnetv107x_wdt.o
COBJS-$(CONFIG_S5P) += s5p_wdt.o
diff --git a/drivers/watchdog/imx_watchdog.c b/drivers/watchdog/imx_watchdog.c
new file mode 100644
index 0000000000000000000000000000000000000000..50e602af127b33eef7ab7320a9a552630b8fdc7b
--- /dev/null
+++ b/drivers/watchdog/imx_watchdog.c
@@ -0,0 +1,66 @@
+/*
+ * watchdog.c - driver for i.mx on-chip watchdog
+ *
+ * Licensed under the GPL-2 or later.
+ */
+
+#include <common.h>
+#include <asm/io.h>
+#include <watchdog.h>
+#include <asm/arch/imx-regs.h>
+
+struct watchdog_regs {
+ u16 wcr; /* Control */
+ u16 wsr; /* Service */
+ u16 wrsr; /* Reset Status */
+};
+
+#define WCR_WDZST 0x01
+#define WCR_WDBG 0x02
+#define WCR_WDE 0x04 /* WDOG enable */
+#define WCR_WDT 0x08
+#define WCR_WDW 0x80
+#define SET_WCR_WT(x) (x << 8)
+
+#ifdef CONFIG_IMX_WATCHDOG
+void hw_watchdog_reset(void)
+{
+ struct watchdog_regs *wdog = (struct watchdog_regs *)WDOG1_BASE_ADDR;
+
+ writew(0x5555, &wdog->wsr);
+ writew(0xaaaa, &wdog->wsr);
+}
+
+void hw_watchdog_init(void)
+{
+ struct watchdog_regs *wdog = (struct watchdog_regs *)WDOG1_BASE_ADDR;
+ u16 timeout;
+
+ /*
+ * The timer watchdog can be set between
+ * 0.5 and 128 Seconds. If not defined
+ * in configuration file, sets 128 Seconds
+ */
+#ifndef CONFIG_WATCHDOG_TIMEOUT_MSECS
+#define CONFIG_WATCHDOG_TIMEOUT_MSECS 128000
+#endif
+ timeout = (CONFIG_WATCHDOG_TIMEOUT_MSECS / 500) - 1;
+ writew(WCR_WDZST | WCR_WDBG | WCR_WDE | WCR_WDT |
+ WCR_WDW | SET_WCR_WT(timeout), &wdog->wcr);
+ hw_watchdog_reset();
+}
+#endif
+
+void reset_cpu(ulong addr)
+{
+ struct watchdog_regs *wdog = (struct watchdog_regs *)WDOG1_BASE_ADDR;
+
+ writew(WCR_WDE, &wdog->wcr);
+ writew(0x5555, &wdog->wsr);
+ writew(0xaaaa, &wdog->wsr); /* load minimum 1/2 second timeout */
+ while (1) {
+ /*
+ * spin for .5 seconds before reset
+ */
+ }
+}
diff --git a/include/configs/mx28evk.h b/include/configs/mx28evk.h
index cdf3e1508e2471ce85a3a1e33d4097cefbf9b099..dd0ef2134b529441335f70422afc5476ad9d7e75 100644
--- a/include/configs/mx28evk.h
+++ b/include/configs/mx28evk.h
@@ -290,27 +290,60 @@
"uimage=uImage\0" \
"console_fsl=ttyAM0\0" \
"console_mainline=ttyAMA0\0" \
+ "fdt_file=imx28-evk.dtb\0" \
+ "fdt_addr=0x41000000\0" \
+ "boot_fdt=try\0" \
+ "ip_dyn=yes\0" \
"mmcdev=0\0" \
"mmcpart=2\0" \
- "mmcroot=/dev/mmcblk0p3 rw\0" \
- "mmcrootfstype=ext3 rootwait\0" \
+ "mmcroot=/dev/mmcblk0p3 rw rootwait\0" \
"mmcargs=setenv bootargs console=${console_mainline},${baudrate} " \
- "root=${mmcroot} " \
- "rootfstype=${mmcrootfstype}\0" \
+ "root=${mmcroot}\0" \
"loadbootscript=" \
"fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
"bootscript=echo Running bootscript from mmc ...; " \
"source\0" \
"loaduimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${uimage}\0" \
+ "loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \
"mmcboot=echo Booting from mmc ...; " \
- "run mmcargs; " \
- "bootm\0" \
+ "run mmcargs; " \
+ "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
+ "if run loadfdt; then " \
+ "bootm ${loadaddr} - ${fdt_addr}; " \
+ "else " \
+ "if test ${boot_fdt} = try; then " \
+ "bootm; " \
+ "else " \
+ "echo WARN: Cannot load the DT; " \
+ "fi; " \
+ "fi; " \
+ "else " \
+ "bootm; " \
+ "fi;\0" \
"netargs=setenv bootargs console=${console_mainline},${baudrate} " \
"root=/dev/nfs " \
"ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \
"netboot=echo Booting from net ...; " \
"run netargs; " \
- "dhcp ${uimage}; bootm\0"
+ "if test ${ip_dyn} = yes; then " \
+ "setenv get_cmd dhcp; " \
+ "else " \
+ "setenv get_cmd tftp; " \
+ "fi; " \
+ "${get_cmd} ${uimage}; " \
+ "if test ${boot_fdt} = yes; then " \
+ "if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \
+ "bootm ${loadaddr} - ${fdt_addr}; " \
+ "else " \
+ "if test ${boot_fdt} = try; then " \
+ "bootm; " \
+ "else " \
+ "echo WARN: Cannot load the DT; " \
+ "fi;" \
+ "fi; " \
+ "else " \
+ "bootm; " \
+ "fi;\0"
#define CONFIG_BOOTCOMMAND \
"mmc dev ${mmcdev}; if mmc rescan; then " \
diff --git a/include/configs/mx31pdk.h b/include/configs/mx31pdk.h
index 138a94137303fc20e581addf80d143aa42d2f691..34e429577e0a80504dc386523f4bb26253179d25 100644
--- a/include/configs/mx31pdk.h
+++ b/include/configs/mx31pdk.h
@@ -61,6 +61,7 @@
#define CONFIG_MXC_UART
#define CONFIG_MXC_UART_BASE UART1_BASE
#define CONFIG_HW_WATCHDOG
+#define CONFIG_IMX_WATCHDOG
#define CONFIG_MXC_GPIO
#define CONFIG_HARD_SPI
diff --git a/include/configs/mx53loco.h b/include/configs/mx53loco.h
index 996396b99b65760bfc055d3d8c30aefe956a19e4..a4b610f9b7647997c4b11d5c09c93d457ec09164 100644
--- a/include/configs/mx53loco.h
+++ b/include/configs/mx53loco.h
@@ -119,24 +119,60 @@
#define CONFIG_EXTRA_ENV_SETTINGS \
"script=boot.scr\0" \
"uimage=uImage\0" \
+ "fdt_file=imx53-qsb.dtb\0" \
+ "fdt_addr=0x71000000\0" \
+ "boot_fdt=try\0" \
+ "ip_dyn=yes\0" \
"mmcdev=0\0" \
"mmcpart=2\0" \
"mmcroot=/dev/mmcblk0p3 rw rootwait\0" \
- "mmcargs=setenv bootargs console=ttymxc0,${baudrate} root=${mmcroot} " \
+ "mmcargs=setenv bootargs console=ttymxc0,${baudrate} root=${mmcroot}\0" \
"loadbootscript=" \
"fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
"bootscript=echo Running bootscript from mmc ...; " \
"source\0" \
"loaduimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${uimage}\0" \
+ "loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \
"mmcboot=echo Booting from mmc ...; " \
"run mmcargs; " \
- "bootm\0" \
+ "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
+ "if run loadfdt; then " \
+ "bootm ${loadaddr} - ${fdt_addr}; " \
+ "else " \
+ "if test ${boot_fdt} = try; then " \
+ "bootm; " \
+ "else " \
+ "echo WARN: Cannot load the DT; " \
+ "fi; " \
+ "fi; " \
+ "else " \
+ "bootm; " \
+ "fi;\0" \
"netargs=setenv bootargs console=ttymxc0,${baudrate} " \
"root=/dev/nfs " \
"ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \
"netboot=echo Booting from net ...; " \
"run netargs; " \
- "dhcp ${uimage}; bootm\0" \
+ "if test ${ip_dyn} = yes; then " \
+ "setenv get_cmd dhcp; " \
+ "else " \
+ "setenv get_cmd tftp; " \
+ "fi; " \
+ "${get_cmd} ${uimage}; " \
+ "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
+ "if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \
+ "bootm ${loadaddr} - ${fdt_addr}; " \
+ "else " \
+ "if test ${boot_fdt} = try; then " \
+ "bootm; " \
+ "else " \
+ "echo ERROR: Cannot load the DT; " \
+ "exit; " \
+ "fi; " \
+ "fi; " \
+ "else " \
+ "bootm; " \
+ "fi;\0"
#define CONFIG_BOOTCOMMAND \
"mmc dev ${mmcdev}; if mmc rescan; then " \
@@ -157,7 +193,7 @@
#define CONFIG_SYS_HUSH_PARSER /* use "hush" command parser */
#define CONFIG_SYS_PROMPT "MX53LOCO U-Boot > "
#define CONFIG_AUTO_COMPLETE
-#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
+#define CONFIG_SYS_CBSIZE 512 /* Console I/O Buffer Size */
/* Print Buffer Size */
#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
diff --git a/include/configs/mx6qsabre_common.h b/include/configs/mx6qsabre_common.h
index bd2fb108f4e4f0fe005e2fce7caae14559cdf711..cda4512905cdb9baa6f6b6dc6d8109ec00721f8e 100644
--- a/include/configs/mx6qsabre_common.h
+++ b/include/configs/mx6qsabre_common.h
@@ -83,10 +83,14 @@
#define CONFIG_EXTRA_ENV_SETTINGS \
"script=boot.scr\0" \
"uimage=uImage\0" \
+ "fdt_file=" CONFIG_DEFAULT_FDT_FILE "\0" \
+ "fdt_addr=0x11000000\0" \
+ "boot_fdt=try\0" \
+ "ip_dyn=yes\0" \
"console=" CONFIG_CONSOLE_DEV "\0" \
"fdt_high=0xffffffff\0" \
"initrd_high=0xffffffff\0" \
- "mmcdev=0\0" \
+ "mmcdev=" __stringify(CONFIG_SYS_MMC_ENV_DEV) "\0" \
"mmcpart=1\0" \
"mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \
"mmcargs=setenv bootargs console=${console},${baudrate} " \
@@ -96,15 +100,46 @@
"bootscript=echo Running bootscript from mmc ...; " \
"source\0" \
"loaduimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${uimage}\0" \
- "mmcboot=echo Booting from mmc ...; " \
+ "loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \
+ "mmcboot=echo Booting from mmc ...; " \
"run mmcargs; " \
- "bootm\0" \
+ "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
+ "if run loadfdt; then " \
+ "bootm ${loadaddr} - ${fdt_addr}; " \
+ "else " \
+ "if test ${boot_fdt} = try; then " \
+ "bootm; " \
+ "else " \
+ "echo WARN: Cannot load the DT; " \
+ "fi; " \
+ "fi; " \
+ "else " \
+ "bootm; " \
+ "fi;\0" \
"netargs=setenv bootargs console=${console},${baudrate} " \
"root=/dev/nfs " \
"ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \
"netboot=echo Booting from net ...; " \
"run netargs; " \
- "dhcp ${uimage}; bootm\0" \
+ "if test ${ip_dyn} = yes; then " \
+ "setenv get_cmd dhcp; " \
+ "else " \
+ "setenv get_cmd tftp; " \
+ "fi; " \
+ "${get_cmd} ${uimage}; " \
+ "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
+ "if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \
+ "bootm ${loadaddr} - ${fdt_addr}; " \
+ "else " \
+ "if test ${boot_fdt} = try; then " \
+ "bootm; " \
+ "else " \
+ "echo WARN: Cannot load the DT; " \
+ "fi; " \
+ "fi; " \
+ "else " \
+ "bootm; " \
+ "fi;\0"
#define CONFIG_BOOTCOMMAND \
"mmc dev ${mmcdev};" \
diff --git a/include/configs/mx6qsabreauto.h b/include/configs/mx6qsabreauto.h
index f1ff20169b9906aed22cd9e026f97b036961b30c..f4a082aeaaa3f773c5b6d6374dd90f02a05fa594 100644
--- a/include/configs/mx6qsabreauto.h
+++ b/include/configs/mx6qsabreauto.h
@@ -15,6 +15,7 @@
#define CONFIG_MACH_TYPE 3529
#define CONFIG_MXC_UART_BASE UART4_BASE
#define CONFIG_CONSOLE_DEV "ttymxc3"
+#define CONFIG_DEFAULT_FDT_FILE "imx6q-sabreauto.dtb"
#define CONFIG_MMCROOT "/dev/mmcblk0p2"
#define PHYS_SDRAM_SIZE (2u * 1024 * 1024 * 1024)
diff --git a/include/configs/mx6qsabrelite.h b/include/configs/mx6qsabrelite.h
index 0f6bbb4be24f671af84f565621583fea44039990..752f0981d2c61f948790678d7941051ffd57f48b 100644
--- a/include/configs/mx6qsabrelite.h
+++ b/include/configs/mx6qsabrelite.h
@@ -152,43 +152,78 @@
#define CONFIG_SYS_TEXT_BASE 0x17800000
#define CONFIG_EXTRA_ENV_SETTINGS \
- "script=boot.scr\0" \
- "uimage=uImage\0" \
+ "script=boot.scr\0" \
+ "uimage=uImage\0" \
"console=ttymxc1\0" \
- "fdt_high=0xffffffff\0" \
+ "fdt_high=0xffffffff\0" \
"initrd_high=0xffffffff\0" \
- "mmcdev=0\0" \
- "mmcpart=2\0" \
- "mmcroot=/dev/mmcblk0p3 rootwait rw\0" \
- "mmcargs=setenv bootargs console=${console},${baudrate} " \
- "root=${mmcroot}\0" \
- "loadbootscript=" \
- "fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
- "bootscript=echo Running bootscript from mmc ...; " \
- "source\0" \
- "loaduimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${uimage}\0" \
- "mmcboot=echo Booting from mmc ...; " \
- "run mmcargs; " \
- "bootm\0" \
- "netargs=setenv bootargs console=${console},${baudrate} " \
- "root=/dev/nfs " \
- "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \
- "netboot=echo Booting from net ...; " \
- "run netargs; " \
- "dhcp ${uimage}; bootm\0" \
+ "fdt_file=imx6q-sabrelite.dtb\0" \
+ "fdt_addr=0x11000000\0" \
+ "boot_fdt=try\0" \
+ "ip_dyn=yes\0" \
+ "mmcdev=0\0" \
+ "mmcpart=2\0" \
+ "mmcroot=/dev/mmcblk0p3 rootwait rw\0" \
+ "mmcargs=setenv bootargs console=${console},${baudrate} " \
+ "root=${mmcroot}\0" \
+ "loadbootscript=" \
+ "fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
+ "bootscript=echo Running bootscript from mmc ...; " \
+ "source\0" \
+ "loaduimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${uimage}\0" \
+ "loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \
+ "mmcboot=echo Booting from mmc ...; " \
+ "run mmcargs; " \
+ "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
+ "if run loadfdt; then " \
+ "bootm ${loadaddr} - ${fdt_addr}; " \
+ "else " \
+ "if test ${boot_fdt} = try; then " \
+ "bootm; " \
+ "else " \
+ "echo WARN: Cannot load the DT; " \
+ "fi; " \
+ "fi; " \
+ "else " \
+ "bootm; " \
+ "fi;\0" \
+ "netargs=setenv bootargs console=${console},${baudrate} " \
+ "root=/dev/nfs " \
+ "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \
+ "netboot=echo Booting from net ...; " \
+ "run netargs; " \
+ "if test ${ip_dyn} = yes; then " \
+ "setenv get_cmd dhcp; " \
+ "else " \
+ "setenv get_cmd tftp; " \
+ "fi; " \
+ "${get_cmd} ${uimage}; " \
+ "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
+ "if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \
+ "bootm ${loadaddr} - ${fdt_addr}; " \
+ "else " \
+ "if test ${boot_fdt} = try; then " \
+ "bootm; " \
+ "else " \
+ "echo WARN: Cannot load the DT; " \
+ "fi; " \
+ "fi; " \
+ "else " \
+ "bootm; " \
+ "fi;\0"
#define CONFIG_BOOTCOMMAND \
- "mmc dev ${mmcdev};" \
- "mmc dev ${mmcdev}; if mmc rescan; then " \
- "if run loadbootscript; then " \
- "run bootscript; " \
- "else " \
- "if run loaduimage; then " \
- "run mmcboot; " \
- "else run netboot; " \
- "fi; " \
- "fi; " \
- "else run netboot; fi"
+ "mmc dev ${mmcdev};" \
+ "mmc dev ${mmcdev}; if mmc rescan; then " \
+ "if run loadbootscript; then " \
+ "run bootscript; " \
+ "else " \
+ "if run loaduimage; then " \
+ "run mmcboot; " \
+ "else run netboot; " \
+ "fi; " \
+ "fi; " \
+ "else run netboot; fi"
#define CONFIG_ARP_TIMEOUT 200UL
diff --git a/include/configs/mx6qsabresd.h b/include/configs/mx6qsabresd.h
index a1d92850c82338949195c918b63b8d0a5394519b..3b8d752eed86d20c04da31c82de36c812bc4498c 100644
--- a/include/configs/mx6qsabresd.h
+++ b/include/configs/mx6qsabresd.h
@@ -21,13 +21,14 @@
#define CONFIG_MXC_UART_BASE UART1_BASE
#define CONFIG_CONSOLE_DEV "ttymxc0"
#define CONFIG_MMCROOT "/dev/mmcblk1p2"
+#define CONFIG_DEFAULT_FDT_FILE "imx6q-sabresd.dtb"
#define PHYS_SDRAM_SIZE (1u * 1024 * 1024 * 1024)
#include "mx6qsabre_common.h"
#define CONFIG_SYS_FSL_USDHC_NUM 3
#if defined(CONFIG_ENV_IS_IN_MMC)
-#define CONFIG_SYS_MMC_ENV_DEV 2 /* eMMC/uSDHC4 */
+#define CONFIG_SYS_MMC_ENV_DEV 1 /* SDHC3 */
#define CONFIG_SYS_MMC_ENV_PART 1 /* Boot partition 1 */
#endif
diff --git a/include/configs/qong.h b/include/configs/qong.h
index d9bf2010b833ec81c4011a541b9d50916a5981d5..685c618c346c89609e207ff4f3f1746a217098b7 100644
--- a/include/configs/qong.h
+++ b/include/configs/qong.h
@@ -52,6 +52,7 @@
#define CONFIG_MXC_GPIO
#define CONFIG_HW_WATCHDOG
+#define CONFIG_IMX_WATCHDOG
#define CONFIG_MXC_SPI
#define CONFIG_DEFAULT_SPI_BUS 1
diff --git a/include/watchdog.h b/include/watchdog.h
index b9599143afdb4cb701eb98d3f57d3971d9129f30..328a30b9aae8e22307f03dc93dd8c57bfa3da98a 100644
--- a/include/watchdog.h
+++ b/include/watchdog.h
@@ -35,6 +35,7 @@
* Hardware watchdog
*/
#ifdef CONFIG_HW_WATCHDOG
+ void hw_watchdog_init(void);
#if defined(__ASSEMBLY__)
#define WATCHDOG_RESET bl hw_watchdog_reset
#else