From 81aaa3d9fce5ce9641e5f0c3354da876d859b3b6 Mon Sep 17 00:00:00 2001
From: Bin Meng <bmeng.cn@gmail.com>
Date: Wed, 27 Jan 2016 00:56:34 -0800
Subject: [PATCH] x86: Correct spi node alias
With recent changes spi node was moved to a place as a subnode under
pch, so update the alias to refer to its correct place as well.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
---
arch/x86/dts/bayleybay.dts | 4 ++--
arch/x86/dts/broadwell_som-6896.dts | 4 ++--
arch/x86/dts/chromebook_link.dts | 4 ++--
arch/x86/dts/chromebox_panther.dts | 4 ++--
arch/x86/dts/crownbay.dts | 4 ++--
arch/x86/dts/galileo.dts | 4 ++--
arch/x86/dts/minnowmax.dts | 4 ++--
7 files changed, 14 insertions(+), 14 deletions(-)
diff --git a/arch/x86/dts/bayleybay.dts b/arch/x86/dts/bayleybay.dts
index 9bf707bf0e8..fbca46762c5 100644
--- a/arch/x86/dts/bayleybay.dts
+++ b/arch/x86/dts/bayleybay.dts
@@ -21,7 +21,7 @@
aliases {
serial0 = &serial;
- spi0 = "/spi";
+ spi0 = &spi;
};
config {
@@ -184,7 +184,7 @@
>;
};
- spi {
+ spi: spi {
#address-cells = <1>;
#size-cells = <0>;
compatible = "intel,ich-spi";
diff --git a/arch/x86/dts/broadwell_som-6896.dts b/arch/x86/dts/broadwell_som-6896.dts
index 4e9e410b706..7b2c51504b1 100644
--- a/arch/x86/dts/broadwell_som-6896.dts
+++ b/arch/x86/dts/broadwell_som-6896.dts
@@ -10,7 +10,7 @@
compatible = "advantech,som-6896", "intel,broadwell";
aliases {
- spi0 = "/spi";
+ spi0 = &spi;
};
config {
@@ -34,7 +34,7 @@
reg = <0x0000f800 0 0 0 0>;
compatible = "intel,pch9";
- spi {
+ spi: spi {
#address-cells = <1>;
#size-cells = <0>;
compatible = "intel,ich-spi";
diff --git a/arch/x86/dts/chromebook_link.dts b/arch/x86/dts/chromebook_link.dts
index d148d6e349c..58072031df8 100644
--- a/arch/x86/dts/chromebook_link.dts
+++ b/arch/x86/dts/chromebook_link.dts
@@ -11,7 +11,7 @@
compatible = "google,link", "intel,celeron-ivybridge";
aliases {
- spi0 = "/pci/pch/spi";
+ spi0 = &spi;
usb0 = &usb_0;
usb1 = &usb_1;
};
@@ -252,7 +252,7 @@
/* Enable EC SMI source */
intel,alt-gp-smi-enable = <0x0100>;
- spi {
+ spi: spi {
#address-cells = <1>;
#size-cells = <0>;
compatible = "intel,ich-spi";
diff --git a/arch/x86/dts/chromebox_panther.dts b/arch/x86/dts/chromebox_panther.dts
index 23027016e57..48f0c77d458 100644
--- a/arch/x86/dts/chromebox_panther.dts
+++ b/arch/x86/dts/chromebox_panther.dts
@@ -10,7 +10,7 @@
compatible = "google,panther", "intel,haswell";
aliases {
- spi0 = "/spi";
+ spi0 = &spi;
};
config {
@@ -56,7 +56,7 @@
reg = <0x0000f800 0 0 0 0>;
compatible = "intel,pch9";
- spi {
+ spi: spi {
#address-cells = <1>;
#size-cells = <0>;
compatible = "intel,ich-spi";
diff --git a/arch/x86/dts/crownbay.dts b/arch/x86/dts/crownbay.dts
index d6dd0b49f0f..47fab0fda67 100644
--- a/arch/x86/dts/crownbay.dts
+++ b/arch/x86/dts/crownbay.dts
@@ -19,7 +19,7 @@
compatible = "intel,crownbay", "intel,queensbay";
aliases {
- spi0 = "/spi";
+ spi0 = &spi;
};
config {
@@ -227,7 +227,7 @@
>;
};
- spi {
+ spi: spi {
#address-cells = <1>;
#size-cells = <0>;
compatible = "intel,ich-spi";
diff --git a/arch/x86/dts/galileo.dts b/arch/x86/dts/galileo.dts
index a2f5a1f2234..dd75fc4dc96 100644
--- a/arch/x86/dts/galileo.dts
+++ b/arch/x86/dts/galileo.dts
@@ -18,7 +18,7 @@
compatible = "intel,galileo", "intel,quark";
aliases {
- spi0 = "/spi";
+ spi0 = &spi;
};
config {
@@ -115,7 +115,7 @@
>;
};
- spi {
+ spi: spi {
#address-cells = <1>;
#size-cells = <0>;
compatible = "intel,ich-spi";
diff --git a/arch/x86/dts/minnowmax.dts b/arch/x86/dts/minnowmax.dts
index e7ef7c987b6..7afdf6c30ba 100644
--- a/arch/x86/dts/minnowmax.dts
+++ b/arch/x86/dts/minnowmax.dts
@@ -20,7 +20,7 @@
aliases {
serial0 = &serial;
- spi0 = "/spi";
+ spi0 = &spi;
};
config {
@@ -218,7 +218,7 @@
>;
};
- spi {
+ spi: spi {
#address-cells = <1>;
#size-cells = <0>;
compatible = "intel,ich-spi";
--
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