diff --git a/arch/arm/mach-keystone/clock-k2e.c b/arch/arm/mach-keystone/clock-k2e.c
index 31f66613effdc9691af05309629480f8dea4db33..42092e1060dfce095487f83bd73e578e03525013 100644
--- a/arch/arm/mach-keystone/clock-k2e.c
+++ b/arch/arm/mach-keystone/clock-k2e.c
@@ -17,22 +17,6 @@ const struct keystone_pll_regs keystone_pll_regs[] = {
[DDR3_PLL] = {KS2_DDR3APLLCTL0, KS2_DDR3APLLCTL1},
};
-int dev_speeds[] = {
- SPD800,
- SPD850,
- SPD1000,
- SPD1250,
- SPD1350,
- SPD1400,
- SPD1500,
- SPD1400,
- SPD1350,
- SPD1250,
- SPD1000,
- SPD850,
- SPD800
-};
-
/**
* pll_freq_get - get pll frequency
* Fout = Fref * NF(mult) / NR(prediv) / OD
diff --git a/arch/arm/mach-keystone/clock-k2hk.c b/arch/arm/mach-keystone/clock-k2hk.c
index 1591960795d85c65abb0ed2672b999e82b598c95..96a9f7288613987e9da61204caa6b4801cedf3d2 100644
--- a/arch/arm/mach-keystone/clock-k2hk.c
+++ b/arch/arm/mach-keystone/clock-k2hk.c
@@ -19,38 +19,6 @@ const struct keystone_pll_regs keystone_pll_regs[] = {
[DDR3B_PLL] = {KS2_DDR3BPLLCTL0, KS2_DDR3BPLLCTL1},
};
-int dev_speeds[] = {
- SPD800,
- SPD1000,
- SPD1200,
- SPD800,
- SPD800,
- SPD800,
- SPD800,
- SPD800,
- SPD1200,
- SPD1000,
- SPD800,
- SPD800,
- SPD800,
-};
-
-int arm_speeds[] = {
- SPD800,
- SPD1000,
- SPD1200,
- SPD1350,
- SPD1400,
- SPD800,
- SPD1400,
- SPD1350,
- SPD1200,
- SPD1000,
- SPD800,
- SPD800,
- SPD800,
-};
-
/**
* pll_freq_get - get pll frequency
* Fout = Fref * NF(mult) / NR(prediv) / OD
diff --git a/arch/arm/mach-keystone/clock-k2l.c b/arch/arm/mach-keystone/clock-k2l.c
index 1c5e4d54d89b68f114e7513d223b647564eaa75b..80c1f5134a4bd3c94cd79443b1273bd6a47ea23e 100644
--- a/arch/arm/mach-keystone/clock-k2l.c
+++ b/arch/arm/mach-keystone/clock-k2l.c
@@ -18,38 +18,6 @@ const struct keystone_pll_regs keystone_pll_regs[] = {
[DDR3_PLL] = {KS2_DDR3APLLCTL0, KS2_DDR3APLLCTL1},
};
-int dev_speeds[] = {
- SPD800,
- SPD1000,
- SPD1200,
- SPD800,
- SPD800,
- SPD800,
- SPD800,
- SPD800,
- SPD1200,
- SPD1000,
- SPD800,
- SPD800,
- SPD800,
-};
-
-int arm_speeds[] = {
- SPD800,
- SPD1000,
- SPD1200,
- SPD1350,
- SPD1400,
- SPD800,
- SPD1400,
- SPD1350,
- SPD1200,
- SPD1000,
- SPD800,
- SPD800,
- SPD800,
-};
-
/**
* pll_freq_get - get pll frequency
* Fout = Fref * NF(mult) / NR(prediv) / OD
diff --git a/arch/arm/mach-keystone/clock.c b/arch/arm/mach-keystone/clock.c
index b5b66e4224dd9951ce04c82bdf180a815cec8a73..aaeef79bd3969ff6fe634acf8db9bb36556da18b 100644
--- a/arch/arm/mach-keystone/clock.c
+++ b/arch/arm/mach-keystone/clock.c
@@ -11,7 +11,19 @@
#include <asm/arch/clock.h>
#include <asm/arch/clock_defs.h>
-#define MAX_SPEEDS 13
+/* DEV and ARM speed definitions as specified in DEVSPEED register */
+int __weak speeds[DEVSPEED_NUMSPDS] = {
+ SPD1000,
+ SPD1200,
+ SPD1350,
+ SPD1400,
+ SPD1500,
+ SPD1400,
+ SPD1350,
+ SPD1200,
+ SPD1000,
+ SPD800,
+};
static void wait_for_completion(const struct pll_init_data *data)
{
@@ -199,43 +211,44 @@ void init_plls(int num_pll, struct pll_init_data *config)
init_pll(&config[i]);
}
-static int get_max_speed(u32 val, int *speeds)
+static int get_max_speed(u32 val, u32 speed_supported)
{
- int j;
+ int speed;
- if (!val)
- return speeds[0];
-
- for (j = 1; j < MAX_SPEEDS; j++) {
- if (val == 1)
- return speeds[j];
- val >>= 1;
+ /* Left most setbit gives the speed */
+ for (speed = DEVSPEED_NUMSPDS; speed >= 0; speed--) {
+ if ((val & BIT(speed)) & speed_supported)
+ return speeds[speed];
}
+ /* If no bit is set, use SPD800 */
return SPD800;
}
-#ifdef CONFIG_SOC_K2HK
-static u32 read_efuse_bootrom(void)
-{
- return (cpu_revision() > 1) ? __raw_readl(KS2_EFUSE_BOOTROM) :
- __raw_readl(KS2_REV1_DEVSPEED);
-}
-#else
static inline u32 read_efuse_bootrom(void)
{
- return __raw_readl(KS2_EFUSE_BOOTROM);
+ if (cpu_is_k2hk() && (cpu_revision() <= 1))
+ return __raw_readl(KS2_REV1_DEVSPEED);
+ else
+ return __raw_readl(KS2_EFUSE_BOOTROM);
}
-#endif
-#ifndef CONFIG_SOC_K2E
-inline int get_max_arm_speed(void)
+int get_max_arm_speed(void)
{
- return get_max_speed(read_efuse_bootrom() & 0xffff, arm_speeds);
+ u32 armspeed = read_efuse_bootrom();
+
+ armspeed = (armspeed & DEVSPEED_ARMSPEED_MASK) >>
+ DEVSPEED_ARMSPEED_SHIFT;
+
+ return get_max_speed(armspeed, ARM_SUPPORTED_SPEEDS);
}
-#endif
-inline int get_max_dev_speed(void)
+int get_max_dev_speed(void)
{
- return get_max_speed((read_efuse_bootrom() >> 16) & 0xffff, dev_speeds);
+ u32 devspeed = read_efuse_bootrom();
+
+ devspeed = (devspeed & DEVSPEED_DEVSPEED_MASK) >>
+ DEVSPEED_DEVSPEED_SHIFT;
+
+ return get_max_speed(devspeed, DEV_SUPPORTED_SPEEDS);
}
diff --git a/arch/arm/mach-keystone/include/mach/clock-k2e.h b/arch/arm/mach-keystone/include/mach/clock-k2e.h
index 68e15ac9ac0ae5f30fd0eacb434d7bb306cf234b..6f53e43f0ae16c99b80b879c84d003e907b2d874 100644
--- a/arch/arm/mach-keystone/include/mach/clock-k2e.h
+++ b/arch/arm/mach-keystone/include/mach/clock-k2e.h
@@ -58,17 +58,6 @@ enum pll_type_e {
TETRIS_PLL,
};
-enum {
- SPD800,
- SPD850,
- SPD1000,
- SPD1250,
- SPD1350,
- SPD1400,
- SPD1500,
- SPD_RSV
-};
-
#define CORE_PLL_800 {CORE_PLL, 16, 1, 2}
#define CORE_PLL_850 {CORE_PLL, 17, 1, 2}
#define CORE_PLL_1000 {CORE_PLL, 20, 1, 2}
@@ -83,4 +72,8 @@ enum {
#define DDR3_PLL_800 {DDR3_PLL, 16, 1, 2}
#define DDR3_PLL_333 {DDR3_PLL, 20, 1, 6}
+/* k2e DEV supports 800, 850, 1000, 1250, 1350, 1400, 1500 MHz */
+#define DEV_SUPPORTED_SPEEDS 0xFFF
+#define ARM_SUPPORTED_SPEEDS 0
+
#endif
diff --git a/arch/arm/mach-keystone/include/mach/clock-k2hk.h b/arch/arm/mach-keystone/include/mach/clock-k2hk.h
index f28d5f0c4e99b7eca524864e0c4b065847891e5d..c41210c134e31ac862fe1960247e892a7ce95167 100644
--- a/arch/arm/mach-keystone/include/mach/clock-k2hk.h
+++ b/arch/arm/mach-keystone/include/mach/clock-k2hk.h
@@ -64,15 +64,6 @@ enum pll_type_e {
DDR3B_PLL,
};
-enum {
- SPD800,
- SPD1000,
- SPD1200,
- SPD1350,
- SPD1400,
- SPD_RSV
-};
-
#define CORE_PLL_799 {CORE_PLL, 13, 1, 2}
#define CORE_PLL_983 {CORE_PLL, 16, 1, 2}
#define CORE_PLL_999 {CORE_PLL, 122, 15, 1}
@@ -100,4 +91,9 @@ enum {
#define DDR3_PLL_800(x) {DDR3##x##_PLL, 16, 1, 2}
#define DDR3_PLL_333(x) {DDR3##x##_PLL, 20, 1, 6}
+/* k2h DEV supports 800, 1000, 1200 MHz */
+#define DEV_SUPPORTED_SPEEDS 0x383
+/* k2h ARM supportd 800, 1000, 1200, 1350, 1400 MHz */
+#define ARM_SUPPORTED_SPEEDS 0x3EF
+
#endif
diff --git a/arch/arm/mach-keystone/include/mach/clock-k2l.h b/arch/arm/mach-keystone/include/mach/clock-k2l.h
index bb9a5c4dcf3bca5b7310082fe374a1de9c629e3e..c145a1eeb0bd48434cb619b3a1a4e25509685812 100644
--- a/arch/arm/mach-keystone/include/mach/clock-k2l.h
+++ b/arch/arm/mach-keystone/include/mach/clock-k2l.h
@@ -59,15 +59,6 @@ enum pll_type_e {
DDR3_PLL,
};
-enum {
- SPD800,
- SPD1000,
- SPD1200,
- SPD1350,
- SPD1400,
- SPD_RSV
-};
-
#define CORE_PLL_799 {CORE_PLL, 13, 1, 2}
#define CORE_PLL_983 {CORE_PLL, 16, 1, 2}
#define CORE_PLL_1000 {CORE_PLL, 114, 7, 2}
@@ -92,4 +83,9 @@ enum {
#define DDR3_PLL_800 {DDR3_PLL, 16, 1, 2}
#define DDR3_PLL_333 {DDR3_PLL, 20, 1, 6}
+/* k2l DEV supports 800, 1000, 1200 MHz */
+#define DEV_SUPPORTED_SPEEDS 0x383
+/* k2l ARM supportd 800, 1000, 1200, MHz */
+#define ARM_SUPPORTED_SPEEDS 0x383
+
#endif
diff --git a/arch/arm/mach-keystone/include/mach/clock.h b/arch/arm/mach-keystone/include/mach/clock.h
index 8d4cad209f6256acc9f4257c4dcbc1c91f64e26d..cb2b43c937fa2485588bf686343f2f5509b61710 100644
--- a/arch/arm/mach-keystone/include/mach/clock.h
+++ b/arch/arm/mach-keystone/include/mach/clock.h
@@ -32,6 +32,18 @@
#define GENERATE_INDX_STR(NUM, STRING) #NUM"\t- "#STRING"\n"
#define CLOCK_INDEXES_LIST CLK_LIST(GENERATE_INDX_STR)
+enum {
+ SPD800,
+ SPD850,
+ SPD1000,
+ SPD1200,
+ SPD1250,
+ SPD1350,
+ SPD1400,
+ SPD1500,
+ NUM_SPDS,
+};
+
enum clk_e {
CLK_LIST(GENERATE_ENUM)
};
@@ -50,9 +62,8 @@ struct pll_init_data {
};
extern const struct keystone_pll_regs keystone_pll_regs[];
-extern int dev_speeds[];
-extern int arm_speeds[];
extern s16 divn_val[];
+extern int speeds[];
void init_plls(int num_pll, struct pll_init_data *config);
void init_pll(const struct pll_init_data *data);
diff --git a/arch/arm/mach-keystone/include/mach/hardware.h b/arch/arm/mach-keystone/include/mach/hardware.h
index 6082b87a162d7506e7b1c1e70dc5a10d0f055d57..cf32ae547a7efb80a1a0dd5f14bf51ea50f9a4a7 100644
--- a/arch/arm/mach-keystone/include/mach/hardware.h
+++ b/arch/arm/mach-keystone/include/mach/hardware.h
@@ -248,6 +248,13 @@ typedef volatile unsigned int *dv_reg_p;
#define CPU_66AK2Ex 0xb9a6
#define CPU_66AK2Lx 0xb9a7
+/* DEVSPEED register */
+#define DEVSPEED_DEVSPEED_SHIFT 16
+#define DEVSPEED_DEVSPEED_MASK (0xfff << 16)
+#define DEVSPEED_ARMSPEED_SHIFT 0
+#define DEVSPEED_ARMSPEED_MASK 0xfff
+#define DEVSPEED_NUMSPDS 12
+
#ifdef CONFIG_SOC_K2HK
#include <asm/arch/hardware-k2hk.h>
#endif
diff --git a/board/ti/ks2_evm/board_k2e.c b/board/ti/ks2_evm/board_k2e.c
index 98acc96e1c1b5f6045c687c5d340db27cf1634a8..2043759533021c03ad80141a0e2161d77d89645b 100644
--- a/board/ti/ks2_evm/board_k2e.c
+++ b/board/ti/ks2_evm/board_k2e.c
@@ -26,14 +26,30 @@ unsigned int external_clk[ext_clk_count] = {
[usb_clk] = 100000000,
};
-static struct pll_init_data core_pll_config[] = {
- CORE_PLL_800,
- CORE_PLL_850,
- CORE_PLL_1000,
- CORE_PLL_1250,
- CORE_PLL_1350,
- CORE_PLL_1400,
- CORE_PLL_1500,
+static struct pll_init_data core_pll_config[NUM_SPDS] = {
+ [SPD800] = CORE_PLL_800,
+ [SPD850] = CORE_PLL_850,
+ [SPD1000] = CORE_PLL_1000,
+ [SPD1250] = CORE_PLL_1250,
+ [SPD1350] = CORE_PLL_1350,
+ [SPD1400] = CORE_PLL_1400,
+ [SPD1500] = CORE_PLL_1500,
+};
+
+/* DEV and ARM speed definitions as specified in DEVSPEED register */
+int speeds[DEVSPEED_NUMSPDS] = {
+ SPD850,
+ SPD1000,
+ SPD1250,
+ SPD1350,
+ SPD1400,
+ SPD1500,
+ SPD1400,
+ SPD1350,
+ SPD1250,
+ SPD1000,
+ SPD850,
+ SPD800,
};
s16 divn_val[16] = {
diff --git a/board/ti/ks2_evm/board_k2hk.c b/board/ti/ks2_evm/board_k2hk.c
index cb64934c24155488cbf699c13de05aea2c3f4347..6c0a092c96725b1d7af68bf9fb9a8df791e2b24e 100644
--- a/board/ti/ks2_evm/board_k2hk.c
+++ b/board/ti/ks2_evm/board_k2hk.c
@@ -29,10 +29,10 @@ unsigned int external_clk[ext_clk_count] = {
[rp1_clk] = 123456789
};
-static struct pll_init_data core_pll_config[] = {
- CORE_PLL_799,
- CORE_PLL_999,
- CORE_PLL_1200,
+static struct pll_init_data core_pll_config[NUM_SPDS] = {
+ [SPD800] = CORE_PLL_799,
+ [SPD1000] = CORE_PLL_999,
+ [SPD1200] = CORE_PLL_1200,
};
s16 divn_val[16] = {
@@ -40,11 +40,11 @@ s16 divn_val[16] = {
};
static struct pll_init_data tetris_pll_config[] = {
- TETRIS_PLL_800,
- TETRIS_PLL_1000,
- TETRIS_PLL_1200,
- TETRIS_PLL_1350,
- TETRIS_PLL_1400,
+ [SPD800] = TETRIS_PLL_800,
+ [SPD1000] = TETRIS_PLL_1000,
+ [SPD1200] = TETRIS_PLL_1200,
+ [SPD1350] = TETRIS_PLL_1350,
+ [SPD1400] = TETRIS_PLL_1400,
};
static struct pll_init_data pa_pll_config =
diff --git a/board/ti/ks2_evm/board_k2l.c b/board/ti/ks2_evm/board_k2l.c
index 2c433ee01a7feac932a39bbd6a2d31980c70124b..d6c0492d7656147149001a1b2d72733d2c4bd4e0 100644
--- a/board/ti/ks2_evm/board_k2l.c
+++ b/board/ti/ks2_evm/board_k2l.c
@@ -25,10 +25,10 @@ unsigned int external_clk[ext_clk_count] = {
[usb_clk] = 100000000,
};
-static struct pll_init_data core_pll_config[] = {
- CORE_PLL_799,
- CORE_PLL_1000,
- CORE_PLL_1198,
+static struct pll_init_data core_pll_config[NUM_SPDS] = {
+ [SPD800] = CORE_PLL_799,
+ [SPD1000] = CORE_PLL_1000,
+ [SPD800] = CORE_PLL_1198,
};
s16 divn_val[16] = {
@@ -36,11 +36,11 @@ s16 divn_val[16] = {
};
static struct pll_init_data tetris_pll_config[] = {
- TETRIS_PLL_799,
- TETRIS_PLL_1000,
- TETRIS_PLL_1198,
- TETRIS_PLL_1352,
- TETRIS_PLL_1401,
+ [SPD800] = TETRIS_PLL_799,
+ [SPD1000] = TETRIS_PLL_1000,
+ [SPD1200] = TETRIS_PLL_1198,
+ [SPD1350] = TETRIS_PLL_1352,
+ [SPD1400] = TETRIS_PLL_1401,
};
static struct pll_init_data pa_pll_config =