diff --git a/arch/powerpc/cpu/mpc85xx/cmd_errata.c b/arch/powerpc/cpu/mpc85xx/cmd_errata.c index e5ecf5dae59d2384cdf671a58fc49a4a66a7e457..5d72f4c342d36dcb9462b67ed71e35e72426aec4 100644 --- a/arch/powerpc/cpu/mpc85xx/cmd_errata.c +++ b/arch/powerpc/cpu/mpc85xx/cmd_errata.c @@ -240,6 +240,10 @@ static int do_errata(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) #ifdef CONFIG_SYS_FSL_ERRATUM_A_004934 puts("Work-around for Erratum A004934 enabled\n"); #endif +#ifdef CONFIG_SYS_FSL_ERRATUM_A005871 + if (IS_SVR_REV(svr, 1, 0)) + puts("Work-around for Erratum A005871 enabled\n"); +#endif #ifdef CONFIG_SYS_FSL_ERRATUM_A004849 /* This work-around is implemented in PBI, so just check for it */ check_erratum_a4849(svr); diff --git a/arch/powerpc/cpu/mpc85xx/cpu_init.c b/arch/powerpc/cpu/mpc85xx/cpu_init.c index cc0930002cf17c772e6b37abe96216fe0c9dd187..de9d9161115d1713fb02ee90c22845b04f7e58bd 100644 --- a/arch/powerpc/cpu/mpc85xx/cpu_init.c +++ b/arch/powerpc/cpu/mpc85xx/cpu_init.c @@ -548,6 +548,20 @@ skip_l2: /* needs to be in ram since code uses global static vars */ fsl_serdes_init(); +#ifdef CONFIG_SYS_FSL_ERRATUM_A005871 + if (IS_SVR_REV(svr, 1, 0)) { + int i; + __be32 *p = (void __iomem *)CONFIG_SYS_DCSRBAR + 0xb004c; + + for (i = 0; i < 12; i++) { + p += i + (i > 5 ? 11 : 0); + out_be32(p, 0x2); + } + p = (void __iomem *)CONFIG_SYS_DCSRBAR + 0xb0108; + out_be32(p, 0x34); + } +#endif + #ifdef CONFIG_SYS_SRIO srio_init(); #ifdef CONFIG_SYS_FSL_SRIO_PCIE_BOOT_MASTER diff --git a/arch/powerpc/include/asm/config_mpc85xx.h b/arch/powerpc/include/asm/config_mpc85xx.h index 7943fa442d41e910d0550ab7f002349987144476..d57c178f7f23d61c2a5adcb7f2aad92900a5edfa 100644 --- a/arch/powerpc/include/asm/config_mpc85xx.h +++ b/arch/powerpc/include/asm/config_mpc85xx.h @@ -538,6 +538,7 @@ #define CONFIG_SYS_FSL_USB_INTERNAL_UTMI_PHY #define CONFIG_SYS_FSL_ERRATUM_A004468 #define CONFIG_SYS_FSL_ERRATUM_A_004934 +#define CONFIG_SYS_FSL_ERRATUM_A005871 #define CONFIG_SYS_CCSRBAR_DEFAULT 0xfe000000 #elif defined(CONFIG_PPC_B4420)