From 01a072c6cf0539e7b8e78cce7f1f53884121646a Mon Sep 17 00:00:00 2001
From: Mugunthan V N <mugunthanvnm@ti.com>
Date: Fri, 7 Apr 2017 13:42:00 +0200
Subject: [PATCH 001/282] arm: omap: sata: move enable sata clocks to
enable_basic_clocks()
All the clocks which has to be enabled has to be done in
enable_basic_clocks(), so moving enable sata clock to common
clocks enable function.
Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
---
arch/arm/mach-omap2/omap5/hw_data.c | 12 ++++++++++++
arch/arm/mach-omap2/sata.c | 23 -----------------------
2 files changed, 12 insertions(+), 23 deletions(-)
diff --git a/arch/arm/mach-omap2/omap5/hw_data.c b/arch/arm/mach-omap2/omap5/hw_data.c
index 5d956b5b14a..a8a6b8a869e 100644
--- a/arch/arm/mach-omap2/omap5/hw_data.c
+++ b/arch/arm/mach-omap2/omap5/hw_data.c
@@ -361,6 +361,9 @@ void enable_basic_clocks(void)
(*prcm)->cm_l4per_gpio6_clkctrl,
(*prcm)->cm_l4per_gpio7_clkctrl,
(*prcm)->cm_l4per_gpio8_clkctrl,
+#ifdef CONFIG_SCSI_AHCI_PLAT
+ (*prcm)->cm_l3init_ocp2scp3_clkctrl,
+#endif
0
};
@@ -378,6 +381,9 @@ void enable_basic_clocks(void)
#ifdef CONFIG_TI_QSPI
(*prcm)->cm_l4per_qspi_clkctrl,
+#endif
+#ifdef CONFIG_SCSI_AHCI_PLAT
+ (*prcm)->cm_l3init_sata_clkctrl,
#endif
0
};
@@ -411,6 +417,12 @@ void enable_basic_clocks(void)
setbits_le32((*prcm)->cm_l4per_qspi_clkctrl, (1<<24));
#endif
+#ifdef CONFIG_SCSI_AHCI_PLAT
+ /* Enable optional functional clock for SATA */
+ setbits_le32((*prcm)->cm_l3init_sata_clkctrl,
+ SATA_CLKCTRL_OPTFCLKEN_MASK);
+#endif
+
/* Enable SCRM OPT clocks for PER and CORE dpll */
setbits_le32((*prcm)->cm_wkupaon_scrm_clkctrl,
OPTFCLKEN_SCRM_PER_MASK);
diff --git a/arch/arm/mach-omap2/sata.c b/arch/arm/mach-omap2/sata.c
index 2c2d1bce363..0c8268905aa 100644
--- a/arch/arm/mach-omap2/sata.c
+++ b/arch/arm/mach-omap2/sata.c
@@ -37,29 +37,6 @@ int init_sata(int dev)
int ret;
u32 val;
- u32 const clk_domains_sata[] = {
- 0
- };
-
- u32 const clk_modules_hw_auto_sata[] = {
- (*prcm)->cm_l3init_ocp2scp3_clkctrl,
- 0
- };
-
- u32 const clk_modules_explicit_en_sata[] = {
- (*prcm)->cm_l3init_sata_clkctrl,
- 0
- };
-
- do_enable_clocks(clk_domains_sata,
- clk_modules_hw_auto_sata,
- clk_modules_explicit_en_sata,
- 0);
-
- /* Enable optional functional clock for SATA */
- setbits_le32((*prcm)->cm_l3init_sata_clkctrl,
- SATA_CLKCTRL_OPTFCLKEN_MASK);
-
sata_phy.power_reg = (void __iomem *)(*ctrl)->control_phy_power_sata;
/* Power up the PHY */
--
GitLab
From fd138ca1bddc803ff1ec0da63e2c215668fecaeb Mon Sep 17 00:00:00 2001
From: Jean-Jacques Hiblot <jjhiblot@ti.com>
Date: Fri, 7 Apr 2017 13:42:01 +0200
Subject: [PATCH 002/282] arm: omap: sata: compile out board-level sata code
when CONFIG_DM_SCSI is defined
When CONFIG_DM_SCSI is defined, the SATA initialization will be implemented
in the scsi-uclass driver.
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
---
arch/arm/mach-omap2/Makefile | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/arm/mach-omap2/Makefile b/arch/arm/mach-omap2/Makefile
index e814eb008e4..aa3986dddb1 100644
--- a/arch/arm/mach-omap2/Makefile
+++ b/arch/arm/mach-omap2/Makefile
@@ -29,9 +29,11 @@ obj-y += abb.o
endif
ifneq ($(CONFIG_OMAP54XX),)
+ifeq ($(CONFIG_DM_SCSI),)
obj-y += pipe3-phy.o
obj-$(CONFIG_SCSI_AHCI_PLAT) += sata.o
endif
+endif
ifeq ($(CONFIG_SYS_DCACHE_OFF),)
obj-y += omap-cache.o
--
GitLab
From e39cecfdaf8ee6fa222a8209aa0183be978f370d Mon Sep 17 00:00:00 2001
From: Jean-Jacques Hiblot <jjhiblot@ti.com>
Date: Fri, 7 Apr 2017 13:42:06 +0200
Subject: [PATCH 003/282] scsi: make the LUN a parameter of scsi_detect_dev()
This is a cosmetic change. target and LUN have kind of the same role in
this function. One of them was passed as a parameter and the other was
embedded in a structure. For consistency, pass both of them as parameters.
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
---
common/scsi.c | 14 +++++++-------
1 file changed, 7 insertions(+), 7 deletions(-)
diff --git a/common/scsi.c b/common/scsi.c
index fb5b407f6b1..d55ba892a6f 100644
--- a/common/scsi.c
+++ b/common/scsi.c
@@ -473,14 +473,15 @@ static void scsi_init_dev_desc(struct blk_desc *dev_desc, int devnum)
* scsi_detect_dev - Detect scsi device
*
* @target: target id
+ * @lun: target lun
* @dev_desc: block device description
*
* The scsi_detect_dev detects and fills a dev_desc structure when the device is
- * detected. The LUN number is taken from the struct blk_desc *dev_desc.
+ * detected.
*
* Return: 0 on success, error value otherwise
*/
-static int scsi_detect_dev(int target, struct blk_desc *dev_desc)
+static int scsi_detect_dev(int target, int lun, struct blk_desc *dev_desc)
{
unsigned char perq, modi;
lbaint_t capacity;
@@ -488,7 +489,7 @@ static int scsi_detect_dev(int target, struct blk_desc *dev_desc)
ccb *pccb = (ccb *)&tempccb;
pccb->target = target;
- pccb->lun = dev_desc->lun;
+ pccb->lun = lun;
pccb->pdata = (unsigned char *)&tempbuff;
pccb->datalen = 512;
scsi_setup_inquiry(pccb);
@@ -599,8 +600,7 @@ int scsi_scan(int mode)
bdesc = dev_get_uclass_platdata(bdev);
scsi_init_dev_desc_priv(bdesc);
- bdesc->lun = lun;
- ret = scsi_detect_dev(i, bdesc);
+ ret = scsi_detect_dev(i, lun, bdesc);
if (ret) {
device_unbind(bdev);
continue;
@@ -630,8 +630,8 @@ int scsi_scan(int mode)
scsi_max_devs = 0;
for (i = 0; i < CONFIG_SYS_SCSI_MAX_SCSI_ID; i++) {
for (lun = 0; lun < CONFIG_SYS_SCSI_MAX_LUN; lun++) {
- scsi_dev_desc[scsi_max_devs].lun = lun;
- ret = scsi_detect_dev(i, &scsi_dev_desc[scsi_max_devs]);
+ ret = scsi_detect_dev(i, lun,
+ &scsi_dev_desc[scsi_max_devs]);
if (ret)
continue;
--
GitLab
From 1330a726ff0c8164cf6035ab4a6d1e31805f69d1 Mon Sep 17 00:00:00 2001
From: Jean-Jacques Hiblot <jjhiblot@ti.com>
Date: Fri, 7 Apr 2017 13:42:07 +0200
Subject: [PATCH 004/282] scsi: move the partition initialization out of the
scsi detection
We might want to get information about the scsi device without initializing the partition.
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
---
common/scsi.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/common/scsi.c b/common/scsi.c
index d55ba892a6f..972ef338be6 100644
--- a/common/scsi.c
+++ b/common/scsi.c
@@ -540,7 +540,6 @@ static int scsi_detect_dev(int target, int lun, struct blk_desc *dev_desc)
dev_desc->blksz = blksz;
dev_desc->log2blksz = LOG2(dev_desc->blksz);
dev_desc->type = perq;
- part_init(&dev_desc[0]);
removable:
return 0;
}
@@ -605,6 +604,7 @@ int scsi_scan(int mode)
device_unbind(bdev);
continue;
}
+ part_init(bdesc);
if (mode == 1) {
printf(" Device %d: ", 0);
@@ -634,6 +634,7 @@ int scsi_scan(int mode)
&scsi_dev_desc[scsi_max_devs]);
if (ret)
continue;
+ part_init(&scsi_dev_desc[scsi_max_devs]);
if (mode == 1) {
printf(" Device %d: ", 0);
--
GitLab
From 4e27b9a5845e9c061b315b7ca301eff982d6898f Mon Sep 17 00:00:00 2001
From: Jean-Jacques Hiblot <jjhiblot@ti.com>
Date: Fri, 7 Apr 2017 13:42:08 +0200
Subject: [PATCH 005/282] dm: scsi: fix divide-by-0 error in scsi_scan()
With DM_SCSI enabled, blk_create_devicef() is called with blkz = 0, leading
to a divide-by-0 exception.
scsi_detect_dev() can be used to get the required parameters (block size
and number of blocks) from the drive before calling blk_create_devicef().
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
---
common/scsi.c | 35 ++++++++++++++++++++++++++---------
1 file changed, 26 insertions(+), 9 deletions(-)
diff --git a/common/scsi.c b/common/scsi.c
index 972ef338be6..d37222cc6b8 100644
--- a/common/scsi.c
+++ b/common/scsi.c
@@ -580,9 +580,19 @@ int scsi_scan(int mode)
for (lun = 0; lun < plat->max_lun; lun++) {
struct udevice *bdev; /* block device */
/* block device description */
+ struct blk_desc _bd;
struct blk_desc *bdesc;
char str[10];
+ scsi_init_dev_desc_priv(&_bd);
+ ret = scsi_detect_dev(i, lun, &_bd);
+ if (ret)
+ /*
+ * no device detected?
+ * check the next lun.
+ */
+ continue;
+
/*
* Create only one block device and do detection
* to make sure that there won't be a lot of
@@ -590,20 +600,27 @@ int scsi_scan(int mode)
*/
snprintf(str, sizeof(str), "id%dlun%d", i, lun);
ret = blk_create_devicef(dev, "scsi_blk",
- str, IF_TYPE_SCSI,
- -1, 0, 0, &bdev);
+ str, IF_TYPE_SCSI,
+ -1,
+ _bd.blksz,
+ _bd.blksz * _bd.lba,
+ &bdev);
if (ret) {
debug("Can't create device\n");
return ret;
}
- bdesc = dev_get_uclass_platdata(bdev);
- scsi_init_dev_desc_priv(bdesc);
- ret = scsi_detect_dev(i, lun, bdesc);
- if (ret) {
- device_unbind(bdev);
- continue;
- }
+ bdesc = dev_get_uclass_platdata(bdev);
+ bdesc->target = i;
+ bdesc->lun = lun;
+ bdesc->removable = _bd.removable;
+ bdesc->type = _bd.type;
+ memcpy(&bdesc->vendor, &_bd.vendor,
+ sizeof(_bd.vendor));
+ memcpy(&bdesc->product, &_bd.product,
+ sizeof(_bd.product));
+ memcpy(&bdesc->revision, &_bd.revision,
+ sizeof(_bd.revision));
part_init(bdesc);
if (mode == 1) {
--
GitLab
From a89c3a04bcb416102eaa0b7c398209dbc1c796a2 Mon Sep 17 00:00:00 2001
From: Simon Glass <sjg@chromium.org>
Date: Mon, 10 Apr 2017 11:34:51 -0600
Subject: [PATCH 006/282] sandbox: Add some test LEDs
Add some LEDs to the standard sandbox device tree.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Ziping Chen <techping.chan@gmail.com>
---
arch/sandbox/dts/sandbox.dts | 14 ++++++++++++++
cmd/{led.c => legacy_led.c} | 0
2 files changed, 14 insertions(+)
rename cmd/{led.c => legacy_led.c} (100%)
diff --git a/arch/sandbox/dts/sandbox.dts b/arch/sandbox/dts/sandbox.dts
index 20614646f7f..40f423da256 100644
--- a/arch/sandbox/dts/sandbox.dts
+++ b/arch/sandbox/dts/sandbox.dts
@@ -123,6 +123,20 @@
yres = <768>;
};
+ leds {
+ compatible = "gpio-leds";
+
+ iracibble {
+ gpios = <&gpio_a 1 0>;
+ label = "sandbox:red";
+ };
+
+ martinet {
+ gpios = <&gpio_a 2 0>;
+ label = "sandbox:green";
+ };
+ };
+
pci: pci-controller {
compatible = "sandbox,pci";
device_type = "pci";
diff --git a/cmd/led.c b/cmd/legacy_led.c
similarity index 100%
rename from cmd/led.c
rename to cmd/legacy_led.c
--
GitLab
From 9b36f748162e3d09b16df5b7c670d183292ecdc1 Mon Sep 17 00:00:00 2001
From: Simon Glass <sjg@chromium.org>
Date: Mon, 10 Apr 2017 11:34:52 -0600
Subject: [PATCH 007/282] dm: led: Add a missing blank line in the Kconfig file
There should be a blank line between each option. Add one before LED_GPIO.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Ziping Chen <techping.chan@gmail.com>
---
drivers/led/Kconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/led/Kconfig b/drivers/led/Kconfig
index 609b1fa3fe9..0ef45bc06a2 100644
--- a/drivers/led/Kconfig
+++ b/drivers/led/Kconfig
@@ -17,6 +17,7 @@ config SPL_LED
If this is acceptable and you have a need to use LEDs in SPL,
enable this option. You will need to enable device tree in SPL
for this to work.
+
config LED_GPIO
bool "LED support for GPIO-connected LEDs"
depends on LED && DM_GPIO
--
GitLab
From 56e19871dc2a05aa5508ea51af35df59bbdb6cf5 Mon Sep 17 00:00:00 2001
From: Simon Glass <sjg@chromium.org>
Date: Mon, 10 Apr 2017 11:34:53 -0600
Subject: [PATCH 008/282] dm: led: Rename struct led_uclass_plat
These structures are normally named with 'uc' instead of 'uclass'. Change
this one for consistency.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Ziping Chen <techping.chan@gmail.com>
---
drivers/led/led-uclass.c | 4 ++--
drivers/led/led_gpio.c | 4 ++--
include/led.h | 4 ++--
3 files changed, 6 insertions(+), 6 deletions(-)
diff --git a/drivers/led/led-uclass.c b/drivers/led/led-uclass.c
index 784ac870e27..ca4f98c0b35 100644
--- a/drivers/led/led-uclass.c
+++ b/drivers/led/led-uclass.c
@@ -22,7 +22,7 @@ int led_get_by_label(const char *label, struct udevice **devp)
if (ret)
return ret;
uclass_foreach_dev(dev, uc) {
- struct led_uclass_plat *uc_plat = dev_get_uclass_platdata(dev);
+ struct led_uc_plat *uc_plat = dev_get_uclass_platdata(dev);
/* Ignore the top-level LED node */
if (uc_plat->label && !strcmp(label, uc_plat->label))
@@ -45,5 +45,5 @@ int led_set_on(struct udevice *dev, int on)
UCLASS_DRIVER(led) = {
.id = UCLASS_LED,
.name = "led",
- .per_device_platdata_auto_alloc_size = sizeof(struct led_uclass_plat),
+ .per_device_platdata_auto_alloc_size = sizeof(struct led_uc_plat),
};
diff --git a/drivers/led/led_gpio.c b/drivers/led/led_gpio.c
index 5b119903f55..97b5da35cd4 100644
--- a/drivers/led/led_gpio.c
+++ b/drivers/led/led_gpio.c
@@ -30,7 +30,7 @@ static int gpio_led_set_on(struct udevice *dev, int on)
static int led_gpio_probe(struct udevice *dev)
{
- struct led_uclass_plat *uc_plat = dev_get_uclass_platdata(dev);
+ struct led_uc_plat *uc_plat = dev_get_uclass_platdata(dev);
struct led_gpio_priv *priv = dev_get_priv(dev);
/* Ignore the top-level LED node */
@@ -65,7 +65,7 @@ static int led_gpio_bind(struct udevice *parent)
for (node = fdt_first_subnode(blob, dev_of_offset(parent));
node > 0;
node = fdt_next_subnode(blob, node)) {
- struct led_uclass_plat *uc_plat;
+ struct led_uc_plat *uc_plat;
const char *label;
label = fdt_getprop(blob, node, "label", NULL);
diff --git a/include/led.h b/include/led.h
index b929d0ca3c7..a856b3d9ff7 100644
--- a/include/led.h
+++ b/include/led.h
@@ -9,11 +9,11 @@
#define __LED_H
/**
- * struct led_uclass_plat - Platform data the uclass stores about each device
+ * struct led_uc_plat - Platform data the uclass stores about each device
*
* @label: LED label
*/
-struct led_uclass_plat {
+struct led_uc_plat {
const char *label;
};
--
GitLab
From ddae9fcddc48d1e624c941148d0df5a4fc7d7d5c Mon Sep 17 00:00:00 2001
From: Simon Glass <sjg@chromium.org>
Date: Mon, 10 Apr 2017 11:34:54 -0600
Subject: [PATCH 009/282] dm: led: Adjust the LED uclass
At present this is very simple, supporting only on and off. We want to
also support toggling and blinking. As a first step, change the name of
the main method and use an enum to indicate the state.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Ziping Chen <techping.chan@gmail.com>
---
drivers/led/led-uclass.c | 6 +++---
drivers/led/led_gpio.c | 6 +++---
include/led.h | 19 +++++++++++++------
test/dm/led.c | 5 +++--
4 files changed, 22 insertions(+), 14 deletions(-)
diff --git a/drivers/led/led-uclass.c b/drivers/led/led-uclass.c
index ca4f98c0b35..b30346913b9 100644
--- a/drivers/led/led-uclass.c
+++ b/drivers/led/led-uclass.c
@@ -32,14 +32,14 @@ int led_get_by_label(const char *label, struct udevice **devp)
return -ENODEV;
}
-int led_set_on(struct udevice *dev, int on)
+int led_set_state(struct udevice *dev, enum led_state_t state)
{
struct led_ops *ops = led_get_ops(dev);
- if (!ops->set_on)
+ if (!ops->set_state)
return -ENOSYS;
- return ops->set_on(dev, on);
+ return ops->set_state(dev, state);
}
UCLASS_DRIVER(led) = {
diff --git a/drivers/led/led_gpio.c b/drivers/led/led_gpio.c
index 97b5da35cd4..af8133d3c70 100644
--- a/drivers/led/led_gpio.c
+++ b/drivers/led/led_gpio.c
@@ -18,14 +18,14 @@ struct led_gpio_priv {
struct gpio_desc gpio;
};
-static int gpio_led_set_on(struct udevice *dev, int on)
+static int gpio_led_set_state(struct udevice *dev, enum led_state_t state)
{
struct led_gpio_priv *priv = dev_get_priv(dev);
if (!dm_gpio_is_valid(&priv->gpio))
return -EREMOTEIO;
- return dm_gpio_set_value(&priv->gpio, on);
+ return dm_gpio_set_value(&priv->gpio, state);
}
static int led_gpio_probe(struct udevice *dev)
@@ -87,7 +87,7 @@ static int led_gpio_bind(struct udevice *parent)
}
static const struct led_ops gpio_led_ops = {
- .set_on = gpio_led_set_on,
+ .set_state = gpio_led_set_state,
};
static const struct udevice_id led_gpio_ids[] = {
diff --git a/include/led.h b/include/led.h
index a856b3d9ff7..8af87ea8ea8 100644
--- a/include/led.h
+++ b/include/led.h
@@ -17,15 +17,22 @@ struct led_uc_plat {
const char *label;
};
+enum led_state_t {
+ LEDST_OFF = 0,
+ LEDST_ON = 1,
+
+ LEDST_COUNT,
+};
+
struct led_ops {
/**
- * set_on() - set the state of an LED
+ * set_state() - set the state of an LED
*
* @dev: LED device to change
- * @on: 1 to turn the LED on, 0 to turn it off
+ * @state: LED state to set
* @return 0 if OK, -ve on error
*/
- int (*set_on)(struct udevice *dev, int on);
+ int (*set_state)(struct udevice *dev, enum led_state_t state);
};
#define led_get_ops(dev) ((struct led_ops *)(dev)->driver->ops)
@@ -40,12 +47,12 @@ struct led_ops {
int led_get_by_label(const char *label, struct udevice **devp);
/**
- * led_set_on() - set the state of an LED
+ * led_set_state() - set the state of an LED
*
* @dev: LED device to change
- * @on: 1 to turn the LED on, 0 to turn it off
+ * @state: LED state to set
* @return 0 if OK, -ve on error
*/
-int led_set_on(struct udevice *dev, int on);
+int led_set_state(struct udevice *dev, enum led_state_t state);
#endif
diff --git a/test/dm/led.c b/test/dm/led.c
index 8ee075cf1ca..ebb9b465848 100644
--- a/test/dm/led.c
+++ b/test/dm/led.c
@@ -41,9 +41,10 @@ static int dm_test_led_gpio(struct unit_test_state *uts)
ut_assertok(uclass_get_device(UCLASS_LED, 1, &dev));
ut_assertok(uclass_get_device(UCLASS_GPIO, 1, &gpio));
ut_asserteq(0, sandbox_gpio_get_value(gpio, offset));
- led_set_on(dev, 1);
+ ut_assertok(led_set_state(dev, LEDST_ON));
ut_asserteq(1, sandbox_gpio_get_value(gpio, offset));
- led_set_on(dev, 0);
+
+ ut_assertok(led_set_state(dev, LEDST_OFF));
ut_asserteq(0, sandbox_gpio_get_value(gpio, offset));
return 0;
--
GitLab
From 8f4b612333ee0381eedf767c1c005a830886df27 Mon Sep 17 00:00:00 2001
From: Simon Glass <sjg@chromium.org>
Date: Mon, 10 Apr 2017 11:34:55 -0600
Subject: [PATCH 010/282] dm: led: Add support for getting the state of an LED
It is useful to be able to read the LED as well as write it. Add this to
the uclass and update the GPIO driver.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Ziping Chen <techping.chan@gmail.com>
---
drivers/led/led-uclass.c | 10 ++++++++++
drivers/led/led_gpio.c | 22 ++++++++++++++++++++++
include/led.h | 16 ++++++++++++++++
test/dm/led.c | 2 ++
4 files changed, 50 insertions(+)
diff --git a/drivers/led/led-uclass.c b/drivers/led/led-uclass.c
index b30346913b9..ea5fbabadf3 100644
--- a/drivers/led/led-uclass.c
+++ b/drivers/led/led-uclass.c
@@ -42,6 +42,16 @@ int led_set_state(struct udevice *dev, enum led_state_t state)
return ops->set_state(dev, state);
}
+enum led_state_t led_get_state(struct udevice *dev)
+{
+ struct led_ops *ops = led_get_ops(dev);
+
+ if (!ops->get_state)
+ return -ENOSYS;
+
+ return ops->get_state(dev);
+}
+
UCLASS_DRIVER(led) = {
.id = UCLASS_LED,
.name = "led",
diff --git a/drivers/led/led_gpio.c b/drivers/led/led_gpio.c
index af8133d3c70..789d15600fd 100644
--- a/drivers/led/led_gpio.c
+++ b/drivers/led/led_gpio.c
@@ -24,10 +24,31 @@ static int gpio_led_set_state(struct udevice *dev, enum led_state_t state)
if (!dm_gpio_is_valid(&priv->gpio))
return -EREMOTEIO;
+ switch (state) {
+ case LEDST_OFF:
+ case LEDST_ON:
+ break;
+ default:
+ return -ENOSYS;
+ }
return dm_gpio_set_value(&priv->gpio, state);
}
+static enum led_state_t gpio_led_get_state(struct udevice *dev)
+{
+ struct led_gpio_priv *priv = dev_get_priv(dev);
+ int ret;
+
+ if (!dm_gpio_is_valid(&priv->gpio))
+ return -EREMOTEIO;
+ ret = dm_gpio_get_value(&priv->gpio);
+ if (ret < 0)
+ return ret;
+
+ return ret ? LEDST_ON : LEDST_OFF;
+}
+
static int led_gpio_probe(struct udevice *dev)
{
struct led_uc_plat *uc_plat = dev_get_uclass_platdata(dev);
@@ -88,6 +109,7 @@ static int led_gpio_bind(struct udevice *parent)
static const struct led_ops gpio_led_ops = {
.set_state = gpio_led_set_state,
+ .get_state = gpio_led_get_state,
};
static const struct udevice_id led_gpio_ids[] = {
diff --git a/include/led.h b/include/led.h
index 8af87ea8ea8..bbab4d14c98 100644
--- a/include/led.h
+++ b/include/led.h
@@ -33,6 +33,14 @@ struct led_ops {
* @return 0 if OK, -ve on error
*/
int (*set_state)(struct udevice *dev, enum led_state_t state);
+
+ /**
+ * led_get_state() - get the state of an LED
+ *
+ * @dev: LED device to change
+ * @return LED state led_state_t, or -ve on error
+ */
+ enum led_state_t (*get_state)(struct udevice *dev);
};
#define led_get_ops(dev) ((struct led_ops *)(dev)->driver->ops)
@@ -55,4 +63,12 @@ int led_get_by_label(const char *label, struct udevice **devp);
*/
int led_set_state(struct udevice *dev, enum led_state_t state);
+/**
+ * led_get_state() - get the state of an LED
+ *
+ * @dev: LED device to change
+ * @return LED state led_state_t, or -ve on error
+ */
+enum led_state_t led_get_state(struct udevice *dev);
+
#endif
diff --git a/test/dm/led.c b/test/dm/led.c
index ebb9b465848..68aa39bd4d0 100644
--- a/test/dm/led.c
+++ b/test/dm/led.c
@@ -43,9 +43,11 @@ static int dm_test_led_gpio(struct unit_test_state *uts)
ut_asserteq(0, sandbox_gpio_get_value(gpio, offset));
ut_assertok(led_set_state(dev, LEDST_ON));
ut_asserteq(1, sandbox_gpio_get_value(gpio, offset));
+ ut_asserteq(LEDST_ON, led_get_state(dev));
ut_assertok(led_set_state(dev, LEDST_OFF));
ut_asserteq(0, sandbox_gpio_get_value(gpio, offset));
+ ut_asserteq(LEDST_OFF, led_get_state(dev));
return 0;
}
--
GitLab
From 9413ad4f0def2e06a5042106a6e1650a1aa03a5a Mon Sep 17 00:00:00 2001
From: Simon Glass <sjg@chromium.org>
Date: Mon, 10 Apr 2017 11:34:56 -0600
Subject: [PATCH 011/282] dm: led: Support toggling LEDs
Add support for toggling an LED into the uclass interface. This can be
efficiently implemented by the driver.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Ziping Chen <techping.chan@gmail.com>
---
drivers/led/led_gpio.c | 7 +++++++
include/led.h | 1 +
test/dm/led.c | 25 +++++++++++++++++++++++++
3 files changed, 33 insertions(+)
diff --git a/drivers/led/led_gpio.c b/drivers/led/led_gpio.c
index 789d15600fd..4106ecb6799 100644
--- a/drivers/led/led_gpio.c
+++ b/drivers/led/led_gpio.c
@@ -21,6 +21,7 @@ struct led_gpio_priv {
static int gpio_led_set_state(struct udevice *dev, enum led_state_t state)
{
struct led_gpio_priv *priv = dev_get_priv(dev);
+ int ret;
if (!dm_gpio_is_valid(&priv->gpio))
return -EREMOTEIO;
@@ -28,6 +29,12 @@ static int gpio_led_set_state(struct udevice *dev, enum led_state_t state)
case LEDST_OFF:
case LEDST_ON:
break;
+ case LEDST_TOGGLE:
+ ret = dm_gpio_get_value(&priv->gpio);
+ if (ret < 0)
+ return ret;
+ state = !ret;
+ break;
default:
return -ENOSYS;
}
diff --git a/include/led.h b/include/led.h
index bbab4d14c98..8c107e28e78 100644
--- a/include/led.h
+++ b/include/led.h
@@ -20,6 +20,7 @@ struct led_uc_plat {
enum led_state_t {
LEDST_OFF = 0,
LEDST_ON = 1,
+ LEDST_TOGGLE,
LEDST_COUNT,
};
diff --git a/test/dm/led.c b/test/dm/led.c
index 68aa39bd4d0..2cc24127e2a 100644
--- a/test/dm/led.c
+++ b/test/dm/led.c
@@ -53,6 +53,31 @@ static int dm_test_led_gpio(struct unit_test_state *uts)
}
DM_TEST(dm_test_led_gpio, DM_TESTF_SCAN_PDATA | DM_TESTF_SCAN_FDT);
+/* Test that we can toggle LEDs */
+static int dm_test_led_toggle(struct unit_test_state *uts)
+{
+ const int offset = 1;
+ struct udevice *dev, *gpio;
+
+ /*
+ * Check that we can manipulate an LED. LED 1 is connected to GPIO
+ * bank gpio_a, offset 1.
+ */
+ ut_assertok(uclass_get_device(UCLASS_LED, 1, &dev));
+ ut_assertok(uclass_get_device(UCLASS_GPIO, 1, &gpio));
+ ut_asserteq(0, sandbox_gpio_get_value(gpio, offset));
+ ut_assertok(led_set_state(dev, LEDST_TOGGLE));
+ ut_asserteq(1, sandbox_gpio_get_value(gpio, offset));
+ ut_asserteq(LEDST_ON, led_get_state(dev));
+
+ ut_assertok(led_set_state(dev, LEDST_TOGGLE));
+ ut_asserteq(0, sandbox_gpio_get_value(gpio, offset));
+ ut_asserteq(LEDST_OFF, led_get_state(dev));
+
+ return 0;
+}
+DM_TEST(dm_test_led_toggle, DM_TESTF_SCAN_PDATA | DM_TESTF_SCAN_FDT);
+
/* Test obtaining an LED by label */
static int dm_test_led_label(struct unit_test_state *uts)
{
--
GitLab
From 53378dac8dc33e3fd5f07d60bd7a5f8258ac7a20 Mon Sep 17 00:00:00 2001
From: Simon Glass <sjg@chromium.org>
Date: Mon, 10 Apr 2017 11:34:57 -0600
Subject: [PATCH 012/282] dm: led: Add support for blinking LEDs
Allow LEDs to be blinked if the driver supports it. Enable this for
sandbox so that the tests run.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Ziping Chen <techping.chan@gmail.com>
---
configs/sandbox_defconfig | 1 +
configs/sandbox_noblk_defconfig | 1 +
configs/sandbox_spl_defconfig | 1 +
drivers/led/Kconfig | 9 +++++++++
drivers/led/led-uclass.c | 12 +++++++++++
include/led.h | 35 +++++++++++++++++++++++++++++++++
test/dm/led.c | 24 ++++++++++++++++++++++
7 files changed, 83 insertions(+)
diff --git a/configs/sandbox_defconfig b/configs/sandbox_defconfig
index 7f3f5ac8095..9814ea3b819 100644
--- a/configs/sandbox_defconfig
+++ b/configs/sandbox_defconfig
@@ -83,6 +83,7 @@ CONFIG_I2C_ARB_GPIO_CHALLENGE=y
CONFIG_CROS_EC_KEYB=y
CONFIG_I8042_KEYB=y
CONFIG_LED=y
+CONFIG_LED_BLINK=y
CONFIG_LED_GPIO=y
CONFIG_DM_MAILBOX=y
CONFIG_SANDBOX_MBOX=y
diff --git a/configs/sandbox_noblk_defconfig b/configs/sandbox_noblk_defconfig
index 3f8e70d5237..bba744332c2 100644
--- a/configs/sandbox_noblk_defconfig
+++ b/configs/sandbox_noblk_defconfig
@@ -92,6 +92,7 @@ CONFIG_I2C_ARB_GPIO_CHALLENGE=y
CONFIG_CROS_EC_KEYB=y
CONFIG_I8042_KEYB=y
CONFIG_LED=y
+CONFIG_LED_BLINK=y
CONFIG_LED_GPIO=y
CONFIG_CROS_EC=y
CONFIG_CROS_EC_I2C=y
diff --git a/configs/sandbox_spl_defconfig b/configs/sandbox_spl_defconfig
index ade67143b1c..6fe21254fd8 100644
--- a/configs/sandbox_spl_defconfig
+++ b/configs/sandbox_spl_defconfig
@@ -94,6 +94,7 @@ CONFIG_I2C_ARB_GPIO_CHALLENGE=y
CONFIG_CROS_EC_KEYB=y
CONFIG_I8042_KEYB=y
CONFIG_LED=y
+CONFIG_LED_BLINK=y
CONFIG_LED_GPIO=y
CONFIG_DM_MAILBOX=y
CONFIG_SANDBOX_MBOX=y
diff --git a/drivers/led/Kconfig b/drivers/led/Kconfig
index 0ef45bc06a2..309372ab564 100644
--- a/drivers/led/Kconfig
+++ b/drivers/led/Kconfig
@@ -9,6 +9,15 @@ config LED
can provide access to board-specific LEDs. Use of the device tree
for configuration is encouraged.
+config LED_BLINK
+ bool "Support LED blinking"
+ depends on LED
+ help
+ Some drivers can support automatic blinking of LEDs with a given
+ period, without needing timers or extra code to handle the timing.
+ This option enables support for this which adds slightly to the
+ code size.
+
config SPL_LED
bool "Enable LED support in SPL"
depends on SPL && SPL_DM
diff --git a/drivers/led/led-uclass.c b/drivers/led/led-uclass.c
index ea5fbabadf3..78ab76050d6 100644
--- a/drivers/led/led-uclass.c
+++ b/drivers/led/led-uclass.c
@@ -52,6 +52,18 @@ enum led_state_t led_get_state(struct udevice *dev)
return ops->get_state(dev);
}
+#ifdef CONFIG_LED_BLINK
+int led_set_period(struct udevice *dev, int period_ms)
+{
+ struct led_ops *ops = led_get_ops(dev);
+
+ if (!ops->set_period)
+ return -ENOSYS;
+
+ return ops->set_period(dev, period_ms);
+}
+#endif
+
UCLASS_DRIVER(led) = {
.id = UCLASS_LED,
.name = "led",
diff --git a/include/led.h b/include/led.h
index 8c107e28e78..c67af225912 100644
--- a/include/led.h
+++ b/include/led.h
@@ -17,10 +17,22 @@ struct led_uc_plat {
const char *label;
};
+/**
+ * struct led_uc_priv - Private data the uclass stores about each device
+ *
+ * @period_ms: Flash period in milliseconds
+ */
+struct led_uc_priv {
+ int period_ms;
+};
+
enum led_state_t {
LEDST_OFF = 0,
LEDST_ON = 1,
LEDST_TOGGLE,
+#ifdef CONFIG_LED_BLINK
+ LEDST_BLINK,
+#endif
LEDST_COUNT,
};
@@ -42,6 +54,20 @@ struct led_ops {
* @return LED state led_state_t, or -ve on error
*/
enum led_state_t (*get_state)(struct udevice *dev);
+
+#ifdef CONFIG_LED_BLINK
+ /**
+ * led_set_period() - set the blink period of an LED
+ *
+ * Thie records the period if supported, or returns -ENOSYS if not.
+ * To start the LED blinking, use set_state().
+ *
+ * @dev: LED device to change
+ * @period_ms: LED blink period in milliseconds
+ * @return 0 if OK, -ve on error
+ */
+ int (*set_period)(struct udevice *dev, int period_ms);
+#endif
};
#define led_get_ops(dev) ((struct led_ops *)(dev)->driver->ops)
@@ -72,4 +98,13 @@ int led_set_state(struct udevice *dev, enum led_state_t state);
*/
enum led_state_t led_get_state(struct udevice *dev);
+/**
+ * led_set_period() - set the blink period of an LED
+ *
+ * @dev: LED device to change
+ * @period_ms: LED blink period in milliseconds
+ * @return 0 if OK, -ve on error
+ */
+int led_set_period(struct udevice *dev, int period_ms);
+
#endif
diff --git a/test/dm/led.c b/test/dm/led.c
index 2cc24127e2a..fde700be386 100644
--- a/test/dm/led.c
+++ b/test/dm/led.c
@@ -98,3 +98,27 @@ static int dm_test_led_label(struct unit_test_state *uts)
return 0;
}
DM_TEST(dm_test_led_label, DM_TESTF_SCAN_PDATA | DM_TESTF_SCAN_FDT);
+
+/* Test LED blinking */
+#ifdef CONFIG_LED_BLINK
+static int dm_test_led_blink(struct unit_test_state *uts)
+{
+ const int offset = 1;
+ struct udevice *dev, *gpio;
+
+ /*
+ * Check that we get an error when trying to blink an LED, since it is
+ * not supported by the GPIO LED driver.
+ */
+ ut_assertok(uclass_get_device(UCLASS_LED, 1, &dev));
+ ut_assertok(uclass_get_device(UCLASS_GPIO, 1, &gpio));
+ ut_asserteq(0, sandbox_gpio_get_value(gpio, offset));
+ ut_asserteq(-ENOSYS, led_set_state(dev, LEDST_BLINK));
+ ut_asserteq(0, sandbox_gpio_get_value(gpio, offset));
+ ut_asserteq(LEDST_OFF, led_get_state(dev));
+ ut_asserteq(-ENOSYS, led_set_period(dev, 100));
+
+ return 0;
+}
+DM_TEST(dm_test_led_blink, DM_TESTF_SCAN_PDATA | DM_TESTF_SCAN_FDT);
+#endif
--
GitLab
From 21c340849dc551fd49a17633a090fd1d52d75049 Mon Sep 17 00:00:00 2001
From: Simon Glass <sjg@chromium.org>
Date: Mon, 10 Apr 2017 11:34:58 -0600
Subject: [PATCH 013/282] led: Mark existing driver as legacy
The existing 'led' command does not support driver model. Rename it to
indicate that it is legacy code.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Ziping Chen <techping.chan@gmail.com>
---
cmd/Makefile | 2 +-
cmd/legacy_led.c | 4 ++--
2 files changed, 3 insertions(+), 3 deletions(-)
diff --git a/cmd/Makefile b/cmd/Makefile
index ef1406b3f86..19d450e0fb2 100644
--- a/cmd/Makefile
+++ b/cmd/Makefile
@@ -78,7 +78,7 @@ obj-$(CONFIG_CMD_ITEST) += itest.o
obj-$(CONFIG_CMD_JFFS2) += jffs2.o
obj-$(CONFIG_CMD_CRAMFS) += cramfs.o
obj-$(CONFIG_CMD_LDRINFO) += ldrinfo.o
-obj-$(CONFIG_LED_STATUS_CMD) += led.o
+obj-$(CONFIG_LED_STATUS_CMD) += legacy_led.o
obj-$(CONFIG_CMD_LICENSE) += license.o
obj-y += load.o
obj-$(CONFIG_LOGBUFFER) += log.o
diff --git a/cmd/legacy_led.c b/cmd/legacy_led.c
index 951a5e242f2..1ec2e43e50d 100644
--- a/cmd/legacy_led.c
+++ b/cmd/legacy_led.c
@@ -86,7 +86,7 @@ void __weak __led_blink(led_id_t mask, int freq)
{
}
-int do_led (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+int do_legacy_led(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
int i, match = 0;
enum led_cmd cmd;
@@ -148,7 +148,7 @@ int do_led (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
}
U_BOOT_CMD(
- led, 4, 1, do_led,
+ led, 4, 1, do_legacy_led,
"["
#ifdef CONFIG_LED_STATUS_BOARD_SPECIFIC
#ifdef CONFIG_LED_STATUS0
--
GitLab
From ffe2052d6e8add8ea66a7d1647255aa28715f067 Mon Sep 17 00:00:00 2001
From: Simon Glass <sjg@chromium.org>
Date: Mon, 10 Apr 2017 11:34:59 -0600
Subject: [PATCH 014/282] dm: led: Add a new 'led' command
When driver model is used for LEDs, provide a command to allow LED access.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Ziping Chen <techping.chan@gmail.com>
---
cmd/Kconfig | 9 ++++
cmd/Makefile | 1 +
cmd/led.c | 145 +++++++++++++++++++++++++++++++++++++++++++++++++++
3 files changed, 155 insertions(+)
create mode 100644 cmd/led.c
diff --git a/cmd/Kconfig b/cmd/Kconfig
index 661ae7a98c2..13dc46a174b 100644
--- a/cmd/Kconfig
+++ b/cmd/Kconfig
@@ -667,6 +667,15 @@ config CMD_CACHE
help
Enable the "icache" and "dcache" commands
+config CMD_LED
+ bool "led"
+ default y if LED
+ help
+ Enable the 'led' command which allows for control of LEDs supported
+ by the board. The LEDs can be listed with 'led list' and controlled
+ with led on/off/togle/blink. Any LED drivers can be controlled with
+ this command, e.g. led_gpio.
+
config CMD_TIME
bool "time"
help
diff --git a/cmd/Makefile b/cmd/Makefile
index 19d450e0fb2..3cb0cfde7bf 100644
--- a/cmd/Makefile
+++ b/cmd/Makefile
@@ -79,6 +79,7 @@ obj-$(CONFIG_CMD_JFFS2) += jffs2.o
obj-$(CONFIG_CMD_CRAMFS) += cramfs.o
obj-$(CONFIG_CMD_LDRINFO) += ldrinfo.o
obj-$(CONFIG_LED_STATUS_CMD) += legacy_led.o
+obj-$(CONFIG_CMD_LED) += led.o
obj-$(CONFIG_CMD_LICENSE) += license.o
obj-y += load.o
obj-$(CONFIG_LOGBUFFER) += log.o
diff --git a/cmd/led.c b/cmd/led.c
new file mode 100644
index 00000000000..84173f86f22
--- /dev/null
+++ b/cmd/led.c
@@ -0,0 +1,145 @@
+/*
+ * Copyright (c) 2017 Google, Inc
+ * Written by Simon Glass <sjg@chromium.org>
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include <common.h>
+#include <command.h>
+#include <dm.h>
+#include <led.h>
+#include <dm/uclass-internal.h>
+
+#define LED_TOGGLE LEDST_COUNT
+
+static const char *const state_label[] = {
+ [LEDST_OFF] = "off",
+ [LEDST_ON] = "on",
+ [LEDST_TOGGLE] = "toggle",
+#ifdef CONFIG_LED_BLINK
+ [LEDST_BLINK] = "blink",
+#endif
+};
+
+enum led_state_t get_led_cmd(char *var)
+{
+ int i;
+
+ for (i = 0; i < LEDST_COUNT; i++) {
+ if (!strncmp(var, state_label[i], strlen(var)))
+ return i;
+ }
+
+ return -1;
+}
+
+static int show_led_state(struct udevice *dev)
+{
+ int ret;
+
+ ret = led_get_state(dev);
+ if (ret >= LEDST_COUNT)
+ ret = -EINVAL;
+ if (ret >= 0)
+ printf("%s\n", state_label[ret]);
+
+ return ret;
+}
+
+static int list_leds(void)
+{
+ struct udevice *dev;
+ int ret;
+
+ for (uclass_find_first_device(UCLASS_LED, &dev);
+ dev;
+ uclass_find_next_device(&dev)) {
+ struct led_uc_plat *plat = dev_get_uclass_platdata(dev);
+
+ if (!plat->label)
+ continue;
+ printf("%-15s ", plat->label);
+ if (device_active(dev)) {
+ ret = show_led_state(dev);
+ if (ret < 0)
+ printf("Error %d\n", ret);
+ } else {
+ printf("<inactive>\n");
+ }
+ }
+
+ return 0;
+}
+
+int do_led(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+{
+ enum led_state_t cmd;
+ const char *led_label;
+ struct udevice *dev;
+#ifdef CONFIG_LED_BLINK
+ int freq_ms = 0;
+#endif
+ int ret;
+
+ /* Validate arguments */
+ if (argc < 2)
+ return CMD_RET_USAGE;
+ led_label = argv[1];
+ if (*led_label == 'l')
+ return list_leds();
+
+ cmd = argc > 2 ? get_led_cmd(argv[2]) : LEDST_COUNT;
+ if (cmd < 0)
+ return CMD_RET_USAGE;
+#ifdef CONFIG_LED_BLINK
+ if (cmd == LEDST_BLINK) {
+ if (argc < 4)
+ return CMD_RET_USAGE;
+ freq_ms = simple_strtoul(argv[3], NULL, 10);
+ }
+#endif
+ ret = led_get_by_label(led_label, &dev);
+ if (ret) {
+ printf("LED '%s' not found (err=%d)\n", led_label, ret);
+ return CMD_RET_FAILURE;
+ }
+ switch (cmd) {
+ case LEDST_OFF:
+ case LEDST_ON:
+ case LEDST_TOGGLE:
+ ret = led_set_state(dev, cmd);
+ break;
+#ifdef CONFIG_LED_BLINK
+ case LEDST_BLINK:
+ ret = led_set_period(dev, freq_ms);
+ if (!ret)
+ ret = led_set_state(dev, LEDST_BLINK);
+ break;
+#endif
+ case LEDST_COUNT:
+ printf("LED '%s': ", led_label);
+ ret = show_led_state(dev);
+ break;
+ }
+ if (ret < 0) {
+ printf("LED '%s' operation failed (err=%d)\n", led_label, ret);
+ return CMD_RET_FAILURE;
+ }
+
+ return 0;
+}
+
+#ifdef CONFIG_LED_BLINK
+#define BLINK "|blink [blink-freq in ms]"
+#else
+#define BLINK ""
+#endif
+
+U_BOOT_CMD(
+ led, 4, 1, do_led,
+ "manage LEDs",
+ "<led_label> on|off|toggle" BLINK "\tChange LED state\n"
+ "led [<led_label>\tGet LED state\n"
+ "led list\t\tshow a list of LEDs"
+);
--
GitLab
From a97cb06154d7854e677f2fac815f2600e593ba11 Mon Sep 17 00:00:00 2001
From: Wenyou Yang <wenyou.yang@atmel.com>
Date: Fri, 14 Apr 2017 08:51:42 +0800
Subject: [PATCH 015/282] board: sama5d3xek: Update to support DM/DT
Update the configuration files to support the device tree and
driver model, so do SPL. The device clock and pins configuration
are handled by the clock and the pinctrl drivers respectively.
Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
Add back CONFIG_PHY_MICREL to prevent a build error:
Signed-off-by: Simon Glass <sjg@chromium.org>
---
board/atmel/sama5d3xek/sama5d3xek.c | 2 ++
configs/sama5d3xek_mmc_defconfig | 34 ++++++++++++++++++++++++-
configs/sama5d3xek_nandflash_defconfig | 31 ++++++++++++++++++++++-
configs/sama5d3xek_spiflash_defconfig | 35 +++++++++++++++++++++++---
include/configs/sama5d3xek.h | 34 +++----------------------
5 files changed, 101 insertions(+), 35 deletions(-)
diff --git a/board/atmel/sama5d3xek/sama5d3xek.c b/board/atmel/sama5d3xek/sama5d3xek.c
index 134c2fe1eb5..1d96149921b 100644
--- a/board/atmel/sama5d3xek/sama5d3xek.c
+++ b/board/atmel/sama5d3xek/sama5d3xek.c
@@ -331,6 +331,7 @@ int board_mmc_init(bd_t *bis)
#ifdef CONFIG_ATMEL_SPI
#include <spi.h>
+#ifndef CONFIG_DM_SPI
int spi_cs_is_valid(unsigned int bus, unsigned int cs)
{
return bus == 0 && cs < 4;
@@ -367,6 +368,7 @@ void spi_cs_deactivate(struct spi_slave *slave)
break;
}
}
+#endif
#endif /* CONFIG_ATMEL_SPI */
#ifdef CONFIG_BOARD_LATE_INIT
diff --git a/configs/sama5d3xek_mmc_defconfig b/configs/sama5d3xek_mmc_defconfig
index b73d647ee3a..e71f87101d5 100644
--- a/configs/sama5d3xek_mmc_defconfig
+++ b/configs/sama5d3xek_mmc_defconfig
@@ -4,10 +4,13 @@ CONFIG_TARGET_SAMA5D3XEK=y
CONFIG_SPL_GPIO_SUPPORT=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
+CONFIG_SYS_MALLOC_F_LEN=0x2000
CONFIG_SPL_MMC_SUPPORT=y
CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
CONFIG_SPL_LIBDISK_SUPPORT=y
CONFIG_SPL_FAT_SUPPORT=y
+CONFIG_DEFAULT_DEVICE_TREE="sama5d36ek"
CONFIG_FIT=y
CONFIG_SYS_EXTRA_OPTIONS="SAMA5D3,SYS_USE_MMC"
CONFIG_BOOTDELAY=3
@@ -15,6 +18,7 @@ CONFIG_BOOTDELAY=3
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_SPL=y
+CONFIG_SPL_SEPARATE_BSS=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMI is not set
@@ -26,13 +30,41 @@ CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
+CONFIG_CMD_EXT4=y
+CONFIG_CMD_EXT4_WRITE=y
CONFIG_CMD_FAT=y
+CONFIG_OF_CONTROL=y
+CONFIG_SPL_OF_CONTROL=y
+CONFIG_OF_SPL_REMOVE_PROPS="interrupts interrupt-parent dmas dma-names"
+CONFIG_DM=y
+CONFIG_SPL_DM=y
+CONFIG_SPL_DM_SEQ_ALIAS=y
+CONFIG_CLK=y
+CONFIG_SPL_CLK=y
+CONFIG_CLK_AT91=y
+CONFIG_AT91_UTMI=y
+CONFIG_AT91_H32MX=y
+CONFIG_DM_GPIO=y
+CONFIG_AT91_GPIO=y
+CONFIG_DM_MMC=y
+CONFIG_GENERIC_ATMEL_MCI=y
CONFIG_MTD_NOR_FLASH=y
+CONFIG_DM_SPI_FLASH=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_ATMEL=y
+CONFIG_DM_ETH=y
+CONFIG_MACB=y
+CONFIG_PINCTRL=y
+CONFIG_SPL_PINCTRL=y
+CONFIG_PINCTRL_AT91=y
+CONFIG_DM_SERIAL=y
+CONFIG_ATMEL_USART=y
+CONFIG_DM_SPI=y
+CONFIG_ATMEL_SPI=y
CONFIG_USB=y
+CONFIG_DM_USB=y
+CONFIG_USB_EHCI_HCD=y
CONFIG_USB_STORAGE=y
CONFIG_USB_GADGET=y
CONFIG_USB_GADGET_ATMEL_USBA=y
CONFIG_LCD=y
-CONFIG_OF_LIBFDT=y
diff --git a/configs/sama5d3xek_nandflash_defconfig b/configs/sama5d3xek_nandflash_defconfig
index 7f68d7db961..2cd6691f4c1 100644
--- a/configs/sama5d3xek_nandflash_defconfig
+++ b/configs/sama5d3xek_nandflash_defconfig
@@ -4,8 +4,11 @@ CONFIG_TARGET_SAMA5D3XEK=y
CONFIG_SPL_GPIO_SUPPORT=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
+CONFIG_SYS_MALLOC_F_LEN=0x2000
CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
CONFIG_SPL_NAND_SUPPORT=y
+CONFIG_DEFAULT_DEVICE_TREE="sama5d36ek"
CONFIG_FIT=y
CONFIG_SYS_EXTRA_OPTIONS="SAMA5D3,SYS_USE_NANDFLASH"
CONFIG_BOOTDELAY=3
@@ -25,12 +28,38 @@ CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_CMD_FAT=y
+CONFIG_OF_CONTROL=y
+CONFIG_SPL_OF_CONTROL=y
+CONFIG_OF_SPL_REMOVE_PROPS="interrupts interrupt-parent dmas dma-names"
+CONFIG_DM=y
+CONFIG_SPL_DM=y
+CONFIG_SPL_DM_SEQ_ALIAS=y
+CONFIG_CLK=y
+CONFIG_SPL_CLK=y
+CONFIG_CLK_AT91=y
+CONFIG_AT91_UTMI=y
+CONFIG_AT91_H32MX=y
+CONFIG_DM_GPIO=y
+CONFIG_AT91_GPIO=y
+CONFIG_DM_MMC=y
+CONFIG_GENERIC_ATMEL_MCI=y
CONFIG_MTD_NOR_FLASH=y
+CONFIG_DM_SPI_FLASH=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_ATMEL=y
+CONFIG_DM_ETH=y
+CONFIG_MACB=y
+CONFIG_PINCTRL=y
+CONFIG_SPL_PINCTRL=y
+CONFIG_PINCTRL_AT91=y
+CONFIG_DM_SERIAL=y
+CONFIG_ATMEL_USART=y
+CONFIG_DM_SPI=y
+CONFIG_ATMEL_SPI=y
CONFIG_USB=y
+CONFIG_DM_USB=y
+CONFIG_USB_EHCI_HCD=y
CONFIG_USB_STORAGE=y
CONFIG_USB_GADGET=y
CONFIG_USB_GADGET_ATMEL_USBA=y
CONFIG_LCD=y
-CONFIG_OF_LIBFDT=y
diff --git a/configs/sama5d3xek_spiflash_defconfig b/configs/sama5d3xek_spiflash_defconfig
index c7a183f7ce0..748f4da77c4 100644
--- a/configs/sama5d3xek_spiflash_defconfig
+++ b/configs/sama5d3xek_spiflash_defconfig
@@ -4,20 +4,23 @@ CONFIG_TARGET_SAMA5D3XEK=y
CONFIG_SPL_GPIO_SUPPORT=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
+CONFIG_SYS_MALLOC_F_LEN=0x2000
CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
CONFIG_SPL_SPI_FLASH_SUPPORT=y
CONFIG_SPL_SPI_SUPPORT=y
+CONFIG_DEFAULT_DEVICE_TREE="sama5d36ek"
CONFIG_FIT=y
CONFIG_SYS_EXTRA_OPTIONS="SAMA5D3,SYS_USE_SERIALFLASH"
CONFIG_BOOTDELAY=3
-# CONFIG_CONSOLE_MUX is not set
-CONFIG_SYS_CONSOLE_IS_IN_ENV=y
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_SPL=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMI is not set
+# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_LOADS is not set
+# CONFIG_CMD_FLASH is not set
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
CONFIG_CMD_USB=y
@@ -26,12 +29,38 @@ CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_CMD_FAT=y
+CONFIG_OF_CONTROL=y
+CONFIG_SPL_OF_CONTROL=y
+CONFIG_OF_SPL_REMOVE_PROPS="interrupts interrupt-parent dmas dma-names"
+CONFIG_DM=y
+CONFIG_SPL_DM=y
+CONFIG_SPL_DM_SEQ_ALIAS=y
+CONFIG_CLK=y
+CONFIG_SPL_CLK=y
+CONFIG_CLK_AT91=y
+CONFIG_AT91_UTMI=y
+CONFIG_AT91_H32MX=y
+CONFIG_DM_GPIO=y
+CONFIG_AT91_GPIO=y
+CONFIG_DM_MMC=y
+CONFIG_GENERIC_ATMEL_MCI=y
CONFIG_MTD_NOR_FLASH=y
+CONFIG_DM_SPI_FLASH=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_ATMEL=y
+CONFIG_DM_ETH=y
+CONFIG_MACB=y
+CONFIG_PINCTRL=y
+CONFIG_SPL_PINCTRL=y
+CONFIG_PINCTRL_AT91=y
+CONFIG_DM_SERIAL=y
+CONFIG_ATMEL_USART=y
+CONFIG_DM_SPI=y
+CONFIG_ATMEL_SPI=y
CONFIG_USB=y
+CONFIG_DM_USB=y
+CONFIG_USB_EHCI_HCD=y
CONFIG_USB_STORAGE=y
CONFIG_USB_GADGET=y
CONFIG_USB_GADGET_ATMEL_USBA=y
CONFIG_LCD=y
-CONFIG_OF_LIBFDT=y
diff --git a/include/configs/sama5d3xek.h b/include/configs/sama5d3xek.h
index 13790e7244b..69f3202ce71 100644
--- a/include/configs/sama5d3xek.h
+++ b/include/configs/sama5d3xek.h
@@ -17,11 +17,6 @@
#define CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
-/* serial console */
-#define CONFIG_ATMEL_USART
-#define CONFIG_USART_BASE ATMEL_BASE_DBGU
-#define CONFIG_USART_ID ATMEL_ID_DBGU
-
/*
* This needs to be defined for the OHCI code to work but it is defined as
* ATMEL_ID_UHPHS in the CPU specific header files.
@@ -62,16 +57,15 @@
#define CONFIG_SYS_SDRAM_SIZE 0x20000000
#ifdef CONFIG_SPL_BUILD
-#define CONFIG_SYS_INIT_SP_ADDR 0x310000
+#define CONFIG_SYS_INIT_SP_ADDR 0x318000
#else
#define CONFIG_SYS_INIT_SP_ADDR \
- (CONFIG_SYS_SDRAM_BASE + 4 * 1024 - GENERATED_GBL_DATA_SIZE)
+ (CONFIG_SYS_SDRAM_BASE + 16 * 1024 - GENERATED_GBL_DATA_SIZE)
#endif
/* SerialFlash */
#ifdef CONFIG_CMD_SF
-#define CONFIG_ATMEL_SPI
#define CONFIG_SF_DEFAULT_SPEED 30000000
#endif
@@ -95,27 +89,12 @@
#define CONFIG_CMD_NAND_TRIMFFS
#endif
-/* Ethernet Hardware */
-#define CONFIG_MACB
-#define CONFIG_RMII
-#define CONFIG_NET_RETRY_COUNT 20
-#define CONFIG_MACB_SEARCH_PHY
-#define CONFIG_RGMII
-#define CONFIG_PHYLIB
#define CONFIG_PHY_MICREL
#define CONFIG_PHY_MICREL_KSZ9021
-/* MMC */
-
-#ifdef CONFIG_CMD_MMC
-#define CONFIG_GENERIC_ATMEL_MCI
-#define ATMEL_BASE_MMCI ATMEL_BASE_MCI0
-#endif
-
/* USB */
#ifdef CONFIG_CMD_USB
-#define CONFIG_USB_ATMEL
#define CONFIG_USB_ATMEL_CLK_SEL_UPLL
#define CONFIG_USB_OHCI_NEW
#define CONFIG_SYS_USB_OHCI_CPU_INIT
@@ -124,11 +103,6 @@
#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 3
#endif
-/* USB device */
-#define CONFIG_USB_ETHER
-#define CONFIG_USB_ETH_RNDIS
-#define CONFIG_USBNET_MANUFACTURER "Atmel SAMA5D3xEK"
-
#if defined(CONFIG_CMD_USB) || defined(CONFIG_CMD_MMC)
#define CONFIG_FAT_WRITE
#endif
@@ -148,7 +122,7 @@
/* SPL */
#define CONFIG_SPL_FRAMEWORK
#define CONFIG_SPL_TEXT_BASE 0x300000
-#define CONFIG_SPL_MAX_SIZE 0x10000
+#define CONFIG_SPL_MAX_SIZE 0x18000
#define CONFIG_SPL_BSS_START_ADDR 0x20000000
#define CONFIG_SPL_BSS_MAX_SIZE 0x80000
#define CONFIG_SYS_SPL_MALLOC_START 0x20080000
@@ -176,7 +150,7 @@
#elif CONFIG_SYS_USE_SERIALFLASH
#define CONFIG_SPL_SPI_LOAD
-#define CONFIG_SYS_SPI_U_BOOT_OFFS 0x8000
+#define CONFIG_SYS_SPI_U_BOOT_OFFS 0x10000
#endif
--
GitLab
From b6ceefedf7a5267cf1c8ff7483c9d684b2d637ba Mon Sep 17 00:00:00 2001
From: Wenyou Yang <wenyou.yang@atmel.com>
Date: Fri, 14 Apr 2017 08:51:43 +0800
Subject: [PATCH 016/282] board: sama5d3xek: Clean up code
Due to the introduction of the pinctrl and clk driver, and using
device tree files, remove the unneeded hardcoded pin configuration
and clock enabling code from the board file.
Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
Remove CONFIG_PHY_MICREL as per previous patch:
Signed-off-by: Simon Glass <sjg@chromium.org>
---
board/atmel/sama5d3xek/sama5d3xek.c | 134 +---------------------------
include/configs/sama5d3xek.h | 1 -
2 files changed, 1 insertion(+), 134 deletions(-)
diff --git a/board/atmel/sama5d3xek/sama5d3xek.c b/board/atmel/sama5d3xek/sama5d3xek.c
index 1d96149921b..2a18d877a2b 100644
--- a/board/atmel/sama5d3xek/sama5d3xek.c
+++ b/board/atmel/sama5d3xek/sama5d3xek.c
@@ -6,7 +6,6 @@
*/
#include <common.h>
-#include <mmc.h>
#include <asm/io.h>
#include <asm/arch/sama5d3_smc.h>
#include <asm/arch/at91_common.h>
@@ -16,19 +15,12 @@
#include <lcd.h>
#include <linux/ctype.h>
#include <atmel_hlcdc.h>
-#include <atmel_mci.h>
#include <phy.h>
#include <micrel.h>
-#include <net.h>
-#include <netdev.h>
#include <spl.h>
#include <asm/arch/atmel_mpddrc.h>
#include <asm/arch/at91_wdt.h>
-#ifdef CONFIG_USB_GADGET_ATMEL_USBA
-#include <asm/arch/atmel_usba_udc.h>
-#endif
-
DECLARE_GLOBAL_DATA_PTR;
/* ------------------------------------------------------------------------- */
@@ -135,8 +127,6 @@ static void sama5d3xek_usb_hw_init(void)
#ifdef CONFIG_GENERIC_ATMEL_MCI
static void sama5d3xek_mci_hw_init(void)
{
- at91_mci_hw_init();
-
at91_set_pio_output(AT91_PIO_PORTB, 10, 0); /* MCI0 Power */
}
#endif
@@ -217,12 +207,6 @@ void lcd_show_board_info(void)
int board_early_init_f(void)
{
- at91_periph_clk_enable(ATMEL_ID_PIOA);
- at91_periph_clk_enable(ATMEL_ID_PIOB);
- at91_periph_clk_enable(ATMEL_ID_PIOC);
- at91_periph_clk_enable(ATMEL_ID_PIOD);
- at91_periph_clk_enable(ATMEL_ID_PIOE);
-
at91_seriald_hw_init();
return 0;
@@ -242,21 +226,9 @@ int board_init(void)
#ifdef CONFIG_CMD_USB
sama5d3xek_usb_hw_init();
#endif
-#ifdef CONFIG_USB_GADGET_ATMEL_USBA
- at91_udp_hw_init();
-#endif
#ifdef CONFIG_GENERIC_ATMEL_MCI
sama5d3xek_mci_hw_init();
#endif
-#ifdef CONFIG_ATMEL_SPI
- at91_spi0_hw_init(1 << 0);
-#endif
-#ifdef CONFIG_MACB
- if (has_emac())
- at91_macb_hw_init();
- if (has_gmac())
- at91_gmac_hw_init();
-#endif
#ifdef CONFIG_LCD
if (has_lcdc())
sama5d3xek_lcd_hw_init();
@@ -271,106 +243,6 @@ int dram_init(void)
return 0;
}
-int board_phy_config(struct phy_device *phydev)
-{
- /* board specific timings for GMAC */
- if (has_gmac()) {
- /* rx data delay */
- ksz9021_phy_extended_write(phydev,
- MII_KSZ9021_EXT_RGMII_RX_DATA_SKEW,
- 0x2222);
- /* tx data delay */
- ksz9021_phy_extended_write(phydev,
- MII_KSZ9021_EXT_RGMII_TX_DATA_SKEW,
- 0x2222);
- /* rx/tx clock delay */
- ksz9021_phy_extended_write(phydev,
- MII_KSZ9021_EXT_RGMII_CLOCK_SKEW,
- 0xf2f4);
- }
-
- /* always run the PHY's config routine */
- if (phydev->drv->config)
- return phydev->drv->config(phydev);
-
- return 0;
-}
-
-int board_eth_init(bd_t *bis)
-{
- int rc = 0;
-
-#ifdef CONFIG_MACB
- if (has_emac())
- rc = macb_eth_initialize(0, (void *)ATMEL_BASE_EMAC, 0x00);
- if (has_gmac())
- rc = macb_eth_initialize(0, (void *)ATMEL_BASE_GMAC, 0x00);
-#endif
-#ifdef CONFIG_USB_GADGET_ATMEL_USBA
- usba_udc_probe(&pdata);
-#ifdef CONFIG_USB_ETH_RNDIS
- usb_eth_initialize(bis);
-#endif
-#endif
-
- return rc;
-}
-
-#ifdef CONFIG_GENERIC_ATMEL_MCI
-int board_mmc_init(bd_t *bis)
-{
- int rc = 0;
-
- rc = atmel_mci_init((void *)ATMEL_BASE_MCI0);
-
- return rc;
-}
-#endif
-
-/* SPI chip select control */
-#ifdef CONFIG_ATMEL_SPI
-#include <spi.h>
-
-#ifndef CONFIG_DM_SPI
-int spi_cs_is_valid(unsigned int bus, unsigned int cs)
-{
- return bus == 0 && cs < 4;
-}
-
-void spi_cs_activate(struct spi_slave *slave)
-{
- switch (slave->cs) {
- case 0:
- at91_set_pio_output(AT91_PIO_PORTD, 13, 0);
- case 1:
- at91_set_pio_output(AT91_PIO_PORTD, 14, 0);
- case 2:
- at91_set_pio_output(AT91_PIO_PORTD, 15, 0);
- case 3:
- at91_set_pio_output(AT91_PIO_PORTD, 16, 0);
- default:
- break;
- }
-}
-
-void spi_cs_deactivate(struct spi_slave *slave)
-{
- switch (slave->cs) {
- case 0:
- at91_set_pio_output(AT91_PIO_PORTD, 13, 1);
- case 1:
- at91_set_pio_output(AT91_PIO_PORTD, 14, 1);
- case 2:
- at91_set_pio_output(AT91_PIO_PORTD, 15, 1);
- case 3:
- at91_set_pio_output(AT91_PIO_PORTD, 16, 1);
- default:
- break;
- }
-}
-#endif
-#endif /* CONFIG_ATMEL_SPI */
-
#ifdef CONFIG_BOARD_LATE_INIT
int board_late_init(void)
{
@@ -394,12 +266,8 @@ int board_late_init(void)
#ifdef CONFIG_SPL_BUILD
void spl_board_init(void)
{
-#ifdef CONFIG_SYS_USE_MMC
- sama5d3xek_mci_hw_init();
-#elif CONFIG_SYS_USE_NANDFLASH
+#if CONFIG_SYS_USE_NANDFLASH
sama5d3xek_nand_hw_init();
-#elif CONFIG_SYS_USE_SERIALFLASH
- at91_spi0_hw_init(1 << 0);
#endif
}
diff --git a/include/configs/sama5d3xek.h b/include/configs/sama5d3xek.h
index 69f3202ce71..6c28c4c19eb 100644
--- a/include/configs/sama5d3xek.h
+++ b/include/configs/sama5d3xek.h
@@ -89,7 +89,6 @@
#define CONFIG_CMD_NAND_TRIMFFS
#endif
-#define CONFIG_PHY_MICREL
#define CONFIG_PHY_MICREL_KSZ9021
/* USB */
--
GitLab
From 098d15bc773b5d86b04bd66a820583543c750aea Mon Sep 17 00:00:00 2001
From: Wenyou Yang <wenyou.yang@atmel.com>
Date: Fri, 14 Apr 2017 08:51:44 +0800
Subject: [PATCH 017/282] board: sama5d3xek: Enable early debug UART
Enable the early debug UART to debug problems when an ICE or other
debug mechanism is not available.
Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
---
board/atmel/sama5d3xek/sama5d3xek.c | 13 ++++++++++++-
configs/sama5d3xek_mmc_defconfig | 6 ++++++
configs/sama5d3xek_nandflash_defconfig | 6 ++++++
configs/sama5d3xek_spiflash_defconfig | 6 ++++++
4 files changed, 30 insertions(+), 1 deletion(-)
diff --git a/board/atmel/sama5d3xek/sama5d3xek.c b/board/atmel/sama5d3xek/sama5d3xek.c
index 2a18d877a2b..cae6e245ddb 100644
--- a/board/atmel/sama5d3xek/sama5d3xek.c
+++ b/board/atmel/sama5d3xek/sama5d3xek.c
@@ -12,6 +12,7 @@
#include <asm/arch/at91_rstc.h>
#include <asm/arch/gpio.h>
#include <asm/arch/clk.h>
+#include <debug_uart.h>
#include <lcd.h>
#include <linux/ctype.h>
#include <atmel_hlcdc.h>
@@ -205,12 +206,22 @@ void lcd_show_board_info(void)
#endif /* CONFIG_LCD_INFO */
#endif /* CONFIG_LCD */
-int board_early_init_f(void)
+#ifdef CONFIG_DEBUG_UART_BOARD_INIT
+void board_debug_uart_init(void)
{
at91_seriald_hw_init();
+}
+#endif
+#ifdef CONFIG_BOARD_EARLY_INIT_F
+int board_early_init_f(void)
+{
+#ifdef CONFIG_DEBUG_UART
+ debug_uart_init();
+#endif
return 0;
}
+#endif
int board_init(void)
{
diff --git a/configs/sama5d3xek_mmc_defconfig b/configs/sama5d3xek_mmc_defconfig
index e71f87101d5..994bc048bab 100644
--- a/configs/sama5d3xek_mmc_defconfig
+++ b/configs/sama5d3xek_mmc_defconfig
@@ -58,6 +58,12 @@ CONFIG_PINCTRL=y
CONFIG_SPL_PINCTRL=y
CONFIG_PINCTRL_AT91=y
CONFIG_DM_SERIAL=y
+CONFIG_DEBUG_UART=y
+CONFIG_DEBUG_UART_ATMEL=y
+CONFIG_DEBUG_UART_BASE=0xffffee00
+CONFIG_DEBUG_UART_CLOCK=132000000
+CONFIG_DEBUG_UART_BOARD_INIT=y
+CONFIG_DEBUG_UART_ANNOUNCE=y
CONFIG_ATMEL_USART=y
CONFIG_DM_SPI=y
CONFIG_ATMEL_SPI=y
diff --git a/configs/sama5d3xek_nandflash_defconfig b/configs/sama5d3xek_nandflash_defconfig
index 2cd6691f4c1..dd0263cea2d 100644
--- a/configs/sama5d3xek_nandflash_defconfig
+++ b/configs/sama5d3xek_nandflash_defconfig
@@ -53,6 +53,12 @@ CONFIG_PINCTRL=y
CONFIG_SPL_PINCTRL=y
CONFIG_PINCTRL_AT91=y
CONFIG_DM_SERIAL=y
+CONFIG_DEBUG_UART=y
+CONFIG_DEBUG_UART_ATMEL=y
+CONFIG_DEBUG_UART_BASE=0xffffee00
+CONFIG_DEBUG_UART_CLOCK=132000000
+CONFIG_DEBUG_UART_BOARD_INIT=y
+CONFIG_DEBUG_UART_ANNOUNCE=y
CONFIG_ATMEL_USART=y
CONFIG_DM_SPI=y
CONFIG_ATMEL_SPI=y
diff --git a/configs/sama5d3xek_spiflash_defconfig b/configs/sama5d3xek_spiflash_defconfig
index 748f4da77c4..069fbcc0a35 100644
--- a/configs/sama5d3xek_spiflash_defconfig
+++ b/configs/sama5d3xek_spiflash_defconfig
@@ -54,6 +54,12 @@ CONFIG_PINCTRL=y
CONFIG_SPL_PINCTRL=y
CONFIG_PINCTRL_AT91=y
CONFIG_DM_SERIAL=y
+CONFIG_DEBUG_UART=y
+CONFIG_DEBUG_UART_ATMEL=y
+CONFIG_DEBUG_UART_BASE=0xffffee00
+CONFIG_DEBUG_UART_CLOCK=132000000
+CONFIG_DEBUG_UART_BOARD_INIT=y
+CONFIG_DEBUG_UART_ANNOUNCE=y
CONFIG_ATMEL_USART=y
CONFIG_DM_SPI=y
CONFIG_ATMEL_SPI=y
--
GitLab
From 1878804a2bd213695d393ed3e01607a591b98862 Mon Sep 17 00:00:00 2001
From: Wenyou Yang <wenyou.yang@atmel.com>
Date: Fri, 14 Apr 2017 08:51:45 +0800
Subject: [PATCH 018/282] board: sama5d3_xplained: Update to support DM/DT
Update the configuration files to support the device tree and driver
model, so do SPL. The device clock and pins configuration are handled
by the clock and the pinctrl drivers respectively.
Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
Fix build error with sama5d3_xplained_mmc:
Signed-off-by: Simon Glass <sjg@chromium.org>
---
.../atmel/sama5d3_xplained/sama5d3_xplained.c | 2 ++
configs/sama5d3_xplained_mmc_defconfig | 29 ++++++++++++++++++-
configs/sama5d3_xplained_nandflash_defconfig | 28 +++++++++++++++++-
include/configs/sama5d3_xplained.h | 26 ++---------------
4 files changed, 60 insertions(+), 25 deletions(-)
diff --git a/board/atmel/sama5d3_xplained/sama5d3_xplained.c b/board/atmel/sama5d3_xplained/sama5d3_xplained.c
index 2b9da91b2d1..4c339a09ee4 100644
--- a/board/atmel/sama5d3_xplained/sama5d3_xplained.c
+++ b/board/atmel/sama5d3_xplained/sama5d3_xplained.c
@@ -136,7 +136,9 @@ int board_mmc_init(bd_t *bis)
void spl_board_init(void)
{
#ifdef CONFIG_SYS_USE_MMC
+#ifdef CONFIG_GENERIC_ATMEL_MCI
sama5d3_xplained_mci0_hw_init();
+#endif
#elif CONFIG_SYS_USE_NANDFLASH
sama5d3_xplained_nand_hw_init();
#endif
diff --git a/configs/sama5d3_xplained_mmc_defconfig b/configs/sama5d3_xplained_mmc_defconfig
index 2654aa11ba9..921b6a21124 100644
--- a/configs/sama5d3_xplained_mmc_defconfig
+++ b/configs/sama5d3_xplained_mmc_defconfig
@@ -4,15 +4,19 @@ CONFIG_TARGET_SAMA5D3_XPLAINED=y
CONFIG_SPL_GPIO_SUPPORT=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
+CONFIG_SYS_MALLOC_F_LEN=0x2000
CONFIG_SPL_MMC_SUPPORT=y
CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
CONFIG_SPL_LIBDISK_SUPPORT=y
CONFIG_SPL_FAT_SUPPORT=y
+CONFIG_DEFAULT_DEVICE_TREE="at91-sama5d3_xplained"
CONFIG_FIT=y
CONFIG_SYS_EXTRA_OPTIONS="SAMA5D3,SYS_USE_MMC"
CONFIG_BOOTDELAY=3
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_SPL=y
+CONFIG_SPL_SEPARATE_BSS=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMI is not set
@@ -29,6 +33,29 @@ CONFIG_CMD_EXT4=y
CONFIG_CMD_EXT4_WRITE=y
CONFIG_CMD_FAT=y
CONFIG_CMD_UBI=y
+CONFIG_OF_CONTROL=y
+CONFIG_SPL_OF_CONTROL=y
+CONFIG_OF_SPL_REMOVE_PROPS="interrupts interrupt-parent dmas dma-names"
+CONFIG_DM=y
+CONFIG_SPL_DM=y
+CONFIG_SPL_DM_SEQ_ALIAS=y
+CONFIG_CLK=y
+CONFIG_SPL_CLK=y
+CONFIG_CLK_AT91=y
+CONFIG_AT91_UTMI=y
+CONFIG_AT91_H32MX=y
+CONFIG_DM_GPIO=y
+CONFIG_AT91_GPIO=y
+CONFIG_DM_MMC=y
+CONFIG_GENERIC_ATMEL_MCI=y
+CONFIG_DM_ETH=y
+CONFIG_MACB=y
+CONFIG_PINCTRL=y
+CONFIG_SPL_PINCTRL=y
+CONFIG_PINCTRL_AT91=y
+CONFIG_DM_SERIAL=y
+CONFIG_ATMEL_USART=y
CONFIG_USB=y
+CONFIG_DM_USB=y
+CONFIG_USB_EHCI_HCD=y
CONFIG_USB_STORAGE=y
-CONFIG_OF_LIBFDT=y
diff --git a/configs/sama5d3_xplained_nandflash_defconfig b/configs/sama5d3_xplained_nandflash_defconfig
index dc487d92e0d..042f6a78e73 100644
--- a/configs/sama5d3_xplained_nandflash_defconfig
+++ b/configs/sama5d3_xplained_nandflash_defconfig
@@ -6,6 +6,9 @@ CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_SPL_SERIAL_SUPPORT=y
CONFIG_SPL_NAND_SUPPORT=y
+CONFIG_SYS_MALLOC_F_LEN=0x2000
+CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
+CONFIG_DEFAULT_DEVICE_TREE="at91-sama5d3_xplained"
CONFIG_FIT=y
CONFIG_SYS_EXTRA_OPTIONS="SAMA5D3,SYS_USE_NANDFLASH"
CONFIG_BOOTDELAY=3
@@ -27,6 +30,29 @@ CONFIG_CMD_EXT4=y
CONFIG_CMD_EXT4_WRITE=y
CONFIG_CMD_FAT=y
CONFIG_CMD_UBI=y
+CONFIG_OF_CONTROL=y
+CONFIG_SPL_OF_CONTROL=y
+CONFIG_OF_SPL_REMOVE_PROPS="interrupts interrupt-parent dmas dma-names"
+CONFIG_DM=y
+CONFIG_SPL_DM=y
+CONFIG_SPL_DM_SEQ_ALIAS=y
+CONFIG_CLK=y
+CONFIG_SPL_CLK=y
+CONFIG_CLK_AT91=y
+CONFIG_AT91_UTMI=y
+CONFIG_AT91_H32MX=y
+CONFIG_DM_GPIO=y
+CONFIG_AT91_GPIO=y
+CONFIG_DM_MMC=y
+CONFIG_GENERIC_ATMEL_MCI=y
+CONFIG_DM_ETH=y
+CONFIG_MACB=y
+CONFIG_PINCTRL=y
+CONFIG_SPL_PINCTRL=y
+CONFIG_PINCTRL_AT91=y
+CONFIG_DM_SERIAL=y
+CONFIG_ATMEL_USART=y
CONFIG_USB=y
+CONFIG_DM_USB=y
+CONFIG_USB_EHCI_HCD=y
CONFIG_USB_STORAGE=y
-CONFIG_OF_LIBFDT=y
diff --git a/include/configs/sama5d3_xplained.h b/include/configs/sama5d3_xplained.h
index 3c9f49e426c..b4a62bd63af 100644
--- a/include/configs/sama5d3_xplained.h
+++ b/include/configs/sama5d3_xplained.h
@@ -12,11 +12,6 @@
#include "at91-sama5_common.h"
-/* serial console */
-#define CONFIG_ATMEL_USART
-#define CONFIG_USART_BASE ATMEL_BASE_DBGU
-#define CONFIG_USART_ID ATMEL_ID_DBGU
-
/*
* This needs to be defined for the OHCI code to work but it is defined as
* ATMEL_ID_UHPHS in the CPU specific header files.
@@ -34,10 +29,10 @@
#define CONFIG_SYS_SDRAM_SIZE 0x10000000
#ifdef CONFIG_SPL_BUILD
-#define CONFIG_SYS_INIT_SP_ADDR 0x310000
+#define CONFIG_SYS_INIT_SP_ADDR 0x318000
#else
#define CONFIG_SYS_INIT_SP_ADDR \
- (CONFIG_SYS_SDRAM_BASE + 4 * 1024 - GENERATED_GBL_DATA_SIZE)
+ (CONFIG_SYS_SDRAM_BASE + 16 * 1024 - GENERATED_GBL_DATA_SIZE)
#endif
/* NAND flash */
@@ -67,21 +62,6 @@
#define CONFIG_CMD_UBIFS
#endif
-/* Ethernet Hardware */
-#define CONFIG_MACB
-#define CONFIG_RMII
-#define CONFIG_NET_RETRY_COUNT 20
-#define CONFIG_MACB_SEARCH_PHY
-#define CONFIG_RGMII
-#define CONFIG_PHYLIB
-
-/* MMC */
-
-#ifdef CONFIG_CMD_MMC
-#define CONFIG_GENERIC_ATMEL_MCI
-#define CONFIG_ATMEL_MCI_8BIT
-#endif
-
/* USB */
#ifdef CONFIG_CMD_USB
@@ -111,7 +91,7 @@
/* SPL */
#define CONFIG_SPL_FRAMEWORK
#define CONFIG_SPL_TEXT_BASE 0x300000
-#define CONFIG_SPL_MAX_SIZE 0x10000
+#define CONFIG_SPL_MAX_SIZE 0x18000
#define CONFIG_SPL_BSS_START_ADDR 0x20000000
#define CONFIG_SPL_BSS_MAX_SIZE 0x80000
#define CONFIG_SYS_SPL_MALLOC_START 0x20080000
--
GitLab
From 80016f51250b95712a094ddf0b3b4551f39fc19b Mon Sep 17 00:00:00 2001
From: Wenyou Yang <wenyou.yang@atmel.com>
Date: Fri, 14 Apr 2017 08:51:46 +0800
Subject: [PATCH 019/282] board: sama5d3_xplained: Clean up code
Due to the introduction of the pinctrl and clk driver, and using
device tree files, remove the unneeded hardcoded pin configuration
and clock enabling code from the board file.
Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
---
.../atmel/sama5d3_xplained/sama5d3_xplained.c | 34 -------------------
1 file changed, 34 deletions(-)
diff --git a/board/atmel/sama5d3_xplained/sama5d3_xplained.c b/board/atmel/sama5d3_xplained/sama5d3_xplained.c
index 4c339a09ee4..15845ef2e79 100644
--- a/board/atmel/sama5d3_xplained/sama5d3_xplained.c
+++ b/board/atmel/sama5d3_xplained/sama5d3_xplained.c
@@ -6,16 +6,12 @@
*/
#include <common.h>
-#include <mmc.h>
#include <asm/io.h>
#include <asm/arch/sama5d3_smc.h>
#include <asm/arch/at91_common.h>
#include <asm/arch/at91_rstc.h>
#include <asm/arch/gpio.h>
#include <asm/arch/clk.h>
-#include <atmel_mci.h>
-#include <net.h>
-#include <netdev.h>
#include <spl.h>
#include <asm/arch/atmel_mpddrc.h>
#include <asm/arch/at91_wdt.h>
@@ -65,20 +61,12 @@ static void sama5d3_xplained_usb_hw_init(void)
#ifdef CONFIG_GENERIC_ATMEL_MCI
static void sama5d3_xplained_mci0_hw_init(void)
{
- at91_mci_hw_init();
-
at91_set_pio_output(AT91_PIO_PORTE, 2, 0); /* MCI0 Power */
}
#endif
int board_early_init_f(void)
{
- at91_periph_clk_enable(ATMEL_ID_PIOA);
- at91_periph_clk_enable(ATMEL_ID_PIOB);
- at91_periph_clk_enable(ATMEL_ID_PIOC);
- at91_periph_clk_enable(ATMEL_ID_PIOD);
- at91_periph_clk_enable(ATMEL_ID_PIOE);
-
at91_seriald_hw_init();
return 0;
@@ -97,10 +85,6 @@ int board_init(void)
#endif
#ifdef CONFIG_GENERIC_ATMEL_MCI
sama5d3_xplained_mci0_hw_init();
-#endif
-#ifdef CONFIG_MACB
- at91_gmac_hw_init();
- at91_macb_hw_init();
#endif
return 0;
}
@@ -113,24 +97,6 @@ int dram_init(void)
return 0;
}
-int board_eth_init(bd_t *bis)
-{
-#ifdef CONFIG_MACB
- macb_eth_initialize(0, (void *)ATMEL_BASE_GMAC, 0x00);
- macb_eth_initialize(0, (void *)ATMEL_BASE_EMAC, 0x00);
-#endif
- return 0;
-}
-
-#ifdef CONFIG_GENERIC_ATMEL_MCI
-int board_mmc_init(bd_t *bis)
-{
- atmel_mci_init((void *)ATMEL_BASE_MCI0);
-
- return 0;
-}
-#endif
-
/* SPL */
#ifdef CONFIG_SPL_BUILD
void spl_board_init(void)
--
GitLab
From ad46af0e76384b22058d9ac979f34fad2483aff3 Mon Sep 17 00:00:00 2001
From: Wenyou Yang <wenyou.yang@atmel.com>
Date: Fri, 14 Apr 2017 08:51:47 +0800
Subject: [PATCH 020/282] board: sama5d3_xplained: Enable early debug UART
Enable the early debug UART to debug problems when an ICE or other
debug mechanism is not available.
Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
---
board/atmel/sama5d3_xplained/sama5d3_xplained.c | 13 ++++++++++++-
configs/sama5d3_xplained_mmc_defconfig | 6 ++++++
configs/sama5d3_xplained_nandflash_defconfig | 6 ++++++
3 files changed, 24 insertions(+), 1 deletion(-)
diff --git a/board/atmel/sama5d3_xplained/sama5d3_xplained.c b/board/atmel/sama5d3_xplained/sama5d3_xplained.c
index 15845ef2e79..ba7f9f24434 100644
--- a/board/atmel/sama5d3_xplained/sama5d3_xplained.c
+++ b/board/atmel/sama5d3_xplained/sama5d3_xplained.c
@@ -12,6 +12,7 @@
#include <asm/arch/at91_rstc.h>
#include <asm/arch/gpio.h>
#include <asm/arch/clk.h>
+#include <debug_uart.h>
#include <spl.h>
#include <asm/arch/atmel_mpddrc.h>
#include <asm/arch/at91_wdt.h>
@@ -65,12 +66,22 @@ static void sama5d3_xplained_mci0_hw_init(void)
}
#endif
-int board_early_init_f(void)
+#ifdef CONFIG_DEBUG_UART_BOARD_INIT
+void board_debug_uart_init(void)
{
at91_seriald_hw_init();
+}
+#endif
+#ifdef CONFIG_BOARD_EARLY_INIT_F
+int board_early_init_f(void)
+{
+#ifdef CONFIG_DEBUG_UART
+ debug_uart_init();
+#endif
return 0;
}
+#endif
int board_init(void)
{
diff --git a/configs/sama5d3_xplained_mmc_defconfig b/configs/sama5d3_xplained_mmc_defconfig
index 921b6a21124..d28d1d9a331 100644
--- a/configs/sama5d3_xplained_mmc_defconfig
+++ b/configs/sama5d3_xplained_mmc_defconfig
@@ -54,6 +54,12 @@ CONFIG_PINCTRL=y
CONFIG_SPL_PINCTRL=y
CONFIG_PINCTRL_AT91=y
CONFIG_DM_SERIAL=y
+CONFIG_DEBUG_UART=y
+CONFIG_DEBUG_UART_ATMEL=y
+CONFIG_DEBUG_UART_BASE=0xffffee00
+CONFIG_DEBUG_UART_CLOCK=132000000
+CONFIG_DEBUG_UART_BOARD_INIT=y
+CONFIG_DEBUG_UART_ANNOUNCE=y
CONFIG_ATMEL_USART=y
CONFIG_USB=y
CONFIG_DM_USB=y
diff --git a/configs/sama5d3_xplained_nandflash_defconfig b/configs/sama5d3_xplained_nandflash_defconfig
index 042f6a78e73..8cc8169de56 100644
--- a/configs/sama5d3_xplained_nandflash_defconfig
+++ b/configs/sama5d3_xplained_nandflash_defconfig
@@ -51,6 +51,12 @@ CONFIG_PINCTRL=y
CONFIG_SPL_PINCTRL=y
CONFIG_PINCTRL_AT91=y
CONFIG_DM_SERIAL=y
+CONFIG_DEBUG_UART=y
+CONFIG_DEBUG_UART_ATMEL=y
+CONFIG_DEBUG_UART_BASE=0xffffee00
+CONFIG_DEBUG_UART_CLOCK=132000000
+CONFIG_DEBUG_UART_BOARD_INIT=y
+CONFIG_DEBUG_UART_ANNOUNCE=y
CONFIG_ATMEL_USART=y
CONFIG_USB=y
CONFIG_DM_USB=y
--
GitLab
From 504b9f1a5fa1c3c7efc8349907703986dcd4ed8a Mon Sep 17 00:00:00 2001
From: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Date: Wed, 29 Mar 2017 21:20:28 +0200
Subject: [PATCH 021/282] rockchip: spl: rk3399: disable DDR security regions
for SPL
The RK3399 hangs during DMA of the Designware MMC controller, when
performing DMA-based transactions in SPL due to the DDR security settings
left behind by the BootROM (i.e. accesses to the first MB of DRAM are
restricted... however, the DMA is likely to target this first MB, as it
transfers from/to the stack).
System security is not affected, as the final security configuration is
performed by the ATF, which is executed after the SPL stage.
With this fix in place, we can now drop 'fifo-mode' in the DTS for the
RK3399-Q7 (Puma).
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Acked-by: Simon Glass <sjg@chromium.org>
---
arch/arm/mach-rockchip/rk3399-board-spl.c | 13 +++++++++++++
1 file changed, 13 insertions(+)
diff --git a/arch/arm/mach-rockchip/rk3399-board-spl.c b/arch/arm/mach-rockchip/rk3399-board-spl.c
index 4f84ec10a56..f5465294c49 100644
--- a/arch/arm/mach-rockchip/rk3399-board-spl.c
+++ b/arch/arm/mach-rockchip/rk3399-board-spl.c
@@ -157,6 +157,7 @@ void secure_timer_init(void)
}
#define GRF_EMMCCORE_CON11 0xff77f02c
+#define SGRF_DDR_RGN_CON16 0xff330040
void board_init_f(ulong dummy)
{
struct udevice *pinctrl;
@@ -201,6 +202,17 @@ void board_init_f(ulong dummy)
hang();
}
+ /*
+ * Disable DDR security regions.
+ *
+ * As we are entered from the BootROM, the region from
+ * 0x0 through 0xfffff (i.e. the first MB of memory) will
+ * be protected. This will cause issues with the DW_MMC
+ * driver, which tries to DMA from/to the stack (likely)
+ * located in this range.
+ */
+ rk_clrsetreg(SGRF_DDR_RGN_CON16, 0x1FF, 0);
+
secure_timer_init();
ret = uclass_get_device(UCLASS_PINCTRL, 0, &pinctrl);
@@ -238,6 +250,7 @@ void spl_board_init(void)
#ifdef CONFIG_ROCKCHIP_SPL_BACK_TO_BROM
back_to_bootrom();
#endif
+
return;
err:
printf("spl_board_init: Error %d\n", ret);
--
GitLab
From 35d1b6dc08b6b1ed39ce5039df731ec0032ba6b2 Mon Sep 17 00:00:00 2001
From: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Date: Wed, 29 Mar 2017 21:20:29 +0200
Subject: [PATCH 022/282] rockchip: dts: rk3399-puma: disable 'fifo-mode' in
sdmmc
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Acked-by: Simon Glass <sjg@chromium.org>
---
arch/arm/dts/rk3399-puma.dts | 1 -
1 file changed, 1 deletion(-)
diff --git a/arch/arm/dts/rk3399-puma.dts b/arch/arm/dts/rk3399-puma.dts
index 917df1e6099..71eb72d2922 100644
--- a/arch/arm/dts/rk3399-puma.dts
+++ b/arch/arm/dts/rk3399-puma.dts
@@ -91,7 +91,6 @@
&sdmmc {
u-boot,dm-pre-reloc;
bus-width = <4>;
- fifo-mode; /* until we fix DMA in SPL */
status = "okay";
};
--
GitLab
From bfc664ba8bacc76d0837504dcb5fc9b5606ac2ba Mon Sep 17 00:00:00 2001
From: Eddie Cai <eddie.cai.linux@gmail.com>
Date: Sat, 1 Apr 2017 14:46:52 +0800
Subject: [PATCH 023/282] rockchip: tinker: configs: Add USB, PXE, DHCP to the
default boot targets
tinker board support ethernet and usb host, so enable USB, PXE and DHCP support.
Signed-off-by: Eddie Cai <eddie.cai.linux@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
---
include/configs/tinker_rk3288.h | 5 ++++-
1 file changed, 4 insertions(+), 1 deletion(-)
diff --git a/include/configs/tinker_rk3288.h b/include/configs/tinker_rk3288.h
index 52285281411..402ae2def22 100644
--- a/include/configs/tinker_rk3288.h
+++ b/include/configs/tinker_rk3288.h
@@ -13,7 +13,10 @@
#undef BOOT_TARGET_DEVICES
#define BOOT_TARGET_DEVICES(func) \
- func(MMC, mmc, 1)
+ func(MMC, mmc, 1) \
+ func(USB, usb, 0) \
+ func(PXE, pxe, na) \
+ func(DHCP, dchp, na)
#define CONFIG_ENV_IS_IN_MMC
#define CONFIG_SYS_MMC_ENV_DEV 1
--
GitLab
From 1e9d6c159f8e7981cece88f5f43f834506f6fbe5 Mon Sep 17 00:00:00 2001
From: Eddie Cai <eddie.cai.linux@gmail.com>
Date: Sat, 1 Apr 2017 14:49:54 +0800
Subject: [PATCH 024/282] rockchip: Add USB to the default boot targets
Now that most rockchip SoC based board have usb host support, enable
USB boot targets by default.
Signed-off-by: Eddie Cai <eddie.cai.linux@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
Fixed build errors when CONFIG_CMD_USB not defined:
Signed-off-by: Simon Glass <sjg@chromium.org>
---
include/configs/rockchip-common.h | 9 +++++++++
1 file changed, 9 insertions(+)
diff --git a/include/configs/rockchip-common.h b/include/configs/rockchip-common.h
index fd930c101eb..9d183cee6a8 100644
--- a/include/configs/rockchip-common.h
+++ b/include/configs/rockchip-common.h
@@ -12,11 +12,20 @@
#include <config_distro_defaults.h>
/* First try to boot from SD (index 0), then eMMC (index 1 */
+#ifdef CONFIG_CMD_USB
#define BOOT_TARGET_DEVICES(func) \
func(MMC, mmc, 0) \
func(MMC, mmc, 1) \
+ func(USB, usb, 0) \
func(PXE, pxe, na) \
func(DHCP, dchp, na)
+#else
+#define BOOT_TARGET_DEVICES(func) \
+ func(MMC, mmc, 0) \
+ func(MMC, mmc, 1) \
+ func(PXE, pxe, na) \
+ func(DHCP, dchp, na)
+#endif
#define CONFIG_RANDOM_UUID
#define PARTS_DEFAULT \
--
GitLab
From 6499b1976cb90734a76fdf979f530741251e4978 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Heiko=20St=C3=BCbner?= <heiko@sntech.de>
Date: Thu, 6 Apr 2017 00:19:18 +0200
Subject: [PATCH 025/282] rockchip: cosmetic: Move rock board to its correct
position
Somehow 43b5c78d8d91 ("rockchip: cosmetic: Sort RK3288 boards") moved
the rock board in between some rk3288 board, probably as a result of
rebasing.
So move it back to its original position above all rk3288 boards.
Fixes: 43b5c78d8d91 ("rockchip: cosmetic: Sort RK3288 boards")
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Acked-by: Simon Glass <sjg@chromium.org>
---
arch/arm/dts/Makefile | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index 68d2791c155..ce34e3eeff8 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -29,12 +29,12 @@ dtb-$(CONFIG_EXYNOS5) += exynos5250-arndale.dtb \
dtb-$(CONFIG_EXYNOS7420) += exynos7420-espresso7420.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += \
rk3036-sdk.dtb \
+ rk3188-radxarock.dtb \
rk3288-evb.dtb \
rk3288-fennec.dtb \
rk3288-firefly.dtb \
rk3288-miqi.dtb \
rk3288-popmetal.dtb \
- rk3188-radxarock.dtb \
rk3288-rock2-square.dtb \
rk3288-tinker.dtb \
rk3288-veyron-jerry.dtb \
--
GitLab
From 008a610b4cb1a3e55369c6c1f1060c892a81422c Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Heiko=20St=C3=BCbner?= <heiko@sntech.de>
Date: Thu, 6 Apr 2017 00:19:36 +0200
Subject: [PATCH 026/282] rockchip: rk3188: enable remap function
Most Rockchip socs have the ability to either map the bootrom or a sram
area to the starting address of the cpu by flipping a bit in the GRF.
Newer socs leave this untouched and mapped to the bootrom but the legacy
loaders on rk3188 and before enabled the remap functionality and the
current smp implementation in the Linux kernel also requires it to be
enabled, to bring up secondary cpus.
So to keep smp working in the kernel, mimic the behaviour of the legacy
bootloaders and enable the remap functionality.
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Acked-by: Simon Glass <sjg@chromium.org>
---
arch/arm/mach-rockchip/Kconfig | 1 +
arch/arm/mach-rockchip/rk3188-board.c | 18 ++++++++++++++++++
2 files changed, 19 insertions(+)
diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig
index af0796d1d06..5b4caec9533 100644
--- a/arch/arm/mach-rockchip/Kconfig
+++ b/arch/arm/mach-rockchip/Kconfig
@@ -18,6 +18,7 @@ config ROCKCHIP_RK3188
select SUPPORT_TPL
select SPL
select TPL
+ select BOARD_LATE_INIT
select ROCKCHIP_BROM_HELPER
help
The Rockchip RK3188 is a ARM-based SoC with a quad-core Cortex-A9
diff --git a/arch/arm/mach-rockchip/rk3188-board.c b/arch/arm/mach-rockchip/rk3188-board.c
index c370156e4c0..4be711e4418 100644
--- a/arch/arm/mach-rockchip/rk3188-board.c
+++ b/arch/arm/mach-rockchip/rk3188-board.c
@@ -11,6 +11,7 @@
#include <syscon.h>
#include <asm/io.h>
#include <asm/arch/clock.h>
+#include <asm/arch/grf_rk3188.h>
#include <asm/arch/periph.h>
#include <asm/arch/pmu_rk3288.h>
#include <asm/arch/boot_mode.h>
@@ -19,6 +20,23 @@
DECLARE_GLOBAL_DATA_PTR;
+int board_late_init(void)
+{
+ struct rk3188_grf *grf;
+
+ grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
+ if (IS_ERR(grf)) {
+ error("grf syscon returned %ld\n", PTR_ERR(grf));
+ } else {
+ /* enable noc remap to mimic legacy loaders */
+ rk_clrsetreg(&grf->soc_con0,
+ NOC_REMAP_MASK << NOC_REMAP_SHIFT,
+ NOC_REMAP_MASK << NOC_REMAP_SHIFT);
+ }
+
+ return 0;
+}
+
int board_init(void)
{
#if defined(CONFIG_ROCKCHIP_SPL_BACK_TO_BROM)
--
GitLab
From 86d012657c008dbd1c632452fc0193e71e2be77e Mon Sep 17 00:00:00 2001
From: Kever Yang <kever.yang@rock-chips.com>
Date: Fri, 7 Apr 2017 18:12:55 +0800
Subject: [PATCH 027/282] rockchip: rk3399: do not use lower address
The lower address is reserved for ATF, do not use it.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Acked-by: Simon Glass <sjg@chromium.org>
---
include/configs/rk3399_common.h | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/include/configs/rk3399_common.h b/include/configs/rk3399_common.h
index 9d22e0cc670..b7b89b08a88 100644
--- a/include/configs/rk3399_common.h
+++ b/include/configs/rk3399_common.h
@@ -57,8 +57,8 @@
#ifndef CONFIG_SPL_BUILD
#define ENV_MEM_LAYOUT_SETTINGS \
- "scriptaddr=0x00000000\0" \
- "pxefile_addr_r=0x00100000\0" \
+ "scriptaddr=0x00500000\0" \
+ "pxefile_addr_r=0x00600000\0" \
"fdt_addr_r=0x01f00000\0" \
"kernel_addr_r=0x02000000\0" \
"ramdisk_addr_r=0x04000000\0"
--
GitLab
From 4e5439ac25486e34568d96f99fefb464a857855c Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Heiko=20St=C3=BCbner?= <heiko@sntech.de>
Date: Fri, 7 Apr 2017 12:38:52 +0200
Subject: [PATCH 028/282] rockchip: sysreset: rk3188: Make sure remap is off on
warm-resets
The warm-reset of rk3188 socs keeps the remap setting as it was, so if
it was enabled, the cpu would start from address 0x0 of the sram instead
of address 0x0 of the bootrom, thus making the reset hang.
Therefore make sure the remap is disabled before attempting a warm reset.
Cold reset is not affected by this at all.
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Acked-by: Simon Glass <sjg@chromium.org>
---
drivers/sysreset/sysreset_rk3188.c | 15 +++++++++++++++
1 file changed, 15 insertions(+)
diff --git a/drivers/sysreset/sysreset_rk3188.c b/drivers/sysreset/sysreset_rk3188.c
index 36ae47600a5..053a6344f53 100644
--- a/drivers/sysreset/sysreset_rk3188.c
+++ b/drivers/sysreset/sysreset_rk3188.c
@@ -7,21 +7,36 @@
#include <common.h>
#include <dm.h>
#include <errno.h>
+#include <syscon.h>
#include <sysreset.h>
#include <asm/io.h>
#include <asm/arch/clock.h>
#include <asm/arch/cru_rk3188.h>
+#include <asm/arch/grf_rk3188.h>
#include <asm/arch/hardware.h>
#include <linux/err.h>
int rk3188_sysreset_request(struct udevice *dev, enum sysreset_t type)
{
struct rk3188_cru *cru = rockchip_get_cru();
+ struct rk3188_grf *grf;
if (IS_ERR(cru))
return PTR_ERR(cru);
switch (type) {
case SYSRESET_WARM:
+ grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
+ if (IS_ERR(grf))
+ return -EPROTONOSUPPORT;
+
+ /*
+ * warm-reset keeps the remap value,
+ * so make sure it's disabled.
+ */
+ rk_clrsetreg(&grf->soc_con0,
+ NOC_REMAP_MASK << NOC_REMAP_SHIFT,
+ 0 << NOC_REMAP_SHIFT);
+
rk_clrreg(&cru->cru_mode_con, 0xffff);
writel(0xeca8, &cru->cru_glb_srst_snd_value);
break;
--
GitLab
From faf1afc4734c4b886c1359dc9b390aa2aceefb62 Mon Sep 17 00:00:00 2001
From: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Date: Fri, 7 Apr 2017 19:09:37 +0200
Subject: [PATCH 029/282] rockchip: dts: rk3399-puma: make the DTS
dual-licensed
The RK3399-Q7 (Puma) DTS should (of course) be dual-licensed.
This updates the licensing info in the rk3399-puma.dts.
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
---
arch/arm/dts/rk3399-puma.dts | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/dts/rk3399-puma.dts b/arch/arm/dts/rk3399-puma.dts
index 71eb72d2922..50e43c7740e 100644
--- a/arch/arm/dts/rk3399-puma.dts
+++ b/arch/arm/dts/rk3399-puma.dts
@@ -1,7 +1,7 @@
/*
* (C) Copyright 2017 Theobroma Systems Design und Consulting GmbH
*
- * SPDX-License-Identifier: GPL-2.0+
+ * SPDX-License-Identifier: GPL-2.0+ X11
*/
/dts-v1/;
--
GitLab
From a13110a99fffb431db60ec5b50e263d0bd2b811d Mon Sep 17 00:00:00 2001
From: Klaus Goger <klaus.goger@theobroma-systems.com>
Date: Fri, 7 Apr 2017 19:13:38 +0200
Subject: [PATCH 030/282] rockchip: ARM64: split RK3399-Q7 board off the
RK3399-EVB board
The RK3399-Q7 SoM is a Qseven-compatible (70mm x 70mm, MXM-230
connector) system-on-module from Theobroma Systems, featuring the
Rockchip RK3399.
It provides the following feature set:
* up to 4GB DDR3
* on-module SPI-NOR flash
* on-module eMMC (with 8-bit interace)
* SD card (on a baseboad) via edge connector
* Gigabit Ethernet w/ on-module Micrel KSZ9031 GbE PHY
* HDMI/eDP/MIPI displays
* 2x MIPI-CSI
* USB
- 1x USB 3.0 dual-role (direct connection)
- 2x USB 3.0 host + 1x USB 2.0 (on-module USB 3.0 hub)
* on-module STM32 Cortex-M0 companion controller, implementing:
- low-power RTC functionality (ISL1208 emulation)
- fan controller (AMC6821 emulation)
- USB<->CAN bridge controller
Note that we use a multi-payload FIT image for booting and have
Cortex-M0 payload in a separate subimage: we thus rely on the FIT
image loader to put it into the SRAM region that ATF expects it in.
Signed-off-by: Klaus Goger <klaus.goger@theobroma-systems.com>
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Fixed build warning on puma-rk3399:
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
---
arch/arm/mach-rockchip/rk3399/Kconfig | 19 +++++
board/theobroma-systems/puma_rk3399/Kconfig | 15 ++++
.../theobroma-systems/puma_rk3399/MAINTAINERS | 10 +++
board/theobroma-systems/puma_rk3399/Makefile | 7 ++
board/theobroma-systems/puma_rk3399/README | 73 +++++++++++++++++++
.../puma_rk3399/fit_spl_atf.its | 57 +++++++++++++++
.../puma_rk3399/puma-rk3399.c | 71 ++++++++++++++++++
configs/puma-rk3399_defconfig | 3 +-
include/configs/puma_rk3399.h | 27 +++++++
9 files changed, 281 insertions(+), 1 deletion(-)
create mode 100644 board/theobroma-systems/puma_rk3399/Kconfig
create mode 100644 board/theobroma-systems/puma_rk3399/MAINTAINERS
create mode 100644 board/theobroma-systems/puma_rk3399/Makefile
create mode 100644 board/theobroma-systems/puma_rk3399/README
create mode 100644 board/theobroma-systems/puma_rk3399/fit_spl_atf.its
create mode 100644 board/theobroma-systems/puma_rk3399/puma-rk3399.c
create mode 100644 include/configs/puma_rk3399.h
diff --git a/arch/arm/mach-rockchip/rk3399/Kconfig b/arch/arm/mach-rockchip/rk3399/Kconfig
index 83bd04add24..415466a49bb 100644
--- a/arch/arm/mach-rockchip/rk3399/Kconfig
+++ b/arch/arm/mach-rockchip/rk3399/Kconfig
@@ -10,6 +10,24 @@ config TARGET_EVB_RK3399
with full function and phisical connectors support like type-C ports,
usb2.0 host ports, LVDS, JTAG, MAC, SDcard, HDMI, USB-2-serial...
+config TARGET_PUMA_RK3399
+ bool "Theobroma Systems RK3399-Q7 (Puma)"
+ help
+ The RK3399-Q7 (Puma) is a system-on-module (designed and
+ marketed by Theobroma Systems) featuring the Rockchip RK3399
+ in a Qseven-compatible form-factor (running of a single 5V
+ supply and exposing its external interfaces on a MXM-230
+ connector).
+
+ Key features of the RK3399-Q7 include:
+ * on-module USB 3.0 hub (2x USB 3.0 host + 1x USB 2.0 host)
+ * USB 3.0 dual-role
+ * on-module Micrel KSZ9031 GbE PHY
+ * on-module eMMC (up to 256GB configurations available)
+ * on-module DDR3 (1GB, 2GB and 4GB configurations available)
+ * HDMI, eDP, MIPI-DSI, MIPI-DSI/CSI and MIPI-CSI
+ * SPI, I2C, I2S, UART, GPIO, ...
+
endchoice
config SYS_SOC
@@ -19,5 +37,6 @@ config SYS_MALLOC_F_LEN
default 0x0800
source "board/rockchip/evb_rk3399/Kconfig"
+source "board/theobroma-systems/puma_rk3399/Kconfig"
endif
diff --git a/board/theobroma-systems/puma_rk3399/Kconfig b/board/theobroma-systems/puma_rk3399/Kconfig
new file mode 100644
index 00000000000..a645590d787
--- /dev/null
+++ b/board/theobroma-systems/puma_rk3399/Kconfig
@@ -0,0 +1,15 @@
+if TARGET_PUMA_RK3399
+
+config SYS_BOARD
+ default "puma_rk3399"
+
+config SYS_VENDOR
+ default "theobroma-systems"
+
+config SYS_CONFIG_NAME
+ default "puma_rk3399"
+
+config BOARD_SPECIFIC_OPTIONS # dummy
+ def_bool y
+
+endif
diff --git a/board/theobroma-systems/puma_rk3399/MAINTAINERS b/board/theobroma-systems/puma_rk3399/MAINTAINERS
new file mode 100644
index 00000000000..ccec09c3866
--- /dev/null
+++ b/board/theobroma-systems/puma_rk3399/MAINTAINERS
@@ -0,0 +1,10 @@
+PUMA-RK3399
+M: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
+M: Klaus Goger <klaus.goger@theobroma-systems.com>
+S: Maintained
+F: board/theobroma-systems/puma_rk3399
+F: include/configs/puma_rk3399.h
+F: arch/arm/dts/rk3399-puma.dts
+F: configs/puma-rk3399_defconfig
+W: https://www.theobroma-systems.com/rk3399-q7/tech-specs
+T: git git://git.theobroma-systems.com/puma-u-boot.git
diff --git a/board/theobroma-systems/puma_rk3399/Makefile b/board/theobroma-systems/puma_rk3399/Makefile
new file mode 100644
index 00000000000..d962b56f111
--- /dev/null
+++ b/board/theobroma-systems/puma_rk3399/Makefile
@@ -0,0 +1,7 @@
+#
+# (C) Copyright 2017 Theobroma Systems Design und Consulting GmbH
+#
+# SPDX-License-Identifier: GPL-2.0+
+#
+
+obj-y += puma-rk3399.o
diff --git a/board/theobroma-systems/puma_rk3399/README b/board/theobroma-systems/puma_rk3399/README
new file mode 100644
index 00000000000..1a8d02b480c
--- /dev/null
+++ b/board/theobroma-systems/puma_rk3399/README
@@ -0,0 +1,73 @@
+Introduction
+============
+
+The RK3399-Q7 (Puma) is a system-on-module featuring the Rockchip
+RK3399 in a Qseven-compatible form-factor.
+
+RK3399-Q7 features:
+ * CPU: ARMv8 64bit Big-Little architecture,
+ * Big: dual-core Cortex-A72
+ * Little: quad-core Cortex-A53
+ * IRAM: 200KB
+ * DRAM: 4GB-128MB dual-channel
+ * eMMC: onboard eMMC
+ * SD/MMC
+ * GbE (onboard Micrel KSZ9031) Gigabit ethernet PHY
+ * USB:
+ * USB3.0 dual role port
+ * 2x USB3.0 host, 1x USB2.0 host via onboard USB3.0 hub
+ * Display: HDMI/eDP/MIPI
+ * Camera: 2x CSI (one on the edge connector, one on the Q7 specified CSI ZIF)
+ * NOR Flash: onboard SPI NOR
+ * Companion Controller: onboard additional Cortex-M0 microcontroller
+ * RTC
+ * fan controller
+ * CAN
+
+Here is the step-by-step to boot to U-Boot on rk3399.
+
+Get the Source and build ATF/Cortex-M0 binaries
+===============================================
+
+ > git clone git://git.theobroma-systems.com/arm-trusted-firmware.git
+ > git clone git://git.theobroma-systems.com/rk3399-cortex-m0.git
+
+Compile the ATF
+===============
+
+ > cd arm-trusted-firmware
+ > make CROSS_COMPILE=aarch64-linux-gnu- PLAT=rk3399 bl31
+ > cp build/rk3399/release/bl31.bin ../u-boot
+
+Compile the M0 firmware
+=======================
+
+ > cd ../rk3399-cortex-m0
+ > make CROSS_COMPILE=arm-cortex_m0-eabi-
+ > cp rk3399m0.bin ../u-boot
+
+Compile the U-Boot
+==================
+
+ > cd ../u-boot
+ > make CROSS_COMPILE=aarch64-linux-gnu- puma-rk3399_defconfig all
+
+Package the image
+=================
+
+ > tools/mkimage -n rk3399 -T rksd -d spl/u-boot-spl.bin spl.img
+ > tools/mkimage -f board/theobroma/puma_rk3399/fit_spl_atf.its \
+ -E rk3399_bl3x.itb
+
+Flash the image
+===============
+
+Copy the SPL to offset 32k and the FIT image containing the payloads
+(U-Boot proper, ATF, M0 Firmware, devicetree) to offset 256k on a SD
+card.
+
+ > dd if=spl.img of=/dev/sdb seek=64
+ > dd if=rk3399_bl3x.itb of=/dev/sdb seek=512
+
+After powering up the board (with the inserted SD card), you should see
+a U-Boot console on UART0 (115200n8).
diff --git a/board/theobroma-systems/puma_rk3399/fit_spl_atf.its b/board/theobroma-systems/puma_rk3399/fit_spl_atf.its
new file mode 100644
index 00000000000..f93c2519272
--- /dev/null
+++ b/board/theobroma-systems/puma_rk3399/fit_spl_atf.its
@@ -0,0 +1,57 @@
+/*
+ * Copyright (C) 2017 Theobroma Systems Design und Consulting GmbH
+ *
+ * Minimal dts for a SPL FIT image payload.
+ *
+ * SPDX-License-Identifier: GPL-2.0+ X11
+ */
+
+/dts-v1/;
+
+/ {
+ description = "FIT image with U-Boot proper, ATF bl31, M0 Firmware, DTB";
+ #address-cells = <1>;
+
+ images {
+ uboot@1 {
+ description = "U-Boot (64-bit)";
+ data = /incbin/("../../../u-boot-nodtb.bin");
+ type = "standalone";
+ arch = "arm64";
+ compression = "none";
+ load = <0x00200000>;
+ };
+ atf@1 {
+ description = "ARM Trusted Firmware";
+ data = /incbin/("../../../bl31.bin");
+ type = "firmware";
+ arch = "arm64";
+ compression = "none";
+ load = <0x00001000>;
+ entry = <0x00001000>;
+ };
+ pmu@1 {
+ description = "Cortex-M0 firmware";
+ data = /incbin/("../../../rk3399m0.bin");
+ type = "pmu-firmware";
+ compression = "none";
+ load = <0xff8c0000>;
+ };
+ fdt@1 {
+ description = "RK3399-Q7 (Puma) flat device-tree";
+ data = /incbin/("../../../u-boot.dtb");
+ type = "flat_dt";
+ compression = "none";
+ };
+ };
+
+ configurations {
+ default = "conf@1";
+ conf@1 {
+ description = "Theobroma Systems RK3399-Q7 (Puma) SoM";
+ firmware = "uboot@1";
+ loadables = "atf@1";
+ fdt = "fdt@1";
+ };
+ };
+};
diff --git a/board/theobroma-systems/puma_rk3399/puma-rk3399.c b/board/theobroma-systems/puma_rk3399/puma-rk3399.c
new file mode 100644
index 00000000000..fb4d31e01d5
--- /dev/null
+++ b/board/theobroma-systems/puma_rk3399/puma-rk3399.c
@@ -0,0 +1,71 @@
+/*
+ * (C) Copyright 2017 Theobroma Systems Design und Consulting GmbH
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+#include <common.h>
+#include <dm.h>
+#include <dm/pinctrl.h>
+#include <dm/uclass-internal.h>
+#include <asm/arch/periph.h>
+#include <power/regulator.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+int board_init(void)
+{
+ struct udevice *pinctrl, *regulator;
+ int ret;
+
+ /*
+ * The PWM does not have decicated interrupt number in dts and can
+ * not get periph_id by pinctrl framework, so let's init them here.
+ * The PWM2 and PWM3 are for pwm regulators.
+ */
+ ret = uclass_get_device(UCLASS_PINCTRL, 0, &pinctrl);
+ if (ret) {
+ debug("%s: Cannot find pinctrl device\n", __func__);
+ goto out;
+ }
+
+ ret = pinctrl_request_noflags(pinctrl, PERIPH_ID_PWM2);
+ if (ret) {
+ debug("%s PWM2 pinctrl init fail!\n", __func__);
+ goto out;
+ }
+
+ /* rk3399 need to init vdd_center to get the correct output voltage */
+ ret = regulator_get_by_platname("vdd_center", ®ulator);
+ if (ret)
+ debug("%s: Cannot get vdd_center regulator\n", __func__);
+
+ ret = regulator_get_by_platname("vcc5v0_host", ®ulator);
+ if (ret) {
+ debug("%s vcc5v0_host init fail! ret %d\n", __func__, ret);
+ goto out;
+ }
+
+ ret = regulator_set_enable(regulator, true);
+ if (ret) {
+ debug("%s vcc5v0-host-en set fail!\n", __func__);
+ goto out;
+ }
+
+out:
+ return 0;
+}
+
+int dram_init(void)
+{
+ gd->ram_size = 0x80000000;
+ return 0;
+}
+
+int dram_init_banksize(void)
+{
+ /* Reserve 0x200000 for ATF bl31 */
+ gd->bd->bi_dram[0].start = 0x200000;
+ gd->bd->bi_dram[0].size = 0x7e000000;
+
+ return 0;
+}
diff --git a/configs/puma-rk3399_defconfig b/configs/puma-rk3399_defconfig
index d4e12d78db2..500f22093e1 100644
--- a/configs/puma-rk3399_defconfig
+++ b/configs/puma-rk3399_defconfig
@@ -1,5 +1,6 @@
CONFIG_ARM=y
CONFIG_ARCH_ROCKCHIP=y
+CONFIG_TARGET_PUMA_RK3399=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_SYS_MALLOC_F_LEN=0x4000
@@ -11,7 +12,7 @@ CONFIG_DEFAULT_DEVICE_TREE="rk3399-puma"
CONFIG_FIT=y
CONFIG_SPL_FIT=y
CONFIG_SPL_LOAD_FIT=y
-CONFIG_SPL_FIT_SOURCE="board/rockchip/evb_rk3399/fit_spl_atf.its"
+CONFIG_SPL_FIT_SOURCE="board/theobroma-systems/puma_rk3399/fit_spl_atf.its"
# CONFIG_DISPLAY_CPUINFO is not set
# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
# CONFIG_SPL_LEGACY_IMAGE_SUPPORT is not set
diff --git a/include/configs/puma_rk3399.h b/include/configs/puma_rk3399.h
new file mode 100644
index 00000000000..fd62c72a203
--- /dev/null
+++ b/include/configs/puma_rk3399.h
@@ -0,0 +1,27 @@
+/*
+ * (C) Copyright 2017 Theobroma Systems Design und Consulting GmbH
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#ifndef __PUMA_RK3399_H
+#define __PUMA_RK3399_H
+
+#include <configs/rk3399_common.h>
+
+/*
+ * SPL @ 32kB for ~130kB
+ * ENV @ 240KB for 8kB
+ * FIT payload (ATF, U-Boot, FDT) @ 256kB
+ */
+#undef CONFIG_ENV_OFFSET
+#define CONFIG_ENV_OFFSET (240 * 1024)
+
+#define CONFIG_ENV_IS_IN_MMC
+#define CONFIG_SYS_MMC_ENV_DEV 1
+
+#define SDRAM_BANK_SIZE (2UL << 30)
+
+#define CONFIG_SYS_WHITE_ON_BLACK
+
+#endif
--
GitLab
From bc8e8fe40bc57c7fe0ecafb09e180bdfefe408d5 Mon Sep 17 00:00:00 2001
From: "eric.gao@rock-chips.com" <eric.gao@rock-chips.com>
Date: Mon, 10 Apr 2017 09:53:31 +0800
Subject: [PATCH 031/282] rockchip: rk3399: Add missing sentinel in syscon
when enable PMIC rk808,the system will halt at very
early stage,log is shown as bellow.
INFO: plat_rockchip_pmu_init(1211): pd status 3e
INFO: BL31: Initializing runtime services
INFO: BL31: Preparing for EL3 exit to normal world
INFO: Entry point address = 0x200000
INFO: SPSR = 0x3c9
time 44561b, 0 (<<----Just stop here)
It's caused by the absence of "{ }" in syscon_rk3399.c
,which will lead to memory overflow like below.According
to Sysmap file ,we can find the function buck_get_value
of rk808 is just follow the compatible struct,the pointer
"of_match" point to "buck_get_value",but it is not a
struct and don't have member of compatible, In this case,
system crash. So,on the face, it looks like that rk808 is
guilty.but he is really innocent.
while (of_match->compatible) { <<----------
if (!strcmp(of_match->compatible, compat)) {
*of_idp = of_match;
return 0;
}
of_match++;
}
Signed-off-by: Eric Gao <eric.gao@rock-chips.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Tested-by: Kever Yang <kever.yang@rock-chips.com>
---
arch/arm/mach-rockchip/rk3399/syscon_rk3399.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm/mach-rockchip/rk3399/syscon_rk3399.c b/arch/arm/mach-rockchip/rk3399/syscon_rk3399.c
index d32985b4538..74d45520170 100644
--- a/arch/arm/mach-rockchip/rk3399/syscon_rk3399.c
+++ b/arch/arm/mach-rockchip/rk3399/syscon_rk3399.c
@@ -14,6 +14,7 @@ static const struct udevice_id rk3399_syscon_ids[] = {
{ .compatible = "rockchip,rk3399-pmugrf", .data = ROCKCHIP_SYSCON_PMUGRF },
{ .compatible = "rockchip,rk3399-pmusgrf", .data = ROCKCHIP_SYSCON_PMUSGRF },
{ .compatible = "rockchip,rk3399-cic", .data = ROCKCHIP_SYSCON_CIC },
+ { }
};
U_BOOT_DRIVER(syscon_rk3399) = {
--
GitLab
From b644354a7c255defe0086c15ccb6b298f27a8bcf Mon Sep 17 00:00:00 2001
From: "eric.gao@rock-chips.com" <eric.gao@rock-chips.com>
Date: Mon, 10 Apr 2017 10:17:03 +0800
Subject: [PATCH 032/282] rockchip: i2c: Enable i2c for rk3399
To enable mipi display, we need to enable pmic
rk808 first for lcd3v3 power,which use i2c0 to
communicate with soc. So enable i2c0.
Signed-off-by: Eric Gao <eric.gao@rock-chips.com>
Acked-by: Simon Glass <sjg@chromium.org>
---
arch/arm/dts/rk3399.dtsi | 16 ++++++++++++++++
configs/evb-rk3399_defconfig | 1 +
drivers/i2c/rk_i2c.c | 1 +
3 files changed, 18 insertions(+)
diff --git a/arch/arm/dts/rk3399.dtsi b/arch/arm/dts/rk3399.dtsi
index dbe55f2b32a..d94d7802cb4 100644
--- a/arch/arm/dts/rk3399.dtsi
+++ b/arch/arm/dts/rk3399.dtsi
@@ -26,6 +26,7 @@
serial4 = &uart4;
mmc0 = &sdhci;
mmc1 = &sdmmc;
+ i2c0 = &i2c0;
};
cpus {
@@ -668,6 +669,21 @@
status = "disabled";
};
+ i2c0: i2c@ff3c0000 {
+ compatible = "rockchip,rk3399-i2c";
+ reg = <0x0 0xff3c0000 0x0 0x1000>;
+ assigned-clocks = <&pmucru SCLK_I2C0_PMU>;
+ assigned-clock-rates = <200000000>;
+ clocks = <&pmucru SCLK_I2C0_PMU>, <&pmucru PCLK_I2C0_PMU>;
+ clock-names = "i2c", "pclk";
+ interrupts = <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH 0>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&i2c0_xfer>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+ };
+
pinctrl: pinctrl {
u-boot,dm-pre-reloc;
compatible = "rockchip,rk3399-pinctrl";
diff --git a/configs/evb-rk3399_defconfig b/configs/evb-rk3399_defconfig
index 50b0d749abb..c644084cdfc 100644
--- a/configs/evb-rk3399_defconfig
+++ b/configs/evb-rk3399_defconfig
@@ -60,3 +60,4 @@ CONFIG_USB_EHCI_GENERIC=y
CONFIG_USB_STORAGE=y
CONFIG_USE_TINY_PRINTF=y
CONFIG_ERRNO_STR=y
+CONFIG_SYS_I2C_ROCKCHIP=y
diff --git a/drivers/i2c/rk_i2c.c b/drivers/i2c/rk_i2c.c
index af925cecdbb..76f41f7e857 100644
--- a/drivers/i2c/rk_i2c.c
+++ b/drivers/i2c/rk_i2c.c
@@ -383,6 +383,7 @@ static const struct udevice_id rockchip_i2c_ids[] = {
{ .compatible = "rockchip,rk3066-i2c" },
{ .compatible = "rockchip,rk3188-i2c" },
{ .compatible = "rockchip,rk3288-i2c" },
+ { .compatible = "rockchip,rk3399-i2c" },
{ }
};
--
GitLab
From d3cf9eb2d87c8961408ec5aa6ebe0c54f2c13724 Mon Sep 17 00:00:00 2001
From: "eric.gao@rock-chips.com" <eric.gao@rock-chips.com>
Date: Mon, 10 Apr 2017 10:41:46 +0800
Subject: [PATCH 033/282] rockchip: pmic: Enable RK808 for rk3399 evb
For using mipi display, we need to enable lcd3v3
which supplied by rk808,so enable rk808 first.
Signed-off-by: Eric Gao <eric.gao@rock-chips.com>
Acked-by: Simon Glass <sjg@chromium.org>
---
arch/arm/dts/rk3399-evb.dts | 39 ++++++++++++++++++++++++++++++++++++
configs/evb-rk3399_defconfig | 5 +++++
2 files changed, 44 insertions(+)
diff --git a/arch/arm/dts/rk3399-evb.dts b/arch/arm/dts/rk3399-evb.dts
index c3a7ca26e7c..e1f867b600e 100644
--- a/arch/arm/dts/rk3399-evb.dts
+++ b/arch/arm/dts/rk3399-evb.dts
@@ -30,6 +30,13 @@
status = "okay";
};
+ vccsys: vccsys {
+ compatible = "regulator-fixed";
+ regulator-name = "vccsys";
+ regulator-boot-on;
+ regulator-always-on;
+ };
+
vcc3v3_sys: vcc3v3-sys {
compatible = "regulator-fixed";
regulator-name = "vcc3v3_sys";
@@ -51,6 +58,7 @@
regulator-name = "vcc5v0_host";
gpio = <&gpio4 25 GPIO_ACTIVE_HIGH>;
};
+
};
&emmc_phy {
@@ -112,6 +120,37 @@
status = "okay";
};
+&i2c0 {
+ status = "okay";
+ clock-frequency = <400000>;
+ i2c-scl-falling-time-ns = <50>;
+ i2c-scl-rising-time-ns = <100>;
+ u-boot,dm-pre-reloc;
+
+ rk808: pmic@1b {
+ compatible = "rockchip,rk808";
+ clock-output-names = "xin32k", "wifibt_32kin";
+ interrupt-parent = <&gpio0>;
+ interrupts = <4 IRQ_TYPE_LEVEL_LOW>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pmic_int_l>;
+ reg = <0x1b>;
+ rockchip,system-power-controller;
+ #clock-cells = <1>;
+ u-boot,dm-pre-reloc;
+ status = "okay";
+
+ vcc12-supply = <&vcc3v3_sys>;
+ regulators {
+ vcc33_lcd: SWITCH_REG2 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-name = "vcc33_lcd";
+ };
+ };
+ };
+};
+
&pinctrl {
pmic {
pmic_int_l: pmic-int-l {
diff --git a/configs/evb-rk3399_defconfig b/configs/evb-rk3399_defconfig
index c644084cdfc..cef8506d997 100644
--- a/configs/evb-rk3399_defconfig
+++ b/configs/evb-rk3399_defconfig
@@ -61,3 +61,8 @@ CONFIG_USB_STORAGE=y
CONFIG_USE_TINY_PRINTF=y
CONFIG_ERRNO_STR=y
CONFIG_SYS_I2C_ROCKCHIP=y
+CONFIG_DM_PMIC=y
+CONFIG_PMIC_CHILDREN=y
+CONFIG_SPL_PMIC_CHILDREN=y
+CONFIG_PMIC_RK808=y
+CONFIG_REGULATOR_RK808=y
--
GitLab
From 7ee16de58bddaa9619c264313008d7e19300b42a Mon Sep 17 00:00:00 2001
From: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Date: Sat, 1 Apr 2017 12:59:25 +0200
Subject: [PATCH 034/282] rockchip: rk3399: spl: add UART0 support for SPL
The RK3399-Q7 ("Puma") SoM exposes UART0 as the Qseven UART (i.e. the
serial line available via standardised pins on the edge connector and
available on a RS232 connector).
To support boards (such as the RK3399-Q7) that require UART0 as a
debug console, we match CONFIG_DEBUG_UART_BASE and add the appropriate
iomux setup to the rk3399 SPL code.
As we are already touching this code, we also move the board-specific
UART setup (i.e. iomux setup) into board_debug_uart_init(). This will
be called from the debug UART init when CONFIG_DEBUG_UART_BOARD_INIT
is set.
As the RK3399 needs to use its board_debug_uart_init() function, we
have Kconfig enable it by default for RK3399 builds.
With everything set up to define CONFIG_BAUDRATE via defconfig and
with to have the SPL debug UART either on UART0 or UART2, the configs
for the RK3399 EVB are then update (the change for the RK3399-Q7 is
left for later to not cause issues on applying the change).
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Acked-by: Simon Glass <sjg@chromium.org>
---
.../include/asm/arch-rockchip/grf_rk3399.h | 8 +++++
arch/arm/mach-rockchip/Kconfig | 1 +
arch/arm/mach-rockchip/rk3399-board-spl.c | 30 ++++++++++++++-----
3 files changed, 31 insertions(+), 8 deletions(-)
diff --git a/arch/arm/include/asm/arch-rockchip/grf_rk3399.h b/arch/arm/include/asm/arch-rockchip/grf_rk3399.h
index b340b05e36e..c42475388b4 100644
--- a/arch/arm/include/asm/arch-rockchip/grf_rk3399.h
+++ b/arch/arm/include/asm/arch-rockchip/grf_rk3399.h
@@ -337,6 +337,14 @@ enum {
GRF_GPIO2B4_SEL_MASK = 3 << GRF_GPIO2B4_SEL_SHIFT,
GRF_SPI2TPM_CSN0 = 1,
+ /* GRF_GPIO2C_IOMUX */
+ GRF_GPIO2C0_SEL_SHIFT = 0,
+ GRF_GPIO2C0_SEL_MASK = 3 << GRF_GPIO2C0_SEL_SHIFT,
+ GRF_UART0BT_SIN = 1,
+ GRF_GPIO2C1_SEL_SHIFT = 2,
+ GRF_GPIO2C1_SEL_MASK = 3 << GRF_GPIO2C1_SEL_SHIFT,
+ GRF_UART0BT_SOUT = 1,
+
/* GRF_GPIO3A_IOMUX */
GRF_GPIO3A0_SEL_SHIFT = 0,
GRF_GPIO3A0_SEL_MASK = 3 << GRF_GPIO3A0_SEL_SHIFT,
diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig
index 5b4caec9533..2b752ad5cad 100644
--- a/arch/arm/mach-rockchip/Kconfig
+++ b/arch/arm/mach-rockchip/Kconfig
@@ -56,6 +56,7 @@ config ROCKCHIP_RK3399
select SPL
select SPL_SEPARATE_BSS
select ENABLE_ARM_SOC_BOOT0_HOOK
+ select DEBUG_UART_BOARD_INIT
help
The Rockchip RK3399 is a ARM-based SoC with a dual-core Cortex-A72
and quad-core Cortex-A53.
diff --git a/arch/arm/mach-rockchip/rk3399-board-spl.c b/arch/arm/mach-rockchip/rk3399-board-spl.c
index f5465294c49..050f5e167e6 100644
--- a/arch/arm/mach-rockchip/rk3399-board-spl.c
+++ b/arch/arm/mach-rockchip/rk3399-board-spl.c
@@ -156,20 +156,24 @@ void secure_timer_init(void)
writel(TIMER_EN | TIMER_FMODE, TIMER_CHN10_BASE + TIMER_CONTROL_REG);
}
-#define GRF_EMMCCORE_CON11 0xff77f02c
#define SGRF_DDR_RGN_CON16 0xff330040
-void board_init_f(ulong dummy)
-{
- struct udevice *pinctrl;
- struct udevice *dev;
- int ret;
- /* Example code showing how to enable the debug UART on RK3288 */
+void board_debug_uart_init(void)
+{
#include <asm/arch/grf_rk3399.h>
- /* Enable early UART2 channel C on the RK3399 */
#define GRF_BASE 0xff770000
struct rk3399_grf_regs * const grf = (void *)GRF_BASE;
+#if defined(CONFIG_DEBUG_UART_BASE) && (CONFIG_DEBUG_UART_BASE == 0xff180000)
+ /* Enable early UART0 on the RK3399 */
+ rk_clrsetreg(&grf->gpio2c_iomux,
+ GRF_GPIO2C0_SEL_MASK,
+ GRF_UART0BT_SIN << GRF_GPIO2C0_SEL_SHIFT);
+ rk_clrsetreg(&grf->gpio2c_iomux,
+ GRF_GPIO2C1_SEL_MASK,
+ GRF_UART0BT_SOUT << GRF_GPIO2C1_SEL_SHIFT);
+#else
+ /* Enable early UART2 channel C on the RK3399 */
rk_clrsetreg(&grf->gpio4c_iomux,
GRF_GPIO4C3_SEL_MASK,
GRF_UART2DGBC_SIN << GRF_GPIO4C3_SEL_SHIFT);
@@ -180,6 +184,16 @@ void board_init_f(ulong dummy)
rk_clrsetreg(&grf->soc_con7,
GRF_UART_DBG_SEL_MASK,
GRF_UART_DBG_SEL_C << GRF_UART_DBG_SEL_SHIFT);
+#endif
+}
+
+#define GRF_EMMCCORE_CON11 0xff77f02c
+void board_init_f(ulong dummy)
+{
+ struct udevice *pinctrl;
+ struct udevice *dev;
+ int ret;
+
#define EARLY_UART
#ifdef EARLY_UART
/*
--
GitLab
From 97fbf26d79701431b4dad1d4eae9d9f837b254cb Mon Sep 17 00:00:00 2001
From: Thomas Schaefer <thomas.schaefer@kontron.com>
Date: Tue, 28 Mar 2017 11:29:56 -0700
Subject: [PATCH 035/282] drivers: ddr: fsl: fix unused-const-variable warnings
Depending on DDR configuration, gcc-6.x will show up unused-const-
variable messages. Use __maybe_unused specifier for all dynamic_odt
variable definitions to remove these warnings.
Memory footprint will not increase as gcc will optimize out unused
constants.
Signed-off-by: Thomas Schaefer <thomas.schaefer@kontron.com>
Signed-off-by: York Sun <york.sun@nxp.com>
---
drivers/ddr/fsl/options.c | 72 +++++++++++++++++++--------------------
1 file changed, 36 insertions(+), 36 deletions(-)
diff --git a/drivers/ddr/fsl/options.c b/drivers/ddr/fsl/options.c
index d6a8fcb216a..1b81a7a2500 100644
--- a/drivers/ddr/fsl/options.c
+++ b/drivers/ddr/fsl/options.c
@@ -33,7 +33,7 @@ struct dynamic_odt {
/* Quad rank is not verified yet due availability.
* Replacing 20 OHM with 34 OHM since DDR4 doesn't have 20 OHM option
*/
-static const struct dynamic_odt single_Q[4] = {
+static __maybe_unused const struct dynamic_odt single_Q[4] = {
{ /* cs0 */
FSL_DDR_ODT_NEVER,
FSL_DDR_ODT_CS_AND_OTHER_DIMM,
@@ -60,7 +60,7 @@ static const struct dynamic_odt single_Q[4] = {
}
};
-static const struct dynamic_odt single_D[4] = {
+static __maybe_unused const struct dynamic_odt single_D[4] = {
{ /* cs0 */
FSL_DDR_ODT_NEVER,
FSL_DDR_ODT_ALL,
@@ -77,7 +77,7 @@ static const struct dynamic_odt single_D[4] = {
{0, 0, 0, 0}
};
-static const struct dynamic_odt single_S[4] = {
+static __maybe_unused const struct dynamic_odt single_S[4] = {
{ /* cs0 */
FSL_DDR_ODT_NEVER,
FSL_DDR_ODT_ALL,
@@ -89,7 +89,7 @@ static const struct dynamic_odt single_S[4] = {
{0, 0, 0, 0},
};
-static const struct dynamic_odt dual_DD[4] = {
+static __maybe_unused const struct dynamic_odt dual_DD[4] = {
{ /* cs0 */
FSL_DDR_ODT_NEVER,
FSL_DDR_ODT_SAME_DIMM,
@@ -116,7 +116,7 @@ static const struct dynamic_odt dual_DD[4] = {
}
};
-static const struct dynamic_odt dual_DS[4] = {
+static __maybe_unused const struct dynamic_odt dual_DS[4] = {
{ /* cs0 */
FSL_DDR_ODT_NEVER,
FSL_DDR_ODT_SAME_DIMM,
@@ -137,7 +137,7 @@ static const struct dynamic_odt dual_DS[4] = {
},
{0, 0, 0, 0}
};
-static const struct dynamic_odt dual_SD[4] = {
+static __maybe_unused const struct dynamic_odt dual_SD[4] = {
{ /* cs0 */
FSL_DDR_ODT_OTHER_DIMM,
FSL_DDR_ODT_ALL,
@@ -159,7 +159,7 @@ static const struct dynamic_odt dual_SD[4] = {
}
};
-static const struct dynamic_odt dual_SS[4] = {
+static __maybe_unused const struct dynamic_odt dual_SS[4] = {
{ /* cs0 */
FSL_DDR_ODT_OTHER_DIMM,
FSL_DDR_ODT_ALL,
@@ -176,7 +176,7 @@ static const struct dynamic_odt dual_SS[4] = {
{0, 0, 0, 0}
};
-static const struct dynamic_odt dual_D0[4] = {
+static __maybe_unused const struct dynamic_odt dual_D0[4] = {
{ /* cs0 */
FSL_DDR_ODT_NEVER,
FSL_DDR_ODT_SAME_DIMM,
@@ -193,7 +193,7 @@ static const struct dynamic_odt dual_D0[4] = {
{0, 0, 0, 0}
};
-static const struct dynamic_odt dual_0D[4] = {
+static __maybe_unused const struct dynamic_odt dual_0D[4] = {
{0, 0, 0, 0},
{0, 0, 0, 0},
{ /* cs2 */
@@ -210,7 +210,7 @@ static const struct dynamic_odt dual_0D[4] = {
}
};
-static const struct dynamic_odt dual_S0[4] = {
+static __maybe_unused const struct dynamic_odt dual_S0[4] = {
{ /* cs0 */
FSL_DDR_ODT_NEVER,
FSL_DDR_ODT_CS,
@@ -223,7 +223,7 @@ static const struct dynamic_odt dual_S0[4] = {
};
-static const struct dynamic_odt dual_0S[4] = {
+static __maybe_unused const struct dynamic_odt dual_0S[4] = {
{0, 0, 0, 0},
{0, 0, 0, 0},
{ /* cs2 */
@@ -236,7 +236,7 @@ static const struct dynamic_odt dual_0S[4] = {
};
-static const struct dynamic_odt odt_unknown[4] = {
+static __maybe_unused const struct dynamic_odt odt_unknown[4] = {
{ /* cs0 */
FSL_DDR_ODT_NEVER,
FSL_DDR_ODT_CS,
@@ -263,7 +263,7 @@ static const struct dynamic_odt odt_unknown[4] = {
}
};
#elif defined(CONFIG_SYS_FSL_DDR3)
-static const struct dynamic_odt single_Q[4] = {
+static __maybe_unused const struct dynamic_odt single_Q[4] = {
{ /* cs0 */
FSL_DDR_ODT_NEVER,
FSL_DDR_ODT_CS_AND_OTHER_DIMM,
@@ -290,7 +290,7 @@ static const struct dynamic_odt single_Q[4] = {
}
};
-static const struct dynamic_odt single_D[4] = {
+static __maybe_unused const struct dynamic_odt single_D[4] = {
{ /* cs0 */
FSL_DDR_ODT_NEVER,
FSL_DDR_ODT_ALL,
@@ -307,7 +307,7 @@ static const struct dynamic_odt single_D[4] = {
{0, 0, 0, 0}
};
-static const struct dynamic_odt single_S[4] = {
+static __maybe_unused const struct dynamic_odt single_S[4] = {
{ /* cs0 */
FSL_DDR_ODT_NEVER,
FSL_DDR_ODT_ALL,
@@ -319,7 +319,7 @@ static const struct dynamic_odt single_S[4] = {
{0, 0, 0, 0},
};
-static const struct dynamic_odt dual_DD[4] = {
+static __maybe_unused const struct dynamic_odt dual_DD[4] = {
{ /* cs0 */
FSL_DDR_ODT_NEVER,
FSL_DDR_ODT_SAME_DIMM,
@@ -346,7 +346,7 @@ static const struct dynamic_odt dual_DD[4] = {
}
};
-static const struct dynamic_odt dual_DS[4] = {
+static __maybe_unused const struct dynamic_odt dual_DS[4] = {
{ /* cs0 */
FSL_DDR_ODT_NEVER,
FSL_DDR_ODT_SAME_DIMM,
@@ -367,7 +367,7 @@ static const struct dynamic_odt dual_DS[4] = {
},
{0, 0, 0, 0}
};
-static const struct dynamic_odt dual_SD[4] = {
+static __maybe_unused const struct dynamic_odt dual_SD[4] = {
{ /* cs0 */
FSL_DDR_ODT_OTHER_DIMM,
FSL_DDR_ODT_ALL,
@@ -389,7 +389,7 @@ static const struct dynamic_odt dual_SD[4] = {
}
};
-static const struct dynamic_odt dual_SS[4] = {
+static __maybe_unused const struct dynamic_odt dual_SS[4] = {
{ /* cs0 */
FSL_DDR_ODT_OTHER_DIMM,
FSL_DDR_ODT_ALL,
@@ -406,7 +406,7 @@ static const struct dynamic_odt dual_SS[4] = {
{0, 0, 0, 0}
};
-static const struct dynamic_odt dual_D0[4] = {
+static __maybe_unused const struct dynamic_odt dual_D0[4] = {
{ /* cs0 */
FSL_DDR_ODT_NEVER,
FSL_DDR_ODT_SAME_DIMM,
@@ -423,7 +423,7 @@ static const struct dynamic_odt dual_D0[4] = {
{0, 0, 0, 0}
};
-static const struct dynamic_odt dual_0D[4] = {
+static __maybe_unused const struct dynamic_odt dual_0D[4] = {
{0, 0, 0, 0},
{0, 0, 0, 0},
{ /* cs2 */
@@ -440,7 +440,7 @@ static const struct dynamic_odt dual_0D[4] = {
}
};
-static const struct dynamic_odt dual_S0[4] = {
+static __maybe_unused const struct dynamic_odt dual_S0[4] = {
{ /* cs0 */
FSL_DDR_ODT_NEVER,
FSL_DDR_ODT_CS,
@@ -453,7 +453,7 @@ static const struct dynamic_odt dual_S0[4] = {
};
-static const struct dynamic_odt dual_0S[4] = {
+static __maybe_unused const struct dynamic_odt dual_0S[4] = {
{0, 0, 0, 0},
{0, 0, 0, 0},
{ /* cs2 */
@@ -466,7 +466,7 @@ static const struct dynamic_odt dual_0S[4] = {
};
-static const struct dynamic_odt odt_unknown[4] = {
+static __maybe_unused const struct dynamic_odt odt_unknown[4] = {
{ /* cs0 */
FSL_DDR_ODT_NEVER,
FSL_DDR_ODT_CS,
@@ -493,14 +493,14 @@ static const struct dynamic_odt odt_unknown[4] = {
}
};
#else /* CONFIG_SYS_FSL_DDR3 */
-static const struct dynamic_odt single_Q[4] = {
+static __maybe_unused const struct dynamic_odt single_Q[4] = {
{0, 0, 0, 0},
{0, 0, 0, 0},
{0, 0, 0, 0},
{0, 0, 0, 0}
};
-static const struct dynamic_odt single_D[4] = {
+static __maybe_unused const struct dynamic_odt single_D[4] = {
{ /* cs0 */
FSL_DDR_ODT_NEVER,
FSL_DDR_ODT_ALL,
@@ -517,7 +517,7 @@ static const struct dynamic_odt single_D[4] = {
{0, 0, 0, 0}
};
-static const struct dynamic_odt single_S[4] = {
+static __maybe_unused const struct dynamic_odt single_S[4] = {
{ /* cs0 */
FSL_DDR_ODT_NEVER,
FSL_DDR_ODT_ALL,
@@ -529,7 +529,7 @@ static const struct dynamic_odt single_S[4] = {
{0, 0, 0, 0},
};
-static const struct dynamic_odt dual_DD[4] = {
+static __maybe_unused const struct dynamic_odt dual_DD[4] = {
{ /* cs0 */
FSL_DDR_ODT_OTHER_DIMM,
FSL_DDR_ODT_OTHER_DIMM,
@@ -556,7 +556,7 @@ static const struct dynamic_odt dual_DD[4] = {
}
};
-static const struct dynamic_odt dual_DS[4] = {
+static __maybe_unused const struct dynamic_odt dual_DS[4] = {
{ /* cs0 */
FSL_DDR_ODT_OTHER_DIMM,
FSL_DDR_ODT_OTHER_DIMM,
@@ -578,7 +578,7 @@ static const struct dynamic_odt dual_DS[4] = {
{0, 0, 0, 0}
};
-static const struct dynamic_odt dual_SD[4] = {
+static __maybe_unused const struct dynamic_odt dual_SD[4] = {
{ /* cs0 */
FSL_DDR_ODT_OTHER_DIMM,
FSL_DDR_ODT_OTHER_DIMM,
@@ -600,7 +600,7 @@ static const struct dynamic_odt dual_SD[4] = {
}
};
-static const struct dynamic_odt dual_SS[4] = {
+static __maybe_unused const struct dynamic_odt dual_SS[4] = {
{ /* cs0 */
FSL_DDR_ODT_OTHER_DIMM,
FSL_DDR_ODT_OTHER_DIMM,
@@ -617,7 +617,7 @@ static const struct dynamic_odt dual_SS[4] = {
{0, 0, 0, 0}
};
-static const struct dynamic_odt dual_D0[4] = {
+static __maybe_unused const struct dynamic_odt dual_D0[4] = {
{ /* cs0 */
FSL_DDR_ODT_NEVER,
FSL_DDR_ODT_ALL,
@@ -634,7 +634,7 @@ static const struct dynamic_odt dual_D0[4] = {
{0, 0, 0, 0}
};
-static const struct dynamic_odt dual_0D[4] = {
+static __maybe_unused const struct dynamic_odt dual_0D[4] = {
{0, 0, 0, 0},
{0, 0, 0, 0},
{ /* cs2 */
@@ -651,7 +651,7 @@ static const struct dynamic_odt dual_0D[4] = {
}
};
-static const struct dynamic_odt dual_S0[4] = {
+static __maybe_unused const struct dynamic_odt dual_S0[4] = {
{ /* cs0 */
FSL_DDR_ODT_NEVER,
FSL_DDR_ODT_CS,
@@ -664,7 +664,7 @@ static const struct dynamic_odt dual_S0[4] = {
};
-static const struct dynamic_odt dual_0S[4] = {
+static __maybe_unused const struct dynamic_odt dual_0S[4] = {
{0, 0, 0, 0},
{0, 0, 0, 0},
{ /* cs2 */
@@ -677,7 +677,7 @@ static const struct dynamic_odt dual_0S[4] = {
};
-static const struct dynamic_odt odt_unknown[4] = {
+static __maybe_unused const struct dynamic_odt odt_unknown[4] = {
{ /* cs0 */
FSL_DDR_ODT_NEVER,
FSL_DDR_ODT_CS,
--
GitLab
From 4139b170377b357dbbbb86190cc181cce0edc91e Mon Sep 17 00:00:00 2001
From: Sumit Garg <sumit.garg@nxp.com>
Date: Thu, 30 Mar 2017 09:52:38 +0530
Subject: [PATCH 036/282] armv8: ls1043ardb: SPL size reduction
Using changes in this patch we were able to reduce approx 10k
size of u-boot-spl.bin image. Following is breif description of
changes to reduce SPL size:
1. Changes in board/freescale/ls1043ardb/Makefile to remove
compilation of eth.c and cpld.c in case of SPL build.
2. Changes in board/freescale/ls1043ardb/ls1043ardb.c to keep
only ddr_init and board_early_init_f funcations in case of SPL
build.
3. Changes in ls1043a_common.h & ls1043ardb.h to remove driver
specific macros due to which static data was being compiled in
case of SPL build.
4. Disable MMC driver from bieng compiled in case of SPL NAND
build and NAND driver from bieng compiled in case of SPL MMC build.
5. Remove I2C driver support from SPL in case of LS1043ARDB.
Signed-off-by: Vinitha Pillai <vinitha.pillai@nxp.com>
Signed-off-by: Sumit Garg <sumit.garg@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
---
board/freescale/ls1043aqds/Makefile | 2 ++
board/freescale/ls1043ardb/Makefile | 4 ++-
board/freescale/ls1043ardb/ls1043ardb.c | 18 +++++++-----
configs/ls1043ardb_sdcard_defconfig | 1 -
include/configs/ls1043a_common.h | 37 +++++++++++++++++++++++++
include/configs/ls1043ardb.h | 14 ++++++++++
6 files changed, 67 insertions(+), 9 deletions(-)
diff --git a/board/freescale/ls1043aqds/Makefile b/board/freescale/ls1043aqds/Makefile
index f727bfd622e..49d8d7d9b96 100644
--- a/board/freescale/ls1043aqds/Makefile
+++ b/board/freescale/ls1043aqds/Makefile
@@ -5,5 +5,7 @@
#
obj-y += ddr.o
+ifndef CONFIG_SPL_BUILD
obj-y += eth.o
+endif
obj-y += ls1043aqds.o
diff --git a/board/freescale/ls1043ardb/Makefile b/board/freescale/ls1043ardb/Makefile
index 5fe1cc93932..2a4452e5ec1 100644
--- a/board/freescale/ls1043ardb/Makefile
+++ b/board/freescale/ls1043ardb/Makefile
@@ -4,7 +4,9 @@
# SPDX-License-Identifier: GPL-2.0+
#
-obj-y += cpld.o
obj-y += ddr.o
obj-y += ls1043ardb.o
+ifndef CONFIG_SPL_BUILD
obj-$(CONFIG_SYS_DPAA_FMAN) += eth.o
+obj-y += cpld.o
+endif
diff --git a/board/freescale/ls1043ardb/ls1043ardb.c b/board/freescale/ls1043ardb/ls1043ardb.c
index 728de2e3f17..9dc1cbc3436 100644
--- a/board/freescale/ls1043ardb/ls1043ardb.c
+++ b/board/freescale/ls1043ardb/ls1043ardb.c
@@ -27,6 +27,15 @@
DECLARE_GLOBAL_DATA_PTR;
+int board_early_init_f(void)
+{
+ fsl_lsch2_early_init_f();
+
+ return 0;
+}
+
+#ifndef CONFIG_SPL_BUILD
+
int checkboard(void)
{
static const char *freq[2] = {"100.00MHZ", "156.25MHZ"};
@@ -65,13 +74,6 @@ int checkboard(void)
return 0;
}
-int board_early_init_f(void)
-{
- fsl_lsch2_early_init_f();
-
- return 0;
-}
-
int board_init(void)
{
struct ccsr_scfg *scfg = (struct ccsr_scfg *)CONFIG_SYS_FSL_SCFG_ADDR;
@@ -213,3 +215,5 @@ u16 flash_read16(void *addr)
return (((val) >> 8) & 0x00ff) | (((val) << 8) & 0xff00);
}
+
+#endif
diff --git a/configs/ls1043ardb_sdcard_defconfig b/configs/ls1043ardb_sdcard_defconfig
index 02b5b5434af..d34a253f113 100644
--- a/configs/ls1043ardb_sdcard_defconfig
+++ b/configs/ls1043ardb_sdcard_defconfig
@@ -18,7 +18,6 @@ CONFIG_SPL=y
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0xf0
CONFIG_SPL_ENV_SUPPORT=y
-CONFIG_SPL_I2C_SUPPORT=y
CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_GPT=y
diff --git a/include/configs/ls1043a_common.h b/include/configs/ls1043a_common.h
index 46d54a0f0d0..23b7ef7b820 100644
--- a/include/configs/ls1043a_common.h
+++ b/include/configs/ls1043a_common.h
@@ -7,6 +7,25 @@
#ifndef __LS1043A_COMMON_H
#define __LS1043A_COMMON_H
+/* SPL build */
+#ifdef CONFIG_SPL_BUILD
+#define SPL_NO_FMAN
+#define SPL_NO_DSPI
+#define SPL_NO_PCIE
+#define SPL_NO_ENV
+#define SPL_NO_MISC
+#define SPL_NO_USB
+#define SPL_NO_SATA
+#define SPL_NO_QE
+#define SPL_NO_EEPROM
+#endif
+#if (defined(CONFIG_SPL_BUILD) && defined(CONFIG_NAND_BOOT))
+#define SPL_NO_MMC
+#endif
+#if (defined(CONFIG_SPL_BUILD) && defined(CONFIG_SD_BOOT))
+#define SPL_NO_IFC
+#endif
+
#define CONFIG_REMAKE_ELF
#define CONFIG_FSL_LAYERSCAPE
#define CONFIG_LS1043A
@@ -83,6 +102,7 @@
#endif
/* IFC */
+#ifndef SPL_NO_IFC
#if !defined(CONFIG_QSPI_BOOT) && !defined(CONFIG_SD_BOOT_QSPI)
#define CONFIG_FSL_IFC
/*
@@ -103,6 +123,7 @@
#define CONFIG_FLASH_SHOW_PROGRESS 45 /* count down from 45/5: 9..1 */
#endif
#endif
+#endif
/* I2C */
#define CONFIG_SYS_I2C
@@ -113,6 +134,7 @@
#define CONFIG_SYS_I2C_MXC_I2C4
/* PCIe */
+#ifndef SPL_NO_PCIE
#define CONFIG_PCIE1 /* PCIE controller 1 */
#define CONFIG_PCIE2 /* PCIE controller 2 */
#define CONFIG_PCIE3 /* PCIE controller 3 */
@@ -122,17 +144,23 @@
#define CONFIG_PCI_SCAN_SHOW
#define CONFIG_CMD_PCI
#endif
+#endif
/* Command line configuration */
+#ifndef SPL_NO_ENV
#define CONFIG_CMD_ENV
+#endif
/* MMC */
+#ifndef SPL_NO_MMC
#ifdef CONFIG_MMC
#define CONFIG_FSL_ESDHC
#define CONFIG_SYS_FSL_MMC_HAS_CAPBLT_VS33
#endif
+#endif
/* DSPI */
+#ifndef SPL_NO_DSPI
#define CONFIG_FSL_DSPI
#ifdef CONFIG_FSL_DSPI
#define CONFIG_DM_SPI_FLASH
@@ -144,8 +172,10 @@
#define CONFIG_SF_DEFAULT_CS 0
#endif
#endif
+#endif
/* FMan ucode */
+#ifndef SPL_NO_FMAN
#define CONFIG_SYS_DPAA_FMAN
#ifdef CONFIG_SYS_DPAA_FMAN
#define CONFIG_SYS_FM_MURAM_SIZE 0x60000
@@ -177,6 +207,7 @@
#define CONFIG_SYS_QE_FMAN_FW_LENGTH 0x10000
#define CONFIG_SYS_FDT_PAD (0x3000 + CONFIG_SYS_QE_FMAN_FW_LENGTH)
#endif
+#endif
/* Miscellaneous configurable options */
#define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_DDR_SDRAM_BASE + 0x10000000)
@@ -184,6 +215,7 @@
#define CONFIG_HWCONFIG
#define HWCONFIG_BUFFER_SIZE 128
+#ifndef SPL_NO_MISC
#if defined(CONFIG_QSPI_BOOT) || defined(CONFIG_SD_BOOT_QSPI)
#define MTDPARTS_DEFAULT "mtdparts=spi0.0:1m(uboot)," \
"5m(kernel),1m(dtb),9m(file_system)"
@@ -224,6 +256,7 @@
#define CONFIG_BOOTCOMMAND "cp.b $kernel_start $kernel_load " \
"$kernel_size && bootm $kernel_load"
#endif
+#endif
/* Monitor Command Prompt */
#define CONFIG_SYS_CBSIZE 512 /* Console I/O Buffer Size */
@@ -231,7 +264,11 @@
sizeof(CONFIG_SYS_PROMPT) + 16)
#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot args buffer */
#define CONFIG_SYS_LONGHELP
+
+#ifndef SPL_NO_MISC
#define CONFIG_CMDLINE_EDITING 1
+#endif
+
#define CONFIG_AUTO_COMPLETE
#define CONFIG_SYS_MAXARGS 64 /* max command args */
diff --git a/include/configs/ls1043ardb.h b/include/configs/ls1043ardb.h
index f185380ae3d..ea929d1da01 100644
--- a/include/configs/ls1043ardb.h
+++ b/include/configs/ls1043ardb.h
@@ -90,7 +90,9 @@
/*
* NAND Flash Definitions
*/
+#ifndef SPL_NO_IFC
#define CONFIG_NAND_FSL_IFC
+#endif
#define CONFIG_SYS_NAND_BASE 0x7e800000
#define CONFIG_SYS_NAND_BASE_PHYS CONFIG_SYS_NAND_BASE
@@ -213,6 +215,7 @@
#define CONFIG_SYS_CS2_FTIM3 CONFIG_SYS_CPLD_FTIM3
/* EEPROM */
+#ifndef SPL_NO_EEPROM
#define CONFIG_ID_EEPROM
#define CONFIG_SYS_I2C_EEPROM_NXID
#define CONFIG_SYS_EEPROM_BUS_NUM 0
@@ -220,11 +223,14 @@
#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1
#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 3
#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 5
+#endif
/*
* Environment
*/
+#ifndef SPL_NO_ENV
#define CONFIG_ENV_OVERWRITE
+#endif
#if defined(CONFIG_NAND_BOOT)
#define CONFIG_ENV_IS_IN_NAND
@@ -243,6 +249,7 @@
#endif
/* FMan */
+#ifndef SPL_NO_FMAN
#ifdef CONFIG_SYS_DPAA_FMAN
#define CONFIG_FMAN_ENET
#define CONFIG_PHYLIB
@@ -266,23 +273,29 @@
#define CONFIG_ETHPRIME "FM1@DTSEC3"
#endif
+#endif
/* QE */
+#ifndef SPL_NO_QE
#if !defined(CONFIG_SD_BOOT) && !defined(CONFIG_NAND_BOOT) && \
!defined(CONFIG_QSPI_BOOT)
#define CONFIG_U_QE
#endif
#define CONFIG_SYS_QE_FW_ADDR 0x60600000
+#endif
/* USB */
+#ifndef SPL_NO_USB
#define CONFIG_HAS_FSL_XHCI_USB
#ifdef CONFIG_HAS_FSL_XHCI_USB
#define CONFIG_USB_XHCI_FSL
#define CONFIG_USB_MAX_CONTROLLER_COUNT 3
#define CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS 2
#endif
+#endif
/* SATA */
+#ifndef SPL_NO_SATA
#define CONFIG_LIBATA
#define CONFIG_SCSI_AHCI
#define CONFIG_CMD_SCSI
@@ -299,6 +312,7 @@
#define SCSI_VEND_ID 0x1b4b
#define SCSI_DEV_ID 0x9170
#define CONFIG_SCSI_DEV_LIST {SCSI_VEND_ID, SCSI_DEV_ID}
+#endif
#include <asm/fsl_secure_boot.h>
--
GitLab
From a52ff334c5b16e71a58fb75f35394761e645f7e9 Mon Sep 17 00:00:00 2001
From: Sumit Garg <sumit.garg@nxp.com>
Date: Thu, 30 Mar 2017 09:53:13 +0530
Subject: [PATCH 037/282] armv8: ls1046ardb: SPL size reduction
Using changes in this patch we were able to reduce approx 4k
size of u-boot-spl.bin image. Following is breif description of
changes to reduce SPL size:
1. Changes in board/freescale/ls1046ardb/Makefile to remove
compilation of eth.c and cpld.c in case of SPL build.
2. Changes in board/freescale/ls1046ardb/ls1046ardb.c to keep
only ddr_init and board_early_init_f funcations in case of SPL
build.
3. Changes in ls1046a_common.h & ls1046ardb.h to remove driver
specific macros due to which static data was being compiled in
case of SPL build.
4. Disable MMC driver from bieng compiled in case of SPL NAND
build and NAND driver from bieng compiled in case of SPL MMC build.
Signed-off-by: Vinitha Pillai <vinitha.pillai@nxp.com>
Signed-off-by: Sumit Garg <sumit.garg@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
---
board/freescale/ls1046aqds/Makefile | 2 ++
board/freescale/ls1046ardb/Makefile | 4 +++-
board/freescale/ls1046ardb/ls1046ardb.c | 16 +++++++------
include/configs/ls1046a_common.h | 32 +++++++++++++++++++++++++
include/configs/ls1046ardb.h | 15 +++++++++++-
5 files changed, 60 insertions(+), 9 deletions(-)
diff --git a/board/freescale/ls1046aqds/Makefile b/board/freescale/ls1046aqds/Makefile
index df6e5461dbc..6267522cc26 100644
--- a/board/freescale/ls1046aqds/Makefile
+++ b/board/freescale/ls1046aqds/Makefile
@@ -5,5 +5,7 @@
#
obj-y += ddr.o
+ifndef CONFIG_SPL_BUILD
obj-y += eth.o
+endif
obj-y += ls1046aqds.o
diff --git a/board/freescale/ls1046ardb/Makefile b/board/freescale/ls1046ardb/Makefile
index 348eb76ea75..b92ed0b3ec4 100644
--- a/board/freescale/ls1046ardb/Makefile
+++ b/board/freescale/ls1046ardb/Makefile
@@ -4,7 +4,9 @@
# SPDX-License-Identifier: GPL-2.0+
#
-obj-y += cpld.o
obj-y += ddr.o
obj-y += ls1046ardb.o
+ifndef CONFIG_SPL_BUILD
obj-$(CONFIG_SYS_DPAA_FMAN) += eth.o
+obj-y += cpld.o
+endif
diff --git a/board/freescale/ls1046ardb/ls1046ardb.c b/board/freescale/ls1046ardb/ls1046ardb.c
index 02b6c4c3752..0cc508b01e6 100644
--- a/board/freescale/ls1046ardb/ls1046ardb.c
+++ b/board/freescale/ls1046ardb/ls1046ardb.c
@@ -24,6 +24,14 @@
DECLARE_GLOBAL_DATA_PTR;
+int board_early_init_f(void)
+{
+ fsl_lsch2_early_init_f();
+
+ return 0;
+}
+
+#ifndef CONFIG_SPL_BUILD
int checkboard(void)
{
static const char *freq[2] = {"100.00MHZ", "156.25MHZ"};
@@ -56,13 +64,6 @@ int checkboard(void)
return 0;
}
-int board_early_init_f(void)
-{
- fsl_lsch2_early_init_f();
-
- return 0;
-}
-
int board_init(void)
{
struct ccsr_scfg *scfg = (struct ccsr_scfg *)CONFIG_SYS_FSL_SCFG_ADDR;
@@ -161,3 +162,4 @@ int ft_board_setup(void *blob, bd_t *bd)
return 0;
}
+#endif
diff --git a/include/configs/ls1046a_common.h b/include/configs/ls1046a_common.h
index cb792961b8b..164a5f38841 100644
--- a/include/configs/ls1046a_common.h
+++ b/include/configs/ls1046a_common.h
@@ -7,6 +7,23 @@
#ifndef __LS1046A_COMMON_H
#define __LS1046A_COMMON_H
+/* SPL build */
+#ifdef CONFIG_SPL_BUILD
+#define SPL_NO_QBMAN
+#define SPL_NO_FMAN
+#define SPL_NO_ENV
+#define SPL_NO_MISC
+#define SPL_NO_QSPI
+#define SPL_NO_USB
+#define SPL_NO_SATA
+#endif
+#if (defined(CONFIG_SPL_BUILD) && defined(CONFIG_NAND_BOOT))
+#define SPL_NO_MMC
+#endif
+#if (defined(CONFIG_SPL_BUILD) && defined(CONFIG_SD_BOOT))
+#define SPL_NO_IFC
+#endif
+
#define CONFIG_REMAKE_ELF
#define CONFIG_FSL_LAYERSCAPE
#define CONFIG_MP
@@ -110,20 +127,28 @@
#define CONFIG_SYS_I2C_MXC_I2C4
/* Command line configuration */
+#ifndef SPL_NO_ENV
#define CONFIG_CMD_ENV
+#endif
/* MMC */
+#ifndef SPL_NO_MMC
#ifdef CONFIG_MMC
#define CONFIG_FSL_ESDHC
#define CONFIG_SYS_FSL_MMC_HAS_CAPBLT_VS33
#endif
+#endif
+#ifndef SPL_NO_QBMAN
#define CONFIG_SYS_DPAA_QBMAN /* Support Q/Bman */
+#endif
/* FMan ucode */
+#ifndef SPL_NO_FMAN
#define CONFIG_SYS_DPAA_FMAN
#ifdef CONFIG_SYS_DPAA_FMAN
#define CONFIG_SYS_FM_MURAM_SIZE 0x60000
+#endif
#ifdef CONFIG_SD_BOOT
/*
@@ -157,6 +182,7 @@
#define CONFIG_HWCONFIG
#define HWCONFIG_BUFFER_SIZE 128
+#ifndef SPL_NO_MISC
/* Initial environment variables */
#define CONFIG_EXTRA_ENV_SETTINGS \
"hwconfig=fsl_ddr:bank_intlv=auto\0" \
@@ -174,13 +200,19 @@
#define CONFIG_BOOTARGS "console=ttyS0,115200 root=/dev/ram0 " \
"earlycon=uart8250,mmio,0x21c0500 " \
MTDPARTS_DEFAULT
+#endif
+
/* Monitor Command Prompt */
#define CONFIG_SYS_CBSIZE 512 /* Console I/O Buffer Size */
#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
sizeof(CONFIG_SYS_PROMPT) + 16)
#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot args buffer */
#define CONFIG_SYS_LONGHELP
+
+#ifndef SPL_NO_MISC
#define CONFIG_CMDLINE_EDITING 1
+#endif
+
#define CONFIG_AUTO_COMPLETE
#define CONFIG_SYS_MAXARGS 64 /* max command args */
diff --git a/include/configs/ls1046ardb.h b/include/configs/ls1046ardb.h
index 2141b8299aa..e368072c281 100644
--- a/include/configs/ls1046ardb.h
+++ b/include/configs/ls1046ardb.h
@@ -51,13 +51,14 @@
#endif
#endif
+#ifndef SPL_NO_IFC
/* IFC */
#define CONFIG_FSL_IFC
-
/*
* NAND Flash Definitions
*/
#define CONFIG_NAND_FSL_IFC
+#endif
#define CONFIG_SYS_NAND_BASE 0x7e800000
#define CONFIG_SYS_NAND_BASE_PHYS CONFIG_SYS_NAND_BASE
@@ -161,7 +162,9 @@
/*
* Environment
*/
+#ifndef SPL_NO_ENV
#define CONFIG_ENV_OVERWRITE
+#endif
#if defined(CONFIG_SD_BOOT)
#define CONFIG_ENV_IS_IN_MMC
@@ -176,6 +179,7 @@
#endif
/* FMan */
+#ifndef SPL_NO_FMAN
#ifdef CONFIG_SYS_DPAA_FMAN
#define CONFIG_FMAN_ENET
#define CONFIG_PHYLIB
@@ -196,16 +200,20 @@
#define CONFIG_ETHPRIME "FM1@DTSEC3"
#endif
+#endif
/* QSPI device */
+#ifndef SPL_NO_QSPI
#ifdef CONFIG_FSL_QSPI
#define CONFIG_SPI_FLASH_SPANSION
#define FSL_QSPI_FLASH_SIZE (1 << 26)
#define FSL_QSPI_FLASH_NUM 2
#define CONFIG_SPI_FLASH_BAR
#endif
+#endif
/* USB */
+#ifndef SPL_NO_USB
#define CONFIG_HAS_FSL_XHCI_USB
#ifdef CONFIG_HAS_FSL_XHCI_USB
#define CONFIG_USB_XHCI_HCD
@@ -216,8 +224,10 @@
#define CONFIG_CMD_USB
#define CONFIG_USB_STORAGE
#endif
+#endif
/* SATA */
+#ifndef SPL_NO_SATA
#define CONFIG_LIBATA
#define CONFIG_SCSI_AHCI
#define CONFIG_SCSI_AHCI_PLAT
@@ -229,7 +239,9 @@
#define CONFIG_SYS_SCSI_MAX_LUN 1
#define CONFIG_SYS_SCSI_MAX_DEVICE (CONFIG_SYS_SCSI_MAX_SCSI_ID * \
CONFIG_SYS_SCSI_MAX_LUN)
+#endif
+#ifndef SPL_NO_MISC
#define CONFIG_BOOTCOMMAND "sf probe 0:0;sf read $kernel_load" \
"$kernel_start $kernel_size;" \
"bootm $kernel_load"
@@ -238,5 +250,6 @@
"15m(u-boot),48m(kernel.itb);" \
"7e800000.flash:16m(nand_uboot)," \
"48m(nand_kernel),448m(nand_free)"
+#endif
#endif /* __LS1046ARDB_H__ */
--
GitLab
From 0645c23a7cb29b8fddd517be9b585b56a629e744 Mon Sep 17 00:00:00 2001
From: VINITHA PILLAI <vinitha.pillai@nxp.com>
Date: Fri, 31 Mar 2017 10:50:02 +0530
Subject: [PATCH 038/282] powerpc: T1042RDB: SECURE BOOT: Remove
CONFIG_CMD_BLOB from SPL compilation
BLOB feature is not required during SPL compilation.
Signed-off-by: Vinitha Pillai <vinitha.pillai@nxp.com>
Signed-off-by: Sumit Garg <sumit.garg@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
---
arch/powerpc/include/asm/fsl_secure_boot.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/powerpc/include/asm/fsl_secure_boot.h b/arch/powerpc/include/asm/fsl_secure_boot.h
index 1b7cf0996b0..2b5a2913ec9 100644
--- a/arch/powerpc/include/asm/fsl_secure_boot.h
+++ b/arch/powerpc/include/asm/fsl_secure_boot.h
@@ -100,11 +100,11 @@
#endif /* ifdef CONFIG_SPL_BUILD */
#define CONFIG_CMD_ESBC_VALIDATE
-#define CONFIG_CMD_BLOB
#define CONFIG_FSL_SEC_MON
#define CONFIG_SHA_PROG_HW_ACCEL
#ifndef CONFIG_SPL_BUILD
+#define CONFIG_CMD_BLOB
/*
* fsl_setenv_chain_of_trust() must be called from
* board_late_init()
--
GitLab
From d1a795ace90b9e2fee8f9db10489886310264336 Mon Sep 17 00:00:00 2001
From: Vinitha Pillai-B57223 <vinitha.pillai@nxp.com>
Date: Thu, 23 Mar 2017 13:48:14 +0530
Subject: [PATCH 039/282] armv8: fsl-layerscape: SECURE BOOT: Add header
address of PPA in kconfig
The header address of PPA defined in Kconfig.
Signed-off-by: Vinitha Pillai <vinitha.pillai@nxp.com>
Signed-off-by: Sumit Garg <sumit.garg@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
---
arch/arm/cpu/armv8/fsl-layerscape/Kconfig | 12 ++++++++++++
arch/arm/cpu/armv8/fsl-layerscape/ppa.c | 2 +-
arch/arm/include/asm/fsl_secure_boot.h | 14 ++------------
3 files changed, 15 insertions(+), 13 deletions(-)
diff --git a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig
index b24462bede9..d587ed3c93e 100644
--- a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig
+++ b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig
@@ -171,6 +171,18 @@ config SYS_LS_PPA_FW_ADDR
QSPI flash, this address is a directly memory-mapped.
If it is in a serial accessed flash, such as NAND and SD
card, it is a byte offset.
+
+config SYS_LS_PPA_ESBC_ADDR
+ hex "hdr address of PPA firmware loading from"
+ depends on FSL_LS_PPA && CHAIN_OF_TRUST
+ default 0x600c0000 if SYS_LS_PPA_FW_IN_XIP && ARCH_LS1043A
+ default 0x580c40000 if SYS_LS_PPA_FW_IN_XIP && FSL_LSCH3
+ help
+ If the PPA header firmware locate at XIP flash, such as NOR or
+ QSPI flash, this address is a directly memory-mapped.
+ If it is in a serial accessed flash, such as NAND and SD
+ card, it is a byte offset.
+
endmenu
config SYS_FSL_ERRATUM_A010315
diff --git a/arch/arm/cpu/armv8/fsl-layerscape/ppa.c b/arch/arm/cpu/armv8/fsl-layerscape/ppa.c
index b35ad5fb6f0..7f87bb86897 100644
--- a/arch/arm/cpu/armv8/fsl-layerscape/ppa.c
+++ b/arch/arm/cpu/armv8/fsl-layerscape/ppa.c
@@ -178,7 +178,7 @@ int ppa_init(void)
ppa_img_addr = (uintptr_t)ppa_fit_addr;
if (fsl_check_boot_mode_secure() != 0) {
ret = fsl_secboot_validate(ppa_esbc_hdr,
- CONFIG_PPA_KEY_HASH,
+ PPA_KEY_HASH,
&ppa_img_addr);
if (ret != 0)
printf("PPA validation failed\n");
diff --git a/arch/arm/include/asm/fsl_secure_boot.h b/arch/arm/include/asm/fsl_secure_boot.h
index d98a1e8f89d..4c36f9dc5e8 100644
--- a/arch/arm/include/asm/fsl_secure_boot.h
+++ b/arch/arm/include/asm/fsl_secure_boot.h
@@ -109,23 +109,13 @@
#endif
#ifdef CONFIG_FSL_LS_PPA
-#ifdef CONFIG_SYS_LS_PPA_FW_IN_XIP
-#ifdef CONFIG_LS1043A
-#define CONFIG_SYS_LS_PPA_ESBC_ADDR 0x600c0000
-#elif defined(CONFIG_FSL_LSCH3)
-#define CONFIG_SYS_LS_PPA_ESBC_ADDR 0x580c40000
-#endif
-#else
-#error "No CONFIG_SYS_LS_PPA_FW_IN_xxx defined"
-#endif /* ifdef CONFIG_SYS_LS_PPA_FW_IN_XIP */
-
/* Define the key hash here if SRK used for signing PPA image is
* different from SRK hash put in SFP used for U-Boot.
* Example
- * #define CONFIG_PPA_KEY_HASH \
+ * #define PPA_KEY_HASH \
* "41066b564c6ffcef40ccbc1e0a5d0d519604000c785d97bbefd25e4d288d1c8b"
*/
-#define CONFIG_PPA_KEY_HASH NULL
+#define PPA_KEY_HASH NULL
#endif /* ifdef CONFIG_FSL_LS_PPA */
#include <config_fsl_chain_trust.h>
--
GitLab
From 216c1e048f3cd20c0c85c07e0cce31695ab19940 Mon Sep 17 00:00:00 2001
From: Vinitha Pillai-B57223 <vinitha.pillai@nxp.com>
Date: Thu, 23 Mar 2017 13:48:15 +0530
Subject: [PATCH 040/282] armv8: LS1043ARDB: Enable PPA in Secure boot
defconfig
Enable PPA in secure boot by defining FSL_LS_PPA macro in its
defconfig file.
Signed-off-by: Vinitha Pillai <vinitha.pillai@nxp.com>
Signed-off-by: Sumit Garg <sumit.garg@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
---
configs/ls1043ardb_SECURE_BOOT_defconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/configs/ls1043ardb_SECURE_BOOT_defconfig b/configs/ls1043ardb_SECURE_BOOT_defconfig
index 6f86877e7e2..861d49bb02a 100644
--- a/configs/ls1043ardb_SECURE_BOOT_defconfig
+++ b/configs/ls1043ardb_SECURE_BOOT_defconfig
@@ -3,6 +3,7 @@ CONFIG_TARGET_LS1043ARDB=y
CONFIG_SECURE_BOOT=y
CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1043a-rdb"
CONFIG_FIT=y
+CONFIG_FSL_LS_PPA=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_BOOTDELAY=10
--
GitLab
From b3635f57d94c366bd94f9f8010024cd6a2d6b272 Mon Sep 17 00:00:00 2001
From: Vinitha Pillai-B57223 <vinitha.pillai@nxp.com>
Date: Thu, 23 Mar 2017 13:48:16 +0530
Subject: [PATCH 041/282] armv8: SECURE_BOOT: Enable chain of trust on LS1046A
platform
Define bootscript and its header addresses for QSPI target. Also
define PPA header address to enable PPA validation.
Signed-off-by: Vinitha Pillai <vinitha.pillai@nxp.com>
Signed-off-by: Sumit Garg <sumit.garg@nxp.com>
---
arch/arm/cpu/armv8/fsl-layerscape/Kconfig | 1 +
.../include/asm/arch-fsl-layerscape/config.h | 2 +-
arch/arm/include/asm/fsl_secure_boot.h | 18 ++++++++++++++----
3 files changed, 16 insertions(+), 5 deletions(-)
diff --git a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig
index d587ed3c93e..f19c1be85ab 100644
--- a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig
+++ b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig
@@ -176,6 +176,7 @@ config SYS_LS_PPA_ESBC_ADDR
hex "hdr address of PPA firmware loading from"
depends on FSL_LS_PPA && CHAIN_OF_TRUST
default 0x600c0000 if SYS_LS_PPA_FW_IN_XIP && ARCH_LS1043A
+ default 0x40740000 if SYS_LS_PPA_FW_IN_XIP && ARCH_LS1046A
default 0x580c40000 if SYS_LS_PPA_FW_IN_XIP && FSL_LSCH3
help
If the PPA header firmware locate at XIP flash, such as NOR or
diff --git a/arch/arm/include/asm/arch-fsl-layerscape/config.h b/arch/arm/include/asm/arch-fsl-layerscape/config.h
index b5b08aae232..1f22afd9e6e 100644
--- a/arch/arm/include/asm/arch-fsl-layerscape/config.h
+++ b/arch/arm/include/asm/arch-fsl-layerscape/config.h
@@ -199,7 +199,7 @@
#define CONFIG_SYS_FSL_IFC_BE
#define CONFIG_SYS_FSL_SFP_VER_3_2
-#define CONFIG_SYS_FSL_SNVS_LE
+#define CONFIG_SYS_FSL_SEC_MON_BE
#define CONFIG_SYS_FSL_SFP_BE
#define CONFIG_SYS_FSL_SRK_LE
#define CONFIG_KEY_REVOCATION
diff --git a/arch/arm/include/asm/fsl_secure_boot.h b/arch/arm/include/asm/fsl_secure_boot.h
index 4c36f9dc5e8..cbf92fbb7bd 100644
--- a/arch/arm/include/asm/fsl_secure_boot.h
+++ b/arch/arm/include/asm/fsl_secure_boot.h
@@ -46,9 +46,10 @@
#endif
-#if defined(CONFIG_LS1043A) || defined(CONFIG_LS2080A)
-/* For LS1043 (ARMv8), ESBC image Address in Header is 64 bit
- * Similiarly for LS2080
+#if defined(CONFIG_FSL_LAYERSCAPE)
+/*
+ * For fsl layerscape based platforms, ESBC image Address in Header
+ * is 64 bit.
*/
#define CONFIG_ESBC_ADDR_64BIT
#endif
@@ -90,12 +91,21 @@
#define CONFIG_BS_ADDR_DEVICE 0x00000940
#define CONFIG_BS_HDR_SIZE 0x00000010
#define CONFIG_BS_SIZE 0x00000008
+#elif defined(CONFIG_QSPI_BOOT)
+#ifdef CONFIG_ARCH_LS1046A
+#define CONFIG_BS_HDR_ADDR_DEVICE 0x40780000
+#define CONFIG_BS_ADDR_DEVICE 0x40800000
#else
+#error "Platform not supported"
+#endif
+#define CONFIG_BS_HDR_SIZE 0x00002000
+#define CONFIG_BS_SIZE 0x00001000
+#else /* Default NOR Boot */
#define CONFIG_BS_HDR_ADDR_DEVICE 0x600a0000
#define CONFIG_BS_ADDR_DEVICE 0x60060000
#define CONFIG_BS_HDR_SIZE 0x00002000
#define CONFIG_BS_SIZE 0x00001000
-#endif /* #ifdef CONFIG_SD_BOOT */
+#endif
#define CONFIG_BS_HDR_ADDR_RAM 0x81000000
#define CONFIG_BS_ADDR_RAM 0x81020000
#endif
--
GitLab
From b7c19ea1ca7d3a02b8aa1e0f756ca60951fa367e Mon Sep 17 00:00:00 2001
From: Sumit Garg <sumit.garg@nxp.com>
Date: Thu, 23 Mar 2017 13:48:17 +0530
Subject: [PATCH 042/282] armv8: LS1046AQDS: Add NOR Secure Boot Target
Add NOR secure boot target. Also enable sec init.
Signed-off-by: Vinitha Pillai <vinitha.pillai@nxp.com>
Signed-off-by: Sumit Garg <sumit.garg@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
---
board/freescale/ls1046aqds/MAINTAINERS | 4 +++
board/freescale/ls1046aqds/ls1046aqds.c | 19 ++++++++++++
configs/ls1046aqds_SECURE_BOOT_defconfig | 39 ++++++++++++++++++++++++
3 files changed, 62 insertions(+)
create mode 100644 configs/ls1046aqds_SECURE_BOOT_defconfig
diff --git a/board/freescale/ls1046aqds/MAINTAINERS b/board/freescale/ls1046aqds/MAINTAINERS
index b4549ae138d..6737d558ce0 100644
--- a/board/freescale/ls1046aqds/MAINTAINERS
+++ b/board/freescale/ls1046aqds/MAINTAINERS
@@ -8,3 +8,7 @@ F: configs/ls1046aqds_nand_defconfig
F: configs/ls1046aqds_sdcard_ifc_defconfig
F: configs/ls1046aqds_sdcard_qspi_defconfig
F: configs/ls1046aqds_qspi_defconfig
+
+M: Sumit Garg <sumit.garg@nxp.com>
+S: Maintained
+F: configs/ls1046aqds_SECURE_BOOT_defconfig
diff --git a/board/freescale/ls1046aqds/ls1046aqds.c b/board/freescale/ls1046aqds/ls1046aqds.c
index 69fc15b6815..58ce75acf6c 100644
--- a/board/freescale/ls1046aqds/ls1046aqds.c
+++ b/board/freescale/ls1046aqds/ls1046aqds.c
@@ -22,6 +22,7 @@
#include <fsl_csu.h>
#include <fsl_esdhc.h>
#include <fsl_ifc.h>
+#include <fsl_sec.h>
#include <spl.h>
#include "../common/vid.h"
@@ -266,6 +267,24 @@ int board_init(void)
if (adjust_vdd(0))
printf("Warning: Adjusting core voltage failed.\n");
+#ifdef CONFIG_SECURE_BOOT
+ /*
+ * In case of Secure Boot, the IBR configures the SMMU
+ * to allow only Secure transactions.
+ * SMMU must be reset in bypass mode.
+ * Set the ClientPD bit and Clear the USFCFG Bit
+ */
+ u32 val;
+ val = (in_le32(SMMU_SCR0) | SCR0_CLIENTPD_MASK) & ~(SCR0_USFCFG_MASK);
+ out_le32(SMMU_SCR0, val);
+ val = (in_le32(SMMU_NSCR0) | SCR0_CLIENTPD_MASK) & ~(SCR0_USFCFG_MASK);
+ out_le32(SMMU_NSCR0, val);
+#endif
+
+#ifdef CONFIG_FSL_CAAM
+ sec_init();
+#endif
+
return 0;
}
diff --git a/configs/ls1046aqds_SECURE_BOOT_defconfig b/configs/ls1046aqds_SECURE_BOOT_defconfig
new file mode 100644
index 00000000000..dc16fa0b8fa
--- /dev/null
+++ b/configs/ls1046aqds_SECURE_BOOT_defconfig
@@ -0,0 +1,39 @@
+CONFIG_ARM=y
+CONFIG_TARGET_LS1046AQDS=y
+CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1046a-qds-duart"
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_SECURE_BOOT=y
+CONFIG_BOOTDELAY=10
+CONFIG_HUSH_PARSER=y
+CONFIG_CMD_BOOTZ=y
+CONFIG_CMD_GREPENV=y
+CONFIG_CMD_MEMTEST=y
+CONFIG_CMD_MEMINFO=y
+CONFIG_CMD_GPT=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_SF=y
+CONFIG_CMD_I2C=y
+CONFIG_CMD_DHCP=y
+CONFIG_CMD_MII=y
+CONFIG_CMD_PING=y
+CONFIG_CMD_CACHE=y
+CONFIG_CMD_EXT2=y
+CONFIG_CMD_FAT=y
+CONFIG_OF_CONTROL=y
+CONFIG_DM=y
+CONFIG_MTD_NOR_FLASH=y
+CONFIG_SPI_FLASH=y
+CONFIG_NETDEVICES=y
+CONFIG_E1000=y
+CONFIG_PCI=y
+CONFIG_DM_PCI=y
+CONFIG_DM_PCI_COMPAT=y
+CONFIG_PCIE_LAYERSCAPE=y
+CONFIG_SYS_NS16550=y
+CONFIG_DM_SPI=y
+CONFIG_FSL_DSPI=y
+CONFIG_USB=y
+CONFIG_DM_USB=y
+CONFIG_RSA=y
--
GitLab
From f7244f2c4815aa80a7cd7e9ceaee1969a16acd47 Mon Sep 17 00:00:00 2001
From: Vinitha Pillai-B57223 <vinitha.pillai@nxp.com>
Date: Thu, 23 Mar 2017 13:48:18 +0530
Subject: [PATCH 043/282] armv8: LS1046ARDB: Add QSPI Secure Boot target
Add QSPI Secure Boot target. Also enable sec init.
Signed-off-by: Vinitha Pillai <vinitha.pillai@nxp.com>
Signed-off-by: Sumit Garg <sumit.garg@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
---
board/freescale/ls1046ardb/Kconfig | 2 +-
board/freescale/ls1046ardb/MAINTAINERS | 4 ++
board/freescale/ls1046ardb/ls1046ardb.c | 19 ++++++++++
configs/ls1046ardb_qspi_SECURE_BOOT_defconfig | 37 +++++++++++++++++++
include/configs/ls1046ardb.h | 2 +
5 files changed, 63 insertions(+), 1 deletion(-)
create mode 100644 configs/ls1046ardb_qspi_SECURE_BOOT_defconfig
diff --git a/board/freescale/ls1046ardb/Kconfig b/board/freescale/ls1046ardb/Kconfig
index a62255c78db..b9f2ed7e4bb 100644
--- a/board/freescale/ls1046ardb/Kconfig
+++ b/board/freescale/ls1046ardb/Kconfig
@@ -12,5 +12,5 @@ config SYS_SOC
config SYS_CONFIG_NAME
default "ls1046ardb"
-
+source "board/freescale/common/Kconfig"
endif
diff --git a/board/freescale/ls1046ardb/MAINTAINERS b/board/freescale/ls1046ardb/MAINTAINERS
index ff42bef090e..758ff9d5723 100644
--- a/board/freescale/ls1046ardb/MAINTAINERS
+++ b/board/freescale/ls1046ardb/MAINTAINERS
@@ -7,3 +7,7 @@ F: include/configs/ls1046ardb.h
F: configs/ls1046ardb_qspi_defconfig
F: configs/ls1046ardb_sdcard_defconfig
F: configs/ls1046ardb_emmc_defconfig
+
+M: Sumit Garg <sumit.garg@nxp.com>
+S: Maintained
+F: configs/ls1046ardb_qspi_SECURE_BOOT_defconfig
diff --git a/board/freescale/ls1046ardb/ls1046ardb.c b/board/freescale/ls1046ardb/ls1046ardb.c
index 0cc508b01e6..1dd5e698824 100644
--- a/board/freescale/ls1046ardb/ls1046ardb.c
+++ b/board/freescale/ls1046ardb/ls1046ardb.c
@@ -21,6 +21,7 @@
#include <fsl_esdhc.h>
#include <power/mc34vr500_pmic.h>
#include "cpld.h"
+#include <fsl_sec.h>
DECLARE_GLOBAL_DATA_PTR;
@@ -72,6 +73,24 @@ int board_init(void)
enable_layerscape_ns_access();
#endif
+#ifdef CONFIG_SECURE_BOOT
+ /*
+ * In case of Secure Boot, the IBR configures the SMMU
+ * to allow only Secure transactions.
+ * SMMU must be reset in bypass mode.
+ * Set the ClientPD bit and Clear the USFCFG Bit
+ */
+ u32 val;
+ val = (in_le32(SMMU_SCR0) | SCR0_CLIENTPD_MASK) & ~(SCR0_USFCFG_MASK);
+ out_le32(SMMU_SCR0, val);
+ val = (in_le32(SMMU_NSCR0) | SCR0_CLIENTPD_MASK) & ~(SCR0_USFCFG_MASK);
+ out_le32(SMMU_NSCR0, val);
+#endif
+
+#ifdef CONFIG_FSL_CAAM
+ sec_init();
+#endif
+
#ifdef CONFIG_FSL_LS_PPA
ppa_init();
#endif
diff --git a/configs/ls1046ardb_qspi_SECURE_BOOT_defconfig b/configs/ls1046ardb_qspi_SECURE_BOOT_defconfig
new file mode 100644
index 00000000000..af14e194679
--- /dev/null
+++ b/configs/ls1046ardb_qspi_SECURE_BOOT_defconfig
@@ -0,0 +1,37 @@
+CONFIG_ARM=y
+CONFIG_TARGET_LS1046ARDB=y
+CONFIG_FSL_LS_PPA=y
+CONFIG_QSPI_AHB_INIT=y
+CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1046a-rdb"
+CONFIG_FIT_VERBOSE=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_QSPI_BOOT=y
+CONFIG_SECURE_BOOT=y
+CONFIG_BOOTDELAY=10
+CONFIG_HUSH_PARSER=y
+# CONFIG_CMD_IMLS is not set
+CONFIG_CMD_GPT=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_SF=y
+CONFIG_CMD_I2C=y
+CONFIG_CMD_DHCP=y
+CONFIG_CMD_MII=y
+CONFIG_CMD_PING=y
+CONFIG_CMD_CACHE=y
+CONFIG_CMD_EXT2=y
+CONFIG_CMD_FAT=y
+CONFIG_OF_CONTROL=y
+CONFIG_DM=y
+CONFIG_SPI_FLASH=y
+CONFIG_NETDEVICES=y
+CONFIG_E1000=y
+CONFIG_PCI=y
+CONFIG_DM_PCI=y
+CONFIG_DM_PCI_COMPAT=y
+CONFIG_PCIE_LAYERSCAPE=y
+CONFIG_SYS_NS16550=y
+CONFIG_DM_SPI=y
+CONFIG_FSL_QSPI=y
+CONFIG_USB=y
+CONFIG_DM_USB=y
+CONFIG_RSA=y
diff --git a/include/configs/ls1046ardb.h b/include/configs/ls1046ardb.h
index e368072c281..67ee62608cd 100644
--- a/include/configs/ls1046ardb.h
+++ b/include/configs/ls1046ardb.h
@@ -252,4 +252,6 @@
"48m(nand_kernel),448m(nand_free)"
#endif
+#include <asm/fsl_secure_boot.h>
+
#endif /* __LS1046ARDB_H__ */
--
GitLab
From d2a99502ade1a85dd75a1709ea5808bc5e7ee21f Mon Sep 17 00:00:00 2001
From: Vinitha Pillai-B57223 <vinitha.pillai@nxp.com>
Date: Thu, 23 Mar 2017 13:48:19 +0530
Subject: [PATCH 044/282] armv8: SECURE_BOOT: Enable chain of trust on LS1012A
platform
Define bootscript and its header addresses for QSPI target
Also add PPA header address in Kconfig
Signed-off-by: Vinitha Pillai <vinitha.pillai@nxp.com>
Signed-off-by: Sumit Garg <sumit.garg@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
---
arch/arm/cpu/armv8/fsl-layerscape/Kconfig | 1 +
arch/arm/include/asm/arch-fsl-layerscape/config.h | 7 ++++++-
arch/arm/include/asm/fsl_secure_boot.h | 3 +++
3 files changed, 10 insertions(+), 1 deletion(-)
diff --git a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig
index f19c1be85ab..9fb76f00ed8 100644
--- a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig
+++ b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig
@@ -177,6 +177,7 @@ config SYS_LS_PPA_ESBC_ADDR
depends on FSL_LS_PPA && CHAIN_OF_TRUST
default 0x600c0000 if SYS_LS_PPA_FW_IN_XIP && ARCH_LS1043A
default 0x40740000 if SYS_LS_PPA_FW_IN_XIP && ARCH_LS1046A
+ default 0x40480000 if SYS_LS_PPA_FW_IN_XIP && ARCH_LS1012A
default 0x580c40000 if SYS_LS_PPA_FW_IN_XIP && FSL_LSCH3
help
If the PPA header firmware locate at XIP flash, such as NOR or
diff --git a/arch/arm/include/asm/arch-fsl-layerscape/config.h b/arch/arm/include/asm/arch-fsl-layerscape/config.h
index 1f22afd9e6e..4db11b646e0 100644
--- a/arch/arm/include/asm/arch-fsl-layerscape/config.h
+++ b/arch/arm/include/asm/arch-fsl-layerscape/config.h
@@ -185,7 +185,12 @@
#elif defined(CONFIG_ARCH_LS1012A)
#define GICD_BASE 0x01401000
#define GICC_BASE 0x01402000
-
+#define CONFIG_SYS_FSL_SFP_VER_3_2
+#define CONFIG_SYS_FSL_SEC_MON_BE
+#define CONFIG_SYS_FSL_SFP_BE
+#define CONFIG_SYS_FSL_SRK_LE
+#define CONFIG_KEY_REVOCATION
+#define CONFIG_SYS_FSL_MAX_NUM_OF_SEC 1
#define CONFIG_SYS_DDR_BLOCK1_SIZE ((phys_size_t)2 << 30)
#define CONFIG_MAX_MEM_MAPPED CONFIG_SYS_DDR_BLOCK1_SIZE
diff --git a/arch/arm/include/asm/fsl_secure_boot.h b/arch/arm/include/asm/fsl_secure_boot.h
index cbf92fbb7bd..558dc62cc77 100644
--- a/arch/arm/include/asm/fsl_secure_boot.h
+++ b/arch/arm/include/asm/fsl_secure_boot.h
@@ -95,6 +95,9 @@
#ifdef CONFIG_ARCH_LS1046A
#define CONFIG_BS_HDR_ADDR_DEVICE 0x40780000
#define CONFIG_BS_ADDR_DEVICE 0x40800000
+#elif defined(CONFIG_ARCH_LS1012A)
+#define CONFIG_BS_HDR_ADDR_DEVICE 0x400c0000
+#define CONFIG_BS_ADDR_DEVICE 0x40060000
#else
#error "Platform not supported"
#endif
--
GitLab
From 11d14bfb756331bc26ee6ea118f9c1bd8aa0fc65 Mon Sep 17 00:00:00 2001
From: Vinitha Pillai-B57223 <vinitha.pillai@nxp.com>
Date: Thu, 23 Mar 2017 13:48:20 +0530
Subject: [PATCH 045/282] armv8: LS1012ARDB: Add QSPI Secure Boot target
Add QSPI Secure Boot target to enable chain of trust
Signed-off-by: Sumit Garg <sumit.garg@nxp.com>
Signed-off-by: Vinitha Pillai <vinitha.pillai@nxp.com>
Reviewed-by: Ruchika Gupta <ruchika.gupta@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
---
board/freescale/ls1012ardb/MAINTAINERS | 4 ++
board/freescale/ls1012ardb/ls1012ardb.c | 5 ++
configs/ls1012ardb_qspi_SECURE_BOOT_defconfig | 48 +++++++++++++++++++
include/configs/ls1012a_common.h | 2 -
include/configs/ls1012ardb.h | 3 ++
5 files changed, 60 insertions(+), 2 deletions(-)
create mode 100644 configs/ls1012ardb_qspi_SECURE_BOOT_defconfig
diff --git a/board/freescale/ls1012ardb/MAINTAINERS b/board/freescale/ls1012ardb/MAINTAINERS
index 79a2a7dd247..2cb38e7405f 100644
--- a/board/freescale/ls1012ardb/MAINTAINERS
+++ b/board/freescale/ls1012ardb/MAINTAINERS
@@ -4,3 +4,7 @@ S: Maintained
F: board/freescale/ls1012ardb/
F: include/configs/ls1012ardb.h
F: configs/ls1012ardb_qspi_defconfig
+
+M: Sumit Garg <sumit.garg@nxp.com>
+S: Maintained
+F: configs/ls1012ardb_qspi_SECURE_BOOT_defconfig
diff --git a/board/freescale/ls1012ardb/ls1012ardb.c b/board/freescale/ls1012ardb/ls1012ardb.c
index a23a23be1f0..a21e4c4aebc 100644
--- a/board/freescale/ls1012ardb/ls1012ardb.c
+++ b/board/freescale/ls1012ardb/ls1012ardb.c
@@ -22,6 +22,7 @@
#include <environment.h>
#include <fsl_mmdc.h>
#include <netdev.h>
+#include <fsl_sec.h>
DECLARE_GLOBAL_DATA_PTR;
@@ -118,6 +119,10 @@ int board_init(void)
gd->env_addr = (ulong)&default_environment[0];
#endif
+#ifdef CONFIG_FSL_CAAM
+ sec_init();
+#endif
+
#ifdef CONFIG_FSL_LS_PPA
ppa_init();
#endif
diff --git a/configs/ls1012ardb_qspi_SECURE_BOOT_defconfig b/configs/ls1012ardb_qspi_SECURE_BOOT_defconfig
new file mode 100644
index 00000000000..97f49d5bd57
--- /dev/null
+++ b/configs/ls1012ardb_qspi_SECURE_BOOT_defconfig
@@ -0,0 +1,48 @@
+CONFIG_ARM=y
+CONFIG_TARGET_LS1012ARDB=y
+CONFIG_SYS_EXTRA_OPTIONS="QSPI_BOOT"
+# CONFIG_CMD_IMLS is not set
+CONFIG_SYS_NS16550=y
+CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1012a-rdb"
+CONFIG_FSL_LS_PPA=y
+CONFIG_OF_CONTROL=y
+CONFIG_DM=y
+CONFIG_SPI_FLASH=y
+# CONFIG_SYS_MALLOC_F is not set
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_OF_STDOUT_VIA_ALIAS=y
+CONFIG_SECURE_BOOT=y
+CONFIG_QSPI_BOOT=y
+CONFIG_BOOTDELAY=10
+CONFIG_HUSH_PARSER=y
+CONFIG_CMD_GREPENV=y
+CONFIG_CMD_GPT=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_SF=y
+CONFIG_CMD_I2C=y
+CONFIG_CMD_USB=y
+# CONFIG_CMD_SETEXPR is not set
+CONFIG_CMD_DHCP=y
+CONFIG_CMD_MII=y
+CONFIG_CMD_PING=y
+CONFIG_CMD_CACHE=y
+CONFIG_CMD_EXT2=y
+CONFIG_CMD_FAT=y
+CONFIG_NET_RANDOM_ETHADDR=y
+CONFIG_DM_SPI_FLASH=y
+CONFIG_NETDEVICES=y
+CONFIG_E1000=y
+CONFIG_PCI=y
+CONFIG_DM_PCI=y
+CONFIG_DM_PCI_COMPAT=y
+CONFIG_PCIE_LAYERSCAPE=y
+CONFIG_DM_SPI=y
+CONFIG_FSL_DSPI=y
+CONFIG_USB=y
+CONFIG_USB_XHCI_HCD=y
+CONFIG_USB_XHCI_DWC3=y
+CONFIG_USB_STORAGE=y
+CONFIG_RSA=y
+CONFIG_RSA_SOFTWARE_EXP=y
diff --git a/include/configs/ls1012a_common.h b/include/configs/ls1012a_common.h
index 1a0c7f8e5f9..09f890d55c3 100644
--- a/include/configs/ls1012a_common.h
+++ b/include/configs/ls1012a_common.h
@@ -123,6 +123,4 @@
#define CONFIG_PANIC_HANG
#define CONFIG_SYS_BOOTM_LEN (64 << 20) /* Increase max gunzip size */
-#include <asm/fsl_secure_boot.h>
-
#endif /* __LS1012A_COMMON_H */
diff --git a/include/configs/ls1012ardb.h b/include/configs/ls1012ardb.h
index 70d3a71eb37..276fe1050cf 100644
--- a/include/configs/ls1012ardb.h
+++ b/include/configs/ls1012ardb.h
@@ -74,4 +74,7 @@
#define CONFIG_SYS_MEMTEST_START 0x80000000
#define CONFIG_SYS_MEMTEST_END 0x9fffffff
+
+#include <asm/fsl_secure_boot.h>
+
#endif /* __LS1012ARDB_H__ */
--
GitLab
From 70f9661ca9130c446c146f582046024eddaaee31 Mon Sep 17 00:00:00 2001
From: Ruchika Gupta <ruchika.gupta@nxp.com>
Date: Mon, 17 Apr 2017 18:07:17 +0530
Subject: [PATCH 046/282] arm: ls1043ardb: Add SD secure boot target
- Add SD secure boot target for ls1043ardb.
- Implement FSL_LSCH2 specific spl_board_init() to setup CAAM stream
ID and corresponding stream ID in SMMU.
- Change the u-boot size defined by a macro for copying the main
U-Boot by SPL to also include the u-boot Secure Boot header size as
header is appended to u-boot image. So header will also be copied
from SD to DDR.
- CONFIG_MAX_SPL_SIZE is limited to 90KB. SPL is copied to OCRAM
(128K) where 32K are reserved for use by boot ROM and 6K for secure
boto header.
- Error messages during SPL boot are limited to error code numbers
instead of strings to reduce the size of SPL image.
Signed-off-by: Vinitha Pillai-B57223 <vinitha.pillai@nxp.com>
Signed-off-by: Sumit Garg <sumit.garg@nxp.com>
Signed-off-by: Ruchika Gupta <ruchika.gupta@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
---
arch/arm/cpu/armv8/fsl-layerscape/spl.c | 18 ++++++
arch/arm/include/asm/fsl_secure_boot.h | 9 ++-
board/freescale/common/fsl_validate.c | 4 ++
board/freescale/ls1043ardb/MAINTAINERS | 1 +
.../ls1043ardb_sdcard_SECURE_BOOT_defconfig | 57 +++++++++++++++++++
include/configs/ls1043a_common.h | 16 +++++-
6 files changed, 101 insertions(+), 4 deletions(-)
create mode 100644 configs/ls1043ardb_sdcard_SECURE_BOOT_defconfig
diff --git a/arch/arm/cpu/armv8/fsl-layerscape/spl.c b/arch/arm/cpu/armv8/fsl-layerscape/spl.c
index 73a86807417..dfacf98e889 100644
--- a/arch/arm/cpu/armv8/fsl-layerscape/spl.c
+++ b/arch/arm/cpu/armv8/fsl-layerscape/spl.c
@@ -41,6 +41,24 @@ u32 spl_boot_mode(const u32 boot_device)
}
#ifdef CONFIG_SPL_BUILD
+
+void spl_board_init(void)
+{
+#if defined(CONFIG_SECURE_BOOT) && defined(CONFIG_FSL_LSCH2)
+ /*
+ * In case of Secure Boot, the IBR configures the SMMU
+ * to allow only Secure transactions.
+ * SMMU must be reset in bypass mode.
+ * Set the ClientPD bit and Clear the USFCFG Bit
+ */
+ u32 val;
+ val = (in_le32(SMMU_SCR0) | SCR0_CLIENTPD_MASK) & ~(SCR0_USFCFG_MASK);
+ out_le32(SMMU_SCR0, val);
+ val = (in_le32(SMMU_NSCR0) | SCR0_CLIENTPD_MASK) & ~(SCR0_USFCFG_MASK);
+ out_le32(SMMU_NSCR0, val);
+#endif
+}
+
void board_init_f(ulong dummy)
{
/* Clear global data */
diff --git a/arch/arm/include/asm/fsl_secure_boot.h b/arch/arm/include/asm/fsl_secure_boot.h
index 558dc62cc77..1ca5f42ed61 100644
--- a/arch/arm/include/asm/fsl_secure_boot.h
+++ b/arch/arm/include/asm/fsl_secure_boot.h
@@ -27,10 +27,11 @@
#define CONFIG_SPL_UBOOT_KEY_HASH NULL
#endif /* ifdef CONFIG_SPL_BUILD */
+#define CONFIG_KEY_REVOCATION
+
#ifndef CONFIG_SPL_BUILD
#define CONFIG_CMD_BLOB
#define CONFIG_CMD_HASH
-#define CONFIG_KEY_REVOCATION
#ifndef CONFIG_SYS_RAMBOOT
/* The key used for verification of next level images
* is picked up from an Extension Table which has
@@ -87,7 +88,11 @@
/* For SD boot address and size are assigned in terms of sector
* offset and no. of sectors respectively.
*/
-#define CONFIG_BS_HDR_ADDR_DEVICE 0x00000900
+#if defined(CONFIG_LS1043A)
+#define CONFIG_BS_HDR_ADDR_DEVICE 0x00000920
+#else
+#define CONFIG_BS_HDR_ADDR_DEVICE 0x00000900
+#endif
#define CONFIG_BS_ADDR_DEVICE 0x00000940
#define CONFIG_BS_HDR_SIZE 0x00000010
#define CONFIG_BS_SIZE 0x00000008
diff --git a/board/freescale/common/fsl_validate.c b/board/freescale/common/fsl_validate.c
index 7396aa2f698..125655a37a2 100644
--- a/board/freescale/common/fsl_validate.c
+++ b/board/freescale/common/fsl_validate.c
@@ -393,6 +393,7 @@ static void fsl_secboot_bootscript_parse_failure(void)
*/
void fsl_secboot_handle_error(int error)
{
+#ifndef CONFIG_SPL_BUILD
const struct fsl_secboot_errcode *e;
for (e = fsl_secboot_errcodes; e->errcode != ERROR_ESBC_CLIENT_MAX;
@@ -400,6 +401,9 @@ void fsl_secboot_handle_error(int error)
if (e->errcode == error)
printf("ERROR :: %x :: %s\n", error, e->name);
}
+#else
+ printf("ERROR :: %x\n", error);
+#endif
/* If Boot Mode is secure, transition the SNVS state and issue
* reset based on type of failure and ITS setting.
diff --git a/board/freescale/ls1043ardb/MAINTAINERS b/board/freescale/ls1043ardb/MAINTAINERS
index 0503a3fcc96..8b69892bbbc 100644
--- a/board/freescale/ls1043ardb/MAINTAINERS
+++ b/board/freescale/ls1043ardb/MAINTAINERS
@@ -12,3 +12,4 @@ LS1043A_SECURE_BOOT BOARD
M: Ruchika Gupta <ruchika.gupta@nxp.com>
S: Maintained
F: configs/ls1043ardb_SECURE_BOOT_defconfig
+F: configs/ls1043ardb_sdcard_SECURE_BOOT_defconfig
diff --git a/configs/ls1043ardb_sdcard_SECURE_BOOT_defconfig b/configs/ls1043ardb_sdcard_SECURE_BOOT_defconfig
new file mode 100644
index 00000000000..3f35d6493f7
--- /dev/null
+++ b/configs/ls1043ardb_sdcard_SECURE_BOOT_defconfig
@@ -0,0 +1,57 @@
+CONFIG_ARM=y
+CONFIG_TARGET_LS1043ARDB=y
+CONFIG_SPL_LIBCOMMON_SUPPORT=y
+CONFIG_SPL_LIBGENERIC_SUPPORT=y
+CONFIG_SPL_MMC_SUPPORT=y
+CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_ENV_SUPPORT=y
+CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
+CONFIG_SPL_WATCHDOG_SUPPORT=y
+CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1043a-rdb"
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPL_FSL_PBL,SD_BOOT"
+CONFIG_SECURE_BOOT=y
+CONFIG_SD_BOOT=y
+CONFIG_BOOTDELAY=10
+CONFIG_SPL=y
+CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y
+CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x110
+CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
+CONFIG_HUSH_PARSER=y
+CONFIG_CMD_GPT=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_SF=y
+CONFIG_CMD_I2C=y
+CONFIG_CMD_USB=y
+CONFIG_CMD_DHCP=y
+CONFIG_CMD_PXE=y
+CONFIG_CMD_MII=y
+CONFIG_CMD_PING=y
+CONFIG_CMD_CACHE=y
+CONFIG_CMD_EXT2=y
+CONFIG_CMD_FAT=y
+# CONFIG_SPL_EFI_PARTITION is not set
+CONFIG_OF_CONTROL=y
+CONFIG_DM=y
+CONFIG_SPL_DM=y
+CONFIG_MTD_NOR_FLASH=y
+CONFIG_SPI_FLASH=y
+CONFIG_NETDEVICES=y
+CONFIG_E1000=y
+CONFIG_PCI=y
+CONFIG_DM_PCI=y
+CONFIG_DM_PCI_COMPAT=y
+CONFIG_PCIE_LAYERSCAPE=y
+CONFIG_SYS_NS16550=y
+CONFIG_DM_SPI=y
+CONFIG_USB=y
+CONFIG_DM_USB=y
+CONFIG_USB_XHCI_HCD=y
+CONFIG_USB_XHCI_DWC3=y
+CONFIG_USB_STORAGE=y
+CONFIG_RSA=y
+CONFIG_SPL_RSA=y
+CONFIG_SPL_CRYPTO_SUPPORT=y
+CONFIG_SPL_HASH_SUPPORT=y
diff --git a/include/configs/ls1043a_common.h b/include/configs/ls1043a_common.h
index 23b7ef7b820..c63c5e3403a 100644
--- a/include/configs/ls1043a_common.h
+++ b/include/configs/ls1043a_common.h
@@ -71,7 +71,7 @@
#define CONFIG_SPL_TARGET "u-boot-with-spl.bin"
#define CONFIG_SPL_TEXT_BASE 0x10000000
-#define CONFIG_SPL_MAX_SIZE 0x1d000
+#define CONFIG_SPL_MAX_SIZE 0x17000
#define CONFIG_SPL_STACK 0x1001e000
#define CONFIG_SPL_PAD_TO 0x1d000
@@ -80,7 +80,19 @@
#define CONFIG_SYS_SPL_MALLOC_SIZE 0x100000
#define CONFIG_SPL_BSS_START_ADDR 0x80100000
#define CONFIG_SPL_BSS_MAX_SIZE 0x80000
-#define CONFIG_SYS_MONITOR_LEN 0xa0000
+
+#ifdef CONFIG_SECURE_BOOT
+#define CONFIG_U_BOOT_HDR_SIZE (16 << 10)
+/*
+ * HDR would be appended at end of image and copied to DDR along
+ * with U-Boot image. Here u-boot max. size is 512K. So if binary
+ * size increases then increase this size in case of secure boot as
+ * it uses raw u-boot image instead of fit image.
+ */
+#define CONFIG_SYS_MONITOR_LEN (0x100000 + CONFIG_U_BOOT_HDR_SIZE)
+#else
+#define CONFIG_SYS_MONITOR_LEN 0x100000
+#endif /* ifdef CONFIG_SECURE_BOOT */
#endif
/* NAND SPL */
--
GitLab
From 762f92a60e1f02c2597500766f86e4e3fb145b21 Mon Sep 17 00:00:00 2001
From: Ruchika Gupta <ruchika.gupta@nxp.com>
Date: Mon, 17 Apr 2017 18:07:18 +0530
Subject: [PATCH 047/282] arm: ls1043ardb: Add NAND secure boot target
Add NAND secure boot target for ls1043ardb.
- Change the u-boot size defined by a macro for copying the main
U-Boot by SPL to also include the u-boot Secure Boot header size as
header is appended to u-boot image. So header will also be copied
from SD to DDR.
- MACRO for CONFIG_BOOTSCRIPT_COPY_RAM is enabled to copy Bootscript
from NAND to DDR. Offsets for Bootscript on NAND and DDR have been
also defined.
Signed-off-by: Vinitha Pillai <vinitha.pillai@nxp.com>
Signed-off-by: Sumit Garg <sumit.garg@nxp.com>
Signed-off-by: Ruchika Gupta <ruchika.gupta@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
---
arch/arm/include/asm/fsl_secure_boot.h | 7 ++-
board/freescale/ls1043ardb/MAINTAINERS | 1 +
configs/ls1043ardb_nand_SECURE_BOOT_defconfig | 57 +++++++++++++++++++
include/config_fsl_chain_trust.h | 9 +--
include/configs/ls1043a_common.h | 18 +++++-
include/configs/ls1043ardb.h | 2 +-
6 files changed, 87 insertions(+), 7 deletions(-)
create mode 100644 configs/ls1043ardb_nand_SECURE_BOOT_defconfig
diff --git a/arch/arm/include/asm/fsl_secure_boot.h b/arch/arm/include/asm/fsl_secure_boot.h
index 1ca5f42ed61..1fd09f205ae 100644
--- a/arch/arm/include/asm/fsl_secure_boot.h
+++ b/arch/arm/include/asm/fsl_secure_boot.h
@@ -70,7 +70,7 @@
/* Copying Bootscript and Header to DDR from NOR for LS2 and for rest, from
* Non-XIP Memory (Nand/SD)*/
#if defined(CONFIG_SYS_RAMBOOT) || defined(CONFIG_FSL_LSCH3) || \
- defined(CONFIG_SD_BOOT)
+ defined(CONFIG_SD_BOOT) || defined(CONFIG_NAND_BOOT)
#define CONFIG_BOOTSCRIPT_COPY_RAM
#endif
/* The address needs to be modified according to NOR, NAND, SD and
@@ -96,6 +96,11 @@
#define CONFIG_BS_ADDR_DEVICE 0x00000940
#define CONFIG_BS_HDR_SIZE 0x00000010
#define CONFIG_BS_SIZE 0x00000008
+#elif defined(CONFIG_NAND_BOOT)
+#define CONFIG_BS_HDR_ADDR_DEVICE 0x00800000
+#define CONFIG_BS_ADDR_DEVICE 0x00802000
+#define CONFIG_BS_HDR_SIZE 0x00002000
+#define CONFIG_BS_SIZE 0x00001000
#elif defined(CONFIG_QSPI_BOOT)
#ifdef CONFIG_ARCH_LS1046A
#define CONFIG_BS_HDR_ADDR_DEVICE 0x40780000
diff --git a/board/freescale/ls1043ardb/MAINTAINERS b/board/freescale/ls1043ardb/MAINTAINERS
index 8b69892bbbc..87aa006455c 100644
--- a/board/freescale/ls1043ardb/MAINTAINERS
+++ b/board/freescale/ls1043ardb/MAINTAINERS
@@ -13,3 +13,4 @@ M: Ruchika Gupta <ruchika.gupta@nxp.com>
S: Maintained
F: configs/ls1043ardb_SECURE_BOOT_defconfig
F: configs/ls1043ardb_sdcard_SECURE_BOOT_defconfig
+F: configs/ls1043ardb_nand_SECURE_BOOT_defconfig
diff --git a/configs/ls1043ardb_nand_SECURE_BOOT_defconfig b/configs/ls1043ardb_nand_SECURE_BOOT_defconfig
new file mode 100644
index 00000000000..66c89fa5320
--- /dev/null
+++ b/configs/ls1043ardb_nand_SECURE_BOOT_defconfig
@@ -0,0 +1,57 @@
+CONFIG_ARM=y
+CONFIG_TARGET_LS1043ARDB=y
+CONFIG_SPL_LIBCOMMON_SUPPORT=y
+CONFIG_SPL_LIBGENERIC_SUPPORT=y
+CONFIG_SPL_NAND_SUPPORT=y
+CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_ENV_SUPPORT=y
+CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
+CONFIG_SPL_WATCHDOG_SUPPORT=y
+CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1043a-rdb"
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPL_FSL_PBL,NAND_BOOT"
+CONFIG_NAND_BOOT=y
+CONFIG_SECURE_BOOT=y
+CONFIG_BOOTDELAY=10
+CONFIG_SPL=y
+CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y
+CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0xf0
+CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
+CONFIG_HUSH_PARSER=y
+CONFIG_CMD_GPT=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_SF=y
+CONFIG_CMD_I2C=y
+CONFIG_CMD_USB=y
+CONFIG_CMD_DHCP=y
+CONFIG_CMD_PXE=y
+CONFIG_CMD_MII=y
+CONFIG_CMD_PING=y
+CONFIG_CMD_CACHE=y
+CONFIG_CMD_EXT2=y
+CONFIG_CMD_FAT=y
+# CONFIG_SPL_EFI_PARTITION is not set
+CONFIG_OF_CONTROL=y
+CONFIG_DM=y
+CONFIG_SPL_DM=y
+CONFIG_MTD_NOR_FLASH=y
+CONFIG_SPI_FLASH=y
+CONFIG_NETDEVICES=y
+CONFIG_E1000=y
+CONFIG_PCI=y
+CONFIG_DM_PCI=y
+CONFIG_DM_PCI_COMPAT=y
+CONFIG_PCIE_LAYERSCAPE=y
+CONFIG_SYS_NS16550=y
+CONFIG_DM_SPI=y
+CONFIG_USB=y
+CONFIG_DM_USB=y
+CONFIG_USB_XHCI_HCD=y
+CONFIG_USB_XHCI_DWC3=y
+CONFIG_USB_STORAGE=y
+CONFIG_RSA=y
+CONFIG_SPL_RSA=y
+CONFIG_SPL_CRYPTO_SUPPORT=y
+CONFIG_SPL_HASH_SUPPORT=y
diff --git a/include/config_fsl_chain_trust.h b/include/config_fsl_chain_trust.h
index eb45e9851f0..40d323e0044 100644
--- a/include/config_fsl_chain_trust.h
+++ b/include/config_fsl_chain_trust.h
@@ -81,17 +81,18 @@
"setenv bs_size " __stringify(CONFIG_BS_SIZE)";"
/* For secure boot flow, default environment used will be used */
-#if defined(CONFIG_SYS_RAMBOOT)
-#if defined(CONFIG_RAMBOOT_NAND)
+#if defined(CONFIG_SYS_RAMBOOT) || defined(CONFIG_NAND_BOOT) || \
+ defined(CONFIG_SD_BOOT)
+#if defined(CONFIG_RAMBOOT_NAND) || defined(CONFIG_NAND_BOOT)
#define CONFIG_BS_COPY_CMD \
"nand read $bs_hdr_ram $bs_hdr_device $bs_hdr_size ;" \
"nand read $bs_ram $bs_device $bs_size ;"
-#endif /* CONFIG_RAMBOOT_NAND */
#elif defined(CONFIG_SD_BOOT)
#define CONFIG_BS_COPY_CMD \
"mmc read $bs_hdr_ram $bs_hdr_device $bs_hdr_size ;" \
"mmc read $bs_ram $bs_device $bs_size ;"
-#else /* CONFIG_SD_BOOT */
+#endif
+#else
#define CONFIG_BS_COPY_CMD \
"cp.b $bs_hdr_device $bs_hdr_ram $bs_hdr_size ;" \
"cp.b $bs_device $bs_ram $bs_size ;"
diff --git a/include/configs/ls1043a_common.h b/include/configs/ls1043a_common.h
index c63c5e3403a..7b1d9bbbed5 100644
--- a/include/configs/ls1043a_common.h
+++ b/include/configs/ls1043a_common.h
@@ -110,7 +110,23 @@
#define CONFIG_SPL_BSS_START_ADDR 0x80100000
#define CONFIG_SYS_SPL_MALLOC_SIZE 0x100000
#define CONFIG_SPL_BSS_MAX_SIZE 0x80000
-#define CONFIG_SYS_MONITOR_LEN 0xa0000
+
+#ifdef CONFIG_SECURE_BOOT
+#define CONFIG_U_BOOT_HDR_SIZE (16 << 10)
+#endif /* ifdef CONFIG_SECURE_BOOT */
+
+#ifdef CONFIG_U_BOOT_HDR_SIZE
+/*
+ * HDR would be appended at end of image and copied to DDR along
+ * with U-Boot image. Here u-boot max. size is 512K. So if binary
+ * size increases then increase this size in case of secure boot as
+ * it uses raw u-boot image instead of fit image.
+ */
+#define CONFIG_SYS_MONITOR_LEN (0x100000 + CONFIG_U_BOOT_HDR_SIZE)
+#else
+#define CONFIG_SYS_MONITOR_LEN 0x100000
+#endif /* ifdef CONFIG_U_BOOT_HDR_SIZE */
+
#endif
/* IFC */
diff --git a/include/configs/ls1043ardb.h b/include/configs/ls1043ardb.h
index ea929d1da01..5e570cd5e8d 100644
--- a/include/configs/ls1043ardb.h
+++ b/include/configs/ls1043ardb.h
@@ -136,7 +136,7 @@
#ifdef CONFIG_NAND_BOOT
#define CONFIG_SPL_PAD_TO 0x20000 /* block aligned */
#define CONFIG_SYS_NAND_U_BOOT_OFFS CONFIG_SPL_PAD_TO
-#define CONFIG_SYS_NAND_U_BOOT_SIZE (640 << 10)
+#define CONFIG_SYS_NAND_U_BOOT_SIZE (1024 << 10)
#endif
/*
--
GitLab
From 511fc86d0b1b603532056c663c22b91056908755 Mon Sep 17 00:00:00 2001
From: Ruchika Gupta <ruchika.gupta@nxp.com>
Date: Mon, 17 Apr 2017 18:07:19 +0530
Subject: [PATCH 048/282] arm: ls1046ardb: Add SD secure boot target
- Add SD secure boot target for ls1046ardb.
- Change the u-boot size defined by a macro for copying the main
U-Boot by SPL to also include the u-boot Secure Boot header size
as header is appended to u-boot image. So header will also be
copied from SD to DDR.
- CONFIG_MAX_SPL_SIZE is limited to 90KB. SPL is copied to OCRAM
(128K) where 32K are reserved for use by boot ROM and 6K for the
header.
- Reduce the size of CAAM driver for SPL Blobification functions
and descriptors, that are not required at the time of SPL are
disabled. Further error code conversion to strings is disabled
for SPL build.
Signed-off-by: Vinitha Pillai <vinitha.pillai@nxp.com>
Signed-off-by: Sumit Garg <sumit.garg@nxp.com>
Signed-off-by: Ruchika Gupta <ruchika.gupta@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
---
arch/arm/include/asm/fsl_secure_boot.h | 2 +-
board/freescale/ls1046ardb/MAINTAINERS | 6 +++
.../ls1046ardb_sdcard_SECURE_BOOT_defconfig | 45 +++++++++++++++++++
drivers/crypto/fsl/jobdesc.c | 4 +-
drivers/crypto/fsl/jr.c | 19 ++++----
include/configs/ls1046a_common.h | 16 ++++++-
6 files changed, 78 insertions(+), 14 deletions(-)
create mode 100644 configs/ls1046ardb_sdcard_SECURE_BOOT_defconfig
diff --git a/arch/arm/include/asm/fsl_secure_boot.h b/arch/arm/include/asm/fsl_secure_boot.h
index 1fd09f205ae..7bff8b7561e 100644
--- a/arch/arm/include/asm/fsl_secure_boot.h
+++ b/arch/arm/include/asm/fsl_secure_boot.h
@@ -88,7 +88,7 @@
/* For SD boot address and size are assigned in terms of sector
* offset and no. of sectors respectively.
*/
-#if defined(CONFIG_LS1043A)
+#if defined(CONFIG_LS1043A) || defined(CONFIG_ARCH_LS1046A)
#define CONFIG_BS_HDR_ADDR_DEVICE 0x00000920
#else
#define CONFIG_BS_HDR_ADDR_DEVICE 0x00000900
diff --git a/board/freescale/ls1046ardb/MAINTAINERS b/board/freescale/ls1046ardb/MAINTAINERS
index 758ff9d5723..79a2290974f 100644
--- a/board/freescale/ls1046ardb/MAINTAINERS
+++ b/board/freescale/ls1046ardb/MAINTAINERS
@@ -8,6 +8,12 @@ F: configs/ls1046ardb_qspi_defconfig
F: configs/ls1046ardb_sdcard_defconfig
F: configs/ls1046ardb_emmc_defconfig
+LS1046A_SECURE_BOOT BOARD
+M: Ruchika Gupta <ruchika.gupta@nxp.com>
+S: Maintained
+F: configs/ls1046ardb_SECURE_BOOT_defconfig
+F: configs/ls1046ardb_sdcard_SECURE_BOOT_defconfig
+
M: Sumit Garg <sumit.garg@nxp.com>
S: Maintained
F: configs/ls1046ardb_qspi_SECURE_BOOT_defconfig
diff --git a/configs/ls1046ardb_sdcard_SECURE_BOOT_defconfig b/configs/ls1046ardb_sdcard_SECURE_BOOT_defconfig
new file mode 100644
index 00000000000..a41ec80d3ad
--- /dev/null
+++ b/configs/ls1046ardb_sdcard_SECURE_BOOT_defconfig
@@ -0,0 +1,45 @@
+CONFIG_ARM=y
+CONFIG_TARGET_LS1046ARDB=y
+CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1046a-rdb"
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPL_FSL_PBL"
+CONFIG_SECURE_BOOT=y
+CONFIG_SD_BOOT=y
+CONFIG_BOOTDELAY=10
+CONFIG_SPL=y
+CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y
+CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x110
+CONFIG_HUSH_PARSER=y
+# CONFIG_CMD_IMLS is not set
+CONFIG_CMD_GPT=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_SF=y
+CONFIG_CMD_I2C=y
+CONFIG_CMD_DHCP=y
+CONFIG_CMD_MII=y
+CONFIG_CMD_PING=y
+CONFIG_CMD_CACHE=y
+CONFIG_CMD_EXT2=y
+CONFIG_CMD_FAT=y
+# CONFIG_SPL_EFI_PARTITION is not set
+CONFIG_OF_CONTROL=y
+CONFIG_DM=y
+CONFIG_SPL_DM=y
+CONFIG_SPI_FLASH=y
+CONFIG_NETDEVICES=y
+CONFIG_E1000=y
+CONFIG_PCI=y
+CONFIG_DM_PCI=y
+CONFIG_DM_PCI_COMPAT=y
+CONFIG_PCIE_LAYERSCAPE=y
+CONFIG_SYS_NS16550=y
+CONFIG_DM_SPI=y
+CONFIG_FSL_QSPI=y
+CONFIG_USB=y
+CONFIG_DM_USB=y
+CONFIG_RSA=y
+CONFIG_SPL_RSA=y
+CONFIG_SPL_CRYPTO_SUPPORT=y
+CONFIG_SPL_HASH_SUPPORT=y
diff --git a/drivers/crypto/fsl/jobdesc.c b/drivers/crypto/fsl/jobdesc.c
index 6125bbb558d..375ff9d0e38 100644
--- a/drivers/crypto/fsl/jobdesc.c
+++ b/drivers/crypto/fsl/jobdesc.c
@@ -204,7 +204,7 @@ void inline_cnstr_jobdesc_hash(uint32_t *desc,
append_store(desc, dma_addr_out, storelen,
LDST_CLASS_2_CCB | LDST_SRCDST_BYTE_CONTEXT);
}
-
+#ifndef CONFIG_SPL_BUILD
void inline_cnstr_jobdesc_blob_encap(uint32_t *desc, uint8_t *key_idnfr,
uint8_t *plain_txt, uint8_t *enc_blob,
uint32_t in_sz)
@@ -252,7 +252,7 @@ void inline_cnstr_jobdesc_blob_decap(uint32_t *desc, uint8_t *key_idnfr,
append_operation(desc, OP_TYPE_DECAP_PROTOCOL | OP_PCLID_BLOB);
}
-
+#endif
/*
* Descriptor to instantiate RNG State Handle 0 in normal mode and
* load the JDKEK, TDKEK and TDSK registers
diff --git a/drivers/crypto/fsl/jr.c b/drivers/crypto/fsl/jr.c
index 1b882291e4f..163e7299610 100644
--- a/drivers/crypto/fsl/jr.c
+++ b/drivers/crypto/fsl/jr.c
@@ -342,7 +342,9 @@ static void desc_done(uint32_t status, void *arg)
{
struct result *x = arg;
x->status = status;
+#ifndef CONFIG_SPL_BUILD
caam_jr_strstatus(status);
+#endif
x->done = 1;
}
@@ -436,7 +438,11 @@ static inline int sec_reset_idx(uint8_t sec_idx)
return 0;
}
-
+int sec_reset(void)
+{
+ return sec_reset_idx(0);
+}
+#ifndef CONFIG_SPL_BUILD
static int instantiate_rng(uint8_t sec_idx)
{
struct result op;
@@ -472,11 +478,6 @@ static int instantiate_rng(uint8_t sec_idx)
return ret;
}
-int sec_reset(void)
-{
- return sec_reset_idx(0);
-}
-
static u8 get_rng_vid(uint8_t sec_idx)
{
ccsr_sec_t *sec = (void *)SEC_ADDR(sec_idx);
@@ -561,7 +562,7 @@ static int rng_init(uint8_t sec_idx)
return ret;
}
-
+#endif
int sec_init_idx(uint8_t sec_idx)
{
ccsr_sec_t *sec = (void *)SEC_ADDR(sec_idx);
@@ -634,7 +635,7 @@ int sec_init_idx(uint8_t sec_idx)
pamu_enable();
#endif
-
+#ifndef CONFIG_SPL_BUILD
if (get_rng_vid(sec_idx) >= 4) {
if (rng_init(sec_idx) < 0) {
printf("SEC%u: RNG instantiation failed\n", sec_idx);
@@ -642,7 +643,7 @@ int sec_init_idx(uint8_t sec_idx)
}
printf("SEC%u: RNG instantiated\n", sec_idx);
}
-
+#endif
return ret;
}
diff --git a/include/configs/ls1046a_common.h b/include/configs/ls1046a_common.h
index 164a5f38841..957ffd36347 100644
--- a/include/configs/ls1046a_common.h
+++ b/include/configs/ls1046a_common.h
@@ -85,7 +85,19 @@
#define CONFIG_SYS_SPL_MALLOC_START (CONFIG_SPL_BSS_START_ADDR + \
CONFIG_SPL_BSS_MAX_SIZE)
#define CONFIG_SYS_SPL_MALLOC_SIZE 0x100000
-#define CONFIG_SYS_MONITOR_LEN 0xa0000
+
+#ifdef CONFIG_SECURE_BOOT
+#define CONFIG_U_BOOT_HDR_SIZE (16 << 10)
+/*
+ * HDR would be appended at end of image and copied to DDR along
+ * with U-Boot image. Here u-boot max. size is 512K. So if binary
+ * size increases then increase this size in case of secure boot as
+ * it uses raw u-boot image instead of fit image.
+ */
+#define CONFIG_SYS_MONITOR_LEN (0x100000 + CONFIG_U_BOOT_HDR_SIZE)
+#else
+#define CONFIG_SYS_MONITOR_LEN 0x100000
+#endif /* ifdef CONFIG_SECURE_BOOT */
#endif
/* NAND SPL */
@@ -105,7 +117,7 @@
#define CONFIG_SPL_NAND_SUPPORT
#define CONFIG_SPL_DRIVERS_MISC_SUPPORT
#define CONFIG_SPL_TEXT_BASE 0x10000000
-#define CONFIG_SPL_MAX_SIZE 0x1d000 /* 116 KiB */
+#define CONFIG_SPL_MAX_SIZE 0x17000 /* 90 KiB */
#define CONFIG_SPL_STACK 0x1001f000
#define CONFIG_SYS_NAND_U_BOOT_DST CONFIG_SYS_TEXT_BASE
#define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE
--
GitLab
From 4a3ab193222d495ad55b3902fde2654489ad767b Mon Sep 17 00:00:00 2001
From: York Sun <york.sun@nxp.com>
Date: Mon, 27 Mar 2017 11:41:01 -0700
Subject: [PATCH 049/282] armv8: ls2080a: Drop macro CONFIG_LS2080A
Use CONFIG_ARCH_LS2080A instead.
Signed-off-by: York Sun <york.sun@nxp.com>
---
arch/arm/cpu/armv8/fsl-layerscape/Makefile | 2 +-
arch/arm/cpu/armv8/fsl-layerscape/cpu.c | 6 +++---
arch/arm/cpu/armv8/fsl-layerscape/lowlevel.S | 2 +-
arch/arm/cpu/armv8/fsl-layerscape/spl.c | 2 +-
arch/arm/include/asm/arch-fsl-layerscape/config.h | 2 +-
arch/arm/include/asm/arch-fsl-layerscape/cpu.h | 2 +-
arch/arm/include/asm/arch-fsl-layerscape/fsl_serdes.h | 2 +-
arch/arm/include/asm/fsl_secure_boot.h | 2 +-
configs/ls2080a_emu_defconfig | 2 +-
configs/ls2080a_simu_defconfig | 2 +-
configs/ls2080aqds_SECURE_BOOT_defconfig | 1 -
configs/ls2080aqds_defconfig | 1 -
configs/ls2080aqds_nand_defconfig | 2 +-
configs/ls2080aqds_qspi_defconfig | 2 +-
configs/ls2080ardb_SECURE_BOOT_defconfig | 1 -
configs/ls2080ardb_defconfig | 1 -
configs/ls2080ardb_nand_defconfig | 2 +-
drivers/crypto/fsl/jr.c | 2 +-
drivers/net/ldpaa_eth/Makefile | 2 +-
include/linux/usb/xhci-fsl.h | 2 +-
scripts/config_whitelist.txt | 1 -
21 files changed, 18 insertions(+), 23 deletions(-)
diff --git a/arch/arm/cpu/armv8/fsl-layerscape/Makefile b/arch/arm/cpu/armv8/fsl-layerscape/Makefile
index c9ab93e3d7c..04354d7063b 100644
--- a/arch/arm/cpu/armv8/fsl-layerscape/Makefile
+++ b/arch/arm/cpu/armv8/fsl-layerscape/Makefile
@@ -22,7 +22,7 @@ obj-$(CONFIG_SYS_HAS_SERDES) += fsl_lsch2_serdes.o
endif
endif
-ifneq ($(CONFIG_LS2080A),)
+ifneq ($(CONFIG_ARCH_LS2080A),)
obj-$(CONFIG_SYS_HAS_SERDES) += ls2080a_serdes.o
endif
diff --git a/arch/arm/cpu/armv8/fsl-layerscape/cpu.c b/arch/arm/cpu/armv8/fsl-layerscape/cpu.c
index d446527616c..c24f3f173c0 100644
--- a/arch/arm/cpu/armv8/fsl-layerscape/cpu.c
+++ b/arch/arm/cpu/armv8/fsl-layerscape/cpu.c
@@ -92,7 +92,7 @@ static inline void early_mmu_setup(void)
static void fix_pcie_mmu_map(void)
{
-#ifdef CONFIG_LS2080A
+#ifdef CONFIG_ARCH_LS2080A
unsigned int i;
u32 svr, ver;
struct ccsr_gur __iomem *gur = (void *)(CONFIG_SYS_FSL_GUTS_ADDR);
@@ -523,7 +523,7 @@ int timer_init(void)
#ifdef CONFIG_FSL_LSCH3
u32 __iomem *cltbenr = (u32 *)CONFIG_SYS_FSL_PMU_CLTBENR;
#endif
-#ifdef CONFIG_LS2080A
+#ifdef CONFIG_ARCH_LS2080A
u32 __iomem *pctbenr = (u32 *)FSL_PMU_PCTBENR_OFFSET;
u32 svr_dev_id;
#endif
@@ -541,7 +541,7 @@ int timer_init(void)
out_le32(cltbenr, 0xf);
#endif
-#ifdef CONFIG_LS2080A
+#ifdef CONFIG_ARCH_LS2080A
/*
* In certain Layerscape SoCs, the clock for each core's
* has an enable bit in the PMU Physical Core Time Base Enable
diff --git a/arch/arm/cpu/armv8/fsl-layerscape/lowlevel.S b/arch/arm/cpu/armv8/fsl-layerscape/lowlevel.S
index a2185f2def2..fa6b6e624a1 100644
--- a/arch/arm/cpu/armv8/fsl-layerscape/lowlevel.S
+++ b/arch/arm/cpu/armv8/fsl-layerscape/lowlevel.S
@@ -76,7 +76,7 @@ ENTRY(lowlevel_init)
#ifdef CONFIG_FSL_LSCH3
/* Set Wuo bit for RN-I 20 */
-#ifdef CONFIG_LS2080A
+#ifdef CONFIG_ARCH_LS2080A
ldr x0, =CCI_AUX_CONTROL_BASE(20)
ldr x1, =0x00000010
bl ccn504_set_aux
diff --git a/arch/arm/cpu/armv8/fsl-layerscape/spl.c b/arch/arm/cpu/armv8/fsl-layerscape/spl.c
index dfacf98e889..eb730e84a46 100644
--- a/arch/arm/cpu/armv8/fsl-layerscape/spl.c
+++ b/arch/arm/cpu/armv8/fsl-layerscape/spl.c
@@ -65,7 +65,7 @@ void board_init_f(ulong dummy)
memset((void *)gd, 0, sizeof(gd_t));
board_early_init_f();
timer_init();
-#ifdef CONFIG_LS2080A
+#ifdef CONFIG_ARCH_LS2080A
env_init();
#endif
get_clocks();
diff --git a/arch/arm/include/asm/arch-fsl-layerscape/config.h b/arch/arm/include/asm/arch-fsl-layerscape/config.h
index 4db11b646e0..fb18440996a 100644
--- a/arch/arm/include/asm/arch-fsl-layerscape/config.h
+++ b/arch/arm/include/asm/arch-fsl-layerscape/config.h
@@ -18,7 +18,7 @@
*/
#define CONFIG_SYS_MEM_RESERVE_SECURE (2048 * 1024) /* 2MB */
-#ifdef CONFIG_LS2080A
+#ifdef CONFIG_ARCH_LS2080A
#define CONFIG_SYS_FSL_CLUSTER_CLOCKS { 1, 1, 4, 4 }
#define SRDS_MAX_LANES 8
#define CONFIG_SYS_PAGE_SIZE 0x10000
diff --git a/arch/arm/include/asm/arch-fsl-layerscape/cpu.h b/arch/arm/include/asm/arch-fsl-layerscape/cpu.h
index bcf3e3863e6..95c3e2fc086 100644
--- a/arch/arm/include/asm/arch-fsl-layerscape/cpu.h
+++ b/arch/arm/include/asm/arch-fsl-layerscape/cpu.h
@@ -249,7 +249,7 @@ static struct mm_region final_map[] = {
PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
PTE_BLOCK_NON_SHARE | PTE_BLOCK_PXN | PTE_BLOCK_UXN
},
-#ifdef CONFIG_LS2080A
+#ifdef CONFIG_ARCH_LS2080A
{ CONFIG_SYS_PCIE4_PHYS_ADDR, CONFIG_SYS_PCIE4_PHYS_ADDR,
CONFIG_SYS_PCIE4_PHYS_SIZE,
PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
diff --git a/arch/arm/include/asm/arch-fsl-layerscape/fsl_serdes.h b/arch/arm/include/asm/arch-fsl-layerscape/fsl_serdes.h
index 70181c5077c..a8f9a505016 100644
--- a/arch/arm/include/asm/arch-fsl-layerscape/fsl_serdes.h
+++ b/arch/arm/include/asm/arch-fsl-layerscape/fsl_serdes.h
@@ -9,7 +9,7 @@
#include <config.h>
-#ifdef CONFIG_LS2080A
+#ifdef CONFIG_ARCH_LS2080A
enum srds_prtcl {
/*
* Nobody will check whether the device 'NONE' has been configured,
diff --git a/arch/arm/include/asm/fsl_secure_boot.h b/arch/arm/include/asm/fsl_secure_boot.h
index 7bff8b7561e..2799a604ffb 100644
--- a/arch/arm/include/asm/fsl_secure_boot.h
+++ b/arch/arm/include/asm/fsl_secure_boot.h
@@ -55,7 +55,7 @@
#define CONFIG_ESBC_ADDR_64BIT
#endif
-#ifdef CONFIG_LS2080A
+#ifdef CONFIG_ARCH_LS2080A
#define CONFIG_EXTRA_ENV \
"setenv fdt_high 0xa0000000;" \
"setenv initrd_high 0xcfffffff;" \
diff --git a/configs/ls2080a_emu_defconfig b/configs/ls2080a_emu_defconfig
index edf76851a30..6211b6b5af2 100644
--- a/configs/ls2080a_emu_defconfig
+++ b/configs/ls2080a_emu_defconfig
@@ -5,7 +5,7 @@ CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
-CONFIG_SYS_EXTRA_OPTIONS="EMU,LS2080A"
+CONFIG_SYS_EXTRA_OPTIONS="EMU"
CONFIG_BOOTDELAY=10
# CONFIG_DISPLAY_BOARDINFO is not set
# CONFIG_CMD_CONSOLE is not set
diff --git a/configs/ls2080a_simu_defconfig b/configs/ls2080a_simu_defconfig
index 5cc9316a20a..b6f7709af2b 100644
--- a/configs/ls2080a_simu_defconfig
+++ b/configs/ls2080a_simu_defconfig
@@ -5,7 +5,7 @@ CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
-CONFIG_SYS_EXTRA_OPTIONS="SIMU, LS2080A"
+CONFIG_SYS_EXTRA_OPTIONS="SIMU"
CONFIG_BOOTDELAY=10
# CONFIG_DISPLAY_BOARDINFO is not set
# CONFIG_CMD_CONSOLE is not set
diff --git a/configs/ls2080aqds_SECURE_BOOT_defconfig b/configs/ls2080aqds_SECURE_BOOT_defconfig
index 6ab9703c45e..45e5d87f361 100644
--- a/configs/ls2080aqds_SECURE_BOOT_defconfig
+++ b/configs/ls2080aqds_SECURE_BOOT_defconfig
@@ -7,7 +7,6 @@ CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
-CONFIG_SYS_EXTRA_OPTIONS="LS2080A"
CONFIG_BOOTDELAY=10
CONFIG_CMD_GREPENV=y
CONFIG_CMD_GPT=y
diff --git a/configs/ls2080aqds_defconfig b/configs/ls2080aqds_defconfig
index fb9a3e4041f..770dea06056 100644
--- a/configs/ls2080aqds_defconfig
+++ b/configs/ls2080aqds_defconfig
@@ -7,7 +7,6 @@ CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
-CONFIG_SYS_EXTRA_OPTIONS="LS2080A"
CONFIG_BOOTDELAY=10
CONFIG_CMD_GREPENV=y
CONFIG_CMD_GPT=y
diff --git a/configs/ls2080aqds_nand_defconfig b/configs/ls2080aqds_nand_defconfig
index 2a649c576d3..aa4f1345586 100644
--- a/configs/ls2080aqds_nand_defconfig
+++ b/configs/ls2080aqds_nand_defconfig
@@ -10,7 +10,7 @@ CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
-CONFIG_SYS_EXTRA_OPTIONS="NAND, LS2080A"
+CONFIG_SYS_EXTRA_OPTIONS="NAND"
CONFIG_BOOTDELAY=10
CONFIG_SPL=y
CONFIG_SPL_ENV_SUPPORT=y
diff --git a/configs/ls2080aqds_qspi_defconfig b/configs/ls2080aqds_qspi_defconfig
index a81e7c69452..6deb0acbd23 100644
--- a/configs/ls2080aqds_qspi_defconfig
+++ b/configs/ls2080aqds_qspi_defconfig
@@ -5,7 +5,7 @@ CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
-CONFIG_SYS_EXTRA_OPTIONS="QSPI_BOOT,LS2080A"
+CONFIG_SYS_EXTRA_OPTIONS="QSPI_BOOT"
CONFIG_QSPI_BOOT=y
CONFIG_BOOTDELAY=10
CONFIG_CMD_GREPENV=y
diff --git a/configs/ls2080ardb_SECURE_BOOT_defconfig b/configs/ls2080ardb_SECURE_BOOT_defconfig
index 70baf0efc8d..19c9db5ae83 100644
--- a/configs/ls2080ardb_SECURE_BOOT_defconfig
+++ b/configs/ls2080ardb_SECURE_BOOT_defconfig
@@ -7,7 +7,6 @@ CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
-CONFIG_SYS_EXTRA_OPTIONS="LS2080A"
CONFIG_BOOTDELAY=10
CONFIG_CMD_GREPENV=y
CONFIG_CMD_GPT=y
diff --git a/configs/ls2080ardb_defconfig b/configs/ls2080ardb_defconfig
index a1e552d69a3..e0cb7f898e7 100644
--- a/configs/ls2080ardb_defconfig
+++ b/configs/ls2080ardb_defconfig
@@ -7,7 +7,6 @@ CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
-CONFIG_SYS_EXTRA_OPTIONS="LS2080A"
CONFIG_BOOTDELAY=10
CONFIG_CMD_GREPENV=y
CONFIG_CMD_GPT=y
diff --git a/configs/ls2080ardb_nand_defconfig b/configs/ls2080ardb_nand_defconfig
index 81987fe6b3a..cd57374a4e7 100644
--- a/configs/ls2080ardb_nand_defconfig
+++ b/configs/ls2080ardb_nand_defconfig
@@ -10,7 +10,7 @@ CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
-CONFIG_SYS_EXTRA_OPTIONS="NAND, LS2080A"
+CONFIG_SYS_EXTRA_OPTIONS="NAND"
CONFIG_BOOTDELAY=10
CONFIG_SPL=y
CONFIG_SPL_ENV_SUPPORT=y
diff --git a/drivers/crypto/fsl/jr.c b/drivers/crypto/fsl/jr.c
index 163e7299610..f4f6c16df7c 100644
--- a/drivers/crypto/fsl/jr.c
+++ b/drivers/crypto/fsl/jr.c
@@ -587,7 +587,7 @@ int sec_init_idx(uint8_t sec_idx)
* For AXI Read - Cacheable, Read allocate
* Only For LS2080a, to solve CAAM coherency issues
*/
-#ifdef CONFIG_LS2080A
+#ifdef CONFIG_ARCH_LS2080A
mcr = (mcr & ~MCFGR_AWCACHE_MASK) | (0xb << MCFGR_AWCACHE_SHIFT);
mcr = (mcr & ~MCFGR_ARCACHE_MASK) | (0x6 << MCFGR_ARCACHE_SHIFT);
#else
diff --git a/drivers/net/ldpaa_eth/Makefile b/drivers/net/ldpaa_eth/Makefile
index 5587aa618df..08675ec6416 100644
--- a/drivers/net/ldpaa_eth/Makefile
+++ b/drivers/net/ldpaa_eth/Makefile
@@ -6,4 +6,4 @@
obj-y += ldpaa_wriop.o
obj-y += ldpaa_eth.o
-obj-$(CONFIG_LS2080A) += ls2080a.o
+obj-$(CONFIG_ARCH_LS2080A) += ls2080a.o
diff --git a/include/linux/usb/xhci-fsl.h b/include/linux/usb/xhci-fsl.h
index 1fa31613bbd..23e5939f3b2 100644
--- a/include/linux/usb/xhci-fsl.h
+++ b/include/linux/usb/xhci-fsl.h
@@ -58,7 +58,7 @@ struct fsl_xhci {
#define CONFIG_SYS_FSL_XHCI_USB1_ADDR CONFIG_SYS_XHCI_USB1_ADDR
#define CONFIG_SYS_FSL_XHCI_USB2_ADDR 0
#define CONFIG_SYS_FSL_XHCI_USB3_ADDR 0
-#elif defined(CONFIG_LS2080A)
+#elif defined(CONFIG_ARCH_LS2080A)
#define CONFIG_SYS_FSL_XHCI_USB1_ADDR CONFIG_SYS_XHCI_USB1_ADDR
#define CONFIG_SYS_FSL_XHCI_USB2_ADDR CONFIG_SYS_XHCI_USB2_ADDR
#define CONFIG_SYS_FSL_XHCI_USB3_ADDR 0
diff --git a/scripts/config_whitelist.txt b/scripts/config_whitelist.txt
index d487be72ffd..dd8abc0de19 100644
--- a/scripts/config_whitelist.txt
+++ b/scripts/config_whitelist.txt
@@ -1700,7 +1700,6 @@ CONFIG_LQ038J7DH53
CONFIG_LS102XA
CONFIG_LS102XA_STREAM_ID
CONFIG_LS1043A
-CONFIG_LS2080A
CONFIG_LSCHLV2
CONFIG_LSXHL
CONFIG_LUAN
--
GitLab
From c1303bfd7e14f5ee451f6aafeeca2d87ac1255d6 Mon Sep 17 00:00:00 2001
From: York Sun <york.sun@nxp.com>
Date: Mon, 27 Mar 2017 11:41:02 -0700
Subject: [PATCH 050/282] armv8: ls1043a: Drop macro CONFIG_LS1043A
Use CONFIG_ARCH_LS1043A instead.
Signed-off-by: York Sun <york.sun@nxp.com>
---
arch/arm/cpu/armv8/fsl-layerscape/Makefile | 2 +-
arch/arm/include/asm/arch-fsl-layerscape/config.h | 2 +-
arch/arm/include/asm/fsl_secure_boot.h | 2 +-
drivers/net/fm/Makefile | 2 +-
include/configs/ls1043a_common.h | 1 -
include/linux/usb/xhci-fsl.h | 2 +-
scripts/config_whitelist.txt | 1 -
7 files changed, 5 insertions(+), 7 deletions(-)
diff --git a/arch/arm/cpu/armv8/fsl-layerscape/Makefile b/arch/arm/cpu/armv8/fsl-layerscape/Makefile
index 04354d7063b..e3ce0184d89 100644
--- a/arch/arm/cpu/armv8/fsl-layerscape/Makefile
+++ b/arch/arm/cpu/armv8/fsl-layerscape/Makefile
@@ -26,7 +26,7 @@ ifneq ($(CONFIG_ARCH_LS2080A),)
obj-$(CONFIG_SYS_HAS_SERDES) += ls2080a_serdes.o
endif
-ifneq ($(CONFIG_LS1043A),)
+ifneq ($(CONFIG_ARCH_LS1043A),)
obj-$(CONFIG_SYS_HAS_SERDES) += ls1043a_serdes.o
obj-$(CONFIG_ARMV8_PSCI) += ls1043a_psci.o
endif
diff --git a/arch/arm/include/asm/arch-fsl-layerscape/config.h b/arch/arm/include/asm/arch-fsl-layerscape/config.h
index fb18440996a..93e6597d9e0 100644
--- a/arch/arm/include/asm/arch-fsl-layerscape/config.h
+++ b/arch/arm/include/asm/arch-fsl-layerscape/config.h
@@ -132,7 +132,7 @@
#define CONFIG_SYS_FSL_PEX_LUT_BE
/* SoC related */
-#ifdef CONFIG_LS1043A
+#ifdef CONFIG_ARCH_LS1043A
#define CONFIG_SYS_FMAN_V3
#define CONFIG_SYS_NUM_FMAN 1
#define CONFIG_SYS_NUM_FM1_DTSEC 7
diff --git a/arch/arm/include/asm/fsl_secure_boot.h b/arch/arm/include/asm/fsl_secure_boot.h
index 2799a604ffb..f5ca5d3b697 100644
--- a/arch/arm/include/asm/fsl_secure_boot.h
+++ b/arch/arm/include/asm/fsl_secure_boot.h
@@ -88,7 +88,7 @@
/* For SD boot address and size are assigned in terms of sector
* offset and no. of sectors respectively.
*/
-#if defined(CONFIG_LS1043A) || defined(CONFIG_ARCH_LS1046A)
+#if defined(CONFIG_ARCH_LS1043A) || defined(CONFIG_ARCH_LS1046A)
#define CONFIG_BS_HDR_ADDR_DEVICE 0x00000920
#else
#define CONFIG_BS_HDR_ADDR_DEVICE 0x00000900
diff --git a/drivers/net/fm/Makefile b/drivers/net/fm/Makefile
index fa96bad902d..fc7a6da03bc 100644
--- a/drivers/net/fm/Makefile
+++ b/drivers/net/fm/Makefile
@@ -34,5 +34,5 @@ obj-$(CONFIG_ARCH_T4240) += t4240.o
obj-$(CONFIG_ARCH_T4160) += t4240.o
obj-$(CONFIG_ARCH_B4420) += b4860.o
obj-$(CONFIG_ARCH_B4860) += b4860.o
-obj-$(CONFIG_LS1043A) += ls1043.o
+obj-$(CONFIG_ARCH_LS1043A) += ls1043.o
obj-$(CONFIG_ARCH_LS1046A) += ls1046.o
diff --git a/include/configs/ls1043a_common.h b/include/configs/ls1043a_common.h
index 7b1d9bbbed5..e26924877d1 100644
--- a/include/configs/ls1043a_common.h
+++ b/include/configs/ls1043a_common.h
@@ -28,7 +28,6 @@
#define CONFIG_REMAKE_ELF
#define CONFIG_FSL_LAYERSCAPE
-#define CONFIG_LS1043A
#define CONFIG_MP
#define CONFIG_GICV2
diff --git a/include/linux/usb/xhci-fsl.h b/include/linux/usb/xhci-fsl.h
index 23e5939f3b2..e0dff30f380 100644
--- a/include/linux/usb/xhci-fsl.h
+++ b/include/linux/usb/xhci-fsl.h
@@ -62,7 +62,7 @@ struct fsl_xhci {
#define CONFIG_SYS_FSL_XHCI_USB1_ADDR CONFIG_SYS_XHCI_USB1_ADDR
#define CONFIG_SYS_FSL_XHCI_USB2_ADDR CONFIG_SYS_XHCI_USB2_ADDR
#define CONFIG_SYS_FSL_XHCI_USB3_ADDR 0
-#elif defined(CONFIG_LS1043A) || defined(CONFIG_ARCH_LS1046A)
+#elif defined(CONFIG_ARCH_LS1043A) || defined(CONFIG_ARCH_LS1046A)
#define CONFIG_SYS_FSL_XHCI_USB1_ADDR CONFIG_SYS_XHCI_USB1_ADDR
#define CONFIG_SYS_FSL_XHCI_USB2_ADDR CONFIG_SYS_XHCI_USB2_ADDR
#define CONFIG_SYS_FSL_XHCI_USB3_ADDR CONFIG_SYS_XHCI_USB3_ADDR
diff --git a/scripts/config_whitelist.txt b/scripts/config_whitelist.txt
index dd8abc0de19..b7b7a24d54b 100644
--- a/scripts/config_whitelist.txt
+++ b/scripts/config_whitelist.txt
@@ -1699,7 +1699,6 @@ CONFIG_LPUART_32B_REG
CONFIG_LQ038J7DH53
CONFIG_LS102XA
CONFIG_LS102XA_STREAM_ID
-CONFIG_LS1043A
CONFIG_LSCHLV2
CONFIG_LSXHL
CONFIG_LUAN
--
GitLab
From 73fb583829efb296ecdddb08c426e2261cb84d0a Mon Sep 17 00:00:00 2001
From: York Sun <york.sun@nxp.com>
Date: Mon, 27 Mar 2017 11:41:03 -0700
Subject: [PATCH 051/282] armv7: ls1021a: Drop macro CONFIG_LS102XA
Use CONFIG_ARCH_LS1021A instead.
Signed-off-by: York Sun <york.sun@nxp.com>
---
arch/arm/cpu/armv7/Makefile | 2 +-
arch/arm/dts/Makefile | 2 +-
arch/arm/include/asm/arch-ls102xa/config.h | 2 +-
arch/arm/include/asm/config.h | 2 +-
board/freescale/common/arm_sleep.c | 6 +++---
board/freescale/common/fsl_chain_of_trust.c | 2 +-
board/freescale/common/fsl_validate.c | 2 +-
drivers/i2c/mxc_i2c.c | 2 +-
drivers/qe/qe.c | 6 +++---
drivers/usb/common/fsl-errata.c | 2 +-
include/configs/ls1021aiot.h | 2 --
include/configs/ls1021aqds.h | 2 --
include/configs/ls1021atwr.h | 2 --
include/fsl_errata.h | 4 ++--
include/linux/immap_qe.h | 2 +-
include/linux/usb/xhci-fsl.h | 2 +-
include/tsec.h | 2 +-
include/usb/ehci-ci.h | 2 +-
scripts/config_whitelist.txt | 1 -
19 files changed, 20 insertions(+), 27 deletions(-)
diff --git a/arch/arm/cpu/armv7/Makefile b/arch/arm/cpu/armv7/Makefile
index 02e8778be5b..999ab47065a 100644
--- a/arch/arm/cpu/armv7/Makefile
+++ b/arch/arm/cpu/armv7/Makefile
@@ -12,7 +12,7 @@ obj-y += cache_v7.o cache_v7_asm.o
obj-y += cpu.o cp15.o
obj-y += syslib.o
-ifneq ($(CONFIG_AM43XX)$(CONFIG_AM33XX)$(CONFIG_OMAP44XX)$(CONFIG_OMAP54XX)$(CONFIG_TEGRA)$(CONFIG_MX6)$(CONFIG_MX7)$(CONFIG_TI81XX)$(CONFIG_AT91FAMILY)$(CONFIG_ARCH_SUNXI)$(CONFIG_ARCH_SOCFPGA)$(CONFIG_ARCH_MX7ULP)$(CONFIG_LS102XA),)
+ifneq ($(CONFIG_AM43XX)$(CONFIG_AM33XX)$(CONFIG_OMAP44XX)$(CONFIG_OMAP54XX)$(CONFIG_TEGRA)$(CONFIG_MX6)$(CONFIG_MX7)$(CONFIG_TI81XX)$(CONFIG_AT91FAMILY)$(CONFIG_ARCH_SUNXI)$(CONFIG_ARCH_SOCFPGA)$(CONFIG_ARCH_MX7ULP)$(CONFIG_ARCH_LS1021A),)
ifneq ($(CONFIG_SKIP_LOWLEVEL_INIT),y)
obj-y += lowlevel_init.o
endif
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index 68d2791c155..0ee42818f6b 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -166,7 +166,7 @@ dtb-$(CONFIG_TARGET_AM57XX_EVM) += am57xx-beagle-x15.dtb \
am571x-idk.dtb
dtb-$(CONFIG_TARGET_STV0991) += stv0991.dtb
-dtb-$(CONFIG_LS102XA) += ls1021a-qds-duart.dtb \
+dtb-$(CONFIG_ARCH_LS1021A) += ls1021a-qds-duart.dtb \
ls1021a-qds-lpuart.dtb \
ls1021a-twr-duart.dtb ls1021a-twr-lpuart.dtb \
ls1021a-iot-duart.dtb
diff --git a/arch/arm/include/asm/arch-ls102xa/config.h b/arch/arm/include/asm/arch-ls102xa/config.h
index 2f7233f2feb..5c4da0f0e35 100644
--- a/arch/arm/include/asm/arch-ls102xa/config.h
+++ b/arch/arm/include/asm/arch-ls102xa/config.h
@@ -108,7 +108,7 @@
#define DCU_LAYER_MAX_NUM 16
-#ifdef CONFIG_LS102XA
+#ifdef CONFIG_ARCH_LS1021A
#define CONFIG_USB_MAX_CONTROLLER_COUNT 1
#define CONFIG_SYS_FSL_MAX_NUM_OF_SEC 1
#else
diff --git a/arch/arm/include/asm/config.h b/arch/arm/include/asm/config.h
index 1ad221a9876..5674d37c04d 100644
--- a/arch/arm/include/asm/config.h
+++ b/arch/arm/include/asm/config.h
@@ -14,7 +14,7 @@
#define CONFIG_STATIC_RELA
#endif
-#if defined(CONFIG_LS102XA) || \
+#if defined(CONFIG_ARCH_LS1021A) || \
defined(CONFIG_CPU_PXA27X) || \
defined(CONFIG_CPU_MONAHANS) || \
defined(CONFIG_CPU_PXA25X) || \
diff --git a/board/freescale/common/arm_sleep.c b/board/freescale/common/arm_sleep.c
index 16fd445306e..6ed5d9ef1fa 100644
--- a/board/freescale/common/arm_sleep.c
+++ b/board/freescale/common/arm_sleep.c
@@ -13,7 +13,7 @@
#endif
#include <asm/armv7.h>
-#if defined(CONFIG_LS102XA)
+#if defined(CONFIG_ARCH_LS1021A)
#include <asm/arch/immap_ls102xa.h>
#endif
@@ -66,7 +66,7 @@ static void dp_ddr_restore(void)
*dst++ = *src++;
}
-#if defined(CONFIG_ARMV7_PSCI) && defined(CONFIG_LS102XA)
+#if defined(CONFIG_ARMV7_PSCI) && defined(CONFIG_ARCH_LS1021A)
void ls1_psci_resume_fixup(void)
{
u32 tmp;
@@ -104,7 +104,7 @@ static void dp_resume_prepare(void)
#ifdef CONFIG_U_QE
u_qe_resume();
#endif
-#if defined(CONFIG_ARMV7_PSCI) && defined(CONFIG_LS102XA)
+#if defined(CONFIG_ARMV7_PSCI) && defined(CONFIG_ARCH_LS1021A)
ls1_psci_resume_fixup();
#endif
}
diff --git a/board/freescale/common/fsl_chain_of_trust.c b/board/freescale/common/fsl_chain_of_trust.c
index 438e7819576..aad1b93d140 100644
--- a/board/freescale/common/fsl_chain_of_trust.c
+++ b/board/freescale/common/fsl_chain_of_trust.c
@@ -22,7 +22,7 @@
#include <asm/fsl_pamu.h>
#endif
-#ifdef CONFIG_LS102XA
+#ifdef CONFIG_ARCH_LS1021A
#include <asm/arch/immap_ls102xa.h>
#endif
diff --git a/board/freescale/common/fsl_validate.c b/board/freescale/common/fsl_validate.c
index 125655a37a2..ed48c5c8bd7 100644
--- a/board/freescale/common/fsl_validate.c
+++ b/board/freescale/common/fsl_validate.c
@@ -15,7 +15,7 @@
#include <u-boot/rsa-mod-exp.h>
#include <hash.h>
#include <fsl_secboot_err.h>
-#ifdef CONFIG_LS102XA
+#ifdef CONFIG_ARCH_LS1021A
#include <asm/arch/immap_ls102xa.h>
#endif
diff --git a/drivers/i2c/mxc_i2c.c b/drivers/i2c/mxc_i2c.c
index eb789f5bff4..13ec0e63b10 100644
--- a/drivers/i2c/mxc_i2c.c
+++ b/drivers/i2c/mxc_i2c.c
@@ -589,7 +589,7 @@ static int bus_i2c_write(struct mxc_i2c_bus *i2c_bus, u8 chip, u32 addr,
#endif
static struct mxc_i2c_bus mxc_i2c_buses[] = {
-#if defined(CONFIG_LS102XA) || defined(CONFIG_VF610) || \
+#if defined(CONFIG_ARCH_LS1021A) || defined(CONFIG_VF610) || \
defined(CONFIG_FSL_LAYERSCAPE)
{ 0, I2C1_BASE_ADDR, I2C_QUIRK_FLAG },
{ 1, I2C2_BASE_ADDR, I2C_QUIRK_FLAG },
diff --git a/drivers/qe/qe.c b/drivers/qe/qe.c
index 4231594776a..4f0a27892f2 100644
--- a/drivers/qe/qe.c
+++ b/drivers/qe/qe.c
@@ -13,7 +13,7 @@
#include <asm/io.h>
#include <linux/immap_qe.h>
#include <fsl_qe.h>
-#ifdef CONFIG_LS102XA
+#ifdef CONFIG_ARCH_LS1021A
#include <asm/arch/immap_ls102xa.h>
#endif
@@ -355,7 +355,7 @@ int qe_upload_firmware(const struct qe_firmware *firmware)
size_t length;
const struct qe_header *hdr;
#ifdef CONFIG_DEEP_SLEEP
-#ifdef CONFIG_LS102XA
+#ifdef CONFIG_ARCH_LS1021A
struct ccsr_gur __iomem *gur = (void *)CONFIG_SYS_FSL_GUTS_ADDR;
#else
ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR);
@@ -494,7 +494,7 @@ int u_qe_upload_firmware(const struct qe_firmware *firmware)
size_t length;
const struct qe_header *hdr;
#ifdef CONFIG_DEEP_SLEEP
-#ifdef CONFIG_LS102XA
+#ifdef CONFIG_ARCH_LS1021A
struct ccsr_gur __iomem *gur = (void *)CONFIG_SYS_FSL_GUTS_ADDR;
#else
ccsr_gur_t __iomem *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR);
diff --git a/drivers/usb/common/fsl-errata.c b/drivers/usb/common/fsl-errata.c
index 6069c935c12..338ac08d8a7 100644
--- a/drivers/usb/common/fsl-errata.c
+++ b/drivers/usb/common/fsl-errata.c
@@ -204,7 +204,7 @@ bool has_erratum_a010151(void)
case SVR_LS1043A:
return IS_SVR_REV(svr, 1, 0) || IS_SVR_REV(svr, 1, 1);
#endif
-#ifdef CONFIG_LS102XA
+#ifdef CONFIG_ARCH_LS1021A
case SOC_VER_LS1020:
case SOC_VER_LS1021:
case SOC_VER_LS1022:
diff --git a/include/configs/ls1021aiot.h b/include/configs/ls1021aiot.h
index d8bbc802d2d..35d17b96f4a 100644
--- a/include/configs/ls1021aiot.h
+++ b/include/configs/ls1021aiot.h
@@ -7,8 +7,6 @@
#ifndef __CONFIG_H
#define __CONFIG_H
-#define CONFIG_LS102XA
-
#define CONFIG_ARMV7_SECURE_BASE OCRAM_BASE_S_ADDR
#define CONFIG_SYS_FSL_CLK
diff --git a/include/configs/ls1021aqds.h b/include/configs/ls1021aqds.h
index 97b81274b05..c3224c8c3f4 100644
--- a/include/configs/ls1021aqds.h
+++ b/include/configs/ls1021aqds.h
@@ -7,8 +7,6 @@
#ifndef __CONFIG_H
#define __CONFIG_H
-#define CONFIG_LS102XA
-
#define CONFIG_ARMV7_PSCI_1_0
#define CONFIG_ARMV7_SECURE_BASE OCRAM_BASE_S_ADDR
diff --git a/include/configs/ls1021atwr.h b/include/configs/ls1021atwr.h
index a60b4b29902..1d0b4698bbf 100644
--- a/include/configs/ls1021atwr.h
+++ b/include/configs/ls1021atwr.h
@@ -7,8 +7,6 @@
#ifndef __CONFIG_H
#define __CONFIG_H
-#define CONFIG_LS102XA
-
#define CONFIG_ARMV7_PSCI_1_0
#define CONFIG_ARMV7_SECURE_BASE OCRAM_BASE_S_ADDR
diff --git a/include/fsl_errata.h b/include/fsl_errata.h
index 8441f91029c..89051aa7412 100644
--- a/include/fsl_errata.h
+++ b/include/fsl_errata.h
@@ -10,7 +10,7 @@
#include <common.h>
#if defined(CONFIG_PPC)
#include <asm/processor.h>
-#elif defined(CONFIG_LS102XA)
+#elif defined(CONFIG_ARCH_LS1021A)
#include <asm/arch-ls102xa/immap_ls102xa.h>
#elif defined(CONFIG_FSL_LAYERSCAPE)
#include <asm/arch/soc.h>
@@ -66,7 +66,7 @@ static inline bool has_erratum_a008378(void)
switch (soc) {
-#ifdef CONFIG_LS102XA
+#ifdef CONFIG_ARCH_LS1021A
case SOC_VER_LS1020:
case SOC_VER_LS1021:
case SOC_VER_LS1022:
diff --git a/include/linux/immap_qe.h b/include/linux/immap_qe.h
index 6d1f88ec2e1..d952efa8f45 100644
--- a/include/linux/immap_qe.h
+++ b/include/linux/immap_qe.h
@@ -24,7 +24,7 @@
#endif
#endif
-#ifdef CONFIG_LS102XA
+#ifdef CONFIG_ARCH_LS1021A
#define QE_MURAM_SIZE 0x6000UL
#define MAX_QE_RISC 1
#define QE_NUM_OF_SNUM 28
diff --git a/include/linux/usb/xhci-fsl.h b/include/linux/usb/xhci-fsl.h
index e0dff30f380..bd54089722f 100644
--- a/include/linux/usb/xhci-fsl.h
+++ b/include/linux/usb/xhci-fsl.h
@@ -54,7 +54,7 @@ struct fsl_xhci {
struct dwc3 *dwc3_reg;
};
-#if defined(CONFIG_LS102XA) || defined(CONFIG_ARCH_LS1012A)
+#if defined(CONFIG_ARCH_LS1021A) || defined(CONFIG_ARCH_LS1012A)
#define CONFIG_SYS_FSL_XHCI_USB1_ADDR CONFIG_SYS_XHCI_USB1_ADDR
#define CONFIG_SYS_FSL_XHCI_USB2_ADDR 0
#define CONFIG_SYS_FSL_XHCI_USB3_ADDR 0
diff --git a/include/tsec.h b/include/tsec.h
index fb27edf2250..e99a7fa8782 100644
--- a/include/tsec.h
+++ b/include/tsec.h
@@ -20,7 +20,7 @@
#ifndef CONFIG_DM_ETH
-#ifdef CONFIG_LS102XA
+#ifdef CONFIG_ARCH_LS1021A
#define TSEC_SIZE 0x40000
#define TSEC_MDIO_OFFSET 0x40000
#else
diff --git a/include/usb/ehci-ci.h b/include/usb/ehci-ci.h
index 882aed4a5f0..8f3437a208c 100644
--- a/include/usb/ehci-ci.h
+++ b/include/usb/ehci-ci.h
@@ -159,7 +159,7 @@
#elif defined(CONFIG_MPC512X)
#define CONFIG_SYS_FSL_USB1_ADDR CONFIG_SYS_MPC512x_USB1_ADDR
#define CONFIG_SYS_FSL_USB2_ADDR 0
-#elif defined(CONFIG_LS102XA)
+#elif defined(CONFIG_ARCH_LS1021A)
#define CONFIG_SYS_FSL_USB1_ADDR CONFIG_SYS_EHCI_USB1_ADDR
#define CONFIG_SYS_FSL_USB2_ADDR 0
#endif
diff --git a/scripts/config_whitelist.txt b/scripts/config_whitelist.txt
index b7b7a24d54b..5e515d215c1 100644
--- a/scripts/config_whitelist.txt
+++ b/scripts/config_whitelist.txt
@@ -1697,7 +1697,6 @@ CONFIG_LPC_IO_BASE
CONFIG_LPUART
CONFIG_LPUART_32B_REG
CONFIG_LQ038J7DH53
-CONFIG_LS102XA
CONFIG_LS102XA_STREAM_ID
CONFIG_LSCHLV2
CONFIG_LSXHL
--
GitLab
From 6f04976ffbe0ea77087fe1c362c8d20025c75294 Mon Sep 17 00:00:00 2001
From: tang yuantian <andy.tang@nxp.com>
Date: Fri, 10 Mar 2017 14:49:25 +0800
Subject: [PATCH 052/282] armv8: ls1046aqds: enable ppa in default config
Signed-off-by: Tang Yuantian <andy.tang@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
---
configs/ls1046aqds_defconfig | 1 +
configs/ls1046aqds_lpuart_defconfig | 1 +
configs/ls1046aqds_nand_defconfig | 1 +
configs/ls1046aqds_qspi_defconfig | 1 +
configs/ls1046aqds_sdcard_ifc_defconfig | 1 +
configs/ls1046aqds_sdcard_qspi_defconfig | 1 +
6 files changed, 6 insertions(+)
diff --git a/configs/ls1046aqds_defconfig b/configs/ls1046aqds_defconfig
index 66b4fd1c9ff..b9329337eca 100644
--- a/configs/ls1046aqds_defconfig
+++ b/configs/ls1046aqds_defconfig
@@ -36,3 +36,4 @@ CONFIG_DM_SPI=y
CONFIG_FSL_DSPI=y
CONFIG_USB=y
CONFIG_DM_USB=y
+CONFIG_FSL_LS_PPA=y
diff --git a/configs/ls1046aqds_lpuart_defconfig b/configs/ls1046aqds_lpuart_defconfig
index 85ef8e0ff26..c282a64da67 100644
--- a/configs/ls1046aqds_lpuart_defconfig
+++ b/configs/ls1046aqds_lpuart_defconfig
@@ -32,3 +32,4 @@ CONFIG_DM_SPI=y
CONFIG_FSL_DSPI=y
CONFIG_USB=y
CONFIG_DM_USB=y
+CONFIG_FSL_LS_PPA=y
diff --git a/configs/ls1046aqds_nand_defconfig b/configs/ls1046aqds_nand_defconfig
index f0730b626af..923d41755e3 100644
--- a/configs/ls1046aqds_nand_defconfig
+++ b/configs/ls1046aqds_nand_defconfig
@@ -41,3 +41,4 @@ CONFIG_DM_SPI=y
CONFIG_FSL_DSPI=y
CONFIG_USB=y
CONFIG_DM_USB=y
+CONFIG_FSL_LS_PPA=y
diff --git a/configs/ls1046aqds_qspi_defconfig b/configs/ls1046aqds_qspi_defconfig
index 6520cebd5dd..5d7da728d26 100644
--- a/configs/ls1046aqds_qspi_defconfig
+++ b/configs/ls1046aqds_qspi_defconfig
@@ -38,3 +38,4 @@ CONFIG_FSL_DSPI=y
CONFIG_FSL_QSPI=y
CONFIG_USB=y
CONFIG_DM_USB=y
+CONFIG_FSL_LS_PPA=y
diff --git a/configs/ls1046aqds_sdcard_ifc_defconfig b/configs/ls1046aqds_sdcard_ifc_defconfig
index 16bb94dc2f6..7e8f1a18f3c 100644
--- a/configs/ls1046aqds_sdcard_ifc_defconfig
+++ b/configs/ls1046aqds_sdcard_ifc_defconfig
@@ -42,3 +42,4 @@ CONFIG_DM_SPI=y
CONFIG_FSL_DSPI=y
CONFIG_USB=y
CONFIG_DM_USB=y
+CONFIG_FSL_LS_PPA=y
diff --git a/configs/ls1046aqds_sdcard_qspi_defconfig b/configs/ls1046aqds_sdcard_qspi_defconfig
index 9e78115e2de..1707bc4a637 100644
--- a/configs/ls1046aqds_sdcard_qspi_defconfig
+++ b/configs/ls1046aqds_sdcard_qspi_defconfig
@@ -43,3 +43,4 @@ CONFIG_FSL_DSPI=y
CONFIG_FSL_QSPI=y
CONFIG_USB=y
CONFIG_DM_USB=y
+CONFIG_FSL_LS_PPA=y
--
GitLab
From fb806ad61f8ff10f3abb14dfadfe0f8989665445 Mon Sep 17 00:00:00 2001
From: Shengzhou Liu <Shengzhou.Liu@nxp.com>
Date: Thu, 23 Mar 2017 18:14:40 +0800
Subject: [PATCH 053/282] arm64/ls1046a: Enable ERRATUM_A008850 for ls1046a SoC
Signed-off-by: Shengzhou Liu <Shengzhou.Liu@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
---
arch/arm/cpu/armv8/fsl-layerscape/Kconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig
index 9fb76f00ed8..2562f4a3651 100644
--- a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig
+++ b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig
@@ -36,6 +36,7 @@ config ARCH_LS1046A
select SYS_FSL_DDR_VER_50
select SYS_FSL_ERRATUM_A008336
select SYS_FSL_ERRATUM_A008511
+ select SYS_FSL_ERRATUM_A008850
select SYS_FSL_ERRATUM_A009801
select SYS_FSL_ERRATUM_A009803
select SYS_FSL_ERRATUM_A009942
--
GitLab
From df1a51df3bbd350bb391826b5d96d2152002f7ac Mon Sep 17 00:00:00 2001
From: Santan Kumar <santan.kumar@nxp.com>
Date: Wed, 5 Apr 2017 14:34:32 +0530
Subject: [PATCH 054/282] armv8: ls2080a: Add serdes2 protocol 0x51 support
Signed-off-by: Santan Kumar <santan.kumar@nxp.com>
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
---
arch/arm/cpu/armv8/fsl-layerscape/ls2080a_serdes.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm/cpu/armv8/fsl-layerscape/ls2080a_serdes.c b/arch/arm/cpu/armv8/fsl-layerscape/ls2080a_serdes.c
index ab83e85adcd..4db3c76d729 100644
--- a/arch/arm/cpu/armv8/fsl-layerscape/ls2080a_serdes.c
+++ b/arch/arm/cpu/armv8/fsl-layerscape/ls2080a_serdes.c
@@ -70,6 +70,7 @@ static struct serdes_config serdes2_cfg_tbl[] = {
SATA2 } },
{0x4A, {SGMII9, SGMII10, SGMII11, SGMII12, PCIE4, PCIE4, SATA1,
SATA2 } },
+ {0x51, {PCIE3, PCIE3, PCIE3, PCIE3, PCIE4, PCIE4, PCIE4, PCIE4 } },
{0x57, {PCIE3, PCIE3, PCIE3, PCIE3, PCIE4, PCIE4, SGMII15, SGMII16 } },
{}
};
--
GitLab
From 85a9a14e4b37696366d2f9d58c40a1185011dc4b Mon Sep 17 00:00:00 2001
From: Ashish kumar <Ashish.kumar@nxp.com>
Date: Fri, 7 Apr 2017 11:40:32 +0530
Subject: [PATCH 055/282] armv8: fsl-lsch3: Instantiate TZASC configuration in
2 groups
Number of TZASC instances may vary across NXP SoCs.
So put TZASC configuration under instance specific defines.
Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
---
arch/arm/cpu/armv8/fsl-layerscape/Kconfig | 8 +++++++
arch/arm/cpu/armv8/fsl-layerscape/lowlevel.S | 24 +++++++++++---------
2 files changed, 21 insertions(+), 11 deletions(-)
diff --git a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig
index 2562f4a3651..12fd80e7dbf 100644
--- a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig
+++ b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig
@@ -64,6 +64,8 @@ config ARCH_LS2080A
select SYS_FSL_SEC_COMPAT_5
select SYS_FSL_SEC_LE
select SYS_FSL_SRDS_2
+ select FSL_TZASC_1
+ select FSL_TZASC_2
select SYS_FSL_ERRATUM_A008336
select SYS_FSL_ERRATUM_A008511
select SYS_FSL_ERRATUM_A008514
@@ -238,6 +240,12 @@ config SYS_FSL_SRDS_2
config SYS_HAS_SERDES
bool
+config FSL_TZASC_1
+ bool
+
+config FSL_TZASC_2
+ bool
+
endmenu
menu "Layerscape clock tree configuration"
diff --git a/arch/arm/cpu/armv8/fsl-layerscape/lowlevel.S b/arch/arm/cpu/armv8/fsl-layerscape/lowlevel.S
index fa6b6e624a1..f4273561040 100644
--- a/arch/arm/cpu/armv8/fsl-layerscape/lowlevel.S
+++ b/arch/arm/cpu/armv8/fsl-layerscape/lowlevel.S
@@ -229,38 +229,40 @@ ENTRY(lowlevel_init)
* NOTE: As per the CCSR map doc, TZASC 3 and TZASC 4 are just
* placeholders.
*/
+#ifdef CONFIG_FSL_TZASC_1
ldr x1, =TZASC_GATE_KEEPER(0)
ldr w0, [x1] /* Filter 0 Gate Keeper Register */
orr w0, w0, #1 << 0 /* Set open_request for Filter 0 */
str w0, [x1]
- ldr x1, =TZASC_GATE_KEEPER(1)
- ldr w0, [x1] /* Filter 0 Gate Keeper Register */
- orr w0, w0, #1 << 0 /* Set open_request for Filter 0 */
- str w0, [x1]
-
ldr x1, =TZASC_REGION_ATTRIBUTES_0(0)
ldr w0, [x1] /* Region-0 Attributes Register */
orr w0, w0, #1 << 31 /* Set Sec global write en, Bit[31] */
orr w0, w0, #1 << 30 /* Set Sec global read en, Bit[30] */
str w0, [x1]
+ ldr x1, =TZASC_REGION_ID_ACCESS_0(0)
+ ldr w0, [x1] /* Region-0 Access Register */
+ mov w0, #0xFFFFFFFF /* Set nsaid_wr_en and nsaid_rd_en */
+ str w0, [x1]
+#endif
+#ifdef CONFIG_FSL_TZASC_2
+ ldr x1, =TZASC_GATE_KEEPER(1)
+ ldr w0, [x1] /* Filter 0 Gate Keeper Register */
+ orr w0, w0, #1 << 0 /* Set open_request for Filter 0 */
+ str w0, [x1]
+
ldr x1, =TZASC_REGION_ATTRIBUTES_0(1)
ldr w0, [x1] /* Region-1 Attributes Register */
orr w0, w0, #1 << 31 /* Set Sec global write en, Bit[31] */
orr w0, w0, #1 << 30 /* Set Sec global read en, Bit[30] */
str w0, [x1]
- ldr x1, =TZASC_REGION_ID_ACCESS_0(0)
- ldr w0, [x1] /* Region-0 Access Register */
- mov w0, #0xFFFFFFFF /* Set nsaid_wr_en and nsaid_rd_en */
- str w0, [x1]
-
ldr x1, =TZASC_REGION_ID_ACCESS_0(1)
ldr w0, [x1] /* Region-1 Attributes Register */
mov w0, #0xFFFFFFFF /* Set nsaid_wr_en and nsaid_rd_en */
str w0, [x1]
-
+#endif
isb
dsb sy
#endif
--
GitLab
From 3d91f46ca84f6b4a667a41ac1957aebf60764002 Mon Sep 17 00:00:00 2001
From: Yangbo Lu <yangbo.lu@nxp.com>
Date: Mon, 10 Apr 2017 15:04:11 +0800
Subject: [PATCH 056/282] armv8/fsl-layerscape: fdt: avoid incorrect fixing
with CONFIG_SYS_CLK_FREQ
Current sysclk fixing would fix all clocks with 'fixed-clock' compatible.
This patch is to fix sysclk by path to avoid any incorrect fixing.
Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
---
arch/arm/cpu/armv8/fsl-layerscape/fdt.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/arm/cpu/armv8/fsl-layerscape/fdt.c b/arch/arm/cpu/armv8/fsl-layerscape/fdt.c
index 762a95b945c..05c4577753a 100644
--- a/arch/arm/cpu/armv8/fsl-layerscape/fdt.c
+++ b/arch/arm/cpu/armv8/fsl-layerscape/fdt.c
@@ -373,8 +373,8 @@ void ft_cpu_setup(void *blob, bd_t *bd)
"clock-frequency", CONFIG_SYS_NS16550_CLK, 1);
#endif
- do_fixup_by_compat_u32(blob, "fixed-clock",
- "clock-frequency", CONFIG_SYS_CLK_FREQ, 1);
+ do_fixup_by_path_u32(blob, "/sysclk", "clock-frequency",
+ CONFIG_SYS_CLK_FREQ, 1);
#ifdef CONFIG_PCI
ft_pci_setup(blob, bd);
--
GitLab
From 668ec87f523580c981a01b06560f70cd5a52e2c9 Mon Sep 17 00:00:00 2001
From: Ruchika Gupta <ruchika.gupta@nxp.com>
Date: Thu, 2 Mar 2017 14:12:41 +0530
Subject: [PATCH 057/282] powerpc: e6500: Lock/unlock 1 cache instead of L1 as
init_ram
For E6500 cores, L2 cache has been used as init_ram. L1 cache is a
write through cache on E6500.If lines are not locked in both L1 and
L2 caches, crashes are observed during secure boot. This patch locks/
unlocks both L1 and L2 cache to prevent the crash.
Signed-off-by: Ruchika Gupta <ruchika.gupta@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
---
arch/powerpc/cpu/mpc85xx/start.S | 6 ++++--
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/arch/powerpc/cpu/mpc85xx/start.S b/arch/powerpc/cpu/mpc85xx/start.S
index eb817f1e86f..63fdffddb1a 100644
--- a/arch/powerpc/cpu/mpc85xx/start.S
+++ b/arch/powerpc/cpu/mpc85xx/start.S
@@ -1145,8 +1145,9 @@ switch_as:
li r0,0
1:
dcbz r0,r3
-#ifdef CONFIG_E6500 /* Lock/unlock L2 cache instead of L1 */
+#ifdef CONFIG_E6500 /* Lock/unlock L2 cache long with L1 */
dcbtls 2, r0, r3
+ dcbtls 0, r0, r3
#else
dcbtls 0, r0, r3
#endif
@@ -1790,8 +1791,9 @@ unlock_ram_in_cache:
slwi r4,r4,(10 - 1 - L1_CACHE_SHIFT)
mtctr r4
1: dcbi r0,r3
-#ifdef CONFIG_E6500 /* lock/unlock L2 cache instead of L1 */
+#ifdef CONFIG_E6500 /* lock/unlock L2 cache long with L1 */
dcblc 2, r0, r3
+ dcblc 0, r0, r3
#else
dcblc r0,r3
#endif
--
GitLab
From e0dfec863e2ca5088dd797a5b6853d4c0df9002c Mon Sep 17 00:00:00 2001
From: Shengzhou Liu <Shengzhou.Liu@nxp.com>
Date: Mon, 10 Apr 2017 16:00:08 +0800
Subject: [PATCH 058/282] powerpc/board/t1024rdb: enable board-level reset when
issuing reset command
As board-specific reset logic, it needs to issue reset signal
via CPLD when issuing 'reset' command in u-boot, this patch
solves the issue of reset command not working on T1024RDB.
Signed-off-by: Shengzhou Liu <Shengzhou.Liu@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
---
board/freescale/t102xrdb/t102xrdb.c | 7 +++++++
1 file changed, 7 insertions(+)
diff --git a/board/freescale/t102xrdb/t102xrdb.c b/board/freescale/t102xrdb/t102xrdb.c
index 56f7c1a9099..f370f72baa6 100644
--- a/board/freescale/t102xrdb/t102xrdb.c
+++ b/board/freescale/t102xrdb/t102xrdb.c
@@ -167,6 +167,13 @@ unsigned long get_board_ddr_clk(void)
return CONFIG_DDR_CLK_FREQ;
}
+#ifdef CONFIG_TARGET_T1024RDB
+void board_reset(void)
+{
+ CPLD_WRITE(reset_ctl1, CPLD_LBMAP_RESET);
+}
+#endif
+
int misc_init_r(void)
{
return 0;
--
GitLab
From f6c1df44b815a08585e7fd3805a1db51a5955d09 Mon Sep 17 00:00:00 2001
From: Tom Rini <trini@konsulko.com>
Date: Mon, 17 Apr 2017 18:16:49 -0400
Subject: [PATCH 059/282] Prepare v2017.05-rc2
Signed-off-by: Tom Rini <trini@konsulko.com>
---
Makefile | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/Makefile b/Makefile
index 8d4e6050b37..131d62e0a79 100644
--- a/Makefile
+++ b/Makefile
@@ -5,7 +5,7 @@
VERSION = 2017
PATCHLEVEL = 05
SUBLEVEL =
-EXTRAVERSION = -rc1
+EXTRAVERSION = -rc2
NAME =
# *DOCUMENTATION*
--
GitLab
From 18f41f2fa2d021f7baad37ba6fbe01b49309afbb Mon Sep 17 00:00:00 2001
From: "xypron.glpk@gmx.de" <xypron.glpk@gmx.de>
Date: Sat, 15 Apr 2017 16:25:25 +0200
Subject: [PATCH 060/282] cmd: ubi: remove unnecessary logical constraint
A size_t variable can never be negative.
The problem was indicated by cppcheck.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
---
cmd/ubi.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/cmd/ubi.c b/cmd/ubi.c
index efc43ffde91..222be5a3576 100644
--- a/cmd/ubi.c
+++ b/cmd/ubi.c
@@ -308,7 +308,7 @@ int ubi_volume_begin_write(char *volume, void *buf, size_t size,
return ENODEV;
rsvd_bytes = vol->reserved_pebs * (ubi->leb_size - vol->data_pad);
- if (size < 0 || size > rsvd_bytes) {
+ if (size > rsvd_bytes) {
printf("size > volume size! Aborting!\n");
return EINVAL;
}
--
GitLab
From 27f31aac1579fe7506bde26d45d082cb18f9228a Mon Sep 17 00:00:00 2001
From: Jelle van der Waa <jelle@vdwaa.nl>
Date: Fri, 3 Mar 2017 21:25:10 +0100
Subject: [PATCH 061/282] sunxi: Add maintainer of the NanoPi NEO Air
Add myself as maintainer of the NanoPi NEO Air board.
Signed-off-by: Jelle van der Waa <jelle@vdwaa.nl>
Reviewed-by: Jagan Teki <jagan@openedev.com>
---
board/sunxi/MAINTAINERS | 5 +++++
1 file changed, 5 insertions(+)
diff --git a/board/sunxi/MAINTAINERS b/board/sunxi/MAINTAINERS
index 91ca6eaf7a6..2a712fe4b56 100644
--- a/board/sunxi/MAINTAINERS
+++ b/board/sunxi/MAINTAINERS
@@ -232,6 +232,11 @@ M: Jelle van der Waa <jelle@vdwaa.nl>
S: Maintained
F: configs/nanopi_neo_defconfig
+NANOPI-NEO-AIR BOARD
+M: Jelle van der Waa <jelle@vdwaa.nl>
+S: Maintained
+F: configs/nanopi_neo_air_defconfig
+
NINTENDO NES CLASSIC EDITION BOARD
M: FUKAUMI Naoki <naobsd@gmail.com>
S: Maintained
--
GitLab
From a6eb6769c6baa28d7cfaf04ebab0e9fa5b5b834f Mon Sep 17 00:00:00 2001
From: Simon Glass <sjg@chromium.org>
Date: Sun, 19 Mar 2017 12:59:20 -0600
Subject: [PATCH 062/282] x86: Drop leading spaces in cpu_x86_get_desc()
The Intel CPU name can have leading spaces. Remove them since they are not
useful.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
---
arch/x86/cpu/cpu_x86.c | 6 +++++-
1 file changed, 5 insertions(+), 1 deletion(-)
diff --git a/arch/x86/cpu/cpu_x86.c b/arch/x86/cpu/cpu_x86.c
index 8be14b59291..b465b14a948 100644
--- a/arch/x86/cpu/cpu_x86.c
+++ b/arch/x86/cpu/cpu_x86.c
@@ -41,10 +41,14 @@ int cpu_x86_get_vendor(struct udevice *dev, char *buf, int size)
int cpu_x86_get_desc(struct udevice *dev, char *buf, int size)
{
+ char *ptr;
+
if (size < CPU_MAX_NAME_LEN)
return -ENOSPC;
- cpu_get_name(buf);
+ ptr = cpu_get_name(buf);
+ if (ptr != buf)
+ strcpy(buf, ptr);
return 0;
}
--
GitLab
From 3ff0900aafb34b32a0f72527f166ae45ed73be7c Mon Sep 17 00:00:00 2001
From: Simon Glass <sjg@chromium.org>
Date: Sun, 19 Mar 2017 12:59:21 -0600
Subject: [PATCH 063/282] x86: Display the SPL banner only once
At present on a cold reboot we must reset the CPU to get it to full speed.
With 64-bit U-Boot this happens in SPL. At present we print the banner
before doing this, the end result being that we print the banner twice.
Print the banner a little later (after the CPU is ready) to avoid this.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
---
arch/x86/lib/spl.c | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/arch/x86/lib/spl.c b/arch/x86/lib/spl.c
index 2b1b450737b..832a5d7c0ea 100644
--- a/arch/x86/lib/spl.c
+++ b/arch/x86/lib/spl.c
@@ -37,8 +37,6 @@ static int x86_spl_init(void)
debug("%s: spl_init() failed\n", __func__);
return ret;
}
- preloader_console_init();
-
ret = arch_cpu_init();
if (ret) {
debug("%s: arch_cpu_init() failed\n", __func__);
@@ -49,6 +47,7 @@ static int x86_spl_init(void)
debug("%s: arch_cpu_init_dm() failed\n", __func__);
return ret;
}
+ preloader_console_init();
ret = print_cpuinfo();
if (ret) {
debug("%s: print_cpuinfo() failed\n", __func__);
--
GitLab
From 363f67a96b2b2f6ec5a211eddf349d7b76a09159 Mon Sep 17 00:00:00 2001
From: Simon Glass <sjg@chromium.org>
Date: Sun, 19 Mar 2017 12:59:22 -0600
Subject: [PATCH 064/282] x86: config: Enable dhrystone command for link
Enable this command so we can get an approximate performance measurement.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
---
configs/chromebook_link64_defconfig | 1 +
configs/chromebook_link_defconfig | 1 +
2 files changed, 2 insertions(+)
diff --git a/configs/chromebook_link64_defconfig b/configs/chromebook_link64_defconfig
index 3ab34cd72b6..749cfd43b05 100644
--- a/configs/chromebook_link64_defconfig
+++ b/configs/chromebook_link64_defconfig
@@ -86,4 +86,5 @@ CONFIG_FRAMEBUFFER_VESA_MODE_11A=y
CONFIG_VIDEO_IVYBRIDGE_IGD=y
CONFIG_CONSOLE_SCROLL_LINES=5
CONFIG_USE_PRIVATE_LIBGCC=y
+CONFIG_CMD_DHRYSTONE=y
CONFIG_TPM=y
diff --git a/configs/chromebook_link_defconfig b/configs/chromebook_link_defconfig
index 85b7d5fcd91..5ebb556f90d 100644
--- a/configs/chromebook_link_defconfig
+++ b/configs/chromebook_link_defconfig
@@ -69,4 +69,5 @@ CONFIG_FRAMEBUFFER_VESA_MODE_11A=y
CONFIG_VIDEO_IVYBRIDGE_IGD=y
CONFIG_CONSOLE_SCROLL_LINES=5
CONFIG_USE_PRIVATE_LIBGCC=y
+CONFIG_CMD_DHRYSTONE=y
CONFIG_TPM=y
--
GitLab
From 511c66b1e659078de8692fdf2aa7d624f95110e1 Mon Sep 17 00:00:00 2001
From: Tyler Hall <tylerwhall@gmail.com>
Date: Wed, 12 Apr 2017 16:29:15 -0400
Subject: [PATCH 065/282] cmd: cramfs: use map_sysmem for sandbox support
As with most other commands, this needs to factor in the sysmem offset
in the sandbox or it will try to dereference the simulated physical
address directly.
Signed-off-by: Tyler Hall <tylerwhall@gmail.com>
---
cmd/cramfs.c | 14 +++++++++++---
1 file changed, 11 insertions(+), 3 deletions(-)
diff --git a/cmd/cramfs.c b/cmd/cramfs.c
index 965ca4e60dd..4e75de8f29d 100644
--- a/cmd/cramfs.c
+++ b/cmd/cramfs.c
@@ -13,11 +13,13 @@
#include <common.h>
#include <command.h>
#include <malloc.h>
+#include <mapmem.h>
#include <linux/list.h>
#include <linux/ctype.h>
#include <jffs2/jffs2.h>
#include <jffs2/load_kernel.h>
#include <cramfs/cramfs_fs.h>
+#include <asm/io.h>
/* enable/disable debugging messages */
#define DEBUG_CRAMFS
@@ -95,6 +97,7 @@ int do_cramfs_load(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
char *filename;
int size;
ulong offset = load_addr;
+ char *offset_virt;
struct part_info part;
struct mtd_device dev;
@@ -111,7 +114,7 @@ int do_cramfs_load(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
dev.id = &id;
part.dev = &dev;
/* fake the address offset */
- part.offset = addr - OFFSET_ADJUSTMENT;
+ part.offset = (u64)(uintptr_t) map_sysmem(addr - OFFSET_ADJUSTMENT, 0);
/* pre-set Boot file name */
if ((filename = getenv("bootfile")) == NULL) {
@@ -127,9 +130,10 @@ int do_cramfs_load(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
filename = argv[2];
}
+ offset_virt = map_sysmem(offset, 0);
size = 0;
if (cramfs_check(&part))
- size = cramfs_load ((char *) offset, &part, filename);
+ size = cramfs_load (offset_virt, &part, filename);
if (size > 0) {
printf("### CRAMFS load complete: %d bytes loaded to 0x%lx\n",
@@ -139,6 +143,9 @@ int do_cramfs_load(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
printf("### CRAMFS LOAD ERROR<%x> for %s!\n", size, filename);
}
+ unmap_sysmem(offset_virt);
+ unmap_sysmem((void *)(uintptr_t)part.offset);
+
return !(size > 0);
}
@@ -172,7 +179,7 @@ int do_cramfs_ls(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
dev.id = &id;
part.dev = &dev;
/* fake the address offset */
- part.offset = addr - OFFSET_ADJUSTMENT;
+ part.offset = (u64)(uintptr_t) map_sysmem(addr - OFFSET_ADJUSTMENT, 0);
if (argc == 2)
filename = argv[1];
@@ -180,6 +187,7 @@ int do_cramfs_ls(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
ret = 0;
if (cramfs_check(&part))
ret = cramfs_ls (&part, filename);
+ unmap_sysmem((void *)(uintptr_t)part.offset);
return ret ? 0 : 1;
}
--
GitLab
From a6ea791cb96f76fd600f6547a715e24ef66ba5e2 Mon Sep 17 00:00:00 2001
From: Tyler Hall <tylerwhall@gmail.com>
Date: Wed, 12 Apr 2017 16:29:16 -0400
Subject: [PATCH 066/282] cramfs: block pointers are 32 bits
Using a variably-sized type is incorrect here since we're reading a
fixed file format. Fixes cramfs on 64-bit platforms.
Signed-off-by: Tyler Hall <tylerwhall@gmail.com>
---
fs/cramfs/cramfs.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/fs/cramfs/cramfs.c b/fs/cramfs/cramfs.c
index 05ed27240a1..ca8bc5e12b8 100644
--- a/fs/cramfs/cramfs.c
+++ b/fs/cramfs/cramfs.c
@@ -162,7 +162,7 @@ static int cramfs_uncompress (unsigned long begin, unsigned long offset,
unsigned long loadoffset)
{
struct cramfs_inode *inode = (struct cramfs_inode *) (begin + offset);
- unsigned long *block_ptrs = (unsigned long *)
+ u32 *block_ptrs = (u32 *)
(begin + (CRAMFS_GET_OFFSET (inode) << 2));
unsigned long curr_block = (CRAMFS_GET_OFFSET (inode) +
(((CRAMFS_24 (inode->size)) +
--
GitLab
From d39a0d2c8413b33a5cd29466c1f6c4bda022ee58 Mon Sep 17 00:00:00 2001
From: Tyler Hall <tylerwhall@gmail.com>
Date: Wed, 12 Apr 2017 16:29:17 -0400
Subject: [PATCH 067/282] cramfs: basic symlink support
Handle symlinks to files in the current directory. Other cases could be
handled with additional code, but this is a start.
Add explicit errors for absolute paths and links found in the middle of
a path (directories). Other cases like '..' or '.' will result with the
file not being found as when those path components are explicitly
provided.
Add a helper to decompress a null-terminated link name which is shared
with cramfs_list_inode.
Signed-off-by: Tyler Hall <tylerwhall@gmail.com>
---
fs/cramfs/cramfs.c | 62 +++++++++++++++++++++++++++++++++++++---------
1 file changed, 50 insertions(+), 12 deletions(-)
diff --git a/fs/cramfs/cramfs.c b/fs/cramfs/cramfs.c
index ca8bc5e12b8..228f599d44b 100644
--- a/fs/cramfs/cramfs.c
+++ b/fs/cramfs/cramfs.c
@@ -49,6 +49,9 @@ extern flash_info_t flash_info[];
#define PART_OFFSET(x) ((ulong)x->offset)
#endif
+static int cramfs_uncompress (unsigned long begin, unsigned long offset,
+ unsigned long loadoffset);
+
static int cramfs_read_super (struct part_info *info)
{
unsigned long root_offset;
@@ -94,6 +97,22 @@ static int cramfs_read_super (struct part_info *info)
return 0;
}
+/* Unpack to an allocated buffer, trusting in the inode's size field. */
+static char *cramfs_uncompress_link (unsigned long begin, unsigned long offset)
+{
+ struct cramfs_inode *inode = (struct cramfs_inode *)(begin + offset);
+ unsigned long size = CRAMFS_24 (inode->size);
+ char *link = malloc (size + 1);
+
+ if (!link || cramfs_uncompress (begin, offset, (unsigned long)link) != size) {
+ free (link);
+ link = NULL;
+ } else {
+ link[size] = '\0';
+ }
+ return link;
+}
+
static unsigned long cramfs_resolve (unsigned long begin, unsigned long offset,
unsigned long size, int raw,
char *filename)
@@ -143,6 +162,33 @@ static unsigned long cramfs_resolve (unsigned long begin, unsigned long offset,
p);
} else if (S_ISREG (CRAMFS_16 (inode->mode))) {
return offset + inodeoffset;
+ } else if (S_ISLNK (CRAMFS_16 (inode->mode))) {
+ unsigned long ret;
+ char *link;
+ if (p && strlen(p)) {
+ printf ("unsupported symlink to \
+ non-terminal path\n");
+ return 0;
+ }
+ link = cramfs_uncompress_link (begin,
+ offset + inodeoffset);
+ if (!link) {
+ printf ("%*.*s: Error reading link\n",
+ namelen, namelen, name);
+ return 0;
+ } else if (link[0] == '/') {
+ printf ("unsupported symlink to \
+ absolute path\n");
+ free (link);
+ return 0;
+ }
+ ret = cramfs_resolve (begin,
+ offset,
+ size,
+ raw,
+ strtok(link, "/"));
+ free (link);
+ return ret;
} else {
printf ("%*.*s: unsupported file type (%x)\n",
namelen, namelen, name,
@@ -235,20 +281,12 @@ static int cramfs_list_inode (struct part_info *info, unsigned long offset)
CRAMFS_24 (inode->size), namelen, namelen, name);
if ((CRAMFS_16 (inode->mode) & S_IFMT) == S_IFLNK) {
- /* symbolic link.
- * Unpack the link target, trusting in the inode's size field.
- */
- unsigned long size = CRAMFS_24 (inode->size);
- char *link = malloc (size);
-
- if (link != NULL && cramfs_uncompress (PART_OFFSET(info), offset,
- (unsigned long) link)
- == size)
- printf (" -> %*.*s\n", (int) size, (int) size, link);
+ char *link = cramfs_uncompress_link (PART_OFFSET(info), offset);
+ if (link)
+ printf (" -> %s\n", link);
else
printf (" [Error reading link]\n");
- if (link)
- free (link);
+ free (link);
} else
printf ("\n");
--
GitLab
From 60911104f39b0fc3936a038d87e4a7c6dbe4fe33 Mon Sep 17 00:00:00 2001
From: Masahiro Yamada <yamada.masahiro@socionext.com>
Date: Fri, 14 Apr 2017 10:53:56 +0900
Subject: [PATCH 068/282] tools: moveconfig: remove GCC prefix of obsolete
architecture
Recently, U-Boot removed support for these architectures.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
---
tools/moveconfig.py | 7 -------
1 file changed, 7 deletions(-)
diff --git a/tools/moveconfig.py b/tools/moveconfig.py
index 228d098d854..dcca0ecb5eb 100755
--- a/tools/moveconfig.py
+++ b/tools/moveconfig.py
@@ -199,28 +199,21 @@ SLEEP_TIME=0.03
# Most of them are available at kernel.org
# (https://www.kernel.org/pub/tools/crosstool/files/bin/), except the following:
# arc: https://github.com/foss-for-synopsys-dwc-arc-processors/toolchain/releases
-# blackfin: http://sourceforge.net/projects/adi-toolchain/files/
# nds32: http://osdk.andestech.com/packages/nds32le-linux-glibc-v1.tgz
# nios2: https://sourcery.mentor.com/GNUToolchain/subscription42545
# sh: http://sourcery.mentor.com/public/gnu_toolchain/sh-linux-gnu
-#
-# openrisc kernel.org toolchain is out of date, download latest one from
-# http://opencores.org/or1k/OpenRISC_GNU_tool_chain#Prebuilt_versions
CROSS_COMPILE = {
'arc': 'arc-linux-',
'aarch64': 'aarch64-linux-',
'arm': 'arm-unknown-linux-gnueabi-',
'avr32': 'avr32-linux-',
- 'blackfin': 'bfin-elf-',
'm68k': 'm68k-linux-',
'microblaze': 'microblaze-linux-',
'mips': 'mips-linux-',
'nds32': 'nds32le-linux-',
'nios2': 'nios2-linux-gnu-',
- 'openrisc': 'or1k-elf-',
'powerpc': 'powerpc-linux-',
'sh': 'sh-linux-gnu-',
- 'sparc': 'sparc-linux-',
'x86': 'i386-linux-',
'xtensa': 'xtensa-linux-'
}
--
GitLab
From 4326b454744b47777f6575d62e84622d941da5ea Mon Sep 17 00:00:00 2001
From: Masahiro Yamada <yamada.masahiro@socionext.com>
Date: Fri, 14 Apr 2017 10:54:59 +0900
Subject: [PATCH 069/282] cmd: remove Blackfin specific commands
These commands have no user since commit ea3310e8aafa ("Blackfin:
Remove").
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
---
cmd/Makefile | 6 --
cmd/bootldr.c | 170 -----------------------------------
cmd/cplbinfo.c | 60 -------------
cmd/ldrinfo.c | 192 ---------------------------------------
cmd/otp.c | 228 -----------------------------------------------
cmd/softswitch.c | 41 ---------
cmd/spibootldr.c | 37 --------
7 files changed, 734 deletions(-)
delete mode 100644 cmd/bootldr.c
delete mode 100644 cmd/cplbinfo.c
delete mode 100644 cmd/ldrinfo.c
delete mode 100644 cmd/otp.c
delete mode 100644 cmd/softswitch.c
delete mode 100644 cmd/spibootldr.c
diff --git a/cmd/Makefile b/cmd/Makefile
index 3cb0cfde7bf..97c862f6511 100644
--- a/cmd/Makefile
+++ b/cmd/Makefile
@@ -23,7 +23,6 @@ obj-$(CONFIG_CMD_BLOCK_CACHE) += blkcache.o
obj-$(CONFIG_CMD_BMP) += bmp.o
obj-$(CONFIG_CMD_BOOTEFI) += bootefi.o
obj-$(CONFIG_CMD_BOOTMENU) += bootmenu.o
-obj-$(CONFIG_CMD_BOOTLDR) += bootldr.o
obj-$(CONFIG_CMD_BOOTSTAGE) += bootstage.o
obj-$(CONFIG_CMD_BOOTZ) += bootz.o
obj-$(CONFIG_CMD_BOOTI) += booti.o
@@ -32,7 +31,6 @@ obj-$(CONFIG_CMD_CBFS) += cbfs.o
obj-$(CONFIG_CMD_CLK) += clk.o
obj-$(CONFIG_CMD_CONFIG) += config.o
obj-$(CONFIG_CMD_CONSOLE) += console.o
-obj-$(CONFIG_CMD_CPLBINFO) += cplbinfo.o
obj-$(CONFIG_CMD_CPU) += cpu.o
obj-$(CONFIG_DATAFLASH_MMC_SELECT) += dataflash_mmc_mux.o
obj-$(CONFIG_CMD_DATE) += date.o
@@ -77,7 +75,6 @@ obj-$(CONFIG_CMD_IRQ) += irq.o
obj-$(CONFIG_CMD_ITEST) += itest.o
obj-$(CONFIG_CMD_JFFS2) += jffs2.o
obj-$(CONFIG_CMD_CRAMFS) += cramfs.o
-obj-$(CONFIG_CMD_LDRINFO) += ldrinfo.o
obj-$(CONFIG_LED_STATUS_CMD) += legacy_led.o
obj-$(CONFIG_CMD_LED) += led.o
obj-$(CONFIG_CMD_LICENSE) += license.o
@@ -100,7 +97,6 @@ obj-$(CONFIG_CMD_MTDPARTS) += mtdparts.o
obj-$(CONFIG_CMD_NAND) += nand.o
obj-$(CONFIG_CMD_NET) += net.o
obj-$(CONFIG_CMD_ONENAND) += onenand.o
-obj-$(CONFIG_CMD_OTP) += otp.o
obj-$(CONFIG_CMD_PART) += part.o
ifdef CONFIG_PCI
obj-$(CONFIG_CMD_PCI) += pci.o
@@ -119,9 +115,7 @@ obj-$(CONFIG_CMD_SF) += sf.o
obj-$(CONFIG_SCSI) += scsi.o disk.o
obj-$(CONFIG_CMD_SHA1SUM) += sha1sum.o
obj-$(CONFIG_CMD_SETEXPR) += setexpr.o
-obj-$(CONFIG_CMD_SOFTSWITCH) += softswitch.o
obj-$(CONFIG_CMD_SPI) += spi.o
-obj-$(CONFIG_CMD_SPIBOOTLDR) += spibootldr.o
obj-$(CONFIG_CMD_STRINGS) += strings.o
obj-$(CONFIG_CMD_TERMINAL) += terminal.o
obj-$(CONFIG_CMD_TIME) += time.o
diff --git a/cmd/bootldr.c b/cmd/bootldr.c
deleted file mode 100644
index 38b3b2f8d74..00000000000
--- a/cmd/bootldr.c
+++ /dev/null
@@ -1,170 +0,0 @@
-/*
- * U-Boot - bootldr.c
- *
- * Copyright (c) 2005-2008 Analog Devices Inc.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * Licensed under the GPL-2 or later.
- */
-
-#include <config.h>
-#include <common.h>
-#include <command.h>
-
-#include <asm/blackfin.h>
-#include <asm/mach-common/bits/bootrom.h>
-
-/* Simple sanity check on the specified address to make sure it contains
- * an LDR image of some sort.
- */
-static bool ldr_valid_signature(uint8_t *data)
-{
-#if defined(__ADSPBF561__)
-
- /* BF56x has a 4 byte global header */
- if (data[3] == (GFLAG_56X_SIGN_MAGIC << (GFLAG_56X_SIGN_SHIFT - 24)))
- return true;
-
-#elif defined(__ADSPBF531__) || defined(__ADSPBF532__) || defined(__ADSPBF533__) || \
- defined(__ADSPBF534__) || defined(__ADSPBF536__) || defined(__ADSPBF537__) || \
- defined(__ADSPBF538__) || defined(__ADSPBF539__)
-
- /* all the BF53x should start at this address mask */
- uint32_t addr;
- memmove(&addr, data, sizeof(addr));
- if ((addr & 0xFF0FFF0F) == 0xFF000000)
- return true;
-#else
-
- /* everything newer has a magic byte */
- uint32_t count;
- memmove(&count, data + 8, sizeof(count));
- if (data[3] == 0xAD && count == 0)
- return true;
-
-#endif
-
- return false;
-}
-
-/* If the Blackfin is new enough, the Blackfin on-chip ROM supports loading
- * LDRs from random memory addresses. So whenever possible, use that. In
- * the older cases (BF53x/BF561), parse the LDR format ourselves.
- */
-static void ldr_load(uint8_t *base_addr)
-{
-#if defined(__ADSPBF531__) || defined(__ADSPBF532__) || defined(__ADSPBF533__) || \
- /*defined(__ADSPBF534__) || defined(__ADSPBF536__) || defined(__ADSPBF537__) ||*/\
- defined(__ADSPBF538__) || defined(__ADSPBF539__) || defined(__ADSPBF561__)
-
- uint32_t addr;
- uint32_t count;
- uint16_t flags;
-
- /* the bf56x has a 4 byte global header ... but it is useless to
- * us when booting an LDR from a memory address, so skip it
- */
-# ifdef __ADSPBF561__
- base_addr += 4;
-# endif
-
- memmove(&flags, base_addr + 8, sizeof(flags));
- bfin_write_EVT1(flags & BFLAG_53X_RESVECT ? 0xFFA00000 : 0xFFA08000);
-
- do {
- /* block header may not be aligned */
- memmove(&addr, base_addr, sizeof(addr));
- memmove(&count, base_addr+4, sizeof(count));
- memmove(&flags, base_addr+8, sizeof(flags));
- base_addr += sizeof(addr) + sizeof(count) + sizeof(flags);
-
- printf("loading to 0x%08x (%#x bytes) flags: 0x%04x\n",
- addr, count, flags);
-
- if (!(flags & BFLAG_53X_IGNORE)) {
- if (flags & BFLAG_53X_ZEROFILL)
- memset((void *)addr, 0x00, count);
- else
- memcpy((void *)addr, base_addr, count);
-
- if (flags & BFLAG_53X_INIT) {
- void (*init)(void) = (void *)addr;
- init();
- }
- }
-
- if (!(flags & BFLAG_53X_ZEROFILL))
- base_addr += count;
- } while (!(flags & BFLAG_53X_FINAL));
-
-#endif
-}
-
-/* For BF537, we use the _BOOTROM_BOOT_DXE_FLASH funky ROM function.
- * For all other BF53x/BF56x, we just call the entry point.
- * For everything else (newer), we use _BOOTROM_MEMBOOT ROM function.
- */
-static void ldr_exec(void *addr)
-{
-#if defined(__ADSPBF534__) || defined(__ADSPBF536__) || defined(__ADSPBF537__)
-
- /* restore EVT1 to reset value as this is what the bootrom uses as
- * the default entry point when booting the final block of LDRs
- */
- bfin_write_EVT1(L1_INST_SRAM);
- __asm__("call (%0);" : : "a"(_BOOTROM_MEMBOOT), "q7"(addr) : "RETS", "memory");
-
-#elif defined(__ADSPBF531__) || defined(__ADSPBF532__) || defined(__ADSPBF533__) || \
- defined(__ADSPBF538__) || defined(__ADSPBF539__) || defined(__ADSPBF561__)
-
- void (*ldr_entry)(void) = (void *)bfin_read_EVT1();
- ldr_entry();
-
-#else
-
- int32_t (*BOOTROM_MEM)(void *, int32_t, int32_t, void *) = (void *)_BOOTROM_MEMBOOT;
- BOOTROM_MEM(addr, 0, 0, NULL);
-
-#endif
-}
-
-/*
- * the bootldr command loads an address, checks to see if there
- * is a Boot stream that the on-chip BOOTROM can understand,
- * and loads it via the BOOTROM Callback. It is possible
- * to also add booting from SPI, or TWI, but this function does
- * not currently support that.
- */
-int do_bootldr(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
-{
- void *addr;
-
- /* Get the address */
- if (argc < 2)
- addr = (void *)load_addr;
- else
- addr = (void *)simple_strtoul(argv[1], NULL, 16);
-
- /* Check if it is a LDR file */
- if (ldr_valid_signature(addr)) {
- printf("## Booting ldr image at 0x%p ...\n", addr);
- ldr_load(addr);
-
- icache_disable();
- dcache_disable();
-
- ldr_exec(addr);
- } else
- printf("## No ldr image at address 0x%p\n", addr);
-
- return 0;
-}
-
-U_BOOT_CMD(
- bootldr, 2, 0, do_bootldr,
- "boot ldr image from memory",
- "[addr]\n"
- ""
-);
diff --git a/cmd/cplbinfo.c b/cmd/cplbinfo.c
deleted file mode 100644
index ab5b3b58768..00000000000
--- a/cmd/cplbinfo.c
+++ /dev/null
@@ -1,60 +0,0 @@
-/*
- * cmd_cplbinfo.c - dump the instruction/data cplb tables
- *
- * Copyright (c) 2007-2008 Analog Devices Inc.
- *
- * Licensed under the GPL-2 or later.
- */
-
-#include <common.h>
-#include <command.h>
-#include <asm/blackfin.h>
-#include <asm/cplb.h>
-#include <asm/mach-common/bits/mpu.h>
-
-/*
- * Translate the PAGE_SIZE bits into a human string
- */
-static const char *cplb_page_size(uint32_t data)
-{
- static const char page_size_string_table[][4] = { "1K", "4K", "1M", "4M" };
- return page_size_string_table[(data & PAGE_SIZE_MASK) >> PAGE_SIZE_SHIFT];
-}
-
-/*
- * show a hardware cplb table
- */
-static void show_cplb_table(uint32_t *addr, uint32_t *data)
-{
- int i;
- printf(" Address Data Size Valid Locked\n");
- for (i = 1; i <= 16; ++i) {
- printf(" %2i 0x%p 0x%05X %s %c %c\n",
- i, (void *)*addr, *data,
- cplb_page_size(*data),
- (*data & CPLB_VALID ? 'Y' : 'N'),
- (*data & CPLB_LOCK ? 'Y' : 'N'));
- ++addr;
- ++data;
- }
-}
-
-/*
- * display current instruction and data cplb tables
- */
-int do_cplbinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
-{
- printf("%s CPLB table [%08x]:\n", "Instruction", *(uint32_t *)DMEM_CONTROL);
- show_cplb_table((uint32_t *)ICPLB_ADDR0, (uint32_t *)ICPLB_DATA0);
-
- printf("%s CPLB table [%08x]:\n", "Data", *(uint32_t *)IMEM_CONTROL);
- show_cplb_table((uint32_t *)DCPLB_ADDR0, (uint32_t *)DCPLB_DATA0);
-
- return 0;
-}
-
-U_BOOT_CMD(
- cplbinfo, 1, 0, do_cplbinfo,
- "display current CPLB tables",
- ""
-);
diff --git a/cmd/ldrinfo.c b/cmd/ldrinfo.c
deleted file mode 100644
index 2b492973275..00000000000
--- a/cmd/ldrinfo.c
+++ /dev/null
@@ -1,192 +0,0 @@
-/*
- * U-Boot - ldrinfo
- *
- * Copyright (c) 2010 Analog Devices Inc.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * Licensed under the GPL-2 or later.
- */
-
-#include <config.h>
-#include <common.h>
-#include <command.h>
-
-#include <asm/blackfin.h>
-#include <asm/mach-common/bits/bootrom.h>
-
-static uint32_t ldrinfo_header(const void *addr)
-{
- uint32_t skip = 0;
-
-#if defined(__ADSPBF561__)
- /* BF56x has a 4 byte global header */
- uint32_t header, sign;
- static const char * const spi_speed[] = {
- "500K", "1M", "2M", "??",
- };
-
- memcpy(&header, addr, sizeof(header));
-
- sign = (header & GFLAG_56X_SIGN_MASK) >> GFLAG_56X_SIGN_SHIFT;
- printf("Header: %08X ( %s-bit-flash wait:%i hold:%i spi:%s %s)\n",
- header,
- (header & GFLAG_56X_16BIT_FLASH) ? "16" : "8",
- (header & GFLAG_56X_WAIT_MASK) >> GFLAG_56X_WAIT_SHIFT,
- (header & GFLAG_56X_HOLD_MASK) >> GFLAG_56X_HOLD_SHIFT,
- spi_speed[(header & GFLAG_56X_SPI_MASK) >> GFLAG_56X_SPI_SHIFT],
- sign == GFLAG_56X_SIGN_MAGIC ? "" : "!!hdrsign!! ");
-
- skip = 4;
-#endif
-
- /* |Block @ 12345678: 12345678 12345678 12345678 12345678 | */
-#if defined(__ADSPBF531__) || defined(__ADSPBF532__) || defined(__ADSPBF533__) || \
- defined(__ADSPBF534__) || defined(__ADSPBF536__) || defined(__ADSPBF537__) || \
- defined(__ADSPBF538__) || defined(__ADSPBF539__) || defined(__ADSPBF561__)
- printf(" Address Count Flags\n");
-#else
- printf(" BCode Address Count Argument\n");
-#endif
-
- return skip;
-}
-
-struct ldr_flag {
- uint16_t flag;
- const char *desc;
-};
-
-static uint32_t ldrinfo_block(const void *base_addr)
-{
- uint32_t count;
-
- printf("Block @ %08X: ", (uint32_t)base_addr);
-
-#if defined(__ADSPBF531__) || defined(__ADSPBF532__) || defined(__ADSPBF533__) || \
- defined(__ADSPBF534__) || defined(__ADSPBF536__) || defined(__ADSPBF537__) || \
- defined(__ADSPBF538__) || defined(__ADSPBF539__) || defined(__ADSPBF561__)
-
- uint32_t addr, pval;
- uint16_t flags;
- int i;
- static const struct ldr_flag ldr_flags[] = {
- { BFLAG_53X_ZEROFILL, "zerofill" },
- { BFLAG_53X_RESVECT, "resvect" },
- { BFLAG_53X_INIT, "init" },
- { BFLAG_53X_IGNORE, "ignore" },
- { BFLAG_53X_COMPRESSED, "compressed"},
- { BFLAG_53X_FINAL, "final" },
- };
-
- memcpy(&addr, base_addr, sizeof(addr));
- memcpy(&count, base_addr+4, sizeof(count));
- memcpy(&flags, base_addr+8, sizeof(flags));
-
- printf("%08X %08X %04X ( ", addr, count, flags);
-
- for (i = 0; i < ARRAY_SIZE(ldr_flags); ++i)
- if (flags & ldr_flags[i].flag)
- printf("%s ", ldr_flags[i].desc);
-
- pval = (flags & BFLAG_53X_PFLAG_MASK) >> BFLAG_53X_PFLAG_SHIFT;
- if (pval)
- printf("gpio%i ", pval);
- pval = (flags & BFLAG_53X_PPORT_MASK) >> BFLAG_53X_PPORT_SHIFT;
- if (pval)
- printf("port%c ", 'e' + pval);
-
- if (flags & BFLAG_53X_ZEROFILL)
- count = 0;
- if (flags & BFLAG_53X_FINAL)
- count = 0;
- else
- count += sizeof(addr) + sizeof(count) + sizeof(flags);
-
-#else
-
- const uint8_t *raw8 = base_addr;
- uint32_t bcode, addr, arg, sign, chk;
- int i;
- static const struct ldr_flag ldr_flags[] = {
- { BFLAG_SAFE, "safe" },
- { BFLAG_AUX, "aux" },
- { BFLAG_FILL, "fill" },
- { BFLAG_QUICKBOOT, "quickboot" },
- { BFLAG_CALLBACK, "callback" },
- { BFLAG_INIT, "init" },
- { BFLAG_IGNORE, "ignore" },
- { BFLAG_INDIRECT, "indirect" },
- { BFLAG_FIRST, "first" },
- { BFLAG_FINAL, "final" },
- };
-
- memcpy(&bcode, base_addr, sizeof(bcode));
- memcpy(&addr, base_addr+4, sizeof(addr));
- memcpy(&count, base_addr+8, sizeof(count));
- memcpy(&arg, base_addr+12, sizeof(arg));
-
- printf("%08X %08X %08X %08X ( ", bcode, addr, count, arg);
-
- if (addr % 4)
- printf("!!addralgn!! ");
- if (count % 4)
- printf("!!cntalgn!! ");
-
- sign = (bcode & BFLAG_HDRSIGN_MASK) >> BFLAG_HDRSIGN_SHIFT;
- if (sign != BFLAG_HDRSIGN_MAGIC)
- printf("!!hdrsign!! ");
-
- chk = 0;
- for (i = 0; i < 16; ++i)
- chk ^= raw8[i];
- if (chk)
- printf("!!hdrchk!! ");
-
- printf("dma:%i ", bcode & BFLAG_DMACODE_MASK);
-
- for (i = 0; i < ARRAY_SIZE(ldr_flags); ++i)
- if (bcode & ldr_flags[i].flag)
- printf("%s ", ldr_flags[i].desc);
-
- if (bcode & BFLAG_FILL)
- count = 0;
- if (bcode & BFLAG_FINAL)
- count = 0;
- else
- count += sizeof(bcode) + sizeof(addr) + sizeof(count) + sizeof(arg);
-
-#endif
-
- printf(")\n");
-
- return count;
-}
-
-static int do_ldrinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
-{
- const void *addr;
- uint32_t skip;
-
- /* Get the address */
- if (argc < 2)
- addr = (void *)load_addr;
- else
- addr = (void *)simple_strtoul(argv[1], NULL, 16);
-
- /* Walk the LDR */
- addr += ldrinfo_header(addr);
- do {
- skip = ldrinfo_block(addr);
- addr += skip;
- } while (skip);
-
- return 0;
-}
-
-U_BOOT_CMD(
- ldrinfo, 2, 0, do_ldrinfo,
- "validate ldr image in memory",
- "[addr]\n"
-);
diff --git a/cmd/otp.c b/cmd/otp.c
deleted file mode 100644
index 10c1475c5a3..00000000000
--- a/cmd/otp.c
+++ /dev/null
@@ -1,228 +0,0 @@
-/*
- * cmd_otp.c - interface to Blackfin on-chip One-Time-Programmable memory
- *
- * Copyright (c) 2007-2008 Analog Devices Inc.
- *
- * Licensed under the GPL-2 or later.
- */
-
-/* There are 512 128-bit "pages" (0x000 through 0x1FF).
- * The pages are accessable as 64-bit "halfpages" (an upper and lower half).
- * The pages are not part of the memory map. There is an OTP controller which
- * handles scanning in/out of bits. While access is done through OTP MMRs,
- * the bootrom provides C-callable helper functions to handle the interaction.
- */
-
-#include <config.h>
-#include <common.h>
-#include <command.h>
-#include <console.h>
-
-#include <asm/blackfin.h>
-#include <asm/clock.h>
-#include <asm/mach-common/bits/otp.h>
-
-static const char *otp_strerror(uint32_t err)
-{
- switch (err) {
- case 0: return "no error";
- case OTP_WRITE_ERROR: return "OTP fuse write error";
- case OTP_READ_ERROR: return "OTP fuse read error";
- case OTP_ACC_VIO_ERROR: return "invalid OTP address";
- case OTP_DATA_MULT_ERROR: return "multiple bad bits detected";
- case OTP_ECC_MULT_ERROR: return "error in ECC bits";
- case OTP_PREV_WR_ERROR: return "space already written";
- case OTP_DATA_SB_WARN: return "single bad bit in half page";
- case OTP_ECC_SB_WARN: return "single bad bit in ECC";
- default: return "unknown error";
- }
-}
-
-#define lowup(x) ((x) % 2 ? "upper" : "lower")
-
-static int check_voltage(void)
-{
- /* Make sure voltage limits are within datasheet spec */
- uint16_t vr_ctl = bfin_read_VR_CTL();
-
-#ifdef __ADSPBF54x__
- /* 0.9V <= VDDINT <= 1.1V */
- if ((vr_ctl & 0xc) && (vr_ctl & 0xc0) == 0xc0)
- return 1;
-#else
- /* for the parts w/out qualification yet */
- (void)vr_ctl;
-#endif
-
- return 0;
-}
-
-static void set_otp_timing(bool write)
-{
- static uint32_t timing;
- if (!timing) {
- uint32_t tp1, tp2, tp3;
- /* OTP_TP1 = 1000 / sclk_period (in nanoseconds)
- * OTP_TP1 = 1000 / (1 / get_sclk() * 10^9)
- * OTP_TP1 = (1000 * get_sclk()) / 10^9
- * OTP_TP1 = get_sclk() / 10^6
- */
- tp1 = get_sclk() / 1000000;
- /* OTP_TP2 = 400 / (2 * sclk_period)
- * OTP_TP2 = 400 / (2 * 1 / get_sclk() * 10^9)
- * OTP_TP2 = (400 * get_sclk()) / (2 * 10^9)
- * OTP_TP2 = (2 * get_sclk()) / 10^7
- */
- tp2 = (2 * get_sclk() / 10000000) << 8;
- /* OTP_TP3 = magic constant */
- tp3 = (0x1401) << 15;
- timing = tp1 | tp2 | tp3;
- }
-
- bfrom_OtpCommand(OTP_INIT, write ? timing : timing & ~(-1 << 15));
-}
-
-int do_otp(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
-{
- char *cmd;
- uint32_t ret, base_flags;
- bool prompt_user, force_read;
- uint32_t (*otp_func)(uint32_t page, uint32_t flags, uint64_t *page_content);
-
- if (argc < 4) {
- usage:
- return CMD_RET_USAGE;
- }
-
- prompt_user = false;
- base_flags = 0;
- cmd = argv[1];
- if (!strcmp(cmd, "read"))
- otp_func = bfrom_OtpRead;
- else if (!strcmp(cmd, "dump")) {
- otp_func = bfrom_OtpRead;
- force_read = true;
- } else if (!strcmp(cmd, "write")) {
- otp_func = bfrom_OtpWrite;
- base_flags = OTP_CHECK_FOR_PREV_WRITE;
- if (!strcmp(argv[2], "--force")) {
- argv++;
- --argc;
- } else
- prompt_user = false;
- } else if (!strcmp(cmd, "lock")) {
- if (argc != 4)
- goto usage;
- otp_func = bfrom_OtpWrite;
- base_flags = OTP_LOCK;
- } else
- goto usage;
-
- uint64_t *addr = (uint64_t *)simple_strtoul(argv[2], NULL, 16);
- uint32_t page = simple_strtoul(argv[3], NULL, 16);
- uint32_t flags;
- size_t i, count;
- ulong half;
-
- if (argc > 4)
- count = simple_strtoul(argv[4], NULL, 16);
- else
- count = 2;
-
- if (argc > 5) {
- half = simple_strtoul(argv[5], NULL, 16);
- if (half != 0 && half != 1) {
- puts("Error: 'half' can only be '0' or '1'\n");
- goto usage;
- }
- } else
- half = 0;
-
- /* "otp lock" has slightly different semantics */
- if (base_flags & OTP_LOCK) {
- count = page;
- page = (uint32_t)addr;
- addr = NULL;
- }
-
- /* do to the nature of OTP, make sure users are sure */
- if (prompt_user) {
- printf(
- "Writing one time programmable memory\n"
- "Make sure your operating voltages and temperature are within spec\n"
- " source address: 0x%p\n"
- " OTP destination: %s page 0x%03X - %s page 0x%03lX\n"
- " number to write: %lu halfpages\n"
- " type \"YES\" (no quotes) to confirm: ",
- addr,
- lowup(half), page,
- lowup(half + count - 1), page + (half + count - 1) / 2,
- half + count
- );
- if (!confirm_yesno()) {
- printf(" Aborting\n");
- return 1;
- }
- }
-
- printf("OTP memory %s: addr 0x%p page 0x%03X count %zu ... ",
- cmd, addr, page, count);
-
- set_otp_timing(otp_func == bfrom_OtpWrite);
- if (otp_func == bfrom_OtpWrite && check_voltage()) {
- puts("ERROR: VDDINT voltage is out of spec for writing\n");
- return -1;
- }
-
- /* Do the actual reading/writing stuff */
- ret = 0;
- for (i = half; i < count + half; ++i) {
- flags = base_flags | (i % 2 ? OTP_UPPER_HALF : OTP_LOWER_HALF);
- try_again:
- ret = otp_func(page, flags, addr);
- if (ret & OTP_MASTER_ERROR) {
- if (force_read) {
- if (flags & OTP_NO_ECC)
- break;
- else
- flags |= OTP_NO_ECC;
- puts("E");
- goto try_again;
- } else
- break;
- } else if (ret)
- puts("W");
- else
- puts(".");
- if (!(base_flags & OTP_LOCK)) {
- ++addr;
- if (i % 2)
- ++page;
- } else
- ++page;
- }
- if (ret & 0x1)
- printf("\nERROR at page 0x%03X (%s-halfpage): 0x%03X: %s\n",
- page, lowup(i), ret, otp_strerror(ret));
- else
- puts(" done\n");
-
- /* Make sure we disable writing */
- set_otp_timing(false);
- bfrom_OtpCommand(OTP_CLOSE, 0);
-
- return ret;
-}
-
-U_BOOT_CMD(
- otp, 7, 0, do_otp,
- "One-Time-Programmable sub-system",
- "read <addr> <page> [count] [half]\n"
- " - read 'count' half-pages starting at 'page' (offset 'half') to 'addr'\n"
- "otp dump <addr> <page> [count] [half]\n"
- " - like 'otp read', but skip read errors\n"
- "otp write [--force] <addr> <page> [count] [half]\n"
- " - write 'count' half-pages starting at 'page' (offset 'half') from 'addr'\n"
- "otp lock <page> <count>\n"
- " - lock 'count' pages starting at 'page'"
-);
diff --git a/cmd/softswitch.c b/cmd/softswitch.c
deleted file mode 100644
index f75d926770f..00000000000
--- a/cmd/softswitch.c
+++ /dev/null
@@ -1,41 +0,0 @@
-/*
- * cmd_softswitch.c - set the softswitch for bf60x
- *
- * Copyright (c) 2012 Analog Devices Inc.
- *
- * Licensed under the GPL-2 or later.
- */
-
-#include <common.h>
-#include <command.h>
-#include <asm/blackfin.h>
-#include <asm/soft_switch.h>
-
-int do_softswitch(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
-{
- int switchaddr, value, pin, port;
-
- if (argc != 5)
- return CMD_RET_USAGE;
-
- if (strcmp(argv[2], "GPA") == 0)
- port = IO_PORT_A;
- else if (strcmp(argv[2], "GPB") == 0)
- port = IO_PORT_B;
- else
- return CMD_RET_USAGE;
-
- switchaddr = simple_strtoul(argv[1], NULL, 16);
- pin = simple_strtoul(argv[3], NULL, 16);
- value = simple_strtoul(argv[4], NULL, 16);
-
- config_switch_bit(switchaddr, port, (1 << pin), IO_PORT_OUTPUT, value);
-
- return 0;
-}
-
-U_BOOT_CMD(
- softswitch_output, 5, 1, do_softswitch,
- "switchaddr GPA/GPB pin_offset value",
- ""
-);
diff --git a/cmd/spibootldr.c b/cmd/spibootldr.c
deleted file mode 100644
index acbb0f69697..00000000000
--- a/cmd/spibootldr.c
+++ /dev/null
@@ -1,37 +0,0 @@
-/*
- * U-Boot - spibootldr.c
- *
- * Copyright (c) 2005-2008 Analog Devices Inc.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * Licensed under the GPL-2 or later.
- */
-
-#include <common.h>
-#include <command.h>
-
-#include <asm/blackfin.h>
-#include <asm/mach-common/bits/bootrom.h>
-
-int do_spibootldr(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
-{
- s32 addr;
-
- /* Get the address */
- if (argc < 2)
- addr = 0;
- else
- addr = simple_strtoul(argv[1], NULL, 16);
-
- printf("## Booting ldr image at SPI offset 0x%x ...\n", addr);
-
- return bfrom_SpiBoot(addr, BFLAG_PERIPHERAL | 4, 0, NULL);
-}
-
-U_BOOT_CMD(
- spibootldr, 2, 0, do_spibootldr,
- "boot ldr image from spi",
- "[offset]\n"
- " - boot ldr image stored at offset into spi\n");
--
GitLab
From 90d6500c0f90dd6e9aa770a5d8faf88bb34440ea Mon Sep 17 00:00:00 2001
From: Masahiro Yamada <yamada.masahiro@socionext.com>
Date: Fri, 14 Apr 2017 10:55:00 +0900
Subject: [PATCH 070/282] drivers: remove Blackfin specific drivers
These drivers have no user since commit ea3310e8aafa ("Blackfin:
Remove").
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Acked-by: Michal Simek <michal.simek@xilinx.com>
Acked-by: Jaehoon Chung <jh80.chung@samsung.com>
---
drivers/block/Makefile | 1 -
drivers/block/pata_bfin.c | 1209 ----------------------------------
drivers/block/pata_bfin.h | 170 -----
drivers/mmc/Makefile | 1 -
drivers/mmc/bfin_sdh.c | 306 ---------
drivers/mtd/nand/Makefile | 1 -
drivers/mtd/nand/bfin_nand.c | 394 -----------
drivers/net/Makefile | 1 -
drivers/net/bfin_mac.c | 519 ---------------
drivers/net/bfin_mac.h | 65 --
drivers/rtc/Makefile | 1 -
drivers/rtc/bfin_rtc.c | 121 ----
drivers/watchdog/Makefile | 1 -
drivers/watchdog/bfin_wdt.c | 27 -
14 files changed, 2817 deletions(-)
delete mode 100644 drivers/block/pata_bfin.c
delete mode 100644 drivers/block/pata_bfin.h
delete mode 100644 drivers/mmc/bfin_sdh.c
delete mode 100644 drivers/mtd/nand/bfin_nand.c
delete mode 100644 drivers/net/bfin_mac.c
delete mode 100644 drivers/net/bfin_mac.h
delete mode 100644 drivers/rtc/bfin_rtc.c
delete mode 100644 drivers/watchdog/bfin_wdt.c
diff --git a/drivers/block/Makefile b/drivers/block/Makefile
index a72feecd545..f415b3371bb 100644
--- a/drivers/block/Makefile
+++ b/drivers/block/Makefile
@@ -20,7 +20,6 @@ obj-$(CONFIG_IDE_FTIDE020) += ftide020.o
obj-$(CONFIG_LIBATA) += libata.o
obj-$(CONFIG_MVSATA_IDE) += mvsata_ide.o
obj-$(CONFIG_MX51_PATA) += mxc_ata.o
-obj-$(CONFIG_PATA_BFIN) += pata_bfin.o
obj-$(CONFIG_SATA_CEVA) += sata_ceva.o
obj-$(CONFIG_SATA_DWC) += sata_dwc.o
obj-$(CONFIG_SATA_MV) += sata_mv.o
diff --git a/drivers/block/pata_bfin.c b/drivers/block/pata_bfin.c
deleted file mode 100644
index 36a15125ad2..00000000000
--- a/drivers/block/pata_bfin.c
+++ /dev/null
@@ -1,1209 +0,0 @@
-/*
- * Driver for Blackfin on-chip ATAPI controller.
- *
- * Enter bugs at http://blackfin.uclinux.org/
- *
- * Copyright (c) 2008 Analog Devices Inc.
- *
- * Licensed under the GPL-2 or later.
- */
-
-#include <common.h>
-#include <command.h>
-#include <config.h>
-#include <asm/byteorder.h>
-#include <asm/clock.h>
-#include <asm/io.h>
-#include <linux/errno.h>
-#include <asm/portmux.h>
-#include <asm/mach-common/bits/pata.h>
-#include <ata.h>
-#include <sata.h>
-#include <libata.h>
-#include "pata_bfin.h"
-
-static struct ata_port port[CONFIG_SYS_SATA_MAX_DEVICE];
-
-/**
- * PIO Mode - Frequency compatibility
- */
-/* mode: 0 1 2 3 4 */
-static const u32 pio_fsclk[] =
-{ 33333333, 33333333, 33333333, 33333333, 33333333 };
-
-/**
- * MDMA Mode - Frequency compatibility
- */
-/* mode: 0 1 2 */
-static const u32 mdma_fsclk[] = { 33333333, 33333333, 33333333 };
-
-/**
- * UDMA Mode - Frequency compatibility
- *
- * UDMA5 - 100 MB/s - SCLK = 133 MHz
- * UDMA4 - 66 MB/s - SCLK >= 80 MHz
- * UDMA3 - 44.4 MB/s - SCLK >= 50 MHz
- * UDMA2 - 33 MB/s - SCLK >= 40 MHz
- */
-/* mode: 0 1 2 3 4 5 */
-static const u32 udma_fsclk[] =
-{ 33333333, 33333333, 40000000, 50000000, 80000000, 133333333 };
-
-/**
- * Register transfer timing table
- */
-/* mode: 0 1 2 3 4 */
-/* Cycle Time */
-static const u32 reg_t0min[] = { 600, 383, 330, 180, 120 };
-/* DIOR/DIOW to end cycle */
-static const u32 reg_t2min[] = { 290, 290, 290, 70, 25 };
-/* DIOR/DIOW asserted pulse width */
-static const u32 reg_teocmin[] = { 290, 290, 290, 80, 70 };
-
-/**
- * PIO timing table
- */
-/* mode: 0 1 2 3 4 */
-/* Cycle Time */
-static const u32 pio_t0min[] = { 600, 383, 240, 180, 120 };
-/* Address valid to DIOR/DIORW */
-static const u32 pio_t1min[] = { 70, 50, 30, 30, 25 };
-/* DIOR/DIOW to end cycle */
-static const u32 pio_t2min[] = { 165, 125, 100, 80, 70 };
-/* DIOR/DIOW asserted pulse width */
-static const u32 pio_teocmin[] = { 165, 125, 100, 70, 25 };
-/* DIOW data hold */
-static const u32 pio_t4min[] = { 30, 20, 15, 10, 10 };
-
-/* ******************************************************************
- * Multiword DMA timing table
- * ******************************************************************
- */
-/* mode: 0 1 2 */
-/* Cycle Time */
-static const u32 mdma_t0min[] = { 480, 150, 120 };
-/* DIOR/DIOW asserted pulse width */
-static const u32 mdma_tdmin[] = { 215, 80, 70 };
-/* DMACK to read data released */
-static const u32 mdma_thmin[] = { 20, 15, 10 };
-/* DIOR/DIOW to DMACK hold */
-static const u32 mdma_tjmin[] = { 20, 5, 5 };
-/* DIOR negated pulse width */
-static const u32 mdma_tkrmin[] = { 50, 50, 25 };
-/* DIOR negated pulse width */
-static const u32 mdma_tkwmin[] = { 215, 50, 25 };
-/* CS[1:0] valid to DIOR/DIOW */
-static const u32 mdma_tmmin[] = { 50, 30, 25 };
-/* DMACK to read data released */
-static const u32 mdma_tzmax[] = { 20, 25, 25 };
-
-/**
- * Ultra DMA timing table
- */
-/* mode: 0 1 2 3 4 5 */
-static const u32 udma_tcycmin[] = { 112, 73, 54, 39, 25, 17 };
-static const u32 udma_tdvsmin[] = { 70, 48, 31, 20, 7, 5 };
-static const u32 udma_tenvmax[] = { 70, 70, 70, 55, 55, 50 };
-static const u32 udma_trpmin[] = { 160, 125, 100, 100, 100, 85 };
-static const u32 udma_tmin[] = { 5, 5, 5, 5, 3, 3 };
-
-
-static const u32 udma_tmlimin = 20;
-static const u32 udma_tzahmin = 20;
-static const u32 udma_tenvmin = 20;
-static const u32 udma_tackmin = 20;
-static const u32 udma_tssmin = 50;
-
-static void msleep(int count)
-{
- int i;
-
- for (i = 0; i < count; i++)
- udelay(1000);
-}
-
-/**
- *
- * Function: num_clocks_min
- *
- * Description:
- * calculate number of SCLK cycles to meet minimum timing
- */
-static unsigned short num_clocks_min(unsigned long tmin,
- unsigned long fsclk)
-{
- unsigned long tmp ;
- unsigned short result;
-
- tmp = tmin * (fsclk/1000/1000) / 1000;
- result = (unsigned short)tmp;
- if ((tmp*1000*1000) < (tmin*(fsclk/1000)))
- result++;
-
- return result;
-}
-
-/**
- * bfin_set_piomode - Initialize host controller PATA PIO timings
- * @ap: Port whose timings we are configuring
- * @pio_mode: mode
- *
- * Set PIO mode for device.
- *
- * LOCKING:
- * None (inherited from caller).
- */
-
-static void bfin_set_piomode(struct ata_port *ap, int pio_mode)
-{
- int mode = pio_mode - XFER_PIO_0;
- void __iomem *base = (void __iomem *)ap->ioaddr.ctl_addr;
- unsigned int fsclk = get_sclk();
- unsigned short teoc_reg, t2_reg, teoc_pio;
- unsigned short t4_reg, t2_pio, t1_reg;
- unsigned short n0, n6, t6min = 5;
-
- /* the most restrictive timing value is t6 and tc, the DIOW - data hold
- * If one SCLK pulse is longer than this minimum value then register
- * transfers cannot be supported at this frequency.
- */
- n6 = num_clocks_min(t6min, fsclk);
- if (mode >= 0 && mode <= 4 && n6 >= 1) {
- debug("set piomode: mode=%d, fsclk=%ud\n", mode, fsclk);
- /* calculate the timing values for register transfers. */
- while (mode > 0 && pio_fsclk[mode] > fsclk)
- mode--;
-
- /* DIOR/DIOW to end cycle time */
- t2_reg = num_clocks_min(reg_t2min[mode], fsclk);
- /* DIOR/DIOW asserted pulse width */
- teoc_reg = num_clocks_min(reg_teocmin[mode], fsclk);
- /* Cycle Time */
- n0 = num_clocks_min(reg_t0min[mode], fsclk);
-
- /* increase t2 until we meed the minimum cycle length */
- if (t2_reg + teoc_reg < n0)
- t2_reg = n0 - teoc_reg;
-
- /* calculate the timing values for pio transfers. */
-
- /* DIOR/DIOW to end cycle time */
- t2_pio = num_clocks_min(pio_t2min[mode], fsclk);
- /* DIOR/DIOW asserted pulse width */
- teoc_pio = num_clocks_min(pio_teocmin[mode], fsclk);
- /* Cycle Time */
- n0 = num_clocks_min(pio_t0min[mode], fsclk);
-
- /* increase t2 until we meed the minimum cycle length */
- if (t2_pio + teoc_pio < n0)
- t2_pio = n0 - teoc_pio;
-
- /* Address valid to DIOR/DIORW */
- t1_reg = num_clocks_min(pio_t1min[mode], fsclk);
-
- /* DIOW data hold */
- t4_reg = num_clocks_min(pio_t4min[mode], fsclk);
-
- ATAPI_SET_REG_TIM_0(base, (teoc_reg<<8 | t2_reg));
- ATAPI_SET_PIO_TIM_0(base, (t4_reg<<12 | t2_pio<<4 | t1_reg));
- ATAPI_SET_PIO_TIM_1(base, teoc_pio);
- if (mode > 2) {
- ATAPI_SET_CONTROL(base,
- ATAPI_GET_CONTROL(base) | IORDY_EN);
- } else {
- ATAPI_SET_CONTROL(base,
- ATAPI_GET_CONTROL(base) & ~IORDY_EN);
- }
-
- /* Disable host ATAPI PIO interrupts */
- ATAPI_SET_INT_MASK(base, ATAPI_GET_INT_MASK(base)
- & ~(PIO_DONE_MASK | HOST_TERM_XFER_MASK));
- SSYNC();
- }
-}
-
-/**
- *
- * Function: wait_complete
- *
- * Description: Waits the interrupt from device
- *
- */
-static inline void wait_complete(void __iomem *base, unsigned short mask)
-{
- unsigned short status;
- unsigned int i = 0;
-
- for (i = 0; i < PATA_BFIN_WAIT_TIMEOUT; i++) {
- status = ATAPI_GET_INT_STATUS(base) & mask;
- if (status)
- break;
- }
-
- ATAPI_SET_INT_STATUS(base, mask);
-}
-
-/**
- *
- * Function: write_atapi_register
- *
- * Description: Writes to ATA Device Resgister
- *
- */
-
-static void write_atapi_register(void __iomem *base,
- unsigned long ata_reg, unsigned short value)
-{
- /* Program the ATA_DEV_TXBUF register with write data (to be
- * written into the device).
- */
- ATAPI_SET_DEV_TXBUF(base, value);
-
- /* Program the ATA_DEV_ADDR register with address of the
- * device register (0x01 to 0x0F).
- */
- ATAPI_SET_DEV_ADDR(base, ata_reg);
-
- /* Program the ATA_CTRL register with dir set to write (1)
- */
- ATAPI_SET_CONTROL(base, (ATAPI_GET_CONTROL(base) | XFER_DIR));
-
- /* ensure PIO DMA is not set */
- ATAPI_SET_CONTROL(base, (ATAPI_GET_CONTROL(base) & ~PIO_USE_DMA));
-
- /* and start the transfer */
- ATAPI_SET_CONTROL(base, (ATAPI_GET_CONTROL(base) | PIO_START));
-
- /* Wait for the interrupt to indicate the end of the transfer.
- * (We need to wait on and clear rhe ATA_DEV_INT interrupt status)
- */
- wait_complete(base, PIO_DONE_INT);
-}
-
-/**
- *
- * Function: read_atapi_register
- *
- *Description: Reads from ATA Device Resgister
- *
- */
-
-static unsigned short read_atapi_register(void __iomem *base,
- unsigned long ata_reg)
-{
- /* Program the ATA_DEV_ADDR register with address of the
- * device register (0x01 to 0x0F).
- */
- ATAPI_SET_DEV_ADDR(base, ata_reg);
-
- /* Program the ATA_CTRL register with dir set to read (0) and
- */
- ATAPI_SET_CONTROL(base, (ATAPI_GET_CONTROL(base) & ~XFER_DIR));
-
- /* ensure PIO DMA is not set */
- ATAPI_SET_CONTROL(base, (ATAPI_GET_CONTROL(base) & ~PIO_USE_DMA));
-
- /* and start the transfer */
- ATAPI_SET_CONTROL(base, (ATAPI_GET_CONTROL(base) | PIO_START));
-
- /* Wait for the interrupt to indicate the end of the transfer.
- * (PIO_DONE interrupt is set and it doesn't seem to matter
- * that we don't clear it)
- */
- wait_complete(base, PIO_DONE_INT);
-
- /* Read the ATA_DEV_RXBUF register with write data (to be
- * written into the device).
- */
- return ATAPI_GET_DEV_RXBUF(base);
-}
-
-/**
- *
- * Function: write_atapi_register_data
- *
- * Description: Writes to ATA Device Resgister
- *
- */
-
-static void write_atapi_data(void __iomem *base,
- int len, unsigned short *buf)
-{
- int i;
-
- /* Set transfer length to 1 */
- ATAPI_SET_XFER_LEN(base, 1);
-
- /* Program the ATA_DEV_ADDR register with address of the
- * ATA_REG_DATA
- */
- ATAPI_SET_DEV_ADDR(base, ATA_REG_DATA);
-
- /* Program the ATA_CTRL register with dir set to write (1)
- */
- ATAPI_SET_CONTROL(base, (ATAPI_GET_CONTROL(base) | XFER_DIR));
-
- /* ensure PIO DMA is not set */
- ATAPI_SET_CONTROL(base, (ATAPI_GET_CONTROL(base) & ~PIO_USE_DMA));
-
- for (i = 0; i < len; i++) {
- /* Program the ATA_DEV_TXBUF register with write data (to be
- * written into the device).
- */
- ATAPI_SET_DEV_TXBUF(base, buf[i]);
-
- /* and start the transfer */
- ATAPI_SET_CONTROL(base, (ATAPI_GET_CONTROL(base) | PIO_START));
-
- /* Wait for the interrupt to indicate the end of the transfer.
- * (We need to wait on and clear rhe ATA_DEV_INT
- * interrupt status)
- */
- wait_complete(base, PIO_DONE_INT);
- }
-}
-
-/**
- *
- * Function: read_atapi_register_data
- *
- * Description: Reads from ATA Device Resgister
- *
- */
-
-static void read_atapi_data(void __iomem *base,
- int len, unsigned short *buf)
-{
- int i;
-
- /* Set transfer length to 1 */
- ATAPI_SET_XFER_LEN(base, 1);
-
- /* Program the ATA_DEV_ADDR register with address of the
- * ATA_REG_DATA
- */
- ATAPI_SET_DEV_ADDR(base, ATA_REG_DATA);
-
- /* Program the ATA_CTRL register with dir set to read (0) and
- */
- ATAPI_SET_CONTROL(base, (ATAPI_GET_CONTROL(base) & ~XFER_DIR));
-
- /* ensure PIO DMA is not set */
- ATAPI_SET_CONTROL(base, (ATAPI_GET_CONTROL(base) & ~PIO_USE_DMA));
-
- for (i = 0; i < len; i++) {
- /* and start the transfer */
- ATAPI_SET_CONTROL(base, (ATAPI_GET_CONTROL(base) | PIO_START));
-
- /* Wait for the interrupt to indicate the end of the transfer.
- * (PIO_DONE interrupt is set and it doesn't seem to matter
- * that we don't clear it)
- */
- wait_complete(base, PIO_DONE_INT);
-
- /* Read the ATA_DEV_RXBUF register with write data (to be
- * written into the device).
- */
- buf[i] = ATAPI_GET_DEV_RXBUF(base);
- }
-}
-
-/**
- * bfin_check_status - Read device status reg & clear interrupt
- * @ap: port where the device is
- *
- * Note: Original code is ata_check_status().
- */
-
-static u8 bfin_check_status(struct ata_port *ap)
-{
- void __iomem *base = (void __iomem *)ap->ioaddr.ctl_addr;
- return read_atapi_register(base, ATA_REG_STATUS);
-}
-
-/**
- * bfin_check_altstatus - Read device alternate status reg
- * @ap: port where the device is
- */
-
-static u8 bfin_check_altstatus(struct ata_port *ap)
-{
- void __iomem *base = (void __iomem *)ap->ioaddr.ctl_addr;
- return read_atapi_register(base, ATA_REG_ALTSTATUS);
-}
-
-/**
- * bfin_ata_busy_wait - Wait for a port status register
- * @ap: Port to wait for.
- * @bits: bits that must be clear
- * @max: number of 10uS waits to perform
- *
- * Waits up to max*10 microseconds for the selected bits in the port's
- * status register to be cleared.
- * Returns final value of status register.
- *
- * LOCKING:
- * Inherited from caller.
- */
-static inline u8 bfin_ata_busy_wait(struct ata_port *ap, unsigned int bits,
- unsigned int max, u8 usealtstatus)
-{
- u8 status;
-
- do {
- udelay(10);
- if (usealtstatus)
- status = bfin_check_altstatus(ap);
- else
- status = bfin_check_status(ap);
- max--;
- } while (status != 0xff && (status & bits) && (max > 0));
-
- return status;
-}
-
-/**
- * bfin_ata_busy_sleep - sleep until BSY clears, or timeout
- * @ap: port containing status register to be polled
- * @tmout_pat: impatience timeout in msecs
- * @tmout: overall timeout in msecs
- *
- * Sleep until ATA Status register bit BSY clears,
- * or a timeout occurs.
- *
- * RETURNS:
- * 0 on success, -errno otherwise.
- */
-static int bfin_ata_busy_sleep(struct ata_port *ap,
- long tmout_pat, unsigned long tmout)
-{
- u8 status;
-
- status = bfin_ata_busy_wait(ap, ATA_BUSY, 300, 0);
- while (status != 0xff && (status & ATA_BUSY) && tmout_pat > 0) {
- msleep(50);
- tmout_pat -= 50;
- status = bfin_ata_busy_wait(ap, ATA_BUSY, 3, 0);
- }
-
- if (status != 0xff && (status & ATA_BUSY))
- printf("port is slow to respond, please be patient "
- "(Status 0x%x)\n", status);
-
- while (status != 0xff && (status & ATA_BUSY) && tmout_pat > 0) {
- msleep(50);
- tmout_pat -= 50;
- status = bfin_check_status(ap);
- }
-
- if (status == 0xff)
- return -ENODEV;
-
- if (status & ATA_BUSY) {
- printf("port failed to respond "
- "(%lu secs, Status 0x%x)\n",
- DIV_ROUND_UP(tmout, 1000), status);
- return -EBUSY;
- }
-
- return 0;
-}
-
-/**
- * bfin_dev_select - Select device 0/1 on ATA bus
- * @ap: ATA channel to manipulate
- * @device: ATA device (numbered from zero) to select
- *
- * Note: Original code is ata_sff_dev_select().
- */
-
-static void bfin_dev_select(struct ata_port *ap, unsigned int device)
-{
- void __iomem *base = (void __iomem *)ap->ioaddr.ctl_addr;
- u8 tmp;
-
-
- if (device == 0)
- tmp = ATA_DEVICE_OBS;
- else
- tmp = ATA_DEVICE_OBS | ATA_DEV1;
-
- write_atapi_register(base, ATA_REG_DEVICE, tmp);
- udelay(1);
-}
-
-/**
- * bfin_devchk - PATA device presence detection
- * @ap: ATA channel to examine
- * @device: Device to examine (starting at zero)
- *
- * Note: Original code is ata_devchk().
- */
-
-static unsigned int bfin_devchk(struct ata_port *ap,
- unsigned int device)
-{
- void __iomem *base = (void __iomem *)ap->ioaddr.ctl_addr;
- u8 nsect, lbal;
-
- bfin_dev_select(ap, device);
-
- write_atapi_register(base, ATA_REG_NSECT, 0x55);
- write_atapi_register(base, ATA_REG_LBAL, 0xaa);
-
- write_atapi_register(base, ATA_REG_NSECT, 0xaa);
- write_atapi_register(base, ATA_REG_LBAL, 0x55);
-
- write_atapi_register(base, ATA_REG_NSECT, 0x55);
- write_atapi_register(base, ATA_REG_LBAL, 0xaa);
-
- nsect = read_atapi_register(base, ATA_REG_NSECT);
- lbal = read_atapi_register(base, ATA_REG_LBAL);
-
- if ((nsect == 0x55) && (lbal == 0xaa))
- return 1; /* we found a device */
-
- return 0; /* nothing found */
-}
-
-/**
- * bfin_bus_post_reset - PATA device post reset
- *
- * Note: Original code is ata_bus_post_reset().
- */
-
-static void bfin_bus_post_reset(struct ata_port *ap, unsigned int devmask)
-{
- void __iomem *base = (void __iomem *)ap->ioaddr.ctl_addr;
- unsigned int dev0 = devmask & (1 << 0);
- unsigned int dev1 = devmask & (1 << 1);
- long deadline;
-
- /* if device 0 was found in ata_devchk, wait for its
- * BSY bit to clear
- */
- if (dev0)
- bfin_ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT);
-
- /* if device 1 was found in ata_devchk, wait for
- * register access, then wait for BSY to clear
- */
- deadline = ATA_TMOUT_BOOT;
- while (dev1) {
- u8 nsect, lbal;
-
- bfin_dev_select(ap, 1);
- nsect = read_atapi_register(base, ATA_REG_NSECT);
- lbal = read_atapi_register(base, ATA_REG_LBAL);
- if ((nsect == 1) && (lbal == 1))
- break;
- if (deadline <= 0) {
- dev1 = 0;
- break;
- }
- msleep(50); /* give drive a breather */
- deadline -= 50;
- }
- if (dev1)
- bfin_ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT);
-
- /* is all this really necessary? */
- bfin_dev_select(ap, 0);
- if (dev1)
- bfin_dev_select(ap, 1);
- if (dev0)
- bfin_dev_select(ap, 0);
-}
-
-/**
- * bfin_bus_softreset - PATA device software reset
- *
- * Note: Original code is ata_bus_softreset().
- */
-
-static unsigned int bfin_bus_softreset(struct ata_port *ap,
- unsigned int devmask)
-{
- void __iomem *base = (void __iomem *)ap->ioaddr.ctl_addr;
-
- /* software reset. causes dev0 to be selected */
- write_atapi_register(base, ATA_REG_CTRL, ap->ctl_reg);
- udelay(20);
- write_atapi_register(base, ATA_REG_CTRL, ap->ctl_reg | ATA_SRST);
- udelay(20);
- write_atapi_register(base, ATA_REG_CTRL, ap->ctl_reg);
-
- /* spec mandates ">= 2ms" before checking status.
- * We wait 150ms, because that was the magic delay used for
- * ATAPI devices in Hale Landis's ATADRVR, for the period of time
- * between when the ATA command register is written, and then
- * status is checked. Because waiting for "a while" before
- * checking status is fine, post SRST, we perform this magic
- * delay here as well.
- *
- * Old drivers/ide uses the 2mS rule and then waits for ready
- */
- msleep(150);
-
- /* Before we perform post reset processing we want to see if
- * the bus shows 0xFF because the odd clown forgets the D7
- * pulldown resistor.
- */
- if (bfin_check_status(ap) == 0xFF)
- return 0;
-
- bfin_bus_post_reset(ap, devmask);
-
- return 0;
-}
-
-/**
- * bfin_softreset - reset host port via ATA SRST
- * @ap: port to reset
- *
- * Note: Original code is ata_sff_softreset().
- */
-
-static int bfin_softreset(struct ata_port *ap)
-{
- unsigned int err_mask;
-
- ap->dev_mask = 0;
-
- /* determine if device 0/1 are present.
- * only one device is supported on one port by now.
- */
- if (bfin_devchk(ap, 0))
- ap->dev_mask |= (1 << 0);
- else if (bfin_devchk(ap, 1))
- ap->dev_mask |= (1 << 1);
- else
- return -ENODEV;
-
- /* select device 0 again */
- bfin_dev_select(ap, 0);
-
- /* issue bus reset */
- err_mask = bfin_bus_softreset(ap, ap->dev_mask);
- if (err_mask) {
- printf("SRST failed (err_mask=0x%x)\n",
- err_mask);
- ap->dev_mask = 0;
- return -EIO;
- }
-
- return 0;
-}
-
-/**
- * bfin_irq_clear - Clear ATAPI interrupt.
- * @ap: Port associated with this ATA transaction.
- *
- * Note: Original code is ata_sff_irq_clear().
- */
-
-static void bfin_irq_clear(struct ata_port *ap)
-{
- void __iomem *base = (void __iomem *)ap->ioaddr.ctl_addr;
-
- ATAPI_SET_INT_STATUS(base, ATAPI_GET_INT_STATUS(base)|ATAPI_DEV_INT
- | MULTI_DONE_INT | UDMAIN_DONE_INT | UDMAOUT_DONE_INT
- | MULTI_TERM_INT | UDMAIN_TERM_INT | UDMAOUT_TERM_INT);
-}
-
-static u8 bfin_wait_for_irq(struct ata_port *ap, unsigned int max)
-{
- void __iomem *base = (void __iomem *)ap->ioaddr.ctl_addr;
-
- do {
- if (ATAPI_GET_INT_STATUS(base) & (ATAPI_DEV_INT
- | MULTI_DONE_INT | UDMAIN_DONE_INT | UDMAOUT_DONE_INT
- | MULTI_TERM_INT | UDMAIN_TERM_INT | UDMAOUT_TERM_INT)) {
- break;
- }
- udelay(1000);
- max--;
- } while ((max > 0));
-
- return max == 0;
-}
-
-/**
- * bfin_ata_reset_port - initialize BFIN ATAPI port.
- */
-
-static int bfin_ata_reset_port(struct ata_port *ap)
-{
- void __iomem *base = (void __iomem *)ap->ioaddr.ctl_addr;
- int count;
- unsigned short status;
-
- /* Disable all ATAPI interrupts */
- ATAPI_SET_INT_MASK(base, 0);
- SSYNC();
-
- /* Assert the RESET signal 25us*/
- ATAPI_SET_CONTROL(base, ATAPI_GET_CONTROL(base) | DEV_RST);
- udelay(30);
-
- /* Negate the RESET signal for 2ms*/
- ATAPI_SET_CONTROL(base, ATAPI_GET_CONTROL(base) & ~DEV_RST);
- msleep(2);
-
- /* Wait on Busy flag to clear */
- count = 10000000;
- do {
- status = read_atapi_register(base, ATA_REG_STATUS);
- } while (--count && (status & ATA_BUSY));
-
- /* Enable only ATAPI Device interrupt */
- ATAPI_SET_INT_MASK(base, 1);
- SSYNC();
-
- return !count;
-}
-
-/**
- *
- * Function: bfin_config_atapi_gpio
- *
- * Description: Configures the ATAPI pins for use
- *
- */
-static int bfin_config_atapi_gpio(struct ata_port *ap)
-{
- const unsigned short pins[] = {
- P_ATAPI_RESET, P_ATAPI_DIOR, P_ATAPI_DIOW, P_ATAPI_CS0,
- P_ATAPI_CS1, P_ATAPI_DMACK, P_ATAPI_DMARQ, P_ATAPI_INTRQ,
- P_ATAPI_IORDY, P_ATAPI_D0A, P_ATAPI_D1A, P_ATAPI_D2A,
- P_ATAPI_D3A, P_ATAPI_D4A, P_ATAPI_D5A, P_ATAPI_D6A,
- P_ATAPI_D7A, P_ATAPI_D8A, P_ATAPI_D9A, P_ATAPI_D10A,
- P_ATAPI_D11A, P_ATAPI_D12A, P_ATAPI_D13A, P_ATAPI_D14A,
- P_ATAPI_D15A, P_ATAPI_A0A, P_ATAPI_A1A, P_ATAPI_A2A, 0,
- };
-
- peripheral_request_list(pins, "pata_bfin");
-
- return 0;
-}
-
-/**
- * bfin_atapi_probe - attach a bfin atapi interface
- * @pdev: platform device
- *
- * Register a bfin atapi interface.
- *
- *
- * Platform devices are expected to contain 2 resources per port:
- *
- * - I/O Base (IORESOURCE_IO)
- * - IRQ (IORESOURCE_IRQ)
- *
- */
-static int bfin_ata_probe_port(struct ata_port *ap)
-{
- if (bfin_config_atapi_gpio(ap)) {
- printf("Requesting Peripherals faild\n");
- return -EFAULT;
- }
-
- if (bfin_ata_reset_port(ap)) {
- printf("Fail to reset ATAPI device\n");
- return -EFAULT;
- }
-
- if (ap->ata_mode >= XFER_PIO_0 && ap->ata_mode <= XFER_PIO_4)
- bfin_set_piomode(ap, ap->ata_mode);
- else {
- printf("Given ATA data transfer mode is not supported.\n");
- return -EFAULT;
- }
-
- return 0;
-}
-
-#define ATA_SECTOR_WORDS (ATA_SECT_SIZE/2)
-
-static void bfin_ata_identify(struct ata_port *ap, int dev)
-{
- void __iomem *base = (void __iomem *)ap->ioaddr.ctl_addr;
- u8 status = 0;
- static u16 iobuf[ATA_SECTOR_WORDS];
- u64 n_sectors = 0;
- hd_driveid_t *iop = (hd_driveid_t *)iobuf;
-
- memset(iobuf, 0, sizeof(iobuf));
-
- if (!(ap->dev_mask & (1 << dev)))
- return;
-
- debug("port=%d dev=%d\n", ap->port_no, dev);
-
- bfin_dev_select(ap, dev);
-
- status = 0;
- /* Device Identify Command */
- write_atapi_register(base, ATA_REG_CMD, ATA_CMD_ID_ATA);
- bfin_check_altstatus(ap);
- udelay(10);
-
- status = bfin_ata_busy_wait(ap, ATA_BUSY, 1000, 0);
- if (status & ATA_ERR) {
- printf("\ndevice not responding\n");
- ap->dev_mask &= ~(1 << dev);
- return;
- }
-
- read_atapi_data(base, ATA_SECTOR_WORDS, iobuf);
-
- ata_swap_buf_le16(iobuf, ATA_SECTOR_WORDS);
-
- /* we require LBA and DMA support (bits 8 & 9 of word 49) */
- if (!ata_id_has_dma(iobuf) || !ata_id_has_lba(iobuf))
- printf("ata%u: no dma/lba\n", ap->port_no);
-
-#ifdef DEBUG
- ata_dump_id(iobuf);
-#endif
-
- n_sectors = ata_id_n_sectors(iobuf);
-
- if (n_sectors == 0) {
- ap->dev_mask &= ~(1 << dev);
- return;
- }
-
- ata_id_c_string(iobuf, (unsigned char *)sata_dev_desc[ap->port_no].revision,
- ATA_ID_FW_REV, sizeof(sata_dev_desc[ap->port_no].revision));
- ata_id_c_string(iobuf, (unsigned char *)sata_dev_desc[ap->port_no].vendor,
- ATA_ID_PROD, sizeof(sata_dev_desc[ap->port_no].vendor));
- ata_id_c_string(iobuf, (unsigned char *)sata_dev_desc[ap->port_no].product,
- ATA_ID_SERNO, sizeof(sata_dev_desc[ap->port_no].product));
-
- if ((iop->config & 0x0080) == 0x0080)
- sata_dev_desc[ap->port_no].removable = 1;
- else
- sata_dev_desc[ap->port_no].removable = 0;
-
- sata_dev_desc[ap->port_no].lba = (u32) n_sectors;
- debug("lba=0x%lx\n", sata_dev_desc[ap->port_no].lba);
-
-#ifdef CONFIG_LBA48
- if (iop->command_set_2 & 0x0400)
- sata_dev_desc[ap->port_no].lba48 = 1;
- else
- sata_dev_desc[ap->port_no].lba48 = 0;
-#endif
-
- /* assuming HD */
- sata_dev_desc[ap->port_no].type = DEV_TYPE_HARDDISK;
- sata_dev_desc[ap->port_no].blksz = ATA_SECT_SIZE;
- sata_dev_desc[ap->port_no].log2blksz =
- LOG2(sata_dev_desc[ap->port_no].blksz);
- sata_dev_desc[ap->port_no].lun = 0; /* just to fill something in... */
-
- printf("PATA device#%d %s is found on ata port#%d.\n",
- ap->port_no%PATA_DEV_NUM_PER_PORT,
- sata_dev_desc[ap->port_no].vendor,
- ap->port_no/PATA_DEV_NUM_PER_PORT);
-}
-
-static void bfin_ata_set_Feature_cmd(struct ata_port *ap, int dev)
-{
- void __iomem *base = (void __iomem *)ap->ioaddr.ctl_addr;
- u8 status = 0;
-
- if (!(ap->dev_mask & (1 << dev)))
- return;
-
- bfin_dev_select(ap, dev);
-
- write_atapi_register(base, ATA_REG_FEATURE, SETFEATURES_XFER);
- write_atapi_register(base, ATA_REG_NSECT, ap->ata_mode);
- write_atapi_register(base, ATA_REG_LBAL, 0);
- write_atapi_register(base, ATA_REG_LBAM, 0);
- write_atapi_register(base, ATA_REG_LBAH, 0);
-
- write_atapi_register(base, ATA_REG_DEVICE, ATA_DEVICE_OBS);
- write_atapi_register(base, ATA_REG_CMD, ATA_CMD_SET_FEATURES);
-
- udelay(50);
- msleep(150);
-
- status = bfin_ata_busy_wait(ap, ATA_BUSY, 5000, 0);
- if ((status & (ATA_BUSY | ATA_ERR))) {
- printf("Error : status 0x%02x\n", status);
- ap->dev_mask &= ~(1 << dev);
- }
-}
-
-int scan_sata(int dev)
-{
- /* dev is the index of each ata device in the system. one PATA port
- * contains 2 devices. one element in scan_done array indicates one
- * PATA port. device connected to one PATA port is selected by
- * bfin_dev_select() before access.
- */
- struct ata_port *ap = &port[dev];
- static int scan_done[(CONFIG_SYS_SATA_MAX_DEVICE+1)/PATA_DEV_NUM_PER_PORT];
-
- if (scan_done[dev/PATA_DEV_NUM_PER_PORT])
- return 0;
-
- /* Check for attached device */
- if (!bfin_ata_probe_port(ap)) {
- if (bfin_softreset(ap)) {
- /* soft reset failed, try a hard one */
- bfin_ata_reset_port(ap);
- if (bfin_softreset(ap))
- scan_done[dev/PATA_DEV_NUM_PER_PORT] = 1;
- } else {
- scan_done[dev/PATA_DEV_NUM_PER_PORT] = 1;
- }
- }
- if (scan_done[dev/PATA_DEV_NUM_PER_PORT]) {
- /* Probe device and set xfer mode */
- bfin_ata_identify(ap, dev%PATA_DEV_NUM_PER_PORT);
- bfin_ata_set_Feature_cmd(ap, dev%PATA_DEV_NUM_PER_PORT);
- part_init(&sata_dev_desc[dev]);
- return 0;
- }
-
- printf("PATA device#%d is not present on ATA port#%d.\n",
- ap->port_no%PATA_DEV_NUM_PER_PORT,
- ap->port_no/PATA_DEV_NUM_PER_PORT);
-
- return -1;
-}
-
-int init_sata(int dev)
-{
- struct ata_port *ap = &port[dev];
- static u8 init_done;
- int res = 1;
-
- if (init_done)
- return res;
-
- init_done = 1;
-
- switch (dev/PATA_DEV_NUM_PER_PORT) {
- case 0:
- ap->ioaddr.ctl_addr = ATAPI_CONTROL;
- ap->ata_mode = CONFIG_BFIN_ATA_MODE;
- break;
- default:
- printf("Tried to scan unknown port %d.\n", dev);
- return res;
- }
-
- if (ap->ata_mode < XFER_PIO_0 || ap->ata_mode > XFER_PIO_4) {
- ap->ata_mode = XFER_PIO_4;
- printf("DMA mode is not supported. Set to PIO mode 4.\n");
- }
-
- ap->port_no = dev;
- ap->ctl_reg = 0x8; /*Default value of control reg */
-
- res = 0;
- return res;
-}
-
-int reset_sata(int dev)
-{
- return 0;
-}
-
-/* Read up to 255 sectors
- *
- * Returns sectors read
-*/
-static u8 do_one_read(struct ata_port *ap, u64 blknr, u8 blkcnt, u16 *buffer,
- uchar lba48)
-{
- void __iomem *base = (void __iomem *)ap->ioaddr.ctl_addr;
- u8 sr = 0;
- u8 status;
- u16 err = 0;
-
- if (!(bfin_check_status(ap) & ATA_DRDY)) {
- printf("Device ata%d not ready\n", ap->port_no);
- return 0;
- }
-
- /* Set up transfer */
-#ifdef CONFIG_LBA48
- if (lba48) {
- /* write high bits */
- write_atapi_register(base, ATA_REG_NSECT, 0);
- write_atapi_register(base, ATA_REG_LBAL, (blknr >> 24) & 0xFF);
- write_atapi_register(base, ATA_REG_LBAM, (blknr >> 32) & 0xFF);
- write_atapi_register(base, ATA_REG_LBAH, (blknr >> 40) & 0xFF);
- }
-#endif
- write_atapi_register(base, ATA_REG_NSECT, blkcnt);
- write_atapi_register(base, ATA_REG_LBAL, (blknr >> 0) & 0xFF);
- write_atapi_register(base, ATA_REG_LBAM, (blknr >> 8) & 0xFF);
- write_atapi_register(base, ATA_REG_LBAH, (blknr >> 16) & 0xFF);
-
-#ifdef CONFIG_LBA48
- if (lba48) {
- write_atapi_register(base, ATA_REG_DEVICE, ATA_LBA);
- write_atapi_register(base, ATA_REG_CMD, ATA_CMD_PIO_READ_EXT);
- } else
-#endif
- {
- write_atapi_register(base, ATA_REG_DEVICE, ATA_LBA | ((blknr >> 24) & 0xF));
- write_atapi_register(base, ATA_REG_CMD, ATA_CMD_PIO_READ);
- }
- status = bfin_ata_busy_wait(ap, ATA_BUSY, 500000, 1);
-
- if (status & (ATA_BUSY | ATA_ERR)) {
- printf("Device %d not responding status 0x%x.\n", ap->port_no, status);
- err = read_atapi_register(base, ATA_REG_ERR);
- printf("Error reg = 0x%x\n", err);
- return sr;
- }
-
- while (blkcnt--) {
- if (bfin_wait_for_irq(ap, 500)) {
- printf("ata%u irq failed\n", ap->port_no);
- return sr;
- }
-
- status = bfin_check_status(ap);
- if (status & ATA_ERR) {
- err = read_atapi_register(base, ATA_REG_ERR);
- printf("ata%u error %d\n", ap->port_no, err);
- return sr;
- }
- bfin_irq_clear(ap);
-
- /* Read one sector */
- read_atapi_data(base, ATA_SECTOR_WORDS, buffer);
- buffer += ATA_SECTOR_WORDS;
- sr++;
- }
-
- return sr;
-}
-
-ulong sata_read(int dev, ulong block, lbaint_t blkcnt, void *buff)
-{
- struct ata_port *ap = &port[dev];
- ulong n = 0, sread;
- u16 *buffer = (u16 *) buff;
- u8 status = 0;
- u64 blknr = (u64) block;
- unsigned char lba48 = 0;
-
-#ifdef CONFIG_LBA48
- if (blknr > 0xfffffff) {
- if (!sata_dev_desc[dev].lba48) {
- printf("Drive doesn't support 48-bit addressing\n");
- return 0;
- }
- /* more than 28 bits used, use 48bit mode */
- lba48 = 1;
- }
-#endif
- bfin_dev_select(ap, dev%PATA_DEV_NUM_PER_PORT);
-
- while (blkcnt > 0) {
-
- if (blkcnt > 255)
- sread = 255;
- else
- sread = blkcnt;
-
- status = do_one_read(ap, blknr, sread, buffer, lba48);
- if (status != sread) {
- printf("Read failed\n");
- return n;
- }
-
- blkcnt -= sread;
- blknr += sread;
- n += sread;
- buffer += sread * ATA_SECTOR_WORDS;
- }
- return n;
-}
-
-ulong sata_write(int dev, ulong block, lbaint_t blkcnt, const void *buff)
-{
- struct ata_port *ap = &port[dev];
- void __iomem *base = (void __iomem *)ap->ioaddr.ctl_addr;
- ulong n = 0;
- u16 *buffer = (u16 *) buff;
- unsigned char status = 0;
- u64 blknr = (u64) block;
-#ifdef CONFIG_LBA48
- unsigned char lba48 = 0;
-
- if (blknr > 0xfffffff) {
- if (!sata_dev_desc[dev].lba48) {
- printf("Drive doesn't support 48-bit addressing\n");
- return 0;
- }
- /* more than 28 bits used, use 48bit mode */
- lba48 = 1;
- }
-#endif
-
- bfin_dev_select(ap, dev%PATA_DEV_NUM_PER_PORT);
-
- while (blkcnt-- > 0) {
- status = bfin_ata_busy_wait(ap, ATA_BUSY, 50000, 0);
- if (status & ATA_BUSY) {
- printf("ata%u failed to respond\n", ap->port_no);
- return n;
- }
-#ifdef CONFIG_LBA48
- if (lba48) {
- /* write high bits */
- write_atapi_register(base, ATA_REG_NSECT, 0);
- write_atapi_register(base, ATA_REG_LBAL,
- (blknr >> 24) & 0xFF);
- write_atapi_register(base, ATA_REG_LBAM,
- (blknr >> 32) & 0xFF);
- write_atapi_register(base, ATA_REG_LBAH,
- (blknr >> 40) & 0xFF);
- }
-#endif
- write_atapi_register(base, ATA_REG_NSECT, 1);
- write_atapi_register(base, ATA_REG_LBAL, (blknr >> 0) & 0xFF);
- write_atapi_register(base, ATA_REG_LBAM, (blknr >> 8) & 0xFF);
- write_atapi_register(base, ATA_REG_LBAH, (blknr >> 16) & 0xFF);
-#ifdef CONFIG_LBA48
- if (lba48) {
- write_atapi_register(base, ATA_REG_DEVICE, ATA_LBA);
- write_atapi_register(base, ATA_REG_CMD,
- ATA_CMD_PIO_WRITE_EXT);
- } else
-#endif
- {
- write_atapi_register(base, ATA_REG_DEVICE,
- ATA_LBA | ((blknr >> 24) & 0xF));
- write_atapi_register(base, ATA_REG_CMD,
- ATA_CMD_PIO_WRITE);
- }
-
- /*may take up to 5 sec */
- status = bfin_ata_busy_wait(ap, ATA_BUSY, 50000, 0);
- if ((status & (ATA_DRQ | ATA_BUSY | ATA_ERR)) != ATA_DRQ) {
- printf("Error no DRQ dev %d blk %ld: sts 0x%02x\n",
- ap->port_no, (ulong) blknr, status);
- return n;
- }
-
- write_atapi_data(base, ATA_SECTOR_WORDS, buffer);
- bfin_check_altstatus(ap);
- udelay(1);
-
- ++n;
- ++blknr;
- buffer += ATA_SECTOR_WORDS;
- }
- return n;
-}
diff --git a/drivers/block/pata_bfin.h b/drivers/block/pata_bfin.h
deleted file mode 100644
index b678f60b2d7..00000000000
--- a/drivers/block/pata_bfin.h
+++ /dev/null
@@ -1,170 +0,0 @@
-/*
- * Driver for Blackfin on-chip ATAPI controller.
- *
- * Enter bugs at http://blackfin.uclinux.org/
- *
- * Copyright (c) 2008 Analog Devices Inc.
- *
- * Licensed under the GPL-2 or later.
- */
-
-#ifndef PATA_BFIN_H
-#define PATA_BFIN_H
-
-#include <asm/blackfin_local.h>
-
-struct ata_ioports {
- unsigned long cmd_addr;
- unsigned long data_addr;
- unsigned long error_addr;
- unsigned long feature_addr;
- unsigned long nsect_addr;
- unsigned long lbal_addr;
- unsigned long lbam_addr;
- unsigned long lbah_addr;
- unsigned long device_addr;
- unsigned long status_addr;
- unsigned long command_addr;
- unsigned long altstatus_addr;
- unsigned long ctl_addr;
- unsigned long bmdma_addr;
- unsigned long scr_addr;
-};
-
-struct ata_port {
- unsigned int port_no; /* primary=0, secondary=1 */
- struct ata_ioports ioaddr; /* ATA cmd/ctl/dma reg blks */
- unsigned long flag;
- unsigned int ata_mode;
- unsigned char ctl_reg;
- unsigned char last_ctl;
- unsigned char dev_mask;
-};
-
-#define DRV_NAME "pata-bfin"
-#define DRV_VERSION "0.9"
-
-#define ATA_REG_CTRL 0x0E
-#define ATA_REG_ALTSTATUS ATA_REG_CTRL
-#define ATA_TMOUT_BOOT 30000
-#define ATA_TMOUT_BOOT_QUICK 7000
-
-#define PATA_BFIN_WAIT_TIMEOUT 10000
-#define PATA_DEV_NUM_PER_PORT 2
-
-/* These are the offset of the controller's registers */
-#define ATAPI_OFFSET_CONTROL 0x00
-#define ATAPI_OFFSET_STATUS 0x04
-#define ATAPI_OFFSET_DEV_ADDR 0x08
-#define ATAPI_OFFSET_DEV_TXBUF 0x0c
-#define ATAPI_OFFSET_DEV_RXBUF 0x10
-#define ATAPI_OFFSET_INT_MASK 0x14
-#define ATAPI_OFFSET_INT_STATUS 0x18
-#define ATAPI_OFFSET_XFER_LEN 0x1c
-#define ATAPI_OFFSET_LINE_STATUS 0x20
-#define ATAPI_OFFSET_SM_STATE 0x24
-#define ATAPI_OFFSET_TERMINATE 0x28
-#define ATAPI_OFFSET_PIO_TFRCNT 0x2c
-#define ATAPI_OFFSET_DMA_TFRCNT 0x30
-#define ATAPI_OFFSET_UMAIN_TFRCNT 0x34
-#define ATAPI_OFFSET_UDMAOUT_TFRCNT 0x38
-#define ATAPI_OFFSET_REG_TIM_0 0x40
-#define ATAPI_OFFSET_PIO_TIM_0 0x44
-#define ATAPI_OFFSET_PIO_TIM_1 0x48
-#define ATAPI_OFFSET_MULTI_TIM_0 0x50
-#define ATAPI_OFFSET_MULTI_TIM_1 0x54
-#define ATAPI_OFFSET_MULTI_TIM_2 0x58
-#define ATAPI_OFFSET_ULTRA_TIM_0 0x60
-#define ATAPI_OFFSET_ULTRA_TIM_1 0x64
-#define ATAPI_OFFSET_ULTRA_TIM_2 0x68
-#define ATAPI_OFFSET_ULTRA_TIM_3 0x6c
-
-
-#define ATAPI_GET_CONTROL(base)\
- bfin_read16(base + ATAPI_OFFSET_CONTROL)
-#define ATAPI_SET_CONTROL(base, val)\
- bfin_write16(base + ATAPI_OFFSET_CONTROL, val)
-#define ATAPI_GET_STATUS(base)\
- bfin_read16(base + ATAPI_OFFSET_STATUS)
-#define ATAPI_GET_DEV_ADDR(base)\
- bfin_read16(base + ATAPI_OFFSET_DEV_ADDR)
-#define ATAPI_SET_DEV_ADDR(base, val)\
- bfin_write16(base + ATAPI_OFFSET_DEV_ADDR, val)
-#define ATAPI_GET_DEV_TXBUF(base)\
- bfin_read16(base + ATAPI_OFFSET_DEV_TXBUF)
-#define ATAPI_SET_DEV_TXBUF(base, val)\
- bfin_write16(base + ATAPI_OFFSET_DEV_TXBUF, val)
-#define ATAPI_GET_DEV_RXBUF(base)\
- bfin_read16(base + ATAPI_OFFSET_DEV_RXBUF)
-#define ATAPI_SET_DEV_RXBUF(base, val)\
- bfin_write16(base + ATAPI_OFFSET_DEV_RXBUF, val)
-#define ATAPI_GET_INT_MASK(base)\
- bfin_read16(base + ATAPI_OFFSET_INT_MASK)
-#define ATAPI_SET_INT_MASK(base, val)\
- bfin_write16(base + ATAPI_OFFSET_INT_MASK, val)
-#define ATAPI_GET_INT_STATUS(base)\
- bfin_read16(base + ATAPI_OFFSET_INT_STATUS)
-#define ATAPI_SET_INT_STATUS(base, val)\
- bfin_write16(base + ATAPI_OFFSET_INT_STATUS, val)
-#define ATAPI_GET_XFER_LEN(base)\
- bfin_read16(base + ATAPI_OFFSET_XFER_LEN)
-#define ATAPI_SET_XFER_LEN(base, val)\
- bfin_write16(base + ATAPI_OFFSET_XFER_LEN, val)
-#define ATAPI_GET_LINE_STATUS(base)\
- bfin_read16(base + ATAPI_OFFSET_LINE_STATUS)
-#define ATAPI_GET_SM_STATE(base)\
- bfin_read16(base + ATAPI_OFFSET_SM_STATE)
-#define ATAPI_GET_TERMINATE(base)\
- bfin_read16(base + ATAPI_OFFSET_TERMINATE)
-#define ATAPI_SET_TERMINATE(base, val)\
- bfin_write16(base + ATAPI_OFFSET_TERMINATE, val)
-#define ATAPI_GET_PIO_TFRCNT(base)\
- bfin_read16(base + ATAPI_OFFSET_PIO_TFRCNT)
-#define ATAPI_GET_DMA_TFRCNT(base)\
- bfin_read16(base + ATAPI_OFFSET_DMA_TFRCNT)
-#define ATAPI_GET_UMAIN_TFRCNT(base)\
- bfin_read16(base + ATAPI_OFFSET_UMAIN_TFRCNT)
-#define ATAPI_GET_UDMAOUT_TFRCNT(base)\
- bfin_read16(base + ATAPI_OFFSET_UDMAOUT_TFRCNT)
-#define ATAPI_GET_REG_TIM_0(base)\
- bfin_read16(base + ATAPI_OFFSET_REG_TIM_0)
-#define ATAPI_SET_REG_TIM_0(base, val)\
- bfin_write16(base + ATAPI_OFFSET_REG_TIM_0, val)
-#define ATAPI_GET_PIO_TIM_0(base)\
- bfin_read16(base + ATAPI_OFFSET_PIO_TIM_0)
-#define ATAPI_SET_PIO_TIM_0(base, val)\
- bfin_write16(base + ATAPI_OFFSET_PIO_TIM_0, val)
-#define ATAPI_GET_PIO_TIM_1(base)\
- bfin_read16(base + ATAPI_OFFSET_PIO_TIM_1)
-#define ATAPI_SET_PIO_TIM_1(base, val)\
- bfin_write16(base + ATAPI_OFFSET_PIO_TIM_1, val)
-#define ATAPI_GET_MULTI_TIM_0(base)\
- bfin_read16(base + ATAPI_OFFSET_MULTI_TIM_0)
-#define ATAPI_SET_MULTI_TIM_0(base, val)\
- bfin_write16(base + ATAPI_OFFSET_MULTI_TIM_0, val)
-#define ATAPI_GET_MULTI_TIM_1(base)\
- bfin_read16(base + ATAPI_OFFSET_MULTI_TIM_1)
-#define ATAPI_SET_MULTI_TIM_1(base, val)\
- bfin_write16(base + ATAPI_OFFSET_MULTI_TIM_1, val)
-#define ATAPI_GET_MULTI_TIM_2(base)\
- bfin_read16(base + ATAPI_OFFSET_MULTI_TIM_2)
-#define ATAPI_SET_MULTI_TIM_2(base, val)\
- bfin_write16(base + ATAPI_OFFSET_MULTI_TIM_2, val)
-#define ATAPI_GET_ULTRA_TIM_0(base)\
- bfin_read16(base + ATAPI_OFFSET_ULTRA_TIM_0)
-#define ATAPI_SET_ULTRA_TIM_0(base, val)\
- bfin_write16(base + ATAPI_OFFSET_ULTRA_TIM_0, val)
-#define ATAPI_GET_ULTRA_TIM_1(base)\
- bfin_read16(base + ATAPI_OFFSET_ULTRA_TIM_1)
-#define ATAPI_SET_ULTRA_TIM_1(base, val)\
- bfin_write16(base + ATAPI_OFFSET_ULTRA_TIM_1, val)
-#define ATAPI_GET_ULTRA_TIM_2(base)\
- bfin_read16(base + ATAPI_OFFSET_ULTRA_TIM_2)
-#define ATAPI_SET_ULTRA_TIM_2(base, val)\
- bfin_write16(base + ATAPI_OFFSET_ULTRA_TIM_2, val)
-#define ATAPI_GET_ULTRA_TIM_3(base)\
- bfin_read16(base + ATAPI_OFFSET_ULTRA_TIM_3)
-#define ATAPI_SET_ULTRA_TIM_3(base, val)\
- bfin_write16(base + ATAPI_OFFSET_ULTRA_TIM_3, val)
-
-#endif
diff --git a/drivers/mmc/Makefile b/drivers/mmc/Makefile
index a61a9e9ca6c..de91f1423bc 100644
--- a/drivers/mmc/Makefile
+++ b/drivers/mmc/Makefile
@@ -14,7 +14,6 @@ obj-$(CONFIG_GENERIC_MMC) += mmc_legacy.o
endif
obj-$(CONFIG_ARM_PL180_MMCI) += arm_pl180_mmci.o
-obj-$(CONFIG_BFIN_SDH) += bfin_sdh.o
obj-$(CONFIG_MMC_DAVINCI) += davinci_mmc.o
obj-$(CONFIG_MMC_DW) += dw_mmc.o
diff --git a/drivers/mmc/bfin_sdh.c b/drivers/mmc/bfin_sdh.c
deleted file mode 100644
index 1627dca3a1d..00000000000
--- a/drivers/mmc/bfin_sdh.c
+++ /dev/null
@@ -1,306 +0,0 @@
-/*
- * Driver for Blackfin on-chip SDH controller
- *
- * Copyright (c) 2008-2009 Analog Devices Inc.
- *
- * Licensed under the GPL-2 or later.
- */
-
-#include <common.h>
-#include <malloc.h>
-#include <part.h>
-#include <mmc.h>
-
-#include <asm/io.h>
-#include <linux/errno.h>
-#include <asm/byteorder.h>
-#include <asm/blackfin.h>
-#include <asm/clock.h>
-#include <asm/portmux.h>
-#include <asm/mach-common/bits/sdh.h>
-#include <asm/mach-common/bits/dma.h>
-
-#if defined(__ADSPBF50x__) || defined(__ADSPBF51x__) || defined(__ADSPBF60x__)
-# define bfin_read_SDH_CLK_CTL bfin_read_RSI_CLK_CONTROL
-# define bfin_write_SDH_CLK_CTL bfin_write_RSI_CLK_CONTROL
-# define bfin_write_SDH_ARGUMENT bfin_write_RSI_ARGUMENT
-# define bfin_write_SDH_COMMAND bfin_write_RSI_COMMAND
-# define bfin_read_SDH_RESPONSE0 bfin_read_RSI_RESPONSE0
-# define bfin_read_SDH_RESPONSE1 bfin_read_RSI_RESPONSE1
-# define bfin_read_SDH_RESPONSE2 bfin_read_RSI_RESPONSE2
-# define bfin_read_SDH_RESPONSE3 bfin_read_RSI_RESPONSE3
-# define bfin_write_SDH_DATA_TIMER bfin_write_RSI_DATA_TIMER
-# define bfin_write_SDH_DATA_LGTH bfin_write_RSI_DATA_LGTH
-# define bfin_read_SDH_DATA_CTL bfin_read_RSI_DATA_CONTROL
-# define bfin_write_SDH_DATA_CTL bfin_write_RSI_DATA_CONTROL
-# define bfin_read_SDH_STATUS bfin_read_RSI_STATUS
-# define bfin_write_SDH_STATUS_CLR bfin_write_RSI_STATUSCL
-# define bfin_read_SDH_CFG bfin_read_RSI_CONFIG
-# define bfin_write_SDH_CFG bfin_write_RSI_CONFIG
-# if defined(__ADSPBF60x__)
-# define bfin_read_SDH_BLK_SIZE bfin_read_RSI_BLKSZ
-# define bfin_write_SDH_BLK_SIZE bfin_write_RSI_BLKSZ
-# define bfin_write_DMA_START_ADDR bfin_write_DMA10_START_ADDR
-# define bfin_write_DMA_X_COUNT bfin_write_DMA10_X_COUNT
-# define bfin_write_DMA_X_MODIFY bfin_write_DMA10_X_MODIFY
-# define bfin_write_DMA_CONFIG bfin_write_DMA10_CONFIG
-# else
-# define bfin_read_SDH_PWR_CTL bfin_read_RSI_PWR_CONTROL
-# define bfin_write_SDH_PWR_CTL bfin_write_RSI_PWR_CONTROL
-# define bfin_write_DMA_START_ADDR bfin_write_DMA4_START_ADDR
-# define bfin_write_DMA_X_COUNT bfin_write_DMA4_X_COUNT
-# define bfin_write_DMA_X_MODIFY bfin_write_DMA4_X_MODIFY
-# define bfin_write_DMA_CONFIG bfin_write_DMA4_CONFIG
-# endif
-# define PORTMUX_PINS \
- { P_RSI_DATA0, P_RSI_DATA1, P_RSI_DATA2, P_RSI_DATA3, P_RSI_CMD, P_RSI_CLK, 0 }
-#elif defined(__ADSPBF54x__)
-# define bfin_write_DMA_START_ADDR bfin_write_DMA22_START_ADDR
-# define bfin_write_DMA_X_COUNT bfin_write_DMA22_X_COUNT
-# define bfin_write_DMA_X_MODIFY bfin_write_DMA22_X_MODIFY
-# define bfin_write_DMA_CONFIG bfin_write_DMA22_CONFIG
-# define PORTMUX_PINS \
- { P_SD_D0, P_SD_D1, P_SD_D2, P_SD_D3, P_SD_CLK, P_SD_CMD, 0 }
-#else
-# error no support for this proc yet
-#endif
-
-static int
-sdh_send_cmd(struct mmc *mmc, struct mmc_cmd *mmc_cmd)
-{
- unsigned int status, timeout;
- int cmd = mmc_cmd->cmdidx;
- int flags = mmc_cmd->resp_type;
- int arg = mmc_cmd->cmdarg;
- int ret;
- u16 sdh_cmd;
-
- sdh_cmd = cmd | CMD_E;
- if (flags & MMC_RSP_PRESENT)
- sdh_cmd |= CMD_RSP;
- if (flags & MMC_RSP_136)
- sdh_cmd |= CMD_L_RSP;
-#ifdef RSI_BLKSZ
- sdh_cmd |= CMD_DATA0_BUSY;
-#endif
-
- bfin_write_SDH_ARGUMENT(arg);
- bfin_write_SDH_COMMAND(sdh_cmd);
-
- /* wait for a while */
- timeout = 0;
- do {
- if (++timeout > 1000000) {
- status = CMD_TIME_OUT;
- break;
- }
- udelay(1);
- status = bfin_read_SDH_STATUS();
- } while (!(status & (CMD_SENT | CMD_RESP_END | CMD_TIME_OUT |
- CMD_CRC_FAIL)));
-
- if (flags & MMC_RSP_PRESENT) {
- mmc_cmd->response[0] = bfin_read_SDH_RESPONSE0();
- if (flags & MMC_RSP_136) {
- mmc_cmd->response[1] = bfin_read_SDH_RESPONSE1();
- mmc_cmd->response[2] = bfin_read_SDH_RESPONSE2();
- mmc_cmd->response[3] = bfin_read_SDH_RESPONSE3();
- }
- }
-
- if (status & CMD_TIME_OUT)
- ret = -ETIMEDOUT;
- else if (status & CMD_CRC_FAIL && flags & MMC_RSP_CRC)
- ret = -ECOMM;
- else
- ret = 0;
-
- bfin_write_SDH_STATUS_CLR(CMD_SENT_STAT | CMD_RESP_END_STAT |
- CMD_TIMEOUT_STAT | CMD_CRC_FAIL_STAT);
-#ifdef RSI_BLKSZ
- /* wait till card ready */
- while (!(bfin_read_RSI_ESTAT() & SD_CARD_READY))
- continue;
- bfin_write_RSI_ESTAT(SD_CARD_READY);
-#endif
-
- return ret;
-}
-
-/* set data for single block transfer */
-static int sdh_setup_data(struct mmc *mmc, struct mmc_data *data)
-{
- u16 data_ctl = 0;
- u16 dma_cfg = 0;
- unsigned long data_size = data->blocksize * data->blocks;
-
- /* Don't support write yet. */
- if (data->flags & MMC_DATA_WRITE)
- return -EOPNOTSUPP;
-#ifndef RSI_BLKSZ
- data_ctl |= ((ffs(data->blocksize) - 1) << 4);
-#else
- bfin_write_SDH_BLK_SIZE(data->blocksize);
-#endif
- data_ctl |= DTX_DIR;
- bfin_write_SDH_DATA_CTL(data_ctl);
- dma_cfg = WDSIZE_32 | PSIZE_32 | RESTART | WNR | DMAEN;
-
- bfin_write_SDH_DATA_TIMER(-1);
-
- blackfin_dcache_flush_invalidate_range(data->dest,
- data->dest + data_size);
- /* configure DMA */
- bfin_write_DMA_START_ADDR(data->dest);
- bfin_write_DMA_X_COUNT(data_size / 4);
- bfin_write_DMA_X_MODIFY(4);
- bfin_write_DMA_CONFIG(dma_cfg);
- bfin_write_SDH_DATA_LGTH(data_size);
- /* kick off transfer */
- bfin_write_SDH_DATA_CTL(bfin_read_SDH_DATA_CTL() | DTX_DMA_E | DTX_E);
-
- return 0;
-}
-
-
-static int bfin_sdh_request(struct mmc *mmc, struct mmc_cmd *cmd,
- struct mmc_data *data)
-{
- u32 status;
- int ret = 0;
-
- if (data) {
- ret = sdh_setup_data(mmc, data);
- if (ret)
- return ret;
- }
-
- ret = sdh_send_cmd(mmc, cmd);
- if (ret) {
- bfin_write_SDH_COMMAND(0);
- bfin_write_DMA_CONFIG(0);
- bfin_write_SDH_DATA_CTL(0);
- SSYNC();
- printf("sending CMD%d failed\n", cmd->cmdidx);
- return ret;
- }
-
- if (data) {
- do {
- udelay(1);
- status = bfin_read_SDH_STATUS();
- } while (!(status & (DAT_END | DAT_TIME_OUT | DAT_CRC_FAIL |
- RX_OVERRUN)));
-
- if (status & DAT_TIME_OUT) {
- bfin_write_SDH_STATUS_CLR(DAT_TIMEOUT_STAT);
- ret = -ETIMEDOUT;
- } else if (status & (DAT_CRC_FAIL | RX_OVERRUN)) {
- bfin_write_SDH_STATUS_CLR(DAT_CRC_FAIL_STAT | RX_OVERRUN_STAT);
- ret = -ECOMM;
- } else
- bfin_write_SDH_STATUS_CLR(DAT_BLK_END_STAT | DAT_END_STAT);
-
- if (ret) {
- printf("tranfering data failed\n");
- return ret;
- }
- }
- return 0;
-}
-
-static void sdh_set_clk(unsigned long clk)
-{
- unsigned long sys_clk;
- unsigned long clk_div;
- u16 clk_ctl = 0;
-
- clk_ctl = bfin_read_SDH_CLK_CTL();
- if (clk) {
- /* setting SD_CLK */
- sys_clk = get_sclk();
- bfin_write_SDH_CLK_CTL(clk_ctl & ~CLK_E);
- if (sys_clk % (2 * clk) == 0)
- clk_div = sys_clk / (2 * clk) - 1;
- else
- clk_div = sys_clk / (2 * clk);
-
- if (clk_div > 0xff)
- clk_div = 0xff;
- clk_ctl |= (clk_div & 0xff);
- clk_ctl |= CLK_E;
- bfin_write_SDH_CLK_CTL(clk_ctl);
- } else
- bfin_write_SDH_CLK_CTL(clk_ctl & ~CLK_E);
-}
-
-static int bfin_sdh_set_ios(struct mmc *mmc)
-{
- u16 cfg = 0;
- u16 clk_ctl = 0;
-
- if (mmc->bus_width == 4) {
- cfg = bfin_read_SDH_CFG();
-#ifndef RSI_BLKSZ
- cfg &= ~PD_SDDAT3;
-#endif
- cfg |= PUP_SDDAT3;
- bfin_write_SDH_CFG(cfg);
- clk_ctl |= WIDE_BUS_4;
- }
- bfin_write_SDH_CLK_CTL(clk_ctl);
- sdh_set_clk(mmc->clock);
-
- return 0;
-}
-
-static int bfin_sdh_init(struct mmc *mmc)
-{
- const unsigned short pins[] = PORTMUX_PINS;
- int ret;
-
- /* Initialize sdh controller */
- ret = peripheral_request_list(pins, "bfin_sdh");
- if (ret < 0)
- return ret;
-#if defined(__ADSPBF54x__)
- bfin_write_DMAC1_PERIMUX(bfin_read_DMAC1_PERIMUX() | 0x1);
-#endif
- bfin_write_SDH_CFG(bfin_read_SDH_CFG() | CLKS_EN);
- /* Disable card detect pin */
- bfin_write_SDH_CFG((bfin_read_SDH_CFG() & 0x1F) | 0x60);
-#ifndef RSI_BLKSZ
- bfin_write_SDH_PWR_CTL(PWR_ON | ROD_CTL);
-#else
- bfin_write_SDH_CFG(bfin_read_SDH_CFG() | PWR_ON);
-#endif
- return 0;
-}
-
-static const struct mmc_ops bfin_mmc_ops = {
- .send_cmd = bfin_sdh_request,
- .set_ios = bfin_sdh_set_ios,
- .init = bfin_sdh_init,
-};
-
-static struct mmc_config bfin_mmc_cfg = {
- .name = "Blackfin SDH",
- .ops = &bfin_mmc_ops,
- .host_caps = MMC_MODE_4BIT,
- .voltages = MMC_VDD_32_33 | MMC_VDD_33_34,
- .b_max = CONFIG_SYS_MMC_MAX_BLK_COUNT,
-};
-
-int bfin_mmc_init(bd_t *bis)
-{
- struct mmc *mmc;
-
- bfin_mmc_cfg.f_max = get_sclk();
- bfin_mmc_cfg.f_min = bfin_mmc_cfg.f_max >> 9;
-
- mmc = mmc_create(&bfin_mmc_cfg, NULL);
- if (mmc == NULL)
- return -1;
-
- return 0;
-}
diff --git a/drivers/mtd/nand/Makefile b/drivers/mtd/nand/Makefile
index fd4bb66f50d..82358f674bd 100644
--- a/drivers/mtd/nand/Makefile
+++ b/drivers/mtd/nand/Makefile
@@ -42,7 +42,6 @@ obj-$(CONFIG_NAND_ECC_BCH) += nand_bch.o
obj-$(CONFIG_NAND_ATMEL) += atmel_nand.o
obj-$(CONFIG_NAND_ARASAN) += arasan_nfc.o
-obj-$(CONFIG_DRIVER_NAND_BFIN) += bfin_nand.o
obj-$(CONFIG_NAND_DAVINCI) += davinci_nand.o
obj-$(CONFIG_NAND_DENALI) += denali.o
obj-$(CONFIG_NAND_FSL_ELBC) += fsl_elbc_nand.o
diff --git a/drivers/mtd/nand/bfin_nand.c b/drivers/mtd/nand/bfin_nand.c
deleted file mode 100644
index 7c11868cd31..00000000000
--- a/drivers/mtd/nand/bfin_nand.c
+++ /dev/null
@@ -1,394 +0,0 @@
-/*
- * Driver for Blackfin on-chip NAND controller.
- *
- * Enter bugs at http://blackfin.uclinux.org/
- *
- * Copyright (c) 2007-2008 Analog Devices Inc.
- *
- * Licensed under the GPL-2 or later.
- */
-
-/* TODO:
- * - move bit defines into mach-common/bits/nand.h
- * - try and replace all IRQSTAT usage with STAT polling
- * - have software ecc mode use same algo as hw ecc ?
- */
-
-#include <common.h>
-#include <console.h>
-#include <asm/io.h>
-
-#ifdef DEBUG
-# define pr_stamp() printf("%s:%s:%i: here i am\n", __FILE__, __func__, __LINE__)
-#else
-# define pr_stamp()
-#endif
-
-#include <nand.h>
-
-#include <asm/blackfin.h>
-#include <asm/portmux.h>
-
-/* Bit masks for NFC_CTL */
-
-#define WR_DLY 0xf /* Write Strobe Delay */
-#define RD_DLY 0xf0 /* Read Strobe Delay */
-#define NWIDTH 0x100 /* NAND Data Width */
-#define PG_SIZE 0x200 /* Page Size */
-
-/* Bit masks for NFC_STAT */
-
-#define NBUSY 0x1 /* Not Busy */
-#define WB_FULL 0x2 /* Write Buffer Full */
-#define PG_WR_STAT 0x4 /* Page Write Pending */
-#define PG_RD_STAT 0x8 /* Page Read Pending */
-#define WB_EMPTY 0x10 /* Write Buffer Empty */
-
-/* Bit masks for NFC_IRQSTAT */
-
-#define NBUSYIRQ 0x1 /* Not Busy IRQ */
-#define WB_OVF 0x2 /* Write Buffer Overflow */
-#define WB_EDGE 0x4 /* Write Buffer Edge Detect */
-#define RD_RDY 0x8 /* Read Data Ready */
-#define WR_DONE 0x10 /* Page Write Done */
-
-#define NAND_IS_512() (CONFIG_BFIN_NFC_CTL_VAL & 0x200)
-
-/*
- * hardware specific access to control-lines
- */
-static void bfin_nfc_cmd_ctrl(struct mtd_info *mtd, int cmd, unsigned int ctrl)
-{
- pr_stamp();
-
- if (cmd == NAND_CMD_NONE)
- return;
-
- while (bfin_read_NFC_STAT() & WB_FULL)
- continue;
-
- if (ctrl & NAND_CLE)
- bfin_write_NFC_CMD(cmd);
- else
- bfin_write_NFC_ADDR(cmd);
- SSYNC();
-}
-
-static int bfin_nfc_devready(struct mtd_info *mtd)
-{
- pr_stamp();
- return (bfin_read_NFC_STAT() & NBUSY) ? 1 : 0;
-}
-
-/*
- * PIO mode for buffer writing and reading
- */
-static void bfin_nfc_read_buf(struct mtd_info *mtd, uint8_t *buf, int len)
-{
- pr_stamp();
-
- int i;
-
- /*
- * Data reads are requested by first writing to NFC_DATA_RD
- * and then reading back from NFC_READ.
- */
- for (i = 0; i < len; ++i) {
- while (bfin_read_NFC_STAT() & WB_FULL)
- if (ctrlc())
- return;
-
- /* Contents do not matter */
- bfin_write_NFC_DATA_RD(0x0000);
- SSYNC();
-
- while (!(bfin_read_NFC_IRQSTAT() & RD_RDY))
- if (ctrlc())
- return;
-
- buf[i] = bfin_read_NFC_READ();
-
- bfin_write_NFC_IRQSTAT(RD_RDY);
- }
-}
-
-static uint8_t bfin_nfc_read_byte(struct mtd_info *mtd)
-{
- pr_stamp();
-
- uint8_t val;
- bfin_nfc_read_buf(mtd, &val, 1);
- return val;
-}
-
-static void bfin_nfc_write_buf(struct mtd_info *mtd, const uint8_t *buf, int len)
-{
- pr_stamp();
-
- int i;
-
- for (i = 0; i < len; ++i) {
- while (bfin_read_NFC_STAT() & WB_FULL)
- if (ctrlc())
- return;
-
- bfin_write_NFC_DATA_WR(buf[i]);
- }
-
- /* Wait for the buffer to drain before we return */
- while (!(bfin_read_NFC_STAT() & WB_EMPTY))
- if (ctrlc())
- return;
-}
-
-/*
- * ECC functions
- * These allow the bfin to use the controller's ECC
- * generator block to ECC the data as it passes through
- */
-
-/*
- * ECC error correction function
- */
-static int bfin_nfc_correct_data_256(struct mtd_info *mtd, u_char *dat,
- u_char *read_ecc, u_char *calc_ecc)
-{
- u32 syndrome[5];
- u32 calced, stored;
- unsigned short failing_bit, failing_byte;
- u_char data;
-
- pr_stamp();
-
- calced = calc_ecc[0] | (calc_ecc[1] << 8) | (calc_ecc[2] << 16);
- stored = read_ecc[0] | (read_ecc[1] << 8) | (read_ecc[2] << 16);
-
- syndrome[0] = (calced ^ stored);
-
- /*
- * syndrome 0: all zero
- * No error in data
- * No action
- */
- if (!syndrome[0] || !calced || !stored)
- return 0;
-
- /*
- * sysdrome 0: only one bit is one
- * ECC data was incorrect
- * No action
- */
- if (hweight32(syndrome[0]) == 1)
- return 1;
-
- syndrome[1] = (calced & 0x7FF) ^ (stored & 0x7FF);
- syndrome[2] = (calced & 0x7FF) ^ ((calced >> 11) & 0x7FF);
- syndrome[3] = (stored & 0x7FF) ^ ((stored >> 11) & 0x7FF);
- syndrome[4] = syndrome[2] ^ syndrome[3];
-
- /*
- * sysdrome 0: exactly 11 bits are one, each parity
- * and parity' pair is 1 & 0 or 0 & 1.
- * 1-bit correctable error
- * Correct the error
- */
- if (hweight32(syndrome[0]) == 11 && syndrome[4] == 0x7FF) {
- failing_bit = syndrome[1] & 0x7;
- failing_byte = syndrome[1] >> 0x3;
- data = *(dat + failing_byte);
- data = data ^ (0x1 << failing_bit);
- *(dat + failing_byte) = data;
-
- return 0;
- }
-
- /*
- * sysdrome 0: random data
- * More than 1-bit error, non-correctable error
- * Discard data, mark bad block
- */
-
- return 1;
-}
-
-static int bfin_nfc_correct_data(struct mtd_info *mtd, u_char *dat,
- u_char *read_ecc, u_char *calc_ecc)
-{
- int ret;
-
- pr_stamp();
-
- ret = bfin_nfc_correct_data_256(mtd, dat, read_ecc, calc_ecc);
-
- /* If page size is 512, correct second 256 bytes */
- if (NAND_IS_512()) {
- dat += 256;
- read_ecc += 8;
- calc_ecc += 8;
- ret |= bfin_nfc_correct_data_256(mtd, dat, read_ecc, calc_ecc);
- }
-
- return ret;
-}
-
-static void reset_ecc(void)
-{
- bfin_write_NFC_RST(0x1);
- while (bfin_read_NFC_RST() & 1)
- continue;
-}
-
-static void bfin_nfc_enable_hwecc(struct mtd_info *mtd, int mode)
-{
- reset_ecc();
-}
-
-static int bfin_nfc_calculate_ecc(struct mtd_info *mtd,
- const u_char *dat, u_char *ecc_code)
-{
- u16 ecc0, ecc1;
- u32 code[2];
- u8 *p;
-
- pr_stamp();
-
- /* first 4 bytes ECC code for 256 page size */
- ecc0 = bfin_read_NFC_ECC0();
- ecc1 = bfin_read_NFC_ECC1();
-
- code[0] = (ecc0 & 0x7FF) | ((ecc1 & 0x7FF) << 11);
-
- /* first 3 bytes in ecc_code for 256 page size */
- p = (u8 *) code;
- memcpy(ecc_code, p, 3);
-
- /* second 4 bytes ECC code for 512 page size */
- if (NAND_IS_512()) {
- ecc0 = bfin_read_NFC_ECC2();
- ecc1 = bfin_read_NFC_ECC3();
- code[1] = (ecc0 & 0x7FF) | ((ecc1 & 0x7FF) << 11);
-
- /* second 3 bytes in ecc_code for second 256
- * bytes of 512 page size
- */
- p = (u8 *) (code + 1);
- memcpy((ecc_code + 3), p, 3);
- }
-
- reset_ecc();
-
- return 0;
-}
-
-#ifdef CONFIG_BFIN_NFC_BOOTROM_ECC
-# define BOOTROM_ECC 1
-#else
-# define BOOTROM_ECC 0
-#endif
-
-static uint8_t bbt_pattern[] = { 0xff };
-
-static struct nand_bbt_descr bootrom_bbt = {
- .options = 0,
- .offs = 63,
- .len = 1,
- .pattern = bbt_pattern,
-};
-
-static struct nand_ecclayout bootrom_ecclayout = {
- .eccbytes = 24,
- .eccpos = {
- 0x8 * 0, 0x8 * 0 + 1, 0x8 * 0 + 2,
- 0x8 * 1, 0x8 * 1 + 1, 0x8 * 1 + 2,
- 0x8 * 2, 0x8 * 2 + 1, 0x8 * 2 + 2,
- 0x8 * 3, 0x8 * 3 + 1, 0x8 * 3 + 2,
- 0x8 * 4, 0x8 * 4 + 1, 0x8 * 4 + 2,
- 0x8 * 5, 0x8 * 5 + 1, 0x8 * 5 + 2,
- 0x8 * 6, 0x8 * 6 + 1, 0x8 * 6 + 2,
- 0x8 * 7, 0x8 * 7 + 1, 0x8 * 7 + 2
- },
- .oobfree = {
- { 0x8 * 0 + 3, 5 },
- { 0x8 * 1 + 3, 5 },
- { 0x8 * 2 + 3, 5 },
- { 0x8 * 3 + 3, 5 },
- { 0x8 * 4 + 3, 5 },
- { 0x8 * 5 + 3, 5 },
- { 0x8 * 6 + 3, 5 },
- { 0x8 * 7 + 3, 5 },
- }
-};
-
-/*
- * Board-specific NAND initialization. The following members of the
- * argument are board-specific (per include/linux/mtd/nand.h):
- * - IO_ADDR_R?: address to read the 8 I/O lines of the flash device
- * - IO_ADDR_W?: address to write the 8 I/O lines of the flash device
- * - cmd_ctrl: hardwarespecific function for accesing control-lines
- * - dev_ready: hardwarespecific function for accesing device ready/busy line
- * - enable_hwecc?: function to enable (reset) hardware ecc generator. Must
- * only be provided if a hardware ECC is available
- * - ecc.mode: mode of ecc, see defines
- * - chip_delay: chip dependent delay for transfering data from array to
- * read regs (tR)
- * - options: various chip options. They can partly be set to inform
- * nand_scan about special functionality. See the defines for further
- * explanation
- * Members with a "?" were not set in the merged testing-NAND branch,
- * so they are not set here either.
- */
-int board_nand_init(struct nand_chip *chip)
-{
- const unsigned short pins[] = {
- P_NAND_CE, P_NAND_RB, P_NAND_D0, P_NAND_D1, P_NAND_D2,
- P_NAND_D3, P_NAND_D4, P_NAND_D5, P_NAND_D6, P_NAND_D7,
- P_NAND_WE, P_NAND_RE, P_NAND_CLE, P_NAND_ALE, 0,
- };
-
- pr_stamp();
-
- /* set width/ecc/timings/etc... */
- bfin_write_NFC_CTL(CONFIG_BFIN_NFC_CTL_VAL);
-
- /* clear interrupt status */
- bfin_write_NFC_IRQMASK(0x0);
- bfin_write_NFC_IRQSTAT(0xffff);
-
- /* enable GPIO function enable register */
- peripheral_request_list(pins, "bfin_nand");
-
- chip->cmd_ctrl = bfin_nfc_cmd_ctrl;
- chip->read_buf = bfin_nfc_read_buf;
- chip->write_buf = bfin_nfc_write_buf;
- chip->read_byte = bfin_nfc_read_byte;
-
-#ifdef CONFIG_BFIN_NFC_NO_HW_ECC
-# define ECC_HW 0
-#else
-# define ECC_HW 1
-#endif
- if (ECC_HW) {
- if (BOOTROM_ECC) {
- chip->badblock_pattern = &bootrom_bbt;
- chip->ecc.layout = &bootrom_ecclayout;
- }
- if (!NAND_IS_512()) {
- chip->ecc.bytes = 3;
- chip->ecc.size = 256;
- chip->ecc.strength = 1;
- } else {
- chip->ecc.bytes = 6;
- chip->ecc.size = 512;
- chip->ecc.strength = 2;
- }
- chip->ecc.mode = NAND_ECC_HW;
- chip->ecc.calculate = bfin_nfc_calculate_ecc;
- chip->ecc.correct = bfin_nfc_correct_data;
- chip->ecc.hwctl = bfin_nfc_enable_hwecc;
- } else
- chip->ecc.mode = NAND_ECC_SOFT;
- chip->dev_ready = bfin_nfc_devready;
- chip->chip_delay = 0;
-
- return 0;
-}
diff --git a/drivers/net/Makefile b/drivers/net/Makefile
index ac7e07bfdf5..aedb2cc90d9 100644
--- a/drivers/net/Makefile
+++ b/drivers/net/Makefile
@@ -13,7 +13,6 @@ obj-$(CONFIG_DRIVER_AT91EMAC) += at91_emac.o
obj-$(CONFIG_DRIVER_AX88180) += ax88180.o
obj-$(CONFIG_BCM_SF2_ETH) += bcm-sf2-eth.o
obj-$(CONFIG_BCM_SF2_ETH_GMAC) += bcm-sf2-eth-gmac.o
-obj-$(CONFIG_BFIN_MAC) += bfin_mac.o
obj-$(CONFIG_CALXEDA_XGMAC) += calxedaxgmac.o
obj-$(CONFIG_CS8900) += cs8900.o
obj-$(CONFIG_TULIP) += dc2114x.o
diff --git a/drivers/net/bfin_mac.c b/drivers/net/bfin_mac.c
deleted file mode 100644
index 26a626b4cbd..00000000000
--- a/drivers/net/bfin_mac.c
+++ /dev/null
@@ -1,519 +0,0 @@
-/*
- * Driver for Blackfin On-Chip MAC device
- *
- * Copyright (c) 2005-2008 Analog Device, Inc.
- *
- * Licensed under the GPL-2 or later.
- */
-
-#include <common.h>
-#include <config.h>
-#include <net.h>
-#include <netdev.h>
-#include <command.h>
-#include <malloc.h>
-#include <miiphy.h>
-#include <linux/mdio.h>
-#include <linux/mii.h>
-
-#include <asm/blackfin.h>
-#include <asm/clock.h>
-#include <asm/portmux.h>
-#include <asm/mach-common/bits/dma.h>
-#include <asm/mach-common/bits/emac.h>
-#include <asm/mach-common/bits/pll.h>
-
-#include "bfin_mac.h"
-
-#ifndef CONFIG_PHY_ADDR
-# define CONFIG_PHY_ADDR 1
-#endif
-#ifndef CONFIG_PHY_CLOCK_FREQ
-# define CONFIG_PHY_CLOCK_FREQ 2500000
-#endif
-
-#ifdef CONFIG_POST
-#include <post.h>
-#endif
-
-#define RXBUF_BASE_ADDR 0xFF900000
-#define TXBUF_BASE_ADDR 0xFF800000
-#define TX_BUF_CNT 1
-
-#define TOUT_LOOP 1000000
-
-static ADI_ETHER_BUFFER *txbuf[TX_BUF_CNT];
-static ADI_ETHER_BUFFER *rxbuf[PKTBUFSRX];
-static u16 txIdx; /* index of the current RX buffer */
-static u16 rxIdx; /* index of the current TX buffer */
-
-/* DMAx_CONFIG values at DMA Restart */
-static const union {
- u16 data;
- ADI_DMA_CONFIG_REG reg;
-} txdmacfg = {
- .reg = {
- .b_DMA_EN = 1, /* enabled */
- .b_WNR = 0, /* read from memory */
- .b_WDSIZE = 2, /* wordsize is 32 bits */
- .b_DMA2D = 0,
- .b_RESTART = 0,
- .b_DI_SEL = 0,
- .b_DI_EN = 0, /* no interrupt */
- .b_NDSIZE = 5, /* 5 half words is desc size */
- .b_FLOW = 7 /* large desc flow */
- },
-};
-
-static int bfin_miiphy_wait(void)
-{
- /* poll the STABUSY bit */
- while (bfin_read_EMAC_STAADD() & STABUSY)
- continue;
- return 0;
-}
-
-static int bfin_miiphy_read(struct mii_dev *bus, int addr, int devad, int reg)
-{
- ushort val = 0;
- if (bfin_miiphy_wait())
- return 1;
- bfin_write_EMAC_STAADD(SET_PHYAD(addr) | SET_REGAD(reg) | STABUSY);
- if (bfin_miiphy_wait())
- return 1;
- val = bfin_read_EMAC_STADAT();
- return val;
-}
-
-static int bfin_miiphy_write(struct mii_dev *bus, int addr, int devad,
- int reg, u16 val)
-{
- if (bfin_miiphy_wait())
- return 1;
- bfin_write_EMAC_STADAT(val);
- bfin_write_EMAC_STAADD(SET_PHYAD(addr) | SET_REGAD(reg) | STAOP | STABUSY);
- return 0;
-}
-
-int bfin_EMAC_initialize(bd_t *bis)
-{
- struct eth_device *dev;
- dev = malloc(sizeof(*dev));
- if (dev == NULL)
- hang();
-
- memset(dev, 0, sizeof(*dev));
- strcpy(dev->name, "bfin_mac");
-
- dev->iobase = 0;
- dev->priv = 0;
- dev->init = bfin_EMAC_init;
- dev->halt = bfin_EMAC_halt;
- dev->send = bfin_EMAC_send;
- dev->recv = bfin_EMAC_recv;
- dev->write_hwaddr = bfin_EMAC_setup_addr;
-
- eth_register(dev);
-
-#if defined(CONFIG_MII) || defined(CONFIG_CMD_MII)
- int retval;
- struct mii_dev *mdiodev = mdio_alloc();
- if (!mdiodev)
- return -ENOMEM;
- strncpy(mdiodev->name, dev->name, MDIO_NAME_LEN);
- mdiodev->read = bfin_miiphy_read;
- mdiodev->write = bfin_miiphy_write;
-
- retval = mdio_register(mdiodev);
- if (retval < 0)
- return retval;
-
- dev->priv = mdiodev;
-#endif
-
- return 0;
-}
-
-static int bfin_EMAC_send(struct eth_device *dev, void *packet, int length)
-{
- int i;
- int result = 0;
-
- if (length <= 0) {
- printf("Ethernet: bad packet size: %d\n", length);
- goto out;
- }
-
- if (bfin_read_DMA2_IRQ_STATUS() & DMA_ERR) {
- printf("Ethernet: tx DMA error\n");
- goto out;
- }
-
- for (i = 0; (bfin_read_DMA2_IRQ_STATUS() & DMA_RUN); ++i) {
- if (i > TOUT_LOOP) {
- puts("Ethernet: tx time out\n");
- goto out;
- }
- }
- txbuf[txIdx]->FrmData->NoBytes = length;
- memcpy(txbuf[txIdx]->FrmData->Dest, (void *)packet, length);
- txbuf[txIdx]->Dma[0].START_ADDR = (u32) txbuf[txIdx]->FrmData;
- bfin_write_DMA2_NEXT_DESC_PTR(txbuf[txIdx]->Dma);
- bfin_write_DMA2_CONFIG(txdmacfg.data);
- bfin_write_EMAC_OPMODE(bfin_read_EMAC_OPMODE() | TE);
-
- for (i = 0; (txbuf[txIdx]->StatusWord & TX_COMP) == 0; i++) {
- if (i > TOUT_LOOP) {
- puts("Ethernet: tx error\n");
- goto out;
- }
- }
- result = txbuf[txIdx]->StatusWord;
- txbuf[txIdx]->StatusWord = 0;
- if ((txIdx + 1) >= TX_BUF_CNT)
- txIdx = 0;
- else
- txIdx++;
- out:
- debug("BFIN EMAC send: length = %d\n", length);
- return result;
-}
-
-static int bfin_EMAC_recv(struct eth_device *dev)
-{
- int length = 0;
-
- for (;;) {
- if ((rxbuf[rxIdx]->StatusWord & RX_COMP) == 0) {
- length = -1;
- break;
- }
- if ((rxbuf[rxIdx]->StatusWord & RX_DMAO) != 0) {
- printf("Ethernet: rx dma overrun\n");
- break;
- }
- if ((rxbuf[rxIdx]->StatusWord & RX_OK) == 0) {
- printf("Ethernet: rx error\n");
- break;
- }
- length = rxbuf[rxIdx]->StatusWord & 0x000007FF;
- if (length <= 4) {
- printf("Ethernet: bad frame\n");
- break;
- }
-
- debug("%s: len = %d\n", __func__, length - 4);
-
- net_rx_packets[rxIdx] = rxbuf[rxIdx]->FrmData->Dest;
- net_process_received_packet(net_rx_packets[rxIdx], length - 4);
- bfin_write_DMA1_IRQ_STATUS(DMA_DONE | DMA_ERR);
- rxbuf[rxIdx]->StatusWord = 0x00000000;
- if ((rxIdx + 1) >= PKTBUFSRX)
- rxIdx = 0;
- else
- rxIdx++;
- }
-
- return length;
-}
-
-/**************************************************************
- *
- * Ethernet Initialization Routine
- *
- *************************************************************/
-
-/* MDC = SCLK / MDC_freq / 2 - 1 */
-#define MDC_FREQ_TO_DIV(mdc_freq) (get_sclk() / (mdc_freq) / 2 - 1)
-
-#ifndef CONFIG_BFIN_MAC_PINS
-# ifdef CONFIG_RMII
-# define CONFIG_BFIN_MAC_PINS P_RMII0
-# else
-# define CONFIG_BFIN_MAC_PINS P_MII0
-# endif
-#endif
-
-static int bfin_miiphy_init(struct eth_device *dev, int *opmode)
-{
- const unsigned short pins[] = CONFIG_BFIN_MAC_PINS;
- int phydat;
- size_t count;
- struct mii_dev *mdiodev = dev->priv;
-
- /* Enable PHY output */
- bfin_write_VR_CTL(bfin_read_VR_CTL() | CLKBUFOE);
-
- /* Set all the pins to peripheral mode */
- peripheral_request_list(pins, "bfin_mac");
-
- /* Odd word alignment for Receive Frame DMA word */
- /* Configure checksum support and rcve frame word alignment */
- bfin_write_EMAC_SYSCTL(RXDWA | RXCKS | SET_MDCDIV(MDC_FREQ_TO_DIV(CONFIG_PHY_CLOCK_FREQ)));
-
- /* turn on auto-negotiation and wait for link to come up */
- bfin_miiphy_write(mdiodev, CONFIG_PHY_ADDR, MDIO_DEVAD_NONE, MII_BMCR,
- BMCR_ANENABLE);
- count = 0;
- while (1) {
- ++count;
- phydat = bfin_miiphy_read(mdiodev, CONFIG_PHY_ADDR,
- MDIO_DEVAD_NONE, MII_BMSR);
- if (phydat < 0)
- return phydat;
- if (phydat & BMSR_LSTATUS)
- break;
- if (count > 30000) {
- printf("%s: link down, check cable\n", dev->name);
- return -1;
- }
- udelay(100);
- }
-
- /* see what kind of link we have */
- phydat = bfin_miiphy_read(mdiodev, CONFIG_PHY_ADDR, MDIO_DEVAD_NONE,
- MII_LPA);
- if (phydat < 0)
- return phydat;
- if (phydat & LPA_DUPLEX)
- *opmode = FDMODE;
- else
- *opmode = 0;
-
- bfin_write_EMAC_MMC_CTL(RSTC | CROLL);
- bfin_write_EMAC_VLAN1(EMAC_VLANX_DEF_VAL);
- bfin_write_EMAC_VLAN2(EMAC_VLANX_DEF_VAL);
-
- /* Initialize the TX DMA channel registers */
- bfin_write_DMA2_X_COUNT(0);
- bfin_write_DMA2_X_MODIFY(4);
- bfin_write_DMA2_Y_COUNT(0);
- bfin_write_DMA2_Y_MODIFY(0);
-
- /* Initialize the RX DMA channel registers */
- bfin_write_DMA1_X_COUNT(0);
- bfin_write_DMA1_X_MODIFY(4);
- bfin_write_DMA1_Y_COUNT(0);
- bfin_write_DMA1_Y_MODIFY(0);
-
- return 0;
-}
-
-static int bfin_EMAC_setup_addr(struct eth_device *dev)
-{
- bfin_write_EMAC_ADDRLO(
- dev->enetaddr[0] |
- dev->enetaddr[1] << 8 |
- dev->enetaddr[2] << 16 |
- dev->enetaddr[3] << 24
- );
- bfin_write_EMAC_ADDRHI(
- dev->enetaddr[4] |
- dev->enetaddr[5] << 8
- );
- return 0;
-}
-
-static int bfin_EMAC_init(struct eth_device *dev, bd_t *bd)
-{
- u32 opmode;
- int dat;
- int i;
- debug("Eth_init: ......\n");
-
- txIdx = 0;
- rxIdx = 0;
-
- /* Initialize System Register */
- if (bfin_miiphy_init(dev, &dat) < 0)
- return -1;
-
- /* Initialize EMAC address */
- bfin_EMAC_setup_addr(dev);
-
- /* Initialize TX and RX buffer */
- for (i = 0; i < PKTBUFSRX; i++) {
- rxbuf[i] = SetupRxBuffer(i);
- if (i > 0) {
- rxbuf[i - 1]->Dma[1].NEXT_DESC_PTR = rxbuf[i]->Dma;
- if (i == (PKTBUFSRX - 1))
- rxbuf[i]->Dma[1].NEXT_DESC_PTR = rxbuf[0]->Dma;
- }
- }
- for (i = 0; i < TX_BUF_CNT; i++) {
- txbuf[i] = SetupTxBuffer(i);
- if (i > 0) {
- txbuf[i - 1]->Dma[1].NEXT_DESC_PTR = txbuf[i]->Dma;
- if (i == (TX_BUF_CNT - 1))
- txbuf[i]->Dma[1].NEXT_DESC_PTR = txbuf[0]->Dma;
- }
- }
-
- /* Set RX DMA */
- bfin_write_DMA1_NEXT_DESC_PTR(rxbuf[0]->Dma);
- bfin_write_DMA1_CONFIG(rxbuf[0]->Dma[0].CONFIG_DATA);
-
- /* Wait MII done */
- bfin_miiphy_wait();
-
- /* We enable only RX here */
- /* ASTP : Enable Automatic Pad Stripping
- PR : Promiscuous Mode for test
- PSF : Receive frames with total length less than 64 bytes.
- FDMODE : Full Duplex Mode
- LB : Internal Loopback for test
- RE : Receiver Enable */
- if (dat == FDMODE)
- opmode = ASTP | FDMODE | PSF;
- else
- opmode = ASTP | PSF;
- opmode |= RE;
-#ifdef CONFIG_RMII
- opmode |= TE | RMII;
-#endif
- /* Turn on the EMAC */
- bfin_write_EMAC_OPMODE(opmode);
- return 0;
-}
-
-static void bfin_EMAC_halt(struct eth_device *dev)
-{
- debug("Eth_halt: ......\n");
- /* Turn off the EMAC */
- bfin_write_EMAC_OPMODE(0);
- /* Turn off the EMAC RX DMA */
- bfin_write_DMA1_CONFIG(0);
- bfin_write_DMA2_CONFIG(0);
-}
-
-ADI_ETHER_BUFFER *SetupRxBuffer(int no)
-{
- ADI_ETHER_FRAME_BUFFER *frmbuf;
- ADI_ETHER_BUFFER *buf;
- int nobytes_buffer = sizeof(ADI_ETHER_BUFFER[2]) / 2; /* ensure a multi. of 4 */
- int total_size = nobytes_buffer + RECV_BUFSIZE;
-
- buf = (void *) (RXBUF_BASE_ADDR + no * total_size);
- frmbuf = (void *) (RXBUF_BASE_ADDR + no * total_size + nobytes_buffer);
-
- memset(buf, 0x00, nobytes_buffer);
- buf->FrmData = frmbuf;
- memset(frmbuf, 0xfe, RECV_BUFSIZE);
-
- /* set up first desc to point to receive frame buffer */
- buf->Dma[0].NEXT_DESC_PTR = &(buf->Dma[1]);
- buf->Dma[0].START_ADDR = (u32) buf->FrmData;
- buf->Dma[0].CONFIG.b_DMA_EN = 1; /* enabled */
- buf->Dma[0].CONFIG.b_WNR = 1; /* Write to memory */
- buf->Dma[0].CONFIG.b_WDSIZE = 2; /* wordsize is 32 bits */
- buf->Dma[0].CONFIG.b_NDSIZE = 5; /* 5 half words is desc size. */
- buf->Dma[0].CONFIG.b_FLOW = 7; /* large desc flow */
-
- /* set up second desc to point to status word */
- buf->Dma[1].NEXT_DESC_PTR = buf->Dma;
- buf->Dma[1].START_ADDR = (u32) & buf->IPHdrChksum;
- buf->Dma[1].CONFIG.b_DMA_EN = 1; /* enabled */
- buf->Dma[1].CONFIG.b_WNR = 1; /* Write to memory */
- buf->Dma[1].CONFIG.b_WDSIZE = 2; /* wordsize is 32 bits */
- buf->Dma[1].CONFIG.b_DI_EN = 1; /* enable interrupt */
- buf->Dma[1].CONFIG.b_NDSIZE = 5; /* must be 0 when FLOW is 0 */
- buf->Dma[1].CONFIG.b_FLOW = 7; /* stop */
-
- return buf;
-}
-
-ADI_ETHER_BUFFER *SetupTxBuffer(int no)
-{
- ADI_ETHER_FRAME_BUFFER *frmbuf;
- ADI_ETHER_BUFFER *buf;
- int nobytes_buffer = sizeof(ADI_ETHER_BUFFER[2]) / 2; /* ensure a multi. of 4 */
- int total_size = nobytes_buffer + RECV_BUFSIZE;
-
- buf = (void *) (TXBUF_BASE_ADDR + no * total_size);
- frmbuf = (void *) (TXBUF_BASE_ADDR + no * total_size + nobytes_buffer);
-
- memset(buf, 0x00, nobytes_buffer);
- buf->FrmData = frmbuf;
- memset(frmbuf, 0x00, RECV_BUFSIZE);
-
- /* set up first desc to point to receive frame buffer */
- buf->Dma[0].NEXT_DESC_PTR = &(buf->Dma[1]);
- buf->Dma[0].START_ADDR = (u32) buf->FrmData;
- buf->Dma[0].CONFIG.b_DMA_EN = 1; /* enabled */
- buf->Dma[0].CONFIG.b_WNR = 0; /* Read to memory */
- buf->Dma[0].CONFIG.b_WDSIZE = 2; /* wordsize is 32 bits */
- buf->Dma[0].CONFIG.b_NDSIZE = 5; /* 5 half words is desc size. */
- buf->Dma[0].CONFIG.b_FLOW = 7; /* large desc flow */
-
- /* set up second desc to point to status word */
- buf->Dma[1].NEXT_DESC_PTR = &(buf->Dma[0]);
- buf->Dma[1].START_ADDR = (u32) & buf->StatusWord;
- buf->Dma[1].CONFIG.b_DMA_EN = 1; /* enabled */
- buf->Dma[1].CONFIG.b_WNR = 1; /* Write to memory */
- buf->Dma[1].CONFIG.b_WDSIZE = 2; /* wordsize is 32 bits */
- buf->Dma[1].CONFIG.b_DI_EN = 1; /* enable interrupt */
- buf->Dma[1].CONFIG.b_NDSIZE = 0; /* must be 0 when FLOW is 0 */
- buf->Dma[1].CONFIG.b_FLOW = 0; /* stop */
-
- return buf;
-}
-
-#if defined(CONFIG_POST) && defined(CONFIG_SYS_POST_ETHER)
-int ether_post_test(int flags)
-{
- uchar buf[64];
- int i, value = 0;
- int length;
- uint addr;
-
- printf("\n--------");
- bfin_EMAC_init(NULL, NULL);
- /* construct the package */
- addr = bfin_read_EMAC_ADDRLO();
- buf[0] = buf[6] = addr;
- buf[1] = buf[7] = addr >> 8;
- buf[2] = buf[8] = addr >> 16;
- buf[3] = buf[9] = addr >> 24;
- addr = bfin_read_EMAC_ADDRHI();
- buf[4] = buf[10] = addr;
- buf[5] = buf[11] = addr >> 8;
- buf[12] = 0x08; /* Type: ARP */
- buf[13] = 0x06;
- buf[14] = 0x00; /* Hardware type: Ethernet */
- buf[15] = 0x01;
- buf[16] = 0x08; /* Protocal type: IP */
- buf[17] = 0x00;
- buf[18] = 0x06; /* Hardware size */
- buf[19] = 0x04; /* Protocol size */
- buf[20] = 0x00; /* Opcode: request */
- buf[21] = 0x01;
-
- for (i = 0; i < 42; i++)
- buf[i + 22] = i;
- printf("--------Send 64 bytes......\n");
- bfin_EMAC_send(NULL, buf, 64);
- for (i = 0; i < 100; i++) {
- udelay(10000);
- if ((rxbuf[rxIdx]->StatusWord & RX_COMP) != 0) {
- value = 1;
- break;
- }
- }
- if (value == 0) {
- printf("--------EMAC can't receive any data\n");
- eth_halt();
- return -1;
- }
- length = rxbuf[rxIdx]->StatusWord & 0x000007FF - 4;
- for (i = 0; i < length; i++) {
- if (rxbuf[rxIdx]->FrmData->Dest[i] != buf[i]) {
- printf("--------EMAC receive error data!\n");
- eth_halt();
- return -1;
- }
- }
- printf("--------receive %d bytes, matched\n", length);
- bfin_EMAC_halt(NULL);
- return 0;
-}
-#endif
diff --git a/drivers/net/bfin_mac.h b/drivers/net/bfin_mac.h
deleted file mode 100644
index 54ffb3830e2..00000000000
--- a/drivers/net/bfin_mac.h
+++ /dev/null
@@ -1,65 +0,0 @@
-/*
- * bfin_mac.h - some defines/structures for the Blackfin on-chip MAC.
- *
- * Copyright (c) 2005-2008 Analog Device, Inc.
- *
- * Licensed under the GPL-2 or later.
- */
-
-#ifndef __BFIN_MAC_H__
-#define __BFIN_MAC_H__
-
-#define RECV_BUFSIZE (0x614)
-
-typedef struct ADI_DMA_CONFIG_REG {
- u16 b_DMA_EN:1; /* 0 Enabled */
- u16 b_WNR:1; /* 1 Direction */
- u16 b_WDSIZE:2; /* 2:3 Transfer word size */
- u16 b_DMA2D:1; /* 4 DMA mode */
- u16 b_RESTART:1; /* 5 Retain FIFO */
- u16 b_DI_SEL:1; /* 6 Data interrupt timing select */
- u16 b_DI_EN:1; /* 7 Data interrupt enabled */
- u16 b_NDSIZE:4; /* 8:11 Flex descriptor size */
- u16 b_FLOW:3; /* 12:14Flow */
-} ADI_DMA_CONFIG_REG;
-
-typedef struct adi_ether_frame_buffer {
- u16 NoBytes; /* the no. of following bytes */
- u8 Dest[6]; /* destination MAC address */
- u8 Srce[6]; /* source MAC address */
- u16 LTfield; /* length/type field */
- u8 Data[0]; /* payload bytes */
-} ADI_ETHER_FRAME_BUFFER;
-/* 16 bytes/struct */
-
-typedef struct dma_descriptor {
- struct dma_descriptor *NEXT_DESC_PTR;
- u32 START_ADDR;
- union {
- u16 CONFIG_DATA;
- ADI_DMA_CONFIG_REG CONFIG;
- };
-} DMA_DESCRIPTOR;
-/* 10 bytes/struct in 12 bytes */
-
-typedef struct adi_ether_buffer {
- DMA_DESCRIPTOR Dma[2]; /* first for the frame, second for the status */
- ADI_ETHER_FRAME_BUFFER *FrmData;/* pointer to data */
- struct adi_ether_buffer *pNext; /* next buffer */
- struct adi_ether_buffer *pPrev; /* prev buffer */
- u16 IPHdrChksum; /* the IP header checksum */
- u16 IPPayloadChksum; /* the IP header and payload checksum */
- volatile u32 StatusWord; /* the frame status word */
-} ADI_ETHER_BUFFER;
-/* 40 bytes/struct in 44 bytes */
-
-static ADI_ETHER_BUFFER *SetupRxBuffer(int no);
-static ADI_ETHER_BUFFER *SetupTxBuffer(int no);
-
-static int bfin_EMAC_init(struct eth_device *dev, bd_t *bd);
-static void bfin_EMAC_halt(struct eth_device *dev);
-static int bfin_EMAC_send(struct eth_device *dev, void *packet, int length);
-static int bfin_EMAC_recv(struct eth_device *dev);
-static int bfin_EMAC_setup_addr(struct eth_device *dev);
-
-#endif
diff --git a/drivers/rtc/Makefile b/drivers/rtc/Makefile
index c9194270851..87c3d9cae20 100644
--- a/drivers/rtc/Makefile
+++ b/drivers/rtc/Makefile
@@ -9,7 +9,6 @@
obj-$(CONFIG_DM_RTC) += rtc-uclass.o
obj-$(CONFIG_RTC_AT91SAM9_RTT) += at91sam9_rtt.o
-obj-$(CONFIG_RTC_BFIN) += bfin_rtc.o
obj-y += date.o
obj-$(CONFIG_RTC_DAVINCI) += davinci.o
obj-$(CONFIG_RTC_DS1302) += ds1302.o
diff --git a/drivers/rtc/bfin_rtc.c b/drivers/rtc/bfin_rtc.c
deleted file mode 100644
index a079a1d4723..00000000000
--- a/drivers/rtc/bfin_rtc.c
+++ /dev/null
@@ -1,121 +0,0 @@
-/*
- * Copyright (c) 2004-2008 Analog Devices Inc.
- *
- * (C) Copyright 2001
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * Licensed under the GPL-2 or later.
- */
-
-#include <common.h>
-#include <command.h>
-#include <rtc.h>
-
-#if defined(CONFIG_CMD_DATE)
-
-#include <asm/blackfin.h>
-#include <asm/mach-common/bits/rtc.h>
-
-#define pr_stamp() debug("%s:%s:%i: here i am\n", __FILE__, __func__, __LINE__)
-
-#define MIN_TO_SECS(x) (60 * (x))
-#define HRS_TO_SECS(x) (60 * MIN_TO_SECS(x))
-#define DAYS_TO_SECS(x) (24 * HRS_TO_SECS(x))
-
-#define NUM_SECS_IN_MIN MIN_TO_SECS(1)
-#define NUM_SECS_IN_HR HRS_TO_SECS(1)
-#define NUM_SECS_IN_DAY DAYS_TO_SECS(1)
-
-/* Enable the RTC prescaler enable register */
-void rtc_init(void)
-{
- if (!(bfin_read_RTC_PREN() & 0x1))
- bfin_write_RTC_PREN(0x1);
-}
-
-/* Our on-chip RTC has no notion of "reset" */
-void rtc_reset(void)
-{
- rtc_init();
-}
-
-/* Wait for pending writes to complete */
-static void wait_for_complete(void)
-{
- pr_stamp();
- while (!(bfin_read_RTC_ISTAT() & WRITE_COMPLETE))
- if (!(bfin_read_RTC_ISTAT() & WRITE_PENDING))
- break;
- bfin_write_RTC_ISTAT(WRITE_COMPLETE);
-}
-
-/* Set the time. Get the time_in_secs which is the number of seconds since Jan 1970 and set the RTC registers
- * based on this value.
- */
-int rtc_set(struct rtc_time *tmp)
-{
- unsigned long remain, days, hrs, mins, secs;
-
- pr_stamp();
-
- if (tmp == NULL) {
- puts("Error setting the date/time\n");
- return -1;
- }
-
- rtc_init();
- wait_for_complete();
-
- /* Calculate number of seconds this incoming time represents */
- remain = rtc_mktime(tmp);
-
- /* Figure out how many days since epoch */
- days = remain / NUM_SECS_IN_DAY;
-
- /* From the remaining secs, compute the hrs(0-23), mins(0-59) and secs(0-59) */
- remain = remain % NUM_SECS_IN_DAY;
- hrs = remain / NUM_SECS_IN_HR;
- remain = remain % NUM_SECS_IN_HR;
- mins = remain / NUM_SECS_IN_MIN;
- secs = remain % NUM_SECS_IN_MIN;
-
- /* Encode these time values into our RTC_STAT register */
- bfin_write_RTC_STAT(SET_ALARM(days, hrs, mins, secs));
-
- return 0;
-}
-
-/* Read the time from the RTC_STAT. time_in_seconds is seconds since Jan 1970 */
-int rtc_get(struct rtc_time *tmp)
-{
- uint32_t cur_rtc_stat;
- int time_in_sec;
- int tm_sec, tm_min, tm_hr, tm_day;
-
- pr_stamp();
-
- if (tmp == NULL) {
- puts("Error getting the date/time\n");
- return -1;
- }
-
- rtc_init();
- wait_for_complete();
-
- /* Read the RTC_STAT register */
- cur_rtc_stat = bfin_read_RTC_STAT();
-
- /* Convert our encoded format into actual time values */
- tm_sec = (cur_rtc_stat & RTC_SEC) >> RTC_SEC_P;
- tm_min = (cur_rtc_stat & RTC_MIN) >> RTC_MIN_P;
- tm_hr = (cur_rtc_stat & RTC_HR ) >> RTC_HR_P;
- tm_day = (cur_rtc_stat & RTC_DAY) >> RTC_DAY_P;
-
- /* Calculate the total number of seconds since epoch */
- time_in_sec = (tm_sec) + MIN_TO_SECS(tm_min) + HRS_TO_SECS(tm_hr) + DAYS_TO_SECS(tm_day);
- rtc_to_tm(time_in_sec, tmp);
-
- return 0;
-}
-
-#endif
diff --git a/drivers/watchdog/Makefile b/drivers/watchdog/Makefile
index dea18363caa..36745ca9c99 100644
--- a/drivers/watchdog/Makefile
+++ b/drivers/watchdog/Makefile
@@ -12,7 +12,6 @@ obj-y += imx_watchdog.o
endif
obj-$(CONFIG_S5P) += s5p_wdt.o
obj-$(CONFIG_XILINX_TB_WATCHDOG) += xilinx_tb_wdt.o
-obj-$(CONFIG_BFIN_WATCHDOG) += bfin_wdt.o
obj-$(CONFIG_OMAP_WATCHDOG) += omap_wdt.o
obj-$(CONFIG_DESIGNWARE_WATCHDOG) += designware_wdt.o
obj-$(CONFIG_ULP_WATCHDOG) += ulp_wdog.o
diff --git a/drivers/watchdog/bfin_wdt.c b/drivers/watchdog/bfin_wdt.c
deleted file mode 100644
index 6a8db59fdff..00000000000
--- a/drivers/watchdog/bfin_wdt.c
+++ /dev/null
@@ -1,27 +0,0 @@
-/*
- * watchdog.c - driver for Blackfin on-chip watchdog
- *
- * Copyright (c) 2007-2009 Analog Devices Inc.
- *
- * Licensed under the GPL-2 or later.
- */
-
-#include <common.h>
-#include <watchdog.h>
-#include <asm/blackfin.h>
-#include <asm/clock.h>
-#include <asm/mach-common/bits/watchdog.h>
-
-void hw_watchdog_reset(void)
-{
- bfin_write_WDOG_STAT(0);
-}
-
-void hw_watchdog_init(void)
-{
- bfin_write_WDOG_CTL(WDDIS);
- SSYNC();
- bfin_write_WDOG_CNT(CONFIG_WATCHDOG_TIMEOUT_MSECS / 1000 * get_sclk());
- hw_watchdog_reset();
- bfin_write_WDOG_CTL(WDEN);
-}
--
GitLab
From 84a112a1a5cf5cc6070af847a22929093a1eb50f Mon Sep 17 00:00:00 2001
From: Masahiro Yamada <yamada.masahiro@socionext.com>
Date: Fri, 14 Apr 2017 11:05:48 +0900
Subject: [PATCH 071/282] blackfin: ibf-dsp561: remove orphan Blackfin board
This is a Blackfin board that commit ea3310e8aafa ("Blackfin:
Remove") missed to remove.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
---
board/ibf-dsp561/Kconfig | 9 ---------
board/ibf-dsp561/MAINTAINERS | 6 ------
board/ibf-dsp561/Makefile | 12 ------------
board/ibf-dsp561/config.mk | 11 -----------
board/ibf-dsp561/ibf-dsp561.c | 26 --------------------------
5 files changed, 64 deletions(-)
delete mode 100644 board/ibf-dsp561/Kconfig
delete mode 100644 board/ibf-dsp561/MAINTAINERS
delete mode 100644 board/ibf-dsp561/Makefile
delete mode 100644 board/ibf-dsp561/config.mk
delete mode 100644 board/ibf-dsp561/ibf-dsp561.c
diff --git a/board/ibf-dsp561/Kconfig b/board/ibf-dsp561/Kconfig
deleted file mode 100644
index acf5d7c6f94..00000000000
--- a/board/ibf-dsp561/Kconfig
+++ /dev/null
@@ -1,9 +0,0 @@
-if TARGET_IBF_DSP561
-
-config SYS_BOARD
- default "ibf-dsp561"
-
-config SYS_CONFIG_NAME
- default "ibf-dsp561"
-
-endif
diff --git a/board/ibf-dsp561/MAINTAINERS b/board/ibf-dsp561/MAINTAINERS
deleted file mode 100644
index dfd0f9095f3..00000000000
--- a/board/ibf-dsp561/MAINTAINERS
+++ /dev/null
@@ -1,6 +0,0 @@
-IBF-DSP561 BOARD
-M: I-SYST Micromodule <support@i-syst.com>
-S: Maintained
-F: board/ibf-dsp561/
-F: include/configs/ibf-dsp561.h
-F: configs/ibf-dsp561_defconfig
diff --git a/board/ibf-dsp561/Makefile b/board/ibf-dsp561/Makefile
deleted file mode 100644
index cbf16121df2..00000000000
--- a/board/ibf-dsp561/Makefile
+++ /dev/null
@@ -1,12 +0,0 @@
-#
-# U-Boot - Makefile
-#
-# Copyright (c) 2005-2007 Analog Device Inc.
-#
-# (C) Copyright 2000-2006
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# SPDX-License-Identifier: GPL-2.0+
-#
-
-obj-y := ibf-dsp561.o
diff --git a/board/ibf-dsp561/config.mk b/board/ibf-dsp561/config.mk
deleted file mode 100644
index 854d7dbb863..00000000000
--- a/board/ibf-dsp561/config.mk
+++ /dev/null
@@ -1,11 +0,0 @@
-#
-# Copyright (c) 2005-2008 Analog Device Inc.
-#
-# (C) Copyright 2001
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# SPDX-License-Identifier: GPL-2.0+
-#
-
-# Set some default LDR flags based on boot mode.
-LDR_FLAGS-BFIN_BOOT_PARA := --bits 16
diff --git a/board/ibf-dsp561/ibf-dsp561.c b/board/ibf-dsp561/ibf-dsp561.c
deleted file mode 100644
index 8475fda1a47..00000000000
--- a/board/ibf-dsp561/ibf-dsp561.c
+++ /dev/null
@@ -1,26 +0,0 @@
-/*
- * U-Boot - main board file
- *
- * Copyright (c) 2008-2009 I-SYST.
- *
- * Licensed under the GPL-2 or later.
- */
-
-#include <common.h>
-#include <netdev.h>
-
-DECLARE_GLOBAL_DATA_PTR;
-
-int checkboard(void)
-{
- printf("Board: I-SYST IBF-DSP561 Micromodule\n");
- printf(" Support: http://www.i-syst.com/\n");
- return 0;
-}
-
-#ifdef CONFIG_DRIVER_AX88180
-int board_eth_init(bd_t *bis)
-{
- return ax88180_initialize(bis);
-}
-#endif
--
GitLab
From c2da86f39ed6cbccccc2736bdc421fd606734232 Mon Sep 17 00:00:00 2001
From: Masahiro Yamada <yamada.masahiro@socionext.com>
Date: Fri, 14 Apr 2017 11:10:22 +0900
Subject: [PATCH 072/282] ARM: import arm-smccc code from Linux 4.11-rc6
Imports ARM SMC Calling Convention code from Linux 4.11-rc6.
The files have been copied as follows:
[Linux] [U-Boot]
arch/arm/kernel/smccc-call.S -> arch/arm/cpu/armv7/smccc-call.S
arch/arm64/kernel/smccc-call.S -> arch/arm/cpu/armv8/smccc-call.S
arch/arm/include/asm/opcodes* -> arch/arm/include/asm/opcodes*
include/linux/arm-smccc.h -> include/linux/arm-smccc.h
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
---
arch/arm/cpu/armv7/smccc-call.S | 64 ++++++++
arch/arm/cpu/armv8/smccc-call.S | 52 +++++++
arch/arm/include/asm/opcodes-sec.h | 24 +++
arch/arm/include/asm/opcodes-virt.h | 39 +++++
arch/arm/include/asm/opcodes.h | 231 ++++++++++++++++++++++++++++
include/linux/arm-smccc.h | 134 ++++++++++++++++
6 files changed, 544 insertions(+)
create mode 100644 arch/arm/cpu/armv7/smccc-call.S
create mode 100644 arch/arm/cpu/armv8/smccc-call.S
create mode 100644 arch/arm/include/asm/opcodes-sec.h
create mode 100644 arch/arm/include/asm/opcodes-virt.h
create mode 100644 arch/arm/include/asm/opcodes.h
create mode 100644 include/linux/arm-smccc.h
diff --git a/arch/arm/cpu/armv7/smccc-call.S b/arch/arm/cpu/armv7/smccc-call.S
new file mode 100644
index 00000000000..e5d43066b88
--- /dev/null
+++ b/arch/arm/cpu/armv7/smccc-call.S
@@ -0,0 +1,64 @@
+/*
+ * Copyright (c) 2015, Linaro Limited
+ *
+ * This software is licensed under the terms of the GNU General Public
+ * License version 2, as published by the Free Software Foundation, and
+ * may be copied, distributed, and modified under those terms.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ */
+#include <linux/linkage.h>
+
+#include <asm/opcodes-sec.h>
+#include <asm/opcodes-virt.h>
+#include <asm/unwind.h>
+
+ /*
+ * Wrap c macros in asm macros to delay expansion until after the
+ * SMCCC asm macro is expanded.
+ */
+ .macro SMCCC_SMC
+ __SMC(0)
+ .endm
+
+ .macro SMCCC_HVC
+ __HVC(0)
+ .endm
+
+ .macro SMCCC instr
+UNWIND( .fnstart)
+ mov r12, sp
+ push {r4-r7}
+UNWIND( .save {r4-r7})
+ ldm r12, {r4-r7}
+ \instr
+ pop {r4-r7}
+ ldr r12, [sp, #(4 * 4)]
+ stm r12, {r0-r3}
+ bx lr
+UNWIND( .fnend)
+ .endm
+
+/*
+ * void smccc_smc(unsigned long a0, unsigned long a1, unsigned long a2,
+ * unsigned long a3, unsigned long a4, unsigned long a5,
+ * unsigned long a6, unsigned long a7, struct arm_smccc_res *res,
+ * struct arm_smccc_quirk *quirk)
+ */
+ENTRY(__arm_smccc_smc)
+ SMCCC SMCCC_SMC
+ENDPROC(__arm_smccc_smc)
+
+/*
+ * void smccc_hvc(unsigned long a0, unsigned long a1, unsigned long a2,
+ * unsigned long a3, unsigned long a4, unsigned long a5,
+ * unsigned long a6, unsigned long a7, struct arm_smccc_res *res,
+ * struct arm_smccc_quirk *quirk)
+ */
+ENTRY(__arm_smccc_hvc)
+ SMCCC SMCCC_HVC
+ENDPROC(__arm_smccc_hvc)
diff --git a/arch/arm/cpu/armv8/smccc-call.S b/arch/arm/cpu/armv8/smccc-call.S
new file mode 100644
index 00000000000..62522342e1e
--- /dev/null
+++ b/arch/arm/cpu/armv8/smccc-call.S
@@ -0,0 +1,52 @@
+/*
+ * Copyright (c) 2015, Linaro Limited
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License Version 2 as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ */
+#include <linux/linkage.h>
+#include <linux/arm-smccc.h>
+#include <asm/asm-offsets.h>
+
+ .macro SMCCC instr
+ .cfi_startproc
+ \instr #0
+ ldr x4, [sp]
+ stp x0, x1, [x4, #ARM_SMCCC_RES_X0_OFFS]
+ stp x2, x3, [x4, #ARM_SMCCC_RES_X2_OFFS]
+ ldr x4, [sp, #8]
+ cbz x4, 1f /* no quirk structure */
+ ldr x9, [x4, #ARM_SMCCC_QUIRK_ID_OFFS]
+ cmp x9, #ARM_SMCCC_QUIRK_QCOM_A6
+ b.ne 1f
+ str x6, [x4, ARM_SMCCC_QUIRK_STATE_OFFS]
+1: ret
+ .cfi_endproc
+ .endm
+
+/*
+ * void arm_smccc_smc(unsigned long a0, unsigned long a1, unsigned long a2,
+ * unsigned long a3, unsigned long a4, unsigned long a5,
+ * unsigned long a6, unsigned long a7, struct arm_smccc_res *res,
+ * struct arm_smccc_quirk *quirk)
+ */
+ENTRY(__arm_smccc_smc)
+ SMCCC smc
+ENDPROC(__arm_smccc_smc)
+
+/*
+ * void arm_smccc_hvc(unsigned long a0, unsigned long a1, unsigned long a2,
+ * unsigned long a3, unsigned long a4, unsigned long a5,
+ * unsigned long a6, unsigned long a7, struct arm_smccc_res *res,
+ * struct arm_smccc_quirk *quirk)
+ */
+ENTRY(__arm_smccc_hvc)
+ SMCCC hvc
+ENDPROC(__arm_smccc_hvc)
diff --git a/arch/arm/include/asm/opcodes-sec.h b/arch/arm/include/asm/opcodes-sec.h
new file mode 100644
index 00000000000..bc3a9174417
--- /dev/null
+++ b/arch/arm/include/asm/opcodes-sec.h
@@ -0,0 +1,24 @@
+/*
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * Copyright (C) 2012 ARM Limited
+ */
+
+#ifndef __ASM_ARM_OPCODES_SEC_H
+#define __ASM_ARM_OPCODES_SEC_H
+
+#include <asm/opcodes.h>
+
+#define __SMC(imm4) __inst_arm_thumb32( \
+ 0xE1600070 | (((imm4) & 0xF) << 0), \
+ 0xF7F08000 | (((imm4) & 0xF) << 16) \
+)
+
+#endif /* __ASM_ARM_OPCODES_SEC_H */
diff --git a/arch/arm/include/asm/opcodes-virt.h b/arch/arm/include/asm/opcodes-virt.h
new file mode 100644
index 00000000000..efcfdf92d9d
--- /dev/null
+++ b/arch/arm/include/asm/opcodes-virt.h
@@ -0,0 +1,39 @@
+/*
+ * opcodes-virt.h: Opcode definitions for the ARM virtualization extensions
+ * Copyright (C) 2012 Linaro Limited
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License along
+ * with this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
+ */
+#ifndef __ASM_ARM_OPCODES_VIRT_H
+#define __ASM_ARM_OPCODES_VIRT_H
+
+#include <asm/opcodes.h>
+
+#define __HVC(imm16) __inst_arm_thumb32( \
+ 0xE1400070 | (((imm16) & 0xFFF0) << 4) | ((imm16) & 0x000F), \
+ 0xF7E08000 | (((imm16) & 0xF000) << 4) | ((imm16) & 0x0FFF) \
+)
+
+#define __ERET __inst_arm_thumb32( \
+ 0xE160006E, \
+ 0xF3DE8F00 \
+)
+
+#define __MSR_ELR_HYP(regnum) __inst_arm_thumb32( \
+ 0xE12EF300 | regnum, \
+ 0xF3808E30 | (regnum << 16) \
+)
+
+#endif /* ! __ASM_ARM_OPCODES_VIRT_H */
diff --git a/arch/arm/include/asm/opcodes.h b/arch/arm/include/asm/opcodes.h
new file mode 100644
index 00000000000..e796c598513
--- /dev/null
+++ b/arch/arm/include/asm/opcodes.h
@@ -0,0 +1,231 @@
+/*
+ * arch/arm/include/asm/opcodes.h
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#ifndef __ASM_ARM_OPCODES_H
+#define __ASM_ARM_OPCODES_H
+
+#ifndef __ASSEMBLY__
+#include <linux/linkage.h>
+extern asmlinkage unsigned int arm_check_condition(u32 opcode, u32 psr);
+#endif
+
+#define ARM_OPCODE_CONDTEST_FAIL 0
+#define ARM_OPCODE_CONDTEST_PASS 1
+#define ARM_OPCODE_CONDTEST_UNCOND 2
+
+
+/*
+ * Assembler opcode byteswap helpers.
+ * These are only intended for use by this header: don't use them directly,
+ * because they will be suboptimal in most cases.
+ */
+#define ___asm_opcode_swab32(x) ( \
+ (((x) << 24) & 0xFF000000) \
+ | (((x) << 8) & 0x00FF0000) \
+ | (((x) >> 8) & 0x0000FF00) \
+ | (((x) >> 24) & 0x000000FF) \
+)
+#define ___asm_opcode_swab16(x) ( \
+ (((x) << 8) & 0xFF00) \
+ | (((x) >> 8) & 0x00FF) \
+)
+#define ___asm_opcode_swahb32(x) ( \
+ (((x) << 8) & 0xFF00FF00) \
+ | (((x) >> 8) & 0x00FF00FF) \
+)
+#define ___asm_opcode_swahw32(x) ( \
+ (((x) << 16) & 0xFFFF0000) \
+ | (((x) >> 16) & 0x0000FFFF) \
+)
+#define ___asm_opcode_identity32(x) ((x) & 0xFFFFFFFF)
+#define ___asm_opcode_identity16(x) ((x) & 0xFFFF)
+
+
+/*
+ * Opcode byteswap helpers
+ *
+ * These macros help with converting instructions between a canonical integer
+ * format and in-memory representation, in an endianness-agnostic manner.
+ *
+ * __mem_to_opcode_*() convert from in-memory representation to canonical form.
+ * __opcode_to_mem_*() convert from canonical form to in-memory representation.
+ *
+ *
+ * Canonical instruction representation:
+ *
+ * ARM: 0xKKLLMMNN
+ * Thumb 16-bit: 0x0000KKLL, where KK < 0xE8
+ * Thumb 32-bit: 0xKKLLMMNN, where KK >= 0xE8
+ *
+ * There is no way to distinguish an ARM instruction in canonical representation
+ * from a Thumb instruction (just as these cannot be distinguished in memory).
+ * Where this distinction is important, it needs to be tracked separately.
+ *
+ * Note that values in the range 0x0000E800..0xE7FFFFFF intentionally do not
+ * represent any valid Thumb-2 instruction. For this range,
+ * __opcode_is_thumb32() and __opcode_is_thumb16() will both be false.
+ *
+ * The ___asm variants are intended only for use by this header, in situations
+ * involving inline assembler. For .S files, the normal __opcode_*() macros
+ * should do the right thing.
+ */
+#ifdef __ASSEMBLY__
+
+#define ___opcode_swab32(x) ___asm_opcode_swab32(x)
+#define ___opcode_swab16(x) ___asm_opcode_swab16(x)
+#define ___opcode_swahb32(x) ___asm_opcode_swahb32(x)
+#define ___opcode_swahw32(x) ___asm_opcode_swahw32(x)
+#define ___opcode_identity32(x) ___asm_opcode_identity32(x)
+#define ___opcode_identity16(x) ___asm_opcode_identity16(x)
+
+#else /* ! __ASSEMBLY__ */
+
+#include <linux/types.h>
+#include <linux/swab.h>
+
+#define ___opcode_swab32(x) swab32(x)
+#define ___opcode_swab16(x) swab16(x)
+#define ___opcode_swahb32(x) swahb32(x)
+#define ___opcode_swahw32(x) swahw32(x)
+#define ___opcode_identity32(x) ((u32)(x))
+#define ___opcode_identity16(x) ((u16)(x))
+
+#endif /* ! __ASSEMBLY__ */
+
+
+#ifdef CONFIG_CPU_ENDIAN_BE8
+
+#define __opcode_to_mem_arm(x) ___opcode_swab32(x)
+#define __opcode_to_mem_thumb16(x) ___opcode_swab16(x)
+#define __opcode_to_mem_thumb32(x) ___opcode_swahb32(x)
+#define ___asm_opcode_to_mem_arm(x) ___asm_opcode_swab32(x)
+#define ___asm_opcode_to_mem_thumb16(x) ___asm_opcode_swab16(x)
+#define ___asm_opcode_to_mem_thumb32(x) ___asm_opcode_swahb32(x)
+
+#else /* ! CONFIG_CPU_ENDIAN_BE8 */
+
+#define __opcode_to_mem_arm(x) ___opcode_identity32(x)
+#define __opcode_to_mem_thumb16(x) ___opcode_identity16(x)
+#define ___asm_opcode_to_mem_arm(x) ___asm_opcode_identity32(x)
+#define ___asm_opcode_to_mem_thumb16(x) ___asm_opcode_identity16(x)
+#ifndef CONFIG_CPU_ENDIAN_BE32
+/*
+ * On BE32 systems, using 32-bit accesses to store Thumb instructions will not
+ * work in all cases, due to alignment constraints. For now, a correct
+ * version is not provided for BE32.
+ */
+#define __opcode_to_mem_thumb32(x) ___opcode_swahw32(x)
+#define ___asm_opcode_to_mem_thumb32(x) ___asm_opcode_swahw32(x)
+#endif
+
+#endif /* ! CONFIG_CPU_ENDIAN_BE8 */
+
+#define __mem_to_opcode_arm(x) __opcode_to_mem_arm(x)
+#define __mem_to_opcode_thumb16(x) __opcode_to_mem_thumb16(x)
+#ifndef CONFIG_CPU_ENDIAN_BE32
+#define __mem_to_opcode_thumb32(x) __opcode_to_mem_thumb32(x)
+#endif
+
+/* Operations specific to Thumb opcodes */
+
+/* Instruction size checks: */
+#define __opcode_is_thumb32(x) ( \
+ ((x) & 0xF8000000) == 0xE8000000 \
+ || ((x) & 0xF0000000) == 0xF0000000 \
+)
+#define __opcode_is_thumb16(x) ( \
+ ((x) & 0xFFFF0000) == 0 \
+ && !(((x) & 0xF800) == 0xE800 || ((x) & 0xF000) == 0xF000) \
+)
+
+/* Operations to construct or split 32-bit Thumb instructions: */
+#define __opcode_thumb32_first(x) (___opcode_identity16((x) >> 16))
+#define __opcode_thumb32_second(x) (___opcode_identity16(x))
+#define __opcode_thumb32_compose(first, second) ( \
+ (___opcode_identity32(___opcode_identity16(first)) << 16) \
+ | ___opcode_identity32(___opcode_identity16(second)) \
+)
+#define ___asm_opcode_thumb32_first(x) (___asm_opcode_identity16((x) >> 16))
+#define ___asm_opcode_thumb32_second(x) (___asm_opcode_identity16(x))
+#define ___asm_opcode_thumb32_compose(first, second) ( \
+ (___asm_opcode_identity32(___asm_opcode_identity16(first)) << 16) \
+ | ___asm_opcode_identity32(___asm_opcode_identity16(second)) \
+)
+
+/*
+ * Opcode injection helpers
+ *
+ * In rare cases it is necessary to assemble an opcode which the
+ * assembler does not support directly, or which would normally be
+ * rejected because of the CFLAGS or AFLAGS used to build the affected
+ * file.
+ *
+ * Before using these macros, consider carefully whether it is feasible
+ * instead to change the build flags for your file, or whether it really
+ * makes sense to support old assembler versions when building that
+ * particular kernel feature.
+ *
+ * The macros defined here should only be used where there is no viable
+ * alternative.
+ *
+ *
+ * __inst_arm(x): emit the specified ARM opcode
+ * __inst_thumb16(x): emit the specified 16-bit Thumb opcode
+ * __inst_thumb32(x): emit the specified 32-bit Thumb opcode
+ *
+ * __inst_arm_thumb16(arm, thumb): emit either the specified arm or
+ * 16-bit Thumb opcode, depending on whether an ARM or Thumb-2
+ * kernel is being built
+ *
+ * __inst_arm_thumb32(arm, thumb): emit either the specified arm or
+ * 32-bit Thumb opcode, depending on whether an ARM or Thumb-2
+ * kernel is being built
+ *
+ *
+ * Note that using these macros directly is poor practice. Instead, you
+ * should use them to define human-readable wrapper macros to encode the
+ * instructions that you care about. In code which might run on ARMv7 or
+ * above, you can usually use the __inst_arm_thumb{16,32} macros to
+ * specify the ARM and Thumb alternatives at the same time. This ensures
+ * that the correct opcode gets emitted depending on the instruction set
+ * used for the kernel build.
+ *
+ * Look at opcodes-virt.h for an example of how to use these macros.
+ */
+#include <linux/stringify.h>
+
+#define __inst_arm(x) ___inst_arm(___asm_opcode_to_mem_arm(x))
+#define __inst_thumb32(x) ___inst_thumb32( \
+ ___asm_opcode_to_mem_thumb16(___asm_opcode_thumb32_first(x)), \
+ ___asm_opcode_to_mem_thumb16(___asm_opcode_thumb32_second(x)) \
+)
+#define __inst_thumb16(x) ___inst_thumb16(___asm_opcode_to_mem_thumb16(x))
+
+#ifdef CONFIG_THUMB2_KERNEL
+#define __inst_arm_thumb16(arm_opcode, thumb_opcode) \
+ __inst_thumb16(thumb_opcode)
+#define __inst_arm_thumb32(arm_opcode, thumb_opcode) \
+ __inst_thumb32(thumb_opcode)
+#else
+#define __inst_arm_thumb16(arm_opcode, thumb_opcode) __inst_arm(arm_opcode)
+#define __inst_arm_thumb32(arm_opcode, thumb_opcode) __inst_arm(arm_opcode)
+#endif
+
+/* Helpers for the helpers. Don't use these directly. */
+#ifdef __ASSEMBLY__
+#define ___inst_arm(x) .long x
+#define ___inst_thumb16(x) .short x
+#define ___inst_thumb32(first, second) .short first, second
+#else
+#define ___inst_arm(x) ".long " __stringify(x) "\n\t"
+#define ___inst_thumb16(x) ".short " __stringify(x) "\n\t"
+#define ___inst_thumb32(first, second) \
+ ".short " __stringify(first) ", " __stringify(second) "\n\t"
+#endif
+
+#endif /* __ASM_ARM_OPCODES_H */
diff --git a/include/linux/arm-smccc.h b/include/linux/arm-smccc.h
new file mode 100644
index 00000000000..4c5bca38c65
--- /dev/null
+++ b/include/linux/arm-smccc.h
@@ -0,0 +1,134 @@
+/*
+ * Copyright (c) 2015, Linaro Limited
+ *
+ * This software is licensed under the terms of the GNU General Public
+ * License version 2, as published by the Free Software Foundation, and
+ * may be copied, distributed, and modified under those terms.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ */
+#ifndef __LINUX_ARM_SMCCC_H
+#define __LINUX_ARM_SMCCC_H
+
+/*
+ * This file provides common defines for ARM SMC Calling Convention as
+ * specified in
+ * http://infocenter.arm.com/help/topic/com.arm.doc.den0028a/index.html
+ */
+
+#define ARM_SMCCC_STD_CALL 0
+#define ARM_SMCCC_FAST_CALL 1
+#define ARM_SMCCC_TYPE_SHIFT 31
+
+#define ARM_SMCCC_SMC_32 0
+#define ARM_SMCCC_SMC_64 1
+#define ARM_SMCCC_CALL_CONV_SHIFT 30
+
+#define ARM_SMCCC_OWNER_MASK 0x3F
+#define ARM_SMCCC_OWNER_SHIFT 24
+
+#define ARM_SMCCC_FUNC_MASK 0xFFFF
+
+#define ARM_SMCCC_IS_FAST_CALL(smc_val) \
+ ((smc_val) & (ARM_SMCCC_FAST_CALL << ARM_SMCCC_TYPE_SHIFT))
+#define ARM_SMCCC_IS_64(smc_val) \
+ ((smc_val) & (ARM_SMCCC_SMC_64 << ARM_SMCCC_CALL_CONV_SHIFT))
+#define ARM_SMCCC_FUNC_NUM(smc_val) ((smc_val) & ARM_SMCCC_FUNC_MASK)
+#define ARM_SMCCC_OWNER_NUM(smc_val) \
+ (((smc_val) >> ARM_SMCCC_OWNER_SHIFT) & ARM_SMCCC_OWNER_MASK)
+
+#define ARM_SMCCC_CALL_VAL(type, calling_convention, owner, func_num) \
+ (((type) << ARM_SMCCC_TYPE_SHIFT) | \
+ ((calling_convention) << ARM_SMCCC_CALL_CONV_SHIFT) | \
+ (((owner) & ARM_SMCCC_OWNER_MASK) << ARM_SMCCC_OWNER_SHIFT) | \
+ ((func_num) & ARM_SMCCC_FUNC_MASK))
+
+#define ARM_SMCCC_OWNER_ARCH 0
+#define ARM_SMCCC_OWNER_CPU 1
+#define ARM_SMCCC_OWNER_SIP 2
+#define ARM_SMCCC_OWNER_OEM 3
+#define ARM_SMCCC_OWNER_STANDARD 4
+#define ARM_SMCCC_OWNER_TRUSTED_APP 48
+#define ARM_SMCCC_OWNER_TRUSTED_APP_END 49
+#define ARM_SMCCC_OWNER_TRUSTED_OS 50
+#define ARM_SMCCC_OWNER_TRUSTED_OS_END 63
+
+#define ARM_SMCCC_QUIRK_NONE 0
+#define ARM_SMCCC_QUIRK_QCOM_A6 1 /* Save/restore register a6 */
+
+#ifndef __ASSEMBLY__
+
+#include <linux/linkage.h>
+#include <linux/types.h>
+/**
+ * struct arm_smccc_res - Result from SMC/HVC call
+ * @a0-a3 result values from registers 0 to 3
+ */
+struct arm_smccc_res {
+ unsigned long a0;
+ unsigned long a1;
+ unsigned long a2;
+ unsigned long a3;
+};
+
+/**
+ * struct arm_smccc_quirk - Contains quirk information
+ * @id: quirk identification
+ * @state: quirk specific information
+ * @a6: Qualcomm quirk entry for returning post-smc call contents of a6
+ */
+struct arm_smccc_quirk {
+ int id;
+ union {
+ unsigned long a6;
+ } state;
+};
+
+/**
+ * __arm_smccc_smc() - make SMC calls
+ * @a0-a7: arguments passed in registers 0 to 7
+ * @res: result values from registers 0 to 3
+ * @quirk: points to an arm_smccc_quirk, or NULL when no quirks are required.
+ *
+ * This function is used to make SMC calls following SMC Calling Convention.
+ * The content of the supplied param are copied to registers 0 to 7 prior
+ * to the SMC instruction. The return values are updated with the content
+ * from register 0 to 3 on return from the SMC instruction. An optional
+ * quirk structure provides vendor specific behavior.
+ */
+asmlinkage void __arm_smccc_smc(unsigned long a0, unsigned long a1,
+ unsigned long a2, unsigned long a3, unsigned long a4,
+ unsigned long a5, unsigned long a6, unsigned long a7,
+ struct arm_smccc_res *res, struct arm_smccc_quirk *quirk);
+
+/**
+ * __arm_smccc_hvc() - make HVC calls
+ * @a0-a7: arguments passed in registers 0 to 7
+ * @res: result values from registers 0 to 3
+ * @quirk: points to an arm_smccc_quirk, or NULL when no quirks are required.
+ *
+ * This function is used to make HVC calls following SMC Calling
+ * Convention. The content of the supplied param are copied to registers 0
+ * to 7 prior to the HVC instruction. The return values are updated with
+ * the content from register 0 to 3 on return from the HVC instruction. An
+ * optional quirk structure provides vendor specific behavior.
+ */
+asmlinkage void __arm_smccc_hvc(unsigned long a0, unsigned long a1,
+ unsigned long a2, unsigned long a3, unsigned long a4,
+ unsigned long a5, unsigned long a6, unsigned long a7,
+ struct arm_smccc_res *res, struct arm_smccc_quirk *quirk);
+
+#define arm_smccc_smc(...) __arm_smccc_smc(__VA_ARGS__, NULL)
+
+#define arm_smccc_smc_quirk(...) __arm_smccc_smc(__VA_ARGS__)
+
+#define arm_smccc_hvc(...) __arm_smccc_hvc(__VA_ARGS__, NULL)
+
+#define arm_smccc_hvc_quirk(...) __arm_smccc_hvc(__VA_ARGS__)
+
+#endif /*__ASSEMBLY__*/
+#endif /*__LINUX_ARM_SMCCC_H*/
--
GitLab
From c54bcf6805cc6762cb998751b8e005f39ee1dad1 Mon Sep 17 00:00:00 2001
From: Masahiro Yamada <yamada.masahiro@socionext.com>
Date: Fri, 14 Apr 2017 11:10:23 +0900
Subject: [PATCH 073/282] ARM: adjust arm-smccc code for use in U-Boot
Adjust ARM SMC Calling Convention code for U-Boot:
- Replace the license block with SPDX
- Change path to asm-offsets.h
- Define UNWIND() as no-op
- Add Kconfig entry
- Add asm-offsets
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
---
arch/arm/Kconfig | 8 ++++++++
arch/arm/cpu/armv7/Makefile | 1 +
arch/arm/cpu/armv7/smccc-call.S | 12 ++----------
arch/arm/cpu/armv8/Makefile | 2 ++
arch/arm/cpu/armv8/smccc-call.S | 12 ++----------
arch/arm/include/asm/opcodes-sec.h | 11 ++---------
arch/arm/include/asm/opcodes-virt.h | 14 +-------------
arch/arm/include/asm/opcodes.h | 4 +---
arch/arm/lib/asm-offsets.c | 8 ++++++++
include/linux/arm-smccc.h | 10 +---------
10 files changed, 28 insertions(+), 54 deletions(-)
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 42f93b4670d..16578b8b389 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -174,6 +174,14 @@ config SYS_CACHELINE_SIZE
default 64 if SYS_CACHE_SHIFT_6
default 32 if SYS_CACHE_SHIFT_5
+config ARM_SMCCC
+ bool "Support for ARM SMC Calling Convention (SMCCC)"
+ depends on CPU_V7 || ARM64
+ help
+ Say Y here if you want to enable ARM SMC Calling Convention.
+ This should be enabled if U-Boot needs to communicate with system
+ firmware (for example, PSCI) according to SMCCC.
+
config SEMIHOSTING
bool "support boot from semihosting"
help
diff --git a/arch/arm/cpu/armv7/Makefile b/arch/arm/cpu/armv7/Makefile
index 02e8778be5b..3a9913a86bc 100644
--- a/arch/arm/cpu/armv7/Makefile
+++ b/arch/arm/cpu/armv7/Makefile
@@ -18,6 +18,7 @@ obj-y += lowlevel_init.o
endif
endif
+obj-$(CONFIG_ARM_SMCCC) += smccc-call.o
obj-$(CONFIG_ARMV7_NONSEC) += nonsec_virt.o virt-v7.o virt-dt.o
obj-$(CONFIG_ARMV7_PSCI) += psci.o psci-common.o
diff --git a/arch/arm/cpu/armv7/smccc-call.S b/arch/arm/cpu/armv7/smccc-call.S
index e5d43066b88..c2fdbadbb02 100644
--- a/arch/arm/cpu/armv7/smccc-call.S
+++ b/arch/arm/cpu/armv7/smccc-call.S
@@ -1,22 +1,14 @@
/*
* Copyright (c) 2015, Linaro Limited
*
- * This software is licensed under the terms of the GNU General Public
- * License version 2, as published by the Free Software Foundation, and
- * may be copied, distributed, and modified under those terms.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
+ * SPDX-License-Identifier: GPL-2.0
*/
#include <linux/linkage.h>
#include <asm/opcodes-sec.h>
#include <asm/opcodes-virt.h>
-#include <asm/unwind.h>
+#define UNWIND(x...)
/*
* Wrap c macros in asm macros to delay expansion until after the
* SMCCC asm macro is expanded.
diff --git a/arch/arm/cpu/armv8/Makefile b/arch/arm/cpu/armv8/Makefile
index 65915eec364..c447085fe43 100644
--- a/arch/arm/cpu/armv8/Makefile
+++ b/arch/arm/cpu/armv8/Makefile
@@ -16,6 +16,8 @@ obj-y += tlb.o
obj-y += transition.o
obj-y += fwcall.o
obj-y += cpu-dt.o
+obj-$(CONFIG_ARM_SMCCC) += smccc-call.o
+
ifndef CONFIG_SPL_BUILD
obj-$(CONFIG_ARMV8_SPIN_TABLE) += spin_table.o spin_table_v8.o
endif
diff --git a/arch/arm/cpu/armv8/smccc-call.S b/arch/arm/cpu/armv8/smccc-call.S
index 62522342e1e..bbb6cba4a54 100644
--- a/arch/arm/cpu/armv8/smccc-call.S
+++ b/arch/arm/cpu/armv8/smccc-call.S
@@ -1,19 +1,11 @@
/*
* Copyright (c) 2015, Linaro Limited
*
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License Version 2 as
- * published by the Free Software Foundation.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
+ * SPDX-License-Identifier: GPL-2.0
*/
#include <linux/linkage.h>
#include <linux/arm-smccc.h>
-#include <asm/asm-offsets.h>
+#include <generated/asm-offsets.h>
.macro SMCCC instr
.cfi_startproc
diff --git a/arch/arm/include/asm/opcodes-sec.h b/arch/arm/include/asm/opcodes-sec.h
index bc3a9174417..16dee8f158b 100644
--- a/arch/arm/include/asm/opcodes-sec.h
+++ b/arch/arm/include/asm/opcodes-sec.h
@@ -1,14 +1,7 @@
/*
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
* Copyright (C) 2012 ARM Limited
+ *
+ * SPDX-License-Identifier: GPL-2.0
*/
#ifndef __ASM_ARM_OPCODES_SEC_H
diff --git a/arch/arm/include/asm/opcodes-virt.h b/arch/arm/include/asm/opcodes-virt.h
index efcfdf92d9d..92729970d1a 100644
--- a/arch/arm/include/asm/opcodes-virt.h
+++ b/arch/arm/include/asm/opcodes-virt.h
@@ -2,19 +2,7 @@
* opcodes-virt.h: Opcode definitions for the ARM virtualization extensions
* Copyright (C) 2012 Linaro Limited
*
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License along
- * with this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
+ * SPDX-License-Identifier: GPL-2.0+
*/
#ifndef __ASM_ARM_OPCODES_VIRT_H
#define __ASM_ARM_OPCODES_VIRT_H
diff --git a/arch/arm/include/asm/opcodes.h b/arch/arm/include/asm/opcodes.h
index e796c598513..199f0ba0459 100644
--- a/arch/arm/include/asm/opcodes.h
+++ b/arch/arm/include/asm/opcodes.h
@@ -1,9 +1,7 @@
/*
* arch/arm/include/asm/opcodes.h
*
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
+ * SPDX-License-Identifier: GPL-2.0
*/
#ifndef __ASM_ARM_OPCODES_H
diff --git a/arch/arm/lib/asm-offsets.c b/arch/arm/lib/asm-offsets.c
index e5bcaea1aee..d620dc08a07 100644
--- a/arch/arm/lib/asm-offsets.c
+++ b/arch/arm/lib/asm-offsets.c
@@ -14,6 +14,7 @@
#include <common.h>
#include <linux/kbuild.h>
+#include <linux/arm-smccc.h>
#if defined(CONFIG_MX25) || defined(CONFIG_MX27) || defined(CONFIG_MX35) \
|| defined(CONFIG_MX51) || defined(CONFIG_MX53)
@@ -198,5 +199,12 @@ int main(void)
DEFINE(PLL_DP_HFS_MFN, offsetof(struct dpll, dp_hfs_mfn));
#endif
+#ifdef CONFIG_ARM_SMCCC
+ DEFINE(ARM_SMCCC_RES_X0_OFFS, offsetof(struct arm_smccc_res, a0));
+ DEFINE(ARM_SMCCC_RES_X2_OFFS, offsetof(struct arm_smccc_res, a2));
+ DEFINE(ARM_SMCCC_QUIRK_ID_OFFS, offsetof(struct arm_smccc_quirk, id));
+ DEFINE(ARM_SMCCC_QUIRK_STATE_OFFS, offsetof(struct arm_smccc_quirk, state));
+#endif
+
return 0;
}
diff --git a/include/linux/arm-smccc.h b/include/linux/arm-smccc.h
index 4c5bca38c65..28e61ce83bb 100644
--- a/include/linux/arm-smccc.h
+++ b/include/linux/arm-smccc.h
@@ -1,15 +1,7 @@
/*
* Copyright (c) 2015, Linaro Limited
*
- * This software is licensed under the terms of the GNU General Public
- * License version 2, as published by the Free Software Foundation, and
- * may be copied, distributed, and modified under those terms.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
+ * SPDX-License-Identifier: GPL-2.0
*/
#ifndef __LINUX_ARM_SMCCC_H
#define __LINUX_ARM_SMCCC_H
--
GitLab
From 573a3811edc89c2ea3bf4fd077e3673b863b9a0d Mon Sep 17 00:00:00 2001
From: Masahiro Yamada <yamada.masahiro@socionext.com>
Date: Fri, 14 Apr 2017 11:10:24 +0900
Subject: [PATCH 074/282] sysreset: psci: support system reset in a generic way
with PSCI
If the system is running PSCI firmware, the System Reset function
(func ID: 0x80000009) is supposed to be handled by PSCI, that is,
the SoC/board specific reset implementation should be moved to PSCI.
U-Boot should call the PSCI service according to the arm-smccc
manner.
The arm-smccc is supported on ARMv7 or later. Especially, ARMv8
generation SoCs are likely to run ARM Trusted Firmware BL31. In
this case, U-Boot is a non-secure world boot loader, so it should
not be able to reset the system directly.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
---
arch/arm/Kconfig | 1 +
drivers/Kconfig | 2 +
drivers/Makefile | 5 +-
drivers/firmware/Kconfig | 6 ++
drivers/firmware/Makefile | 2 +
drivers/firmware/firmware-uclass.c | 11 ++++
drivers/firmware/psci.c | 94 ++++++++++++++++++++++++++++++
drivers/sysreset/Kconfig | 10 ++++
drivers/sysreset/Makefile | 1 +
drivers/sysreset/sysreset_psci.c | 41 +++++++++++++
include/dm/uclass-id.h | 1 +
include/linux/psci.h | 13 +++++
12 files changed, 185 insertions(+), 2 deletions(-)
create mode 100644 drivers/firmware/Kconfig
create mode 100644 drivers/firmware/Makefile
create mode 100644 drivers/firmware/firmware-uclass.c
create mode 100644 drivers/firmware/psci.c
create mode 100644 drivers/sysreset/sysreset_psci.c
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 16578b8b389..7812f21f36b 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -177,6 +177,7 @@ config SYS_CACHELINE_SIZE
config ARM_SMCCC
bool "Support for ARM SMC Calling Convention (SMCCC)"
depends on CPU_V7 || ARM64
+ select ARM_PSCI_FW
help
Say Y here if you want to enable ARM SMC Calling Convention.
This should be enabled if U-Boot needs to communicate with system
diff --git a/drivers/Kconfig b/drivers/Kconfig
index 3e6bbacd15c..a096dad2b22 100644
--- a/drivers/Kconfig
+++ b/drivers/Kconfig
@@ -24,6 +24,8 @@ source "drivers/dfu/Kconfig"
source "drivers/dma/Kconfig"
+source "drivers/firmware/Kconfig"
+
source "drivers/fpga/Kconfig"
source "drivers/gpio/Kconfig"
diff --git a/drivers/Makefile b/drivers/Makefile
index 5d8baa5a1fe..4a4b2377c58 100644
--- a/drivers/Makefile
+++ b/drivers/Makefile
@@ -23,7 +23,7 @@ obj-$(CONFIG_SPL_SERIAL_SUPPORT) += serial/
obj-$(CONFIG_SPL_SPI_SUPPORT) += spi/
obj-$(CONFIG_SPL_POWER_SUPPORT) += power/ power/pmic/
obj-$(CONFIG_SPL_POWER_SUPPORT) += power/regulator/
-obj-$(CONFIG_SPL_DRIVERS_MISC_SUPPORT) += misc/ sysreset/
+obj-$(CONFIG_SPL_DRIVERS_MISC_SUPPORT) += misc/ sysreset/ firmware/
obj-$(CONFIG_SPL_MTD_SUPPORT) += mtd/
obj-$(CONFIG_SPL_NAND_SUPPORT) += mtd/nand/
obj-$(CONFIG_SPL_ONENAND_SUPPORT) += mtd/onenand/
@@ -52,7 +52,7 @@ endif
ifdef CONFIG_TPL_BUILD
obj-$(CONFIG_TPL_I2C_SUPPORT) += i2c/
-obj-$(CONFIG_TPL_DRIVERS_MISC_SUPPORT) += misc/ sysreset/
+obj-$(CONFIG_TPL_DRIVERS_MISC_SUPPORT) += misc/ sysreset/ firmware/
obj-$(CONFIG_TPL_MMC_SUPPORT) += mmc/
obj-$(CONFIG_TPL_MPC8XXX_INIT_DDR_SUPPORT) += ddr/fsl/
obj-$(CONFIG_TPL_NAND_SUPPORT) += mtd/nand/
@@ -71,6 +71,7 @@ obj-y += block/
obj-$(CONFIG_BOOTCOUNT_LIMIT) += bootcount/
obj-$(CONFIG_CPU) += cpu/
obj-y += crypto/
+obj-y += firmware/
obj-$(CONFIG_FPGA) += fpga/
obj-y += hwmon/
obj-y += misc/
diff --git a/drivers/firmware/Kconfig b/drivers/firmware/Kconfig
new file mode 100644
index 00000000000..4c32426e0ec
--- /dev/null
+++ b/drivers/firmware/Kconfig
@@ -0,0 +1,6 @@
+config FIRMWARE
+ bool
+
+config ARM_PSCI_FW
+ bool
+ select FIRMWARE
diff --git a/drivers/firmware/Makefile b/drivers/firmware/Makefile
new file mode 100644
index 00000000000..b2082553684
--- /dev/null
+++ b/drivers/firmware/Makefile
@@ -0,0 +1,2 @@
+obj-$(CONFIG_FIRMWARE) += firmware-uclass.o
+obj-$(CONFIG_ARM_PSCI_FW) += psci.o
diff --git a/drivers/firmware/firmware-uclass.c b/drivers/firmware/firmware-uclass.c
new file mode 100644
index 00000000000..01b6a44b9d3
--- /dev/null
+++ b/drivers/firmware/firmware-uclass.c
@@ -0,0 +1,11 @@
+/*
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include <dm/uclass.h>
+
+/* Firmware access is platform-dependent. No generic code in uclass */
+UCLASS_DRIVER(firmware) = {
+ .id = UCLASS_FIRMWARE,
+ .name = "firmware",
+};
diff --git a/drivers/firmware/psci.c b/drivers/firmware/psci.c
new file mode 100644
index 00000000000..40fba6432ce
--- /dev/null
+++ b/drivers/firmware/psci.c
@@ -0,0 +1,94 @@
+/*
+ * Copyright (C) 2017 Masahiro Yamada <yamada.masahiro@socionext.com>
+ *
+ * Based on drivers/firmware/psci.c from Linux:
+ * Copyright (C) 2015 ARM Limited
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include <common.h>
+#include <dm/device.h>
+#include <dm/lists.h>
+#include <libfdt.h>
+#include <linux/arm-smccc.h>
+#include <linux/errno.h>
+#include <linux/psci.h>
+
+psci_fn *invoke_psci_fn;
+
+static unsigned long __invoke_psci_fn_hvc(unsigned long function_id,
+ unsigned long arg0, unsigned long arg1,
+ unsigned long arg2)
+{
+ struct arm_smccc_res res;
+
+ arm_smccc_hvc(function_id, arg0, arg1, arg2, 0, 0, 0, 0, &res);
+ return res.a0;
+}
+
+static unsigned long __invoke_psci_fn_smc(unsigned long function_id,
+ unsigned long arg0, unsigned long arg1,
+ unsigned long arg2)
+{
+ struct arm_smccc_res res;
+
+ arm_smccc_smc(function_id, arg0, arg1, arg2, 0, 0, 0, 0, &res);
+ return res.a0;
+}
+
+static int psci_bind(struct udevice *dev)
+{
+ /* No SYSTEM_RESET support for PSCI 0.1 */
+ if (of_device_is_compatible(dev, "arm,psci-0.2") ||
+ of_device_is_compatible(dev, "arm,psci-1.0")) {
+ int ret;
+
+ /* bind psci-sysreset optionally */
+ ret = device_bind_driver(dev, "psci-sysreset", "psci-sysreset",
+ NULL);
+ if (ret)
+ debug("PSCI System Reset was not bound.\n");
+ }
+
+ return 0;
+}
+
+static int psci_probe(struct udevice *dev)
+{
+ DECLARE_GLOBAL_DATA_PTR;
+ const char *method;
+
+ method = fdt_stringlist_get(gd->fdt_blob, dev->of_offset, "method", 0,
+ NULL);
+ if (!method) {
+ printf("missing \"method\" property\n");
+ return -ENXIO;
+ }
+
+ if (!strcmp("hvc", method)) {
+ invoke_psci_fn = __invoke_psci_fn_hvc;
+ } else if (!strcmp("smc", method)) {
+ invoke_psci_fn = __invoke_psci_fn_smc;
+ } else {
+ printf("invalid \"method\" property: %s\n", method);
+ return -EINVAL;
+ }
+
+ return 0;
+}
+
+static const struct udevice_id psci_of_match[] = {
+ { .compatible = "arm,psci" },
+ { .compatible = "arm,psci-0.2" },
+ { .compatible = "arm,psci-1.0" },
+ {},
+};
+
+U_BOOT_DRIVER(psci) = {
+ .name = "psci",
+ .id = UCLASS_FIRMWARE,
+ .of_match = psci_of_match,
+ .bind = psci_bind,
+ .probe = psci_probe,
+};
diff --git a/drivers/sysreset/Kconfig b/drivers/sysreset/Kconfig
index 05a37b9a14c..966463036f1 100644
--- a/drivers/sysreset/Kconfig
+++ b/drivers/sysreset/Kconfig
@@ -13,4 +13,14 @@ config SYSRESET
to effect a reset. The uclass will try all available drivers when
reset_walk() is called.
+if SYSRESET
+
+config SYSRESET_PSCI
+ bool "Enable support for PSCI System Reset"
+ depends on ARM_PSCI_FW
+ help
+ Enable PSCI SYSTEM_RESET function call. To use this, PSCI firmware
+ must be running on your system.
+
+endif
endmenu
diff --git a/drivers/sysreset/Makefile b/drivers/sysreset/Makefile
index 49b8bb61c63..7bb840649ff 100644
--- a/drivers/sysreset/Makefile
+++ b/drivers/sysreset/Makefile
@@ -5,6 +5,7 @@
#
obj-$(CONFIG_SYSRESET) += sysreset-uclass.o
+obj-$(CONFIG_SYSRESET_PSCI) += sysreset_psci.o
ifndef CONFIG_SPL_BUILD
obj-$(CONFIG_ROCKCHIP_RK3036) += sysreset_rk3036.o
diff --git a/drivers/sysreset/sysreset_psci.c b/drivers/sysreset/sysreset_psci.c
new file mode 100644
index 00000000000..a4911b7d8ff
--- /dev/null
+++ b/drivers/sysreset/sysreset_psci.c
@@ -0,0 +1,41 @@
+/*
+ * Copyright (C) 2017 Masahiro Yamada <yamada.masahiro@socionext.com>
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include <dm/device.h>
+#include <sysreset.h>
+#include <linux/errno.h>
+#include <linux/psci.h>
+
+static int psci_sysreset_request(struct udevice *dev, enum sysreset_t type)
+{
+ unsigned long function_id;
+
+ switch (type) {
+ case SYSRESET_WARM:
+ case SYSRESET_COLD:
+ function_id = PSCI_0_2_FN_SYSTEM_RESET;
+ break;
+ case SYSRESET_POWER:
+ function_id = PSCI_0_2_FN_SYSTEM_OFF;
+ break;
+ default:
+ return -ENOSYS;
+ }
+
+ invoke_psci_fn(function_id, 0, 0, 0);
+
+ return -EINPROGRESS;
+}
+
+static struct sysreset_ops psci_sysreset_ops = {
+ .request = psci_sysreset_request,
+};
+
+U_BOOT_DRIVER(psci_sysreset) = {
+ .name = "psci-sysreset",
+ .id = UCLASS_SYSRESET,
+ .ops = &psci_sysreset_ops,
+};
diff --git a/include/dm/uclass-id.h b/include/dm/uclass-id.h
index 8c92d0b0308..1b635e41103 100644
--- a/include/dm/uclass-id.h
+++ b/include/dm/uclass-id.h
@@ -35,6 +35,7 @@ enum uclass_id {
UCLASS_DMA, /* Direct Memory Access */
UCLASS_ETH, /* Ethernet device */
UCLASS_GPIO, /* Bank of general-purpose I/O pins */
+ UCLASS_FIRMWARE, /* Firmware */
UCLASS_I2C, /* I2C bus */
UCLASS_I2C_EEPROM, /* I2C EEPROM device */
UCLASS_I2C_GENERIC, /* Generic I2C device */
diff --git a/include/linux/psci.h b/include/linux/psci.h
index 310d83e0a91..8d13bd27021 100644
--- a/include/linux/psci.h
+++ b/include/linux/psci.h
@@ -87,4 +87,17 @@
#define PSCI_RET_NOT_PRESENT -7
#define PSCI_RET_DISABLED -8
+#ifdef CONFIG_ARM_PSCI_FW
+typedef unsigned long (psci_fn)(unsigned long, unsigned long,
+ unsigned long, unsigned long);
+
+extern psci_fn *invoke_psci_fn;
+#else
+unsigned long invoke_psci_fn(unsigned long a0, unsigned long a1,
+ unsigned long a2, unsigned long a3)
+{
+ return PSCI_RET_DISABLED;
+}
+#endif
+
#endif /* _UAPI_LINUX_PSCI_H */
--
GitLab
From 546a6f3a9b48fb891e5530528cc0696564438760 Mon Sep 17 00:00:00 2001
From: Tom Rini <trini@konsulko.com>
Date: Fri, 14 Apr 2017 19:47:50 -0400
Subject: [PATCH 075/282] buildman: Allow 'gnueabihf' toolchains for ARM
Many toolchains for ARM use the 'gnueabihf' suffix rather than just
'gnueabi', so allow these to be used, but with a lower priority than
'gnueabi' ones.
Cc: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
---
tools/buildman/toolchain.py | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/tools/buildman/toolchain.py b/tools/buildman/toolchain.py
index 47788762016..5cf97ac8148 100644
--- a/tools/buildman/toolchain.py
+++ b/tools/buildman/toolchain.py
@@ -120,8 +120,9 @@ class Toolchain:
Priority of toolchain, PRIORITY_CALC=highest, 20=lowest.
"""
priority_list = ['-elf', '-unknown-linux-gnu', '-linux',
- '-none-linux-gnueabi', '-uclinux', '-none-eabi',
- '-gentoo-linux-gnu', '-linux-gnueabi', '-le-linux', '-uclinux']
+ '-none-linux-gnueabi', '-none-linux-gnueabihf', '-uclinux',
+ '-none-eabi', '-gentoo-linux-gnu', '-linux-gnueabi',
+ '-linux-gnueabihf', '-le-linux', '-uclinux']
for prio in range(len(priority_list)):
if priority_list[prio] in fname:
return PRIORITY_CALC + prio
--
GitLab
From 8399538cba0e70b3bf7953feb16e03df0c9a1960 Mon Sep 17 00:00:00 2001
From: Tom Rini <trini@konsulko.com>
Date: Fri, 14 Apr 2017 19:47:51 -0400
Subject: [PATCH 076/282] travis-ci: Switch over to Linaro gcc-6.3.1 toolchains
for ARM
Linaro provides a number of pre-built GCC toolchains for both 32 and
64bit ARM. Switch to their 2017.02 release of gcc-6.3.1 for both.
Cc: Koen Kooi <koen.kooi@linaro.org>
Signed-off-by: Tom Rini <trini@konsulko.com>
---
.travis.yml | 14 ++++++++++----
1 file changed, 10 insertions(+), 4 deletions(-)
diff --git a/.travis.yml b/.travis.yml
index 591915df4c8..f6898a2edb7 100644
--- a/.travis.yml
+++ b/.travis.yml
@@ -22,8 +22,6 @@ addons:
- swig
- libpython-dev
- gcc-powerpc-linux-gnu
- - gcc-arm-linux-gnueabihf
- - gcc-aarch64-linux-gnu
- iasl
- grub-efi-ia32-bin
- rpm2cpio
@@ -40,6 +38,8 @@ install:
- ln -s travis-ci /tmp/uboot-test-hooks/py/`hostname`
# prepare buildman environment
- echo -e "[toolchain]\nroot = /usr" > ~/.buildman
+ - echo -e "aarch64 = /tmp/gcc-linaro-6.3.1-2017.02-x86_64_aarch64-linux-gnu" >> ~/.buildman
+ - echo -e "arm = /tmp/gcc-linaro-6.3.1-2017.02-x86_64_arm-linux-gnueabihf" >> ~/.buildman
- echo -e "\n[toolchain-alias]\nsh = sh4\nopenrisc = or32" >> ~/.buildman
- cat ~/.buildman
- virtualenv /tmp/venv
@@ -70,6 +70,13 @@ before_script:
echo -e "\n[toolchain-prefix]\nx86 = ${HOME}/.buildman-toolchains/gcc-4.9.0-nolibc/x86_64-linux/bin/x86_64-linux-" >> ~/.buildman;
fi
- if [[ "${TOOLCHAIN}" == *xtensa* ]]; then ./tools/buildman/buildman --fetch-arch xtensa ; fi
+ # If TOOLCHAIN is unset, we're on some flavour of ARM.
+ - if [[ "${TOOLCHAIN}" == "" ]]; then
+ wget http://releases.linaro.org/components/toolchain/binaries/6.3-2017.02/aarch64-linux-gnu/gcc-linaro-6.3.1-2017.02-x86_64_aarch64-linux-gnu.tar.xz &&
+ wget http://releases.linaro.org/components/toolchain/binaries/6.3-2017.02/arm-linux-gnueabihf/gcc-linaro-6.3.1-2017.02-x86_64_arm-linux-gnueabihf.tar.xz &&
+ tar -C /tmp -xf gcc-linaro-6.3.1-2017.02-x86_64_aarch64-linux-gnu.tar.xz &&
+ tar -C /tmp -xf gcc-linaro-6.3.1-2017.02-x86_64_arm-linux-gnueabihf.tar.xz;
+ fi
- if [[ "${QEMU_TARGET}" != "" ]]; then
git clone git://git.qemu.org/qemu.git /tmp/qemu;
pushd /tmp/qemu;
@@ -152,7 +159,7 @@ matrix:
- env:
- BUILDMAN="sun7i"
- env:
- - BUILDMAN="sun8i -x orangepi_pc2"
+ - BUILDMAN="sun8i"
- env:
- BUILDMAN="sun9i"
- env:
@@ -221,7 +228,6 @@ matrix:
- BUILDMAN="uniphier"
- env:
- BUILDMAN="aarch64 -x tegra,freescale,mvebu,uniphier,sunxi,samsung,rockchip"
- TOOLCHAIN="aarch64"
- env:
- BUILDMAN="rockchip"
- env:
--
GitLab
From 1ecd2a2f0600e61f2edff4fc3dce76f0f6559b67 Mon Sep 17 00:00:00 2001
From: "xypron.glpk@gmx.de" <xypron.glpk@gmx.de>
Date: Sat, 15 Apr 2017 12:29:20 +0200
Subject: [PATCH 077/282] arm: omap-common: add missing va_end()
Each call of va_start must be matched by a call of va_end.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Tom Rini <trini@konsulko.com>
---
arch/arm/mach-omap2/sec-common.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/arch/arm/mach-omap2/sec-common.c b/arch/arm/mach-omap2/sec-common.c
index 0fa8db05fe7..ec1ffa556ad 100644
--- a/arch/arm/mach-omap2/sec-common.c
+++ b/arch/arm/mach-omap2/sec-common.c
@@ -39,8 +39,10 @@ u32 secure_rom_call(u32 service, u32 proc_id, u32 flag, ...)
num_args = va_arg(ap, u32);
- if (num_args > 4)
+ if (num_args > 4) {
+ va_end(ap);
return 1;
+ }
/* Copy args to aligned args structure */
for (i = 0; i < num_args; i++)
--
GitLab
From ddc6a9de057e0fd0b46ba21d16a50a8d24351ef6 Mon Sep 17 00:00:00 2001
From: "xypron.glpk@gmx.de" <xypron.glpk@gmx.de>
Date: Sat, 15 Apr 2017 13:05:40 +0200
Subject: [PATCH 078/282] tools/env: avoid memory leak in fw_setenv
If realloc fails we should release the old buffer.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
---
tools/env/fw_env.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/tools/env/fw_env.c b/tools/env/fw_env.c
index 299e0c9608b..28616561830 100644
--- a/tools/env/fw_env.c
+++ b/tools/env/fw_env.c
@@ -473,6 +473,7 @@ int fw_setenv(int argc, char *argv[], struct env_opts *opts)
int i;
size_t len;
char *name, **valv;
+ char *oldval;
char *value = NULL;
int valc;
int ret;
@@ -507,11 +508,13 @@ int fw_setenv(int argc, char *argv[], struct env_opts *opts)
if (value)
value[len - 1] = ' ';
+ oldval = value;
value = realloc(value, len + val_len + 1);
if (!value) {
fprintf(stderr,
"Cannot malloc %zu bytes: %s\n",
len, strerror(errno));
+ free(oldval);
return -1;
}
--
GitLab
From 6568c731c47bfbb137183f8f745e8168604ea8ab Mon Sep 17 00:00:00 2001
From: "xypron.glpk@gmx.de" <xypron.glpk@gmx.de>
Date: Sat, 15 Apr 2017 13:28:13 +0200
Subject: [PATCH 079/282] yaffs2: remove redundant condition
If !parent, the changed line is not reached.
So there is no need to check the value again.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Tom Rini <trini@konsulko.com>
---
fs/yaffs2/yaffsfs.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/fs/yaffs2/yaffsfs.c b/fs/yaffs2/yaffsfs.c
index 41e5f0108cf..ba76a5ccdbd 100644
--- a/fs/yaffs2/yaffsfs.c
+++ b/fs/yaffs2/yaffsfs.c
@@ -3018,7 +3018,7 @@ int yaffs_symlink(const YCHAR *oldpath, const YCHAR *newpath)
yaffsfs_SetError(-ENFILE);
else if (parent->my_dev->read_only)
yaffsfs_SetError(-EROFS);
- else if (parent) {
+ else {
obj = yaffs_create_symlink(parent, name, mode, 0, 0, oldpath);
if (obj)
retVal = 0;
--
GitLab
From 73be5b3fa73e329ad0d9e12db427cd665e1a483c Mon Sep 17 00:00:00 2001
From: "xypron.glpk@gmx.de" <xypron.glpk@gmx.de>
Date: Sat, 15 Apr 2017 15:05:46 +0200
Subject: [PATCH 080/282] usbtty: avoid potential NULL pointer dereference
If current_urb is NULL it should not be dereferenced.
The problem was indicated by cppcheck.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Tom Rini <trini@konsulko.com>
---
drivers/serial/usbtty.c | 13 +++++++------
1 file changed, 7 insertions(+), 6 deletions(-)
diff --git a/drivers/serial/usbtty.c b/drivers/serial/usbtty.c
index 2e19813643b..29799dce93a 100644
--- a/drivers/serial/usbtty.c
+++ b/drivers/serial/usbtty.c
@@ -850,6 +850,13 @@ static int write_buffer (circbuf_t * buf)
struct urb *current_urb = NULL;
current_urb = next_urb (device_instance, endpoint);
+
+ if (!current_urb) {
+ TTYERR ("current_urb is NULL, buf->size %d\n",
+ buf->size);
+ return 0;
+ }
+
/* TX data still exists - send it now
*/
if(endpoint->sent < current_urb->actual_length){
@@ -871,12 +878,6 @@ static int write_buffer (circbuf_t * buf)
*/
while (buf->size > 0) {
- if (!current_urb) {
- TTYERR ("current_urb is NULL, buf->size %d\n",
- buf->size);
- return total;
- }
-
dest = (char*)current_urb->buffer +
current_urb->actual_length;
--
GitLab
From ea1e3f96c3666245b3651ab8022738763b97e6a8 Mon Sep 17 00:00:00 2001
From: "xypron.glpk@gmx.de" <xypron.glpk@gmx.de>
Date: Sat, 15 Apr 2017 15:15:40 +0200
Subject: [PATCH 081/282] FPGA: drivers/fpga/ivm_core.c: incorrect printf
The number of arguments for printf does not match the
format string.
The problem was indicated by cppcheck.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Tom Rini <trini@konsulko.com>
---
drivers/fpga/ivm_core.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/fpga/ivm_core.c b/drivers/fpga/ivm_core.c
index 03aea625d58..78e9cc46ace 100644
--- a/drivers/fpga/ivm_core.c
+++ b/drivers/fpga/ivm_core.c
@@ -3142,7 +3142,7 @@ signed char ispVMProcessLVDS(unsigned short a_usLVDSCount)
}
#ifdef DEBUG
- printf(");\n", a_usLVDSCount);
+ printf(");\n");
#endif /* DEBUG */
return 0;
--
GitLab
From 0e0de24b07b8314ea0cc247a89b722c2230e4b0a Mon Sep 17 00:00:00 2001
From: "xypron.glpk@gmx.de" <xypron.glpk@gmx.de>
Date: Sat, 15 Apr 2017 15:23:49 +0200
Subject: [PATCH 082/282] ddr: fsl: incorrect logical constraint in
populate_memctl_options
(pdimm[0].data_width >= 32) || (pdimm[0].data_width <= 40)
is always true.
We should use && here.
The problem was indicated by cppcheck.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: York Sun <york.sun@nxp.com>
---
drivers/ddr/fsl/options.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/ddr/fsl/options.c b/drivers/ddr/fsl/options.c
index d6a8fcb216a..cee97fe2323 100644
--- a/drivers/ddr/fsl/options.c
+++ b/drivers/ddr/fsl/options.c
@@ -916,7 +916,7 @@ unsigned int populate_memctl_options(const common_timing_params_t *common_dimm,
if ((pdimm[0].data_width >= 64) && \
(pdimm[0].data_width <= 72))
popts->data_bus_width = 0;
- else if ((pdimm[0].data_width >= 32) || \
+ else if ((pdimm[0].data_width >= 32) && \
(pdimm[0].data_width <= 40))
popts->data_bus_width = 1;
else {
--
GitLab
From 7a931b958e4f942b16d3f5d31dc4c0982fa186c8 Mon Sep 17 00:00:00 2001
From: "xypron.glpk@gmx.de" <xypron.glpk@gmx.de>
Date: Sat, 15 Apr 2017 15:31:53 +0200
Subject: [PATCH 083/282] fsl/sata: correctly identify failed malloc
After allocating sata->cmd_hdr_tbl_offset we have to check
this variable and not variable sata.
The problem was indicated by cppcheck.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Tom Rini <trini@konsulko.com>
---
drivers/block/fsl_sata.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/block/fsl_sata.c b/drivers/block/fsl_sata.c
index e000ebff76f..31f7fab8b47 100644
--- a/drivers/block/fsl_sata.c
+++ b/drivers/block/fsl_sata.c
@@ -124,7 +124,7 @@ int init_sata(int dev)
length = sizeof(struct cmd_hdr_tbl);
align = SATA_HC_CMD_HDR_TBL_ALIGN;
sata->cmd_hdr_tbl_offset = (void *)malloc(length + align);
- if (!sata) {
+ if (!sata->cmd_hdr_tbl_offset) {
printf("alloc the command header failed\n\r");
return -1;
}
--
GitLab
From d1710561b0c4b68041d0f51e8fc5cfe3c2c15bb9 Mon Sep 17 00:00:00 2001
From: "xypron.glpk@gmx.de" <xypron.glpk@gmx.de>
Date: Sat, 15 Apr 2017 16:37:54 +0200
Subject: [PATCH 084/282] drivers/crypto/fsl: remove redundant logical
contraint
'A || (!A && B)' is equivalent to 'A || B'.
Let's reduce the complexity of the statement in start_jr0().
The problem was indicated by cppcheck.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: York Sun <york.sun@nxp.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
---
drivers/crypto/fsl/jr.c | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/drivers/crypto/fsl/jr.c b/drivers/crypto/fsl/jr.c
index 1b882291e4f..c33777fc7dd 100644
--- a/drivers/crypto/fsl/jr.c
+++ b/drivers/crypto/fsl/jr.c
@@ -47,8 +47,7 @@ static inline void start_jr0(uint8_t sec_idx)
* VIRT_EN_INCL = 1 & VIRT_EN_POR = 0 & SEC_SCFGR_VIRT_EN = 1
*/
if ((ctpr_ms & SEC_CTPR_MS_VIRT_EN_POR) ||
- (!(ctpr_ms & SEC_CTPR_MS_VIRT_EN_POR) &&
- (scfgr & SEC_SCFGR_VIRT_EN)))
+ (scfgr & SEC_SCFGR_VIRT_EN))
sec_out32(&sec->jrstartr, CONFIG_JRSTARTR_JR0);
} else {
/* VIRT_EN_INCL = 0 && VIRT_EN_POR_VALUE = 1 */
--
GitLab
From e1bc64eec279e103feedff02f3a4b3c2e9f15240 Mon Sep 17 00:00:00 2001
From: Simon Glass <sjg@chromium.org>
Date: Sat, 15 Apr 2017 13:11:31 -0600
Subject: [PATCH 085/282] rockchip: Print a message when returning to the
bootrom
At present if the return to bootrom fails (e.g. because you are not using
the Rockchip's bootrom's pointer table in MMC) then the board prints
SPL message and hangs. Print a message first if we can, to help in
understanding what happened when it hangs.
Signed-off-by: Simon Glass <sjg@chromium.org>
Tested-by: Heiko Stuebner <heiko@sntech.de>
Acked-by: Heiko Stuebner <heiko@sntech.de>
---
arch/arm/include/asm/arch-rockchip/bootrom.h | 9 +++++++--
arch/arm/mach-rockchip/Makefile | 2 ++
arch/arm/mach-rockchip/bootrom.c | 16 ++++++++++++++++
arch/arm/mach-rockchip/save_boot_param.S | 6 +++---
4 files changed, 28 insertions(+), 5 deletions(-)
create mode 100644 arch/arm/mach-rockchip/bootrom.c
diff --git a/arch/arm/include/asm/arch-rockchip/bootrom.h b/arch/arm/include/asm/arch-rockchip/bootrom.h
index 79fb1a07acf..92eb8783a3a 100644
--- a/arch/arm/include/asm/arch-rockchip/bootrom.h
+++ b/arch/arm/include/asm/arch-rockchip/bootrom.h
@@ -13,10 +13,15 @@
*/
extern u32 SAVE_SP_ADDR;
-/*
+/**
* Hand control back to the bootrom to load another
* boot stage.
*/
-extern void back_to_bootrom(void);
+void back_to_bootrom(void);
+
+/**
+ * Assembler component for the above (do not call this directly)
+ */
+void _back_to_bootrom_s(void);
#endif
diff --git a/arch/arm/mach-rockchip/Makefile b/arch/arm/mach-rockchip/Makefile
index 6b251c7e7e9..327b26705dc 100644
--- a/arch/arm/mach-rockchip/Makefile
+++ b/arch/arm/mach-rockchip/Makefile
@@ -4,6 +4,8 @@
# SPDX-License-Identifier: GPL-2.0+
#
+obj-$(CONFIG_ROCKCHIP_BROM_HELPER) += bootrom.o
+
ifdef CONFIG_TPL_BUILD
obj-$(CONFIG_ROCKCHIP_RK3188) += rk3188-board-tpl.o
obj-$(CONFIG_ROCKCHIP_BROM_HELPER) += save_boot_param.o
diff --git a/arch/arm/mach-rockchip/bootrom.c b/arch/arm/mach-rockchip/bootrom.c
new file mode 100644
index 00000000000..da36f926972
--- /dev/null
+++ b/arch/arm/mach-rockchip/bootrom.c
@@ -0,0 +1,16 @@
+/**
+ * Copyright (c) 2017 Google, Inc
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include <common.h>
+#include <asm/arch/bootrom.h>
+
+void back_to_bootrom(void)
+{
+#if defined(CONFIG_SPL_LIBGENERIC_SUPPORT) && !defined(CONFIG_TPL_BUILD)
+ printf("Returning to boot ROM...");
+#endif
+ _back_to_bootrom_s();
+}
diff --git a/arch/arm/mach-rockchip/save_boot_param.S b/arch/arm/mach-rockchip/save_boot_param.S
index 85b407b4d3b..5e6c8dba13e 100644
--- a/arch/arm/mach-rockchip/save_boot_param.S
+++ b/arch/arm/mach-rockchip/save_boot_param.S
@@ -23,10 +23,10 @@ ENTRY(save_boot_params)
ENDPROC(save_boot_params)
-.globl back_to_bootrom
-ENTRY(back_to_bootrom)
+.globl _back_to_bootrom_s
+ENTRY(_back_to_bootrom_s)
ldr r0, =SAVE_SP_ADDR
ldr sp, [r0]
mov r0, #0
pop {r1-r12, pc}
-ENDPROC(back_to_bootrom)
+ENDPROC(_back_to_bootrom_s)
--
GitLab
From 54f302f1197a490c2c4e3564c698ecd090d5013b Mon Sep 17 00:00:00 2001
From: Tom Rini <trini@konsulko.com>
Date: Tue, 18 Apr 2017 10:30:09 -0400
Subject: [PATCH 086/282] board: Remove orphan SPARC boards
Since 936478e797a8 SPARC as been removed as an architecture. Remove
these now orphan boards.
Signed-off-by: Tom Rini <trini@konsulko.com>
---
board/gaisler/gr_cpci_ax2000/Kconfig | 9 -----
board/gaisler/gr_cpci_ax2000/MAINTAINERS | 6 ---
board/gaisler/gr_cpci_ax2000/Makefile | 8 ----
board/gaisler/gr_cpci_ax2000/gr_cpci_ax2000.c | 40 -------------------
board/gaisler/gr_ep2s60/Kconfig | 9 -----
board/gaisler/gr_ep2s60/MAINTAINERS | 6 ---
board/gaisler/gr_ep2s60/Makefile | 8 ----
board/gaisler/gr_ep2s60/gr_ep2s60.c | 40 -------------------
board/gaisler/gr_xc3s_1500/Kconfig | 9 -----
board/gaisler/gr_xc3s_1500/MAINTAINERS | 6 ---
board/gaisler/gr_xc3s_1500/Makefile | 8 ----
board/gaisler/gr_xc3s_1500/gr_xc3s_1500.c | 28 -------------
board/gaisler/grsim/Kconfig | 9 -----
board/gaisler/grsim/MAINTAINERS | 6 ---
board/gaisler/grsim/Makefile | 8 ----
board/gaisler/grsim/grsim.c | 29 --------------
board/gaisler/grsim_leon2/Kconfig | 9 -----
board/gaisler/grsim_leon2/MAINTAINERS | 6 ---
board/gaisler/grsim_leon2/Makefile | 8 ----
board/gaisler/grsim_leon2/grsim_leon2.c | 29 --------------
20 files changed, 281 deletions(-)
delete mode 100644 board/gaisler/gr_cpci_ax2000/Kconfig
delete mode 100644 board/gaisler/gr_cpci_ax2000/MAINTAINERS
delete mode 100644 board/gaisler/gr_cpci_ax2000/Makefile
delete mode 100644 board/gaisler/gr_cpci_ax2000/gr_cpci_ax2000.c
delete mode 100644 board/gaisler/gr_ep2s60/Kconfig
delete mode 100644 board/gaisler/gr_ep2s60/MAINTAINERS
delete mode 100644 board/gaisler/gr_ep2s60/Makefile
delete mode 100644 board/gaisler/gr_ep2s60/gr_ep2s60.c
delete mode 100644 board/gaisler/gr_xc3s_1500/Kconfig
delete mode 100644 board/gaisler/gr_xc3s_1500/MAINTAINERS
delete mode 100644 board/gaisler/gr_xc3s_1500/Makefile
delete mode 100644 board/gaisler/gr_xc3s_1500/gr_xc3s_1500.c
delete mode 100644 board/gaisler/grsim/Kconfig
delete mode 100644 board/gaisler/grsim/MAINTAINERS
delete mode 100644 board/gaisler/grsim/Makefile
delete mode 100644 board/gaisler/grsim/grsim.c
delete mode 100644 board/gaisler/grsim_leon2/Kconfig
delete mode 100644 board/gaisler/grsim_leon2/MAINTAINERS
delete mode 100644 board/gaisler/grsim_leon2/Makefile
delete mode 100644 board/gaisler/grsim_leon2/grsim_leon2.c
diff --git a/board/gaisler/gr_cpci_ax2000/Kconfig b/board/gaisler/gr_cpci_ax2000/Kconfig
deleted file mode 100644
index c12a002179a..00000000000
--- a/board/gaisler/gr_cpci_ax2000/Kconfig
+++ /dev/null
@@ -1,9 +0,0 @@
-if TARGET_GR_CPCI_AX2000
-
-config SYS_BOARD
- default "gr_cpci_ax2000"
-
-config SYS_CONFIG_NAME
- default "gr_cpci_ax2000"
-
-endif
diff --git a/board/gaisler/gr_cpci_ax2000/MAINTAINERS b/board/gaisler/gr_cpci_ax2000/MAINTAINERS
deleted file mode 100644
index df55a4cc416..00000000000
--- a/board/gaisler/gr_cpci_ax2000/MAINTAINERS
+++ /dev/null
@@ -1,6 +0,0 @@
-GR_CPCI_AX2000 BOARD
-#M: -
-S: Maintained
-F: board/gaisler/gr_cpci_ax2000/
-F: include/configs/gr_cpci_ax2000.h
-F: configs/gr_cpci_ax2000_defconfig
diff --git a/board/gaisler/gr_cpci_ax2000/Makefile b/board/gaisler/gr_cpci_ax2000/Makefile
deleted file mode 100644
index a08e04dbe8b..00000000000
--- a/board/gaisler/gr_cpci_ax2000/Makefile
+++ /dev/null
@@ -1,8 +0,0 @@
-#
-# (C) Copyright 2003-2006
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# SPDX-License-Identifier: GPL-2.0+
-#
-
-obj-y := gr_cpci_ax2000.o
diff --git a/board/gaisler/gr_cpci_ax2000/gr_cpci_ax2000.c b/board/gaisler/gr_cpci_ax2000/gr_cpci_ax2000.c
deleted file mode 100644
index f1868550c78..00000000000
--- a/board/gaisler/gr_cpci_ax2000/gr_cpci_ax2000.c
+++ /dev/null
@@ -1,40 +0,0 @@
-/*
- * (C) Copyright 2008
- * Daniel Hellstrom, daniel@gaisler.com.
- *
- * SPDX-License-Identifier: GPL-2.0+
- */
-
-#include <common.h>
-#include <netdev.h>
-#include <config.h>
-#include <asm/leon.h>
-
-int dram_init(void)
-{
- /* Does not set gd->ram_size here */
-
- return 0;
-}
-
-int checkboard(void)
-{
- puts("Board: GR-CPCI-AX2000\n");
- return 0;
-}
-
-int misc_init_r(void)
-{
- return 0;
-}
-
-#ifdef CONFIG_CMD_NET
-int board_eth_init(bd_t *bis)
-{
- int rc = 0;
-#ifdef CONFIG_SMC91111
- rc = smc91111_initialize(0, CONFIG_SMC91111_BASE);
-#endif
- return rc;
-}
-#endif
diff --git a/board/gaisler/gr_ep2s60/Kconfig b/board/gaisler/gr_ep2s60/Kconfig
deleted file mode 100644
index f49937c55a6..00000000000
--- a/board/gaisler/gr_ep2s60/Kconfig
+++ /dev/null
@@ -1,9 +0,0 @@
-if TARGET_GR_EP2S60
-
-config SYS_BOARD
- default "gr_ep2s60"
-
-config SYS_CONFIG_NAME
- default "gr_ep2s60"
-
-endif
diff --git a/board/gaisler/gr_ep2s60/MAINTAINERS b/board/gaisler/gr_ep2s60/MAINTAINERS
deleted file mode 100644
index 7acd5f44c6f..00000000000
--- a/board/gaisler/gr_ep2s60/MAINTAINERS
+++ /dev/null
@@ -1,6 +0,0 @@
-GR_EP2S60 BOARD
-#M: -
-S: Maintained
-F: board/gaisler/gr_ep2s60/
-F: include/configs/gr_ep2s60.h
-F: configs/gr_ep2s60_defconfig
diff --git a/board/gaisler/gr_ep2s60/Makefile b/board/gaisler/gr_ep2s60/Makefile
deleted file mode 100644
index 059a9c03c4c..00000000000
--- a/board/gaisler/gr_ep2s60/Makefile
+++ /dev/null
@@ -1,8 +0,0 @@
-#
-# (C) Copyright 2003-2006
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# SPDX-License-Identifier: GPL-2.0+
-#
-
-obj-y := gr_ep2s60.o
diff --git a/board/gaisler/gr_ep2s60/gr_ep2s60.c b/board/gaisler/gr_ep2s60/gr_ep2s60.c
deleted file mode 100644
index a73d89db2f0..00000000000
--- a/board/gaisler/gr_ep2s60/gr_ep2s60.c
+++ /dev/null
@@ -1,40 +0,0 @@
-/*
- * (C) Copyright 2008
- * Daniel Hellstrom, daniel@gaisler.com.
- *
- * SPDX-License-Identifier: GPL-2.0+
- */
-
-#include <common.h>
-#include <netdev.h>
-#include <config.h>
-#include <asm/leon.h>
-
-int dram_init(void)
-{
- /* Does not set gd->ram_size here */
-
- return 0;
-}
-
-int checkboard(void)
-{
- puts("Board: EP2S60 GRLIB\n");
- return 0;
-}
-
-int misc_init_r(void)
-{
- return 0;
-}
-
-#ifdef CONFIG_CMD_NET
-int board_eth_init(bd_t *bis)
-{
- int rc = 0;
-#ifdef CONFIG_SMC91111
- rc = smc91111_initialize(0, CONFIG_SMC91111_BASE);
-#endif
- return rc;
-}
-#endif
diff --git a/board/gaisler/gr_xc3s_1500/Kconfig b/board/gaisler/gr_xc3s_1500/Kconfig
deleted file mode 100644
index e695ba2cddb..00000000000
--- a/board/gaisler/gr_xc3s_1500/Kconfig
+++ /dev/null
@@ -1,9 +0,0 @@
-if TARGET_GR_XC3S_1500
-
-config SYS_BOARD
- default "gr_xc3s_1500"
-
-config SYS_CONFIG_NAME
- default "gr_xc3s_1500"
-
-endif
diff --git a/board/gaisler/gr_xc3s_1500/MAINTAINERS b/board/gaisler/gr_xc3s_1500/MAINTAINERS
deleted file mode 100644
index c4179d29c0a..00000000000
--- a/board/gaisler/gr_xc3s_1500/MAINTAINERS
+++ /dev/null
@@ -1,6 +0,0 @@
-GR_XC3S_1500 BOARD
-#M: -
-S: Maintained
-F: board/gaisler/gr_xc3s_1500/
-F: include/configs/gr_xc3s_1500.h
-F: configs/gr_xc3s_1500_defconfig
diff --git a/board/gaisler/gr_xc3s_1500/Makefile b/board/gaisler/gr_xc3s_1500/Makefile
deleted file mode 100644
index 302c4611e09..00000000000
--- a/board/gaisler/gr_xc3s_1500/Makefile
+++ /dev/null
@@ -1,8 +0,0 @@
-#
-# (C) Copyright 2003-2006
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# SPDX-License-Identifier: GPL-2.0+
-#
-
-obj-y := gr_xc3s_1500.o
diff --git a/board/gaisler/gr_xc3s_1500/gr_xc3s_1500.c b/board/gaisler/gr_xc3s_1500/gr_xc3s_1500.c
deleted file mode 100644
index d86047a7856..00000000000
--- a/board/gaisler/gr_xc3s_1500/gr_xc3s_1500.c
+++ /dev/null
@@ -1,28 +0,0 @@
-/*
- * (C) Copyright 2007
- * Daniel Hellstrom, daniel@gaisler.com.
- *
- * SPDX-License-Identifier: GPL-2.0+
- */
-
-#include <common.h>
-#include <config.h>
-#include <asm/leon.h>
-
-int dram_init(void)
-{
- /* Does not set gd->ram_size here */
-
- return 0;
-}
-
-int checkboard(void)
-{
- puts("Board: GR-XC3S-1500\n");
- return 0;
-}
-
-int misc_init_r(void)
-{
- return 0;
-}
diff --git a/board/gaisler/grsim/Kconfig b/board/gaisler/grsim/Kconfig
deleted file mode 100644
index 18598d3c2a7..00000000000
--- a/board/gaisler/grsim/Kconfig
+++ /dev/null
@@ -1,9 +0,0 @@
-if TARGET_GRSIM
-
-config SYS_BOARD
- default "grsim"
-
-config SYS_CONFIG_NAME
- default "grsim"
-
-endif
diff --git a/board/gaisler/grsim/MAINTAINERS b/board/gaisler/grsim/MAINTAINERS
deleted file mode 100644
index 4b3312ef728..00000000000
--- a/board/gaisler/grsim/MAINTAINERS
+++ /dev/null
@@ -1,6 +0,0 @@
-GRSIM BOARD
-#M: -
-S: Maintained
-F: board/gaisler/grsim/
-F: include/configs/grsim.h
-F: configs/grsim_defconfig
diff --git a/board/gaisler/grsim/Makefile b/board/gaisler/grsim/Makefile
deleted file mode 100644
index 4c93bdae837..00000000000
--- a/board/gaisler/grsim/Makefile
+++ /dev/null
@@ -1,8 +0,0 @@
-#
-# (C) Copyright 2003-2004
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# SPDX-License-Identifier: GPL-2.0+
-#
-
-obj-y := grsim.o
diff --git a/board/gaisler/grsim/grsim.c b/board/gaisler/grsim/grsim.c
deleted file mode 100644
index 99262b08133..00000000000
--- a/board/gaisler/grsim/grsim.c
+++ /dev/null
@@ -1,29 +0,0 @@
-/*
- * GRSIM/TSIM board
- *
- * (C) Copyright 2007
- * Daniel Hellstrom, Gaisler Research, daniel@gaisler.com.
- *
- * SPDX-License-Identifier: GPL-2.0+
- */
-
-#include <common.h>
-#include <asm/leon.h>
-
-int dram_init(void)
-{
- /* Does not set gd->ram_size here */
-
- return 0;
-}
-
-int checkboard(void)
-{
- puts("Board: GRSIM/TSIM\n");
- return 0;
-}
-
-int misc_init_r(void)
-{
- return 0;
-}
diff --git a/board/gaisler/grsim_leon2/Kconfig b/board/gaisler/grsim_leon2/Kconfig
deleted file mode 100644
index 0d21a0a985e..00000000000
--- a/board/gaisler/grsim_leon2/Kconfig
+++ /dev/null
@@ -1,9 +0,0 @@
-if TARGET_GRSIM_LEON2
-
-config SYS_BOARD
- default "grsim_leon2"
-
-config SYS_CONFIG_NAME
- default "grsim_leon2"
-
-endif
diff --git a/board/gaisler/grsim_leon2/MAINTAINERS b/board/gaisler/grsim_leon2/MAINTAINERS
deleted file mode 100644
index bf4a95001b8..00000000000
--- a/board/gaisler/grsim_leon2/MAINTAINERS
+++ /dev/null
@@ -1,6 +0,0 @@
-GRSIM_LEON2 BOARD
-#M: -
-S: Maintained
-F: board/gaisler/grsim_leon2/
-F: include/configs/grsim_leon2.h
-F: configs/grsim_leon2_defconfig
diff --git a/board/gaisler/grsim_leon2/Makefile b/board/gaisler/grsim_leon2/Makefile
deleted file mode 100644
index 5468305caa4..00000000000
--- a/board/gaisler/grsim_leon2/Makefile
+++ /dev/null
@@ -1,8 +0,0 @@
-#
-# (C) Copyright 2003-2004
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# SPDX-License-Identifier: GPL-2.0+
-#
-
-obj-y := grsim_leon2.o
diff --git a/board/gaisler/grsim_leon2/grsim_leon2.c b/board/gaisler/grsim_leon2/grsim_leon2.c
deleted file mode 100644
index c6c4bb42701..00000000000
--- a/board/gaisler/grsim_leon2/grsim_leon2.c
+++ /dev/null
@@ -1,29 +0,0 @@
-/*
- * GRSIM/TSIM board
- *
- * (C) Copyright 2007
- * Daniel Hellstrom, Gaisler Research, daniel@gaisler.com.
- *
- * SPDX-License-Identifier: GPL-2.0+
- */
-
-#include <common.h>
-#include <asm/leon.h>
-
-int dram_init(void)
-{
- /* Does not set gd->ram_size here */
-
- return 0;
-}
-
-int checkboard(void)
-{
- puts("Board: GRSIM/TSIM LEON2\n");
- return 0;
-}
-
-int misc_init_r(void)
-{
- return 0;
-}
--
GitLab
From 4d43d065db3262f9a9918ba72457bf36dfb8e0bb Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Myl=C3=A8ne=20Josserand?=
<mylene.josserand@free-electrons.com>
Date: Sun, 2 Apr 2017 12:59:03 +0200
Subject: [PATCH 087/282] sunxi: Move SUNXI_GMAC to Kconfig
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
Move the SUNXI_GMAC config option to Kconfig, remove it
from SYS_EXTRA_OPTIONS and rename it into SUN7I_GMAC.
Signed-off-by: Mylène Josserand <mylene.josserand@free-electrons.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
---
configs/A20-OLinuXino-Lime2_defconfig | 3 ++-
configs/A20-OLinuXino-Lime_defconfig | 3 ++-
configs/A20-OLinuXino_MICRO_defconfig | 3 ++-
configs/A20-Olimex-SOM-EVB_defconfig | 3 ++-
configs/Bananapi_defconfig | 3 ++-
configs/Bananapro_defconfig | 3 ++-
configs/CSQ_CS908_defconfig | 2 +-
configs/Colombus_defconfig | 3 ++-
configs/Cubieboard2_defconfig | 3 ++-
configs/Cubietruck_defconfig | 3 ++-
configs/Hummingbird_A31_defconfig | 3 ++-
configs/Itead_Ibox_A20_defconfig | 3 ++-
configs/Lamobo_R1_defconfig | 3 ++-
configs/Linksprite_pcDuino3_Nano_defconfig | 3 ++-
configs/Linksprite_pcDuino3_defconfig | 3 ++-
configs/Mele_A1000G_quad_defconfig | 2 +-
configs/Mele_I7_defconfig | 2 +-
configs/Mele_M3_defconfig | 2 +-
configs/Mele_M5_defconfig | 2 +-
configs/Mele_M9_defconfig | 2 +-
configs/Orangepi_defconfig | 3 ++-
configs/Orangepi_mini_defconfig | 3 ++-
configs/Sinlinx_SinA31s_defconfig | 2 +-
configs/Sinovoip_BPI_M2_defconfig | 3 ++-
configs/Wits_Pro_A20_DKT_defconfig | 3 ++-
configs/i12-tvbox_defconfig | 3 ++-
configs/icnova-a20-swac_defconfig | 3 ++-
configs/mixtile_loftq_defconfig | 3 ++-
drivers/net/Kconfig | 5 +++++
29 files changed, 54 insertions(+), 28 deletions(-)
diff --git a/configs/A20-OLinuXino-Lime2_defconfig b/configs/A20-OLinuXino-Lime2_defconfig
index 4c720b31095..8883cf182da 100644
--- a/configs/A20-OLinuXino-Lime2_defconfig
+++ b/configs/A20-OLinuXino-Lime2_defconfig
@@ -8,7 +8,7 @@ CONFIG_USB0_VBUS_DET="PH5"
CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-olinuxino-lime2"
CONFIG_AHCI=y
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
-CONFIG_SYS_EXTRA_OPTIONS="SUNXI_GMAC,RGMII,SATAPWR=SUNXI_GPC(3)"
+CONFIG_SYS_EXTRA_OPTIONS="RGMII,SATAPWR=SUNXI_GPC(3)"
CONFIG_SPL=y
CONFIG_SPL_I2C_SUPPORT=y
# CONFIG_CMD_IMLS is not set
@@ -25,6 +25,7 @@ CONFIG_NET_ETHADDR_EEPROM=y
CONFIG_NET_ETHADDR_EEPROM_I2C=y
CONFIG_NET_ETHADDR_EEPROM_I2C_BUS=1
CONFIG_I2C1_ENABLE=y
+CONFIG_SUN7I_GMAC=y
CONFIG_AXP_ALDO3_VOLT=2800
CONFIG_AXP_ALDO4_VOLT=2800
CONFIG_USB_EHCI_HCD=y
diff --git a/configs/A20-OLinuXino-Lime_defconfig b/configs/A20-OLinuXino-Lime_defconfig
index 564ae256a35..d83fc2b4031 100644
--- a/configs/A20-OLinuXino-Lime_defconfig
+++ b/configs/A20-OLinuXino-Lime_defconfig
@@ -6,7 +6,7 @@ CONFIG_MMC0_CD_PIN="PH1"
CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-olinuxino-lime"
CONFIG_AHCI=y
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
-CONFIG_SYS_EXTRA_OPTIONS="SUNXI_GMAC,SATAPWR=SUNXI_GPC(3)"
+CONFIG_SYS_EXTRA_OPTIONS="SATAPWR=SUNXI_GPC(3)"
CONFIG_SPL=y
CONFIG_SPL_I2C_SUPPORT=y
# CONFIG_CMD_IMLS is not set
@@ -20,6 +20,7 @@ CONFIG_NET_ETHADDR_EEPROM=y
CONFIG_NET_ETHADDR_EEPROM_I2C=y
CONFIG_NET_ETHADDR_EEPROM_I2C_BUS=1
CONFIG_I2C1_ENABLE=y
+CONFIG_SUN7I_GMAC=y
CONFIG_AXP_ALDO3_VOLT=2800
CONFIG_AXP_ALDO4_VOLT=2800
CONFIG_USB_EHCI_HCD=y
diff --git a/configs/A20-OLinuXino_MICRO_defconfig b/configs/A20-OLinuXino_MICRO_defconfig
index 93be13b4077..c25556bdac7 100644
--- a/configs/A20-OLinuXino_MICRO_defconfig
+++ b/configs/A20-OLinuXino_MICRO_defconfig
@@ -9,7 +9,7 @@ CONFIG_VIDEO_VGA=y
CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-olinuxino-micro"
CONFIG_AHCI=y
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
-CONFIG_SYS_EXTRA_OPTIONS="SUNXI_GMAC,SATAPWR=SUNXI_GPB(8)"
+CONFIG_SYS_EXTRA_OPTIONS="SATAPWR=SUNXI_GPB(8)"
CONFIG_SPL=y
CONFIG_SPL_I2C_SUPPORT=y
# CONFIG_CMD_IMLS is not set
@@ -23,6 +23,7 @@ CONFIG_NET_ETHADDR_EEPROM=y
CONFIG_NET_ETHADDR_EEPROM_I2C=y
CONFIG_NET_ETHADDR_EEPROM_I2C_BUS=1
CONFIG_I2C1_ENABLE=y
+CONFIG_SUN7I_GMAC=y
CONFIG_AXP_ALDO3_VOLT=2800
CONFIG_AXP_ALDO4_VOLT=2800
CONFIG_USB_EHCI_HCD=y
diff --git a/configs/A20-Olimex-SOM-EVB_defconfig b/configs/A20-Olimex-SOM-EVB_defconfig
index b835dc59b90..9cb30c0c58e 100644
--- a/configs/A20-Olimex-SOM-EVB_defconfig
+++ b/configs/A20-Olimex-SOM-EVB_defconfig
@@ -11,7 +11,7 @@ CONFIG_USB0_VBUS_DET="PH5"
CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-olimex-som-evb"
CONFIG_AHCI=y
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
-CONFIG_SYS_EXTRA_OPTIONS="SUNXI_GMAC,RGMII,SATAPWR=SUNXI_GPC(3)"
+CONFIG_SYS_EXTRA_OPTIONS="RGMII,SATAPWR=SUNXI_GPC(3)"
CONFIG_SPL=y
CONFIG_SPL_I2C_SUPPORT=y
# CONFIG_CMD_IMLS is not set
@@ -21,6 +21,7 @@ CONFIG_SPL_I2C_SUPPORT=y
# CONFIG_SPL_ISO_PARTITION is not set
# CONFIG_SPL_EFI_PARTITION is not set
CONFIG_ETH_DESIGNWARE=y
+CONFIG_SUN7I_GMAC=y
CONFIG_AXP_ALDO3_VOLT=2800
CONFIG_AXP_ALDO4_VOLT=2800
CONFIG_USB_EHCI_HCD=y
diff --git a/configs/Bananapi_defconfig b/configs/Bananapi_defconfig
index 059559d3937..c780d6383ce 100644
--- a/configs/Bananapi_defconfig
+++ b/configs/Bananapi_defconfig
@@ -7,7 +7,7 @@ CONFIG_GMAC_TX_DELAY=3
CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-bananapi"
CONFIG_AHCI=y
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
-CONFIG_SYS_EXTRA_OPTIONS="SUNXI_GMAC,RGMII,MACPWR=SUNXI_GPH(23)"
+CONFIG_SYS_EXTRA_OPTIONS="RGMII,MACPWR=SUNXI_GPH(23)"
CONFIG_SPL=y
CONFIG_SPL_I2C_SUPPORT=y
# CONFIG_CMD_IMLS is not set
@@ -18,4 +18,5 @@ CONFIG_SPL_I2C_SUPPORT=y
# CONFIG_SPL_EFI_PARTITION is not set
CONFIG_NETCONSOLE=y
CONFIG_ETH_DESIGNWARE=y
+CONFIG_SUN7I_GMAC=y
CONFIG_USB_EHCI_HCD=y
diff --git a/configs/Bananapro_defconfig b/configs/Bananapro_defconfig
index 27b9e63e006..5dd3088d3da 100644
--- a/configs/Bananapro_defconfig
+++ b/configs/Bananapro_defconfig
@@ -9,7 +9,7 @@ CONFIG_GMAC_TX_DELAY=3
CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-bananapro"
CONFIG_AHCI=y
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
-CONFIG_SYS_EXTRA_OPTIONS="SUNXI_GMAC,RGMII,MACPWR=SUNXI_GPH(23)"
+CONFIG_SYS_EXTRA_OPTIONS="RGMII,MACPWR=SUNXI_GPH(23)"
CONFIG_SPL=y
CONFIG_SPL_I2C_SUPPORT=y
# CONFIG_CMD_IMLS is not set
@@ -20,5 +20,6 @@ CONFIG_SPL_I2C_SUPPORT=y
# CONFIG_SPL_EFI_PARTITION is not set
CONFIG_NETCONSOLE=y
CONFIG_ETH_DESIGNWARE=y
+CONFIG_SUN7I_GMAC=y
CONFIG_AXP_ALDO4_VOLT=2500
CONFIG_USB_EHCI_HCD=y
diff --git a/configs/CSQ_CS908_defconfig b/configs/CSQ_CS908_defconfig
index 953ec253c04..a6fcbf5ecf3 100644
--- a/configs/CSQ_CS908_defconfig
+++ b/configs/CSQ_CS908_defconfig
@@ -6,7 +6,6 @@ CONFIG_USB1_VBUS_PIN=""
CONFIG_USB2_VBUS_PIN=""
CONFIG_DEFAULT_DEVICE_TREE="sun6i-a31s-cs908"
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
-CONFIG_SYS_EXTRA_OPTIONS="SUNXI_GMAC"
CONFIG_SPL=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
@@ -15,6 +14,7 @@ CONFIG_SPL=y
# CONFIG_SPL_ISO_PARTITION is not set
# CONFIG_SPL_EFI_PARTITION is not set
CONFIG_ETH_DESIGNWARE=y
+CONFIG_SUN7I_GMAC=y
CONFIG_AXP_ALDO1_VOLT=3300
CONFIG_AXP_DLDO1_VOLT=3300
CONFIG_USB_EHCI_HCD=y
diff --git a/configs/Colombus_defconfig b/configs/Colombus_defconfig
index ac283a2070b..1e7d4982c07 100644
--- a/configs/Colombus_defconfig
+++ b/configs/Colombus_defconfig
@@ -16,7 +16,7 @@ CONFIG_VIDEO_LCD_PANEL_I2C_SCL="PA24"
CONFIG_VIDEO_LCD_PANEL_EDP_4_LANE_1620M_VIA_ANX9804=y
CONFIG_DEFAULT_DEVICE_TREE="sun6i-a31-colombus"
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
-CONFIG_SYS_EXTRA_OPTIONS="SUNXI_GMAC,RGMII"
+CONFIG_SYS_EXTRA_OPTIONS="RGMII"
CONFIG_SPL=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
@@ -25,5 +25,6 @@ CONFIG_SPL=y
# CONFIG_SPL_ISO_PARTITION is not set
# CONFIG_SPL_EFI_PARTITION is not set
CONFIG_ETH_DESIGNWARE=y
+CONFIG_SUN7I_GMAC=y
CONFIG_AXP_ALDO1_VOLT=3300
CONFIG_USB_EHCI_HCD=y
diff --git a/configs/Cubieboard2_defconfig b/configs/Cubieboard2_defconfig
index 690ba49cfc2..8968623ec51 100644
--- a/configs/Cubieboard2_defconfig
+++ b/configs/Cubieboard2_defconfig
@@ -6,7 +6,7 @@ CONFIG_MMC0_CD_PIN="PH1"
CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-cubieboard2"
CONFIG_AHCI=y
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
-CONFIG_SYS_EXTRA_OPTIONS="SUNXI_GMAC,SATAPWR=SUNXI_GPB(8)"
+CONFIG_SYS_EXTRA_OPTIONS="SATAPWR=SUNXI_GPB(8)"
CONFIG_SPL=y
CONFIG_SPL_I2C_SUPPORT=y
# CONFIG_CMD_IMLS is not set
@@ -16,4 +16,5 @@ CONFIG_SPL_I2C_SUPPORT=y
# CONFIG_SPL_ISO_PARTITION is not set
# CONFIG_SPL_EFI_PARTITION is not set
CONFIG_ETH_DESIGNWARE=y
+CONFIG_SUN7I_GMAC=y
CONFIG_USB_EHCI_HCD=y
diff --git a/configs/Cubietruck_defconfig b/configs/Cubietruck_defconfig
index ca549bc298e..576ccc3a206 100644
--- a/configs/Cubietruck_defconfig
+++ b/configs/Cubietruck_defconfig
@@ -11,7 +11,7 @@ CONFIG_GMAC_TX_DELAY=1
CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-cubietruck"
CONFIG_AHCI=y
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
-CONFIG_SYS_EXTRA_OPTIONS="SUNXI_GMAC,RGMII,SATAPWR=SUNXI_GPH(12)"
+CONFIG_SYS_EXTRA_OPTIONS="RGMII,SATAPWR=SUNXI_GPH(12)"
CONFIG_SPL=y
CONFIG_SPL_I2C_SUPPORT=y
# CONFIG_CMD_IMLS is not set
@@ -24,6 +24,7 @@ CONFIG_CMD_USB_MASS_STORAGE=y
# CONFIG_SPL_PARTITION_UUIDS is not set
CONFIG_DFU_RAM=y
CONFIG_ETH_DESIGNWARE=y
+CONFIG_SUN7I_GMAC=y
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_MUSB_GADGET=y
CONFIG_USB_GADGET=y
diff --git a/configs/Hummingbird_A31_defconfig b/configs/Hummingbird_A31_defconfig
index c1cbbc829a1..d5de5184563 100644
--- a/configs/Hummingbird_A31_defconfig
+++ b/configs/Hummingbird_A31_defconfig
@@ -8,7 +8,7 @@ CONFIG_VIDEO_VGA_VIA_LCD=y
CONFIG_VIDEO_VGA_EXTERNAL_DAC_EN="PH25"
CONFIG_DEFAULT_DEVICE_TREE="sun6i-a31-hummingbird"
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
-CONFIG_SYS_EXTRA_OPTIONS="SUNXI_GMAC,RGMII"
+CONFIG_SYS_EXTRA_OPTIONS="RGMII"
CONFIG_SPL=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
@@ -17,5 +17,6 @@ CONFIG_SPL=y
# CONFIG_SPL_ISO_PARTITION is not set
# CONFIG_SPL_EFI_PARTITION is not set
CONFIG_ETH_DESIGNWARE=y
+CONFIG_SUN7I_GMAC=y
CONFIG_AXP_ALDO1_VOLT=3300
CONFIG_USB_EHCI_HCD=y
diff --git a/configs/Itead_Ibox_A20_defconfig b/configs/Itead_Ibox_A20_defconfig
index c38d71f25aa..bba0c5973b8 100644
--- a/configs/Itead_Ibox_A20_defconfig
+++ b/configs/Itead_Ibox_A20_defconfig
@@ -6,7 +6,7 @@ CONFIG_MMC0_CD_PIN="PH1"
CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-itead-ibox"
CONFIG_AHCI=y
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
-CONFIG_SYS_EXTRA_OPTIONS="SUNXI_GMAC,SATAPWR=SUNXI_GPB(8)"
+CONFIG_SYS_EXTRA_OPTIONS="SATAPWR=SUNXI_GPB(8)"
CONFIG_SPL=y
CONFIG_SPL_I2C_SUPPORT=y
# CONFIG_CMD_IMLS is not set
@@ -16,4 +16,5 @@ CONFIG_SPL_I2C_SUPPORT=y
# CONFIG_SPL_ISO_PARTITION is not set
# CONFIG_SPL_EFI_PARTITION is not set
CONFIG_ETH_DESIGNWARE=y
+CONFIG_SUN7I_GMAC=y
CONFIG_USB_EHCI_HCD=y
diff --git a/configs/Lamobo_R1_defconfig b/configs/Lamobo_R1_defconfig
index 92ae4e231d7..142ed183ebc 100644
--- a/configs/Lamobo_R1_defconfig
+++ b/configs/Lamobo_R1_defconfig
@@ -7,7 +7,7 @@ CONFIG_GMAC_TX_DELAY=4
CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-lamobo-r1"
CONFIG_AHCI=y
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
-CONFIG_SYS_EXTRA_OPTIONS="SUNXI_GMAC,RGMII,MACPWR=SUNXI_GPH(23),SATAPWR=SUNXI_GPB(3)"
+CONFIG_SYS_EXTRA_OPTIONS="RGMII,MACPWR=SUNXI_GPH(23),SATAPWR=SUNXI_GPB(3)"
CONFIG_SPL=y
CONFIG_SPL_I2C_SUPPORT=y
# CONFIG_CMD_IMLS is not set
@@ -17,4 +17,5 @@ CONFIG_SPL_I2C_SUPPORT=y
# CONFIG_SPL_ISO_PARTITION is not set
# CONFIG_SPL_EFI_PARTITION is not set
CONFIG_ETH_DESIGNWARE=y
+CONFIG_SUN7I_GMAC=y
CONFIG_USB_EHCI_HCD=y
diff --git a/configs/Linksprite_pcDuino3_Nano_defconfig b/configs/Linksprite_pcDuino3_Nano_defconfig
index 9c2cf8129f9..dd84b6ec51a 100644
--- a/configs/Linksprite_pcDuino3_Nano_defconfig
+++ b/configs/Linksprite_pcDuino3_Nano_defconfig
@@ -8,7 +8,7 @@ CONFIG_GMAC_TX_DELAY=3
CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-pcduino3-nano"
CONFIG_AHCI=y
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
-CONFIG_SYS_EXTRA_OPTIONS="SUNXI_GMAC,RGMII,SATAPWR=SUNXI_GPH(2)"
+CONFIG_SYS_EXTRA_OPTIONS="RGMII,SATAPWR=SUNXI_GPH(2)"
CONFIG_SPL=y
CONFIG_SPL_I2C_SUPPORT=y
# CONFIG_CMD_IMLS is not set
@@ -18,4 +18,5 @@ CONFIG_SPL_I2C_SUPPORT=y
# CONFIG_SPL_ISO_PARTITION is not set
# CONFIG_SPL_EFI_PARTITION is not set
CONFIG_ETH_DESIGNWARE=y
+CONFIG_SUN7I_GMAC=y
CONFIG_USB_EHCI_HCD=y
diff --git a/configs/Linksprite_pcDuino3_defconfig b/configs/Linksprite_pcDuino3_defconfig
index b245e7e0d78..8e8455eee45 100644
--- a/configs/Linksprite_pcDuino3_defconfig
+++ b/configs/Linksprite_pcDuino3_defconfig
@@ -6,7 +6,7 @@ CONFIG_DRAM_ZQ=122
CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-pcduino3"
CONFIG_AHCI=y
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
-CONFIG_SYS_EXTRA_OPTIONS="SUNXI_GMAC,SATAPWR=SUNXI_GPH(2)"
+CONFIG_SYS_EXTRA_OPTIONS="SATAPWR=SUNXI_GPH(2)"
CONFIG_SPL=y
CONFIG_SPL_I2C_SUPPORT=y
# CONFIG_CMD_IMLS is not set
@@ -16,4 +16,5 @@ CONFIG_SPL_I2C_SUPPORT=y
# CONFIG_SPL_ISO_PARTITION is not set
# CONFIG_SPL_EFI_PARTITION is not set
CONFIG_ETH_DESIGNWARE=y
+CONFIG_SUN7I_GMAC=y
CONFIG_USB_EHCI_HCD=y
diff --git a/configs/Mele_A1000G_quad_defconfig b/configs/Mele_A1000G_quad_defconfig
index 8f038353752..5b1b5f5d7ce 100644
--- a/configs/Mele_A1000G_quad_defconfig
+++ b/configs/Mele_A1000G_quad_defconfig
@@ -7,7 +7,6 @@ CONFIG_USB1_VBUS_PIN="PC27"
CONFIG_USB2_VBUS_PIN=""
CONFIG_DEFAULT_DEVICE_TREE="sun6i-a31-mele-a1000g-quad"
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
-CONFIG_SYS_EXTRA_OPTIONS="SUNXI_GMAC"
CONFIG_SPL=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
@@ -16,6 +15,7 @@ CONFIG_SPL=y
# CONFIG_SPL_ISO_PARTITION is not set
# CONFIG_SPL_EFI_PARTITION is not set
CONFIG_ETH_DESIGNWARE=y
+CONFIG_SUN7I_GMAC=y
CONFIG_AXP_DCDC1_VOLT=3300
CONFIG_AXP_ALDO1_VOLT=3300
CONFIG_AXP_DLDO1_VOLT=3300
diff --git a/configs/Mele_I7_defconfig b/configs/Mele_I7_defconfig
index 572b5219ccf..b60969787c9 100644
--- a/configs/Mele_I7_defconfig
+++ b/configs/Mele_I7_defconfig
@@ -6,7 +6,6 @@ CONFIG_USB1_VBUS_PIN="PC27"
CONFIG_USB2_VBUS_PIN=""
CONFIG_DEFAULT_DEVICE_TREE="sun6i-a31-i7"
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
-CONFIG_SYS_EXTRA_OPTIONS="SUNXI_GMAC"
CONFIG_SPL=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
@@ -15,6 +14,7 @@ CONFIG_SPL=y
# CONFIG_SPL_ISO_PARTITION is not set
# CONFIG_SPL_EFI_PARTITION is not set
CONFIG_ETH_DESIGNWARE=y
+CONFIG_SUN7I_GMAC=y
CONFIG_AXP_DCDC1_VOLT=3300
CONFIG_AXP_ALDO1_VOLT=3300
CONFIG_AXP_DLDO1_VOLT=3300
diff --git a/configs/Mele_M3_defconfig b/configs/Mele_M3_defconfig
index dd1526954bf..08e8c2dbde7 100644
--- a/configs/Mele_M3_defconfig
+++ b/configs/Mele_M3_defconfig
@@ -8,7 +8,6 @@ CONFIG_VIDEO_VGA=y
CONFIG_VIDEO_COMPOSITE=y
CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-m3"
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
-CONFIG_SYS_EXTRA_OPTIONS="SUNXI_GMAC"
CONFIG_SPL=y
CONFIG_SPL_I2C_SUPPORT=y
# CONFIG_CMD_IMLS is not set
@@ -18,4 +17,5 @@ CONFIG_SPL_I2C_SUPPORT=y
# CONFIG_SPL_ISO_PARTITION is not set
# CONFIG_SPL_EFI_PARTITION is not set
CONFIG_ETH_DESIGNWARE=y
+CONFIG_SUN7I_GMAC=y
CONFIG_USB_EHCI_HCD=y
diff --git a/configs/Mele_M5_defconfig b/configs/Mele_M5_defconfig
index 12e1d0cae44..4c377e3daf0 100644
--- a/configs/Mele_M5_defconfig
+++ b/configs/Mele_M5_defconfig
@@ -8,7 +8,6 @@ CONFIG_VIDEO_COMPOSITE=y
CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-m5"
CONFIG_AHCI=y
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
-CONFIG_SYS_EXTRA_OPTIONS="SUNXI_GMAC"
CONFIG_SPL=y
CONFIG_SPL_I2C_SUPPORT=y
# CONFIG_CMD_IMLS is not set
@@ -18,4 +17,5 @@ CONFIG_SPL_I2C_SUPPORT=y
# CONFIG_SPL_ISO_PARTITION is not set
# CONFIG_SPL_EFI_PARTITION is not set
CONFIG_ETH_DESIGNWARE=y
+CONFIG_SUN7I_GMAC=y
CONFIG_USB_EHCI_HCD=y
diff --git a/configs/Mele_M9_defconfig b/configs/Mele_M9_defconfig
index a9dc159063c..dc7901f9afc 100644
--- a/configs/Mele_M9_defconfig
+++ b/configs/Mele_M9_defconfig
@@ -6,7 +6,6 @@ CONFIG_USB1_VBUS_PIN="PC27"
CONFIG_USB2_VBUS_PIN=""
CONFIG_DEFAULT_DEVICE_TREE="sun6i-a31-m9"
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
-CONFIG_SYS_EXTRA_OPTIONS="SUNXI_GMAC"
CONFIG_SPL=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
@@ -15,6 +14,7 @@ CONFIG_SPL=y
# CONFIG_SPL_ISO_PARTITION is not set
# CONFIG_SPL_EFI_PARTITION is not set
CONFIG_ETH_DESIGNWARE=y
+CONFIG_SUN7I_GMAC=y
CONFIG_AXP_DCDC1_VOLT=3300
CONFIG_AXP_ALDO1_VOLT=3300
CONFIG_AXP_DLDO1_VOLT=3300
diff --git a/configs/Orangepi_defconfig b/configs/Orangepi_defconfig
index 3c9f74f3b4c..43765c697e7 100644
--- a/configs/Orangepi_defconfig
+++ b/configs/Orangepi_defconfig
@@ -10,7 +10,7 @@ CONFIG_GMAC_TX_DELAY=3
CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-orangepi"
CONFIG_AHCI=y
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
-CONFIG_SYS_EXTRA_OPTIONS="SUNXI_GMAC,RGMII,MACPWR=SUNXI_GPH(23)"
+CONFIG_SYS_EXTRA_OPTIONS="RGMII,MACPWR=SUNXI_GPH(23)"
CONFIG_SPL=y
CONFIG_SPL_I2C_SUPPORT=y
# CONFIG_CMD_IMLS is not set
@@ -20,4 +20,5 @@ CONFIG_SPL_I2C_SUPPORT=y
# CONFIG_SPL_ISO_PARTITION is not set
# CONFIG_SPL_EFI_PARTITION is not set
CONFIG_ETH_DESIGNWARE=y
+CONFIG_SUN7I_GMAC=y
CONFIG_USB_EHCI_HCD=y
diff --git a/configs/Orangepi_mini_defconfig b/configs/Orangepi_mini_defconfig
index f1d413b4455..772c00f7d15 100644
--- a/configs/Orangepi_mini_defconfig
+++ b/configs/Orangepi_mini_defconfig
@@ -12,7 +12,7 @@ CONFIG_GMAC_TX_DELAY=3
CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-orangepi-mini"
CONFIG_AHCI=y
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
-CONFIG_SYS_EXTRA_OPTIONS="SUNXI_GMAC,RGMII,MACPWR=SUNXI_GPH(23)"
+CONFIG_SYS_EXTRA_OPTIONS="RGMII,MACPWR=SUNXI_GPH(23)"
CONFIG_SPL=y
CONFIG_SPL_I2C_SUPPORT=y
# CONFIG_CMD_IMLS is not set
@@ -22,4 +22,5 @@ CONFIG_SPL_I2C_SUPPORT=y
# CONFIG_SPL_ISO_PARTITION is not set
# CONFIG_SPL_EFI_PARTITION is not set
CONFIG_ETH_DESIGNWARE=y
+CONFIG_SUN7I_GMAC=y
CONFIG_USB_EHCI_HCD=y
diff --git a/configs/Sinlinx_SinA31s_defconfig b/configs/Sinlinx_SinA31s_defconfig
index 54c975a2b2b..7f815a32cbd 100644
--- a/configs/Sinlinx_SinA31s_defconfig
+++ b/configs/Sinlinx_SinA31s_defconfig
@@ -10,7 +10,6 @@ CONFIG_USB1_VBUS_PIN=""
CONFIG_USB2_VBUS_PIN=""
CONFIG_DEFAULT_DEVICE_TREE="sun6i-a31s-sina31s"
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
-CONFIG_SYS_EXTRA_OPTIONS="SUNXI_GMAC"
CONFIG_SPL=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
@@ -19,5 +18,6 @@ CONFIG_SPL=y
# CONFIG_SPL_ISO_PARTITION is not set
# CONFIG_SPL_EFI_PARTITION is not set
CONFIG_ETH_DESIGNWARE=y
+CONFIG_SUN7I_GMAC=y
CONFIG_AXP_DLDO1_VOLT=3300
CONFIG_USB_EHCI_HCD=y
diff --git a/configs/Sinovoip_BPI_M2_defconfig b/configs/Sinovoip_BPI_M2_defconfig
index dbff2344bbe..d123fad96bd 100644
--- a/configs/Sinovoip_BPI_M2_defconfig
+++ b/configs/Sinovoip_BPI_M2_defconfig
@@ -6,7 +6,7 @@ CONFIG_USB1_VBUS_PIN=""
CONFIG_USB2_VBUS_PIN=""
CONFIG_DEFAULT_DEVICE_TREE="sun6i-a31s-sinovoip-bpi-m2"
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
-CONFIG_SYS_EXTRA_OPTIONS="SUNXI_GMAC,RGMII"
+CONFIG_SYS_EXTRA_OPTIONS="RGMII"
CONFIG_SPL=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
@@ -15,6 +15,7 @@ CONFIG_SPL=y
# CONFIG_SPL_ISO_PARTITION is not set
# CONFIG_SPL_EFI_PARTITION is not set
CONFIG_ETH_DESIGNWARE=y
+CONFIG_SUN7I_GMAC=y
CONFIG_AXP_ALDO1_VOLT=3300
CONFIG_AXP_ALDO2_VOLT=1800
CONFIG_AXP_DLDO1_VOLT=3000
diff --git a/configs/Wits_Pro_A20_DKT_defconfig b/configs/Wits_Pro_A20_DKT_defconfig
index cd6e821958a..97fb699eca7 100644
--- a/configs/Wits_Pro_A20_DKT_defconfig
+++ b/configs/Wits_Pro_A20_DKT_defconfig
@@ -11,7 +11,7 @@ CONFIG_VIDEO_LCD_PANEL_LVDS=y
CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-wits-pro-a20-dkt"
CONFIG_AHCI=y
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
-CONFIG_SYS_EXTRA_OPTIONS="SUNXI_GMAC,RGMII"
+CONFIG_SYS_EXTRA_OPTIONS="RGMII"
CONFIG_SPL=y
CONFIG_SPL_I2C_SUPPORT=y
# CONFIG_CMD_IMLS is not set
@@ -21,4 +21,5 @@ CONFIG_SPL_I2C_SUPPORT=y
# CONFIG_SPL_ISO_PARTITION is not set
# CONFIG_SPL_EFI_PARTITION is not set
CONFIG_ETH_DESIGNWARE=y
+CONFIG_SUN7I_GMAC=y
CONFIG_USB_EHCI_HCD=y
diff --git a/configs/i12-tvbox_defconfig b/configs/i12-tvbox_defconfig
index 9715bb9228e..d7dc703981b 100644
--- a/configs/i12-tvbox_defconfig
+++ b/configs/i12-tvbox_defconfig
@@ -5,7 +5,7 @@ CONFIG_DRAM_CLK=384
CONFIG_VIDEO_COMPOSITE=y
CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-i12-tvbox"
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
-CONFIG_SYS_EXTRA_OPTIONS="SUNXI_GMAC,MACPWR=SUNXI_GPH(21)"
+CONFIG_SYS_EXTRA_OPTIONS="MACPWR=SUNXI_GPH(21)"
CONFIG_SPL=y
CONFIG_SPL_I2C_SUPPORT=y
# CONFIG_CMD_IMLS is not set
@@ -15,4 +15,5 @@ CONFIG_SPL_I2C_SUPPORT=y
# CONFIG_SPL_ISO_PARTITION is not set
# CONFIG_SPL_EFI_PARTITION is not set
CONFIG_ETH_DESIGNWARE=y
+CONFIG_SUN7I_GMAC=y
CONFIG_USB_EHCI_HCD=y
diff --git a/configs/icnova-a20-swac_defconfig b/configs/icnova-a20-swac_defconfig
index 30e75e3c710..569f2d9c86f 100644
--- a/configs/icnova-a20-swac_defconfig
+++ b/configs/icnova-a20-swac_defconfig
@@ -12,7 +12,7 @@ CONFIG_VIDEO_LCD_POWER="PH22"
CONFIG_VIDEO_LCD_PANEL_LVDS=y
CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-icnova-swac"
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
-CONFIG_SYS_EXTRA_OPTIONS="AXP209_POWER,SUNXI_GMAC,CMD_BMP"
+CONFIG_SYS_EXTRA_OPTIONS="AXP209_POWER,CMD_BMP"
CONFIG_SPL=y
CONFIG_SPL_I2C_SUPPORT=y
# CONFIG_CMD_IMLS is not set
@@ -23,4 +23,5 @@ CONFIG_CMD_UNZIP=y
# CONFIG_SPL_ISO_PARTITION is not set
# CONFIG_SPL_EFI_PARTITION is not set
CONFIG_ETH_DESIGNWARE=y
+CONFIG_SUN7I_GMAC=y
CONFIG_USB_EHCI_HCD=y
diff --git a/configs/mixtile_loftq_defconfig b/configs/mixtile_loftq_defconfig
index ec6a4381ac2..2dd107596ab 100644
--- a/configs/mixtile_loftq_defconfig
+++ b/configs/mixtile_loftq_defconfig
@@ -7,7 +7,7 @@ CONFIG_USB1_VBUS_PIN="PH24"
CONFIG_USB2_VBUS_PIN=""
CONFIG_DEFAULT_DEVICE_TREE="sun6i-a31-mixtile-loftq"
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
-CONFIG_SYS_EXTRA_OPTIONS="SUNXI_GMAC,RGMII,MACPWR=SUNXI_GPA(21)"
+CONFIG_SYS_EXTRA_OPTIONS="RGMII,MACPWR=SUNXI_GPA(21)"
CONFIG_SPL=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
@@ -16,5 +16,6 @@ CONFIG_SPL=y
# CONFIG_SPL_ISO_PARTITION is not set
# CONFIG_SPL_EFI_PARTITION is not set
CONFIG_ETH_DESIGNWARE=y
+CONFIG_SUN7I_GMAC=y
CONFIG_AXP_ALDO1_VOLT=3300
CONFIG_USB_EHCI_HCD=y
diff --git a/drivers/net/Kconfig b/drivers/net/Kconfig
index 8aa92790f4b..1ba844d2776 100644
--- a/drivers/net/Kconfig
+++ b/drivers/net/Kconfig
@@ -161,6 +161,11 @@ config RTL8169
This driver supports Realtek 8169 series gigabit ethernet family of
PCI/PCIe chipsets/adapters.
+config SUN7I_GMAC
+ bool "Enable Allwinner GMAC Ethernet support"
+ help
+ Enable the support for Sun7i GMAC Ethernet controller
+
config SUN8I_EMAC
bool "Allwinner Sun8i Ethernet MAC support"
depends on DM_ETH
--
GitLab
From e34dc387bd5d37e75e963f0801be9c5ae556b26d Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Myl=C3=A8ne=20Josserand?=
<mylene.josserand@free-electrons.com>
Date: Sun, 2 Apr 2017 12:59:04 +0200
Subject: [PATCH 088/282] sunxi: icnova-a20-swac_defconfig: Remove AXP209_POWER
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
Remove the AXP209_POWER option from SYS_EXTRA_OPTIONS.
As this configuration already exists on Kconfig, we just need
to remove it from defconfig.
Signed-off-by: Mylène Josserand <mylene.josserand@free-electrons.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
---
configs/icnova-a20-swac_defconfig | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/configs/icnova-a20-swac_defconfig b/configs/icnova-a20-swac_defconfig
index 569f2d9c86f..bc46c9adf08 100644
--- a/configs/icnova-a20-swac_defconfig
+++ b/configs/icnova-a20-swac_defconfig
@@ -12,7 +12,7 @@ CONFIG_VIDEO_LCD_POWER="PH22"
CONFIG_VIDEO_LCD_PANEL_LVDS=y
CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-icnova-swac"
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
-CONFIG_SYS_EXTRA_OPTIONS="AXP209_POWER,CMD_BMP"
+CONFIG_SYS_EXTRA_OPTIONS="CMD_BMP"
CONFIG_SPL=y
CONFIG_SPL_I2C_SUPPORT=y
# CONFIG_CMD_IMLS is not set
--
GitLab
From 38495ebaf660e4848631ba470b950a7d7a250839 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Myl=C3=A8ne=20Josserand?=
<mylene.josserand@free-electrons.com>
Date: Sun, 2 Apr 2017 12:59:05 +0200
Subject: [PATCH 089/282] sunxi: icnova-a20-swac_defconfig: Remove CMD_BMP from
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
This configuration is not necessary in a defconfig file so
it is removed from the SYS_EXTRA_OPTIONS.
Signed-off-by: Mylène Josserand <mylene.josserand@free-electrons.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
---
configs/icnova-a20-swac_defconfig | 1 -
1 file changed, 1 deletion(-)
diff --git a/configs/icnova-a20-swac_defconfig b/configs/icnova-a20-swac_defconfig
index bc46c9adf08..6f79c587eea 100644
--- a/configs/icnova-a20-swac_defconfig
+++ b/configs/icnova-a20-swac_defconfig
@@ -12,7 +12,6 @@ CONFIG_VIDEO_LCD_POWER="PH22"
CONFIG_VIDEO_LCD_PANEL_LVDS=y
CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-icnova-swac"
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
-CONFIG_SYS_EXTRA_OPTIONS="CMD_BMP"
CONFIG_SPL=y
CONFIG_SPL_I2C_SUPPORT=y
# CONFIG_CMD_IMLS is not set
--
GitLab
From 261f3deeb345dc908b3753d8c0d4bd6813654993 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Myl=C3=A8ne=20Josserand?=
<mylene.josserand@free-electrons.com>
Date: Sun, 2 Apr 2017 12:59:06 +0200
Subject: [PATCH 090/282] sunxi: mk802_defconfig: Remove SYS_EXTRA_OPTIONS
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
The USB_EHCI configuration is already set in this defconfig
using kconfig's config. This configuration in SYS_EXTRA_OPTIONS
must be removed and so the SYS_EXTRA_OPTIONS.
Signed-off-by: Mylène Josserand <mylene.josserand@free-electrons.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
---
configs/mk802_defconfig | 1 -
1 file changed, 1 deletion(-)
diff --git a/configs/mk802_defconfig b/configs/mk802_defconfig
index 0bd957b2d55..da9728ae9e1 100644
--- a/configs/mk802_defconfig
+++ b/configs/mk802_defconfig
@@ -4,7 +4,6 @@ CONFIG_MACH_SUN4I=y
CONFIG_USB2_VBUS_PIN="PH12"
CONFIG_DEFAULT_DEVICE_TREE="sun4i-a10-mk802"
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
-CONFIG_SYS_EXTRA_OPTIONS="USB_EHCI"
CONFIG_SPL=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
--
GitLab
From abc3e4df59f54cf3dda42a35a75d617fe861f5fe Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Myl=C3=A8ne=20Josserand?=
<mylene.josserand@free-electrons.com>
Date: Sun, 2 Apr 2017 12:59:07 +0200
Subject: [PATCH 091/282] sunxi: Convert SUNXI_EMAC to Kconfig
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
Convert the SUNXI_EMAC config to Kconfig. Remove it from SYS_EXTRA_OPTIONS
from many sunxi defconfig and renamed it into SUN4I_EMAC to not confuse it
with SUN8I_EMAC.
Signed-off-by: Mylène Josserand <mylene.josserand@free-electrons.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
---
configs/A10-OLinuXino-Lime_defconfig | 3 ++-
configs/A10s-OLinuXino-M_defconfig | 2 +-
configs/Cubieboard_defconfig | 3 ++-
configs/Linksprite_pcDuino_defconfig | 2 +-
configs/Marsboard_A10_defconfig | 2 +-
configs/Mele_A1000_defconfig | 3 ++-
configs/ba10_tv_box_defconfig | 2 +-
configs/jesurun_q5_defconfig | 3 ++-
drivers/net/Kconfig | 6 ++++++
9 files changed, 18 insertions(+), 8 deletions(-)
diff --git a/configs/A10-OLinuXino-Lime_defconfig b/configs/A10-OLinuXino-Lime_defconfig
index 6634139ab86..967a3d442be 100644
--- a/configs/A10-OLinuXino-Lime_defconfig
+++ b/configs/A10-OLinuXino-Lime_defconfig
@@ -8,7 +8,7 @@ CONFIG_MMC0_CD_PIN="PH1"
CONFIG_DEFAULT_DEVICE_TREE="sun4i-a10-olinuxino-lime"
CONFIG_AHCI=y
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
-CONFIG_SYS_EXTRA_OPTIONS="SUNXI_EMAC,SATAPWR=SUNXI_GPC(3)"
+CONFIG_SYS_EXTRA_OPTIONS="SATAPWR=SUNXI_GPC(3)"
CONFIG_SPL=y
CONFIG_SPL_I2C_SUPPORT=y
# CONFIG_CMD_IMLS is not set
@@ -21,6 +21,7 @@ CONFIG_I2C1_ENABLE=y
# CONFIG_SPL_DOS_PARTITION is not set
# CONFIG_SPL_ISO_PARTITION is not set
# CONFIG_SPL_EFI_PARTITION is not set
+CONFIG_SUN4I_EMAC=y
CONFIG_AXP_ALDO3_VOLT=2800
CONFIG_AXP_ALDO4_VOLT=2800
CONFIG_USB_EHCI_HCD=y
diff --git a/configs/A10s-OLinuXino-M_defconfig b/configs/A10s-OLinuXino-M_defconfig
index 9c2a354ff44..af6f5bc6f75 100644
--- a/configs/A10s-OLinuXino-M_defconfig
+++ b/configs/A10s-OLinuXino-M_defconfig
@@ -8,7 +8,6 @@ CONFIG_MMC_SUNXI_SLOT_EXTRA=1
CONFIG_USB1_VBUS_PIN="PB10"
CONFIG_DEFAULT_DEVICE_TREE="sun5i-a10s-olinuxino-micro"
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
-CONFIG_SYS_EXTRA_OPTIONS="SUNXI_EMAC"
CONFIG_SPL=y
CONFIG_SPL_I2C_SUPPORT=y
# CONFIG_CMD_IMLS is not set
@@ -17,5 +16,6 @@ CONFIG_SPL_I2C_SUPPORT=y
# CONFIG_SPL_DOS_PARTITION is not set
# CONFIG_SPL_ISO_PARTITION is not set
# CONFIG_SPL_EFI_PARTITION is not set
+CONFIG_SUN4I_EMAC=y
CONFIG_AXP152_POWER=y
CONFIG_USB_EHCI_HCD=y
diff --git a/configs/Cubieboard_defconfig b/configs/Cubieboard_defconfig
index e1d1f1f8bb0..78fd4a211bc 100644
--- a/configs/Cubieboard_defconfig
+++ b/configs/Cubieboard_defconfig
@@ -6,7 +6,7 @@ CONFIG_MMC0_CD_PIN="PH1"
CONFIG_DEFAULT_DEVICE_TREE="sun4i-a10-cubieboard"
CONFIG_AHCI=y
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
-CONFIG_SYS_EXTRA_OPTIONS="SUNXI_EMAC,SATAPWR=SUNXI_GPB(8)"
+CONFIG_SYS_EXTRA_OPTIONS="SATAPWR=SUNXI_GPB(8)"
CONFIG_SPL=y
CONFIG_SPL_I2C_SUPPORT=y
# CONFIG_CMD_IMLS is not set
@@ -15,4 +15,5 @@ CONFIG_SPL_I2C_SUPPORT=y
# CONFIG_SPL_DOS_PARTITION is not set
# CONFIG_SPL_ISO_PARTITION is not set
# CONFIG_SPL_EFI_PARTITION is not set
+CONFIG_SUN4I_EMAC=y
CONFIG_USB_EHCI_HCD=y
diff --git a/configs/Linksprite_pcDuino_defconfig b/configs/Linksprite_pcDuino_defconfig
index 1d2ab19a0b1..e33a9c13a12 100644
--- a/configs/Linksprite_pcDuino_defconfig
+++ b/configs/Linksprite_pcDuino_defconfig
@@ -5,7 +5,6 @@ CONFIG_USB1_VBUS_PIN=""
CONFIG_USB2_VBUS_PIN=""
CONFIG_DEFAULT_DEVICE_TREE="sun4i-a10-pcduino"
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
-CONFIG_SYS_EXTRA_OPTIONS="SUNXI_EMAC"
CONFIG_SPL=y
CONFIG_SPL_I2C_SUPPORT=y
# CONFIG_CMD_IMLS is not set
@@ -14,4 +13,5 @@ CONFIG_SPL_I2C_SUPPORT=y
# CONFIG_SPL_DOS_PARTITION is not set
# CONFIG_SPL_ISO_PARTITION is not set
# CONFIG_SPL_EFI_PARTITION is not set
+CONFIG_SUN4I_EMAC=y
CONFIG_USB_EHCI_HCD=y
diff --git a/configs/Marsboard_A10_defconfig b/configs/Marsboard_A10_defconfig
index 34e78f1e8c6..6b8bd1ad205 100644
--- a/configs/Marsboard_A10_defconfig
+++ b/configs/Marsboard_A10_defconfig
@@ -4,7 +4,6 @@ CONFIG_MACH_SUN4I=y
CONFIG_DEFAULT_DEVICE_TREE="sun4i-a10-marsboard"
CONFIG_AHCI=y
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
-CONFIG_SYS_EXTRA_OPTIONS="SUNXI_EMAC"
CONFIG_SPL=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
@@ -12,5 +11,6 @@ CONFIG_SPL=y
# CONFIG_SPL_DOS_PARTITION is not set
# CONFIG_SPL_ISO_PARTITION is not set
# CONFIG_SPL_EFI_PARTITION is not set
+CONFIG_SUN4I_EMAC=y
CONFIG_SUNXI_NO_PMIC=y
CONFIG_USB_EHCI_HCD=y
diff --git a/configs/Mele_A1000_defconfig b/configs/Mele_A1000_defconfig
index 4496688d3f1..4bd81a262cd 100644
--- a/configs/Mele_A1000_defconfig
+++ b/configs/Mele_A1000_defconfig
@@ -6,7 +6,7 @@ CONFIG_VIDEO_COMPOSITE=y
CONFIG_DEFAULT_DEVICE_TREE="sun4i-a10-a1000"
CONFIG_AHCI=y
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
-CONFIG_SYS_EXTRA_OPTIONS="SUNXI_EMAC,MACPWR=SUNXI_GPH(15)"
+CONFIG_SYS_EXTRA_OPTIONS="MACPWR=SUNXI_GPH(15)"
CONFIG_SPL=y
CONFIG_SPL_I2C_SUPPORT=y
# CONFIG_CMD_IMLS is not set
@@ -15,4 +15,5 @@ CONFIG_SPL_I2C_SUPPORT=y
# CONFIG_SPL_DOS_PARTITION is not set
# CONFIG_SPL_ISO_PARTITION is not set
# CONFIG_SPL_EFI_PARTITION is not set
+CONFIG_SUN4I_EMAC=y
CONFIG_USB_EHCI_HCD=y
diff --git a/configs/ba10_tv_box_defconfig b/configs/ba10_tv_box_defconfig
index ec711591514..ad066fdffa0 100644
--- a/configs/ba10_tv_box_defconfig
+++ b/configs/ba10_tv_box_defconfig
@@ -8,7 +8,6 @@ CONFIG_USB2_VBUS_PIN="PH12"
CONFIG_VIDEO_COMPOSITE=y
CONFIG_DEFAULT_DEVICE_TREE="sun4i-a10-ba10-tvbox"
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
-CONFIG_SYS_EXTRA_OPTIONS="SUNXI_EMAC"
CONFIG_SPL=y
CONFIG_SPL_I2C_SUPPORT=y
# CONFIG_CMD_IMLS is not set
@@ -17,5 +16,6 @@ CONFIG_SPL_I2C_SUPPORT=y
# CONFIG_SPL_DOS_PARTITION is not set
# CONFIG_SPL_ISO_PARTITION is not set
# CONFIG_SPL_EFI_PARTITION is not set
+CONFIG_SUN4I_EMAC=y
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_MUSB_HOST=y
diff --git a/configs/jesurun_q5_defconfig b/configs/jesurun_q5_defconfig
index a6bec12fd2e..608e523e4c0 100644
--- a/configs/jesurun_q5_defconfig
+++ b/configs/jesurun_q5_defconfig
@@ -6,7 +6,7 @@ CONFIG_USB0_VBUS_PIN="PB9"
CONFIG_VIDEO_COMPOSITE=y
CONFIG_DEFAULT_DEVICE_TREE="sun4i-a10-jesurun-q5"
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
-CONFIG_SYS_EXTRA_OPTIONS="SUNXI_EMAC,MACPWR=SUNXI_GPH(19)"
+CONFIG_SYS_EXTRA_OPTIONS="MACPWR=SUNXI_GPH(19)"
CONFIG_SPL=y
CONFIG_SPL_I2C_SUPPORT=y
# CONFIG_CMD_IMLS is not set
@@ -15,5 +15,6 @@ CONFIG_SPL_I2C_SUPPORT=y
# CONFIG_SPL_DOS_PARTITION is not set
# CONFIG_SPL_ISO_PARTITION is not set
# CONFIG_SPL_EFI_PARTITION is not set
+CONFIG_SUN4I_EMAC=y
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_MUSB_HOST=y
diff --git a/drivers/net/Kconfig b/drivers/net/Kconfig
index 1ba844d2776..6126d10c39b 100644
--- a/drivers/net/Kconfig
+++ b/drivers/net/Kconfig
@@ -166,6 +166,12 @@ config SUN7I_GMAC
help
Enable the support for Sun7i GMAC Ethernet controller
+config SUN4I_EMAC
+ bool "Allwinner Sun4i Ethernet MAC support"
+ depends on DM_ETH
+ help
+ This driver supports the Allwinner based SUN4I Ethernet MAC.
+
config SUN8I_EMAC
bool "Allwinner Sun8i Ethernet MAC support"
depends on DM_ETH
--
GitLab
From 751b0be0a1753bbc2f43c1d32e704bac9412d5af Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Myl=C3=A8ne=20Josserand?=
<mylene.josserand@free-electrons.com>
Date: Sun, 2 Apr 2017 12:59:08 +0200
Subject: [PATCH 092/282] sunxi: Convert CONFIG_RGMII to Kconfig
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
Convert CONFIG_RGMII to Kconfig. Thanks to that, it is possible to
update defconfig files of SYS_EXTRA_OPTIONS accordingly and
remove it when it is possible.
Signed-off-by: Mylène Josserand <mylene.josserand@free-electrons.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
---
configs/A20-OLinuXino-Lime2_defconfig | 3 ++-
configs/A20-Olimex-SOM-EVB_defconfig | 3 ++-
configs/Bananapi_defconfig | 3 ++-
configs/Bananapro_defconfig | 3 ++-
configs/Colombus_defconfig | 2 +-
configs/Cubietruck_defconfig | 3 ++-
configs/Hummingbird_A31_defconfig | 2 +-
configs/Lamobo_R1_defconfig | 3 ++-
configs/Linksprite_pcDuino3_Nano_defconfig | 3 ++-
configs/Orangepi_defconfig | 3 ++-
configs/Orangepi_mini_defconfig | 3 ++-
configs/Sinovoip_BPI_M2_defconfig | 2 +-
configs/Wits_Pro_A20_DKT_defconfig | 2 +-
configs/mixtile_loftq_defconfig | 3 ++-
drivers/net/Kconfig | 6 ++++++
15 files changed, 30 insertions(+), 14 deletions(-)
diff --git a/configs/A20-OLinuXino-Lime2_defconfig b/configs/A20-OLinuXino-Lime2_defconfig
index 8883cf182da..0c9c7943f98 100644
--- a/configs/A20-OLinuXino-Lime2_defconfig
+++ b/configs/A20-OLinuXino-Lime2_defconfig
@@ -8,7 +8,7 @@ CONFIG_USB0_VBUS_DET="PH5"
CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-olinuxino-lime2"
CONFIG_AHCI=y
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
-CONFIG_SYS_EXTRA_OPTIONS="RGMII,SATAPWR=SUNXI_GPC(3)"
+CONFIG_SYS_EXTRA_OPTIONS="SATAPWR=SUNXI_GPC(3)"
CONFIG_SPL=y
CONFIG_SPL_I2C_SUPPORT=y
# CONFIG_CMD_IMLS is not set
@@ -25,6 +25,7 @@ CONFIG_NET_ETHADDR_EEPROM=y
CONFIG_NET_ETHADDR_EEPROM_I2C=y
CONFIG_NET_ETHADDR_EEPROM_I2C_BUS=1
CONFIG_I2C1_ENABLE=y
+CONFIG_RGMII=y
CONFIG_SUN7I_GMAC=y
CONFIG_AXP_ALDO3_VOLT=2800
CONFIG_AXP_ALDO4_VOLT=2800
diff --git a/configs/A20-Olimex-SOM-EVB_defconfig b/configs/A20-Olimex-SOM-EVB_defconfig
index 9cb30c0c58e..ce658ca984f 100644
--- a/configs/A20-Olimex-SOM-EVB_defconfig
+++ b/configs/A20-Olimex-SOM-EVB_defconfig
@@ -11,7 +11,7 @@ CONFIG_USB0_VBUS_DET="PH5"
CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-olimex-som-evb"
CONFIG_AHCI=y
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
-CONFIG_SYS_EXTRA_OPTIONS="RGMII,SATAPWR=SUNXI_GPC(3)"
+CONFIG_SYS_EXTRA_OPTIONS="SATAPWR=SUNXI_GPC(3)"
CONFIG_SPL=y
CONFIG_SPL_I2C_SUPPORT=y
# CONFIG_CMD_IMLS is not set
@@ -21,6 +21,7 @@ CONFIG_SPL_I2C_SUPPORT=y
# CONFIG_SPL_ISO_PARTITION is not set
# CONFIG_SPL_EFI_PARTITION is not set
CONFIG_ETH_DESIGNWARE=y
+CONFIG_RGMII=y
CONFIG_SUN7I_GMAC=y
CONFIG_AXP_ALDO3_VOLT=2800
CONFIG_AXP_ALDO4_VOLT=2800
diff --git a/configs/Bananapi_defconfig b/configs/Bananapi_defconfig
index c780d6383ce..29e7f700f2e 100644
--- a/configs/Bananapi_defconfig
+++ b/configs/Bananapi_defconfig
@@ -7,7 +7,7 @@ CONFIG_GMAC_TX_DELAY=3
CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-bananapi"
CONFIG_AHCI=y
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
-CONFIG_SYS_EXTRA_OPTIONS="RGMII,MACPWR=SUNXI_GPH(23)"
+CONFIG_SYS_EXTRA_OPTIONS="MACPWR=SUNXI_GPH(23)"
CONFIG_SPL=y
CONFIG_SPL_I2C_SUPPORT=y
# CONFIG_CMD_IMLS is not set
@@ -18,5 +18,6 @@ CONFIG_SPL_I2C_SUPPORT=y
# CONFIG_SPL_EFI_PARTITION is not set
CONFIG_NETCONSOLE=y
CONFIG_ETH_DESIGNWARE=y
+CONFIG_RGMII=y
CONFIG_SUN7I_GMAC=y
CONFIG_USB_EHCI_HCD=y
diff --git a/configs/Bananapro_defconfig b/configs/Bananapro_defconfig
index 5dd3088d3da..bb25dec2a98 100644
--- a/configs/Bananapro_defconfig
+++ b/configs/Bananapro_defconfig
@@ -9,7 +9,7 @@ CONFIG_GMAC_TX_DELAY=3
CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-bananapro"
CONFIG_AHCI=y
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
-CONFIG_SYS_EXTRA_OPTIONS="RGMII,MACPWR=SUNXI_GPH(23)"
+CONFIG_SYS_EXTRA_OPTIONS="MACPWR=SUNXI_GPH(23)"
CONFIG_SPL=y
CONFIG_SPL_I2C_SUPPORT=y
# CONFIG_CMD_IMLS is not set
@@ -20,6 +20,7 @@ CONFIG_SPL_I2C_SUPPORT=y
# CONFIG_SPL_EFI_PARTITION is not set
CONFIG_NETCONSOLE=y
CONFIG_ETH_DESIGNWARE=y
+CONFIG_RGMII=y
CONFIG_SUN7I_GMAC=y
CONFIG_AXP_ALDO4_VOLT=2500
CONFIG_USB_EHCI_HCD=y
diff --git a/configs/Colombus_defconfig b/configs/Colombus_defconfig
index 1e7d4982c07..1359281ff41 100644
--- a/configs/Colombus_defconfig
+++ b/configs/Colombus_defconfig
@@ -16,7 +16,6 @@ CONFIG_VIDEO_LCD_PANEL_I2C_SCL="PA24"
CONFIG_VIDEO_LCD_PANEL_EDP_4_LANE_1620M_VIA_ANX9804=y
CONFIG_DEFAULT_DEVICE_TREE="sun6i-a31-colombus"
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
-CONFIG_SYS_EXTRA_OPTIONS="RGMII"
CONFIG_SPL=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
@@ -25,6 +24,7 @@ CONFIG_SPL=y
# CONFIG_SPL_ISO_PARTITION is not set
# CONFIG_SPL_EFI_PARTITION is not set
CONFIG_ETH_DESIGNWARE=y
+CONFIG_RGMII=y
CONFIG_SUN7I_GMAC=y
CONFIG_AXP_ALDO1_VOLT=3300
CONFIG_USB_EHCI_HCD=y
diff --git a/configs/Cubietruck_defconfig b/configs/Cubietruck_defconfig
index 576ccc3a206..9f2e994f71b 100644
--- a/configs/Cubietruck_defconfig
+++ b/configs/Cubietruck_defconfig
@@ -11,7 +11,7 @@ CONFIG_GMAC_TX_DELAY=1
CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-cubietruck"
CONFIG_AHCI=y
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
-CONFIG_SYS_EXTRA_OPTIONS="RGMII,SATAPWR=SUNXI_GPH(12)"
+CONFIG_SYS_EXTRA_OPTIONS="SATAPWR=SUNXI_GPH(12)"
CONFIG_SPL=y
CONFIG_SPL_I2C_SUPPORT=y
# CONFIG_CMD_IMLS is not set
@@ -24,6 +24,7 @@ CONFIG_CMD_USB_MASS_STORAGE=y
# CONFIG_SPL_PARTITION_UUIDS is not set
CONFIG_DFU_RAM=y
CONFIG_ETH_DESIGNWARE=y
+CONFIG_RGMII=y
CONFIG_SUN7I_GMAC=y
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_MUSB_GADGET=y
diff --git a/configs/Hummingbird_A31_defconfig b/configs/Hummingbird_A31_defconfig
index d5de5184563..6f9b1032075 100644
--- a/configs/Hummingbird_A31_defconfig
+++ b/configs/Hummingbird_A31_defconfig
@@ -8,7 +8,6 @@ CONFIG_VIDEO_VGA_VIA_LCD=y
CONFIG_VIDEO_VGA_EXTERNAL_DAC_EN="PH25"
CONFIG_DEFAULT_DEVICE_TREE="sun6i-a31-hummingbird"
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
-CONFIG_SYS_EXTRA_OPTIONS="RGMII"
CONFIG_SPL=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
@@ -17,6 +16,7 @@ CONFIG_SPL=y
# CONFIG_SPL_ISO_PARTITION is not set
# CONFIG_SPL_EFI_PARTITION is not set
CONFIG_ETH_DESIGNWARE=y
+CONFIG_RGMII=y
CONFIG_SUN7I_GMAC=y
CONFIG_AXP_ALDO1_VOLT=3300
CONFIG_USB_EHCI_HCD=y
diff --git a/configs/Lamobo_R1_defconfig b/configs/Lamobo_R1_defconfig
index 142ed183ebc..61a9316e7ad 100644
--- a/configs/Lamobo_R1_defconfig
+++ b/configs/Lamobo_R1_defconfig
@@ -7,7 +7,7 @@ CONFIG_GMAC_TX_DELAY=4
CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-lamobo-r1"
CONFIG_AHCI=y
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
-CONFIG_SYS_EXTRA_OPTIONS="RGMII,MACPWR=SUNXI_GPH(23),SATAPWR=SUNXI_GPB(3)"
+CONFIG_SYS_EXTRA_OPTIONS="MACPWR=SUNXI_GPH(23),SATAPWR=SUNXI_GPB(3)"
CONFIG_SPL=y
CONFIG_SPL_I2C_SUPPORT=y
# CONFIG_CMD_IMLS is not set
@@ -17,5 +17,6 @@ CONFIG_SPL_I2C_SUPPORT=y
# CONFIG_SPL_ISO_PARTITION is not set
# CONFIG_SPL_EFI_PARTITION is not set
CONFIG_ETH_DESIGNWARE=y
+CONFIG_RGMII=y
CONFIG_SUN7I_GMAC=y
CONFIG_USB_EHCI_HCD=y
diff --git a/configs/Linksprite_pcDuino3_Nano_defconfig b/configs/Linksprite_pcDuino3_Nano_defconfig
index dd84b6ec51a..38adfc0f28f 100644
--- a/configs/Linksprite_pcDuino3_Nano_defconfig
+++ b/configs/Linksprite_pcDuino3_Nano_defconfig
@@ -8,7 +8,7 @@ CONFIG_GMAC_TX_DELAY=3
CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-pcduino3-nano"
CONFIG_AHCI=y
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
-CONFIG_SYS_EXTRA_OPTIONS="RGMII,SATAPWR=SUNXI_GPH(2)"
+CONFIG_SYS_EXTRA_OPTIONS="SATAPWR=SUNXI_GPH(2)"
CONFIG_SPL=y
CONFIG_SPL_I2C_SUPPORT=y
# CONFIG_CMD_IMLS is not set
@@ -18,5 +18,6 @@ CONFIG_SPL_I2C_SUPPORT=y
# CONFIG_SPL_ISO_PARTITION is not set
# CONFIG_SPL_EFI_PARTITION is not set
CONFIG_ETH_DESIGNWARE=y
+CONFIG_RGMII=y
CONFIG_SUN7I_GMAC=y
CONFIG_USB_EHCI_HCD=y
diff --git a/configs/Orangepi_defconfig b/configs/Orangepi_defconfig
index 43765c697e7..e9781554f85 100644
--- a/configs/Orangepi_defconfig
+++ b/configs/Orangepi_defconfig
@@ -10,7 +10,7 @@ CONFIG_GMAC_TX_DELAY=3
CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-orangepi"
CONFIG_AHCI=y
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
-CONFIG_SYS_EXTRA_OPTIONS="RGMII,MACPWR=SUNXI_GPH(23)"
+CONFIG_SYS_EXTRA_OPTIONS="MACPWR=SUNXI_GPH(23)"
CONFIG_SPL=y
CONFIG_SPL_I2C_SUPPORT=y
# CONFIG_CMD_IMLS is not set
@@ -20,5 +20,6 @@ CONFIG_SPL_I2C_SUPPORT=y
# CONFIG_SPL_ISO_PARTITION is not set
# CONFIG_SPL_EFI_PARTITION is not set
CONFIG_ETH_DESIGNWARE=y
+CONFIG_RGMII=y
CONFIG_SUN7I_GMAC=y
CONFIG_USB_EHCI_HCD=y
diff --git a/configs/Orangepi_mini_defconfig b/configs/Orangepi_mini_defconfig
index 772c00f7d15..508b4aca765 100644
--- a/configs/Orangepi_mini_defconfig
+++ b/configs/Orangepi_mini_defconfig
@@ -12,7 +12,7 @@ CONFIG_GMAC_TX_DELAY=3
CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-orangepi-mini"
CONFIG_AHCI=y
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
-CONFIG_SYS_EXTRA_OPTIONS="RGMII,MACPWR=SUNXI_GPH(23)"
+CONFIG_SYS_EXTRA_OPTIONS="MACPWR=SUNXI_GPH(23)"
CONFIG_SPL=y
CONFIG_SPL_I2C_SUPPORT=y
# CONFIG_CMD_IMLS is not set
@@ -22,5 +22,6 @@ CONFIG_SPL_I2C_SUPPORT=y
# CONFIG_SPL_ISO_PARTITION is not set
# CONFIG_SPL_EFI_PARTITION is not set
CONFIG_ETH_DESIGNWARE=y
+CONFIG_RGMII=y
CONFIG_SUN7I_GMAC=y
CONFIG_USB_EHCI_HCD=y
diff --git a/configs/Sinovoip_BPI_M2_defconfig b/configs/Sinovoip_BPI_M2_defconfig
index d123fad96bd..a2cadbc2715 100644
--- a/configs/Sinovoip_BPI_M2_defconfig
+++ b/configs/Sinovoip_BPI_M2_defconfig
@@ -6,7 +6,6 @@ CONFIG_USB1_VBUS_PIN=""
CONFIG_USB2_VBUS_PIN=""
CONFIG_DEFAULT_DEVICE_TREE="sun6i-a31s-sinovoip-bpi-m2"
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
-CONFIG_SYS_EXTRA_OPTIONS="RGMII"
CONFIG_SPL=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
@@ -15,6 +14,7 @@ CONFIG_SPL=y
# CONFIG_SPL_ISO_PARTITION is not set
# CONFIG_SPL_EFI_PARTITION is not set
CONFIG_ETH_DESIGNWARE=y
+CONFIG_RGMII=y
CONFIG_SUN7I_GMAC=y
CONFIG_AXP_ALDO1_VOLT=3300
CONFIG_AXP_ALDO2_VOLT=1800
diff --git a/configs/Wits_Pro_A20_DKT_defconfig b/configs/Wits_Pro_A20_DKT_defconfig
index 97fb699eca7..8658ef6b4c9 100644
--- a/configs/Wits_Pro_A20_DKT_defconfig
+++ b/configs/Wits_Pro_A20_DKT_defconfig
@@ -11,7 +11,6 @@ CONFIG_VIDEO_LCD_PANEL_LVDS=y
CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-wits-pro-a20-dkt"
CONFIG_AHCI=y
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
-CONFIG_SYS_EXTRA_OPTIONS="RGMII"
CONFIG_SPL=y
CONFIG_SPL_I2C_SUPPORT=y
# CONFIG_CMD_IMLS is not set
@@ -21,5 +20,6 @@ CONFIG_SPL_I2C_SUPPORT=y
# CONFIG_SPL_ISO_PARTITION is not set
# CONFIG_SPL_EFI_PARTITION is not set
CONFIG_ETH_DESIGNWARE=y
+CONFIG_RGMII=y
CONFIG_SUN7I_GMAC=y
CONFIG_USB_EHCI_HCD=y
diff --git a/configs/mixtile_loftq_defconfig b/configs/mixtile_loftq_defconfig
index 2dd107596ab..591f48169df 100644
--- a/configs/mixtile_loftq_defconfig
+++ b/configs/mixtile_loftq_defconfig
@@ -7,7 +7,7 @@ CONFIG_USB1_VBUS_PIN="PH24"
CONFIG_USB2_VBUS_PIN=""
CONFIG_DEFAULT_DEVICE_TREE="sun6i-a31-mixtile-loftq"
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
-CONFIG_SYS_EXTRA_OPTIONS="RGMII,MACPWR=SUNXI_GPA(21)"
+CONFIG_SYS_EXTRA_OPTIONS="MACPWR=SUNXI_GPA(21)"
CONFIG_SPL=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
@@ -16,6 +16,7 @@ CONFIG_SPL=y
# CONFIG_SPL_ISO_PARTITION is not set
# CONFIG_SPL_EFI_PARTITION is not set
CONFIG_ETH_DESIGNWARE=y
+CONFIG_RGMII=y
CONFIG_SUN7I_GMAC=y
CONFIG_AXP_ALDO1_VOLT=3300
CONFIG_USB_EHCI_HCD=y
diff --git a/drivers/net/Kconfig b/drivers/net/Kconfig
index 6126d10c39b..9cd0d94cbdc 100644
--- a/drivers/net/Kconfig
+++ b/drivers/net/Kconfig
@@ -149,6 +149,12 @@ config PCH_GBE
This MAC is present in Intel Platform Controller Hub EG20T. It
supports 10/100/1000 Mbps operation.
+config RGMII
+ bool "Enable RGMII"
+ help
+ Enable the support of the Reduced Gigabit Media-Independent
+ Interface (RGMII).
+
config RTL8139
bool "Realtek 8139 series Ethernet controller driver"
help
--
GitLab
From d7b560e6653b248a1920cbd2c5ac393d42e30b61 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Myl=C3=A8ne=20Josserand?=
<mylene.josserand@free-electrons.com>
Date: Sun, 2 Apr 2017 12:59:09 +0200
Subject: [PATCH 093/282] sunxi: Convert CONFIG_SATAPWR to Kconfig
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
Convert the CONFIG_SATAPWR into kconfig.
Thanks to that, many SYS_EXTRA_OPTIONS can be removed from some
defconfigs.
Signed-off-by: Mylène Josserand <mylene.josserand@free-electrons.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
---
board/sunxi/Kconfig | 7 +++++++
board/sunxi/board.c | 7 ++++---
configs/A10-OLinuXino-Lime_defconfig | 2 +-
configs/A20-OLinuXino-Lime2_defconfig | 2 +-
configs/A20-OLinuXino-Lime_defconfig | 2 +-
configs/A20-OLinuXino_MICRO_defconfig | 2 +-
configs/A20-Olimex-SOM-EVB_defconfig | 2 +-
configs/Cubieboard2_defconfig | 2 +-
configs/Cubieboard_defconfig | 2 +-
configs/Cubietruck_defconfig | 2 +-
configs/Itead_Ibox_A20_defconfig | 2 +-
configs/Lamobo_R1_defconfig | 3 ++-
configs/Linksprite_pcDuino3_Nano_defconfig | 2 +-
configs/Linksprite_pcDuino3_defconfig | 2 +-
configs/Sinovoip_BPI_M3_defconfig | 2 +-
configs/orangepi_plus_defconfig | 3 ++-
16 files changed, 27 insertions(+), 17 deletions(-)
diff --git a/board/sunxi/Kconfig b/board/sunxi/Kconfig
index a667c9e5c5c..aa6b84bbbb5 100644
--- a/board/sunxi/Kconfig
+++ b/board/sunxi/Kconfig
@@ -706,6 +706,13 @@ config VIDEO_LCD_TL059WV5C0
endchoice
+config SATAPWR
+ string "SATA power pin"
+ default ""
+ help
+ Set the pins used to power the SATA. This takes a string in the
+ format understood by sunxi_name_to_gpio, e.g. PH1 for pin 1 of
+ port H.
config GMAC_TX_DELAY
int "GMAC Transmit Clock Delay Chain"
diff --git a/board/sunxi/board.c b/board/sunxi/board.c
index b9660128e5e..8043a8dbacd 100644
--- a/board/sunxi/board.c
+++ b/board/sunxi/board.c
@@ -80,7 +80,7 @@ DECLARE_GLOBAL_DATA_PTR;
/* add board specific code here */
int board_init(void)
{
- __maybe_unused int id_pfr1, ret;
+ __maybe_unused int id_pfr1, ret, satapwr_pin;
gd->bd->bi_boot_params = (PHYS_SDRAM_0 + 0x100);
@@ -118,8 +118,9 @@ int board_init(void)
return ret;
#ifdef CONFIG_SATAPWR
- gpio_request(CONFIG_SATAPWR, "satapwr");
- gpio_direction_output(CONFIG_SATAPWR, 1);
+ satapwr_pin = sunxi_name_to_gpio(CONFIG_SATAPWR);
+ gpio_request(satapwr_pin, "satapwr");
+ gpio_direction_output(satapwr_pin, 1);
#endif
#ifdef CONFIG_MACPWR
gpio_request(CONFIG_MACPWR, "macpwr");
diff --git a/configs/A10-OLinuXino-Lime_defconfig b/configs/A10-OLinuXino-Lime_defconfig
index 967a3d442be..50cd9e16748 100644
--- a/configs/A10-OLinuXino-Lime_defconfig
+++ b/configs/A10-OLinuXino-Lime_defconfig
@@ -5,10 +5,10 @@ CONFIG_DRAM_CLK=480
CONFIG_DRAM_EMR1=4
CONFIG_SYS_CLK_FREQ=912000000
CONFIG_MMC0_CD_PIN="PH1"
+CONFIG_SATAPWR="PC3"
CONFIG_DEFAULT_DEVICE_TREE="sun4i-a10-olinuxino-lime"
CONFIG_AHCI=y
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
-CONFIG_SYS_EXTRA_OPTIONS="SATAPWR=SUNXI_GPC(3)"
CONFIG_SPL=y
CONFIG_SPL_I2C_SUPPORT=y
# CONFIG_CMD_IMLS is not set
diff --git a/configs/A20-OLinuXino-Lime2_defconfig b/configs/A20-OLinuXino-Lime2_defconfig
index 0c9c7943f98..427b7c313a0 100644
--- a/configs/A20-OLinuXino-Lime2_defconfig
+++ b/configs/A20-OLinuXino-Lime2_defconfig
@@ -5,10 +5,10 @@ CONFIG_DRAM_CLK=384
CONFIG_MMC0_CD_PIN="PH1"
CONFIG_USB0_VBUS_PIN="PC17"
CONFIG_USB0_VBUS_DET="PH5"
+CONFIG_SATAPWR="PC3"
CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-olinuxino-lime2"
CONFIG_AHCI=y
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
-CONFIG_SYS_EXTRA_OPTIONS="SATAPWR=SUNXI_GPC(3)"
CONFIG_SPL=y
CONFIG_SPL_I2C_SUPPORT=y
# CONFIG_CMD_IMLS is not set
diff --git a/configs/A20-OLinuXino-Lime_defconfig b/configs/A20-OLinuXino-Lime_defconfig
index d83fc2b4031..285f1ac85b5 100644
--- a/configs/A20-OLinuXino-Lime_defconfig
+++ b/configs/A20-OLinuXino-Lime_defconfig
@@ -3,10 +3,10 @@ CONFIG_ARCH_SUNXI=y
CONFIG_MACH_SUN7I=y
CONFIG_DRAM_CLK=384
CONFIG_MMC0_CD_PIN="PH1"
+CONFIG_SATAPWR="PC3"
CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-olinuxino-lime"
CONFIG_AHCI=y
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
-CONFIG_SYS_EXTRA_OPTIONS="SATAPWR=SUNXI_GPC(3)"
CONFIG_SPL=y
CONFIG_SPL_I2C_SUPPORT=y
# CONFIG_CMD_IMLS is not set
diff --git a/configs/A20-OLinuXino_MICRO_defconfig b/configs/A20-OLinuXino_MICRO_defconfig
index c25556bdac7..4aab6409d2f 100644
--- a/configs/A20-OLinuXino_MICRO_defconfig
+++ b/configs/A20-OLinuXino_MICRO_defconfig
@@ -6,10 +6,10 @@ CONFIG_MMC0_CD_PIN="PH1"
CONFIG_MMC3_CD_PIN="PH11"
CONFIG_MMC_SUNXI_SLOT_EXTRA=3
CONFIG_VIDEO_VGA=y
+CONFIG_SATAPWR="PB8"
CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-olinuxino-micro"
CONFIG_AHCI=y
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
-CONFIG_SYS_EXTRA_OPTIONS="SATAPWR=SUNXI_GPB(8)"
CONFIG_SPL=y
CONFIG_SPL_I2C_SUPPORT=y
# CONFIG_CMD_IMLS is not set
diff --git a/configs/A20-Olimex-SOM-EVB_defconfig b/configs/A20-Olimex-SOM-EVB_defconfig
index ce658ca984f..6c87648d4f7 100644
--- a/configs/A20-Olimex-SOM-EVB_defconfig
+++ b/configs/A20-Olimex-SOM-EVB_defconfig
@@ -8,10 +8,10 @@ CONFIG_MMC3_PINS="PH"
CONFIG_MMC_SUNXI_SLOT_EXTRA=3
CONFIG_USB0_VBUS_PIN="PB9"
CONFIG_USB0_VBUS_DET="PH5"
+CONFIG_SATAPWR="PC3"
CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-olimex-som-evb"
CONFIG_AHCI=y
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
-CONFIG_SYS_EXTRA_OPTIONS="SATAPWR=SUNXI_GPC(3)"
CONFIG_SPL=y
CONFIG_SPL_I2C_SUPPORT=y
# CONFIG_CMD_IMLS is not set
diff --git a/configs/Cubieboard2_defconfig b/configs/Cubieboard2_defconfig
index 8968623ec51..02c503f672a 100644
--- a/configs/Cubieboard2_defconfig
+++ b/configs/Cubieboard2_defconfig
@@ -3,10 +3,10 @@ CONFIG_ARCH_SUNXI=y
CONFIG_MACH_SUN7I=y
CONFIG_DRAM_CLK=480
CONFIG_MMC0_CD_PIN="PH1"
+CONFIG_SATAPWR="PB8"
CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-cubieboard2"
CONFIG_AHCI=y
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
-CONFIG_SYS_EXTRA_OPTIONS="SATAPWR=SUNXI_GPB(8)"
CONFIG_SPL=y
CONFIG_SPL_I2C_SUPPORT=y
# CONFIG_CMD_IMLS is not set
diff --git a/configs/Cubieboard_defconfig b/configs/Cubieboard_defconfig
index 78fd4a211bc..a8e9c988d5e 100644
--- a/configs/Cubieboard_defconfig
+++ b/configs/Cubieboard_defconfig
@@ -3,10 +3,10 @@ CONFIG_ARCH_SUNXI=y
CONFIG_MACH_SUN4I=y
CONFIG_DRAM_CLK=480
CONFIG_MMC0_CD_PIN="PH1"
+CONFIG_SATAPWR="PB8"
CONFIG_DEFAULT_DEVICE_TREE="sun4i-a10-cubieboard"
CONFIG_AHCI=y
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
-CONFIG_SYS_EXTRA_OPTIONS="SATAPWR=SUNXI_GPB(8)"
CONFIG_SPL=y
CONFIG_SPL_I2C_SUPPORT=y
# CONFIG_CMD_IMLS is not set
diff --git a/configs/Cubietruck_defconfig b/configs/Cubietruck_defconfig
index 9f2e994f71b..f9d56c8f9d8 100644
--- a/configs/Cubietruck_defconfig
+++ b/configs/Cubietruck_defconfig
@@ -7,11 +7,11 @@ CONFIG_USB0_VBUS_PIN="PH17"
CONFIG_USB0_VBUS_DET="PH22"
CONFIG_USB0_ID_DET="PH19"
CONFIG_VIDEO_VGA=y
+CONFIG_SATAPWR="PH12"
CONFIG_GMAC_TX_DELAY=1
CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-cubietruck"
CONFIG_AHCI=y
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
-CONFIG_SYS_EXTRA_OPTIONS="SATAPWR=SUNXI_GPH(12)"
CONFIG_SPL=y
CONFIG_SPL_I2C_SUPPORT=y
# CONFIG_CMD_IMLS is not set
diff --git a/configs/Itead_Ibox_A20_defconfig b/configs/Itead_Ibox_A20_defconfig
index bba0c5973b8..4bae19f2fae 100644
--- a/configs/Itead_Ibox_A20_defconfig
+++ b/configs/Itead_Ibox_A20_defconfig
@@ -3,10 +3,10 @@ CONFIG_ARCH_SUNXI=y
CONFIG_MACH_SUN7I=y
CONFIG_DRAM_CLK=480
CONFIG_MMC0_CD_PIN="PH1"
+CONFIG_SATAPWR="PB8"
CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-itead-ibox"
CONFIG_AHCI=y
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
-CONFIG_SYS_EXTRA_OPTIONS="SATAPWR=SUNXI_GPB(8)"
CONFIG_SPL=y
CONFIG_SPL_I2C_SUPPORT=y
# CONFIG_CMD_IMLS is not set
diff --git a/configs/Lamobo_R1_defconfig b/configs/Lamobo_R1_defconfig
index 61a9316e7ad..38eea97000c 100644
--- a/configs/Lamobo_R1_defconfig
+++ b/configs/Lamobo_R1_defconfig
@@ -3,11 +3,12 @@ CONFIG_ARCH_SUNXI=y
CONFIG_MACH_SUN7I=y
CONFIG_DRAM_CLK=432
CONFIG_MMC0_CD_PIN="PH10"
+CONFIG_SATAPWR="PB3"
CONFIG_GMAC_TX_DELAY=4
CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-lamobo-r1"
CONFIG_AHCI=y
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
-CONFIG_SYS_EXTRA_OPTIONS="MACPWR=SUNXI_GPH(23),SATAPWR=SUNXI_GPB(3)"
+CONFIG_SYS_EXTRA_OPTIONS="MACPWR=SUNXI_GPH(23)"
CONFIG_SPL=y
CONFIG_SPL_I2C_SUPPORT=y
# CONFIG_CMD_IMLS is not set
diff --git a/configs/Linksprite_pcDuino3_Nano_defconfig b/configs/Linksprite_pcDuino3_Nano_defconfig
index 38adfc0f28f..80416cb7b19 100644
--- a/configs/Linksprite_pcDuino3_Nano_defconfig
+++ b/configs/Linksprite_pcDuino3_Nano_defconfig
@@ -4,11 +4,11 @@ CONFIG_MACH_SUN7I=y
CONFIG_DRAM_CLK=408
CONFIG_DRAM_ZQ=122
CONFIG_USB1_VBUS_PIN="PH11"
+CONFIG_SATAPWR="PH2"
CONFIG_GMAC_TX_DELAY=3
CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-pcduino3-nano"
CONFIG_AHCI=y
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
-CONFIG_SYS_EXTRA_OPTIONS="SATAPWR=SUNXI_GPH(2)"
CONFIG_SPL=y
CONFIG_SPL_I2C_SUPPORT=y
# CONFIG_CMD_IMLS is not set
diff --git a/configs/Linksprite_pcDuino3_defconfig b/configs/Linksprite_pcDuino3_defconfig
index 8e8455eee45..b9f89a013ed 100644
--- a/configs/Linksprite_pcDuino3_defconfig
+++ b/configs/Linksprite_pcDuino3_defconfig
@@ -3,10 +3,10 @@ CONFIG_ARCH_SUNXI=y
CONFIG_MACH_SUN7I=y
CONFIG_DRAM_CLK=480
CONFIG_DRAM_ZQ=122
+CONFIG_SATAPWR="PH2"
CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-pcduino3"
CONFIG_AHCI=y
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
-CONFIG_SYS_EXTRA_OPTIONS="SATAPWR=SUNXI_GPH(2)"
CONFIG_SPL=y
CONFIG_SPL_I2C_SUPPORT=y
# CONFIG_CMD_IMLS is not set
diff --git a/configs/Sinovoip_BPI_M3_defconfig b/configs/Sinovoip_BPI_M3_defconfig
index aec3f7d4bba..45eadcb4431 100644
--- a/configs/Sinovoip_BPI_M3_defconfig
+++ b/configs/Sinovoip_BPI_M3_defconfig
@@ -11,9 +11,9 @@ CONFIG_USB0_VBUS_DET="AXP0-VBUS-DETECT"
CONFIG_USB0_ID_DET="PH11"
CONFIG_USB1_VBUS_PIN="PD24"
CONFIG_AXP_GPIO=y
+CONFIG_SATAPWR="PD25"
CONFIG_DEFAULT_DEVICE_TREE="sun8i-a83t-sinovoip-bpi-m3"
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
-CONFIG_SYS_EXTRA_OPTIONS="SATAPWR=SUNXI_GPD(25)"
CONFIG_CONSOLE_MUX=y
CONFIG_SPL=y
# CONFIG_CMD_IMLS is not set
diff --git a/configs/orangepi_plus_defconfig b/configs/orangepi_plus_defconfig
index fbaa5322e84..a14c7c75f08 100644
--- a/configs/orangepi_plus_defconfig
+++ b/configs/orangepi_plus_defconfig
@@ -6,9 +6,10 @@ CONFIG_DRAM_ZQ=3881979
CONFIG_DRAM_ODT_EN=y
CONFIG_MMC_SUNXI_SLOT_EXTRA=2
CONFIG_USB1_VBUS_PIN="PG13"
+CONFIG_SATAPWR="PG11"
CONFIG_DEFAULT_DEVICE_TREE="sun8i-h3-orangepi-plus"
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
-CONFIG_SYS_EXTRA_OPTIONS="SATAPWR=SUNXI_GPG(11),MACPWR=SUNXI_GPD(6)"
+CONFIG_SYS_EXTRA_OPTIONS="MACPWR=SUNXI_GPD(6)"
CONFIG_CONSOLE_MUX=y
CONFIG_SPL=y
CONFIG_SPL_I2C_SUPPORT=y
--
GitLab
From f5fd78860ab4dbb3bc14ead4f14433f04d6e5cea Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Myl=C3=A8ne=20Josserand?=
<mylene.josserand@free-electrons.com>
Date: Sun, 2 Apr 2017 12:59:10 +0200
Subject: [PATCH 094/282] sunxi: Convert CONFIG_MACPWR to Kconfig
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
Convert the CONFIG_MACPWR to Kconfig and update all the sunxi defconfigs
that used it in SYS_EXTRA_OPTIONS.
Signed-off-by: Mylène Josserand <mylene.josserand@free-electrons.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
---
board/sunxi/Kconfig | 7 +++++++
board/sunxi/board.c | 7 ++++---
configs/Bananapi_defconfig | 2 +-
configs/Bananapro_defconfig | 2 +-
configs/Lamobo_R1_defconfig | 2 +-
configs/Mele_A1000_defconfig | 2 +-
configs/Orangepi_defconfig | 2 +-
configs/Orangepi_mini_defconfig | 2 +-
configs/i12-tvbox_defconfig | 2 +-
configs/jesurun_q5_defconfig | 2 +-
configs/mixtile_loftq_defconfig | 2 +-
configs/orangepi_plus2e_defconfig | 2 +-
configs/orangepi_plus_defconfig | 2 +-
13 files changed, 22 insertions(+), 14 deletions(-)
diff --git a/board/sunxi/Kconfig b/board/sunxi/Kconfig
index aa6b84bbbb5..87f282a4933 100644
--- a/board/sunxi/Kconfig
+++ b/board/sunxi/Kconfig
@@ -345,6 +345,13 @@ config OLD_SUNXI_KERNEL_COMPAT
Set this to enable various workarounds for old kernels, this results in
sub-optimal settings for newer kernels, only enable if needed.
+config MACPWR
+ string "MAC power pin"
+ default ""
+ help
+ Set the pin used to power the MAC. This takes a string in the format
+ understood by sunxi_name_to_gpio, e.g. PH1 for pin 1 of port H.
+
config MMC0_CD_PIN
string "Card detect pin for mmc0"
default "PF6" if MACH_SUN8I_A83T || MACH_SUNXI_H3_H5 || MACH_SUN50I
diff --git a/board/sunxi/board.c b/board/sunxi/board.c
index 8043a8dbacd..e2bba9abdee 100644
--- a/board/sunxi/board.c
+++ b/board/sunxi/board.c
@@ -80,7 +80,7 @@ DECLARE_GLOBAL_DATA_PTR;
/* add board specific code here */
int board_init(void)
{
- __maybe_unused int id_pfr1, ret, satapwr_pin;
+ __maybe_unused int id_pfr1, ret, satapwr_pin, macpwr_pin;
gd->bd->bi_boot_params = (PHYS_SDRAM_0 + 0x100);
@@ -123,8 +123,9 @@ int board_init(void)
gpio_direction_output(satapwr_pin, 1);
#endif
#ifdef CONFIG_MACPWR
- gpio_request(CONFIG_MACPWR, "macpwr");
- gpio_direction_output(CONFIG_MACPWR, 1);
+ macpwr_pin = sunxi_name_to_gpio(CONFIG_MACPWR);
+ gpio_request(macpwr_pin, "macpwr");
+ gpio_direction_output(macpwr_pin, 1);
#endif
/* Uses dm gpio code so do this here and not in i2c_init_board() */
diff --git a/configs/Bananapi_defconfig b/configs/Bananapi_defconfig
index 29e7f700f2e..fe75eef5135 100644
--- a/configs/Bananapi_defconfig
+++ b/configs/Bananapi_defconfig
@@ -2,12 +2,12 @@ CONFIG_ARM=y
CONFIG_ARCH_SUNXI=y
CONFIG_MACH_SUN7I=y
CONFIG_DRAM_CLK=432
+CONFIG_MACPWR="PH23"
CONFIG_VIDEO_COMPOSITE=y
CONFIG_GMAC_TX_DELAY=3
CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-bananapi"
CONFIG_AHCI=y
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
-CONFIG_SYS_EXTRA_OPTIONS="MACPWR=SUNXI_GPH(23)"
CONFIG_SPL=y
CONFIG_SPL_I2C_SUPPORT=y
# CONFIG_CMD_IMLS is not set
diff --git a/configs/Bananapro_defconfig b/configs/Bananapro_defconfig
index bb25dec2a98..df65922e83f 100644
--- a/configs/Bananapro_defconfig
+++ b/configs/Bananapro_defconfig
@@ -2,6 +2,7 @@ CONFIG_ARM=y
CONFIG_ARCH_SUNXI=y
CONFIG_MACH_SUN7I=y
CONFIG_DRAM_CLK=432
+CONFIG_MACPWR="PH23"
CONFIG_USB1_VBUS_PIN="PH0"
CONFIG_USB2_VBUS_PIN="PH1"
CONFIG_VIDEO_COMPOSITE=y
@@ -9,7 +10,6 @@ CONFIG_GMAC_TX_DELAY=3
CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-bananapro"
CONFIG_AHCI=y
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
-CONFIG_SYS_EXTRA_OPTIONS="MACPWR=SUNXI_GPH(23)"
CONFIG_SPL=y
CONFIG_SPL_I2C_SUPPORT=y
# CONFIG_CMD_IMLS is not set
diff --git a/configs/Lamobo_R1_defconfig b/configs/Lamobo_R1_defconfig
index 38eea97000c..cc29d606a9d 100644
--- a/configs/Lamobo_R1_defconfig
+++ b/configs/Lamobo_R1_defconfig
@@ -2,13 +2,13 @@ CONFIG_ARM=y
CONFIG_ARCH_SUNXI=y
CONFIG_MACH_SUN7I=y
CONFIG_DRAM_CLK=432
+CONFIG_MACPWR="PH23"
CONFIG_MMC0_CD_PIN="PH10"
CONFIG_SATAPWR="PB3"
CONFIG_GMAC_TX_DELAY=4
CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-lamobo-r1"
CONFIG_AHCI=y
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
-CONFIG_SYS_EXTRA_OPTIONS="MACPWR=SUNXI_GPH(23)"
CONFIG_SPL=y
CONFIG_SPL_I2C_SUPPORT=y
# CONFIG_CMD_IMLS is not set
diff --git a/configs/Mele_A1000_defconfig b/configs/Mele_A1000_defconfig
index 4bd81a262cd..0442360a5cf 100644
--- a/configs/Mele_A1000_defconfig
+++ b/configs/Mele_A1000_defconfig
@@ -1,12 +1,12 @@
CONFIG_ARM=y
CONFIG_ARCH_SUNXI=y
CONFIG_MACH_SUN4I=y
+CONFIG_MACPWR="PH15"
CONFIG_VIDEO_VGA=y
CONFIG_VIDEO_COMPOSITE=y
CONFIG_DEFAULT_DEVICE_TREE="sun4i-a10-a1000"
CONFIG_AHCI=y
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
-CONFIG_SYS_EXTRA_OPTIONS="MACPWR=SUNXI_GPH(15)"
CONFIG_SPL=y
CONFIG_SPL_I2C_SUPPORT=y
# CONFIG_CMD_IMLS is not set
diff --git a/configs/Orangepi_defconfig b/configs/Orangepi_defconfig
index e9781554f85..b8c1ea4d7cd 100644
--- a/configs/Orangepi_defconfig
+++ b/configs/Orangepi_defconfig
@@ -2,6 +2,7 @@ CONFIG_ARM=y
CONFIG_ARCH_SUNXI=y
CONFIG_MACH_SUN7I=y
CONFIG_DRAM_CLK=432
+CONFIG_MACPWR="PH23"
CONFIG_USB1_VBUS_PIN="PH26"
CONFIG_USB2_VBUS_PIN="PH22"
CONFIG_VIDEO_VGA=y
@@ -10,7 +11,6 @@ CONFIG_GMAC_TX_DELAY=3
CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-orangepi"
CONFIG_AHCI=y
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
-CONFIG_SYS_EXTRA_OPTIONS="MACPWR=SUNXI_GPH(23)"
CONFIG_SPL=y
CONFIG_SPL_I2C_SUPPORT=y
# CONFIG_CMD_IMLS is not set
diff --git a/configs/Orangepi_mini_defconfig b/configs/Orangepi_mini_defconfig
index 508b4aca765..19c35ef1039 100644
--- a/configs/Orangepi_mini_defconfig
+++ b/configs/Orangepi_mini_defconfig
@@ -2,6 +2,7 @@ CONFIG_ARM=y
CONFIG_ARCH_SUNXI=y
CONFIG_MACH_SUN7I=y
CONFIG_DRAM_CLK=432
+CONFIG_MACPWR="PH23"
CONFIG_MMC0_CD_PIN="PH10"
CONFIG_MMC3_CD_PIN="PH11"
CONFIG_MMC_SUNXI_SLOT_EXTRA=3
@@ -12,7 +13,6 @@ CONFIG_GMAC_TX_DELAY=3
CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-orangepi-mini"
CONFIG_AHCI=y
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
-CONFIG_SYS_EXTRA_OPTIONS="MACPWR=SUNXI_GPH(23)"
CONFIG_SPL=y
CONFIG_SPL_I2C_SUPPORT=y
# CONFIG_CMD_IMLS is not set
diff --git a/configs/i12-tvbox_defconfig b/configs/i12-tvbox_defconfig
index d7dc703981b..4245491b6af 100644
--- a/configs/i12-tvbox_defconfig
+++ b/configs/i12-tvbox_defconfig
@@ -2,10 +2,10 @@ CONFIG_ARM=y
CONFIG_ARCH_SUNXI=y
CONFIG_MACH_SUN7I=y
CONFIG_DRAM_CLK=384
+CONFIG_MACPWR="PH21"
CONFIG_VIDEO_COMPOSITE=y
CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-i12-tvbox"
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
-CONFIG_SYS_EXTRA_OPTIONS="MACPWR=SUNXI_GPH(21)"
CONFIG_SPL=y
CONFIG_SPL_I2C_SUPPORT=y
# CONFIG_CMD_IMLS is not set
diff --git a/configs/jesurun_q5_defconfig b/configs/jesurun_q5_defconfig
index 608e523e4c0..822d56b9965 100644
--- a/configs/jesurun_q5_defconfig
+++ b/configs/jesurun_q5_defconfig
@@ -2,11 +2,11 @@ CONFIG_ARM=y
CONFIG_ARCH_SUNXI=y
CONFIG_MACH_SUN4I=y
CONFIG_DRAM_CLK=312
+CONFIG_MACPWR="PH19"
CONFIG_USB0_VBUS_PIN="PB9"
CONFIG_VIDEO_COMPOSITE=y
CONFIG_DEFAULT_DEVICE_TREE="sun4i-a10-jesurun-q5"
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
-CONFIG_SYS_EXTRA_OPTIONS="MACPWR=SUNXI_GPH(19)"
CONFIG_SPL=y
CONFIG_SPL_I2C_SUPPORT=y
# CONFIG_CMD_IMLS is not set
diff --git a/configs/mixtile_loftq_defconfig b/configs/mixtile_loftq_defconfig
index 591f48169df..6264b3a1517 100644
--- a/configs/mixtile_loftq_defconfig
+++ b/configs/mixtile_loftq_defconfig
@@ -2,12 +2,12 @@ CONFIG_ARM=y
CONFIG_ARCH_SUNXI=y
CONFIG_MACH_SUN6I=y
CONFIG_DRAM_ZQ=251
+CONFIG_MACPWR="PA21"
CONFIG_MMC_SUNXI_SLOT_EXTRA=2
CONFIG_USB1_VBUS_PIN="PH24"
CONFIG_USB2_VBUS_PIN=""
CONFIG_DEFAULT_DEVICE_TREE="sun6i-a31-mixtile-loftq"
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
-CONFIG_SYS_EXTRA_OPTIONS="MACPWR=SUNXI_GPA(21)"
CONFIG_SPL=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
diff --git a/configs/orangepi_plus2e_defconfig b/configs/orangepi_plus2e_defconfig
index 366b804b494..52ec86a4bf8 100644
--- a/configs/orangepi_plus2e_defconfig
+++ b/configs/orangepi_plus2e_defconfig
@@ -4,10 +4,10 @@ CONFIG_MACH_SUN8I_H3=y
CONFIG_DRAM_CLK=672
CONFIG_DRAM_ZQ=3881979
CONFIG_DRAM_ODT_EN=y
+CONFIG_MACPWR="PD6"
CONFIG_MMC_SUNXI_SLOT_EXTRA=2
CONFIG_DEFAULT_DEVICE_TREE="sun8i-h3-orangepi-plus2e"
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
-CONFIG_SYS_EXTRA_OPTIONS="MACPWR=SUNXI_GPD(6)"
CONFIG_CONSOLE_MUX=y
CONFIG_SPL=y
CONFIG_SPL_I2C_SUPPORT=y
diff --git a/configs/orangepi_plus_defconfig b/configs/orangepi_plus_defconfig
index a14c7c75f08..5e028691c18 100644
--- a/configs/orangepi_plus_defconfig
+++ b/configs/orangepi_plus_defconfig
@@ -4,12 +4,12 @@ CONFIG_MACH_SUN8I_H3=y
CONFIG_DRAM_CLK=672
CONFIG_DRAM_ZQ=3881979
CONFIG_DRAM_ODT_EN=y
+CONFIG_MACPWR="PD6"
CONFIG_MMC_SUNXI_SLOT_EXTRA=2
CONFIG_USB1_VBUS_PIN="PG13"
CONFIG_SATAPWR="PG11"
CONFIG_DEFAULT_DEVICE_TREE="sun8i-h3-orangepi-plus"
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
-CONFIG_SYS_EXTRA_OPTIONS="MACPWR=SUNXI_GPD(6)"
CONFIG_CONSOLE_MUX=y
CONFIG_SPL=y
CONFIG_SPL_I2C_SUPPORT=y
--
GitLab
From 7095f864186350dd5773a0bda2df19a1fa8d0aeb Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Myl=C3=A8ne=20Josserand?=
<mylene.josserand@free-electrons.com>
Date: Sun, 2 Apr 2017 12:59:11 +0200
Subject: [PATCH 095/282] sunxi: Convert CONS_INDEX to Kconfig
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
Convert the CONS_INDEX configuration to Kconfig.
Update sunxi's defconfigs to remove SYS_EXTRA_OPTIONS variable not
needed anymore.
Default value is 1 except for sun5i (equals 2) and sun8i (equals 5).
Signed-off-by: Mylène Josserand <mylene.josserand@free-electrons.com>
[Maxime: Added a depends on ARCH_SUNXI to avoid build breakages]
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
---
configs/A13-OLinuXinoM_defconfig | 1 -
configs/A13-OLinuXino_defconfig | 1 -
configs/Ampe_A76_defconfig | 1 -
configs/CHIP_defconfig | 1 -
configs/CHIP_pro_defconfig | 2 +-
configs/Empire_electronix_d709_defconfig | 1 -
configs/Empire_electronix_m712_defconfig | 1 -
configs/difrnce_dit4350_defconfig | 1 -
configs/ga10h_v1_1_defconfig | 1 -
configs/gt90h_v4_defconfig | 1 -
configs/iNet_D978_rev2_defconfig | 1 -
configs/inet86dz_defconfig | 1 -
configs/inet98v_rev2_defconfig | 1 -
configs/polaroid_mid2407pxe03_defconfig | 1 -
configs/polaroid_mid2809pxe04_defconfig | 1 -
configs/q8_a13_tablet_defconfig | 1 -
configs/q8_a23_tablet_800x480_defconfig | 1 -
configs/q8_a33_tablet_1024x600_defconfig | 1 -
configs/q8_a33_tablet_800x480_defconfig | 1 -
configs/sun8i_a23_evb_defconfig | 1 -
drivers/serial/Kconfig | 11 +++++++++++
include/configs/sunxi-common.h | 4 ----
22 files changed, 12 insertions(+), 24 deletions(-)
diff --git a/configs/A13-OLinuXinoM_defconfig b/configs/A13-OLinuXinoM_defconfig
index 264135b271b..530a60edbb5 100644
--- a/configs/A13-OLinuXinoM_defconfig
+++ b/configs/A13-OLinuXinoM_defconfig
@@ -12,7 +12,6 @@ CONFIG_VIDEO_LCD_POWER="PB10"
CONFIG_VIDEO_LCD_BL_PWM="PB2"
CONFIG_DEFAULT_DEVICE_TREE="sun5i-a13-olinuxino-micro"
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
-CONFIG_SYS_EXTRA_OPTIONS="CONS_INDEX=2"
CONFIG_SPL=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
diff --git a/configs/A13-OLinuXino_defconfig b/configs/A13-OLinuXino_defconfig
index 705fe5d212a..15c6879c71c 100644
--- a/configs/A13-OLinuXino_defconfig
+++ b/configs/A13-OLinuXino_defconfig
@@ -14,7 +14,6 @@ CONFIG_VIDEO_LCD_POWER="AXP0-0"
CONFIG_VIDEO_LCD_BL_PWM="PB2"
CONFIG_DEFAULT_DEVICE_TREE="sun5i-a13-olinuxino"
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
-CONFIG_SYS_EXTRA_OPTIONS="CONS_INDEX=2"
CONFIG_SPL=y
CONFIG_SPL_I2C_SUPPORT=y
# CONFIG_CMD_IMLS is not set
diff --git a/configs/Ampe_A76_defconfig b/configs/Ampe_A76_defconfig
index 20272a6c356..f3f599d6b11 100644
--- a/configs/Ampe_A76_defconfig
+++ b/configs/Ampe_A76_defconfig
@@ -14,7 +14,6 @@ CONFIG_VIDEO_LCD_BL_EN="AXP0-1"
CONFIG_VIDEO_LCD_BL_PWM="PB2"
CONFIG_DEFAULT_DEVICE_TREE="sun5i-a13-ampe-a76"
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
-CONFIG_SYS_EXTRA_OPTIONS="CONS_INDEX=2"
CONFIG_SPL=y
CONFIG_SPL_I2C_SUPPORT=y
# CONFIG_CMD_IMLS is not set
diff --git a/configs/CHIP_defconfig b/configs/CHIP_defconfig
index 3f993844b1c..3e8bc1631d5 100644
--- a/configs/CHIP_defconfig
+++ b/configs/CHIP_defconfig
@@ -6,7 +6,6 @@ CONFIG_DRAM_TIMINGS_DDR3_800E_1066G_1333J=y
CONFIG_USB0_VBUS_PIN="PB10"
CONFIG_VIDEO_COMPOSITE=y
CONFIG_DEFAULT_DEVICE_TREE="sun5i-r8-chip"
-CONFIG_SYS_EXTRA_OPTIONS="CONS_INDEX=2"
CONFIG_SPL=y
CONFIG_SPL_I2C_SUPPORT=y
# CONFIG_CMD_IMLS is not set
diff --git a/configs/CHIP_pro_defconfig b/configs/CHIP_pro_defconfig
index df43e5a12d0..78fdb0e7d8e 100644
--- a/configs/CHIP_pro_defconfig
+++ b/configs/CHIP_pro_defconfig
@@ -7,7 +7,7 @@ CONFIG_MACH_SUN5I=y
CONFIG_DRAM_TIMINGS_DDR3_800E_1066G_1333J=y
CONFIG_USB0_VBUS_PIN="PB10"
CONFIG_DEFAULT_DEVICE_TREE="sun5i-gr8-chip-pro"
-CONFIG_SYS_EXTRA_OPTIONS="CONS_INDEX=2,SYS_NAND_BLOCK_SIZE=0x40000,SYS_NAND_PAGE_SIZE=4096,SYS_NAND_OOBSIZE=256"
+CONFIG_SYS_EXTRA_OPTIONS="SYS_NAND_BLOCK_SIZE=0x40000,SYS_NAND_PAGE_SIZE=4096,SYS_NAND_OOBSIZE=256"
CONFIG_ENV_IS_IN_UBI=y
CONFIG_ENV_UBI_PART="UBI"
CONFIG_ENV_UBI_VOLUME="uboot-env"
diff --git a/configs/Empire_electronix_d709_defconfig b/configs/Empire_electronix_d709_defconfig
index 6460814db33..032056bb38c 100644
--- a/configs/Empire_electronix_d709_defconfig
+++ b/configs/Empire_electronix_d709_defconfig
@@ -15,7 +15,6 @@ CONFIG_VIDEO_LCD_BL_EN="AXP0-1"
CONFIG_VIDEO_LCD_BL_PWM="PB2"
CONFIG_DEFAULT_DEVICE_TREE="sun5i-a13-empire-electronix-d709"
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
-CONFIG_SYS_EXTRA_OPTIONS="CONS_INDEX=2"
CONFIG_SPL=y
CONFIG_SPL_I2C_SUPPORT=y
# CONFIG_CMD_IMLS is not set
diff --git a/configs/Empire_electronix_m712_defconfig b/configs/Empire_electronix_m712_defconfig
index 48e26a5db14..8437da3b2da 100644
--- a/configs/Empire_electronix_m712_defconfig
+++ b/configs/Empire_electronix_m712_defconfig
@@ -14,7 +14,6 @@ CONFIG_VIDEO_LCD_BL_EN="AXP0-1"
CONFIG_VIDEO_LCD_BL_PWM="PB2"
CONFIG_DEFAULT_DEVICE_TREE="sun5i-a13-empire-electronix-m712"
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
-CONFIG_SYS_EXTRA_OPTIONS="CONS_INDEX=2"
CONFIG_SPL=y
CONFIG_SPL_I2C_SUPPORT=y
# CONFIG_CMD_IMLS is not set
diff --git a/configs/difrnce_dit4350_defconfig b/configs/difrnce_dit4350_defconfig
index ea07b38a68c..629507e741f 100644
--- a/configs/difrnce_dit4350_defconfig
+++ b/configs/difrnce_dit4350_defconfig
@@ -14,7 +14,6 @@ CONFIG_VIDEO_LCD_BL_EN="AXP0-1"
CONFIG_VIDEO_LCD_BL_PWM="PB2"
CONFIG_DEFAULT_DEVICE_TREE="sun5i-a13-difrnce-dit4350"
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
-CONFIG_SYS_EXTRA_OPTIONS="CONS_INDEX=2"
CONFIG_SPL=y
CONFIG_SPL_I2C_SUPPORT=y
# CONFIG_CMD_IMLS is not set
diff --git a/configs/ga10h_v1_1_defconfig b/configs/ga10h_v1_1_defconfig
index 358a13996a7..8e1c9f79a87 100644
--- a/configs/ga10h_v1_1_defconfig
+++ b/configs/ga10h_v1_1_defconfig
@@ -16,7 +16,6 @@ CONFIG_VIDEO_LCD_BL_PWM="PH0"
CONFIG_VIDEO_LCD_PANEL_LVDS=y
CONFIG_DEFAULT_DEVICE_TREE="sun8i-a33-ga10h-v1.1"
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
-CONFIG_SYS_EXTRA_OPTIONS="CONS_INDEX=5"
CONFIG_SPL=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
diff --git a/configs/gt90h_v4_defconfig b/configs/gt90h_v4_defconfig
index d7c2bb7b6ef..8f6469de613 100644
--- a/configs/gt90h_v4_defconfig
+++ b/configs/gt90h_v4_defconfig
@@ -15,7 +15,6 @@ CONFIG_VIDEO_LCD_BL_EN="PH6"
CONFIG_VIDEO_LCD_BL_PWM="PH0"
CONFIG_DEFAULT_DEVICE_TREE="sun8i-a23-gt90h-v4"
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
-CONFIG_SYS_EXTRA_OPTIONS="CONS_INDEX=5"
CONFIG_SPL=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
diff --git a/configs/iNet_D978_rev2_defconfig b/configs/iNet_D978_rev2_defconfig
index b2febab2dbd..62e4f1b3636 100644
--- a/configs/iNet_D978_rev2_defconfig
+++ b/configs/iNet_D978_rev2_defconfig
@@ -16,7 +16,6 @@ CONFIG_VIDEO_LCD_BL_PWM="PH0"
CONFIG_VIDEO_LCD_PANEL_LVDS=y
CONFIG_DEFAULT_DEVICE_TREE="sun8i-a33-inet-d978-rev2"
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
-CONFIG_SYS_EXTRA_OPTIONS="CONS_INDEX=5"
CONFIG_SPL=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
diff --git a/configs/inet86dz_defconfig b/configs/inet86dz_defconfig
index c7753b3a723..7940d971b76 100644
--- a/configs/inet86dz_defconfig
+++ b/configs/inet86dz_defconfig
@@ -15,7 +15,6 @@ CONFIG_VIDEO_LCD_BL_EN="PH6"
CONFIG_VIDEO_LCD_BL_PWM="PH0"
CONFIG_DEFAULT_DEVICE_TREE="sun8i-a23-inet86dz"
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
-CONFIG_SYS_EXTRA_OPTIONS="CONS_INDEX=5"
CONFIG_SPL=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
diff --git a/configs/inet98v_rev2_defconfig b/configs/inet98v_rev2_defconfig
index 329c858590a..2afe3be5126 100644
--- a/configs/inet98v_rev2_defconfig
+++ b/configs/inet98v_rev2_defconfig
@@ -14,7 +14,6 @@ CONFIG_VIDEO_LCD_BL_EN="AXP0-1"
CONFIG_VIDEO_LCD_BL_PWM="PB2"
CONFIG_DEFAULT_DEVICE_TREE="sun5i-a13-inet-98v-rev2"
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
-CONFIG_SYS_EXTRA_OPTIONS="CONS_INDEX=2"
CONFIG_SPL=y
CONFIG_SPL_I2C_SUPPORT=y
# CONFIG_CMD_IMLS is not set
diff --git a/configs/polaroid_mid2407pxe03_defconfig b/configs/polaroid_mid2407pxe03_defconfig
index 3beba97cdd5..d48a50701bb 100644
--- a/configs/polaroid_mid2407pxe03_defconfig
+++ b/configs/polaroid_mid2407pxe03_defconfig
@@ -15,7 +15,6 @@ CONFIG_VIDEO_LCD_BL_EN="PH6"
CONFIG_VIDEO_LCD_BL_PWM="PH0"
CONFIG_DEFAULT_DEVICE_TREE="sun8i-a23-polaroid-mid2407pxe03"
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
-CONFIG_SYS_EXTRA_OPTIONS="CONS_INDEX=5"
CONFIG_SPL=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
diff --git a/configs/polaroid_mid2809pxe04_defconfig b/configs/polaroid_mid2809pxe04_defconfig
index bbf2819252c..72fe096e632 100644
--- a/configs/polaroid_mid2809pxe04_defconfig
+++ b/configs/polaroid_mid2809pxe04_defconfig
@@ -15,7 +15,6 @@ CONFIG_VIDEO_LCD_BL_EN="PH6"
CONFIG_VIDEO_LCD_BL_PWM="PH0"
CONFIG_DEFAULT_DEVICE_TREE="sun8i-a23-polaroid-mid2809pxe04"
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
-CONFIG_SYS_EXTRA_OPTIONS="CONS_INDEX=5"
CONFIG_SPL=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
diff --git a/configs/q8_a13_tablet_defconfig b/configs/q8_a13_tablet_defconfig
index fad22f5ea7d..5115739b8d1 100644
--- a/configs/q8_a13_tablet_defconfig
+++ b/configs/q8_a13_tablet_defconfig
@@ -14,7 +14,6 @@ CONFIG_VIDEO_LCD_BL_EN="AXP0-1"
CONFIG_VIDEO_LCD_BL_PWM="PB2"
CONFIG_DEFAULT_DEVICE_TREE="sun5i-a13-q8-tablet"
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
-CONFIG_SYS_EXTRA_OPTIONS="CONS_INDEX=2"
CONFIG_SPL=y
CONFIG_SPL_I2C_SUPPORT=y
# CONFIG_CMD_IMLS is not set
diff --git a/configs/q8_a23_tablet_800x480_defconfig b/configs/q8_a23_tablet_800x480_defconfig
index 5ad67d7bee4..1762fe48d63 100644
--- a/configs/q8_a23_tablet_800x480_defconfig
+++ b/configs/q8_a23_tablet_800x480_defconfig
@@ -15,7 +15,6 @@ CONFIG_VIDEO_LCD_BL_EN="PH6"
CONFIG_VIDEO_LCD_BL_PWM="PH0"
CONFIG_DEFAULT_DEVICE_TREE="sun8i-a23-q8-tablet"
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
-CONFIG_SYS_EXTRA_OPTIONS="CONS_INDEX=5"
CONFIG_SPL=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
diff --git a/configs/q8_a33_tablet_1024x600_defconfig b/configs/q8_a33_tablet_1024x600_defconfig
index 0e3bc133ea7..d42b597db69 100644
--- a/configs/q8_a33_tablet_1024x600_defconfig
+++ b/configs/q8_a33_tablet_1024x600_defconfig
@@ -15,7 +15,6 @@ CONFIG_VIDEO_LCD_BL_EN="PH6"
CONFIG_VIDEO_LCD_BL_PWM="PH0"
CONFIG_DEFAULT_DEVICE_TREE="sun8i-a33-q8-tablet"
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
-CONFIG_SYS_EXTRA_OPTIONS="CONS_INDEX=5"
CONFIG_SPL=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
diff --git a/configs/q8_a33_tablet_800x480_defconfig b/configs/q8_a33_tablet_800x480_defconfig
index b5b7782a60e..5b6dfe0d870 100644
--- a/configs/q8_a33_tablet_800x480_defconfig
+++ b/configs/q8_a33_tablet_800x480_defconfig
@@ -15,7 +15,6 @@ CONFIG_VIDEO_LCD_BL_EN="PH6"
CONFIG_VIDEO_LCD_BL_PWM="PH0"
CONFIG_DEFAULT_DEVICE_TREE="sun8i-a33-q8-tablet"
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
-CONFIG_SYS_EXTRA_OPTIONS="CONS_INDEX=5"
CONFIG_SPL=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
diff --git a/configs/sun8i_a23_evb_defconfig b/configs/sun8i_a23_evb_defconfig
index 296df00043d..49ba4314520 100644
--- a/configs/sun8i_a23_evb_defconfig
+++ b/configs/sun8i_a23_evb_defconfig
@@ -8,7 +8,6 @@ CONFIG_USB0_VBUS_DET="axp_vbus_detect"
CONFIG_USB1_VBUS_PIN="PH7"
CONFIG_DEFAULT_DEVICE_TREE="sun8i-a23-evb"
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
-CONFIG_SYS_EXTRA_OPTIONS="CONS_INDEX=5"
CONFIG_SPL=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
diff --git a/drivers/serial/Kconfig b/drivers/serial/Kconfig
index c0ec2ec2e4d..a753367ee14 100644
--- a/drivers/serial/Kconfig
+++ b/drivers/serial/Kconfig
@@ -44,6 +44,17 @@ config SPL_SERIAL_PRESENT
This option enables the full UART in SPL, so if is it disabled,
the full UART driver will be omitted, thus saving space.
+config CONS_INDEX
+ int "UART used for console"
+ depends on ARCH_SUNXI
+ default 2 if MACH_SUN5I
+ default 5 if MACH_SUN8I
+ default 1
+ help
+ Configures the console index.
+ For Allwinner SoC., default values are 2 for SUN5I and 5 for SUN8I.
+ Otherwise, the index equals 1.
+
config DM_SERIAL
bool "Enable Driver Model for serial drivers"
depends on DM
diff --git a/include/configs/sunxi-common.h b/include/configs/sunxi-common.h
index 1d475b10ddf..b32d220befb 100644
--- a/include/configs/sunxi-common.h
+++ b/include/configs/sunxi-common.h
@@ -231,10 +231,6 @@ extern int soft_i2c_gpio_scl;
defined CONFIG_SY8106A_POWER
#endif
-#ifndef CONFIG_CONS_INDEX
-#define CONFIG_CONS_INDEX 1 /* UART0 */
-#endif
-
#ifdef CONFIG_REQUIRE_SERIAL_CONSOLE
#if CONFIG_CONS_INDEX == 1
#ifdef CONFIG_MACH_SUN9I
--
GitLab
From 301791c9b07425497d170abae6fdcc289340bc6e Mon Sep 17 00:00:00 2001
From: Chen-Yu Tsai <wens@csie.org>
Date: Thu, 2 Mar 2017 16:03:06 +0800
Subject: [PATCH 096/282] sunxi: Split up long Kconfig lines
Currently we have some lines in board/sunxi/Kconfig that are very long.
These line either provide default values for a set of SoCs, or limit
some option to a subset of sunxi SoCs.
Fortunately Kconfig makes it easy to split them. The Kconfig language
document states
If multiple dependencies are defined, they are connected with '&&'.
This means we can split existing dependencies at "&&" symbols. This
applies to both the "depends on" lines and "if" expressions.
This patch splits them up to one symbol per line. This will make it
easier to add, remove, or modify one item at a time.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
---
board/sunxi/Kconfig | 25 ++++++++++++++++++++-----
1 file changed, 20 insertions(+), 5 deletions(-)
diff --git a/board/sunxi/Kconfig b/board/sunxi/Kconfig
index 87f282a4933..67355589bf6 100644
--- a/board/sunxi/Kconfig
+++ b/board/sunxi/Kconfig
@@ -159,7 +159,10 @@ endchoice
# The sun8i SoCs share a lot, this helps to avoid a lot of "if A23 || A33"
config MACH_SUN8I
bool
- default y if MACH_SUN8I_A23 || MACH_SUN8I_A33 || MACH_SUNXI_H3_H5 || MACH_SUN8I_A83T
+ default y if MACH_SUN8I_A23
+ default y if MACH_SUN8I_A33
+ default y if MACH_SUN8I_A83T
+ default y if MACH_SUNXI_H3_H5
config RESERVE_ALLWINNER_BOOT0_HEADER
bool "reserve space for Allwinner boot0 header"
@@ -308,9 +311,13 @@ config DRAM_ODT_CORRECTION
endif
config SYS_CLK_FREQ
- default 816000000 if MACH_SUN50I
+ default 1008000000 if MACH_SUN4I
+ default 1008000000 if MACH_SUN5I
+ default 1008000000 if MACH_SUN6I
default 912000000 if MACH_SUN7I
- default 1008000000 if MACH_SUN4I || MACH_SUN5I || MACH_SUN6I || MACH_SUN8I || MACH_SUN9I
+ default 1008000000 if MACH_SUN8I
+ default 1008000000 if MACH_SUN9I
+ default 816000000 if MACH_SUN50I
config SYS_CONFIG_NAME
default "sun4i" if MACH_SUN4I
@@ -519,7 +526,10 @@ config AXP_GPIO
config VIDEO
bool "Enable graphical uboot console on HDMI, LCD or VGA"
- depends on !MACH_SUN8I_A83T && !MACH_SUNXI_H3_H5 && !MACH_SUN9I && !MACH_SUN50I
+ depends on !MACH_SUN8I_A83T
+ depends on !MACH_SUNXI_H3_H5
+ depends on !MACH_SUN9I
+ depends on !MACH_SUN50I
default y
---help---
Say Y here to add support for using a cfb console on the HDMI, LCD
@@ -728,7 +738,12 @@ config GMAC_TX_DELAY
Set the GMAC Transmit Clock Delay Chain value.
config SPL_STACK_R_ADDR
- default 0x4fe00000 if MACH_SUN4I || MACH_SUN5I || MACH_SUN6I || MACH_SUN7I || MACH_SUN8I || MACH_SUN50I
+ default 0x4fe00000 if MACH_SUN4I
+ default 0x4fe00000 if MACH_SUN5I
+ default 0x4fe00000 if MACH_SUN6I
+ default 0x4fe00000 if MACH_SUN7I
+ default 0x4fe00000 if MACH_SUN8I
default 0x2fe00000 if MACH_SUN9I
+ default 0x4fe00000 if MACH_SUN50I
endif
--
GitLab
From 379febac5a3ea9f1952c2234a9acfd1b16f9100f Mon Sep 17 00:00:00 2001
From: Chen-Yu Tsai <wens@csie.org>
Date: Wed, 30 Nov 2016 14:57:32 +0800
Subject: [PATCH 097/282] sunxi: Add initial support for R40
The R40 is the successor to the A20. It is a hybrid of the A20, A33
and the H3.
The R40's PIO controller is compatible with the A20,
Reuse the A20 UART and I2C muxing code by adding the R40's macro.
The display pipeline is the newer DE 2.0 variant.
Block enabling video on R40 for now.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
---
arch/arm/mach-sunxi/board.c | 10 +++++++---
arch/arm/mach-sunxi/cpu_info.c | 2 ++
board/sunxi/Kconfig | 7 +++++++
board/sunxi/board.c | 19 ++++++++++++++-----
4 files changed, 30 insertions(+), 8 deletions(-)
diff --git a/arch/arm/mach-sunxi/board.c b/arch/arm/mach-sunxi/board.c
index 5e03d039433..5a74c9717d8 100644
--- a/arch/arm/mach-sunxi/board.c
+++ b/arch/arm/mach-sunxi/board.c
@@ -69,12 +69,14 @@ struct mm_region *mem_map = sunxi_mem_map;
static int gpio_init(void)
{
#if CONFIG_CONS_INDEX == 1 && defined(CONFIG_UART0_PORT_F)
-#if defined(CONFIG_MACH_SUN4I) || defined(CONFIG_MACH_SUN7I)
+#if defined(CONFIG_MACH_SUN4I) || \
+ defined(CONFIG_MACH_SUN7I) || \
+ defined(CONFIG_MACH_SUN8I_R40)
/* disable GPB22,23 as uart0 tx,rx to avoid conflict */
sunxi_gpio_set_cfgpin(SUNXI_GPB(22), SUNXI_GPIO_INPUT);
sunxi_gpio_set_cfgpin(SUNXI_GPB(23), SUNXI_GPIO_INPUT);
#endif
-#if defined(CONFIG_MACH_SUN8I)
+#if defined(CONFIG_MACH_SUN8I) && !defined(CONFIG_MACH_SUN8I_R40)
sunxi_gpio_set_cfgpin(SUNXI_GPF(2), SUN8I_GPF_UART0);
sunxi_gpio_set_cfgpin(SUNXI_GPF(4), SUN8I_GPF_UART0);
#else
@@ -82,7 +84,9 @@ static int gpio_init(void)
sunxi_gpio_set_cfgpin(SUNXI_GPF(4), SUNXI_GPF_UART0);
#endif
sunxi_gpio_set_pull(SUNXI_GPF(4), 1);
-#elif CONFIG_CONS_INDEX == 1 && (defined(CONFIG_MACH_SUN4I) || defined(CONFIG_MACH_SUN7I))
+#elif CONFIG_CONS_INDEX == 1 && (defined(CONFIG_MACH_SUN4I) || \
+ defined(CONFIG_MACH_SUN7I) || \
+ defined(CONFIG_MACH_SUN8I_R40))
sunxi_gpio_set_cfgpin(SUNXI_GPB(22), SUN4I_GPB_UART0);
sunxi_gpio_set_cfgpin(SUNXI_GPB(23), SUN4I_GPB_UART0);
sunxi_gpio_set_pull(SUNXI_GPB(23), SUNXI_GPIO_PULL_UP);
diff --git a/arch/arm/mach-sunxi/cpu_info.c b/arch/arm/mach-sunxi/cpu_info.c
index 85633ccec21..7851de299ab 100644
--- a/arch/arm/mach-sunxi/cpu_info.c
+++ b/arch/arm/mach-sunxi/cpu_info.c
@@ -87,6 +87,8 @@ int print_cpuinfo(void)
printf("CPU: Allwinner A83T (SUN8I %04x)\n", sunxi_get_sram_id());
#elif defined CONFIG_MACH_SUN8I_H3
printf("CPU: Allwinner H3 (SUN8I %04x)\n", sunxi_get_sram_id());
+#elif defined CONFIG_MACH_SUN8I_R40
+ printf("CPU: Allwinner R40 (SUN8I %04x)\n", sunxi_get_sram_id());
#elif defined CONFIG_MACH_SUN9I
puts("CPU: Allwinner A80 (SUN9I)\n");
#elif defined CONFIG_MACH_SUN50I
diff --git a/board/sunxi/Kconfig b/board/sunxi/Kconfig
index 67355589bf6..3df70773132 100644
--- a/board/sunxi/Kconfig
+++ b/board/sunxi/Kconfig
@@ -134,6 +134,11 @@ config MACH_SUN8I_H3
select MACH_SUNXI_H3_H5
select ARMV7_BOOT_SEC_DEFAULT if OLD_SUNXI_KERNEL_COMPAT
+config MACH_SUN8I_R40
+ bool "sun8i (Allwinner R40)"
+ select CPU_V7
+ select SUNXI_GEN_SUN6I
+
config MACH_SUN9I
bool "sun9i (Allwinner A80)"
select CPU_V7
@@ -163,6 +168,7 @@ config MACH_SUN8I
default y if MACH_SUN8I_A33
default y if MACH_SUN8I_A83T
default y if MACH_SUNXI_H3_H5
+ default y if MACH_SUN8I_R40
config RESERVE_ALLWINNER_BOOT0_HEADER
bool "reserve space for Allwinner boot0 header"
@@ -528,6 +534,7 @@ config VIDEO
bool "Enable graphical uboot console on HDMI, LCD or VGA"
depends on !MACH_SUN8I_A83T
depends on !MACH_SUNXI_H3_H5
+ depends on !MACH_SUN8I_R40
depends on !MACH_SUN9I
depends on !MACH_SUN50I
default y
diff --git a/board/sunxi/board.c b/board/sunxi/board.c
index e2bba9abdee..4c211802296 100644
--- a/board/sunxi/board.c
+++ b/board/sunxi/board.c
@@ -396,7 +396,10 @@ int board_mmc_init(bd_t *bis)
void i2c_init_board(void)
{
#ifdef CONFIG_I2C0_ENABLE
-#if defined(CONFIG_MACH_SUN4I) || defined(CONFIG_MACH_SUN5I) || defined(CONFIG_MACH_SUN7I)
+#if defined(CONFIG_MACH_SUN4I) || \
+ defined(CONFIG_MACH_SUN5I) || \
+ defined(CONFIG_MACH_SUN7I) || \
+ defined(CONFIG_MACH_SUN8I_R40)
sunxi_gpio_set_cfgpin(SUNXI_GPB(0), SUN4I_GPB_TWI0);
sunxi_gpio_set_cfgpin(SUNXI_GPB(1), SUN4I_GPB_TWI0);
clock_twi_onoff(0, 1);
@@ -412,7 +415,9 @@ void i2c_init_board(void)
#endif
#ifdef CONFIG_I2C1_ENABLE
-#if defined(CONFIG_MACH_SUN4I) || defined(CONFIG_MACH_SUN7I)
+#if defined(CONFIG_MACH_SUN4I) || \
+ defined(CONFIG_MACH_SUN7I) || \
+ defined(CONFIG_MACH_SUN8I_R40)
sunxi_gpio_set_cfgpin(SUNXI_GPB(18), SUN4I_GPB_TWI1);
sunxi_gpio_set_cfgpin(SUNXI_GPB(19), SUN4I_GPB_TWI1);
clock_twi_onoff(1, 1);
@@ -432,7 +437,9 @@ void i2c_init_board(void)
#endif
#ifdef CONFIG_I2C2_ENABLE
-#if defined(CONFIG_MACH_SUN4I) || defined(CONFIG_MACH_SUN7I)
+#if defined(CONFIG_MACH_SUN4I) || \
+ defined(CONFIG_MACH_SUN7I) || \
+ defined(CONFIG_MACH_SUN8I_R40)
sunxi_gpio_set_cfgpin(SUNXI_GPB(20), SUN4I_GPB_TWI2);
sunxi_gpio_set_cfgpin(SUNXI_GPB(21), SUN4I_GPB_TWI2);
clock_twi_onoff(2, 1);
@@ -456,7 +463,8 @@ void i2c_init_board(void)
sunxi_gpio_set_cfgpin(SUNXI_GPG(10), SUN6I_GPG_TWI3);
sunxi_gpio_set_cfgpin(SUNXI_GPG(11), SUN6I_GPG_TWI3);
clock_twi_onoff(3, 1);
-#elif defined(CONFIG_MACH_SUN7I)
+#elif defined(CONFIG_MACH_SUN7I) || \
+ defined(CONFIG_MACH_SUN8I_R40)
sunxi_gpio_set_cfgpin(SUNXI_GPI(0), SUN7I_GPI_TWI3);
sunxi_gpio_set_cfgpin(SUNXI_GPI(1), SUN7I_GPI_TWI3);
clock_twi_onoff(3, 1);
@@ -464,7 +472,8 @@ void i2c_init_board(void)
#endif
#ifdef CONFIG_I2C4_ENABLE
-#if defined(CONFIG_MACH_SUN7I)
+#if defined(CONFIG_MACH_SUN7I) || \
+ defined(CONFIG_MACH_SUN8I_R40)
sunxi_gpio_set_cfgpin(SUNXI_GPI(2), SUN7I_GPI_TWI4);
sunxi_gpio_set_cfgpin(SUNXI_GPI(3), SUN7I_GPI_TWI4);
clock_twi_onoff(4, 1);
--
GitLab
From 409677ec1706c1374f9ce5e1833ae425dd0a9602 Mon Sep 17 00:00:00 2001
From: Chen-Yu Tsai <wens@csie.org>
Date: Wed, 30 Nov 2016 15:30:30 +0800
Subject: [PATCH 098/282] sunxi: Enable AXP221s in I2C mode with the R40 SoC
The R40 SoC uses the AXP221s in I2C mode to supply power.
Some regulator's common usages have changed, and also the recommended
voltage for existing usages have changed. Update the defaults to match.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
---
arch/arm/mach-sunxi/pmic_bus.c | 7 +++++++
board/sunxi/Kconfig | 2 +-
drivers/power/Kconfig | 16 ++++++++++------
3 files changed, 18 insertions(+), 7 deletions(-)
diff --git a/arch/arm/mach-sunxi/pmic_bus.c b/arch/arm/mach-sunxi/pmic_bus.c
index 7c57f02792b..f917c3e070a 100644
--- a/arch/arm/mach-sunxi/pmic_bus.c
+++ b/arch/arm/mach-sunxi/pmic_bus.c
@@ -41,6 +41,9 @@ int pmic_bus_init(void)
p2wi_init();
ret = p2wi_change_to_p2wi_mode(AXP221_CHIP_ADDR, AXP221_CTRL_ADDR,
AXP221_INIT_DATA);
+# elif defined CONFIG_MACH_SUN8I_R40
+ /* Nothing. R40 uses the AXP221s in I2C mode */
+ ret = 0;
# else
ret = rsb_init();
if (ret)
@@ -65,6 +68,8 @@ int pmic_bus_read(u8 reg, u8 *data)
#elif defined CONFIG_AXP221_POWER || defined CONFIG_AXP809_POWER || defined CONFIG_AXP818_POWER
# ifdef CONFIG_MACH_SUN6I
return p2wi_read(reg, data);
+# elif defined CONFIG_MACH_SUN8I_R40
+ return i2c_read(AXP209_I2C_ADDR, reg, 1, data, 1);
# else
return rsb_read(AXP223_RUNTIME_ADDR, reg, data);
# endif
@@ -80,6 +85,8 @@ int pmic_bus_write(u8 reg, u8 data)
#elif defined CONFIG_AXP221_POWER || defined CONFIG_AXP809_POWER || defined CONFIG_AXP818_POWER
# ifdef CONFIG_MACH_SUN6I
return p2wi_write(reg, data);
+# elif defined CONFIG_MACH_SUN8I_R40
+ return i2c_write(AXP209_I2C_ADDR, reg, 1, &data, 1);
# else
return rsb_write(AXP223_RUNTIME_ADDR, reg, data);
# endif
diff --git a/board/sunxi/Kconfig b/board/sunxi/Kconfig
index 3df70773132..f40b8ff57d2 100644
--- a/board/sunxi/Kconfig
+++ b/board/sunxi/Kconfig
@@ -473,7 +473,7 @@ config USB3_VBUS_PIN
config I2C0_ENABLE
bool "Enable I2C/TWI controller 0"
- default y if MACH_SUN4I || MACH_SUN5I || MACH_SUN7I
+ default y if MACH_SUN4I || MACH_SUN5I || MACH_SUN7I || MACH_SUN8I_R40
default n if MACH_SUN6I || MACH_SUN8I
select CMD_I2C
---help---
diff --git a/drivers/power/Kconfig b/drivers/power/Kconfig
index 64e5bc2f74b..911ecb1144a 100644
--- a/drivers/power/Kconfig
+++ b/drivers/power/Kconfig
@@ -10,7 +10,7 @@ choice
prompt "Select Sunxi PMIC Variant"
depends on ARCH_SUNXI
default AXP209_POWER if MACH_SUN4I || MACH_SUN5I || MACH_SUN7I
- default AXP221_POWER if MACH_SUN6I || MACH_SUN8I_A23 || MACH_SUN8I_A33
+ default AXP221_POWER if MACH_SUN6I || MACH_SUN8I_A23 || MACH_SUN8I_A33 || MACH_SUN8I_R40
default AXP818_POWER if MACH_SUN8I_A83T
default SUNXI_NO_PMIC if MACH_SUNXI_H3_H5 || MACH_SUN50I
@@ -37,7 +37,7 @@ config AXP209_POWER
config AXP221_POWER
bool "axp221 / axp223 pmic support"
- depends on MACH_SUN6I || MACH_SUN8I_A23 || MACH_SUN8I_A33
+ depends on MACH_SUN6I || MACH_SUN8I_A23 || MACH_SUN8I_A33 || MACH_SUN8I_R40
select CMD_POWEROFF
---help---
Select this to enable support for the axp221/axp223 pmic found on most
@@ -70,7 +70,7 @@ endchoice
config AXP_DCDC1_VOLT
int "axp pmic dcdc1 voltage"
depends on AXP221_POWER || AXP809_POWER || AXP818_POWER
- default 3300 if AXP818_POWER
+ default 3300 if AXP818_POWER || MACH_SUN8I_R40
default 3000 if MACH_SUN6I || MACH_SUN8I || MACH_SUN9I
---help---
Set the voltage (mV) to program the axp pmic dcdc1 at, set to 0 to
@@ -97,6 +97,7 @@ config AXP_DCDC2_VOLT
On A23/A33 boards dcdc2 is used for VDD-SYS and should be 1.1V.
On A80 boards dcdc2 powers the GPU and can be left off.
On A83T boards dcdc2 is used for VDD-CPUA(cluster 0) and should be 0.9V.
+ On R40 boards dcdc2 is VDD-CPU and should be 1.1V
config AXP_DCDC3_VOLT
int "axp pmic dcdc3 voltage"
@@ -104,6 +105,7 @@ config AXP_DCDC3_VOLT
default 900 if AXP809_POWER || AXP818_POWER
default 1500 if AXP152_POWER
default 1250 if AXP209_POWER
+ default 1100 if MACH_SUN8I_R40
default 1200 if MACH_SUN6I || MACH_SUN8I
---help---
Set the voltage (mV) to program the axp pmic dcdc3 at, set to 0 to
@@ -114,6 +116,7 @@ config AXP_DCDC3_VOLT
On A23 / A31 / A33 boards dcdc3 is VDD-CPU and should be 1.2V.
On A80 boards dcdc3 is used for VDD-CPUA(cluster 0) and should be 0.9V.
On A83T boards dcdc3 is used for VDD-CPUB(cluster 1) and should be 0.9V.
+ On R40 boards dcdc3 is VDD-SYS and VDD-GPU and should be 1.1V.
config AXP_DCDC4_VOLT
int "axp pmic dcdc4 voltage"
@@ -138,13 +141,13 @@ config AXP_DCDC5_VOLT
---help---
Set the voltage (mV) to program the axp pmic dcdc5 at, set to 0 to
disable dcdc5.
- On A23 / A31 / A33 / A80 / A83T boards dcdc5 is VCC-DRAM and
+ On A23 / A31 / A33 / A80 / A83T / R40 boards dcdc5 is VCC-DRAM and
should be 1.5V, 1.35V if DDR3L is used.
config AXP_ALDO1_VOLT
int "axp pmic (a)ldo1 voltage"
depends on AXP221_POWER || AXP809_POWER || AXP818_POWER
- default 0 if MACH_SUN6I
+ default 0 if MACH_SUN6I || MACH_SUN8I_R40
default 1800 if MACH_SUN8I_A83T
default 3000 if MACH_SUN8I || MACH_SUN9I
---help---
@@ -183,7 +186,8 @@ config AXP_ALDO3_VOLT
Set the voltage (mV) to program the axp pmic aldo3 at, set to 0 to
disable aldo3.
On A10(s) / A13 / A20 boards aldo3 should be 2.8V.
- On A23 / A31 / A33 boards aldo3 is VCC-PLL and AVCC and should be 3.0V.
+ On A23 / A31 / A33 / R40 boards aldo3 is VCC-PLL and AVCC and should
+ be 3.0V.
On A80 boards aldo3 is normally not used.
On A83T / H8 boards aldo3 is AVCC, VCC-PL, and VCC-LED, and should be
3.0V.
--
GitLab
From 6c7ae2bfc9f052b89c4a874842a6f44cc2e1f0a9 Mon Sep 17 00:00:00 2001
From: Chen-Yu Tsai <wens@csie.org>
Date: Wed, 30 Nov 2016 16:27:14 +0800
Subject: [PATCH 099/282] sunxi: Fix watchdog reset function for R40
The watchdog found on the R40 SoC is the older variant found on the A20.
Add the proper "#if defines" to make it work.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
---
arch/arm/include/asm/arch-sunxi/timer.h | 5 ++---
arch/arm/include/asm/arch-sunxi/watchdog.h | 5 ++++-
arch/arm/mach-sunxi/board.c | 5 ++---
3 files changed, 8 insertions(+), 7 deletions(-)
diff --git a/arch/arm/include/asm/arch-sunxi/timer.h b/arch/arm/include/asm/arch-sunxi/timer.h
index a665309803c..ccdf942534a 100644
--- a/arch/arm/include/asm/arch-sunxi/timer.h
+++ b/arch/arm/include/asm/arch-sunxi/timer.h
@@ -67,7 +67,7 @@ struct sunxi_timer_reg {
struct sunxi_timer timer[6]; /* We have 6 timers */
u8 res2[16];
struct sunxi_avs avs;
-#ifdef CONFIG_SUNXI_GEN_SUN4I
+#if defined(CONFIG_SUNXI_GEN_SUN4I) || defined(CONFIG_MACH_SUN8I_R40)
struct sunxi_wdog wdog; /* 0x90 */
/* XXX the following is not accurate for sun5i/sun7i */
struct sunxi_64cnt cnt64; /* 0xa0 */
@@ -77,8 +77,7 @@ struct sunxi_timer_reg {
struct sunxi_tgp tgp[4];
u8 res5[8];
u32 cpu_cfg;
-#endif
-#ifdef CONFIG_SUNXI_GEN_SUN6I
+#elif defined(CONFIG_SUNXI_GEN_SUN6I)
u8 res3[16];
struct sunxi_wdog wdog[5]; /* We have 5 watchdogs */
#endif
diff --git a/arch/arm/include/asm/arch-sunxi/watchdog.h b/arch/arm/include/asm/arch-sunxi/watchdog.h
index 8108be97bab..ce6d6648560 100644
--- a/arch/arm/include/asm/arch-sunxi/watchdog.h
+++ b/arch/arm/include/asm/arch-sunxi/watchdog.h
@@ -13,7 +13,10 @@
#define WDT_CTRL_RESTART (0x1 << 0)
#define WDT_CTRL_KEY (0x0a57 << 1)
-#if defined(CONFIG_MACH_SUN4I) || defined(CONFIG_MACH_SUN5I) || defined(CONFIG_MACH_SUN7I)
+#if defined(CONFIG_MACH_SUN4I) || \
+ defined(CONFIG_MACH_SUN5I) || \
+ defined(CONFIG_MACH_SUN7I) || \
+ defined(CONFIG_MACH_SUN8I_R40)
#define WDT_MODE_EN (0x1 << 0)
#define WDT_MODE_RESET_EN (0x1 << 1)
diff --git a/arch/arm/mach-sunxi/board.c b/arch/arm/mach-sunxi/board.c
index 5a74c9717d8..6ce07dfe0fd 100644
--- a/arch/arm/mach-sunxi/board.c
+++ b/arch/arm/mach-sunxi/board.c
@@ -270,7 +270,7 @@ void board_init_f(ulong dummy)
void reset_cpu(ulong addr)
{
-#ifdef CONFIG_SUNXI_GEN_SUN4I
+#if defined(CONFIG_SUNXI_GEN_SUN4I) || defined(CONFIG_MACH_SUN8I_R40)
static const struct sunxi_wdog *wdog =
&((struct sunxi_timer_reg *)SUNXI_TIMER_BASE)->wdog;
@@ -282,8 +282,7 @@ void reset_cpu(ulong addr)
/* sun5i sometimes gets stuck without this */
writel(WDT_MODE_RESET_EN | WDT_MODE_EN, &wdog->mode);
}
-#endif
-#ifdef CONFIG_SUNXI_GEN_SUN6I
+#elif defined(CONFIG_SUNXI_GEN_SUN6I)
static const struct sunxi_wdog *wdog =
((struct sunxi_timer_reg *)SUNXI_TIMER_BASE)->wdog;
--
GitLab
From 8094a4a20b05827d6fa91786705b3f6917f7421c Mon Sep 17 00:00:00 2001
From: Chen-Yu Tsai <wens@csie.org>
Date: Wed, 30 Nov 2016 16:28:34 +0800
Subject: [PATCH 100/282] sunxi: Add mmc[1-3] pinmux settings for R40
The PIO is generally compatible with the A20, except that it routes the
full 8 bits and eMMC reset pins for mmc2.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
---
board/sunxi/board.c | 17 +++++++++++++++--
1 file changed, 15 insertions(+), 2 deletions(-)
diff --git a/board/sunxi/board.c b/board/sunxi/board.c
index 4c211802296..04a629125e0 100644
--- a/board/sunxi/board.c
+++ b/board/sunxi/board.c
@@ -201,7 +201,8 @@ static void mmc_pinmux_setup(int sdc)
case 1:
pins = sunxi_name_to_gpio_bank(CONFIG_MMC1_PINS);
-#if defined(CONFIG_MACH_SUN4I) || defined(CONFIG_MACH_SUN7I)
+#if defined(CONFIG_MACH_SUN4I) || defined(CONFIG_MACH_SUN7I) || \
+ defined(CONFIG_MACH_SUN8I_R40)
if (pins == SUNXI_GPIO_H) {
/* SDC1: PH22-PH-27 */
for (pin = SUNXI_GPH(22); pin <= SUNXI_GPH(27); pin++) {
@@ -296,6 +297,17 @@ static void mmc_pinmux_setup(int sdc)
sunxi_gpio_set_pull(SUNXI_GPC(24), SUNXI_GPIO_PULL_UP);
sunxi_gpio_set_drv(SUNXI_GPC(24), 2);
}
+#elif defined(CONFIG_MACH_SUN8I_R40)
+ /* SDC2: PC6-PC15, PC24 */
+ for (pin = SUNXI_GPC(6); pin <= SUNXI_GPC(15); pin++) {
+ sunxi_gpio_set_cfgpin(pin, SUNXI_GPC_SDC2);
+ sunxi_gpio_set_pull(pin, SUNXI_GPIO_PULL_UP);
+ sunxi_gpio_set_drv(pin, 2);
+ }
+
+ sunxi_gpio_set_cfgpin(SUNXI_GPC(24), SUNXI_GPC_SDC2);
+ sunxi_gpio_set_pull(SUNXI_GPC(24), SUNXI_GPIO_PULL_UP);
+ sunxi_gpio_set_drv(SUNXI_GPC(24), 2);
#elif defined(CONFIG_MACH_SUN8I) || defined(CONFIG_MACH_SUN50I)
/* SDC2: PC5-PC6, PC8-PC16 */
for (pin = SUNXI_GPC(5); pin <= SUNXI_GPC(6); pin++) {
@@ -322,7 +334,8 @@ static void mmc_pinmux_setup(int sdc)
case 3:
pins = sunxi_name_to_gpio_bank(CONFIG_MMC3_PINS);
-#if defined(CONFIG_MACH_SUN4I) || defined(CONFIG_MACH_SUN7I)
+#if defined(CONFIG_MACH_SUN4I) || defined(CONFIG_MACH_SUN7I) || \
+ defined(CONFIG_MACH_SUN8I_R40)
/* SDC3: PI4-PI9 */
for (pin = SUNXI_GPI(4); pin <= SUNXI_GPI(9); pin++) {
sunxi_gpio_set_cfgpin(pin, SUNXI_GPI_SDC3);
--
GitLab
From 328ce7fd505288949d83b72562586a139e025549 Mon Sep 17 00:00:00 2001
From: Chen-Yu Tsai <wens@csie.org>
Date: Wed, 30 Nov 2016 16:54:34 +0800
Subject: [PATCH 101/282] sunxi: Set PLL lock enable bits for R40
According to the BSP released by Banana Pi, the R40 (sun8iw11p1) has
an extra "PLL lock control" register in the CCU, which controls whether
the individual PLL lock status bits in each PLL's control register work
or not.
This patch enables it for all the PLLs.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
---
arch/arm/include/asm/arch-sunxi/clock_sun6i.h | 2 ++
arch/arm/mach-sunxi/clock_sun6i.c | 5 +++++
2 files changed, 7 insertions(+)
diff --git a/arch/arm/include/asm/arch-sunxi/clock_sun6i.h b/arch/arm/include/asm/arch-sunxi/clock_sun6i.h
index 1bfb48bd52d..1aefd5a64c1 100644
--- a/arch/arm/include/asm/arch-sunxi/clock_sun6i.h
+++ b/arch/arm/include/asm/arch-sunxi/clock_sun6i.h
@@ -142,6 +142,8 @@ struct sunxi_ccm_reg {
u32 apb2_reset_cfg; /* 0x2d8 APB2 Reset config */
u32 reserved25[5];
u32 ccu_sec_switch; /* 0x2f0 CCU Security Switch, H3 only */
+ u32 reserved26[11];
+ u32 pll_lock_ctrl; /* 0x320 PLL lock control, R40 only */
};
/* apb2 bit field */
diff --git a/arch/arm/mach-sunxi/clock_sun6i.c b/arch/arm/mach-sunxi/clock_sun6i.c
index 4762fbf0c3f..3c8c53fcf76 100644
--- a/arch/arm/mach-sunxi/clock_sun6i.c
+++ b/arch/arm/mach-sunxi/clock_sun6i.c
@@ -35,6 +35,11 @@ void clock_init_safe(void)
clrbits_le32(&prcm->pll_ctrl1, PRCM_PLL_CTRL_LDO_KEY_MASK);
#endif
+#ifdef CONFIG_MACH_SUN8I_R40
+ /* Set PLL lock enable bits and switch to old lock mode */
+ writel(GENMASK(12, 0), &ccm->pll_lock_ctrl);
+#endif
+
clock_set_pll1(408000000);
writel(PLL6_CFG_DEFAULT, &ccm->pll6_cfg);
--
GitLab
From fab03e30e67b18e54e4118b59a245a8a3e26d04c Mon Sep 17 00:00:00 2001
From: Chen-Yu Tsai <wens@csie.org>
Date: Wed, 30 Nov 2016 16:58:35 +0800
Subject: [PATCH 102/282] sunxi: Provide defaults for R40 DRAM settings
These values were taken from the Banana Pi M2 Ultra fex file
found in the released vendor BSP. This is the only publicly
available R40 device at the time of this writing.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
---
board/sunxi/Kconfig | 3 +++
1 file changed, 3 insertions(+)
diff --git a/board/sunxi/Kconfig b/board/sunxi/Kconfig
index f40b8ff57d2..92f9d32ce9b 100644
--- a/board/sunxi/Kconfig
+++ b/board/sunxi/Kconfig
@@ -203,6 +203,7 @@ config DRAM_TYPE
config DRAM_CLK
int "sunxi dram clock speed"
default 792 if MACH_SUN9I
+ default 648 if MACH_SUN8I_R40
default 312 if MACH_SUN6I || MACH_SUN8I
default 360 if MACH_SUN4I || MACH_SUN5I || MACH_SUN7I
default 672 if MACH_SUN50I
@@ -224,6 +225,7 @@ config DRAM_ZQ
int "sunxi dram zq value"
default 123 if MACH_SUN4I || MACH_SUN5I || MACH_SUN6I || MACH_SUN8I
default 127 if MACH_SUN7I
+ default 3881979 if MACH_SUN8I_R40
default 4145117 if MACH_SUN9I
default 3881915 if MACH_SUN50I
---help---
@@ -233,6 +235,7 @@ config DRAM_ODT_EN
bool "sunxi dram odt enable"
default n if !MACH_SUN8I_A23
default y if MACH_SUN8I_A23
+ default y if MACH_SUN8I_R40
default y if MACH_SUN50I
---help---
Select this to enable dram odt (on die termination).
--
GitLab
From 33559ffe5bc0ea10ae9956a0ac3fbd1cc30d23b8 Mon Sep 17 00:00:00 2001
From: Chen-Yu Tsai <wens@csie.org>
Date: Wed, 30 Nov 2016 17:23:52 +0800
Subject: [PATCH 103/282] gpio: sunxi: Add compatible string for R40 PIO
The PIO on the R40 SoC is mostly compatible with the A20.
Only a few pin functions for mmc2 were added to the PC
pingroup, to support 8 bit eMMCs.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
---
drivers/gpio/sunxi_gpio.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/gpio/sunxi_gpio.c b/drivers/gpio/sunxi_gpio.c
index 8d2bb18504a..3f40e838300 100644
--- a/drivers/gpio/sunxi_gpio.c
+++ b/drivers/gpio/sunxi_gpio.c
@@ -352,6 +352,7 @@ static const struct udevice_id sunxi_gpio_ids[] = {
ID("allwinner,sun8i-a33-pinctrl", a_all),
ID("allwinner,sun8i-a83t-pinctrl", a_all),
ID("allwinner,sun8i-h3-pinctrl", a_all),
+ ID("allwinner,sun8i-r40-pinctrl", a_all),
ID("allwinner,sun9i-a80-pinctrl", a_all),
ID("allwinner,sun6i-a31-r-pinctrl", l_2),
ID("allwinner,sun8i-a23-r-pinctrl", l_1),
--
GitLab
From 8201188cf9e4fb8ce5277e4d59a458be536db927 Mon Sep 17 00:00:00 2001
From: Chen-Yu Tsai <wens@csie.org>
Date: Thu, 1 Dec 2016 19:09:57 +0800
Subject: [PATCH 104/282] sunxi: Use H3/A64 DRAM initialization code for R40
The R40 seems to have a variant of the memory controller found in
the H3 and A64 SoCs. Adapt the code for use on the R40. The changes
are based on released DRAM code and comparing register dumps from
boot0.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
---
arch/arm/include/asm/arch-sunxi/cpu.h | 1 +
arch/arm/include/asm/arch-sunxi/dram.h | 4 +-
.../include/asm/arch-sunxi/dram_sun8i_h3.h | 20 ++-
arch/arm/mach-sunxi/Makefile | 1 +
arch/arm/mach-sunxi/clock_sun6i.c | 4 +-
arch/arm/mach-sunxi/dram_sun8i_h3.c | 121 ++++++++++++++++--
6 files changed, 133 insertions(+), 18 deletions(-)
diff --git a/arch/arm/include/asm/arch-sunxi/cpu.h b/arch/arm/include/asm/arch-sunxi/cpu.h
index e8e670e7e90..caec8652641 100644
--- a/arch/arm/include/asm/arch-sunxi/cpu.h
+++ b/arch/arm/include/asm/arch-sunxi/cpu.h
@@ -16,5 +16,6 @@
#define SOCID_A64 0x1689
#define SOCID_H3 0x1680
#define SOCID_H5 0x1718
+#define SOCID_R40 0x1701
#endif /* _SUNXI_CPU_H */
diff --git a/arch/arm/include/asm/arch-sunxi/dram.h b/arch/arm/include/asm/arch-sunxi/dram.h
index 1dc82205b7d..f452f889f92 100644
--- a/arch/arm/include/asm/arch-sunxi/dram.h
+++ b/arch/arm/include/asm/arch-sunxi/dram.h
@@ -24,7 +24,9 @@
#include <asm/arch/dram_sun8i_a33.h>
#elif defined(CONFIG_MACH_SUN8I_A83T)
#include <asm/arch/dram_sun8i_a83t.h>
-#elif defined(CONFIG_MACH_SUNXI_H3_H5) || defined(CONFIG_MACH_SUN50I)
+#elif defined(CONFIG_MACH_SUNXI_H3_H5) || \
+ defined(CONFIG_MACH_SUN8I_R40) || \
+ defined(CONFIG_MACH_SUN50I)
#include <asm/arch/dram_sun8i_h3.h>
#elif defined(CONFIG_MACH_SUN9I)
#include <asm/arch/dram_sun9i.h>
diff --git a/arch/arm/include/asm/arch-sunxi/dram_sun8i_h3.h b/arch/arm/include/asm/arch-sunxi/dram_sun8i_h3.h
index 25d07d9863c..2770986b613 100644
--- a/arch/arm/include/asm/arch-sunxi/dram_sun8i_h3.h
+++ b/arch/arm/include/asm/arch-sunxi/dram_sun8i_h3.h
@@ -15,7 +15,8 @@
struct sunxi_mctl_com_reg {
u32 cr; /* 0x00 control register */
- u8 res0[0x8]; /* 0x04 */
+ u32 cr_r1; /* 0x04 rank 1 control register (R40 only) */
+ u8 res0[0x4]; /* 0x08 */
u32 tmr; /* 0x0c (unused on H3) */
u32 mcr[16][2]; /* 0x10 */
u32 bwcr; /* 0x90 bandwidth control register */
@@ -63,6 +64,17 @@ struct sunxi_mctl_com_reg {
#define MCTL_CR_DUAL_RANK (0x1 << 0)
#define MCTL_CR_SINGLE_RANK (0x0 << 0)
+/*
+ * CR_R1 is a register found in the R40's DRAM controller. It sets various
+ * parameters for rank 1. Bits [11:0] have the same meaning as the bits in
+ * MCTL_CR, but they apply to rank 1 only. This implies we can have
+ * different chips for rank 1 than rank 0.
+ *
+ * As address line A15 and CS1 chip select for rank 1 are muxed on the same
+ * pin, if single rank is used, A15 must be muxed in.
+ */
+#define MCTL_CR_R1_MUX_A15 (0x1 << 21)
+
#define PROTECT_MAGIC (0x94be6fa3)
struct sunxi_mctl_ctl_reg {
@@ -72,7 +84,8 @@ struct sunxi_mctl_ctl_reg {
u32 clken; /* 0x0c */
u32 pgsr[2]; /* 0x10 PHY general status registers */
u32 statr; /* 0x18 */
- u8 res1[0x14]; /* 0x1c */
+ u8 res1[0x10]; /* 0x1c */
+ u32 lp3mr11; /* 0x2c */
u32 mr[4]; /* 0x30 mode registers */
u32 pllgcr; /* 0x40 */
u32 ptr[5]; /* 0x44 PHY timing registers */
@@ -120,7 +133,8 @@ struct sunxi_mctl_ctl_reg {
struct { /* 0x300 DATX8 modules*/
u32 mdlr; /* 0x00 master delay line register */
u32 lcdlr[3]; /* 0x04 local calibrated delay line registers */
- u32 bdlr[12]; /* 0x10 bit delay line registers */
+ u32 bdlr[11]; /* 0x10 bit delay line registers */
+ u32 sdlr; /* 0x3c output enable bit delay registers */
u32 gtr; /* 0x40 general timing register */
u32 gcr; /* 0x44 general configuration register */
u32 gsr[3]; /* 0x48 general status registers */
diff --git a/arch/arm/mach-sunxi/Makefile b/arch/arm/mach-sunxi/Makefile
index efab4811ee5..5510aa54353 100644
--- a/arch/arm/mach-sunxi/Makefile
+++ b/arch/arm/mach-sunxi/Makefile
@@ -49,6 +49,7 @@ obj-$(CONFIG_MACH_SUN8I_A23) += dram_sun8i_a23.o
obj-$(CONFIG_MACH_SUN8I_A33) += dram_sun8i_a33.o
obj-$(CONFIG_MACH_SUN8I_A83T) += dram_sun8i_a83t.o
obj-$(CONFIG_MACH_SUNXI_H3_H5) += dram_sun8i_h3.o
+obj-$(CONFIG_MACH_SUN8I_R40) += dram_sun8i_h3.o
obj-$(CONFIG_MACH_SUN9I) += dram_sun9i.o
obj-$(CONFIG_MACH_SUN50I) += dram_sun8i_h3.o
endif
diff --git a/arch/arm/mach-sunxi/clock_sun6i.c b/arch/arm/mach-sunxi/clock_sun6i.c
index 3c8c53fcf76..9068c88ab2f 100644
--- a/arch/arm/mach-sunxi/clock_sun6i.c
+++ b/arch/arm/mach-sunxi/clock_sun6i.c
@@ -222,7 +222,9 @@ done:
}
#endif
-#if defined(CONFIG_MACH_SUN8I_A33) || defined(CONFIG_MACH_SUN50I)
+#if defined(CONFIG_MACH_SUN8I_A33) || \
+ defined(CONFIG_MACH_SUN8I_R40) || \
+ defined(CONFIG_MACH_SUN50I)
void clock_set_pll11(unsigned int clk, bool sigma_delta_enable)
{
struct sunxi_ccm_reg * const ccm =
diff --git a/arch/arm/mach-sunxi/dram_sun8i_h3.c b/arch/arm/mach-sunxi/dram_sun8i_h3.c
index d681a9df8be..2d12661a14d 100644
--- a/arch/arm/mach-sunxi/dram_sun8i_h3.c
+++ b/arch/arm/mach-sunxi/dram_sun8i_h3.c
@@ -70,6 +70,12 @@ static void mctl_set_bit_delays(struct dram_para *para)
writel(ACBDLR_WRITE_DELAY(para->ac_delays[i]),
&mctl_ctl->acbdlr[i]);
+#ifdef CONFIG_MACH_SUN8I_R40
+ /* DQSn, DMn, DQn output enable bit delay */
+ for (i = 0; i < 4; i++)
+ writel(0x6 << 24, &mctl_ctl->dx[i].sdlr);
+#endif
+
setbits_le32(&mctl_ctl->pgcr[0], 1 << 26);
}
@@ -86,6 +92,9 @@ enum {
MBUS_PORT_DI = 9,
MBUS_PORT_DE = 10,
MBUS_PORT_DE_CFD = 11,
+ MBUS_PORT_UNKNOWN1 = 12,
+ MBUS_PORT_UNKNOWN2 = 13,
+ MBUS_PORT_UNKNOWN3 = 14,
};
enum {
@@ -205,6 +214,42 @@ static void mctl_set_master_priority_h5(void)
MBUS_CONF(DE_CFD, true, HIGHEST, 0, 600, 400, 200);
}
+static void mctl_set_master_priority_r40(void)
+{
+ struct sunxi_mctl_com_reg * const mctl_com =
+ (struct sunxi_mctl_com_reg *)SUNXI_DRAM_COM_BASE;
+
+ /* enable bandwidth limit windows and set windows size 1us */
+ writel(399, &mctl_com->tmr);
+ writel((1 << 16), &mctl_com->bwcr);
+
+ /* set cpu high priority */
+ writel(0x00000001, &mctl_com->mapr);
+
+ /* Port 2 is reserved per Allwinner's linux-3.10 source, yet
+ * they initialise it */
+ MBUS_CONF( CPU, true, HIGHEST, 0, 300, 260, 150);
+ MBUS_CONF( GPU, true, HIGHEST, 0, 600, 400, 200);
+ MBUS_CONF( UNUSED, true, HIGHEST, 0, 512, 256, 96);
+ MBUS_CONF( DMA, true, HIGHEST, 0, 256, 128, 32);
+ MBUS_CONF( VE, true, HIGHEST, 0, 1900, 1500, 1000);
+ MBUS_CONF( CSI, true, HIGHEST, 0, 150, 120, 100);
+ MBUS_CONF( NAND, true, HIGH, 0, 256, 128, 64);
+ MBUS_CONF( SS, true, HIGHEST, 0, 256, 128, 64);
+ MBUS_CONF( TS, true, HIGHEST, 0, 256, 128, 64);
+ MBUS_CONF( DI, true, HIGH, 0, 1024, 256, 64);
+
+ /*
+ * The port names are probably wrong, but no correct sources
+ * are available.
+ */
+ MBUS_CONF( DE, true, HIGH, 0, 128, 48, 0);
+ MBUS_CONF( DE_CFD, true, HIGH, 0, 384, 256, 0);
+ MBUS_CONF(UNKNOWN1, true, HIGHEST, 0, 512, 384, 256);
+ MBUS_CONF(UNKNOWN2, true, HIGHEST, 2, 8192, 6144, 1024);
+ MBUS_CONF(UNKNOWN3, true, HIGH, 0, 1280, 144, 64);
+}
+
static void mctl_set_master_priority(uint16_t socid)
{
switch (socid) {
@@ -217,6 +262,9 @@ static void mctl_set_master_priority(uint16_t socid)
case SOCID_H5:
mctl_set_master_priority_h5();
return;
+ case SOCID_R40:
+ mctl_set_master_priority_r40();
+ return;
}
}
@@ -268,6 +316,9 @@ static void mctl_set_timing_params(uint16_t socid, struct dram_para *para)
writel(0x18, &mctl_ctl->mr[2]); /* CWL=8 */
writel(0x0, &mctl_ctl->mr[3]);
+ if (socid == SOCID_R40)
+ writel(0x3, &mctl_ctl->lp3mr11); /* odt_en[7:4] */
+
/* set DRAM timing */
writel(DRAMTMG0_TWTP(twtp) | DRAMTMG0_TFAW(tfaw) |
DRAMTMG0_TRAS_MAX(trasmax) | DRAMTMG0_TRAS(tras),
@@ -383,7 +434,7 @@ static void mctl_h3_zq_calibration_quirk(struct dram_para *para)
}
}
-static void mctl_set_cr(struct dram_para *para)
+static void mctl_set_cr(uint16_t socid, struct dram_para *para)
{
struct sunxi_mctl_com_reg * const mctl_com =
(struct sunxi_mctl_com_reg *)SUNXI_DRAM_COM_BASE;
@@ -393,6 +444,14 @@ static void mctl_set_cr(struct dram_para *para)
(para->dual_rank ? MCTL_CR_DUAL_RANK : MCTL_CR_SINGLE_RANK) |
MCTL_CR_PAGE_SIZE(para->page_size) |
MCTL_CR_ROW_BITS(para->row_bits), &mctl_com->cr);
+
+ if (socid == SOCID_R40) {
+ if (para->dual_rank)
+ panic("Dual rank memory not supported\n");
+
+ /* Mux pin to A15 address line for single rank memory. */
+ setbits_le32(&mctl_com->cr_r1, MCTL_CR_R1_MUX_A15);
+ }
}
static void mctl_sys_init(uint16_t socid, struct dram_para *para)
@@ -407,14 +466,14 @@ static void mctl_sys_init(uint16_t socid, struct dram_para *para)
clrbits_le32(&ccm->ahb_gate0, 1 << AHB_GATE_OFFSET_MCTL);
clrbits_le32(&ccm->ahb_reset0_cfg, 1 << AHB_RESET_OFFSET_MCTL);
clrbits_le32(&ccm->pll5_cfg, CCM_PLL5_CTRL_EN);
- if (socid == SOCID_A64)
+ if (socid == SOCID_A64 || socid == SOCID_R40)
clrbits_le32(&ccm->pll11_cfg, CCM_PLL11_CTRL_EN);
udelay(10);
clrbits_le32(&ccm->dram_clk_cfg, CCM_DRAMCLK_CFG_RST);
udelay(1000);
- if (socid == SOCID_A64) {
+ if (socid == SOCID_A64 || socid == SOCID_R40) {
clock_set_pll11(CONFIG_DRAM_CLK * 2 * 1000000, false);
clrsetbits_le32(&ccm->dram_clk_cfg,
CCM_DRAMCLK_CFG_DIV_MASK |
@@ -459,7 +518,7 @@ static int mctl_channel_init(uint16_t socid, struct dram_para *para)
unsigned int i;
- mctl_set_cr(para);
+ mctl_set_cr(socid, para);
mctl_set_timing_params(socid, para);
mctl_set_master_priority(socid);
@@ -506,6 +565,13 @@ static int mctl_channel_init(uint16_t socid, struct dram_para *para)
clrsetbits_le32(&mctl_ctl->pgcr[2], (0x3 << 10) | (0x3 << 8),
(0x1 << 10) | (0x2 << 8));
} else if (socid == SOCID_A64 || socid == SOCID_H5) {
+ /* dphy & aphy phase select ? */
+ clrsetbits_le32(&mctl_ctl->pgcr[2], (0x3 << 10) | (0x3 << 8),
+ (0x0 << 10) | (0x3 << 8));
+ } else if (socid == SOCID_R40) {
+ /* dx ddr_clk & hdr_clk dynamic mode (tpr13[9] == 0) */
+ clrbits_le32(&mctl_ctl->pgcr[0], (0x3 << 14) | (0x3 << 12));
+
/* dphy & aphy phase select ? */
clrsetbits_le32(&mctl_ctl->pgcr[2], (0x3 << 10) | (0x3 << 8),
(0x0 << 10) | (0x3 << 8));
@@ -535,6 +601,11 @@ static int mctl_channel_init(uint16_t socid, struct dram_para *para)
mctl_phy_init(PIR_ZCAL | PIR_PLLINIT | PIR_DCAL | PIR_PHYRST |
PIR_DRAMRST | PIR_DRAMINIT | PIR_QSGATE);
/* no PIR_QSGATE for H5 ???? */
+ } else if (socid == SOCID_R40) {
+ clrsetbits_le32(&mctl_ctl->zqcr, 0xffffff, CONFIG_DRAM_ZQ);
+
+ mctl_phy_init(PIR_ZCAL | PIR_PLLINIT | PIR_DCAL | PIR_PHYRST |
+ PIR_DRAMRST | PIR_DRAMINIT);
}
/* detect ranks and bus width */
@@ -554,7 +625,7 @@ static int mctl_channel_init(uint16_t socid, struct dram_para *para)
para->bus_width = 16;
}
- mctl_set_cr(para);
+ mctl_set_cr(socid, para);
udelay(20);
/* re-train */
@@ -575,7 +646,7 @@ static int mctl_channel_init(uint16_t socid, struct dram_para *para)
/* set PGCR3, CKE polarity */
if (socid == SOCID_H3)
writel(0x00aa0060, &mctl_ctl->pgcr[3]);
- else if (socid == SOCID_A64 || socid == SOCID_H5)
+ else if (socid == SOCID_A64 || socid == SOCID_H5 || socid == SOCID_R40)
writel(0xc0aa0060, &mctl_ctl->pgcr[3]);
/* power down zq calibration module for power save */
@@ -587,12 +658,12 @@ static int mctl_channel_init(uint16_t socid, struct dram_para *para)
return 0;
}
-static void mctl_auto_detect_dram_size(struct dram_para *para)
+static void mctl_auto_detect_dram_size(uint16_t socid, struct dram_para *para)
{
/* detect row address bits */
para->page_size = 512;
para->row_bits = 16;
- mctl_set_cr(para);
+ mctl_set_cr(socid, para);
for (para->row_bits = 11; para->row_bits < 16; para->row_bits++)
if (mctl_mem_matches((1 << (para->row_bits + 3)) * para->page_size))
@@ -600,7 +671,7 @@ static void mctl_auto_detect_dram_size(struct dram_para *para)
/* detect page size */
para->page_size = 8192;
- mctl_set_cr(para);
+ mctl_set_cr(socid, para);
for (para->page_size = 512; para->page_size < 8192; para->page_size *= 2)
if (mctl_mem_matches(para->page_size))
@@ -630,6 +701,22 @@ static void mctl_auto_detect_dram_size(struct dram_para *para)
0, 0, 0, 0, 0, 0, 0, 0, \
0, 0, 0, 0, 0, 0, 0 }
+#define SUN8I_R40_DX_READ_DELAYS \
+ {{ 14, 14, 14, 14, 14, 14, 14, 14, 14, 0, 0 }, \
+ { 14, 14, 14, 14, 14, 14, 14, 14, 14, 0, 0 }, \
+ { 14, 14, 14, 14, 14, 14, 14, 14, 14, 0, 0 }, \
+ { 14, 14, 14, 14, 14, 14, 14, 14, 14, 0, 0 } }
+#define SUN8I_R40_DX_WRITE_DELAYS \
+ {{ 0, 0, 0, 0, 0, 0, 0, 0, 0, 6, 0 }, \
+ { 0, 0, 0, 0, 0, 0, 0, 0, 0, 6, 0 }, \
+ { 0, 0, 0, 0, 0, 0, 0, 0, 0, 6, 0 }, \
+ { 0, 0, 0, 0, 0, 0, 0, 0, 0, 6, 0 } }
+#define SUN8I_R40_AC_DELAYS \
+ { 0, 0, 3, 0, 0, 0, 0, 0, \
+ 0, 0, 0, 0, 0, 0, 0, 0, \
+ 0, 0, 0, 0, 0, 0, 0, 0, \
+ 0, 0, 0, 0, 0, 0, 0 }
+
#define SUN50I_A64_DX_READ_DELAYS \
{{ 16, 16, 16, 16, 17, 16, 16, 17, 16, 1, 0 }, \
{ 17, 17, 17, 17, 17, 17, 17, 17, 17, 1, 0 }, \
@@ -679,6 +766,10 @@ unsigned long sunxi_dram_init(void)
.dx_read_delays = SUN8I_H3_DX_READ_DELAYS,
.dx_write_delays = SUN8I_H3_DX_WRITE_DELAYS,
.ac_delays = SUN8I_H3_AC_DELAYS,
+#elif defined(CONFIG_MACH_SUN8I_R40)
+ .dx_read_delays = SUN8I_R40_DX_READ_DELAYS,
+ .dx_write_delays = SUN8I_R40_DX_WRITE_DELAYS,
+ .ac_delays = SUN8I_R40_AC_DELAYS,
#elif defined(CONFIG_MACH_SUN50I)
.dx_read_delays = SUN50I_A64_DX_READ_DELAYS,
.dx_write_delays = SUN50I_A64_DX_WRITE_DELAYS,
@@ -696,6 +787,8 @@ unsigned long sunxi_dram_init(void)
*/
#if defined(CONFIG_MACH_SUN8I_H3)
uint16_t socid = SOCID_H3;
+#elif defined(CONFIG_MACH_SUN8I_R40)
+ uint16_t socid = SOCID_R40;
#elif defined(CONFIG_MACH_SUN50I)
uint16_t socid = SOCID_A64;
#elif defined(CONFIG_MACH_SUN50I_H5)
@@ -716,9 +809,11 @@ unsigned long sunxi_dram_init(void)
if (socid == SOCID_H3)
writel(0x0c000400, &mctl_ctl->odtcfg);
- if (socid == SOCID_A64 || socid == SOCID_H5) {
+ if (socid == SOCID_A64 || socid == SOCID_H5 || socid == SOCID_R40) {
+ /* VTF enable (tpr13[8] == 1) */
setbits_le32(&mctl_ctl->vtfcr,
- (socid == SOCID_H5 ? 3 : 2) << 8);
+ (socid != SOCID_A64 ? 3 : 2) << 8);
+ /* DQ hold disable (tpr13[26] == 1) */
clrbits_le32(&mctl_ctl->pgcr[2], (1 << 13));
}
@@ -726,8 +821,8 @@ unsigned long sunxi_dram_init(void)
setbits_le32(&mctl_com->cccr, 1 << 31);
udelay(10);
- mctl_auto_detect_dram_size(¶);
- mctl_set_cr(¶);
+ mctl_auto_detect_dram_size(socid, ¶);
+ mctl_set_cr(socid, ¶);
return (1UL << (para.row_bits + 3)) * para.page_size *
(para.dual_rank ? 2 : 1);
--
GitLab
From 50ae7ae58320855b41eace591a63d1439a0ef4d4 Mon Sep 17 00:00:00 2001
From: Chen-Yu Tsai <wens@csie.org>
Date: Fri, 2 Dec 2016 16:09:49 +0800
Subject: [PATCH 105/282] sunxi: Enable SPL for R40
Now that we can do DRAM initialization for the R40, we can enable
SPL support for it.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
---
board/sunxi/Kconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/board/sunxi/Kconfig b/board/sunxi/Kconfig
index 92f9d32ce9b..0040e7e7630 100644
--- a/board/sunxi/Kconfig
+++ b/board/sunxi/Kconfig
@@ -138,6 +138,7 @@ config MACH_SUN8I_R40
bool "sun8i (Allwinner R40)"
select CPU_V7
select SUNXI_GEN_SUN6I
+ select SUPPORT_SPL
config MACH_SUN9I
bool "sun9i (Allwinner A80)"
--
GitLab
From acef236454a97c65a9d95fc5845b38ce5602f506 Mon Sep 17 00:00:00 2001
From: Chen-Yu Tsai <wens@csie.org>
Date: Wed, 1 Mar 2017 13:52:09 +0800
Subject: [PATCH 106/282] sunxi: Fix CPUCFG address for R40
The R40 has the CPUCFG block at the same address as the A20.
Fix it.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
---
arch/arm/include/asm/arch-sunxi/cpu_sun4i.h | 6 ++++--
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/arch/arm/include/asm/arch-sunxi/cpu_sun4i.h b/arch/arm/include/asm/arch-sunxi/cpu_sun4i.h
index ea672fe8449..88c3f138173 100644
--- a/arch/arm/include/asm/arch-sunxi/cpu_sun4i.h
+++ b/arch/arm/include/asm/arch-sunxi/cpu_sun4i.h
@@ -108,7 +108,7 @@ defined(CONFIG_MACH_SUN50I)
#define SUNXI_TP_BASE 0x01c25000
#define SUNXI_PMU_BASE 0x01c25400
-#ifdef CONFIG_MACH_SUN7I
+#if defined CONFIG_MACH_SUN7I || defined CONFIG_MACH_SUN8I_R40
#define SUNXI_CPUCFG_BASE 0x01c25c00
#endif
@@ -167,7 +167,9 @@ defined(CONFIG_MACH_SUN50I)
#define SUNXI_RTC_BASE 0x01f00000
#define SUNXI_PRCM_BASE 0x01f01400
-#if defined CONFIG_SUNXI_GEN_SUN6I && !defined CONFIG_MACH_SUN8I_A83T
+#if defined CONFIG_SUNXI_GEN_SUN6I && \
+ !defined CONFIG_MACH_SUN8I_A83T && \
+ !defined CONFIG_MACH_SUN8I_R40
#define SUNXI_CPUCFG_BASE 0x01f01c00
#endif
--
GitLab
From 0918648d823d6a5a9bd5fc37ddcaa9691e84ce88 Mon Sep 17 00:00:00 2001
From: Chen-Yu Tsai <wens@csie.org>
Date: Wed, 1 Mar 2017 11:03:15 +0800
Subject: [PATCH 107/282] sunxi: Add PSCI support for R40
The R40's CPU controls are a combination of sun6i and sun7i.
All controls are in the CPUCFG block, and it seems the R40 does not
have a PRCM block. The core reset, power gating and clamp controls
are grouped like sun6i.
Last, the R40 does not have a secure SRAM block.
This patch adds a PSCI implementation for CPU bring-up and hotplug
for the R40.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
---
arch/arm/cpu/armv7/sunxi/psci.c | 35 ++++++++++++++++++++++++++++++---
board/sunxi/Kconfig | 3 +++
2 files changed, 35 insertions(+), 3 deletions(-)
diff --git a/arch/arm/cpu/armv7/sunxi/psci.c b/arch/arm/cpu/armv7/sunxi/psci.c
index 104dc909bc5..b3a34de1aaf 100644
--- a/arch/arm/cpu/armv7/sunxi/psci.c
+++ b/arch/arm/cpu/armv7/sunxi/psci.c
@@ -27,6 +27,17 @@
#define GICD_BASE (SUNXI_GIC400_BASE + GIC_DIST_OFFSET)
#define GICC_BASE (SUNXI_GIC400_BASE + GIC_CPU_OFFSET_A15)
+/*
+ * R40 is different from other single cluster SoCs.
+ *
+ * The power clamps are located in the unused space after the per-core
+ * reset controls for core 3. The secondary core entry address register
+ * is in the SRAM controller address range.
+ */
+#define SUN8I_R40_PWROFF (0x110)
+#define SUN8I_R40_PWR_CLAMP(cpu) (0x120 + (cpu) * 0x4)
+#define SUN8I_R40_SRAMC_SOFT_ENTRY_REG0 (0xbc)
+
static void __secure cp15_write_cntp_tval(u32 tval)
{
asm volatile ("mcr p15, 0, %0, c14, c2, 0" : : "r" (tval));
@@ -68,7 +79,8 @@ static void __secure __mdelay(u32 ms)
static void __secure clamp_release(u32 __maybe_unused *clamp)
{
#if defined(CONFIG_MACH_SUN6I) || defined(CONFIG_MACH_SUN7I) || \
- defined(CONFIG_MACH_SUN8I_H3)
+ defined(CONFIG_MACH_SUN8I_H3) || \
+ defined(CONFIG_MACH_SUN8I_R40)
u32 tmp = 0x1ff;
do {
tmp >>= 1;
@@ -82,7 +94,8 @@ static void __secure clamp_release(u32 __maybe_unused *clamp)
static void __secure clamp_set(u32 __maybe_unused *clamp)
{
#if defined(CONFIG_MACH_SUN6I) || defined(CONFIG_MACH_SUN7I) || \
- defined(CONFIG_MACH_SUN8I_H3)
+ defined(CONFIG_MACH_SUN8I_H3) || \
+ defined(CONFIG_MACH_SUN8I_R40)
writel(0xff, clamp);
#endif
}
@@ -115,7 +128,17 @@ static void __secure sunxi_cpu_set_power(int __always_unused cpu, bool on)
sunxi_power_switch(&cpucfg->cpu1_pwr_clamp, &cpucfg->cpu1_pwroff,
on, 0);
}
-#else /* ! CONFIG_MACH_SUN7I */
+#elif defined CONFIG_MACH_SUN8I_R40
+static void __secure sunxi_cpu_set_power(int cpu, bool on)
+{
+ struct sunxi_cpucfg_reg *cpucfg =
+ (struct sunxi_cpucfg_reg *)SUNXI_CPUCFG_BASE;
+
+ sunxi_power_switch((void *)cpucfg + SUN8I_R40_PWR_CLAMP(cpu),
+ (void *)cpucfg + SUN8I_R40_PWROFF,
+ on, 0);
+}
+#else /* ! CONFIG_MACH_SUN7I && ! CONFIG_MACH_SUN8I_R40 */
static void __secure sunxi_cpu_set_power(int cpu, bool on)
{
struct sunxi_prcm_reg *prcm =
@@ -213,7 +236,13 @@ int __secure psci_cpu_on(u32 __always_unused unused, u32 mpidr, u32 pc)
psci_save_target_pc(cpu, pc);
/* Set secondary core power on PC */
+#ifdef CONFIG_MACH_SUN8I_R40
+ /* secondary core entry address is programmed differently */
+ writel((u32)&psci_cpu_entry,
+ SUNXI_SRAMC_BASE + SUN8I_R40_SRAMC_SOFT_ENTRY_REG0);
+#else
writel((u32)&psci_cpu_entry, &cpucfg->priv0);
+#endif
/* Assert reset on target CPU */
writel(0, &cpucfg->cpu[cpu].rst);
diff --git a/board/sunxi/Kconfig b/board/sunxi/Kconfig
index 0040e7e7630..c4fba849213 100644
--- a/board/sunxi/Kconfig
+++ b/board/sunxi/Kconfig
@@ -137,6 +137,9 @@ config MACH_SUN8I_H3
config MACH_SUN8I_R40
bool "sun8i (Allwinner R40)"
select CPU_V7
+ select CPU_V7_HAS_NONSEC
+ select CPU_V7_HAS_VIRT
+ select ARCH_SUPPORT_PSCI
select SUNXI_GEN_SUN6I
select SUPPORT_SPL
--
GitLab
From 10d8bc5a5968a118c6562c25ecf6f83b5f29b7ed Mon Sep 17 00:00:00 2001
From: Chen-Yu Tsai <wens@csie.org>
Date: Fri, 2 Dec 2016 16:12:32 +0800
Subject: [PATCH 108/282] sunxi: Add support for Bananapi M2 Ultra
The Bananapi M2 Ultra is the first publicly available development board
featuring the R40 SoC.
This patch add barebone dtsi/dts files for the R40 and Bananapi M2 Ultra,
as well as a defconfig for it.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
---
arch/arm/dts/Makefile | 2 +
arch/arm/dts/sun8i-r40-bananapi-m2-ultra.dts | 69 +++++++
arch/arm/dts/sun8i-r40.dtsi | 183 +++++++++++++++++++
board/sunxi/MAINTAINERS | 6 +
configs/Bananapi_M2_Ultra_defconfig | 15 ++
5 files changed, 275 insertions(+)
create mode 100644 arch/arm/dts/sun8i-r40-bananapi-m2-ultra.dts
create mode 100644 arch/arm/dts/sun8i-r40.dtsi
create mode 100644 configs/Bananapi_M2_Ultra_defconfig
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index ce34e3eeff8..198693c823c 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -304,6 +304,8 @@ dtb-$(CONFIG_MACH_SUN8I_H3) += \
sun8i-h3-orangepi-plus2e.dtb \
sun8i-h3-nanopi-neo.dtb \
sun8i-h3-nanopi-neo-air.dtb
+dtb-$(CONFIG_MACH_SUN8I_R40) += \
+ sun8i-r40-bananapi-m2-ultra.dtb
dtb-$(CONFIG_MACH_SUN50I_H5) += \
sun50i-h5-orangepi-pc2.dtb
dtb-$(CONFIG_MACH_SUN50I) += \
diff --git a/arch/arm/dts/sun8i-r40-bananapi-m2-ultra.dts b/arch/arm/dts/sun8i-r40-bananapi-m2-ultra.dts
new file mode 100644
index 00000000000..ab471ab0bff
--- /dev/null
+++ b/arch/arm/dts/sun8i-r40-bananapi-m2-ultra.dts
@@ -0,0 +1,69 @@
+/*
+ * Copyright (C) 2016 Chen-Yu Tsai <wens@csie.org>
+ *
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPL or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.
+ *
+ * a) This file is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of the
+ * License, or (at your option) any later version.
+ *
+ * This file is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * Or, alternatively,
+ *
+ * b) Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use,
+ * copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following
+ * conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+/dts-v1/;
+#include "sun8i-r40.dtsi"
+
+/ {
+ model = "Banana Pi BPI-M2-Ultra";
+ compatible = "sinovoip,bpi-m2-ultra", "allwinner,sun8i-r40";
+
+ aliases {
+ serial0 = &uart0;
+ };
+
+ chosen {
+ stdout-path = "serial0:115200n8";
+ };
+};
+
+&i2c0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&i2c0_pins>;
+ status = "okay";
+};
+
+&uart0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart0_pb_pins>;
+ status = "okay";
+};
diff --git a/arch/arm/dts/sun8i-r40.dtsi b/arch/arm/dts/sun8i-r40.dtsi
new file mode 100644
index 00000000000..48ec2e855a2
--- /dev/null
+++ b/arch/arm/dts/sun8i-r40.dtsi
@@ -0,0 +1,183 @@
+/*
+ * Copyright 2016 Chen-Yu Tsai
+ *
+ * Chen-Yu Tsai <wens@csie.org>
+ *
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPL or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.
+ *
+ * a) This file is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of the
+ * License, or (at your option) any later version.
+ *
+ * This file is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * Or, alternatively,
+ *
+ * b) Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use,
+ * copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following
+ * conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+#include <dt-bindings/interrupt-controller/arm-gic.h>
+
+/ {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ interrupt-parent = <&gic>;
+
+ aliases {
+ };
+
+ chosen {
+ };
+
+ clocks {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges;
+
+ osc24M: osc24M_clk {
+ #clock-cells = <0>;
+ compatible = "fixed-clock";
+ clock-frequency = <24000000>;
+ };
+
+ osc32k: osc32k_clk {
+ #clock-cells = <0>;
+ compatible = "fixed-clock";
+ clock-frequency = <32768>;
+ clock-output-names = "osc32k";
+ };
+ };
+
+ cpus {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ cpu0: cpu@0 {
+ compatible = "arm,cortex-a7";
+ device_type = "cpu";
+ reg = <0>;
+ };
+
+ cpu@1 {
+ compatible = "arm,cortex-a7";
+ device_type = "cpu";
+ reg = <1>;
+ };
+
+ cpu@2 {
+ compatible = "arm,cortex-a7";
+ device_type = "cpu";
+ reg = <2>;
+ };
+
+ cpu@3 {
+ compatible = "arm,cortex-a7";
+ device_type = "cpu";
+ reg = <3>;
+ };
+ };
+
+ memory@40000000 {
+ device_type = "memory";
+ reg = <0x40000000 0x80000000>;
+ };
+
+ soc {
+ compatible = "simple-bus";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges;
+
+ pio: pinctrl@1c20800 {
+ compatible = "allwinner,sun8i-r40-pinctrl";
+ reg = <0x01c20800 0x400>;
+ interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>;
+ /* apb should be replaced once CCU is implemented */
+ clocks = <&osc24M>, <&osc24M>, <&osc32k>;
+ clock-names = "apb", "hosc", "losc";
+ gpio-controller;
+ interrupt-controller;
+ #interrupt-cells = <3>;
+ #gpio-cells = <3>;
+
+ i2c0_pins: i2c0_pins {
+ pins = "PB0", "PB1";
+ function = "i2c0";
+ bias-pull-up;
+ };
+
+ uart0_pb_pins: uart0_pb_pins {
+ pins = "PB22", "PB23";
+ function = "uart0";
+ bias-pull-up;
+ };
+ };
+
+ uart0: serial@1c28000 {
+ compatible = "snps,dw-apb-uart";
+ reg = <0x01c28000 0x400>;
+ interrupts = <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>;
+ reg-shift = <2>;
+ reg-io-width = <4>;
+ clocks = <&osc24M>;
+ status = "disabled";
+ };
+
+ i2c0: i2c@1c2ac00 {
+ compatible = "allwinner,sun6i-a31-i2c";
+ reg = <0x01c2ac00 0x400>;
+ interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&osc24M>;
+ status = "disabled";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+
+ gic: interrupt-controller@1c81000 {
+ compatible = "arm,cortex-a7-gic", "arm,cortex-a15-gic";
+ reg = <0x01c81000 0x1000>,
+ <0x01c82000 0x1000>,
+ <0x01c84000 0x2000>,
+ <0x01c86000 0x2000>;
+ interrupt-controller;
+ #interrupt-cells = <3>;
+ interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
+ };
+ };
+
+ timer {
+ compatible = "arm,armv7-timer";
+ interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
+ <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
+ <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
+ <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
+ clock-frequency = <24000000>;
+ arm,cpu-registers-not-fw-configured;
+ };
+};
diff --git a/board/sunxi/MAINTAINERS b/board/sunxi/MAINTAINERS
index 2a712fe4b56..7ce2a320949 100644
--- a/board/sunxi/MAINTAINERS
+++ b/board/sunxi/MAINTAINERS
@@ -109,6 +109,12 @@ M: Paul Kocialkowski <contact@paulk.fr>
S: Maintained
F: configs/Ampe_A76_defconfig
+BANANAPI M2 ULTRA BOARD
+M: Chen-Yu Tsai <wens@csie.org>
+S: Maintained
+F: configs/Bananapi_M2_Ultra_defconfig
+F: arch/arm/dts/sun8i-r40-bananapi-m2-ultra.dts
+
COLOMBUS BOARD
M: Maxime Ripard <maxime.ripard@free-electrons.com>
S: Maintained
diff --git a/configs/Bananapi_M2_Ultra_defconfig b/configs/Bananapi_M2_Ultra_defconfig
new file mode 100644
index 00000000000..c6da7274e17
--- /dev/null
+++ b/configs/Bananapi_M2_Ultra_defconfig
@@ -0,0 +1,15 @@
+CONFIG_ARM=y
+CONFIG_ARCH_SUNXI=y
+CONFIG_MACH_SUN8I_R40=y
+CONFIG_DRAM_CLK=576
+CONFIG_DRAM_ZQ=3881979
+CONFIG_DRAM_ODT_EN=y
+CONFIG_MMC0_CD_PIN="PH13"
+CONFIG_MMC_SUNXI_SLOT_EXTRA=2
+CONFIG_DEFAULT_DEVICE_TREE="sun8i-r40-bananapi-m2-ultra"
+# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
+CONFIG_SPL=y
+CONFIG_SPL_I2C_SUPPORT=y
+# CONFIG_CMD_IMLS is not set
+# CONFIG_CMD_FLASH is not set
+# CONFIG_CMD_FPGA is not set
--
GitLab
From 5e023e7eb3c4dca6ddc2d7dbd862b5e781a6fbec Mon Sep 17 00:00:00 2001
From: Jernej Skrabec <jernej.skrabec@siol.net>
Date: Mon, 27 Mar 2017 19:22:29 +0200
Subject: [PATCH 109/282] sunxi: video: Split out TCON code
TCON unit has similar layout and functionality also on newer SoCs. This
commit splits out TCON code for easier reuse later.
Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
---
arch/arm/include/asm/arch-sunxi/display.h | 103 -----------
arch/arm/include/asm/arch-sunxi/lcdc.h | 128 +++++++++++++
drivers/video/Makefile | 2 +-
drivers/video/sunxi/Makefile | 8 +
drivers/video/sunxi/lcdc.c | 207 ++++++++++++++++++++++
drivers/video/{ => sunxi}/sunxi_display.c | 199 ++-------------------
6 files changed, 362 insertions(+), 285 deletions(-)
create mode 100644 arch/arm/include/asm/arch-sunxi/lcdc.h
create mode 100644 drivers/video/sunxi/Makefile
create mode 100644 drivers/video/sunxi/lcdc.c
rename drivers/video/{ => sunxi}/sunxi_display.c (86%)
diff --git a/arch/arm/include/asm/arch-sunxi/display.h b/arch/arm/include/asm/arch-sunxi/display.h
index b64f310b8bf..93803addfbe 100644
--- a/arch/arm/include/asm/arch-sunxi/display.h
+++ b/arch/arm/include/asm/arch-sunxi/display.h
@@ -157,52 +157,6 @@ struct sunxi_de_be_reg {
u32 output_color_coef[12]; /* 0x9d0 */
};
-struct sunxi_lcdc_reg {
- u32 ctrl; /* 0x00 */
- u32 int0; /* 0x04 */
- u32 int1; /* 0x08 */
- u8 res0[0x04]; /* 0x0c */
- u32 tcon0_frm_ctrl; /* 0x10 */
- u32 tcon0_frm_seed[6]; /* 0x14 */
- u32 tcon0_frm_table[4]; /* 0x2c */
- u8 res1[4]; /* 0x3c */
- u32 tcon0_ctrl; /* 0x40 */
- u32 tcon0_dclk; /* 0x44 */
- u32 tcon0_timing_active; /* 0x48 */
- u32 tcon0_timing_h; /* 0x4c */
- u32 tcon0_timing_v; /* 0x50 */
- u32 tcon0_timing_sync; /* 0x54 */
- u32 tcon0_hv_intf; /* 0x58 */
- u8 res2[0x04]; /* 0x5c */
- u32 tcon0_cpu_intf; /* 0x60 */
- u32 tcon0_cpu_wr_dat; /* 0x64 */
- u32 tcon0_cpu_rd_dat0; /* 0x68 */
- u32 tcon0_cpu_rd_dat1; /* 0x6c */
- u32 tcon0_ttl_timing0; /* 0x70 */
- u32 tcon0_ttl_timing1; /* 0x74 */
- u32 tcon0_ttl_timing2; /* 0x78 */
- u32 tcon0_ttl_timing3; /* 0x7c */
- u32 tcon0_ttl_timing4; /* 0x80 */
- u32 tcon0_lvds_intf; /* 0x84 */
- u32 tcon0_io_polarity; /* 0x88 */
- u32 tcon0_io_tristate; /* 0x8c */
- u32 tcon1_ctrl; /* 0x90 */
- u32 tcon1_timing_source; /* 0x94 */
- u32 tcon1_timing_scale; /* 0x98 */
- u32 tcon1_timing_out; /* 0x9c */
- u32 tcon1_timing_h; /* 0xa0 */
- u32 tcon1_timing_v; /* 0xa4 */
- u32 tcon1_timing_sync; /* 0xa8 */
- u8 res3[0x44]; /* 0xac */
- u32 tcon1_io_polarity; /* 0xf0 */
- u32 tcon1_io_tristate; /* 0xf4 */
- u8 res4[0x108]; /* 0xf8 */
- u32 mux_ctrl; /* 0x200 */
- u8 res5[0x1c]; /* 0x204 */
- u32 lvds_ana0; /* 0x220 */
- u32 lvds_ana1; /* 0x224 */
-};
-
struct sunxi_hdmi_reg {
u32 version_id; /* 0x000 */
u32 ctrl; /* 0x004 */
@@ -346,63 +300,6 @@ struct sunxi_tve_reg {
#define SUNXI_DE_BE_LAYER_ATTR1_FMT_XRGB8888 (0x09 << 8)
#define SUNXI_DE_BE_OUTPUT_COLOR_CTRL_ENABLE 1
-/*
- * LCDC register constants.
- */
-#define SUNXI_LCDC_X(x) (((x) - 1) << 16)
-#define SUNXI_LCDC_Y(y) (((y) - 1) << 0)
-#define SUNXI_LCDC_TCON_VSYNC_MASK (1 << 24)
-#define SUNXI_LCDC_TCON_HSYNC_MASK (1 << 25)
-#define SUNXI_LCDC_CTRL_IO_MAP_MASK (1 << 0)
-#define SUNXI_LCDC_CTRL_IO_MAP_TCON0 (0 << 0)
-#define SUNXI_LCDC_CTRL_IO_MAP_TCON1 (1 << 0)
-#define SUNXI_LCDC_CTRL_TCON_ENABLE (1 << 31)
-#define SUNXI_LCDC_TCON0_FRM_CTRL_RGB666 ((1 << 31) | (0 << 4))
-#define SUNXI_LCDC_TCON0_FRM_CTRL_RGB565 ((1 << 31) | (5 << 4))
-#define SUNXI_LCDC_TCON0_FRM_SEED 0x11111111
-#define SUNXI_LCDC_TCON0_FRM_TAB0 0x01010000
-#define SUNXI_LCDC_TCON0_FRM_TAB1 0x15151111
-#define SUNXI_LCDC_TCON0_FRM_TAB2 0x57575555
-#define SUNXI_LCDC_TCON0_FRM_TAB3 0x7f7f7777
-#define SUNXI_LCDC_TCON0_CTRL_CLK_DELAY(n) (((n) & 0x1f) << 4)
-#define SUNXI_LCDC_TCON0_CTRL_ENABLE (1 << 31)
-#define SUNXI_LCDC_TCON0_DCLK_DIV(n) ((n) << 0)
-#define SUNXI_LCDC_TCON0_DCLK_ENABLE (0xf << 28)
-#define SUNXI_LCDC_TCON0_TIMING_H_BP(n) (((n) - 1) << 0)
-#define SUNXI_LCDC_TCON0_TIMING_H_TOTAL(n) (((n) - 1) << 16)
-#define SUNXI_LCDC_TCON0_TIMING_V_BP(n) (((n) - 1) << 0)
-#define SUNXI_LCDC_TCON0_TIMING_V_TOTAL(n) (((n) * 2) << 16)
-#ifdef CONFIG_SUNXI_GEN_SUN6I
-#define SUNXI_LCDC_TCON0_LVDS_CLK_SEL_TCON0 (1 << 20)
-#else
-#define SUNXI_LCDC_TCON0_LVDS_CLK_SEL_TCON0 0 /* NA */
-#endif
-#define SUNXI_LCDC_TCON0_LVDS_INTF_BITWIDTH(n) ((n) << 26)
-#define SUNXI_LCDC_TCON0_LVDS_INTF_ENABLE (1 << 31)
-#define SUNXI_LCDC_TCON0_IO_POL_DCLK_PHASE(x) ((x) << 28)
-#define SUNXI_LCDC_TCON1_CTRL_CLK_DELAY(n) (((n) & 0x1f) << 4)
-#define SUNXI_LCDC_TCON1_CTRL_INTERLACE_ENABLE (1 << 20)
-#define SUNXI_LCDC_TCON1_CTRL_ENABLE (1 << 31)
-#define SUNXI_LCDC_TCON1_TIMING_H_BP(n) (((n) - 1) << 0)
-#define SUNXI_LCDC_TCON1_TIMING_H_TOTAL(n) (((n) - 1) << 16)
-#define SUNXI_LCDC_TCON1_TIMING_V_BP(n) (((n) - 1) << 0)
-#define SUNXI_LCDC_TCON1_TIMING_V_TOTAL(n) ((n) << 16)
-#define SUNXI_LCDC_MUX_CTRL_SRC0_MASK (0xf << 0)
-#define SUNXI_LCDC_MUX_CTRL_SRC0(x) ((x) << 0)
-#define SUNXI_LCDC_MUX_CTRL_SRC1_MASK (0xf << 4)
-#define SUNXI_LCDC_MUX_CTRL_SRC1(x) ((x) << 4)
-#ifdef CONFIG_SUNXI_GEN_SUN6I
-#define SUNXI_LCDC_LVDS_ANA0 0x40040320
-#define SUNXI_LCDC_LVDS_ANA0_EN_MB (1 << 31)
-#define SUNXI_LCDC_LVDS_ANA0_DRVC (1 << 24)
-#define SUNXI_LCDC_LVDS_ANA0_DRVD(x) ((x) << 20)
-#else
-#define SUNXI_LCDC_LVDS_ANA0 0x3f310000
-#define SUNXI_LCDC_LVDS_ANA0_UPDATE (1 << 22)
-#endif
-#define SUNXI_LCDC_LVDS_ANA1_INIT1 (0x1f << 26 | 0x1f << 10)
-#define SUNXI_LCDC_LVDS_ANA1_INIT2 (0x1f << 16 | 0x1f << 00)
-
/*
* HDMI register constants.
*/
diff --git a/arch/arm/include/asm/arch-sunxi/lcdc.h b/arch/arm/include/asm/arch-sunxi/lcdc.h
new file mode 100644
index 00000000000..e4c8c160ed1
--- /dev/null
+++ b/arch/arm/include/asm/arch-sunxi/lcdc.h
@@ -0,0 +1,128 @@
+/*
+ * Sunxi platform timing controller register and constant defines
+ *
+ * (C) Copyright 2014 Hans de Goede <hdegoede@redhat.com>
+ * (C) Copyright 2017 Jernej Skrabec <jernej.skrabec@siol.net>
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#ifndef _LCDC_H
+#define _LCDC_H
+
+struct ctfb_res_modes;
+
+struct sunxi_lcdc_reg {
+ u32 ctrl; /* 0x00 */
+ u32 int0; /* 0x04 */
+ u32 int1; /* 0x08 */
+ u8 res0[0x04]; /* 0x0c */
+ u32 tcon0_frm_ctrl; /* 0x10 */
+ u32 tcon0_frm_seed[6]; /* 0x14 */
+ u32 tcon0_frm_table[4]; /* 0x2c */
+ u8 res1[4]; /* 0x3c */
+ u32 tcon0_ctrl; /* 0x40 */
+ u32 tcon0_dclk; /* 0x44 */
+ u32 tcon0_timing_active; /* 0x48 */
+ u32 tcon0_timing_h; /* 0x4c */
+ u32 tcon0_timing_v; /* 0x50 */
+ u32 tcon0_timing_sync; /* 0x54 */
+ u32 tcon0_hv_intf; /* 0x58 */
+ u8 res2[0x04]; /* 0x5c */
+ u32 tcon0_cpu_intf; /* 0x60 */
+ u32 tcon0_cpu_wr_dat; /* 0x64 */
+ u32 tcon0_cpu_rd_dat0; /* 0x68 */
+ u32 tcon0_cpu_rd_dat1; /* 0x6c */
+ u32 tcon0_ttl_timing0; /* 0x70 */
+ u32 tcon0_ttl_timing1; /* 0x74 */
+ u32 tcon0_ttl_timing2; /* 0x78 */
+ u32 tcon0_ttl_timing3; /* 0x7c */
+ u32 tcon0_ttl_timing4; /* 0x80 */
+ u32 tcon0_lvds_intf; /* 0x84 */
+ u32 tcon0_io_polarity; /* 0x88 */
+ u32 tcon0_io_tristate; /* 0x8c */
+ u32 tcon1_ctrl; /* 0x90 */
+ u32 tcon1_timing_source; /* 0x94 */
+ u32 tcon1_timing_scale; /* 0x98 */
+ u32 tcon1_timing_out; /* 0x9c */
+ u32 tcon1_timing_h; /* 0xa0 */
+ u32 tcon1_timing_v; /* 0xa4 */
+ u32 tcon1_timing_sync; /* 0xa8 */
+ u8 res3[0x44]; /* 0xac */
+ u32 tcon1_io_polarity; /* 0xf0 */
+ u32 tcon1_io_tristate; /* 0xf4 */
+ u8 res4[0x108]; /* 0xf8 */
+ u32 mux_ctrl; /* 0x200 */
+ u8 res5[0x1c]; /* 0x204 */
+ u32 lvds_ana0; /* 0x220 */
+ u32 lvds_ana1; /* 0x224 */
+};
+
+/*
+ * LCDC register constants.
+ */
+#define SUNXI_LCDC_X(x) (((x) - 1) << 16)
+#define SUNXI_LCDC_Y(y) (((y) - 1) << 0)
+#define SUNXI_LCDC_TCON_VSYNC_MASK (1 << 24)
+#define SUNXI_LCDC_TCON_HSYNC_MASK (1 << 25)
+#define SUNXI_LCDC_CTRL_IO_MAP_MASK (1 << 0)
+#define SUNXI_LCDC_CTRL_IO_MAP_TCON0 (0 << 0)
+#define SUNXI_LCDC_CTRL_IO_MAP_TCON1 (1 << 0)
+#define SUNXI_LCDC_CTRL_TCON_ENABLE (1 << 31)
+#define SUNXI_LCDC_TCON0_FRM_CTRL_RGB666 ((1 << 31) | (0 << 4))
+#define SUNXI_LCDC_TCON0_FRM_CTRL_RGB565 ((1 << 31) | (5 << 4))
+#define SUNXI_LCDC_TCON0_FRM_SEED 0x11111111
+#define SUNXI_LCDC_TCON0_FRM_TAB0 0x01010000
+#define SUNXI_LCDC_TCON0_FRM_TAB1 0x15151111
+#define SUNXI_LCDC_TCON0_FRM_TAB2 0x57575555
+#define SUNXI_LCDC_TCON0_FRM_TAB3 0x7f7f7777
+#define SUNXI_LCDC_TCON0_CTRL_CLK_DELAY(n) (((n) & 0x1f) << 4)
+#define SUNXI_LCDC_TCON0_CTRL_ENABLE (1 << 31)
+#define SUNXI_LCDC_TCON0_DCLK_DIV(n) ((n) << 0)
+#define SUNXI_LCDC_TCON0_DCLK_ENABLE (0xf << 28)
+#define SUNXI_LCDC_TCON0_TIMING_H_BP(n) (((n) - 1) << 0)
+#define SUNXI_LCDC_TCON0_TIMING_H_TOTAL(n) (((n) - 1) << 16)
+#define SUNXI_LCDC_TCON0_TIMING_V_BP(n) (((n) - 1) << 0)
+#define SUNXI_LCDC_TCON0_TIMING_V_TOTAL(n) (((n) * 2) << 16)
+#ifdef CONFIG_SUNXI_GEN_SUN6I
+#define SUNXI_LCDC_TCON0_LVDS_CLK_SEL_TCON0 (1 << 20)
+#else
+#define SUNXI_LCDC_TCON0_LVDS_CLK_SEL_TCON0 0 /* NA */
+#endif
+#define SUNXI_LCDC_TCON0_LVDS_INTF_BITWIDTH(n) ((n) << 26)
+#define SUNXI_LCDC_TCON0_LVDS_INTF_ENABLE (1 << 31)
+#define SUNXI_LCDC_TCON0_IO_POL_DCLK_PHASE(x) ((x) << 28)
+#define SUNXI_LCDC_TCON1_CTRL_CLK_DELAY(n) (((n) & 0x1f) << 4)
+#define SUNXI_LCDC_TCON1_CTRL_INTERLACE_ENABLE (1 << 20)
+#define SUNXI_LCDC_TCON1_CTRL_ENABLE (1 << 31)
+#define SUNXI_LCDC_TCON1_TIMING_H_BP(n) (((n) - 1) << 0)
+#define SUNXI_LCDC_TCON1_TIMING_H_TOTAL(n) (((n) - 1) << 16)
+#define SUNXI_LCDC_TCON1_TIMING_V_BP(n) (((n) - 1) << 0)
+#define SUNXI_LCDC_TCON1_TIMING_V_TOTAL(n) ((n) << 16)
+#define SUNXI_LCDC_MUX_CTRL_SRC0_MASK (0xf << 0)
+#define SUNXI_LCDC_MUX_CTRL_SRC0(x) ((x) << 0)
+#define SUNXI_LCDC_MUX_CTRL_SRC1_MASK (0xf << 4)
+#define SUNXI_LCDC_MUX_CTRL_SRC1(x) ((x) << 4)
+#ifdef CONFIG_SUNXI_GEN_SUN6I
+#define SUNXI_LCDC_LVDS_ANA0 0x40040320
+#define SUNXI_LCDC_LVDS_ANA0_EN_MB (1 << 31)
+#define SUNXI_LCDC_LVDS_ANA0_DRVC (1 << 24)
+#define SUNXI_LCDC_LVDS_ANA0_DRVD(x) ((x) << 20)
+#else
+#define SUNXI_LCDC_LVDS_ANA0 0x3f310000
+#define SUNXI_LCDC_LVDS_ANA0_UPDATE (1 << 22)
+#endif
+#define SUNXI_LCDC_LVDS_ANA1_INIT1 (0x1f << 26 | 0x1f << 10)
+#define SUNXI_LCDC_LVDS_ANA1_INIT2 (0x1f << 16 | 0x1f << 00)
+
+void lcdc_init(struct sunxi_lcdc_reg * const lcdc);
+void lcdc_enable(struct sunxi_lcdc_reg * const lcdc, int depth);
+void lcdc_tcon0_mode_set(struct sunxi_lcdc_reg * const lcdc,
+ const struct ctfb_res_modes *mode,
+ int clk_div, bool for_ext_vga_dac,
+ int depth, int dclk_phase);
+void lcdc_tcon1_mode_set(struct sunxi_lcdc_reg * const lcdc,
+ const struct ctfb_res_modes *mode,
+ bool ext_hvsync, bool is_composite);
+
+#endif /* _LCDC_H */
diff --git a/drivers/video/Makefile b/drivers/video/Makefile
index 7cd6d286584..a80af3104d1 100644
--- a/drivers/video/Makefile
+++ b/drivers/video/Makefile
@@ -51,7 +51,6 @@ obj-$(CONFIG_VIDEO_MXS) += mxsfb.o videomodes.o
obj-$(CONFIG_VIDEO_OMAP3) += omap3_dss.o
obj-$(CONFIG_VIDEO_SANDBOX_SDL) += sandbox_sdl.o
obj-$(CONFIG_VIDEO_SM501) += sm501.o
-obj-$(CONFIG_VIDEO_SUNXI) += sunxi_display.o videomodes.o
obj-$(CONFIG_VIDEO_TEGRA20) += tegra.o
obj-$(CONFIG_VIDEO_VCXK) += bus_vcxk.o
obj-$(CONFIG_VIDEO_VESA) += vesa.o
@@ -64,3 +63,4 @@ obj-${CONFIG_EXYNOS_FB} += exynos/
obj-${CONFIG_VIDEO_ROCKCHIP} += rockchip/
obj-y += bridge/
+obj-y += sunxi/
diff --git a/drivers/video/sunxi/Makefile b/drivers/video/sunxi/Makefile
new file mode 100644
index 00000000000..dfc9b47a1f6
--- /dev/null
+++ b/drivers/video/sunxi/Makefile
@@ -0,0 +1,8 @@
+#
+# (C) Copyright 2000-2007
+# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+#
+# SPDX-License-Identifier: GPL-2.0+
+#
+
+obj-$(CONFIG_VIDEO_SUNXI) += sunxi_display.o lcdc.o ../videomodes.o
diff --git a/drivers/video/sunxi/lcdc.c b/drivers/video/sunxi/lcdc.c
new file mode 100644
index 00000000000..caf1859b0db
--- /dev/null
+++ b/drivers/video/sunxi/lcdc.c
@@ -0,0 +1,207 @@
+/*
+ * Timing controller driver for Allwinner SoCs.
+ *
+ * (C) Copyright 2013-2014 Luc Verhaegen <libv@skynet.be>
+ * (C) Copyright 2014-2015 Hans de Goede <hdegoede@redhat.com>
+ * (C) Copyright 2017 Jernej Skrabec <jernej.skrabec@siol.net>
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include <common.h>
+
+#include <asm/arch/lcdc.h>
+#include <asm/io.h>
+
+#include "../videomodes.h"
+
+static int lcdc_get_clk_delay(const struct ctfb_res_modes *mode, int tcon)
+{
+ int delay;
+
+ delay = mode->lower_margin + mode->vsync_len +
+ mode->upper_margin;
+ if (mode->vmode == FB_VMODE_INTERLACED)
+ delay /= 2;
+ if (tcon == 1)
+ delay -= 2;
+
+ return (delay > 30) ? 30 : delay;
+}
+
+void lcdc_init(struct sunxi_lcdc_reg * const lcdc)
+{
+ /* Init lcdc */
+ writel(0, &lcdc->ctrl); /* Disable tcon */
+ writel(0, &lcdc->int0); /* Disable all interrupts */
+
+ /* Disable tcon0 dot clock */
+ clrbits_le32(&lcdc->tcon0_dclk, SUNXI_LCDC_TCON0_DCLK_ENABLE);
+
+ /* Set all io lines to tristate */
+ writel(0xffffffff, &lcdc->tcon0_io_tristate);
+ writel(0xffffffff, &lcdc->tcon1_io_tristate);
+}
+
+void lcdc_enable(struct sunxi_lcdc_reg * const lcdc, int depth)
+{
+ setbits_le32(&lcdc->ctrl, SUNXI_LCDC_CTRL_TCON_ENABLE);
+#ifdef CONFIG_VIDEO_LCD_IF_LVDS
+ setbits_le32(&lcdc->tcon0_lvds_intf, SUNXI_LCDC_TCON0_LVDS_INTF_ENABLE);
+ setbits_le32(&lcdc->lvds_ana0, SUNXI_LCDC_LVDS_ANA0);
+#ifdef CONFIG_SUNXI_GEN_SUN6I
+ udelay(2); /* delay at least 1200 ns */
+ setbits_le32(&lcdc->lvds_ana0, SUNXI_LCDC_LVDS_ANA0_EN_MB);
+ udelay(2); /* delay at least 1200 ns */
+ setbits_le32(&lcdc->lvds_ana0, SUNXI_LCDC_LVDS_ANA0_DRVC);
+ if (depth == 18)
+ setbits_le32(&lcdc->lvds_ana0, SUNXI_LCDC_LVDS_ANA0_DRVD(0x7));
+ else
+ setbits_le32(&lcdc->lvds_ana0, SUNXI_LCDC_LVDS_ANA0_DRVD(0xf));
+#else
+ setbits_le32(&lcdc->lvds_ana0, SUNXI_LCDC_LVDS_ANA0_UPDATE);
+ udelay(2); /* delay at least 1200 ns */
+ setbits_le32(&lcdc->lvds_ana1, SUNXI_LCDC_LVDS_ANA1_INIT1);
+ udelay(1); /* delay at least 120 ns */
+ setbits_le32(&lcdc->lvds_ana1, SUNXI_LCDC_LVDS_ANA1_INIT2);
+ setbits_le32(&lcdc->lvds_ana0, SUNXI_LCDC_LVDS_ANA0_UPDATE);
+#endif
+#endif
+}
+
+void lcdc_tcon0_mode_set(struct sunxi_lcdc_reg * const lcdc,
+ const struct ctfb_res_modes *mode,
+ int clk_div, bool for_ext_vga_dac,
+ int depth, int dclk_phase)
+{
+ int bp, clk_delay, total, val;
+
+ /* Use tcon0 */
+ clrsetbits_le32(&lcdc->ctrl, SUNXI_LCDC_CTRL_IO_MAP_MASK,
+ SUNXI_LCDC_CTRL_IO_MAP_TCON0);
+
+ clk_delay = lcdc_get_clk_delay(mode, 0);
+ writel(SUNXI_LCDC_TCON0_CTRL_ENABLE |
+ SUNXI_LCDC_TCON0_CTRL_CLK_DELAY(clk_delay), &lcdc->tcon0_ctrl);
+
+ writel(SUNXI_LCDC_TCON0_DCLK_ENABLE |
+ SUNXI_LCDC_TCON0_DCLK_DIV(clk_div), &lcdc->tcon0_dclk);
+
+ writel(SUNXI_LCDC_X(mode->xres) |
+ SUNXI_LCDC_Y(mode->yres), &lcdc->tcon0_timing_active);
+
+ bp = mode->hsync_len + mode->left_margin;
+ total = mode->xres + mode->right_margin + bp;
+ writel(SUNXI_LCDC_TCON0_TIMING_H_TOTAL(total) |
+ SUNXI_LCDC_TCON0_TIMING_H_BP(bp), &lcdc->tcon0_timing_h);
+
+ bp = mode->vsync_len + mode->upper_margin;
+ total = mode->yres + mode->lower_margin + bp;
+ writel(SUNXI_LCDC_TCON0_TIMING_V_TOTAL(total) |
+ SUNXI_LCDC_TCON0_TIMING_V_BP(bp), &lcdc->tcon0_timing_v);
+
+#ifdef CONFIG_VIDEO_LCD_IF_PARALLEL
+ writel(SUNXI_LCDC_X(mode->hsync_len) |
+ SUNXI_LCDC_Y(mode->vsync_len), &lcdc->tcon0_timing_sync);
+
+ writel(0, &lcdc->tcon0_hv_intf);
+ writel(0, &lcdc->tcon0_cpu_intf);
+#endif
+#ifdef CONFIG_VIDEO_LCD_IF_LVDS
+ val = (depth == 18) ? 1 : 0;
+ writel(SUNXI_LCDC_TCON0_LVDS_INTF_BITWIDTH(val) |
+ SUNXI_LCDC_TCON0_LVDS_CLK_SEL_TCON0, &lcdc->tcon0_lvds_intf);
+#endif
+
+ if (depth == 18 || depth == 16) {
+ writel(SUNXI_LCDC_TCON0_FRM_SEED, &lcdc->tcon0_frm_seed[0]);
+ writel(SUNXI_LCDC_TCON0_FRM_SEED, &lcdc->tcon0_frm_seed[1]);
+ writel(SUNXI_LCDC_TCON0_FRM_SEED, &lcdc->tcon0_frm_seed[2]);
+ writel(SUNXI_LCDC_TCON0_FRM_SEED, &lcdc->tcon0_frm_seed[3]);
+ writel(SUNXI_LCDC_TCON0_FRM_SEED, &lcdc->tcon0_frm_seed[4]);
+ writel(SUNXI_LCDC_TCON0_FRM_SEED, &lcdc->tcon0_frm_seed[5]);
+ writel(SUNXI_LCDC_TCON0_FRM_TAB0, &lcdc->tcon0_frm_table[0]);
+ writel(SUNXI_LCDC_TCON0_FRM_TAB1, &lcdc->tcon0_frm_table[1]);
+ writel(SUNXI_LCDC_TCON0_FRM_TAB2, &lcdc->tcon0_frm_table[2]);
+ writel(SUNXI_LCDC_TCON0_FRM_TAB3, &lcdc->tcon0_frm_table[3]);
+ writel(((depth == 18) ?
+ SUNXI_LCDC_TCON0_FRM_CTRL_RGB666 :
+ SUNXI_LCDC_TCON0_FRM_CTRL_RGB565),
+ &lcdc->tcon0_frm_ctrl);
+ }
+
+ val = SUNXI_LCDC_TCON0_IO_POL_DCLK_PHASE(dclk_phase);
+ if (!(mode->sync & FB_SYNC_HOR_HIGH_ACT))
+ val |= SUNXI_LCDC_TCON_HSYNC_MASK;
+ if (!(mode->sync & FB_SYNC_VERT_HIGH_ACT))
+ val |= SUNXI_LCDC_TCON_VSYNC_MASK;
+
+#ifdef CONFIG_VIDEO_VGA_VIA_LCD_FORCE_SYNC_ACTIVE_HIGH
+ if (for_ext_vga_dac)
+ val = 0;
+#endif
+ writel(val, &lcdc->tcon0_io_polarity);
+
+ writel(0, &lcdc->tcon0_io_tristate);
+}
+
+void lcdc_tcon1_mode_set(struct sunxi_lcdc_reg * const lcdc,
+ const struct ctfb_res_modes *mode,
+ bool ext_hvsync, bool is_composite)
+{
+ int bp, clk_delay, total, val, yres;
+
+ /* Use tcon1 */
+ clrsetbits_le32(&lcdc->ctrl, SUNXI_LCDC_CTRL_IO_MAP_MASK,
+ SUNXI_LCDC_CTRL_IO_MAP_TCON1);
+
+ clk_delay = lcdc_get_clk_delay(mode, 1);
+ writel(SUNXI_LCDC_TCON1_CTRL_ENABLE |
+ ((mode->vmode == FB_VMODE_INTERLACED) ?
+ SUNXI_LCDC_TCON1_CTRL_INTERLACE_ENABLE : 0) |
+ SUNXI_LCDC_TCON1_CTRL_CLK_DELAY(clk_delay), &lcdc->tcon1_ctrl);
+
+ yres = mode->yres;
+ if (mode->vmode == FB_VMODE_INTERLACED)
+ yres /= 2;
+ writel(SUNXI_LCDC_X(mode->xres) | SUNXI_LCDC_Y(yres),
+ &lcdc->tcon1_timing_source);
+ writel(SUNXI_LCDC_X(mode->xres) | SUNXI_LCDC_Y(yres),
+ &lcdc->tcon1_timing_scale);
+ writel(SUNXI_LCDC_X(mode->xres) | SUNXI_LCDC_Y(yres),
+ &lcdc->tcon1_timing_out);
+
+ bp = mode->hsync_len + mode->left_margin;
+ total = mode->xres + mode->right_margin + bp;
+ writel(SUNXI_LCDC_TCON1_TIMING_H_TOTAL(total) |
+ SUNXI_LCDC_TCON1_TIMING_H_BP(bp), &lcdc->tcon1_timing_h);
+
+ bp = mode->vsync_len + mode->upper_margin;
+ total = mode->yres + mode->lower_margin + bp;
+ if (mode->vmode == FB_VMODE_NONINTERLACED)
+ total *= 2;
+ writel(SUNXI_LCDC_TCON1_TIMING_V_TOTAL(total) |
+ SUNXI_LCDC_TCON1_TIMING_V_BP(bp), &lcdc->tcon1_timing_v);
+
+ writel(SUNXI_LCDC_X(mode->hsync_len) |
+ SUNXI_LCDC_Y(mode->vsync_len), &lcdc->tcon1_timing_sync);
+
+ if (ext_hvsync) {
+ val = 0;
+ if (mode->sync & FB_SYNC_HOR_HIGH_ACT)
+ val |= SUNXI_LCDC_TCON_HSYNC_MASK;
+ if (mode->sync & FB_SYNC_VERT_HIGH_ACT)
+ val |= SUNXI_LCDC_TCON_VSYNC_MASK;
+ writel(val, &lcdc->tcon1_io_polarity);
+
+ clrbits_le32(&lcdc->tcon1_io_tristate,
+ SUNXI_LCDC_TCON_VSYNC_MASK |
+ SUNXI_LCDC_TCON_HSYNC_MASK);
+ }
+
+#ifdef CONFIG_MACH_SUN5I
+ if (is_composite)
+ clrsetbits_le32(&lcdc->mux_ctrl, SUNXI_LCDC_MUX_CTRL_SRC0_MASK,
+ SUNXI_LCDC_MUX_CTRL_SRC0(1));
+#endif
+}
diff --git a/drivers/video/sunxi_display.c b/drivers/video/sunxi/sunxi_display.c
similarity index 86%
rename from drivers/video/sunxi_display.c
rename to drivers/video/sunxi/sunxi_display.c
index 6f8ee01c107..48192ef87ea 100644
--- a/drivers/video/sunxi_display.c
+++ b/drivers/video/sunxi/sunxi_display.c
@@ -12,6 +12,7 @@
#include <asm/arch/clock.h>
#include <asm/arch/display.h>
#include <asm/arch/gpio.h>
+#include <asm/arch/lcdc.h>
#include <asm/arch/pwm.h>
#include <asm/global_data.h>
#include <asm/gpio.h>
@@ -23,10 +24,10 @@
#include <i2c.h>
#include <malloc.h>
#include <video_fb.h>
-#include "videomodes.h"
-#include "anx9804.h"
-#include "hitachi_tx18d42vm_lcd.h"
-#include "ssd2828.h"
+#include "../videomodes.h"
+#include "../anx9804.h"
+#include "../hitachi_tx18d42vm_lcd.h"
+#include "../ssd2828.h"
#ifdef CONFIG_VIDEO_LCD_BL_PWM_ACTIVE_LOW
#define PWM_ON 0
@@ -650,45 +651,7 @@ static void sunxi_lcdc_init(void)
#endif
#endif
- /* Init lcdc */
- writel(0, &lcdc->ctrl); /* Disable tcon */
- writel(0, &lcdc->int0); /* Disable all interrupts */
-
- /* Disable tcon0 dot clock */
- clrbits_le32(&lcdc->tcon0_dclk, SUNXI_LCDC_TCON0_DCLK_ENABLE);
-
- /* Set all io lines to tristate */
- writel(0xffffffff, &lcdc->tcon0_io_tristate);
- writel(0xffffffff, &lcdc->tcon1_io_tristate);
-}
-
-static void sunxi_lcdc_enable(void)
-{
- struct sunxi_lcdc_reg * const lcdc =
- (struct sunxi_lcdc_reg *)SUNXI_LCD0_BASE;
-
- setbits_le32(&lcdc->ctrl, SUNXI_LCDC_CTRL_TCON_ENABLE);
-#ifdef CONFIG_VIDEO_LCD_IF_LVDS
- setbits_le32(&lcdc->tcon0_lvds_intf, SUNXI_LCDC_TCON0_LVDS_INTF_ENABLE);
- setbits_le32(&lcdc->lvds_ana0, SUNXI_LCDC_LVDS_ANA0);
-#ifdef CONFIG_SUNXI_GEN_SUN6I
- udelay(2); /* delay at least 1200 ns */
- setbits_le32(&lcdc->lvds_ana0, SUNXI_LCDC_LVDS_ANA0_EN_MB);
- udelay(2); /* delay at least 1200 ns */
- setbits_le32(&lcdc->lvds_ana0, SUNXI_LCDC_LVDS_ANA0_DRVC);
- if (sunxi_display.depth == 18)
- setbits_le32(&lcdc->lvds_ana0, SUNXI_LCDC_LVDS_ANA0_DRVD(0x7));
- else
- setbits_le32(&lcdc->lvds_ana0, SUNXI_LCDC_LVDS_ANA0_DRVD(0xf));
-#else
- setbits_le32(&lcdc->lvds_ana0, SUNXI_LCDC_LVDS_ANA0_UPDATE);
- udelay(2); /* delay at least 1200 ns */
- setbits_le32(&lcdc->lvds_ana1, SUNXI_LCDC_LVDS_ANA1_INIT1);
- udelay(1); /* delay at least 120 ns */
- setbits_le32(&lcdc->lvds_ana1, SUNXI_LCDC_LVDS_ANA1_INIT2);
- setbits_le32(&lcdc->lvds_ana0, SUNXI_LCDC_LVDS_ANA0_UPDATE);
-#endif
-#endif
+ lcdc_init(lcdc);
}
static void sunxi_lcdc_panel_enable(void)
@@ -758,25 +721,12 @@ static void sunxi_lcdc_backlight_enable(void)
gpio_direction_output(pin, PWM_ON);
}
-static int sunxi_lcdc_get_clk_delay(const struct ctfb_res_modes *mode, int tcon)
-{
- int delay;
-
- delay = mode->lower_margin + mode->vsync_len + mode->upper_margin;
- if (mode->vmode == FB_VMODE_INTERLACED)
- delay /= 2;
- if (tcon == 1)
- delay -= 2;
-
- return (delay > 30) ? 30 : delay;
-}
-
static void sunxi_lcdc_tcon0_mode_set(const struct ctfb_res_modes *mode,
bool for_ext_vga_dac)
{
struct sunxi_lcdc_reg * const lcdc =
(struct sunxi_lcdc_reg *)SUNXI_LCD0_BASE;
- int bp, clk_delay, clk_div, clk_double, pin, total, val;
+ int clk_div, clk_double, pin;
#if defined CONFIG_MACH_SUN8I && defined CONFIG_VIDEO_LCD_IF_LVDS
for (pin = SUNXI_GPD(18); pin <= SUNXI_GPD(27); pin++) {
@@ -796,73 +746,8 @@ static void sunxi_lcdc_tcon0_mode_set(const struct ctfb_res_modes *mode,
sunxi_lcdc_pll_set(0, mode->pixclock_khz, &clk_div, &clk_double);
- /* Use tcon0 */
- clrsetbits_le32(&lcdc->ctrl, SUNXI_LCDC_CTRL_IO_MAP_MASK,
- SUNXI_LCDC_CTRL_IO_MAP_TCON0);
-
- clk_delay = sunxi_lcdc_get_clk_delay(mode, 0);
- writel(SUNXI_LCDC_TCON0_CTRL_ENABLE |
- SUNXI_LCDC_TCON0_CTRL_CLK_DELAY(clk_delay), &lcdc->tcon0_ctrl);
-
- writel(SUNXI_LCDC_TCON0_DCLK_ENABLE |
- SUNXI_LCDC_TCON0_DCLK_DIV(clk_div), &lcdc->tcon0_dclk);
-
- writel(SUNXI_LCDC_X(mode->xres) | SUNXI_LCDC_Y(mode->yres),
- &lcdc->tcon0_timing_active);
-
- bp = mode->hsync_len + mode->left_margin;
- total = mode->xres + mode->right_margin + bp;
- writel(SUNXI_LCDC_TCON0_TIMING_H_TOTAL(total) |
- SUNXI_LCDC_TCON0_TIMING_H_BP(bp), &lcdc->tcon0_timing_h);
-
- bp = mode->vsync_len + mode->upper_margin;
- total = mode->yres + mode->lower_margin + bp;
- writel(SUNXI_LCDC_TCON0_TIMING_V_TOTAL(total) |
- SUNXI_LCDC_TCON0_TIMING_V_BP(bp), &lcdc->tcon0_timing_v);
-
-#ifdef CONFIG_VIDEO_LCD_IF_PARALLEL
- writel(SUNXI_LCDC_X(mode->hsync_len) | SUNXI_LCDC_Y(mode->vsync_len),
- &lcdc->tcon0_timing_sync);
-
- writel(0, &lcdc->tcon0_hv_intf);
- writel(0, &lcdc->tcon0_cpu_intf);
-#endif
-#ifdef CONFIG_VIDEO_LCD_IF_LVDS
- val = (sunxi_display.depth == 18) ? 1 : 0;
- writel(SUNXI_LCDC_TCON0_LVDS_INTF_BITWIDTH(val) |
- SUNXI_LCDC_TCON0_LVDS_CLK_SEL_TCON0, &lcdc->tcon0_lvds_intf);
-#endif
-
- if (sunxi_display.depth == 18 || sunxi_display.depth == 16) {
- writel(SUNXI_LCDC_TCON0_FRM_SEED, &lcdc->tcon0_frm_seed[0]);
- writel(SUNXI_LCDC_TCON0_FRM_SEED, &lcdc->tcon0_frm_seed[1]);
- writel(SUNXI_LCDC_TCON0_FRM_SEED, &lcdc->tcon0_frm_seed[2]);
- writel(SUNXI_LCDC_TCON0_FRM_SEED, &lcdc->tcon0_frm_seed[3]);
- writel(SUNXI_LCDC_TCON0_FRM_SEED, &lcdc->tcon0_frm_seed[4]);
- writel(SUNXI_LCDC_TCON0_FRM_SEED, &lcdc->tcon0_frm_seed[5]);
- writel(SUNXI_LCDC_TCON0_FRM_TAB0, &lcdc->tcon0_frm_table[0]);
- writel(SUNXI_LCDC_TCON0_FRM_TAB1, &lcdc->tcon0_frm_table[1]);
- writel(SUNXI_LCDC_TCON0_FRM_TAB2, &lcdc->tcon0_frm_table[2]);
- writel(SUNXI_LCDC_TCON0_FRM_TAB3, &lcdc->tcon0_frm_table[3]);
- writel(((sunxi_display.depth == 18) ?
- SUNXI_LCDC_TCON0_FRM_CTRL_RGB666 :
- SUNXI_LCDC_TCON0_FRM_CTRL_RGB565),
- &lcdc->tcon0_frm_ctrl);
- }
-
- val = SUNXI_LCDC_TCON0_IO_POL_DCLK_PHASE(CONFIG_VIDEO_LCD_DCLK_PHASE);
- if (!(mode->sync & FB_SYNC_HOR_HIGH_ACT))
- val |= SUNXI_LCDC_TCON_HSYNC_MASK;
- if (!(mode->sync & FB_SYNC_VERT_HIGH_ACT))
- val |= SUNXI_LCDC_TCON_VSYNC_MASK;
-
-#ifdef CONFIG_VIDEO_VGA_VIA_LCD_FORCE_SYNC_ACTIVE_HIGH
- if (for_ext_vga_dac)
- val = 0;
-#endif
- writel(val, &lcdc->tcon0_io_polarity);
-
- writel(0, &lcdc->tcon0_io_tristate);
+ lcdc_tcon0_mode_set(lcdc, mode, clk_div, for_ext_vga_dac,
+ sunxi_display.depth, CONFIG_VIDEO_LCD_DCLK_PHASE);
}
#if defined CONFIG_VIDEO_HDMI || defined CONFIG_VIDEO_VGA || defined CONFIG_VIDEO_COMPOSITE
@@ -872,65 +757,15 @@ static void sunxi_lcdc_tcon1_mode_set(const struct ctfb_res_modes *mode,
{
struct sunxi_lcdc_reg * const lcdc =
(struct sunxi_lcdc_reg *)SUNXI_LCD0_BASE;
- int bp, clk_delay, total, val, yres;
-
- /* Use tcon1 */
- clrsetbits_le32(&lcdc->ctrl, SUNXI_LCDC_CTRL_IO_MAP_MASK,
- SUNXI_LCDC_CTRL_IO_MAP_TCON1);
- clk_delay = sunxi_lcdc_get_clk_delay(mode, 1);
- writel(SUNXI_LCDC_TCON1_CTRL_ENABLE |
- ((mode->vmode == FB_VMODE_INTERLACED) ?
- SUNXI_LCDC_TCON1_CTRL_INTERLACE_ENABLE : 0) |
- SUNXI_LCDC_TCON1_CTRL_CLK_DELAY(clk_delay), &lcdc->tcon1_ctrl);
-
- yres = mode->yres;
- if (mode->vmode == FB_VMODE_INTERLACED)
- yres /= 2;
- writel(SUNXI_LCDC_X(mode->xres) | SUNXI_LCDC_Y(yres),
- &lcdc->tcon1_timing_source);
- writel(SUNXI_LCDC_X(mode->xres) | SUNXI_LCDC_Y(yres),
- &lcdc->tcon1_timing_scale);
- writel(SUNXI_LCDC_X(mode->xres) | SUNXI_LCDC_Y(yres),
- &lcdc->tcon1_timing_out);
-
- bp = mode->hsync_len + mode->left_margin;
- total = mode->xres + mode->right_margin + bp;
- writel(SUNXI_LCDC_TCON1_TIMING_H_TOTAL(total) |
- SUNXI_LCDC_TCON1_TIMING_H_BP(bp), &lcdc->tcon1_timing_h);
-
- bp = mode->vsync_len + mode->upper_margin;
- total = mode->yres + mode->lower_margin + bp;
- if (mode->vmode == FB_VMODE_NONINTERLACED)
- total *= 2;
- writel(SUNXI_LCDC_TCON1_TIMING_V_TOTAL(total) |
- SUNXI_LCDC_TCON1_TIMING_V_BP(bp), &lcdc->tcon1_timing_v);
-
- writel(SUNXI_LCDC_X(mode->hsync_len) | SUNXI_LCDC_Y(mode->vsync_len),
- &lcdc->tcon1_timing_sync);
+ lcdc_tcon1_mode_set(lcdc, mode, use_portd_hvsync,
+ sunxi_is_composite());
if (use_portd_hvsync) {
sunxi_gpio_set_cfgpin(SUNXI_GPD(26), SUNXI_GPD_LCD0);
sunxi_gpio_set_cfgpin(SUNXI_GPD(27), SUNXI_GPD_LCD0);
-
- val = 0;
- if (mode->sync & FB_SYNC_HOR_HIGH_ACT)
- val |= SUNXI_LCDC_TCON_HSYNC_MASK;
- if (mode->sync & FB_SYNC_VERT_HIGH_ACT)
- val |= SUNXI_LCDC_TCON_VSYNC_MASK;
- writel(val, &lcdc->tcon1_io_polarity);
-
- clrbits_le32(&lcdc->tcon1_io_tristate,
- SUNXI_LCDC_TCON_VSYNC_MASK |
- SUNXI_LCDC_TCON_HSYNC_MASK);
}
-#ifdef CONFIG_MACH_SUN5I
- if (sunxi_is_composite())
- clrsetbits_le32(&lcdc->mux_ctrl, SUNXI_LCDC_MUX_CTRL_SRC0_MASK,
- SUNXI_LCDC_MUX_CTRL_SRC0(1));
-#endif
-
sunxi_lcdc_pll_set(1, mode->pixclock_khz, clk_div, clk_double);
}
#endif /* CONFIG_VIDEO_HDMI || defined CONFIG_VIDEO_VGA || CONFIG_VIDEO_COMPOSITE */
@@ -1212,6 +1047,8 @@ static void sunxi_mode_set(const struct ctfb_res_modes *mode,
unsigned int address)
{
int __maybe_unused clk_div, clk_double;
+ struct sunxi_lcdc_reg * const lcdc =
+ (struct sunxi_lcdc_reg *)SUNXI_LCD0_BASE;
switch (sunxi_display.monitor) {
case sunxi_monitor_none:
@@ -1223,7 +1060,7 @@ static void sunxi_mode_set(const struct ctfb_res_modes *mode,
sunxi_lcdc_tcon1_mode_set(mode, &clk_div, &clk_double, 0);
sunxi_hdmi_mode_set(mode, clk_div, clk_double);
sunxi_composer_enable();
- sunxi_lcdc_enable();
+ lcdc_enable(lcdc, sunxi_display.depth);
sunxi_hdmi_enable();
#endif
break;
@@ -1253,7 +1090,7 @@ static void sunxi_mode_set(const struct ctfb_res_modes *mode,
sunxi_composer_mode_set(mode, address);
sunxi_lcdc_tcon0_mode_set(mode, false);
sunxi_composer_enable();
- sunxi_lcdc_enable();
+ lcdc_enable(lcdc, sunxi_display.depth);
#ifdef CONFIG_VIDEO_LCD_SSD2828
sunxi_ssd2828_init(mode);
#endif
@@ -1265,13 +1102,13 @@ static void sunxi_mode_set(const struct ctfb_res_modes *mode,
sunxi_lcdc_tcon1_mode_set(mode, &clk_div, &clk_double, 1);
sunxi_tvencoder_mode_set();
sunxi_composer_enable();
- sunxi_lcdc_enable();
+ lcdc_enable(lcdc, sunxi_display.depth);
sunxi_tvencoder_enable();
#elif defined CONFIG_VIDEO_VGA_VIA_LCD
sunxi_composer_mode_set(mode, address);
sunxi_lcdc_tcon0_mode_set(mode, true);
sunxi_composer_enable();
- sunxi_lcdc_enable();
+ lcdc_enable(lcdc, sunxi_display.depth);
sunxi_vga_external_dac_enable();
#endif
break;
@@ -1284,7 +1121,7 @@ static void sunxi_mode_set(const struct ctfb_res_modes *mode,
sunxi_lcdc_tcon1_mode_set(mode, &clk_div, &clk_double, 0);
sunxi_tvencoder_mode_set();
sunxi_composer_enable();
- sunxi_lcdc_enable();
+ lcdc_enable(lcdc, sunxi_display.depth);
sunxi_tvencoder_enable();
#endif
break;
--
GitLab
From 30ca20234e0cdce6e514ee6c1e73c97578efaea3 Mon Sep 17 00:00:00 2001
From: Jernej Skrabec <jernej.skrabec@siol.net>
Date: Mon, 27 Mar 2017 19:22:30 +0200
Subject: [PATCH 110/282] sunxi: video: Convert lcdc to use struct
display_timing
Video driver for older Allwinner SoCs uses cfb console framework which
in turn uses struct ctfb_res_modes to hold timing informations. However,
DM video framework uses different structure - struct display_timing.
It makes more sense to convert lcdc to use new timing structure because
all new drivers should use DM video framework and older drivers might be
rewritten to use new framework too.
Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
---
arch/arm/include/asm/arch-sunxi/lcdc.h | 6 +--
drivers/video/sunxi/lcdc.c | 64 +++++++++++++-------------
drivers/video/sunxi/sunxi_display.c | 35 +++++++++++++-
3 files changed, 67 insertions(+), 38 deletions(-)
diff --git a/arch/arm/include/asm/arch-sunxi/lcdc.h b/arch/arm/include/asm/arch-sunxi/lcdc.h
index e4c8c160ed1..a751698b4fe 100644
--- a/arch/arm/include/asm/arch-sunxi/lcdc.h
+++ b/arch/arm/include/asm/arch-sunxi/lcdc.h
@@ -10,7 +10,7 @@
#ifndef _LCDC_H
#define _LCDC_H
-struct ctfb_res_modes;
+#include <fdtdec.h>
struct sunxi_lcdc_reg {
u32 ctrl; /* 0x00 */
@@ -118,11 +118,11 @@ struct sunxi_lcdc_reg {
void lcdc_init(struct sunxi_lcdc_reg * const lcdc);
void lcdc_enable(struct sunxi_lcdc_reg * const lcdc, int depth);
void lcdc_tcon0_mode_set(struct sunxi_lcdc_reg * const lcdc,
- const struct ctfb_res_modes *mode,
+ const struct display_timing *mode,
int clk_div, bool for_ext_vga_dac,
int depth, int dclk_phase);
void lcdc_tcon1_mode_set(struct sunxi_lcdc_reg * const lcdc,
- const struct ctfb_res_modes *mode,
+ const struct display_timing *mode,
bool ext_hvsync, bool is_composite);
#endif /* _LCDC_H */
diff --git a/drivers/video/sunxi/lcdc.c b/drivers/video/sunxi/lcdc.c
index caf1859b0db..8c8fb2e4ee5 100644
--- a/drivers/video/sunxi/lcdc.c
+++ b/drivers/video/sunxi/lcdc.c
@@ -13,15 +13,13 @@
#include <asm/arch/lcdc.h>
#include <asm/io.h>
-#include "../videomodes.h"
-
-static int lcdc_get_clk_delay(const struct ctfb_res_modes *mode, int tcon)
+static int lcdc_get_clk_delay(const struct display_timing *mode, int tcon)
{
int delay;
- delay = mode->lower_margin + mode->vsync_len +
- mode->upper_margin;
- if (mode->vmode == FB_VMODE_INTERLACED)
+ delay = mode->vfront_porch.typ + mode->vsync_len.typ +
+ mode->vback_porch.typ;
+ if (mode->flags & DISPLAY_FLAGS_INTERLACED)
delay /= 2;
if (tcon == 1)
delay -= 2;
@@ -70,7 +68,7 @@ void lcdc_enable(struct sunxi_lcdc_reg * const lcdc, int depth)
}
void lcdc_tcon0_mode_set(struct sunxi_lcdc_reg * const lcdc,
- const struct ctfb_res_modes *mode,
+ const struct display_timing *mode,
int clk_div, bool for_ext_vga_dac,
int depth, int dclk_phase)
{
@@ -87,22 +85,22 @@ void lcdc_tcon0_mode_set(struct sunxi_lcdc_reg * const lcdc,
writel(SUNXI_LCDC_TCON0_DCLK_ENABLE |
SUNXI_LCDC_TCON0_DCLK_DIV(clk_div), &lcdc->tcon0_dclk);
- writel(SUNXI_LCDC_X(mode->xres) |
- SUNXI_LCDC_Y(mode->yres), &lcdc->tcon0_timing_active);
+ writel(SUNXI_LCDC_X(mode->hactive.typ) |
+ SUNXI_LCDC_Y(mode->vactive.typ), &lcdc->tcon0_timing_active);
- bp = mode->hsync_len + mode->left_margin;
- total = mode->xres + mode->right_margin + bp;
+ bp = mode->hsync_len.typ + mode->hback_porch.typ;
+ total = mode->hactive.typ + mode->hfront_porch.typ + bp;
writel(SUNXI_LCDC_TCON0_TIMING_H_TOTAL(total) |
SUNXI_LCDC_TCON0_TIMING_H_BP(bp), &lcdc->tcon0_timing_h);
- bp = mode->vsync_len + mode->upper_margin;
- total = mode->yres + mode->lower_margin + bp;
+ bp = mode->vsync_len.typ + mode->vback_porch.typ;
+ total = mode->vactive.typ + mode->vfront_porch.typ + bp;
writel(SUNXI_LCDC_TCON0_TIMING_V_TOTAL(total) |
SUNXI_LCDC_TCON0_TIMING_V_BP(bp), &lcdc->tcon0_timing_v);
#ifdef CONFIG_VIDEO_LCD_IF_PARALLEL
- writel(SUNXI_LCDC_X(mode->hsync_len) |
- SUNXI_LCDC_Y(mode->vsync_len), &lcdc->tcon0_timing_sync);
+ writel(SUNXI_LCDC_X(mode->hsync_len.typ) |
+ SUNXI_LCDC_Y(mode->vsync_len.typ), &lcdc->tcon0_timing_sync);
writel(0, &lcdc->tcon0_hv_intf);
writel(0, &lcdc->tcon0_cpu_intf);
@@ -131,9 +129,9 @@ void lcdc_tcon0_mode_set(struct sunxi_lcdc_reg * const lcdc,
}
val = SUNXI_LCDC_TCON0_IO_POL_DCLK_PHASE(dclk_phase);
- if (!(mode->sync & FB_SYNC_HOR_HIGH_ACT))
+ if (mode->flags & DISPLAY_FLAGS_HSYNC_LOW)
val |= SUNXI_LCDC_TCON_HSYNC_MASK;
- if (!(mode->sync & FB_SYNC_VERT_HIGH_ACT))
+ if (mode->flags & DISPLAY_FLAGS_VSYNC_LOW)
val |= SUNXI_LCDC_TCON_VSYNC_MASK;
#ifdef CONFIG_VIDEO_VGA_VIA_LCD_FORCE_SYNC_ACTIVE_HIGH
@@ -146,7 +144,7 @@ void lcdc_tcon0_mode_set(struct sunxi_lcdc_reg * const lcdc,
}
void lcdc_tcon1_mode_set(struct sunxi_lcdc_reg * const lcdc,
- const struct ctfb_res_modes *mode,
+ const struct display_timing *mode,
bool ext_hvsync, bool is_composite)
{
int bp, clk_delay, total, val, yres;
@@ -157,40 +155,40 @@ void lcdc_tcon1_mode_set(struct sunxi_lcdc_reg * const lcdc,
clk_delay = lcdc_get_clk_delay(mode, 1);
writel(SUNXI_LCDC_TCON1_CTRL_ENABLE |
- ((mode->vmode == FB_VMODE_INTERLACED) ?
+ ((mode->flags & DISPLAY_FLAGS_INTERLACED) ?
SUNXI_LCDC_TCON1_CTRL_INTERLACE_ENABLE : 0) |
SUNXI_LCDC_TCON1_CTRL_CLK_DELAY(clk_delay), &lcdc->tcon1_ctrl);
- yres = mode->yres;
- if (mode->vmode == FB_VMODE_INTERLACED)
+ yres = mode->vactive.typ;
+ if (mode->flags & DISPLAY_FLAGS_INTERLACED)
yres /= 2;
- writel(SUNXI_LCDC_X(mode->xres) | SUNXI_LCDC_Y(yres),
+ writel(SUNXI_LCDC_X(mode->hactive.typ) | SUNXI_LCDC_Y(yres),
&lcdc->tcon1_timing_source);
- writel(SUNXI_LCDC_X(mode->xres) | SUNXI_LCDC_Y(yres),
+ writel(SUNXI_LCDC_X(mode->hactive.typ) | SUNXI_LCDC_Y(yres),
&lcdc->tcon1_timing_scale);
- writel(SUNXI_LCDC_X(mode->xres) | SUNXI_LCDC_Y(yres),
+ writel(SUNXI_LCDC_X(mode->hactive.typ) | SUNXI_LCDC_Y(yres),
&lcdc->tcon1_timing_out);
- bp = mode->hsync_len + mode->left_margin;
- total = mode->xres + mode->right_margin + bp;
+ bp = mode->hsync_len.typ + mode->hback_porch.typ;
+ total = mode->hactive.typ + mode->hfront_porch.typ + bp;
writel(SUNXI_LCDC_TCON1_TIMING_H_TOTAL(total) |
SUNXI_LCDC_TCON1_TIMING_H_BP(bp), &lcdc->tcon1_timing_h);
- bp = mode->vsync_len + mode->upper_margin;
- total = mode->yres + mode->lower_margin + bp;
- if (mode->vmode == FB_VMODE_NONINTERLACED)
+ bp = mode->vsync_len.typ + mode->vback_porch.typ;
+ total = mode->vactive.typ + mode->vfront_porch.typ + bp;
+ if (!(mode->flags & DISPLAY_FLAGS_INTERLACED))
total *= 2;
writel(SUNXI_LCDC_TCON1_TIMING_V_TOTAL(total) |
SUNXI_LCDC_TCON1_TIMING_V_BP(bp), &lcdc->tcon1_timing_v);
- writel(SUNXI_LCDC_X(mode->hsync_len) |
- SUNXI_LCDC_Y(mode->vsync_len), &lcdc->tcon1_timing_sync);
+ writel(SUNXI_LCDC_X(mode->hsync_len.typ) |
+ SUNXI_LCDC_Y(mode->vsync_len.typ), &lcdc->tcon1_timing_sync);
if (ext_hvsync) {
val = 0;
- if (mode->sync & FB_SYNC_HOR_HIGH_ACT)
+ if (mode->flags & DISPLAY_FLAGS_HSYNC_HIGH)
val |= SUNXI_LCDC_TCON_HSYNC_MASK;
- if (mode->sync & FB_SYNC_VERT_HIGH_ACT)
+ if (mode->flags & DISPLAY_FLAGS_VSYNC_HIGH)
val |= SUNXI_LCDC_TCON_VSYNC_MASK;
writel(val, &lcdc->tcon1_io_polarity);
diff --git a/drivers/video/sunxi/sunxi_display.c b/drivers/video/sunxi/sunxi_display.c
index 48192ef87ea..92c9d06054f 100644
--- a/drivers/video/sunxi/sunxi_display.c
+++ b/drivers/video/sunxi/sunxi_display.c
@@ -721,12 +721,40 @@ static void sunxi_lcdc_backlight_enable(void)
gpio_direction_output(pin, PWM_ON);
}
+static void sunxi_ctfb_mode_to_display_timing(const struct ctfb_res_modes *mode,
+ struct display_timing *timing)
+{
+ timing->pixelclock.typ = mode->pixclock_khz * 1000;
+
+ timing->hactive.typ = mode->xres;
+ timing->hfront_porch.typ = mode->right_margin;
+ timing->hback_porch.typ = mode->left_margin;
+ timing->hsync_len.typ = mode->hsync_len;
+
+ timing->vactive.typ = mode->yres;
+ timing->vfront_porch.typ = mode->lower_margin;
+ timing->vback_porch.typ = mode->upper_margin;
+ timing->vsync_len.typ = mode->vsync_len;
+
+ if (mode->sync & FB_SYNC_HOR_HIGH_ACT)
+ timing->flags |= DISPLAY_FLAGS_HSYNC_HIGH;
+ else
+ timing->flags |= DISPLAY_FLAGS_HSYNC_LOW;
+ if (mode->sync & FB_SYNC_VERT_HIGH_ACT)
+ timing->flags |= DISPLAY_FLAGS_VSYNC_HIGH;
+ else
+ timing->flags |= DISPLAY_FLAGS_VSYNC_LOW;
+ if (mode->vmode == FB_VMODE_INTERLACED)
+ timing->flags |= DISPLAY_FLAGS_INTERLACED;
+}
+
static void sunxi_lcdc_tcon0_mode_set(const struct ctfb_res_modes *mode,
bool for_ext_vga_dac)
{
struct sunxi_lcdc_reg * const lcdc =
(struct sunxi_lcdc_reg *)SUNXI_LCD0_BASE;
int clk_div, clk_double, pin;
+ struct display_timing timing;
#if defined CONFIG_MACH_SUN8I && defined CONFIG_VIDEO_LCD_IF_LVDS
for (pin = SUNXI_GPD(18); pin <= SUNXI_GPD(27); pin++) {
@@ -746,7 +774,8 @@ static void sunxi_lcdc_tcon0_mode_set(const struct ctfb_res_modes *mode,
sunxi_lcdc_pll_set(0, mode->pixclock_khz, &clk_div, &clk_double);
- lcdc_tcon0_mode_set(lcdc, mode, clk_div, for_ext_vga_dac,
+ sunxi_ctfb_mode_to_display_timing(mode, &timing);
+ lcdc_tcon0_mode_set(lcdc, &timing, clk_div, for_ext_vga_dac,
sunxi_display.depth, CONFIG_VIDEO_LCD_DCLK_PHASE);
}
@@ -757,8 +786,10 @@ static void sunxi_lcdc_tcon1_mode_set(const struct ctfb_res_modes *mode,
{
struct sunxi_lcdc_reg * const lcdc =
(struct sunxi_lcdc_reg *)SUNXI_LCD0_BASE;
+ struct display_timing timing;
- lcdc_tcon1_mode_set(lcdc, mode, use_portd_hvsync,
+ sunxi_ctfb_mode_to_display_timing(mode, &timing);
+ lcdc_tcon1_mode_set(lcdc, &timing, use_portd_hvsync,
sunxi_is_composite());
if (use_portd_hvsync) {
--
GitLab
From 1ae5def6be484b0ee2c6ef72c750349b72342ac9 Mon Sep 17 00:00:00 2001
From: Jernej Skrabec <jernej.skrabec@siol.net>
Date: Mon, 27 Mar 2017 19:22:31 +0200
Subject: [PATCH 111/282] sunxi: Add clock support for DE2/HDMI/TCON on newer
SoCs
This is needed for HDMI, which will be added later.
Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
---
arch/arm/include/asm/arch-sunxi/clock_sun6i.h | 54 +++++++++++++++++++
arch/arm/mach-sunxi/clock_sun6i.c | 40 +++++++++++++-
board/sunxi/Kconfig | 6 +++
drivers/video/sunxi/lcdc.c | 4 ++
4 files changed, 103 insertions(+), 1 deletion(-)
diff --git a/arch/arm/include/asm/arch-sunxi/clock_sun6i.h b/arch/arm/include/asm/arch-sunxi/clock_sun6i.h
index 1aefd5a64c1..a44ea775763 100644
--- a/arch/arm/include/asm/arch-sunxi/clock_sun6i.h
+++ b/arch/arm/include/asm/arch-sunxi/clock_sun6i.h
@@ -67,13 +67,22 @@ struct sunxi_ccm_reg {
u32 dram_pll_cfg; /* 0xf8 PLL_DDR cfg register, A33 only */
u32 mbus_reset; /* 0xfc MBUS reset control, A33 only */
u32 dram_clk_gate; /* 0x100 DRAM module gating */
+#ifdef CONFIG_SUNXI_DE2
+ u32 de_clk_cfg; /* 0x104 DE module clock */
+#else
u32 be0_clk_cfg; /* 0x104 BE0 module clock */
+#endif
u32 be1_clk_cfg; /* 0x108 BE1 module clock */
u32 fe0_clk_cfg; /* 0x10c FE0 module clock */
u32 fe1_clk_cfg; /* 0x110 FE1 module clock */
u32 mp_clk_cfg; /* 0x114 MP module clock */
+#ifdef CONFIG_SUNXI_DE2
+ u32 lcd0_clk_cfg; /* 0x118 LCD0 module clock */
+ u32 lcd1_clk_cfg; /* 0x11c LCD1 module clock */
+#else
u32 lcd0_ch0_clk_cfg; /* 0x118 LCD0 CH0 module clock */
u32 lcd1_ch0_clk_cfg; /* 0x11c LCD1 CH0 module clock */
+#endif
u32 reserved14[3];
u32 lcd0_ch1_clk_cfg; /* 0x12c LCD0 CH1 module clock */
u32 lcd1_ch1_clk_cfg; /* 0x130 LCD1 CH1 module clock */
@@ -85,7 +94,11 @@ struct sunxi_ccm_reg {
u32 dmic_clk_cfg; /* 0x148 Digital Mic module clock*/
u32 reserved15;
u32 hdmi_clk_cfg; /* 0x150 HDMI module clock */
+#ifdef CONFIG_SUNXI_DE2
+ u32 hdmi_slow_clk_cfg; /* 0x154 HDMI slow module clock */
+#else
u32 ps_clk_cfg; /* 0x154 PS module clock */
+#endif
u32 mtc_clk_cfg; /* 0x158 MTC module clock */
u32 mbus0_clk_cfg; /* 0x15c MBUS0 module clock */
u32 mbus1_clk_cfg; /* 0x160 MBUS1 module clock */
@@ -193,6 +206,7 @@ struct sunxi_ccm_reg {
#define CCM_PLL3_CTRL_N_MASK (0x7f << CCM_PLL3_CTRL_N_SHIFT)
#define CCM_PLL3_CTRL_N(n) ((((n) - 1) & 0x7f) << 8)
#define CCM_PLL3_CTRL_INTEGER_MODE (0x1 << 24)
+#define CCM_PLL3_CTRL_LOCK (0x1 << 28)
#define CCM_PLL3_CTRL_EN (0x1 << 31)
#define CCM_PLL5_CTRL_M(n) ((((n) - 1) & 0x3) << 0)
@@ -222,6 +236,16 @@ struct sunxi_ccm_reg {
#define CCM_MIPI_PLL_CTRL_LDO_EN (0x3 << 22)
#define CCM_MIPI_PLL_CTRL_EN (0x1 << 31)
+#define CCM_PLL10_CTRL_M_SHIFT 0
+#define CCM_PLL10_CTRL_M_MASK (0xf << CCM_PLL10_CTRL_M_SHIFT)
+#define CCM_PLL10_CTRL_M(n) ((((n) - 1) & 0xf) << 0)
+#define CCM_PLL10_CTRL_N_SHIFT 8
+#define CCM_PLL10_CTRL_N_MASK (0x7f << CCM_PLL10_CTRL_N_SHIFT)
+#define CCM_PLL10_CTRL_N(n) ((((n) - 1) & 0x7f) << 8)
+#define CCM_PLL10_CTRL_INTEGER_MODE (0x1 << 24)
+#define CCM_PLL10_CTRL_LOCK (0x1 << 28)
+#define CCM_PLL10_CTRL_EN (0x1 << 31)
+
#define CCM_PLL11_CTRL_N(n) ((((n) - 1) & 0x3f) << 8)
#define CCM_PLL11_CTRL_SIGMA_DELTA_EN (0x1 << 24)
#define CCM_PLL11_CTRL_UPD (0x1 << 30)
@@ -273,9 +297,15 @@ struct sunxi_ccm_reg {
#define AHB_GATE_OFFSET_DRC0 25
#define AHB_GATE_OFFSET_DE_FE0 14
#define AHB_GATE_OFFSET_DE_BE0 12
+#define AHB_GATE_OFFSET_DE 12
#define AHB_GATE_OFFSET_HDMI 11
+#ifndef CONFIG_SUNXI_DE2
#define AHB_GATE_OFFSET_LCD1 5
#define AHB_GATE_OFFSET_LCD0 4
+#else
+#define AHB_GATE_OFFSET_LCD1 4
+#define AHB_GATE_OFFSET_LCD0 3
+#endif
#define CCM_MMC_CTRL_M(x) ((x) - 1)
#define CCM_MMC_CTRL_OCLK_DLY(x) ((x) << 8)
@@ -357,6 +387,12 @@ struct sunxi_ccm_reg {
#define CCM_LCD_CH1_CTRL_PLL7_2X (3 << 24)
#define CCM_LCD_CH1_CTRL_GATE (0x1 << 31)
+#define CCM_LCD0_CTRL_GATE (0x1 << 31)
+#define CCM_LCD0_CTRL_M(n) ((((n) - 1) & 0xf) << 0)
+
+#define CCM_LCD1_CTRL_GATE (0x1 << 31)
+#define CCM_LCD1_CTRL_M(n) ((((n) - 1) & 0xf) << 0)
+
#define CCM_HDMI_CTRL_M(n) ((((n) - 1) & 0xf) << 0)
#define CCM_HDMI_CTRL_PLL_MASK (3 << 24)
#define CCM_HDMI_CTRL_PLL3 (0 << 24)
@@ -366,6 +402,8 @@ struct sunxi_ccm_reg {
#define CCM_HDMI_CTRL_DDC_GATE (0x1 << 30)
#define CCM_HDMI_CTRL_GATE (0x1 << 31)
+#define CCM_HDMI_SLOW_CTRL_DDC_GATE (1 << 31)
+
#if defined(CONFIG_MACH_SUN50I)
#define MBUS_CLK_DEFAULT 0x81000002 /* PLL6x2 / 3 */
#elif defined(CONFIG_MACH_SUN8I)
@@ -393,9 +431,16 @@ struct sunxi_ccm_reg {
#define AHB_RESET_OFFSET_DRC0 25
#define AHB_RESET_OFFSET_DE_FE0 14
#define AHB_RESET_OFFSET_DE_BE0 12
+#define AHB_RESET_OFFSET_DE 12
#define AHB_RESET_OFFSET_HDMI 11
+#define AHB_RESET_OFFSET_HDMI2 10
+#ifndef CONFIG_SUNXI_DE2
#define AHB_RESET_OFFSET_LCD1 5
#define AHB_RESET_OFFSET_LCD0 4
+#else
+#define AHB_RESET_OFFSET_LCD1 4
+#define AHB_RESET_OFFSET_LCD0 3
+#endif
/* ahb_reset2 offsets */
#define AHB_RESET_OFFSET_EPHY 2
@@ -418,6 +463,13 @@ struct sunxi_ccm_reg {
#define CCM_DE_CTRL_PLL10 (5 << 24)
#define CCM_DE_CTRL_GATE (1 << 31)
+/* CCM bits common to all Display Engine 2.0 clock ctrl regs */
+#define CCM_DE2_CTRL_M(n) ((((n) - 1) & 0xf) << 0)
+#define CCM_DE2_CTRL_PLL_MASK (3 << 24)
+#define CCM_DE2_CTRL_PLL6_2X (0 << 24)
+#define CCM_DE2_CTRL_PLL10 (1 << 24)
+#define CCM_DE2_CTRL_GATE (0x1 << 31)
+
/* CCU security switch, H3 only */
#define CCM_SEC_SWITCH_MBUS_NONSEC (1 << 2)
#define CCM_SEC_SWITCH_BUS_NONSEC (1 << 1)
@@ -426,7 +478,9 @@ struct sunxi_ccm_reg {
#ifndef __ASSEMBLY__
void clock_set_pll1(unsigned int hz);
void clock_set_pll3(unsigned int hz);
+void clock_set_pll3_factors(int m, int n);
void clock_set_pll5(unsigned int clk, bool sigma_delta_enable);
+void clock_set_pll10(unsigned int hz);
void clock_set_pll11(unsigned int clk, bool sigma_delta_enable);
void clock_set_mipi_pll(unsigned int hz);
unsigned int clock_get_pll3(void);
diff --git a/arch/arm/mach-sunxi/clock_sun6i.c b/arch/arm/mach-sunxi/clock_sun6i.c
index 9068c88ab2f..631bc6e2500 100644
--- a/arch/arm/mach-sunxi/clock_sun6i.c
+++ b/arch/arm/mach-sunxi/clock_sun6i.c
@@ -35,7 +35,7 @@ void clock_init_safe(void)
clrbits_le32(&prcm->pll_ctrl1, PRCM_PLL_CTRL_LDO_KEY_MASK);
#endif
-#ifdef CONFIG_MACH_SUN8I_R40
+#if defined(CONFIG_MACH_SUN8I_R40) || defined(CONFIG_MACH_SUN50I)
/* Set PLL lock enable bits and switch to old lock mode */
writel(GENMASK(12, 0), &ccm->pll_lock_ctrl);
#endif
@@ -150,6 +150,22 @@ void clock_set_pll3(unsigned int clk)
&ccm->pll3_cfg);
}
+#ifdef CONFIG_SUNXI_DE2
+void clock_set_pll3_factors(int m, int n)
+{
+ struct sunxi_ccm_reg * const ccm =
+ (struct sunxi_ccm_reg *)SUNXI_CCM_BASE;
+
+ /* PLL3 rate = 24000000 * n / m */
+ writel(CCM_PLL3_CTRL_EN | CCM_PLL3_CTRL_INTEGER_MODE |
+ CCM_PLL3_CTRL_N(n) | CCM_PLL3_CTRL_M(m),
+ &ccm->pll3_cfg);
+
+ while (!(readl(&ccm->pll3_cfg) & CCM_PLL3_CTRL_LOCK))
+ ;
+}
+#endif
+
void clock_set_pll5(unsigned int clk, bool sigma_delta_enable)
{
struct sunxi_ccm_reg * const ccm =
@@ -222,6 +238,28 @@ done:
}
#endif
+#ifdef CONFIG_SUNXI_DE2
+void clock_set_pll10(unsigned int clk)
+{
+ struct sunxi_ccm_reg * const ccm =
+ (struct sunxi_ccm_reg *)SUNXI_CCM_BASE;
+ const int m = 2; /* 12 MHz steps */
+
+ if (clk == 0) {
+ clrbits_le32(&ccm->pll10_cfg, CCM_PLL10_CTRL_EN);
+ return;
+ }
+
+ /* PLL10 rate = 24000000 * n / m */
+ writel(CCM_PLL10_CTRL_EN | CCM_PLL10_CTRL_INTEGER_MODE |
+ CCM_PLL10_CTRL_N(clk / (24000000 / m)) | CCM_PLL10_CTRL_M(m),
+ &ccm->pll10_cfg);
+
+ while (!(readl(&ccm->pll10_cfg) & CCM_PLL10_CTRL_LOCK))
+ ;
+}
+#endif
+
#if defined(CONFIG_MACH_SUN8I_A33) || \
defined(CONFIG_MACH_SUN8I_R40) || \
defined(CONFIG_MACH_SUN50I)
diff --git a/board/sunxi/Kconfig b/board/sunxi/Kconfig
index c4fba849213..7350e25e289 100644
--- a/board/sunxi/Kconfig
+++ b/board/sunxi/Kconfig
@@ -58,6 +58,7 @@ config SUNXI_GEN_SUN6I
config MACH_SUNXI_H3_H5
bool
+ select SUNXI_DE2
select SUNXI_GEN_SUN6I
select SUPPORT_SPL
@@ -153,6 +154,7 @@ config MACH_SUN9I
config MACH_SUN50I
bool "sun50i (Allwinner A64)"
select ARM64
+ select SUNXI_DE2
select SUNXI_GEN_SUN6I
select SUNXI_HIGH_SRAM
select SUPPORT_SPL
@@ -689,6 +691,10 @@ config VIDEO_LCD_IF_PARALLEL
config VIDEO_LCD_IF_LVDS
bool
+config SUNXI_DE2
+ bool
+ default n
+
choice
prompt "LCD panel support"
diff --git a/drivers/video/sunxi/lcdc.c b/drivers/video/sunxi/lcdc.c
index 8c8fb2e4ee5..7d215b713ef 100644
--- a/drivers/video/sunxi/lcdc.c
+++ b/drivers/video/sunxi/lcdc.c
@@ -74,9 +74,11 @@ void lcdc_tcon0_mode_set(struct sunxi_lcdc_reg * const lcdc,
{
int bp, clk_delay, total, val;
+#ifndef CONFIG_SUNXI_DE2
/* Use tcon0 */
clrsetbits_le32(&lcdc->ctrl, SUNXI_LCDC_CTRL_IO_MAP_MASK,
SUNXI_LCDC_CTRL_IO_MAP_TCON0);
+#endif
clk_delay = lcdc_get_clk_delay(mode, 0);
writel(SUNXI_LCDC_TCON0_CTRL_ENABLE |
@@ -149,9 +151,11 @@ void lcdc_tcon1_mode_set(struct sunxi_lcdc_reg * const lcdc,
{
int bp, clk_delay, total, val, yres;
+#ifndef CONFIG_SUNXI_DE2
/* Use tcon1 */
clrsetbits_le32(&lcdc->ctrl, SUNXI_LCDC_CTRL_IO_MAP_MASK,
SUNXI_LCDC_CTRL_IO_MAP_TCON1);
+#endif
clk_delay = lcdc_get_clk_delay(mode, 1);
writel(SUNXI_LCDC_TCON1_CTRL_ENABLE |
--
GitLab
From 395e2142e40068dec646b642a6394d798ebd348e Mon Sep 17 00:00:00 2001
From: Masahiro Yamada <yamada.masahiro@socionext.com>
Date: Fri, 14 Apr 2017 11:30:05 +0900
Subject: [PATCH 112/282] ARM: uniphier: setup EHCI PHY paramters for LD11
Set the same PHY parameters as the Boot ROM uses.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
---
arch/arm/mach-uniphier/clk/clk-ld11.c | 9 +++++++++
arch/arm/mach-uniphier/sg-regs.h | 1 +
2 files changed, 10 insertions(+)
diff --git a/arch/arm/mach-uniphier/clk/clk-ld11.c b/arch/arm/mach-uniphier/clk/clk-ld11.c
index a4dcde743b0..36aa7879846 100644
--- a/arch/arm/mach-uniphier/clk/clk-ld11.c
+++ b/arch/arm/mach-uniphier/clk/clk-ld11.c
@@ -37,9 +37,18 @@ void uniphier_ld11_clk_init(void)
{
/* FIXME: the current clk driver can not handle parents */
u32 tmp;
+ int ch;
+
tmp = readl(SC_CLKCTRL4);
tmp |= SC_CLKCTRL4_MIO | SC_CLKCTRL4_STDMAC;
writel(tmp, SC_CLKCTRL4);
+
+ for (ch = 0; ch < 3; ch++) {
+ void __iomem *phyctrl = (void __iomem *)SG_USBPHYCTRL;
+
+ writel(0x82280600, phyctrl + 8 * ch);
+ writel(0x00000106, phyctrl + 8 * ch + 4);
+ }
}
#endif
}
diff --git a/arch/arm/mach-uniphier/sg-regs.h b/arch/arm/mach-uniphier/sg-regs.h
index 4d7e6f7fa3c..dc94084c899 100644
--- a/arch/arm/mach-uniphier/sg-regs.h
+++ b/arch/arm/mach-uniphier/sg-regs.h
@@ -55,6 +55,7 @@
#define SG_MEMCONF_SPARSEMEM (0x1 << 4)
+#define SG_USBPHYCTRL (SG_CTRL_BASE | 0x500)
#define SG_ETPHYPSHUT (SG_CTRL_BASE | 0x554)
#define SG_ETPHYCNT (SG_CTRL_BASE | 0x550)
--
GitLab
From fed9c76641b02ccbda4119d1bee34767c8729107 Mon Sep 17 00:00:00 2001
From: Masahiro Yamada <yamada.masahiro@socionext.com>
Date: Thu, 20 Apr 2017 16:54:42 +0900
Subject: [PATCH 113/282] ARM: uniphier: enable PSCI sysreset for
uniphier_v8_defconfig
This configuration is supposed to be used with ARM Trusted Firmware,
so the SYSTEM_RESET is implemented in BL31. Invoke PSCI instead of
U-Boot's own reset code because we need to coordinate with SCP
(System Control Processor) for the system-level power management.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
---
arch/arm/mach-uniphier/Makefile | 2 ++
configs/uniphier_v8_defconfig | 3 +++
2 files changed, 5 insertions(+)
diff --git a/arch/arm/mach-uniphier/Makefile b/arch/arm/mach-uniphier/Makefile
index 124a1c6e981..7a0b25ad51a 100644
--- a/arch/arm/mach-uniphier/Makefile
+++ b/arch/arm/mach-uniphier/Makefile
@@ -16,7 +16,9 @@ obj-$(CONFIG_DISPLAY_CPUINFO) += cpu-info.o
obj-y += dram_init.o
obj-y += board_init.o
obj-$(CONFIG_BOARD_LATE_INIT) += board_late_init.o
+ifndef CONFIG_SYSRESET
obj-y += reset.o
+endif
obj-$(CONFIG_MICRO_SUPPORT_CARD) += sbc/ micro-support-card.o
obj-y += pinctrl-glue.o
diff --git a/configs/uniphier_v8_defconfig b/configs/uniphier_v8_defconfig
index c743fabb677..73bdaa87294 100644
--- a/configs/uniphier_v8_defconfig
+++ b/configs/uniphier_v8_defconfig
@@ -1,4 +1,5 @@
CONFIG_ARM=y
+CONFIG_ARM_SMCCC=y
CONFIG_ARCH_UNIPHIER=y
CONFIG_SYS_TEXT_BASE=0x84000000
CONFIG_SYS_MALLOC_F_LEN=0x2000
@@ -29,6 +30,8 @@ CONFIG_I2C_EEPROM=y
CONFIG_MMC_UNIPHIER=y
CONFIG_MMC_SDHCI=y
CONFIG_MMC_SDHCI_CADENCE=y
+CONFIG_SYSRESET=y
+CONFIG_SYSRESET_PSCI=y
CONFIG_USB=y
CONFIG_USB_XHCI_HCD=y
CONFIG_USB_XHCI_DWC3=y
--
GitLab
From 637548424bf6961f98e3c593d53a6d19303cefd8 Mon Sep 17 00:00:00 2001
From: Masahiro Yamada <yamada.masahiro@socionext.com>
Date: Thu, 20 Apr 2017 16:54:43 +0900
Subject: [PATCH 114/282] ARM: uniphier: show STM (SCP) status on boot and
pinmon command
The SCP (System Control Processor) or what we call STM (Stand-by
MPU) is integrated in LD4, Pro4, sLD8, LD6b, LD11, and LD20.
For these SoCs, show the information if STM is enabled.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
---
arch/arm/mach-uniphier/board_late_init.c | 16 +++++---
.../mach-uniphier/boot-device/boot-device.c | 38 +++++++++++++++++--
arch/arm/mach-uniphier/init.h | 2 +
3 files changed, 48 insertions(+), 8 deletions(-)
diff --git a/arch/arm/mach-uniphier/board_late_init.c b/arch/arm/mach-uniphier/board_late_init.c
index 92dd6105e48..4bfa10b374a 100644
--- a/arch/arm/mach-uniphier/board_late_init.c
+++ b/arch/arm/mach-uniphier/board_late_init.c
@@ -64,27 +64,33 @@ int board_late_init(void)
switch (uniphier_boot_device_raw()) {
case BOOT_DEVICE_MMC1:
- printf("eMMC Boot\n");
+ printf("eMMC Boot");
setenv("bootmode", "emmcboot");
break;
case BOOT_DEVICE_NAND:
- printf("NAND Boot\n");
+ printf("NAND Boot");
setenv("bootmode", "nandboot");
nand_denali_wp_disable();
break;
case BOOT_DEVICE_NOR:
- printf("NOR Boot\n");
+ printf("NOR Boot");
setenv("bootmode", "norboot");
break;
case BOOT_DEVICE_USB:
- printf("USB Boot\n");
+ printf("USB Boot");
setenv("bootmode", "usbboot");
break;
default:
- printf("Unknown\n");
+ printf("Unknown");
break;
}
+ if (uniphier_have_internal_stm())
+ printf(" (STM: %s)",
+ uniphier_boot_from_backend() ? "OFF" : "ON");
+
+ printf("\n");
+
if (uniphier_set_fdt_file())
printf("fdt_file environment was not set correctly\n");
diff --git a/arch/arm/mach-uniphier/boot-device/boot-device.c b/arch/arm/mach-uniphier/boot-device/boot-device.c
index 5ec0b5b87c4..00809777b24 100644
--- a/arch/arm/mach-uniphier/boot-device/boot-device.c
+++ b/arch/arm/mach-uniphier/boot-device/boot-device.c
@@ -22,6 +22,7 @@ struct uniphier_boot_device_info {
const unsigned int *boot_device_count;
int (*boot_device_is_usb)(u32 pinmon);
unsigned int (*boot_device_fixup)(unsigned int mode);
+ int have_internal_stm;
};
static const struct uniphier_boot_device_info uniphier_boot_device_info[] = {
@@ -31,6 +32,7 @@ static const struct uniphier_boot_device_info uniphier_boot_device_info[] = {
.boot_device_sel_shift = 0,
.boot_device_table = uniphier_sld3_boot_device_table,
.boot_device_count = &uniphier_sld3_boot_device_count,
+ .have_internal_stm = 0,
},
#endif
#if defined(CONFIG_ARCH_UNIPHIER_LD4)
@@ -39,6 +41,7 @@ static const struct uniphier_boot_device_info uniphier_boot_device_info[] = {
.boot_device_sel_shift = 1,
.boot_device_table = uniphier_ld4_boot_device_table,
.boot_device_count = &uniphier_ld4_boot_device_count,
+ .have_internal_stm = 1,
},
#endif
#if defined(CONFIG_ARCH_UNIPHIER_PRO4)
@@ -47,6 +50,7 @@ static const struct uniphier_boot_device_info uniphier_boot_device_info[] = {
.boot_device_sel_shift = 1,
.boot_device_table = uniphier_ld4_boot_device_table,
.boot_device_count = &uniphier_ld4_boot_device_count,
+ .have_internal_stm = 0,
},
#endif
#if defined(CONFIG_ARCH_UNIPHIER_SLD8)
@@ -55,6 +59,7 @@ static const struct uniphier_boot_device_info uniphier_boot_device_info[] = {
.boot_device_sel_shift = 1,
.boot_device_table = uniphier_ld4_boot_device_table,
.boot_device_count = &uniphier_ld4_boot_device_count,
+ .have_internal_stm = 1,
},
#endif
#if defined(CONFIG_ARCH_UNIPHIER_PRO5)
@@ -63,6 +68,7 @@ static const struct uniphier_boot_device_info uniphier_boot_device_info[] = {
.boot_device_sel_shift = 1,
.boot_device_table = uniphier_pro5_boot_device_table,
.boot_device_count = &uniphier_pro5_boot_device_count,
+ .have_internal_stm = 0,
},
#endif
#if defined(CONFIG_ARCH_UNIPHIER_PXS2)
@@ -73,6 +79,7 @@ static const struct uniphier_boot_device_info uniphier_boot_device_info[] = {
.boot_device_count = &uniphier_pxs2_boot_device_count,
.boot_device_is_usb = uniphier_pxs2_boot_device_is_usb,
.boot_device_fixup = uniphier_pxs2_boot_device_fixup,
+ .have_internal_stm = 0,
},
#endif
#if defined(CONFIG_ARCH_UNIPHIER_LD6B)
@@ -83,6 +90,7 @@ static const struct uniphier_boot_device_info uniphier_boot_device_info[] = {
.boot_device_count = &uniphier_pxs2_boot_device_count,
.boot_device_is_usb = uniphier_pxs2_boot_device_is_usb,
.boot_device_fixup = uniphier_pxs2_boot_device_fixup,
+ .have_internal_stm = 1, /* STM on A-chip */
},
#endif
#if defined(CONFIG_ARCH_UNIPHIER_LD11)
@@ -93,6 +101,7 @@ static const struct uniphier_boot_device_info uniphier_boot_device_info[] = {
.boot_device_count = &uniphier_ld11_boot_device_count,
.boot_device_is_usb = uniphier_ld11_boot_device_is_usb,
.boot_device_fixup = uniphier_ld11_boot_device_fixup,
+ .have_internal_stm = 1,
},
#endif
#if defined(CONFIG_ARCH_UNIPHIER_LD20)
@@ -103,6 +112,7 @@ static const struct uniphier_boot_device_info uniphier_boot_device_info[] = {
.boot_device_count = &uniphier_ld11_boot_device_count,
.boot_device_is_usb = uniphier_ld20_boot_device_is_usb,
.boot_device_fixup = uniphier_ld11_boot_device_fixup,
+ .have_internal_stm = 1,
},
#endif
};
@@ -161,6 +171,24 @@ u32 spl_boot_device(void)
info->boot_device_fixup(raw_mode) : raw_mode;
}
+int uniphier_have_internal_stm(void)
+{
+ const struct uniphier_boot_device_info *info;
+
+ info = uniphier_get_boot_device_info();
+ if (!info) {
+ pr_err("unsupported SoC\n");
+ return -ENOTSUPP;
+ }
+
+ return info->have_internal_stm;
+}
+
+int uniphier_boot_from_backend(void)
+{
+ return !!(readl(SG_PINMON0) & BIT(27));
+}
+
#ifndef CONFIG_SPL_BUILD
static int do_pinmon(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
@@ -176,12 +204,16 @@ static int do_pinmon(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
return CMD_RET_FAILURE;
}
- printf("Boot Swap: %s\n\n", boot_is_swapped() ? "ON" : "OFF");
+ if (uniphier_have_internal_stm())
+ printf("STB Micon: %s\n",
+ uniphier_boot_from_backend() ? "OFF" : "ON");
+
+ printf("Boot Swap: %s\n", boot_is_swapped() ? "ON" : "OFF");
pinmon = readl(SG_PINMON0);
if (info->boot_device_is_usb)
- printf("USB Boot: %s\n\n",
+ printf("USB Boot: %s\n",
info->boot_device_is_usb(pinmon) ? "ON" : "OFF");
boot_device_count = *info->boot_device_count;
@@ -189,7 +221,7 @@ static int do_pinmon(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
boot_sel = pinmon >> info->boot_device_sel_shift;
boot_sel &= boot_device_count - 1;
- printf("Boot Mode Sel:\n");
+ printf("\nBoot Mode Sel:\n");
for (i = 0; i < boot_device_count; i++)
printf(" %c %02x %s\n", i == boot_sel ? '*' : ' ', i,
info->boot_device_table[i].desc);
diff --git a/arch/arm/mach-uniphier/init.h b/arch/arm/mach-uniphier/init.h
index 5c45f2d31bf..4803d08038c 100644
--- a/arch/arm/mach-uniphier/init.h
+++ b/arch/arm/mach-uniphier/init.h
@@ -121,6 +121,8 @@ void uniphier_ld11_clk_init(void);
void uniphier_ld20_clk_init(void);
unsigned int uniphier_boot_device_raw(void);
+int uniphier_have_internal_stm(void);
+int uniphier_boot_from_backend(void);
int uniphier_pin_init(const char *pinconfig_name);
void uniphier_smp_kick_all_cpus(void);
void cci500_init(int nr_slaves);
--
GitLab
From 4e7f8de42642cd0036dc78bf0df293f105cb5267 Mon Sep 17 00:00:00 2001
From: Masahiro Yamada <yamada.masahiro@socionext.com>
Date: Thu, 20 Apr 2017 16:54:44 +0900
Subject: [PATCH 115/282] ARM: dts: uniphier: sync Device Tree with Linux
- Use - instead of @ for OPP tables
- Add input-delay properties to Cadence eMMC nodes
- Restore full license text because code-diff is annoying
- Fix NAND compatible strings
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
---
arch/arm/dts/uniphier-ld11.dtsi | 59 +++++++++++++++++++++----
arch/arm/dts/uniphier-ld20.dtsi | 77 +++++++++++++++++++++++++--------
arch/arm/dts/uniphier-pro5.dtsi | 72 ++++++++++++++++++++++--------
arch/arm/dts/uniphier-pxs2.dtsi | 56 +++++++++++++++++++-----
4 files changed, 209 insertions(+), 55 deletions(-)
diff --git a/arch/arm/dts/uniphier-ld11.dtsi b/arch/arm/dts/uniphier-ld11.dtsi
index 2843adb01e7..5294a90ccfd 100644
--- a/arch/arm/dts/uniphier-ld11.dtsi
+++ b/arch/arm/dts/uniphier-ld11.dtsi
@@ -4,7 +4,43 @@
* Copyright (C) 2016 Socionext Inc.
* Author: Masahiro Yamada <yamada.masahiro@socionext.com>
*
- * SPDX-License-Identifier: GPL-2.0+ X11
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPL or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.
+ *
+ * a) This file is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of the
+ * License, or (at your option) any later version.
+ *
+ * This file is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * Or, alternatively,
+ *
+ * b) Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use,
+ * copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following
+ * conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
*/
/memreserve/ 0x80000000 0x00080000;
@@ -53,31 +89,31 @@
compatible = "operating-points-v2";
opp-shared;
- opp@245000000 {
+ opp-245000000 {
opp-hz = /bits/ 64 <245000000>;
clock-latency-ns = <300>;
};
- opp@250000000 {
+ opp-250000000 {
opp-hz = /bits/ 64 <250000000>;
clock-latency-ns = <300>;
};
- opp@490000000 {
+ opp-490000000 {
opp-hz = /bits/ 64 <490000000>;
clock-latency-ns = <300>;
};
- opp@500000000 {
+ opp-500000000 {
opp-hz = /bits/ 64 <500000000>;
clock-latency-ns = <300>;
};
- opp@653334000 {
+ opp-653334000 {
opp-hz = /bits/ 64 <653334000>;
clock-latency-ns = <300>;
};
- opp@666667000 {
+ opp-666667000 {
opp-hz = /bits/ 64 <666667000>;
clock-latency-ns = <300>;
};
- opp@980000000 {
+ opp-980000000 {
opp-hz = /bits/ 64 <980000000>;
clock-latency-ns = <300>;
};
@@ -279,6 +315,11 @@
bus-width = <8>;
mmc-ddr-1_8v;
mmc-hs200-1_8v;
+ cdns,phy-input-delay-legacy = <4>;
+ cdns,phy-input-delay-mmc-highspeed = <2>;
+ cdns,phy-input-delay-mmc-ddr = <3>;
+ cdns,phy-dll-delay-sdclk = <21>;
+ cdns,phy-dll-delay-sdclk-hsmmc = <21>;
};
usb0: usb@5a800100 {
@@ -377,7 +418,7 @@
};
nand: nand@68000000 {
- compatible = "socionext,denali-nand-v5b";
+ compatible = "socionext,uniphier-denali-nand-v5b";
status = "disabled";
reg-names = "nand_data", "denali_reg";
reg = <0x68000000 0x20>, <0x68100000 0x1000>;
diff --git a/arch/arm/dts/uniphier-ld20.dtsi b/arch/arm/dts/uniphier-ld20.dtsi
index d853526a4b8..290647148de 100644
--- a/arch/arm/dts/uniphier-ld20.dtsi
+++ b/arch/arm/dts/uniphier-ld20.dtsi
@@ -4,7 +4,43 @@
* Copyright (C) 2015-2016 Socionext Inc.
* Author: Masahiro Yamada <yamada.masahiro@socionext.com>
*
- * SPDX-License-Identifier: GPL-2.0+ X11
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPL or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.
+ *
+ * a) This file is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of the
+ * License, or (at your option) any later version.
+ *
+ * This file is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * Or, alternatively,
+ *
+ * b) Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use,
+ * copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following
+ * conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
*/
/memreserve/ 0x80000000 0x00080000;
@@ -80,35 +116,35 @@
compatible = "operating-points-v2";
opp-shared;
- opp@250000000 {
+ opp-250000000 {
opp-hz = /bits/ 64 <250000000>;
clock-latency-ns = <300>;
};
- opp@275000000 {
+ opp-275000000 {
opp-hz = /bits/ 64 <275000000>;
clock-latency-ns = <300>;
};
- opp@500000000 {
+ opp-500000000 {
opp-hz = /bits/ 64 <500000000>;
clock-latency-ns = <300>;
};
- opp@550000000 {
+ opp-550000000 {
opp-hz = /bits/ 64 <550000000>;
clock-latency-ns = <300>;
};
- opp@666667000 {
+ opp-666667000 {
opp-hz = /bits/ 64 <666667000>;
clock-latency-ns = <300>;
};
- opp@733334000 {
+ opp-733334000 {
opp-hz = /bits/ 64 <733334000>;
clock-latency-ns = <300>;
};
- opp@1000000000 {
+ opp-1000000000 {
opp-hz = /bits/ 64 <1000000000>;
clock-latency-ns = <300>;
};
- opp@1100000000 {
+ opp-1100000000 {
opp-hz = /bits/ 64 <1100000000>;
clock-latency-ns = <300>;
};
@@ -118,35 +154,35 @@
compatible = "operating-points-v2";
opp-shared;
- opp@250000000 {
+ opp-250000000 {
opp-hz = /bits/ 64 <250000000>;
clock-latency-ns = <300>;
};
- opp@275000000 {
+ opp-275000000 {
opp-hz = /bits/ 64 <275000000>;
clock-latency-ns = <300>;
};
- opp@500000000 {
+ opp-500000000 {
opp-hz = /bits/ 64 <500000000>;
clock-latency-ns = <300>;
};
- opp@550000000 {
+ opp-550000000 {
opp-hz = /bits/ 64 <550000000>;
clock-latency-ns = <300>;
};
- opp@666667000 {
+ opp-666667000 {
opp-hz = /bits/ 64 <666667000>;
clock-latency-ns = <300>;
};
- opp@733334000 {
+ opp-733334000 {
opp-hz = /bits/ 64 <733334000>;
clock-latency-ns = <300>;
};
- opp@1000000000 {
+ opp-1000000000 {
opp-hz = /bits/ 64 <1000000000>;
clock-latency-ns = <300>;
};
- opp@1100000000 {
+ opp-1100000000 {
opp-hz = /bits/ 64 <1100000000>;
clock-latency-ns = <300>;
};
@@ -353,6 +389,11 @@
bus-width = <8>;
mmc-ddr-1_8v;
mmc-hs200-1_8v;
+ cdns,phy-input-delay-legacy = <4>;
+ cdns,phy-input-delay-mmc-highspeed = <2>;
+ cdns,phy-input-delay-mmc-ddr = <3>;
+ cdns,phy-dll-delay-sdclk = <21>;
+ cdns,phy-dll-delay-sdclk-hsmmc = <21>;
};
sd: sdhc@5a400000 {
@@ -429,7 +470,7 @@
};
nand: nand@68000000 {
- compatible = "socionext,denali-nand-v5b";
+ compatible = "socionext,uniphier-denali-nand-v5b";
status = "disabled";
reg-names = "nand_data", "denali_reg";
reg = <0x68000000 0x20>, <0x68100000 0x1000>;
diff --git a/arch/arm/dts/uniphier-pro5.dtsi b/arch/arm/dts/uniphier-pro5.dtsi
index de9869737bd..2c8558cb4d8 100644
--- a/arch/arm/dts/uniphier-pro5.dtsi
+++ b/arch/arm/dts/uniphier-pro5.dtsi
@@ -4,7 +4,43 @@
* Copyright (C) 2015-2016 Socionext Inc.
* Author: Masahiro Yamada <yamada.masahiro@socionext.com>
*
- * SPDX-License-Identifier: GPL-2.0+ X11
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPL or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.
+ *
+ * a) This file is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of the
+ * License, or (at your option) any later version.
+ *
+ * This file is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * Or, alternatively,
+ *
+ * b) Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use,
+ * copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following
+ * conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
*/
/ {
@@ -41,67 +77,67 @@
compatible = "operating-points-v2";
opp-shared;
- opp@100000000 {
+ opp-100000000 {
opp-hz = /bits/ 64 <100000000>;
clock-latency-ns = <300>;
};
- opp@116667000 {
+ opp-116667000 {
opp-hz = /bits/ 64 <116667000>;
clock-latency-ns = <300>;
};
- opp@150000000 {
+ opp-150000000 {
opp-hz = /bits/ 64 <150000000>;
clock-latency-ns = <300>;
};
- opp@175000000 {
+ opp-175000000 {
opp-hz = /bits/ 64 <175000000>;
clock-latency-ns = <300>;
};
- opp@200000000 {
+ opp-200000000 {
opp-hz = /bits/ 64 <200000000>;
clock-latency-ns = <300>;
};
- opp@233334000 {
+ opp-233334000 {
opp-hz = /bits/ 64 <233334000>;
clock-latency-ns = <300>;
};
- opp@300000000 {
+ opp-300000000 {
opp-hz = /bits/ 64 <300000000>;
clock-latency-ns = <300>;
};
- opp@350000000 {
+ opp-350000000 {
opp-hz = /bits/ 64 <350000000>;
clock-latency-ns = <300>;
};
- opp@400000000 {
+ opp-400000000 {
opp-hz = /bits/ 64 <400000000>;
clock-latency-ns = <300>;
};
- opp@466667000 {
+ opp-466667000 {
opp-hz = /bits/ 64 <466667000>;
clock-latency-ns = <300>;
};
- opp@600000000 {
+ opp-600000000 {
opp-hz = /bits/ 64 <600000000>;
clock-latency-ns = <300>;
};
- opp@700000000 {
+ opp-700000000 {
opp-hz = /bits/ 64 <700000000>;
clock-latency-ns = <300>;
};
- opp@800000000 {
+ opp-800000000 {
opp-hz = /bits/ 64 <800000000>;
clock-latency-ns = <300>;
};
- opp@933334000 {
+ opp-933334000 {
opp-hz = /bits/ 64 <933334000>;
clock-latency-ns = <300>;
};
- opp@1200000000 {
+ opp-1200000000 {
opp-hz = /bits/ 64 <1200000000>;
clock-latency-ns = <300>;
};
- opp@1400000000 {
+ opp-1400000000 {
opp-hz = /bits/ 64 <1400000000>;
clock-latency-ns = <300>;
};
@@ -620,7 +656,7 @@
};
nand: nand@68000000 {
- compatible = "socionext,denali-nand-v5b";
+ compatible = "socionext,uniphier-denali-nand-v5b";
status = "disabled";
reg-names = "nand_data", "denali_reg";
reg = <0x68000000 0x20>, <0x68100000 0x1000>;
diff --git a/arch/arm/dts/uniphier-pxs2.dtsi b/arch/arm/dts/uniphier-pxs2.dtsi
index b0f6f94ce7d..6cd3a93b581 100644
--- a/arch/arm/dts/uniphier-pxs2.dtsi
+++ b/arch/arm/dts/uniphier-pxs2.dtsi
@@ -4,7 +4,43 @@
* Copyright (C) 2015-2016 Socionext Inc.
* Author: Masahiro Yamada <yamada.masahiro@socionext.com>
*
- * SPDX-License-Identifier: GPL-2.0+ X11
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPL or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.
+ *
+ * a) This file is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of the
+ * License, or (at your option) any later version.
+ *
+ * This file is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * Or, alternatively,
+ *
+ * b) Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use,
+ * copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following
+ * conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
*/
/ {
@@ -61,35 +97,35 @@
compatible = "operating-points-v2";
opp-shared;
- opp@100000000 {
+ opp-100000000 {
opp-hz = /bits/ 64 <100000000>;
clock-latency-ns = <300>;
};
- opp@150000000 {
+ opp-150000000 {
opp-hz = /bits/ 64 <150000000>;
clock-latency-ns = <300>;
};
- opp@200000000 {
+ opp-200000000 {
opp-hz = /bits/ 64 <200000000>;
clock-latency-ns = <300>;
};
- opp@300000000 {
+ opp-300000000 {
opp-hz = /bits/ 64 <300000000>;
clock-latency-ns = <300>;
};
- opp@400000000 {
+ opp-400000000 {
opp-hz = /bits/ 64 <400000000>;
clock-latency-ns = <300>;
};
- opp@600000000 {
+ opp-600000000 {
opp-hz = /bits/ 64 <600000000>;
clock-latency-ns = <300>;
};
- opp@800000000 {
+ opp-800000000 {
opp-hz = /bits/ 64 <800000000>;
clock-latency-ns = <300>;
};
- opp@1200000000 {
+ opp-1200000000 {
opp-hz = /bits/ 64 <1200000000>;
clock-latency-ns = <300>;
};
@@ -632,7 +668,7 @@
};
nand: nand@68000000 {
- compatible = "socionext,denali-nand-v5b";
+ compatible = "socionext,uniphier-denali-nand-v5b";
status = "disabled";
reg-names = "nand_data", "denali_reg";
reg = <0x68000000 0x20>, <0x68100000 0x1000>;
--
GitLab
From c199489f17c91ee4fed73263d1117d1c1a933c6f Mon Sep 17 00:00:00 2001
From: Icenowy Zheng <icenowy@aosc.xyz>
Date: Sat, 8 Apr 2017 15:30:12 +0800
Subject: [PATCH 116/282] sunxi: add basic V3s support
Basic U-Boot support is now present for V3s.
Some memory addresses are changed specially for V3s, as the original
address map cannot fit into a so small DRAM.
As the DRAM controller code needs a big refactor, the SPL support is
disabled in this version.
Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
---
arch/arm/include/asm/arch-sunxi/gpio.h | 1 +
arch/arm/mach-sunxi/board.c | 4 ++++
arch/arm/mach-sunxi/cpu_info.c | 2 ++
board/sunxi/Kconfig | 11 ++++++++++
include/configs/sun8i.h | 2 ++
include/configs/sunxi-common.h | 29 ++++++++++++++++++++++++--
6 files changed, 47 insertions(+), 2 deletions(-)
diff --git a/arch/arm/include/asm/arch-sunxi/gpio.h b/arch/arm/include/asm/arch-sunxi/gpio.h
index 85a4ec3b0e8..24f85206c82 100644
--- a/arch/arm/include/asm/arch-sunxi/gpio.h
+++ b/arch/arm/include/asm/arch-sunxi/gpio.h
@@ -161,6 +161,7 @@ enum sunxi_gpio_number {
#define SUN8I_GPB_UART2 2
#define SUN8I_A33_GPB_UART0 3
#define SUN8I_A83T_GPB_UART0 2
+#define SUN8I_V3S_GPB_UART0 3
#define SUN50I_GPB_UART0 4
#define SUNXI_GPC_NAND 2
diff --git a/arch/arm/mach-sunxi/board.c b/arch/arm/mach-sunxi/board.c
index 6ce07dfe0fd..4507279cc55 100644
--- a/arch/arm/mach-sunxi/board.c
+++ b/arch/arm/mach-sunxi/board.c
@@ -114,6 +114,10 @@ static int gpio_init(void)
sunxi_gpio_set_cfgpin(SUNXI_GPB(9), SUN8I_A83T_GPB_UART0);
sunxi_gpio_set_cfgpin(SUNXI_GPB(10), SUN8I_A83T_GPB_UART0);
sunxi_gpio_set_pull(SUNXI_GPB(10), SUNXI_GPIO_PULL_UP);
+#elif CONFIG_CONS_INDEX == 1 && defined(CONFIG_MACH_SUN8I_V3S)
+ sunxi_gpio_set_cfgpin(SUNXI_GPB(8), SUN8I_V3S_GPB_UART0);
+ sunxi_gpio_set_cfgpin(SUNXI_GPB(9), SUN8I_V3S_GPB_UART0);
+ sunxi_gpio_set_pull(SUNXI_GPB(9), SUNXI_GPIO_PULL_UP);
#elif CONFIG_CONS_INDEX == 1 && defined(CONFIG_MACH_SUN9I)
sunxi_gpio_set_cfgpin(SUNXI_GPH(12), SUN9I_GPH_UART0);
sunxi_gpio_set_cfgpin(SUNXI_GPH(13), SUN9I_GPH_UART0);
diff --git a/arch/arm/mach-sunxi/cpu_info.c b/arch/arm/mach-sunxi/cpu_info.c
index 7851de299ab..25a5ec26a0e 100644
--- a/arch/arm/mach-sunxi/cpu_info.c
+++ b/arch/arm/mach-sunxi/cpu_info.c
@@ -89,6 +89,8 @@ int print_cpuinfo(void)
printf("CPU: Allwinner H3 (SUN8I %04x)\n", sunxi_get_sram_id());
#elif defined CONFIG_MACH_SUN8I_R40
printf("CPU: Allwinner R40 (SUN8I %04x)\n", sunxi_get_sram_id());
+#elif defined CONFIG_MACH_SUN8I_V3S
+ printf("CPU: Allwinner V3s (SUN8I %04x)\n", sunxi_get_sram_id());
#elif defined CONFIG_MACH_SUN9I
puts("CPU: Allwinner A80 (SUN9I)\n");
#elif defined CONFIG_MACH_SUN50I
diff --git a/board/sunxi/Kconfig b/board/sunxi/Kconfig
index 7350e25e289..b47034f4175 100644
--- a/board/sunxi/Kconfig
+++ b/board/sunxi/Kconfig
@@ -144,6 +144,15 @@ config MACH_SUN8I_R40
select SUNXI_GEN_SUN6I
select SUPPORT_SPL
+config MACH_SUN8I_V3S
+ bool "sun8i (Allwinner V3s)"
+ select CPU_V7
+ select CPU_V7_HAS_NONSEC
+ select CPU_V7_HAS_VIRT
+ select ARCH_SUPPORT_PSCI
+ select SUNXI_GEN_SUN6I
+ select ARMV7_BOOT_SEC_DEFAULT if OLD_SUNXI_KERNEL_COMPAT
+
config MACH_SUN9I
bool "sun9i (Allwinner A80)"
select CPU_V7
@@ -175,6 +184,7 @@ config MACH_SUN8I
default y if MACH_SUN8I_A83T
default y if MACH_SUNXI_H3_H5
default y if MACH_SUN8I_R40
+ default y if MACH_SUN8I_V3S
config RESERVE_ALLWINNER_BOOT0_HEADER
bool "reserve space for Allwinner boot0 header"
@@ -544,6 +554,7 @@ config VIDEO
depends on !MACH_SUN8I_A83T
depends on !MACH_SUNXI_H3_H5
depends on !MACH_SUN8I_R40
+ depends on !MACH_SUN8I_V3S
depends on !MACH_SUN9I
depends on !MACH_SUN50I
default y
diff --git a/include/configs/sun8i.h b/include/configs/sun8i.h
index a4c3fb69e41..6ac42acaead 100644
--- a/include/configs/sun8i.h
+++ b/include/configs/sun8i.h
@@ -21,6 +21,8 @@
#define CONFIG_SUNXI_USB_PHYS 4
#elif defined CONFIG_MACH_SUN8I_A83T
#define CONFIG_SUNXI_USB_PHYS 3
+#elif defined CONFIG_MACH_SUN8I_V3S
+ #define CONFIG_SUNXI_USB_PHYS 1
#else
#define CONFIG_SUNXI_USB_PHYS 2
#endif
diff --git a/include/configs/sunxi-common.h b/include/configs/sunxi-common.h
index b32d220befb..00653d87e89 100644
--- a/include/configs/sunxi-common.h
+++ b/include/configs/sunxi-common.h
@@ -69,7 +69,12 @@
#define SDRAM_OFFSET(x) 0x4##x
#define CONFIG_SYS_SDRAM_BASE 0x40000000
#define CONFIG_SYS_LOAD_ADDR 0x42000000 /* default load address */
+/* V3s do not have enough memory to place code at 0x4a000000 */
+#ifndef CONFIG_MACH_SUN8I_V3S
#define CONFIG_SYS_TEXT_BASE 0x4a000000
+#else
+#define CONFIG_SYS_TEXT_BASE 0x42e00000
+#endif
/* Note SPL_STACK_R_ADDR is set through Kconfig, we include it here
* since it needs to fit in with the other values. By also #defining it
* we get warnings if the Kconfig value mismatches. */
@@ -146,8 +151,13 @@
#define CONFIG_ENV_SIZE (128 << 10)
#endif
+#ifndef CONFIG_MACH_SUN8I_V3S
/* 64MB of malloc() pool */
#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (64 << 20))
+#else
+/* 2MB of malloc() pool */
+#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (2 << 20))
+#endif
/*
* Miscellaneous configurable options
@@ -340,6 +350,7 @@ extern int soft_i2c_gpio_scl;
* Scripts, PXE and DTBs should go afterwards, leaving the rest for the initrd.
* Align the initrd to a 2MB page.
*/
+#define BOOTM_SIZE __stringify(0xa000000)
#define KERNEL_ADDR_R __stringify(SDRAM_OFFSET(0080000))
#define FDT_ADDR_R __stringify(SDRAM_OFFSET(FA00000))
#define SCRIPT_ADDR_R __stringify(SDRAM_OFFSET(FC00000))
@@ -352,16 +363,30 @@ extern int soft_i2c_gpio_scl;
* 32M uncompressed kernel, 16M compressed kernel, 1M fdt,
* 1M script, 1M pxe and the ramdisk at the end.
*/
-
+#ifndef CONFIG_MACH_SUN8I_V3S
+#define BOOTM_SIZE __stringify(0xa000000)
#define KERNEL_ADDR_R __stringify(SDRAM_OFFSET(2000000))
#define FDT_ADDR_R __stringify(SDRAM_OFFSET(3000000))
#define SCRIPT_ADDR_R __stringify(SDRAM_OFFSET(3100000))
#define PXEFILE_ADDR_R __stringify(SDRAM_OFFSET(3200000))
#define RAMDISK_ADDR_R __stringify(SDRAM_OFFSET(3300000))
+#else
+/*
+ * 64M RAM minus 2MB heap + 16MB for u-boot, stack, fb, etc.
+ * 16M uncompressed kernel, 8M compressed kernel, 1M fdt,
+ * 1M script, 1M pxe and the ramdisk at the end.
+ */
+#define BOOTM_SIZE __stringify(0x2e00000)
+#define KERNEL_ADDR_R __stringify(SDRAM_OFFSET(1000000))
+#define FDT_ADDR_R __stringify(SDRAM_OFFSET(1800000))
+#define SCRIPT_ADDR_R __stringify(SDRAM_OFFSET(1900000))
+#define PXEFILE_ADDR_R __stringify(SDRAM_OFFSET(1A00000))
+#define RAMDISK_ADDR_R __stringify(SDRAM_OFFSET(1B00000))
+#endif
#endif
#define MEM_LAYOUT_ENV_SETTINGS \
- "bootm_size=0xa000000\0" \
+ "bootm_size=" BOOTM_SIZE "\0" \
"kernel_addr_r=" KERNEL_ADDR_R "\0" \
"fdt_addr_r=" FDT_ADDR_R "\0" \
"scriptaddr=" SCRIPT_ADDR_R "\0" \
--
GitLab
From e267d94011cde1d841106d0b6505dbd63f57d944 Mon Sep 17 00:00:00 2001
From: Icenowy Zheng <icenowy@aosc.xyz>
Date: Sat, 8 Apr 2017 15:30:13 +0800
Subject: [PATCH 117/282] sunxi: add DTSI file for V3s
As we have now V3s support in board code, the V3s DTSI file should also
be added.
Add also some CCU include headers to satisfy the DTSI file.
Signed-off-by: Icenowy Zheng <icenowy@aosc.xyz>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
---
arch/arm/dts/sun8i-v3s.dtsi | 284 ++++++++++++++++++++++
include/dt-bindings/clock/sun8i-v3s-ccu.h | 107 ++++++++
include/dt-bindings/reset/sun8i-v3s-ccu.h | 78 ++++++
3 files changed, 469 insertions(+)
create mode 100644 arch/arm/dts/sun8i-v3s.dtsi
create mode 100644 include/dt-bindings/clock/sun8i-v3s-ccu.h
create mode 100644 include/dt-bindings/reset/sun8i-v3s-ccu.h
diff --git a/arch/arm/dts/sun8i-v3s.dtsi b/arch/arm/dts/sun8i-v3s.dtsi
new file mode 100644
index 00000000000..ebefc0fefef
--- /dev/null
+++ b/arch/arm/dts/sun8i-v3s.dtsi
@@ -0,0 +1,284 @@
+/*
+ * Copyright (C) 2016 Icenowy Zheng <icenowy@aosc.xyz>
+ *
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPL or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.
+ *
+ * a) This file is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of the
+ * License, or (at your option) any later version.
+ *
+ * This file is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * Or, alternatively,
+ *
+ * b) Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use,
+ * copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following
+ * conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+#include <dt-bindings/clock/sun8i-v3s-ccu.h>
+#include <dt-bindings/reset/sun8i-v3s-ccu.h>
+#include <dt-bindings/interrupt-controller/arm-gic.h>
+#include <dt-bindings/pinctrl/sun4i-a10.h>
+
+/ {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ interrupt-parent = <&gic>;
+
+ cpus {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ cpu@0 {
+ compatible = "arm,cortex-a7";
+ device_type = "cpu";
+ reg = <0>;
+ clocks = <&ccu CLK_CPU>;
+ };
+ };
+
+ timer {
+ compatible = "arm,armv7-timer";
+ interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
+ <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
+ <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
+ <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
+ };
+
+ clocks {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges;
+
+ osc24M: osc24M_clk {
+ #clock-cells = <0>;
+ compatible = "fixed-clock";
+ clock-frequency = <24000000>;
+ clock-output-names = "osc24M";
+ };
+
+ osc32k: osc32k_clk {
+ #clock-cells = <0>;
+ compatible = "fixed-clock";
+ clock-frequency = <32768>;
+ clock-output-names = "osc32k";
+ };
+ };
+
+ soc {
+ compatible = "simple-bus";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges;
+
+ mmc0: mmc@01c0f000 {
+ compatible = "allwinner,sun7i-a20-mmc";
+ reg = <0x01c0f000 0x1000>;
+ clocks = <&ccu CLK_BUS_MMC0>,
+ <&ccu CLK_MMC0>,
+ <&ccu CLK_MMC0_OUTPUT>,
+ <&ccu CLK_MMC0_SAMPLE>;
+ clock-names = "ahb",
+ "mmc",
+ "output",
+ "sample";
+ resets = <&ccu RST_BUS_MMC0>;
+ reset-names = "ahb";
+ interrupts = <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>;
+ status = "disabled";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+
+ mmc1: mmc@01c10000 {
+ compatible = "allwinner,sun7i-a20-mmc";
+ reg = <0x01c10000 0x1000>;
+ clocks = <&ccu CLK_BUS_MMC1>,
+ <&ccu CLK_MMC1>,
+ <&ccu CLK_MMC1_OUTPUT>,
+ <&ccu CLK_MMC1_SAMPLE>;
+ clock-names = "ahb",
+ "mmc",
+ "output",
+ "sample";
+ resets = <&ccu RST_BUS_MMC1>;
+ reset-names = "ahb";
+ interrupts = <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>;
+ status = "disabled";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+
+ mmc2: mmc@01c11000 {
+ compatible = "allwinner,sun7i-a20-mmc";
+ reg = <0x01c11000 0x1000>;
+ clocks = <&ccu CLK_BUS_MMC2>,
+ <&ccu CLK_MMC2>,
+ <&ccu CLK_MMC2_OUTPUT>,
+ <&ccu CLK_MMC2_SAMPLE>;
+ clock-names = "ahb",
+ "mmc",
+ "output",
+ "sample";
+ resets = <&ccu RST_BUS_MMC2>;
+ reset-names = "ahb";
+ interrupts = <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>;
+ status = "disabled";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+
+ usb_otg: usb@01c19000 {
+ compatible = "allwinner,sun8i-h3-musb";
+ reg = <0x01c19000 0x0400>;
+ clocks = <&ccu CLK_BUS_OTG>;
+ resets = <&ccu RST_BUS_OTG>;
+ interrupts = <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "mc";
+ phys = <&usbphy 0>;
+ phy-names = "usb";
+ extcon = <&usbphy 0>;
+ status = "disabled";
+ };
+
+ usbphy: phy@01c19400 {
+ compatible = "allwinner,sun8i-v3s-usb-phy";
+ reg = <0x01c19400 0x2c>,
+ <0x01c1a800 0x4>;
+ reg-names = "phy_ctrl",
+ "pmu0";
+ clocks = <&ccu CLK_USB_PHY0>;
+ clock-names = "usb0_phy";
+ resets = <&ccu RST_USB_PHY0>;
+ reset-names = "usb0_reset";
+ status = "disabled";
+ #phy-cells = <1>;
+ };
+
+ ccu: clock@01c20000 {
+ compatible = "allwinner,sun8i-v3s-ccu";
+ reg = <0x01c20000 0x400>;
+ clocks = <&osc24M>, <&osc32k>;
+ clock-names = "hosc", "losc";
+ #clock-cells = <1>;
+ #reset-cells = <1>;
+ };
+
+ rtc: rtc@01c20400 {
+ compatible = "allwinner,sun6i-a31-rtc";
+ reg = <0x01c20400 0x54>;
+ interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>;
+ };
+
+ pio: pinctrl@01c20800 {
+ compatible = "allwinner,sun8i-v3s-pinctrl";
+ reg = <0x01c20800 0x400>;
+ interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&ccu CLK_BUS_PIO>, <&osc24M>, <&osc32k>;
+ clock-names = "apb", "hosc", "losc";
+ gpio-controller;
+ #gpio-cells = <3>;
+ interrupt-controller;
+ #interrupt-cells = <3>;
+
+ uart0_pins_a: uart0@0 {
+ pins = "PB8", "PB9";
+ function = "uart0";
+ bias-pull-up;
+ };
+
+ mmc0_pins_a: mmc0@0 {
+ pins = "PF0", "PF1", "PF2", "PF3",
+ "PF4", "PF5";
+ function = "mmc0";
+ drive-strength = <30>;
+ bias-pull-up;
+ };
+ };
+
+ timer@01c20c00 {
+ compatible = "allwinner,sun4i-a10-timer";
+ reg = <0x01c20c00 0xa0>;
+ interrupts = <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&osc24M>;
+ };
+
+ wdt0: watchdog@01c20ca0 {
+ compatible = "allwinner,sun6i-a31-wdt";
+ reg = <0x01c20ca0 0x20>;
+ interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;
+ };
+
+ uart0: serial@01c28000 {
+ compatible = "snps,dw-apb-uart";
+ reg = <0x01c28000 0x400>;
+ interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>;
+ reg-shift = <2>;
+ reg-io-width = <4>;
+ clocks = <&ccu CLK_BUS_UART0>;
+ resets = <&ccu RST_BUS_UART0>;
+ status = "disabled";
+ };
+
+ uart1: serial@01c28400 {
+ compatible = "snps,dw-apb-uart";
+ reg = <0x01c28400 0x400>;
+ interrupts = <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>;
+ reg-shift = <2>;
+ reg-io-width = <4>;
+ clocks = <&ccu CLK_BUS_UART1>;
+ resets = <&ccu RST_BUS_UART1>;
+ status = "disabled";
+ };
+
+ uart2: serial@01c28800 {
+ compatible = "snps,dw-apb-uart";
+ reg = <0x01c28800 0x400>;
+ interrupts = <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>;
+ reg-shift = <2>;
+ reg-io-width = <4>;
+ clocks = <&ccu CLK_BUS_UART2>;
+ resets = <&ccu RST_BUS_UART2>;
+ status = "disabled";
+ };
+
+ gic: interrupt-controller@01c81000 {
+ compatible = "arm,cortex-a7-gic", "arm,cortex-a15-gic";
+ reg = <0x01c81000 0x1000>,
+ <0x01c82000 0x1000>,
+ <0x01c84000 0x2000>,
+ <0x01c86000 0x2000>;
+ interrupt-controller;
+ #interrupt-cells = <3>;
+ interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
+ };
+ };
+};
diff --git a/include/dt-bindings/clock/sun8i-v3s-ccu.h b/include/dt-bindings/clock/sun8i-v3s-ccu.h
new file mode 100644
index 00000000000..c0d5d5599c8
--- /dev/null
+++ b/include/dt-bindings/clock/sun8i-v3s-ccu.h
@@ -0,0 +1,107 @@
+/*
+ * Copyright (c) 2016 Icenowy Zheng <icenowy@aosc.xyz>
+ *
+ * Based on sun8i-h3-ccu.h, which is:
+ * Copyright (C) 2016 Maxime Ripard <maxime.ripard@free-electrons.com>
+ *
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPL or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.
+ *
+ * a) This file is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of the
+ * License, or (at your option) any later version.
+ *
+ * This file is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * Or, alternatively,
+ *
+ * b) Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use,
+ * copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following
+ * conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+#ifndef _DT_BINDINGS_CLK_SUN8I_V3S_H_
+#define _DT_BINDINGS_CLK_SUN8I_V3S_H_
+
+#define CLK_CPU 14
+
+#define CLK_BUS_CE 20
+#define CLK_BUS_DMA 21
+#define CLK_BUS_MMC0 22
+#define CLK_BUS_MMC1 23
+#define CLK_BUS_MMC2 24
+#define CLK_BUS_DRAM 25
+#define CLK_BUS_EMAC 26
+#define CLK_BUS_HSTIMER 27
+#define CLK_BUS_SPI0 28
+#define CLK_BUS_OTG 29
+#define CLK_BUS_EHCI0 30
+#define CLK_BUS_OHCI0 31
+#define CLK_BUS_VE 32
+#define CLK_BUS_TCON0 33
+#define CLK_BUS_CSI 34
+#define CLK_BUS_DE 35
+#define CLK_BUS_CODEC 36
+#define CLK_BUS_PIO 37
+#define CLK_BUS_I2C0 38
+#define CLK_BUS_I2C1 39
+#define CLK_BUS_UART0 40
+#define CLK_BUS_UART1 41
+#define CLK_BUS_UART2 42
+#define CLK_BUS_EPHY 43
+#define CLK_BUS_DBG 44
+
+#define CLK_MMC0 45
+#define CLK_MMC0_SAMPLE 46
+#define CLK_MMC0_OUTPUT 47
+#define CLK_MMC1 48
+#define CLK_MMC1_SAMPLE 49
+#define CLK_MMC1_OUTPUT 50
+#define CLK_MMC2 51
+#define CLK_MMC2_SAMPLE 52
+#define CLK_MMC2_OUTPUT 53
+#define CLK_CE 54
+#define CLK_SPI0 55
+#define CLK_USB_PHY0 56
+#define CLK_USB_OHCI0 57
+
+#define CLK_DRAM_VE 59
+#define CLK_DRAM_CSI 60
+#define CLK_DRAM_EHCI 61
+#define CLK_DRAM_OHCI 62
+#define CLK_DE 63
+#define CLK_TCON0 64
+#define CLK_CSI_MISC 65
+#define CLK_CSI0_MCLK 66
+#define CLK_CSI1_SCLK 67
+#define CLK_CSI1_MCLK 68
+#define CLK_VE 69
+#define CLK_AC_DIG 70
+#define CLK_AVS 71
+
+#define CLK_MIPI_CSI 73
+
+#endif /* _DT_BINDINGS_CLK_SUN8I_V3S_H_ */
diff --git a/include/dt-bindings/reset/sun8i-v3s-ccu.h b/include/dt-bindings/reset/sun8i-v3s-ccu.h
new file mode 100644
index 00000000000..b58ef21a2e1
--- /dev/null
+++ b/include/dt-bindings/reset/sun8i-v3s-ccu.h
@@ -0,0 +1,78 @@
+/*
+ * Copyright (C) 2016 Icenowy Zheng <icenowy@aosc.xyz>
+ *
+ * Based on sun8i-v3s-ccu.h, which is
+ * Copyright (C) 2016 Maxime Ripard <maxime.ripard@free-electrons.com>
+ *
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPL or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.
+ *
+ * a) This file is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of the
+ * License, or (at your option) any later version.
+ *
+ * This file is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * Or, alternatively,
+ *
+ * b) Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use,
+ * copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following
+ * conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+#ifndef _DT_BINDINGS_RST_SUN8I_V3S_H_
+#define _DT_BINDINGS_RST_SUN8I_V3S_H_
+
+#define RST_USB_PHY0 0
+
+#define RST_MBUS 1
+
+#define RST_BUS_CE 5
+#define RST_BUS_DMA 6
+#define RST_BUS_MMC0 7
+#define RST_BUS_MMC1 8
+#define RST_BUS_MMC2 9
+#define RST_BUS_DRAM 11
+#define RST_BUS_EMAC 12
+#define RST_BUS_HSTIMER 14
+#define RST_BUS_SPI0 15
+#define RST_BUS_OTG 17
+#define RST_BUS_EHCI0 18
+#define RST_BUS_OHCI0 22
+#define RST_BUS_VE 26
+#define RST_BUS_TCON0 27
+#define RST_BUS_CSI 30
+#define RST_BUS_DE 34
+#define RST_BUS_DBG 38
+#define RST_BUS_EPHY 39
+#define RST_BUS_CODEC 40
+#define RST_BUS_I2C0 46
+#define RST_BUS_I2C1 47
+#define RST_BUS_UART0 49
+#define RST_BUS_UART1 50
+#define RST_BUS_UART2 51
+
+#endif /* _DT_BINDINGS_RST_SUN8I_H3_H_ */
--
GitLab
From f02abb0608fe7e47fa1ee62e0f7655d7e0e53a12 Mon Sep 17 00:00:00 2001
From: Icenowy Zheng <icenowy@aosc.xyz>
Date: Sat, 8 Apr 2017 15:30:14 +0800
Subject: [PATCH 118/282] sunxi: add support for Lichee Pi Zero
Lichee Pi Zero is a development board with a V3s SoC, which features
64MiB DRAM co-packaged within the SoC, a TF slot, a SPI NOR slot (not
soldered in production batch), a 40-pin RGB LCD connector and some extra
pins available as 2.54mm pins or stamp holes.
Add support for it.
Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
---
arch/arm/dts/Makefile | 2 +
arch/arm/dts/sun8i-v3s-licheepi-zero.dts | 83 ++++++++++++++++++++++++
board/sunxi/MAINTAINERS | 5 ++
configs/LicheePi_Zero_defconfig | 12 ++++
4 files changed, 102 insertions(+)
create mode 100644 arch/arm/dts/sun8i-v3s-licheepi-zero.dts
create mode 100644 configs/LicheePi_Zero_defconfig
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index 198693c823c..959e23d7060 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -306,6 +306,8 @@ dtb-$(CONFIG_MACH_SUN8I_H3) += \
sun8i-h3-nanopi-neo-air.dtb
dtb-$(CONFIG_MACH_SUN8I_R40) += \
sun8i-r40-bananapi-m2-ultra.dtb
+dtb-$(CONFIG_MACH_SUN8I_V3S) += \
+ sun8i-v3s-licheepi-zero.dtb
dtb-$(CONFIG_MACH_SUN50I_H5) += \
sun50i-h5-orangepi-pc2.dtb
dtb-$(CONFIG_MACH_SUN50I) += \
diff --git a/arch/arm/dts/sun8i-v3s-licheepi-zero.dts b/arch/arm/dts/sun8i-v3s-licheepi-zero.dts
new file mode 100644
index 00000000000..3d9168cbaec
--- /dev/null
+++ b/arch/arm/dts/sun8i-v3s-licheepi-zero.dts
@@ -0,0 +1,83 @@
+/*
+ * Copyright (C) 2016 Icenowy Zheng <icenowy@aosc.xyz>
+ *
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPL or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.
+ *
+ * a) This file is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of the
+ * License, or (at your option) any later version.
+ *
+ * This file is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * Or, alternatively,
+ *
+ * b) Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use,
+ * copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following
+ * conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+/dts-v1/;
+#include "sun8i-v3s.dtsi"
+#include "sunxi-common-regulators.dtsi"
+
+/ {
+ model = "Lichee Pi Zero";
+ compatible = "licheepi,licheepi-zero", "allwinner,sun8i-v3s";
+
+ aliases {
+ serial0 = &uart0;
+ };
+
+ chosen {
+ stdout-path = "serial0:115200n8";
+ };
+};
+
+&mmc0 {
+ pinctrl-0 = <&mmc0_pins_a>;
+ pinctrl-names = "default";
+ broken-cd;
+ bus-width = <4>;
+ vmmc-supply = <®_vcc3v3>;
+ status = "okay";
+};
+
+&uart0 {
+ pinctrl-0 = <&uart0_pins_a>;
+ pinctrl-names = "default";
+ status = "okay";
+};
+
+&usb_otg {
+ dr_mode = "otg";
+ status = "okay";
+};
+
+&usbphy {
+ usb0_id_det-gpio = <&pio 5 6 GPIO_ACTIVE_HIGH>;
+ status = "okay";
+};
diff --git a/board/sunxi/MAINTAINERS b/board/sunxi/MAINTAINERS
index 7ce2a320949..f39402b89cd 100644
--- a/board/sunxi/MAINTAINERS
+++ b/board/sunxi/MAINTAINERS
@@ -188,6 +188,11 @@ M: Jelle de Jong <jelledejong@powercraft.nl>
S: Maintained
F: configs/Lamobo_R1_defconfig
+LICHEEPI-ZERO BOARD
+M: Icenowy Zheng <icenowy@aosc.xyz>
+S: Maintained
+F: configs/LicheePi_Zero_defconfig
+
LINKSPRITE-PCDUINO BOARD
M: Zoltan Herpai <wigyori@uid0.hu>
S: Maintained
diff --git a/configs/LicheePi_Zero_defconfig b/configs/LicheePi_Zero_defconfig
new file mode 100644
index 00000000000..c1470848495
--- /dev/null
+++ b/configs/LicheePi_Zero_defconfig
@@ -0,0 +1,12 @@
+CONFIG_ARM=y
+CONFIG_ARCH_SUNXI=y
+CONFIG_MACH_SUN8I_V3S=y
+CONFIG_DRAM_CLK=360
+CONFIG_DRAM_ZQ=14779
+CONFIG_DEFAULT_DEVICE_TREE="sun8i-v3s-licheepi-zero"
+# CONFIG_CONSOLE_MUX is not set
+CONFIG_SPL=y
+# CONFIG_CMD_IMLS is not set
+# CONFIG_CMD_FLASH is not set
+# CONFIG_CMD_FPGA is not set
+# CONFIG_NETDEVICES is not set
--
GitLab
From 9828d050cf5026b27c6acdf615c5161b5a269092 Mon Sep 17 00:00:00 2001
From: Kyle Edwards <kyleedwardsny@gmail.com>
Date: Wed, 12 Apr 2017 22:42:31 -0400
Subject: [PATCH 119/282] mips: qemu-mips/64: Remove obsolete
CONFIG_SYS_MONITOR_LEN from config
This fixes an issue with the saveenv command causing U-Boot to no
longer work on the QEMU Mips pseudoboard. Because the offset of the
environment was being determined by CONFIG_SYS_MONITOR_LEN, and this
value was less than the actual size of U-Boot, saveenv was overwriting
parts of the U-Boot code. Because CONFIG_SYS_MONITOR_LEN is no longer
used on MIPS, this patch removes it and places the environment at the
end of the pseudoboard's 4MB flash.
Signed-off-by: Kyle Edwards <kyleedwardsny@gmail.com>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
---
include/configs/qemu-mips.h | 3 +--
include/configs/qemu-mips64.h | 3 +--
2 files changed, 2 insertions(+), 4 deletions(-)
diff --git a/include/configs/qemu-mips.h b/include/configs/qemu-mips.h
index be7f4f24871..b67d413f126 100644
--- a/include/configs/qemu-mips.h
+++ b/include/configs/qemu-mips.h
@@ -102,7 +102,6 @@
*/
/* The following #defines are needed to get flash environment right */
#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
-#define CONFIG_SYS_MONITOR_LEN (192 << 10)
#define CONFIG_SYS_INIT_SP_OFFSET 0x400000
@@ -115,10 +114,10 @@
#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE
#define CONFIG_ENV_IS_IN_FLASH
-#define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + CONFIG_SYS_MONITOR_LEN)
/* Address and size of Primary Environment Sector */
#define CONFIG_ENV_SIZE 0x8000
+#define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + (4 << 20) - CONFIG_ENV_SIZE)
#define CONFIG_ENV_OVERWRITE 1
diff --git a/include/configs/qemu-mips64.h b/include/configs/qemu-mips64.h
index 39afbff2d81..4856087718c 100644
--- a/include/configs/qemu-mips64.h
+++ b/include/configs/qemu-mips64.h
@@ -102,7 +102,6 @@
*/
/* The following #defines are needed to get flash environment right */
#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
-#define CONFIG_SYS_MONITOR_LEN (192 << 10)
#define CONFIG_SYS_INIT_SP_OFFSET 0x400000
@@ -115,10 +114,10 @@
#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE
#define CONFIG_ENV_IS_IN_FLASH
-#define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + CONFIG_SYS_MONITOR_LEN)
/* Address and size of Primary Environment Sector */
#define CONFIG_ENV_SIZE 0x8000
+#define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + (4 << 20) - CONFIG_ENV_SIZE)
#define CONFIG_ENV_OVERWRITE 1
--
GitLab
From 1967228b028b5ddf0b0b41806e5bd10e49e836a6 Mon Sep 17 00:00:00 2001
From: Kyle Edwards <kyleedwardsny@gmail.com>
Date: Wed, 12 Apr 2017 22:42:32 -0400
Subject: [PATCH 120/282] mips: qemu-mips/64: Expand malloc pool for
CONFIG_SYS_BOOTPARAMS_LEN
Before this patch, CONFIG_SYS_BOOTPARAMS_LEN was the same size as
CONFIG_SYS_MALLOC_LEN. So, if malloc() had previously been called, and
initr_malloc_bootparams() was called, it would fail with an out-of-
memory error. This patch fixes this issue by expanding the malloc pool
to 256KB.
Signed-off-by: Kyle Edwards <kyleedwardsny@gmail.com>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
---
include/configs/qemu-mips.h | 2 +-
include/configs/qemu-mips64.h | 2 +-
2 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/include/configs/qemu-mips.h b/include/configs/qemu-mips.h
index b67d413f126..59a793babed 100644
--- a/include/configs/qemu-mips.h
+++ b/include/configs/qemu-mips.h
@@ -80,7 +80,7 @@
/* max number of command args */
#define CONFIG_SYS_MAXARGS 16
-#define CONFIG_SYS_MALLOC_LEN 128*1024
+#define CONFIG_SYS_MALLOC_LEN (256 << 10)
#define CONFIG_SYS_BOOTPARAMS_LEN 128*1024
diff --git a/include/configs/qemu-mips64.h b/include/configs/qemu-mips64.h
index 4856087718c..28b791acdd1 100644
--- a/include/configs/qemu-mips64.h
+++ b/include/configs/qemu-mips64.h
@@ -80,7 +80,7 @@
/* max number of command args */
#define CONFIG_SYS_MAXARGS 16
-#define CONFIG_SYS_MALLOC_LEN 128*1024
+#define CONFIG_SYS_MALLOC_LEN (256 << 10)
#define CONFIG_SYS_BOOTPARAMS_LEN 128*1024
--
GitLab
From 2eff3b7179a95a5cde0eaf8fae8c4b18956f2f59 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Andreas=20F=C3=A4rber?= <afaerber@suse.de>
Date: Fri, 14 Apr 2017 18:44:47 +0200
Subject: [PATCH 121/282] sunxi: Fix arm64 fdtfile variable
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
Currently $fdtfile is constructed from CONFIG_DEFAULT_TREE, containing
the filename. However on arm64 that file is located in an allwinner
subdirectory.
To avoid the need for users/distros symlinking the .dtb files, prepend
the vendor directory for ARM64.
This aligns Pine64 with other boards such as Raspberry Pi 3.
Signed-off-by: Andreas Färber <afaerber@suse.de>
Reviewed-by: Alexander Graf <agraf@suse.de>
Reviewed-by: Jagan Teki <jagan@openedev.com>
---
include/configs/sunxi-common.h | 8 +++++++-
1 file changed, 7 insertions(+), 1 deletion(-)
diff --git a/include/configs/sunxi-common.h b/include/configs/sunxi-common.h
index 00653d87e89..64a190059ac 100644
--- a/include/configs/sunxi-common.h
+++ b/include/configs/sunxi-common.h
@@ -497,11 +497,17 @@ extern int soft_i2c_gpio_scl;
CONSOLE_STDIN_SETTINGS \
CONSOLE_STDOUT_SETTINGS
+#ifdef CONFIG_ARM64
+#define FDTFILE "allwinner/" CONFIG_DEFAULT_DEVICE_TREE ".dtb"
+#else
+#define FDTFILE CONFIG_DEFAULT_DEVICE_TREE ".dtb"
+#endif
+
#define CONFIG_EXTRA_ENV_SETTINGS \
CONSOLE_ENV_SETTINGS \
MEM_LAYOUT_ENV_SETTINGS \
DFU_ALT_INFO_RAM \
- "fdtfile=" CONFIG_DEFAULT_DEVICE_TREE ".dtb\0" \
+ "fdtfile=" FDTFILE "\0" \
"console=ttyS0,115200\0" \
SUNXI_MTDIDS_DEFAULT \
SUNXI_MTDPARTS_DEFAULT \
--
GitLab
From 5d267ec67901d9e5fd6e535eec84bd9176501403 Mon Sep 17 00:00:00 2001
From: Alison Wang <b18965@freescale.com>
Date: Tue, 11 Apr 2017 15:02:13 +0800
Subject: [PATCH 122/282] arm: ls1021atwr: Enable RGMII TX/RX clock internal
delay for AR8033
Since commit ce412b7, RGMII TX clock internal delay is not enabled
for AR8033 unconditionally. On LS1021ATWR board, the third port
eTSEC3 uses AR8033 in RGMII mode. The TX/RX internal delay needs to
be enabled.
This patch will set PHY_INTERFACE_MODE_RGMII_ID to enable RGMII TX/RX
clock internal delay for AR8033 on the third port.
Signed-off-by: Alison Wang <alison.wang@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
---
board/freescale/ls1021atwr/ls1021atwr.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/board/freescale/ls1021atwr/ls1021atwr.c b/board/freescale/ls1021atwr/ls1021atwr.c
index d96fd774d36..ff32d5cb28e 100644
--- a/board/freescale/ls1021atwr/ls1021atwr.c
+++ b/board/freescale/ls1021atwr/ls1021atwr.c
@@ -273,6 +273,7 @@ int board_eth_init(bd_t *bis)
#endif
#ifdef CONFIG_TSEC3
SET_STD_TSEC_INFO(tsec_info[num], 3);
+ tsec_info[num].interface = PHY_INTERFACE_MODE_RGMII_ID;
num++;
#endif
if (!num) {
--
GitLab
From 99fe76d02313473f97892eab3e6fa564f1acfea4 Mon Sep 17 00:00:00 2001
From: Santan Kumar <santan.kumar@nxp.com>
Date: Thu, 13 Apr 2017 15:31:09 +0530
Subject: [PATCH 123/282] armv8: ls2080ardb: Add phy number for serdes1
protocol 0x4b
Signed-off-by: Santan Kumar <santan.kumar@nxp.com>
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
---
board/freescale/ls2080ardb/eth_ls2080rdb.c | 7 +++++++
1 file changed, 7 insertions(+)
diff --git a/board/freescale/ls2080ardb/eth_ls2080rdb.c b/board/freescale/ls2080ardb/eth_ls2080rdb.c
index 799799c251c..ba584c8a768 100644
--- a/board/freescale/ls2080ardb/eth_ls2080rdb.c
+++ b/board/freescale/ls2080ardb/eth_ls2080rdb.c
@@ -61,6 +61,13 @@ int board_eth_init(bd_t *bis)
wriop_set_phy_address(WRIOP1_DPMAC7, AQ_PHY_ADDR3);
wriop_set_phy_address(WRIOP1_DPMAC8, AQ_PHY_ADDR4);
+ break;
+ case 0x4B:
+ wriop_set_phy_address(WRIOP1_DPMAC1, CORTINA_PHY_ADDR1);
+ wriop_set_phy_address(WRIOP1_DPMAC2, CORTINA_PHY_ADDR2);
+ wriop_set_phy_address(WRIOP1_DPMAC3, CORTINA_PHY_ADDR3);
+ wriop_set_phy_address(WRIOP1_DPMAC4, CORTINA_PHY_ADDR4);
+
break;
default:
printf("SerDes1 protocol 0x%x is not supported on LS2080aRDB\n",
--
GitLab
From e1b09290596ddc4604253a54a4fc313fc11770c9 Mon Sep 17 00:00:00 2001
From: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Date: Fri, 14 Apr 2017 14:48:21 +0800
Subject: [PATCH 124/282] armv8: ls1043aqds: Integrate FSL PPA
The PPA is a EL3 firmware, which support PSCI, hotplug,
power-management features etc.
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
---
board/freescale/ls1043aqds/ls1043aqds.c | 5 +++++
1 file changed, 5 insertions(+)
diff --git a/board/freescale/ls1043aqds/ls1043aqds.c b/board/freescale/ls1043aqds/ls1043aqds.c
index 2df63e468d8..8fbd3a74bde 100644
--- a/board/freescale/ls1043aqds/ls1043aqds.c
+++ b/board/freescale/ls1043aqds/ls1043aqds.c
@@ -11,6 +11,7 @@
#include <asm/io.h>
#include <asm/arch/clock.h>
#include <asm/arch/fsl_serdes.h>
+#include <asm/arch/ppa.h>
#include <asm/arch/fdt.h>
#include <asm/arch/mmu.h>
#include <asm/arch/soc.h>
@@ -325,6 +326,10 @@ int board_init(void)
config_serdes_mux();
#endif
+#ifdef CONFIG_FSL_LS_PPA
+ ppa_init();
+#endif
+
return 0;
}
--
GitLab
From b6adbec0f9fded31a24e6b178f58b43347231b8e Mon Sep 17 00:00:00 2001
From: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Date: Fri, 14 Apr 2017 14:48:22 +0800
Subject: [PATCH 125/282] armv8: ls1043aqds: enable FSL PPA
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
---
configs/ls1043aqds_defconfig | 1 +
configs/ls1043aqds_lpuart_defconfig | 1 +
configs/ls1043aqds_nand_defconfig | 1 +
configs/ls1043aqds_nor_ddr3_defconfig | 1 +
configs/ls1043aqds_qspi_defconfig | 1 +
configs/ls1043aqds_sdcard_ifc_defconfig | 1 +
configs/ls1043aqds_sdcard_qspi_defconfig | 1 +
7 files changed, 7 insertions(+)
diff --git a/configs/ls1043aqds_defconfig b/configs/ls1043aqds_defconfig
index 838bf1dc311..cb137b2efc8 100644
--- a/configs/ls1043aqds_defconfig
+++ b/configs/ls1043aqds_defconfig
@@ -1,5 +1,6 @@
CONFIG_ARM=y
CONFIG_TARGET_LS1043AQDS=y
+CONFIG_FSL_LS_PPA=y
CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1043a-qds-duart"
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
diff --git a/configs/ls1043aqds_lpuart_defconfig b/configs/ls1043aqds_lpuart_defconfig
index c3b3c80493c..0acaba1f700 100644
--- a/configs/ls1043aqds_lpuart_defconfig
+++ b/configs/ls1043aqds_lpuart_defconfig
@@ -1,5 +1,6 @@
CONFIG_ARM=y
CONFIG_TARGET_LS1043AQDS=y
+CONFIG_FSL_LS_PPA=y
CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1043a-qds-lpuart"
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
diff --git a/configs/ls1043aqds_nand_defconfig b/configs/ls1043aqds_nand_defconfig
index 75150ed9d18..d168e7859be 100644
--- a/configs/ls1043aqds_nand_defconfig
+++ b/configs/ls1043aqds_nand_defconfig
@@ -1,5 +1,6 @@
CONFIG_ARM=y
CONFIG_TARGET_LS1043AQDS=y
+CONFIG_FSL_LS_PPA=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_SPL_SERIAL_SUPPORT=y
diff --git a/configs/ls1043aqds_nor_ddr3_defconfig b/configs/ls1043aqds_nor_ddr3_defconfig
index 8f9925666b6..fd8d0f6a95d 100644
--- a/configs/ls1043aqds_nor_ddr3_defconfig
+++ b/configs/ls1043aqds_nor_ddr3_defconfig
@@ -1,5 +1,6 @@
CONFIG_ARM=y
CONFIG_TARGET_LS1043AQDS=y
+CONFIG_FSL_LS_PPA=y
CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1043a-qds-duart"
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
diff --git a/configs/ls1043aqds_qspi_defconfig b/configs/ls1043aqds_qspi_defconfig
index 7b01ab8e133..4da173db539 100644
--- a/configs/ls1043aqds_qspi_defconfig
+++ b/configs/ls1043aqds_qspi_defconfig
@@ -1,5 +1,6 @@
CONFIG_ARM=y
CONFIG_TARGET_LS1043AQDS=y
+CONFIG_FSL_LS_PPA=y
CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1043a-qds-duart"
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
diff --git a/configs/ls1043aqds_sdcard_ifc_defconfig b/configs/ls1043aqds_sdcard_ifc_defconfig
index acb811dc763..ba484e426d5 100644
--- a/configs/ls1043aqds_sdcard_ifc_defconfig
+++ b/configs/ls1043aqds_sdcard_ifc_defconfig
@@ -1,5 +1,6 @@
CONFIG_ARM=y
CONFIG_TARGET_LS1043AQDS=y
+CONFIG_FSL_LS_PPA=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_SPL_MMC_SUPPORT=y
diff --git a/configs/ls1043aqds_sdcard_qspi_defconfig b/configs/ls1043aqds_sdcard_qspi_defconfig
index 78153ffc42d..35688a4cfc1 100644
--- a/configs/ls1043aqds_sdcard_qspi_defconfig
+++ b/configs/ls1043aqds_sdcard_qspi_defconfig
@@ -1,5 +1,6 @@
CONFIG_ARM=y
CONFIG_TARGET_LS1043AQDS=y
+CONFIG_FSL_LS_PPA=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_SPL_MMC_SUPPORT=y
--
GitLab
From 2ac2e20ef839935b4e8e8723165e73f40922d1e1 Mon Sep 17 00:00:00 2001
From: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Date: Fri, 14 Apr 2017 14:48:23 +0800
Subject: [PATCH 126/282] armv8: ls1046aqds: Integrate FSL PPA
The PPA is a EL3 firmware, which support PSCI, hotplug,
power-management features etc.
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
---
board/freescale/ls1046aqds/ls1046aqds.c | 5 +++++
1 file changed, 5 insertions(+)
diff --git a/board/freescale/ls1046aqds/ls1046aqds.c b/board/freescale/ls1046aqds/ls1046aqds.c
index 58ce75acf6c..057a11daa85 100644
--- a/board/freescale/ls1046aqds/ls1046aqds.c
+++ b/board/freescale/ls1046aqds/ls1046aqds.c
@@ -11,6 +11,7 @@
#include <asm/io.h>
#include <asm/arch/clock.h>
#include <asm/arch/fsl_serdes.h>
+#include <asm/arch/ppa.h>
#include <asm/arch/fdt.h>
#include <asm/arch/mmu.h>
#include <asm/arch/soc.h>
@@ -267,6 +268,10 @@ int board_init(void)
if (adjust_vdd(0))
printf("Warning: Adjusting core voltage failed.\n");
+#ifdef CONFIG_FSL_LS_PPA
+ ppa_init();
+#endif
+
#ifdef CONFIG_SECURE_BOOT
/*
* In case of Secure Boot, the IBR configures the SMMU
--
GitLab
From 9fa3a54220cdfaf8df54ddcdbd4feaeda6a74bd9 Mon Sep 17 00:00:00 2001
From: Sumit Garg <sumit.garg@nxp.com>
Date: Thu, 20 Apr 2017 05:09:11 +0530
Subject: [PATCH 127/282] armv8: fsl-layerscape: Support loading PPA header
from eMMC/SD and NAND Flash
Add Kconfig option to support loading PPA header from eMMC/SD and
NAND Flash.
Signed-off-by: Sumit Garg <sumit.garg@nxp.com>
Signed-off-by: Udit Agarwal <udit.agarwal@nxp.com>
Tested-by: Vinitha Pillai <vinitha.pillai@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
---
arch/arm/cpu/armv8/fsl-layerscape/Kconfig | 10 ++++++++++
1 file changed, 10 insertions(+)
diff --git a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig
index 12fd80e7dbf..4c16c4cd0c6 100644
--- a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig
+++ b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig
@@ -182,12 +182,22 @@ config SYS_LS_PPA_ESBC_ADDR
default 0x40740000 if SYS_LS_PPA_FW_IN_XIP && ARCH_LS1046A
default 0x40480000 if SYS_LS_PPA_FW_IN_XIP && ARCH_LS1012A
default 0x580c40000 if SYS_LS_PPA_FW_IN_XIP && FSL_LSCH3
+ default 0x700000 if SYS_LS_PPA_FW_IN_MMC
+ default 0x700000 if SYS_LS_PPA_FW_IN_NAND
help
If the PPA header firmware locate at XIP flash, such as NOR or
QSPI flash, this address is a directly memory-mapped.
If it is in a serial accessed flash, such as NAND and SD
card, it is a byte offset.
+config LS_PPA_ESBC_HDR_SIZE
+ hex "Length of PPA ESBC header"
+ depends on FSL_LS_PPA && CHAIN_OF_TRUST && !SYS_LS_PPA_FW_IN_XIP
+ default 0x2000
+ help
+ Length (in bytes) of PPA ESBC header to be copied from MMC/SD or
+ NAND to memory to validate PPA image.
+
endmenu
config SYS_FSL_ERRATUM_A010315
--
GitLab
From fa642559f5868b9d4a8bea77d945308a3709cce8 Mon Sep 17 00:00:00 2001
From: Sumit Garg <sumit.garg@nxp.com>
Date: Thu, 20 Apr 2017 05:09:12 +0530
Subject: [PATCH 128/282] armv8: fsl-layerscape: Add validation of PPA image
from NAND and SD
Signed-off-by: Sumit Garg <sumit.garg@nxp.com>
Signed-off-by: Udit Agarwal <udit.agarwal@nxp.com>
Tested-by: Vinitha Pillai <vinitha.pillai@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
---
arch/arm/cpu/armv8/fsl-layerscape/ppa.c | 72 ++++++++++++++++++++++++-
1 file changed, 70 insertions(+), 2 deletions(-)
diff --git a/arch/arm/cpu/armv8/fsl-layerscape/ppa.c b/arch/arm/cpu/armv8/fsl-layerscape/ppa.c
index 7f87bb86897..26c47a183c6 100644
--- a/arch/arm/cpu/armv8/fsl-layerscape/ppa.c
+++ b/arch/arm/cpu/armv8/fsl-layerscape/ppa.c
@@ -37,13 +37,20 @@ int ppa_init(void)
int ret;
#ifdef CONFIG_CHAIN_OF_TRUST
- uintptr_t ppa_esbc_hdr = CONFIG_SYS_LS_PPA_ESBC_ADDR;
+ uintptr_t ppa_esbc_hdr = 0;
uintptr_t ppa_img_addr = 0;
+#if defined(CONFIG_SYS_LS_PPA_FW_IN_MMC) || \
+ defined(CONFIG_SYS_LS_PPA_FW_IN_NAND)
+ void *ppa_hdr_ddr;
+#endif
#endif
#ifdef CONFIG_SYS_LS_PPA_FW_IN_XIP
ppa_fit_addr = (void *)CONFIG_SYS_LS_PPA_FW_ADDR;
debug("%s: PPA image load from XIP\n", __func__);
+#ifdef CONFIG_CHAIN_OF_TRUST
+ ppa_esbc_hdr = CONFIG_SYS_LS_PPA_ESBC_ADDR;
+#endif
#else /* !CONFIG_SYS_LS_PPA_FW_IN_XIP */
size_t fw_length, fdt_header_len = sizeof(struct fdt_header);
@@ -53,7 +60,7 @@ int ppa_init(void)
int dev = CONFIG_SYS_MMC_ENV_DEV;
struct fdt_header *fitp;
u32 cnt;
- u32 blk = CONFIG_SYS_LS_PPA_FW_ADDR / 512;
+ u32 blk;
debug("%s: PPA image load from eMMC/SD\n", __func__);
@@ -81,6 +88,7 @@ int ppa_init(void)
return -ENOMEM;
}
+ blk = CONFIG_SYS_LS_PPA_FW_ADDR / 512;
cnt = DIV_ROUND_UP(fdt_header_len, 512);
debug("%s: MMC read PPA FIT header: dev # %u, block # %u, count %u\n",
__func__, dev, blk, cnt);
@@ -102,6 +110,29 @@ int ppa_init(void)
return ret;
}
+#ifdef CONFIG_CHAIN_OF_TRUST
+ ppa_hdr_ddr = malloc(CONFIG_LS_PPA_ESBC_HDR_SIZE);
+ if (!ppa_hdr_ddr) {
+ printf("PPA: malloc failed for PPA header\n");
+ return -ENOMEM;
+ }
+
+ blk = CONFIG_SYS_LS_PPA_ESBC_ADDR >> 9;
+ cnt = DIV_ROUND_UP(CONFIG_LS_PPA_ESBC_HDR_SIZE, 512);
+ ret = mmc->block_dev.block_read(&mmc->block_dev, blk, cnt, ppa_hdr_ddr);
+ if (ret != cnt) {
+ free(ppa_hdr_ddr);
+ printf("MMC/SD read of PPA header failed\n");
+ return -EIO;
+ }
+ debug("Read PPA header to 0x%p\n", ppa_hdr_ddr);
+
+ /* flush cache after read */
+ flush_cache((ulong)ppa_hdr_ddr, cnt * 512);
+
+ ppa_esbc_hdr = (uintptr_t)ppa_hdr_ddr;
+#endif
+
fw_length = fdt_totalsize(fitp);
free(fitp);
@@ -113,6 +144,7 @@ int ppa_init(void)
return -ENOMEM;
}
+ blk = CONFIG_SYS_LS_PPA_FW_ADDR / 512;
cnt = DIV_ROUND_UP(fw_length, 512);
debug("%s: MMC read PPA FIT image: dev # %u, block # %u, count %u\n",
__func__, dev, blk, cnt);
@@ -148,6 +180,31 @@ int ppa_init(void)
return ret;
}
+#ifdef CONFIG_CHAIN_OF_TRUST
+ ppa_hdr_ddr = malloc(CONFIG_LS_PPA_ESBC_HDR_SIZE);
+ if (!ppa_hdr_ddr) {
+ printf("PPA: malloc failed for PPA header\n");
+ return -ENOMEM;
+ }
+
+ fw_length = CONFIG_LS_PPA_ESBC_HDR_SIZE;
+
+ ret = nand_read(nand_info[0], (loff_t)CONFIG_SYS_LS_PPA_ESBC_ADDR,
+ &fw_length, (u_char *)ppa_hdr_ddr);
+ if (ret == -EUCLEAN) {
+ free(ppa_hdr_ddr);
+ printf("NAND read of PPA firmware at offset 0x%x failed\n",
+ CONFIG_SYS_LS_PPA_FW_ADDR);
+ return -EIO;
+ }
+ debug("Read PPA header to 0x%p\n", ppa_hdr_ddr);
+
+ /* flush cache after read */
+ flush_cache((ulong)ppa_hdr_ddr, fw_length);
+
+ ppa_esbc_hdr = (uintptr_t)ppa_hdr_ddr;
+#endif
+
fw_length = fdt_totalsize(&fit);
ppa_fit_addr = malloc(fw_length);
@@ -177,6 +234,13 @@ int ppa_init(void)
#ifdef CONFIG_CHAIN_OF_TRUST
ppa_img_addr = (uintptr_t)ppa_fit_addr;
if (fsl_check_boot_mode_secure() != 0) {
+ /*
+ * In case of failure in validation, fsl_secboot_validate
+ * would not return back in case of Production environment
+ * with ITS=1. In Development environment (ITS=0 and
+ * SB_EN=1), the function may return back in case of
+ * non-fatal failures.
+ */
ret = fsl_secboot_validate(ppa_esbc_hdr,
PPA_KEY_HASH,
&ppa_img_addr);
@@ -185,6 +249,10 @@ int ppa_init(void)
else
printf("PPA validation Successful\n");
}
+#if defined(CONFIG_SYS_LS_PPA_FW_IN_MMC) || \
+ defined(CONFIG_SYS_LS_PPA_FW_IN_NAND)
+ free(ppa_hdr_ddr);
+#endif
#endif
#ifdef CONFIG_FSL_LSCH3
--
GitLab
From d14428c729fb620da73234f5a8862066454de44c Mon Sep 17 00:00:00 2001
From: Sumit Garg <sumit.garg@nxp.com>
Date: Thu, 20 Apr 2017 05:09:13 +0530
Subject: [PATCH 129/282] armv8: ls104xardb: Secure Boot: enable PPA support
for eMMC/SD and NAND boot
Signed-off-by: Sumit Garg <sumit.garg@nxp.com>
Signed-off-by: Udit Agarwal <udit.agarwal@nxp.com>
Tested-by: Vinitha Pillai <vinitha.pillai@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
---
configs/ls1043ardb_nand_SECURE_BOOT_defconfig | 1 +
configs/ls1043ardb_sdcard_SECURE_BOOT_defconfig | 1 +
configs/ls1046ardb_sdcard_SECURE_BOOT_defconfig | 1 +
3 files changed, 3 insertions(+)
diff --git a/configs/ls1043ardb_nand_SECURE_BOOT_defconfig b/configs/ls1043ardb_nand_SECURE_BOOT_defconfig
index 66c89fa5320..70f28d8258c 100644
--- a/configs/ls1043ardb_nand_SECURE_BOOT_defconfig
+++ b/configs/ls1043ardb_nand_SECURE_BOOT_defconfig
@@ -10,6 +10,7 @@ CONFIG_SPL_WATCHDOG_SUPPORT=y
CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1043a-rdb"
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
+CONFIG_FSL_LS_PPA=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPL_FSL_PBL,NAND_BOOT"
CONFIG_NAND_BOOT=y
diff --git a/configs/ls1043ardb_sdcard_SECURE_BOOT_defconfig b/configs/ls1043ardb_sdcard_SECURE_BOOT_defconfig
index 3f35d6493f7..5f9b21dec8d 100644
--- a/configs/ls1043ardb_sdcard_SECURE_BOOT_defconfig
+++ b/configs/ls1043ardb_sdcard_SECURE_BOOT_defconfig
@@ -10,6 +10,7 @@ CONFIG_SPL_WATCHDOG_SUPPORT=y
CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1043a-rdb"
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
+CONFIG_FSL_LS_PPA=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPL_FSL_PBL,SD_BOOT"
CONFIG_SECURE_BOOT=y
diff --git a/configs/ls1046ardb_sdcard_SECURE_BOOT_defconfig b/configs/ls1046ardb_sdcard_SECURE_BOOT_defconfig
index a41ec80d3ad..1e320239220 100644
--- a/configs/ls1046ardb_sdcard_SECURE_BOOT_defconfig
+++ b/configs/ls1046ardb_sdcard_SECURE_BOOT_defconfig
@@ -3,6 +3,7 @@ CONFIG_TARGET_LS1046ARDB=y
CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1046a-rdb"
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
+CONFIG_FSL_LS_PPA=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPL_FSL_PBL"
CONFIG_SECURE_BOOT=y
--
GitLab
From 026f30ec3e846edb85b5df8265d8cad098184be6 Mon Sep 17 00:00:00 2001
From: Yuantian Tang <andy.tang@nxp.com>
Date: Wed, 19 Apr 2017 13:27:39 +0800
Subject: [PATCH 130/282] arm: psci: make psci usable on single core socs
PSCI can be used on both multiple and single core socs. Current
implementation only allows PSCI to work on multiple core socs.
This patch removes this restriction so that PSCI can work on
single core socs as well.
Signed-off-by: Chenhui Zhao <chenhui.zhao@nxp.com>
Signed-off-by: Tang Yuantian <andy.tang@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
---
arch/arm/cpu/armv8/cpu-dt.c | 13 ++-----
arch/arm/cpu/armv8/fsl-layerscape/cpu.c | 35 +++++++++----------
arch/arm/cpu/armv8/sec_firmware.c | 2 +-
arch/arm/include/asm/arch-fsl-layerscape/mp.h | 4 +++
arch/arm/include/asm/armv8/sec_firmware.h | 7 ++++
5 files changed, 31 insertions(+), 30 deletions(-)
diff --git a/arch/arm/cpu/armv8/cpu-dt.c b/arch/arm/cpu/armv8/cpu-dt.c
index 5156a15d110..e3c8aa2e613 100644
--- a/arch/arm/cpu/armv8/cpu-dt.c
+++ b/arch/arm/cpu/armv8/cpu-dt.c
@@ -7,25 +7,19 @@
#include <common.h>
#include <asm/psci.h>
#include <asm/system.h>
-#ifdef CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT
#include <asm/armv8/sec_firmware.h>
-#endif
+#ifdef CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT
int psci_update_dt(void *fdt)
{
-#ifdef CONFIG_MP
-#if defined(CONFIG_ARMV8_PSCI) || defined(CONFIG_SEC_FIRMWARE_ARMV8_PSCI)
-
-#ifdef CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT
/*
* If the PSCI in SEC Firmware didn't work, avoid to update the
* device node of PSCI. But still return 0 instead of an error
* number to support detecting PSCI dynamically and then switching
* the SMP boot method between PSCI and spin-table.
*/
- if (sec_firmware_support_psci_version() == 0xffffffff)
+ if (sec_firmware_support_psci_version() == PSCI_INVALID_VER)
return 0;
-#endif
fdt_psci(fdt);
#if defined(CONFIG_ARMV8_PSCI) && !defined(CONFIG_ARMV8_SECURE_BASE)
@@ -34,7 +28,6 @@ int psci_update_dt(void *fdt)
__secure_end - __secure_start);
#endif
-#endif
-#endif
return 0;
}
+#endif
diff --git a/arch/arm/cpu/armv8/fsl-layerscape/cpu.c b/arch/arm/cpu/armv8/fsl-layerscape/cpu.c
index c24f3f173c0..bb029608bf2 100644
--- a/arch/arm/cpu/armv8/fsl-layerscape/cpu.c
+++ b/arch/arm/cpu/armv8/fsl-layerscape/cpu.c
@@ -15,18 +15,14 @@
#include <asm/arch/soc.h>
#include <asm/arch/cpu.h>
#include <asm/arch/speed.h>
-#ifdef CONFIG_MP
#include <asm/arch/mp.h>
-#endif
#include <efi_loader.h>
#include <fm_eth.h>
#include <fsl-mc/fsl_mc.h>
#ifdef CONFIG_FSL_ESDHC
#include <fsl_esdhc.h>
#endif
-#ifdef CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT
#include <asm/armv8/sec_firmware.h>
-#endif
#ifdef CONFIG_SYS_FSL_DDR
#include <fsl_ddr.h>
#endif
@@ -475,13 +471,19 @@ int cpu_eth_init(bd_t *bis)
return error;
}
-int arch_early_init_r(void)
+static inline int check_psci(void)
{
-#ifdef CONFIG_MP
- int rv = 1;
- u32 psci_ver = 0xffffffff;
-#endif
+ unsigned int psci_ver;
+ psci_ver = sec_firmware_support_psci_version();
+ if (psci_ver == PSCI_INVALID_VER)
+ return 1;
+
+ return 0;
+}
+
+int arch_early_init_r(void)
+{
#ifdef CONFIG_SYS_FSL_ERRATUM_A009635
u32 svr_dev_id;
/*
@@ -495,18 +497,13 @@ int arch_early_init_r(void)
#if defined(CONFIG_SYS_FSL_ERRATUM_A009942) && defined(CONFIG_SYS_FSL_DDR)
erratum_a009942_check_cpo();
#endif
-#ifdef CONFIG_MP
-#if defined(CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT) && \
- defined(CONFIG_SEC_FIRMWARE_ARMV8_PSCI)
- /* Check the psci version to determine if the psci is supported */
- psci_ver = sec_firmware_support_psci_version();
-#endif
- if (psci_ver == 0xffffffff) {
- rv = fsl_layerscape_wake_seconday_cores();
- if (rv)
+ if (check_psci()) {
+ debug("PSCI: PSCI does not exist.\n");
+
+ /* if PSCI does not exist, boot secondary cores here */
+ if (fsl_layerscape_wake_seconday_cores())
printf("Did not wake secondary cores\n");
}
-#endif
#ifdef CONFIG_SYS_HAS_SERDES
fsl_serdes_init();
diff --git a/arch/arm/cpu/armv8/sec_firmware.c b/arch/arm/cpu/armv8/sec_firmware.c
index ec9cf40241a..4afa3ad8b1d 100644
--- a/arch/arm/cpu/armv8/sec_firmware.c
+++ b/arch/arm/cpu/armv8/sec_firmware.c
@@ -227,7 +227,7 @@ unsigned int sec_firmware_support_psci_version(void)
if (sec_firmware_addr & SEC_FIRMWARE_RUNNING)
return _sec_firmware_support_psci_version();
- return 0xffffffff;
+ return PSCI_INVALID_VER;
}
#endif
diff --git a/arch/arm/include/asm/arch-fsl-layerscape/mp.h b/arch/arm/include/asm/arch-fsl-layerscape/mp.h
index d0832b54bc5..fd3f851b537 100644
--- a/arch/arm/include/asm/arch-fsl-layerscape/mp.h
+++ b/arch/arm/include/asm/arch-fsl-layerscape/mp.h
@@ -31,7 +31,11 @@ extern u64 __spin_table[];
extern u64 __real_cntfrq;
extern u64 *secondary_boot_code;
extern size_t __secondary_boot_code_size;
+#ifdef CONFIG_MP
int fsl_layerscape_wake_seconday_cores(void);
+#else
+static inline int fsl_layerscape_wake_seconday_cores(void) { return 0; }
+#endif
void *get_spin_tbl_addr(void);
phys_addr_t determine_mp_bootpg(void);
void secondary_boot_func(void);
diff --git a/arch/arm/include/asm/armv8/sec_firmware.h b/arch/arm/include/asm/armv8/sec_firmware.h
index bcdb1b00720..bc1d97d7a98 100644
--- a/arch/arm/include/asm/armv8/sec_firmware.h
+++ b/arch/arm/include/asm/armv8/sec_firmware.h
@@ -7,12 +7,19 @@
#ifndef __SEC_FIRMWARE_H_
#define __SEC_FIRMWARE_H_
+#define PSCI_INVALID_VER 0xffffffff
+
int sec_firmware_init(const void *, u32 *, u32 *);
int _sec_firmware_entry(const void *, u32 *, u32 *);
bool sec_firmware_is_valid(const void *);
#ifdef CONFIG_SEC_FIRMWARE_ARMV8_PSCI
unsigned int sec_firmware_support_psci_version(void);
unsigned int _sec_firmware_support_psci_version(void);
+#else
+static inline unsigned int sec_firmware_support_psci_version(void)
+{
+ return PSCI_INVALID_VER;
+}
#endif
#endif /* __SEC_FIRMWARE_H_ */
--
GitLab
From fedebf0d08a7aa152f8f27de1d40eb036557c11b Mon Sep 17 00:00:00 2001
From: York Sun <york.sun@nxp.com>
Date: Thu, 20 Apr 2017 16:04:23 -0700
Subject: [PATCH 131/282] armv8: layerscape: Fix DDR size calcuation for SPL
build
Commit 088454cd dropped return value from initram(), setting
gd->ram_size directly. Three boards were missed for SPL boot.
Signed-off-by: York Sun <york.sun@nxp.com>
---
board/freescale/ls1043aqds/ddr.c | 4 +++-
board/freescale/ls1046aqds/ddr.c | 4 +++-
board/freescale/ls1046ardb/ddr.c | 4 +++-
3 files changed, 9 insertions(+), 3 deletions(-)
diff --git a/board/freescale/ls1043aqds/ddr.c b/board/freescale/ls1043aqds/ddr.c
index 2643f5bf4aa..b22d3784dce 100644
--- a/board/freescale/ls1043aqds/ddr.c
+++ b/board/freescale/ls1043aqds/ddr.c
@@ -113,7 +113,9 @@ int fsl_initdram(void)
phys_size_t dram_size;
#if defined(CONFIG_SPL) && !defined(CONFIG_SPL_BUILD)
- return fsl_ddr_sdram_size();
+ gd->ram_size = fsl_ddr_sdram_size();
+
+ return 0;
#else
puts("Initializing DDR....using SPD\n");
diff --git a/board/freescale/ls1046aqds/ddr.c b/board/freescale/ls1046aqds/ddr.c
index d37af34a9c9..5fcfa0f7018 100644
--- a/board/freescale/ls1046aqds/ddr.c
+++ b/board/freescale/ls1046aqds/ddr.c
@@ -97,7 +97,9 @@ int fsl_initdram(void)
phys_size_t dram_size;
#if defined(CONFIG_SPL) && !defined(CONFIG_SPL_BUILD)
- return fsl_ddr_sdram_size();
+ gd->ram_size = fsl_ddr_sdram_size();
+
+ return 0;
#else
puts("Initializing DDR....using SPD\n");
diff --git a/board/freescale/ls1046ardb/ddr.c b/board/freescale/ls1046ardb/ddr.c
index a16f7bc83a9..ae5046cab69 100644
--- a/board/freescale/ls1046ardb/ddr.c
+++ b/board/freescale/ls1046ardb/ddr.c
@@ -101,7 +101,9 @@ int fsl_initdram(void)
phys_size_t dram_size;
#if defined(CONFIG_SPL) && !defined(CONFIG_SPL_BUILD)
- return fsl_ddr_sdram_size();
+ gd->ram_size = fsl_ddr_sdram_size();
+
+ return 0;
#else
puts("Initializing DDR....using SPD\n");
--
GitLab
From e8f86a026125ff2b2d6bd6eac73d2542852aab84 Mon Sep 17 00:00:00 2001
From: Icenowy Zheng <icenowy@aosc.io>
Date: Tue, 25 Apr 2017 01:39:51 +0800
Subject: [PATCH 132/282] sunxi: fix the default value of CONS_INDEX on
non-A23/A33 SUN8I
Only A23/A33 in SUN8I want a default value of CONS_INDEX of 5, for other
chips the default value is 1 like other Allwinner SoCs.
Fix this default value.
The original wrong value has lead to wrong console on H3 Orange Pi
boards.
Fixes: 7095f8641863 ("sunxi: Convert CONS_INDEX to Kconfig")
Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
---
drivers/serial/Kconfig | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/serial/Kconfig b/drivers/serial/Kconfig
index a753367ee14..58320666b7d 100644
--- a/drivers/serial/Kconfig
+++ b/drivers/serial/Kconfig
@@ -48,11 +48,11 @@ config CONS_INDEX
int "UART used for console"
depends on ARCH_SUNXI
default 2 if MACH_SUN5I
- default 5 if MACH_SUN8I
+ default 5 if MACH_SUN8I_A23 || MACH_SUN8I_A33
default 1
help
Configures the console index.
- For Allwinner SoC., default values are 2 for SUN5I and 5 for SUN8I.
+ For Allwinner SoC., default values are 2 for SUN5I and 5 for A23/A33.
Otherwise, the index equals 1.
config DM_SERIAL
--
GitLab
From 6bd041f00d5d80761852eae1ecb7879a27f3c289 Mon Sep 17 00:00:00 2001
From: Dalon Westergreen <dwesterg@gmail.com>
Date: Tue, 18 Apr 2017 08:11:16 -0700
Subject: [PATCH 133/282] arm: socfpga: add cyclone5 based de10-nano board
Add support for the Terasic DE10-Nano board. The board
is based on the DE0-Nano-Soc board but adds a larger FPGA
and an HDMI output.
Signed-off-by: Dalon Westergreen <dwesterg@gmail.com>
Reviewed-by: Dinh Nguyen <dinguyen@kernel.org>
---
arch/arm/dts/Makefile | 1 +
arch/arm/dts/socfpga_cyclone5_de10_nano.dts | 68 ++
arch/arm/mach-socfpga/Kconfig | 7 +
board/terasic/de10-nano/MAINTAINERS | 5 +
board/terasic/de10-nano/Makefile | 9 +
board/terasic/de10-nano/qts/iocsr_config.h | 660 ++++++++++++++++++++
board/terasic/de10-nano/qts/pinmux_config.h | 219 +++++++
board/terasic/de10-nano/qts/pll_config.h | 85 +++
board/terasic/de10-nano/qts/sdram_config.h | 344 ++++++++++
board/terasic/de10-nano/socfpga.c | 6 +
configs/socfpga_de10_nano_defconfig | 59 ++
include/configs/socfpga_de10_nano.h | 33 +
12 files changed, 1496 insertions(+)
create mode 100644 arch/arm/dts/socfpga_cyclone5_de10_nano.dts
create mode 100644 board/terasic/de10-nano/MAINTAINERS
create mode 100644 board/terasic/de10-nano/Makefile
create mode 100644 board/terasic/de10-nano/qts/iocsr_config.h
create mode 100644 board/terasic/de10-nano/qts/pinmux_config.h
create mode 100644 board/terasic/de10-nano/qts/pll_config.h
create mode 100644 board/terasic/de10-nano/qts/sdram_config.h
create mode 100644 board/terasic/de10-nano/socfpga.c
create mode 100644 configs/socfpga_de10_nano_defconfig
create mode 100644 include/configs/socfpga_de10_nano.h
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index 53fc936f022..5656e0d10ed 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -153,6 +153,7 @@ dtb-$(CONFIG_ARCH_SOCFPGA) += \
socfpga_cyclone5_socdk.dtb \
socfpga_cyclone5_de0_nano_soc.dtb \
socfpga_cyclone5_de1_soc.dtb \
+ socfpga_cyclone5_de10_nano.dtb \
socfpga_cyclone5_sockit.dtb \
socfpga_cyclone5_socrates.dtb \
socfpga_cyclone5_sr1500.dtb \
diff --git a/arch/arm/dts/socfpga_cyclone5_de10_nano.dts b/arch/arm/dts/socfpga_cyclone5_de10_nano.dts
new file mode 100644
index 00000000000..ee62a50f5d1
--- /dev/null
+++ b/arch/arm/dts/socfpga_cyclone5_de10_nano.dts
@@ -0,0 +1,68 @@
+/*
+ * Copyright (C) 2017, Intel Corporation
+ *
+ * based on socfpga_cyclone5_de0_nano_soc.dts
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include "socfpga_cyclone5.dtsi"
+
+/ {
+ model = "Terasic DE10-Nano";
+ compatible = "altr,socfpga-cyclone5", "altr,socfpga";
+
+ chosen {
+ bootargs = "console=ttyS0,115200";
+ };
+
+ aliases {
+ ethernet0 = &gmac1;
+ udc0 = &usb1;
+ };
+
+ memory {
+ name = "memory";
+ device_type = "memory";
+ reg = <0x0 0x40000000>; /* 1GB */
+ };
+
+ soc {
+ u-boot,dm-pre-reloc;
+ };
+};
+
+&gmac1 {
+ status = "okay";
+ phy-mode = "rgmii";
+
+ rxd0-skew-ps = <420>;
+ rxd1-skew-ps = <420>;
+ rxd2-skew-ps = <420>;
+ rxd3-skew-ps = <420>;
+ txen-skew-ps = <0>;
+ txc-skew-ps = <1860>;
+ rxdv-skew-ps = <420>;
+ rxc-skew-ps = <1680>;
+};
+
+&gpio0 {
+ status = "okay";
+};
+
+&gpio1 {
+ status = "okay";
+};
+
+&gpio2 {
+ status = "okay";
+};
+
+&mmc0 {
+ status = "okay";
+ u-boot,dm-pre-reloc;
+};
+
+&usb1 {
+ status = "okay";
+};
diff --git a/arch/arm/mach-socfpga/Kconfig b/arch/arm/mach-socfpga/Kconfig
index 9bfee04098c..f6e5773272d 100644
--- a/arch/arm/mach-socfpga/Kconfig
+++ b/arch/arm/mach-socfpga/Kconfig
@@ -82,6 +82,10 @@ config TARGET_SOCFPGA_TERASIC_DE0_NANO
bool "Terasic DE0-Nano-Atlas (Cyclone V)"
select TARGET_SOCFPGA_CYCLONE5
+config TARGET_SOCFPGA_TERASIC_DE10_NANO
+ bool "Terasic DE10-Nano (Cyclone V)"
+ select TARGET_SOCFPGA_CYCLONE5
+
config TARGET_SOCFPGA_TERASIC_DE1_SOC
bool "Terasic DE1-SoC (Cyclone V)"
select TARGET_SOCFPGA_CYCLONE5
@@ -97,6 +101,7 @@ config SYS_BOARD
default "cyclone5-socdk" if TARGET_SOCFPGA_CYCLONE5_SOCDK
default "de0-nano-soc" if TARGET_SOCFPGA_TERASIC_DE0_NANO
default "de1-soc" if TARGET_SOCFPGA_TERASIC_DE1_SOC
+ default "de10-nano" if TARGET_SOCFPGA_TERASIC_DE10_NANO
default "is1" if TARGET_SOCFPGA_IS1
default "mcvevk" if TARGET_SOCFPGA_ARIES_MCVEVK
default "sockit" if TARGET_SOCFPGA_TERASIC_SOCKIT
@@ -112,6 +117,7 @@ config SYS_VENDOR
default "samtec" if TARGET_SOCFPGA_SAMTEC_VINING_FPGA
default "terasic" if TARGET_SOCFPGA_TERASIC_DE0_NANO
default "terasic" if TARGET_SOCFPGA_TERASIC_DE1_SOC
+ default "terasic" if TARGET_SOCFPGA_TERASIC_DE10_NANO
default "terasic" if TARGET_SOCFPGA_TERASIC_SOCKIT
config SYS_SOC
@@ -122,6 +128,7 @@ config SYS_CONFIG_NAME
default "socfpga_cyclone5_socdk" if TARGET_SOCFPGA_CYCLONE5_SOCDK
default "socfpga_de0_nano_soc" if TARGET_SOCFPGA_TERASIC_DE0_NANO
default "socfpga_de1_soc" if TARGET_SOCFPGA_TERASIC_DE1_SOC
+ default "socfpga_de10_nano" if TARGET_SOCFPGA_TERASIC_DE10_NANO
default "socfpga_is1" if TARGET_SOCFPGA_IS1
default "socfpga_mcvevk" if TARGET_SOCFPGA_ARIES_MCVEVK
default "socfpga_sockit" if TARGET_SOCFPGA_TERASIC_SOCKIT
diff --git a/board/terasic/de10-nano/MAINTAINERS b/board/terasic/de10-nano/MAINTAINERS
new file mode 100644
index 00000000000..f4dd0dff3ba
--- /dev/null
+++ b/board/terasic/de10-nano/MAINTAINERS
@@ -0,0 +1,5 @@
+DE10-NANO BOARD
+M: Dalon Westergreen <dwesterg@gmail.com>
+S: Maintained
+F: include/configs/socfpga_de10_nano.h
+F: configs/socfpga_de10_nano_defconfig
diff --git a/board/terasic/de10-nano/Makefile b/board/terasic/de10-nano/Makefile
new file mode 100644
index 00000000000..ab38f4264f1
--- /dev/null
+++ b/board/terasic/de10-nano/Makefile
@@ -0,0 +1,9 @@
+#
+# SPDX-License-Identifier: GPL-2.0+
+#
+# Copyright (C) 2017, Intel Corporation
+#
+# SPDX-License-Identifier: GPL-2.0+
+#
+
+obj-y := socfpga.o
diff --git a/board/terasic/de10-nano/qts/iocsr_config.h b/board/terasic/de10-nano/qts/iocsr_config.h
new file mode 100644
index 00000000000..7e049bf81ed
--- /dev/null
+++ b/board/terasic/de10-nano/qts/iocsr_config.h
@@ -0,0 +1,660 @@
+/*
+ * Altera SoCFPGA IOCSR configuration
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+
+#ifndef __SOCFPGA_IOCSR_CONFIG_H__
+#define __SOCFPGA_IOCSR_CONFIG_H__
+
+#define CONFIG_HPS_IOCSR_SCANCHAIN0_LENGTH 764
+#define CONFIG_HPS_IOCSR_SCANCHAIN1_LENGTH 1719
+#define CONFIG_HPS_IOCSR_SCANCHAIN2_LENGTH 955
+#define CONFIG_HPS_IOCSR_SCANCHAIN3_LENGTH 16766
+
+const unsigned long iocsr_scan_chain0_table[] = {
+ 0x00000000,
+ 0x00000000,
+ 0x0FF00000,
+ 0xC0000000,
+ 0x0000003F,
+ 0x00008000,
+ 0x00020080,
+ 0x18060000,
+ 0x08000000,
+ 0x00018020,
+ 0x00000000,
+ 0x00004000,
+ 0x00010040,
+ 0x04010000,
+ 0x04000000,
+ 0x00000010,
+ 0x00004010,
+ 0x00002000,
+ 0x00020000,
+ 0x02008000,
+ 0x02000000,
+ 0x00000008,
+ 0x00002008,
+ 0x00001000,
+};
+
+const unsigned long iocsr_scan_chain1_table[] = {
+ 0x00100000,
+ 0x10040000,
+ 0x100000C0,
+ 0x00000040,
+ 0x00010040,
+ 0x00008000,
+ 0x00060180,
+ 0x20000000,
+ 0x00000000,
+ 0x00000080,
+ 0x00020000,
+ 0x00004000,
+ 0x00010040,
+ 0x10000000,
+ 0x04000000,
+ 0x00000010,
+ 0x00004010,
+ 0x00002000,
+ 0x00020000,
+ 0x06018000,
+ 0x01FE0000,
+ 0xF8000000,
+ 0x00000007,
+ 0x00001000,
+ 0x00010000,
+ 0x04000000,
+ 0x00000000,
+ 0x00000010,
+ 0x00004000,
+ 0x00000800,
+ 0x00000000,
+ 0x00000000,
+ 0x00000000,
+ 0x00000008,
+ 0x00002000,
+ 0x00000400,
+ 0x00000000,
+ 0x00401000,
+ 0x00000003,
+ 0x00000000,
+ 0x00000000,
+ 0x00000200,
+ 0x00600802,
+ 0x00000000,
+ 0x80200000,
+ 0x80000600,
+ 0x00000200,
+ 0x00000100,
+ 0x00300401,
+ 0xC0100400,
+ 0x40100000,
+ 0x40000300,
+ 0x000C0100,
+ 0x00000080,
+};
+
+const unsigned long iocsr_scan_chain2_table[] = {
+ 0x300C0300,
+ 0x00000000,
+ 0x0FF00000,
+ 0x00000000,
+ 0x0C0300C0,
+ 0x00008000,
+ 0x00080000,
+ 0x18060000,
+ 0x18000000,
+ 0x00018060,
+ 0x00020000,
+ 0x00004000,
+ 0x200300C0,
+ 0x10000000,
+ 0x00000000,
+ 0x00000040,
+ 0x00010000,
+ 0x00002000,
+ 0x10018060,
+ 0x06018000,
+ 0x06000000,
+ 0x00010018,
+ 0x00006018,
+ 0x00001000,
+ 0x00010000,
+ 0x00000000,
+ 0x03000000,
+ 0x0000800C,
+ 0x00C01004,
+ 0x00000800,
+};
+
+const unsigned long iocsr_scan_chain3_table[] = {
+ 0x0C420D80,
+ 0x082000FF,
+ 0x0A804001,
+ 0x07900000,
+ 0x08020000,
+ 0x00100000,
+ 0x0A800000,
+ 0x07900000,
+ 0x08020000,
+ 0x00100000,
+ 0xC8800000,
+ 0x00003001,
+ 0x00C00722,
+ 0x00000000,
+ 0x00000021,
+ 0x82000004,
+ 0x05400000,
+ 0x03C80000,
+ 0x04010000,
+ 0x00080000,
+ 0x05400000,
+ 0x03C80000,
+ 0x05400000,
+ 0x03C80000,
+ 0xE4400000,
+ 0x00001800,
+ 0x00600391,
+ 0x800E4400,
+ 0x00000001,
+ 0x40000002,
+ 0x02A00000,
+ 0x01E40000,
+ 0x02A00000,
+ 0x01E40000,
+ 0x02A00000,
+ 0x01E40000,
+ 0x02A00000,
+ 0x01E40000,
+ 0x72200000,
+ 0x80000C00,
+ 0x003001C8,
+ 0xC0072200,
+ 0x1C880000,
+ 0x20000300,
+ 0x00040000,
+ 0x50670000,
+ 0x00000010,
+ 0x24590000,
+ 0x00001000,
+ 0xA0000034,
+ 0x0D000001,
+ 0xC0680618,
+ 0x45034071,
+ 0x0A281A01,
+ 0x806180D0,
+ 0x34071C06,
+ 0x01A034D0,
+ 0x180D0000,
+ 0x71C06806,
+ 0x01450340,
+ 0xD000001A,
+ 0x0680E380,
+ 0x10040000,
+ 0x00200000,
+ 0x10040000,
+ 0x00200000,
+ 0x15000000,
+ 0x0F200000,
+ 0x15000000,
+ 0x0F200000,
+ 0x01FE0000,
+ 0x00000000,
+ 0x01800E44,
+ 0x00391000,
+ 0x007F8006,
+ 0x00000000,
+ 0x0A800001,
+ 0x07900000,
+ 0x0A800000,
+ 0x07900000,
+ 0x0A800000,
+ 0x07900000,
+ 0x08020000,
+ 0x00100000,
+ 0xC8800000,
+ 0x00003001,
+ 0x00C00722,
+ 0x00000FF0,
+ 0x72200000,
+ 0x80000C00,
+ 0x05400000,
+ 0x02480000,
+ 0x04000000,
+ 0x00080000,
+ 0x05400000,
+ 0x03C80000,
+ 0x05400000,
+ 0x03C80000,
+ 0x6A1C0000,
+ 0x00001800,
+ 0x00600391,
+ 0x800E4400,
+ 0x1A870001,
+ 0x40000600,
+ 0x02A00040,
+ 0x01E40000,
+ 0x02A00000,
+ 0x01E40000,
+ 0x02A00000,
+ 0x01E40000,
+ 0x02A00000,
+ 0x01E40000,
+ 0x72200000,
+ 0x80000C00,
+ 0x003001C8,
+ 0xC0072200,
+ 0x1C880000,
+ 0x20000300,
+ 0x00040000,
+ 0x50670000,
+ 0x00000010,
+ 0x24590000,
+ 0x00001000,
+ 0xA0000034,
+ 0x0D000001,
+ 0xC0680618,
+ 0x45034071,
+ 0x0A281A01,
+ 0x806180D0,
+ 0x34071C06,
+ 0x01A00040,
+ 0x180D0002,
+ 0x71C06806,
+ 0x01450340,
+ 0xD00A281A,
+ 0x06806180,
+ 0x10040000,
+ 0x00200000,
+ 0x10040000,
+ 0x00200000,
+ 0x15000000,
+ 0x0F200000,
+ 0x15000000,
+ 0x0F200000,
+ 0x01FE0000,
+ 0x00000000,
+ 0x01800E44,
+ 0x00391000,
+ 0x007F8006,
+ 0x00000000,
+ 0x99300001,
+ 0x34343400,
+ 0xAA0D4000,
+ 0x01C3A800,
+ 0xAA0D4000,
+ 0x01C3A800,
+ 0xAA0D4000,
+ 0x01C3A800,
+ 0x00040100,
+ 0x00000800,
+ 0x00000000,
+ 0x00001208,
+ 0x00482000,
+ 0x01000000,
+ 0x00000000,
+ 0x00410482,
+ 0x0006A000,
+ 0x0001B400,
+ 0x00020000,
+ 0x00000400,
+ 0x0002A000,
+ 0x0001E400,
+ 0x5506A000,
+ 0x00E1D400,
+ 0x00000000,
+ 0xC880090C,
+ 0x00003001,
+ 0x90400000,
+ 0x00000000,
+ 0x2020C243,
+ 0x2A835000,
+ 0x0070EA00,
+ 0x2A835000,
+ 0x0070EA00,
+ 0x2A835000,
+ 0x0070EA00,
+ 0x00010040,
+ 0x00000200,
+ 0x00000000,
+ 0x00000482,
+ 0x00120800,
+ 0x00002000,
+ 0x80000000,
+ 0x00104120,
+ 0x00000200,
+ 0xAC0D5F80,
+ 0xFFFFFFFF,
+ 0x14F3690D,
+ 0x1A041414,
+ 0x00D00000,
+ 0x0C864000,
+ 0x79E47A03,
+ 0xCAAAA3DD,
+ 0xF6D5551E,
+ 0x0352D348,
+ 0x821A0000,
+ 0x0000D000,
+ 0x030C0680,
+ 0xD559647A,
+ 0x1ECAAAA3,
+ 0xC8F6D965,
+ 0x00034AB2,
+ 0x00080200,
+ 0x00001000,
+ 0x00080200,
+ 0x00001000,
+ 0x000A8000,
+ 0x00075000,
+ 0x541A8000,
+ 0x03875001,
+ 0x10000000,
+ 0x00000000,
+ 0x0080C000,
+ 0x41000000,
+ 0x00003FC2,
+ 0x00820000,
+ 0xAA0D4000,
+ 0x01C3A800,
+ 0xAA0D4000,
+ 0x01C3A800,
+ 0xAA0D4000,
+ 0x01C3A800,
+ 0x00040100,
+ 0x00000800,
+ 0x00000000,
+ 0x00001208,
+ 0x00482000,
+ 0x00008000,
+ 0x00000000,
+ 0x00410482,
+ 0x0006A000,
+ 0x0001B400,
+ 0x00020000,
+ 0x00000400,
+ 0x00020080,
+ 0x00000400,
+ 0x5506A000,
+ 0x00E1D400,
+ 0x00000000,
+ 0x0000090C,
+ 0x00000010,
+ 0x90400000,
+ 0x00000000,
+ 0x2020C243,
+ 0x2A835000,
+ 0x0070EA00,
+ 0x2A835000,
+ 0x0070EA00,
+ 0x2A835000,
+ 0x0070EA00,
+ 0x00015000,
+ 0x0000F200,
+ 0x00000000,
+ 0x00000482,
+ 0x00120800,
+ 0x00600391,
+ 0x80000000,
+ 0x00104120,
+ 0x00000200,
+ 0xAC0D5F80,
+ 0xFFFFFFFF,
+ 0x14F3690D,
+ 0x1A041414,
+ 0x00D00000,
+ 0x0C864000,
+ 0x79E47A03,
+ 0x8B2CA3DD,
+ 0xF6D9651E,
+ 0x034AB2C8,
+ 0x821A0041,
+ 0x0000D000,
+ 0x00000680,
+ 0xD559647A,
+ 0x1E8B2CA3,
+ 0xC8F6D965,
+ 0x00034AB2,
+ 0x00080200,
+ 0x00001000,
+ 0x00080200,
+ 0x00001000,
+ 0x000A8000,
+ 0x00075000,
+ 0x541A8000,
+ 0x03875001,
+ 0x10000000,
+ 0x00000000,
+ 0x0080C000,
+ 0x41000000,
+ 0x04000002,
+ 0x00820000,
+ 0xAA0D4000,
+ 0x01C3A800,
+ 0xAA0D4000,
+ 0x01C3A800,
+ 0xAA0D4000,
+ 0x01C3A800,
+ 0x00040100,
+ 0x00000800,
+ 0x00000000,
+ 0x00001208,
+ 0x00482000,
+ 0x00008000,
+ 0x00000000,
+ 0x00410482,
+ 0x0006A000,
+ 0x0001B400,
+ 0x00020000,
+ 0x00000400,
+ 0x0002A000,
+ 0x0001E400,
+ 0x5506A000,
+ 0x00E1D400,
+ 0x00000000,
+ 0xC880090C,
+ 0x00003001,
+ 0x90400000,
+ 0x00000000,
+ 0x2020C243,
+ 0x2A835000,
+ 0x0070EA00,
+ 0x2A835000,
+ 0x0070EA00,
+ 0x2A835000,
+ 0x0070EA00,
+ 0x00010040,
+ 0x00000200,
+ 0x00000000,
+ 0x00000482,
+ 0x00120800,
+ 0x00002000,
+ 0x80000000,
+ 0x00104120,
+ 0x00000200,
+ 0xAC0D5F80,
+ 0xFFFFFFFF,
+ 0x14F3690D,
+ 0x1A041414,
+ 0x00D00000,
+ 0x14864000,
+ 0x59647A05,
+ 0x8AAAA3D5,
+ 0xF6D9651E,
+ 0x034AB2C8,
+ 0x821A0000,
+ 0x0000D000,
+ 0x00000680,
+ 0xD559647A,
+ 0x1E8B2CA3,
+ 0xC8F6D965,
+ 0x00034AB2,
+ 0x00080200,
+ 0x00001000,
+ 0x00080200,
+ 0x00001000,
+ 0x000A8000,
+ 0x00075000,
+ 0x541A8000,
+ 0x03875001,
+ 0x10000000,
+ 0x00000000,
+ 0x0080C000,
+ 0x41000000,
+ 0x04000002,
+ 0x00820000,
+ 0xAA0D4000,
+ 0x01C3A800,
+ 0xAA0D4000,
+ 0x01C3A800,
+ 0xAA0D4000,
+ 0x01C3A800,
+ 0x00040100,
+ 0x00000800,
+ 0x00000000,
+ 0x00001208,
+ 0x00482000,
+ 0x00008000,
+ 0x00000000,
+ 0x00410482,
+ 0x0006A000,
+ 0x0001B400,
+ 0x00020000,
+ 0x00000400,
+ 0x00020080,
+ 0x00000400,
+ 0x5506A000,
+ 0x00E1D400,
+ 0x00000000,
+ 0x0000090C,
+ 0x00000010,
+ 0x90400000,
+ 0x00000000,
+ 0x2020C243,
+ 0x2A835000,
+ 0x0070EA00,
+ 0x2A835000,
+ 0x0070EA00,
+ 0x2A835000,
+ 0x0070EA00,
+ 0x00010040,
+ 0x00000200,
+ 0x00000000,
+ 0x00000482,
+ 0x00120800,
+ 0x00400000,
+ 0x80000000,
+ 0x00104120,
+ 0x00000200,
+ 0xAC0D5F80,
+ 0xFFFFFFFF,
+ 0x14F1690D,
+ 0x1A041414,
+ 0x00D00000,
+ 0x14864000,
+ 0x59647A05,
+ 0x8B2CA3D5,
+ 0xF6D9651E,
+ 0x0352D348,
+ 0x821A0000,
+ 0x0000D000,
+ 0x00000680,
+ 0xD559647A,
+ 0x1E8B2CA3,
+ 0x48F6D965,
+ 0x000352D3,
+ 0x00080200,
+ 0x00001000,
+ 0x00080200,
+ 0x00001000,
+ 0x000A8000,
+ 0x00075000,
+ 0x541A8000,
+ 0x03875001,
+ 0x10000000,
+ 0x00000000,
+ 0x0080C000,
+ 0x41000000,
+ 0x04000002,
+ 0x00820000,
+ 0x00489800,
+ 0x801A1A1A,
+ 0x00000200,
+ 0x80000004,
+ 0x00000200,
+ 0x80000004,
+ 0x00000200,
+ 0x80000004,
+ 0x00000200,
+ 0x00000004,
+ 0x00040000,
+ 0x10000000,
+ 0x00000000,
+ 0x00000040,
+ 0x00010000,
+ 0x40002000,
+ 0x00000100,
+ 0x40000002,
+ 0x00000100,
+ 0x40000002,
+ 0x00000100,
+ 0x40000002,
+ 0x00000100,
+ 0x00000002,
+ 0x00020000,
+ 0x08000000,
+ 0x00000000,
+ 0x00000020,
+ 0x00008000,
+ 0x20001000,
+ 0x00000080,
+ 0x20000001,
+ 0x00000080,
+ 0x20000001,
+ 0x00000080,
+ 0x20000001,
+ 0x00000080,
+ 0x00000001,
+ 0x00010000,
+ 0x04000000,
+ 0x00FF0000,
+ 0x00000000,
+ 0x00004000,
+ 0x00000800,
+ 0xC0000001,
+ 0x00041419,
+ 0x40000000,
+ 0x04000816,
+ 0x000D0000,
+ 0x00006800,
+ 0x00000340,
+ 0xD000001A,
+ 0x06800000,
+ 0x00340000,
+ 0x0001A000,
+ 0x00000D00,
+ 0x40000068,
+ 0x1A000003,
+ 0x00D00000,
+ 0x00068000,
+ 0x00003400,
+ 0x000001A0,
+ 0x00000401,
+ 0x00000008,
+ 0x00000401,
+ 0x00000008,
+ 0x00000401,
+ 0x00000008,
+ 0x00000401,
+ 0x80000008,
+ 0x0000007F,
+ 0x20000000,
+ 0x00000000,
+ 0xE0000080,
+ 0x0000001F,
+ 0x00004000,
+};
+
+
+#endif /* __SOCFPGA_IOCSR_CONFIG_H__ */
diff --git a/board/terasic/de10-nano/qts/pinmux_config.h b/board/terasic/de10-nano/qts/pinmux_config.h
new file mode 100644
index 00000000000..b8f5ea14137
--- /dev/null
+++ b/board/terasic/de10-nano/qts/pinmux_config.h
@@ -0,0 +1,219 @@
+/*
+ * Altera SoCFPGA PinMux configuration
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+
+#ifndef __SOCFPGA_PINMUX_CONFIG_H__
+#define __SOCFPGA_PINMUX_CONFIG_H__
+
+const u8 sys_mgr_init_table[] = {
+ 0, /* EMACIO0 */
+ 2, /* EMACIO1 */
+ 2, /* EMACIO2 */
+ 2, /* EMACIO3 */
+ 2, /* EMACIO4 */
+ 2, /* EMACIO5 */
+ 2, /* EMACIO6 */
+ 2, /* EMACIO7 */
+ 2, /* EMACIO8 */
+ 0, /* EMACIO9 */
+ 2, /* EMACIO10 */
+ 2, /* EMACIO11 */
+ 2, /* EMACIO12 */
+ 2, /* EMACIO13 */
+ 0, /* EMACIO14 */
+ 0, /* EMACIO15 */
+ 0, /* EMACIO16 */
+ 0, /* EMACIO17 */
+ 0, /* EMACIO18 */
+ 0, /* EMACIO19 */
+ 3, /* FLASHIO0 */
+ 0, /* FLASHIO1 */
+ 3, /* FLASHIO2 */
+ 3, /* FLASHIO3 */
+ 0, /* FLASHIO4 */
+ 0, /* FLASHIO5 */
+ 0, /* FLASHIO6 */
+ 0, /* FLASHIO7 */
+ 0, /* FLASHIO8 */
+ 3, /* FLASHIO9 */
+ 3, /* FLASHIO10 */
+ 3, /* FLASHIO11 */
+ 0, /* GENERALIO0 */
+ 1, /* GENERALIO1 */
+ 1, /* GENERALIO2 */
+ 1, /* GENERALIO3 */
+ 1, /* GENERALIO4 */
+ 0, /* GENERALIO5 */
+ 0, /* GENERALIO6 */
+ 1, /* GENERALIO7 */
+ 1, /* GENERALIO8 */
+ 0, /* GENERALIO9 */
+ 0, /* GENERALIO10 */
+ 0, /* GENERALIO11 */
+ 0, /* GENERALIO12 */
+ 0, /* GENERALIO13 */
+ 0, /* GENERALIO14 */
+ 1, /* GENERALIO15 */
+ 1, /* GENERALIO16 */
+ 1, /* GENERALIO17 */
+ 1, /* GENERALIO18 */
+ 0, /* GENERALIO19 */
+ 0, /* GENERALIO20 */
+ 0, /* GENERALIO21 */
+ 0, /* GENERALIO22 */
+ 0, /* GENERALIO23 */
+ 0, /* GENERALIO24 */
+ 0, /* GENERALIO25 */
+ 0, /* GENERALIO26 */
+ 0, /* GENERALIO27 */
+ 0, /* GENERALIO28 */
+ 0, /* GENERALIO29 */
+ 0, /* GENERALIO30 */
+ 0, /* GENERALIO31 */
+ 2, /* MIXED1IO0 */
+ 2, /* MIXED1IO1 */
+ 2, /* MIXED1IO2 */
+ 2, /* MIXED1IO3 */
+ 2, /* MIXED1IO4 */
+ 2, /* MIXED1IO5 */
+ 2, /* MIXED1IO6 */
+ 2, /* MIXED1IO7 */
+ 2, /* MIXED1IO8 */
+ 2, /* MIXED1IO9 */
+ 2, /* MIXED1IO10 */
+ 2, /* MIXED1IO11 */
+ 2, /* MIXED1IO12 */
+ 2, /* MIXED1IO13 */
+ 0, /* MIXED1IO14 */
+ 0, /* MIXED1IO15 */
+ 0, /* MIXED1IO16 */
+ 0, /* MIXED1IO17 */
+ 0, /* MIXED1IO18 */
+ 0, /* MIXED1IO19 */
+ 0, /* MIXED1IO20 */
+ 0, /* MIXED1IO21 */
+ 0, /* MIXED2IO0 */
+ 0, /* MIXED2IO1 */
+ 0, /* MIXED2IO2 */
+ 0, /* MIXED2IO3 */
+ 0, /* MIXED2IO4 */
+ 0, /* MIXED2IO5 */
+ 0, /* MIXED2IO6 */
+ 0, /* MIXED2IO7 */
+ 0, /* GPLINMUX48 */
+ 0, /* GPLINMUX49 */
+ 0, /* GPLINMUX50 */
+ 0, /* GPLINMUX51 */
+ 0, /* GPLINMUX52 */
+ 0, /* GPLINMUX53 */
+ 0, /* GPLINMUX54 */
+ 0, /* GPLINMUX55 */
+ 0, /* GPLINMUX56 */
+ 0, /* GPLINMUX57 */
+ 0, /* GPLINMUX58 */
+ 0, /* GPLINMUX59 */
+ 0, /* GPLINMUX60 */
+ 0, /* GPLINMUX61 */
+ 0, /* GPLINMUX62 */
+ 0, /* GPLINMUX63 */
+ 0, /* GPLINMUX64 */
+ 0, /* GPLINMUX65 */
+ 0, /* GPLINMUX66 */
+ 0, /* GPLINMUX67 */
+ 0, /* GPLINMUX68 */
+ 0, /* GPLINMUX69 */
+ 0, /* GPLINMUX70 */
+ 1, /* GPLMUX0 */
+ 1, /* GPLMUX1 */
+ 1, /* GPLMUX2 */
+ 1, /* GPLMUX3 */
+ 1, /* GPLMUX4 */
+ 1, /* GPLMUX5 */
+ 1, /* GPLMUX6 */
+ 1, /* GPLMUX7 */
+ 1, /* GPLMUX8 */
+ 1, /* GPLMUX9 */
+ 1, /* GPLMUX10 */
+ 1, /* GPLMUX11 */
+ 1, /* GPLMUX12 */
+ 1, /* GPLMUX13 */
+ 1, /* GPLMUX14 */
+ 1, /* GPLMUX15 */
+ 1, /* GPLMUX16 */
+ 1, /* GPLMUX17 */
+ 1, /* GPLMUX18 */
+ 1, /* GPLMUX19 */
+ 1, /* GPLMUX20 */
+ 1, /* GPLMUX21 */
+ 1, /* GPLMUX22 */
+ 1, /* GPLMUX23 */
+ 1, /* GPLMUX24 */
+ 1, /* GPLMUX25 */
+ 1, /* GPLMUX26 */
+ 1, /* GPLMUX27 */
+ 1, /* GPLMUX28 */
+ 1, /* GPLMUX29 */
+ 1, /* GPLMUX30 */
+ 1, /* GPLMUX31 */
+ 1, /* GPLMUX32 */
+ 1, /* GPLMUX33 */
+ 1, /* GPLMUX34 */
+ 1, /* GPLMUX35 */
+ 1, /* GPLMUX36 */
+ 1, /* GPLMUX37 */
+ 1, /* GPLMUX38 */
+ 1, /* GPLMUX39 */
+ 1, /* GPLMUX40 */
+ 1, /* GPLMUX41 */
+ 1, /* GPLMUX42 */
+ 1, /* GPLMUX43 */
+ 1, /* GPLMUX44 */
+ 1, /* GPLMUX45 */
+ 1, /* GPLMUX46 */
+ 1, /* GPLMUX47 */
+ 1, /* GPLMUX48 */
+ 1, /* GPLMUX49 */
+ 1, /* GPLMUX50 */
+ 1, /* GPLMUX51 */
+ 1, /* GPLMUX52 */
+ 1, /* GPLMUX53 */
+ 1, /* GPLMUX54 */
+ 1, /* GPLMUX55 */
+ 1, /* GPLMUX56 */
+ 1, /* GPLMUX57 */
+ 1, /* GPLMUX58 */
+ 1, /* GPLMUX59 */
+ 1, /* GPLMUX60 */
+ 1, /* GPLMUX61 */
+ 1, /* GPLMUX62 */
+ 1, /* GPLMUX63 */
+ 1, /* GPLMUX64 */
+ 1, /* GPLMUX65 */
+ 1, /* GPLMUX66 */
+ 1, /* GPLMUX67 */
+ 1, /* GPLMUX68 */
+ 1, /* GPLMUX69 */
+ 1, /* GPLMUX70 */
+ 0, /* NANDUSEFPGA */
+ 0, /* UART0USEFPGA */
+ 0, /* RGMII1USEFPGA */
+ 0, /* SPIS0USEFPGA */
+ 0, /* CAN0USEFPGA */
+ 0, /* I2C0USEFPGA */
+ 0, /* SDMMCUSEFPGA */
+ 0, /* QSPIUSEFPGA */
+ 0, /* SPIS1USEFPGA */
+ 0, /* RGMII0USEFPGA */
+ 1, /* UART1USEFPGA */
+ 0, /* CAN1USEFPGA */
+ 0, /* USB1USEFPGA */
+ 1, /* I2C3USEFPGA */
+ 1, /* I2C2USEFPGA */
+ 0, /* I2C1USEFPGA */
+ 0, /* SPIM1USEFPGA */
+ 0, /* USB0USEFPGA */
+ 1 /* SPIM0USEFPGA */
+};
+#endif /* __SOCFPGA_PINMUX_CONFIG_H__ */
diff --git a/board/terasic/de10-nano/qts/pll_config.h b/board/terasic/de10-nano/qts/pll_config.h
new file mode 100644
index 00000000000..3a46047d1c2
--- /dev/null
+++ b/board/terasic/de10-nano/qts/pll_config.h
@@ -0,0 +1,85 @@
+/*
+ * Altera SoCFPGA Clock and PLL configuration
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+
+#ifndef __SOCFPGA_PLL_CONFIG_H__
+#define __SOCFPGA_PLL_CONFIG_H__
+
+#define CONFIG_HPS_DBCTRL_STAYOSC1 1
+
+#define CONFIG_HPS_MAINPLLGRP_VCO_DENOM 0
+#define CONFIG_HPS_MAINPLLGRP_VCO_NUMER 63
+#define CONFIG_HPS_MAINPLLGRP_MPUCLK_CNT 0
+#define CONFIG_HPS_MAINPLLGRP_MAINCLK_CNT 0
+#define CONFIG_HPS_MAINPLLGRP_DBGATCLK_CNT 0
+#define CONFIG_HPS_MAINPLLGRP_MAINQSPICLK_CNT 511
+#define CONFIG_HPS_MAINPLLGRP_MAINNANDSDMMCCLK_CNT 511
+#define CONFIG_HPS_MAINPLLGRP_CFGS2FUSER0CLK_CNT 15
+#define CONFIG_HPS_MAINPLLGRP_MAINDIV_L3MPCLK 1
+#define CONFIG_HPS_MAINPLLGRP_MAINDIV_L3SPCLK 1
+#define CONFIG_HPS_MAINPLLGRP_MAINDIV_L4MPCLK 1
+#define CONFIG_HPS_MAINPLLGRP_MAINDIV_L4SPCLK 1
+#define CONFIG_HPS_MAINPLLGRP_DBGDIV_DBGATCLK 0
+#define CONFIG_HPS_MAINPLLGRP_DBGDIV_DBGCLK 1
+#define CONFIG_HPS_MAINPLLGRP_TRACEDIV_TRACECLK 0
+#define CONFIG_HPS_MAINPLLGRP_L4SRC_L4MP 1
+#define CONFIG_HPS_MAINPLLGRP_L4SRC_L4SP 1
+
+#define CONFIG_HPS_PERPLLGRP_VCO_DENOM 0
+#define CONFIG_HPS_PERPLLGRP_VCO_NUMER 39
+#define CONFIG_HPS_PERPLLGRP_VCO_PSRC 0
+#define CONFIG_HPS_PERPLLGRP_EMAC0CLK_CNT 511
+#define CONFIG_HPS_PERPLLGRP_EMAC1CLK_CNT 3
+#define CONFIG_HPS_PERPLLGRP_PERQSPICLK_CNT 511
+#define CONFIG_HPS_PERPLLGRP_PERNANDSDMMCCLK_CNT 4
+#define CONFIG_HPS_PERPLLGRP_PERBASECLK_CNT 4
+#define CONFIG_HPS_PERPLLGRP_S2FUSER1CLK_CNT 19
+#define CONFIG_HPS_PERPLLGRP_DIV_USBCLK 0
+#define CONFIG_HPS_PERPLLGRP_DIV_SPIMCLK 0
+#define CONFIG_HPS_PERPLLGRP_DIV_CAN0CLK 4
+#define CONFIG_HPS_PERPLLGRP_DIV_CAN1CLK 4
+#define CONFIG_HPS_PERPLLGRP_GPIODIV_GPIODBCLK 6249
+#define CONFIG_HPS_PERPLLGRP_SRC_SDMMC 2
+#define CONFIG_HPS_PERPLLGRP_SRC_NAND 2
+#define CONFIG_HPS_PERPLLGRP_SRC_QSPI 1
+
+#define CONFIG_HPS_SDRPLLGRP_VCO_DENOM 0
+#define CONFIG_HPS_SDRPLLGRP_VCO_NUMER 31
+#define CONFIG_HPS_SDRPLLGRP_VCO_SSRC 0
+#define CONFIG_HPS_SDRPLLGRP_DDRDQSCLK_CNT 1
+#define CONFIG_HPS_SDRPLLGRP_DDRDQSCLK_PHASE 0
+#define CONFIG_HPS_SDRPLLGRP_DDR2XDQSCLK_CNT 0
+#define CONFIG_HPS_SDRPLLGRP_DDR2XDQSCLK_PHASE 0
+#define CONFIG_HPS_SDRPLLGRP_DDRDQCLK_CNT 1
+#define CONFIG_HPS_SDRPLLGRP_DDRDQCLK_PHASE 4
+#define CONFIG_HPS_SDRPLLGRP_S2FUSER2CLK_CNT 5
+#define CONFIG_HPS_SDRPLLGRP_S2FUSER2CLK_PHASE 0
+
+#define CONFIG_HPS_CLK_OSC1_HZ 25000000
+#define CONFIG_HPS_CLK_OSC2_HZ 25000000
+#define CONFIG_HPS_CLK_F2S_SDR_REF_HZ 0
+#define CONFIG_HPS_CLK_F2S_PER_REF_HZ 0
+#define CONFIG_HPS_CLK_MAINVCO_HZ 1600000000
+#define CONFIG_HPS_CLK_PERVCO_HZ 1000000000
+#define CONFIG_HPS_CLK_SDRVCO_HZ 800000000
+#define CONFIG_HPS_CLK_EMAC0_HZ 1953125
+#define CONFIG_HPS_CLK_EMAC1_HZ 250000000
+#define CONFIG_HPS_CLK_USBCLK_HZ 200000000
+#define CONFIG_HPS_CLK_NAND_HZ 50000000
+#define CONFIG_HPS_CLK_SDMMC_HZ 200000000
+#define CONFIG_HPS_CLK_QSPI_HZ 3125000
+#define CONFIG_HPS_CLK_SPIM_HZ 200000000
+#define CONFIG_HPS_CLK_CAN0_HZ 12500000
+#define CONFIG_HPS_CLK_CAN1_HZ 12500000
+#define CONFIG_HPS_CLK_GPIODB_HZ 32000
+#define CONFIG_HPS_CLK_L4_MP_HZ 100000000
+#define CONFIG_HPS_CLK_L4_SP_HZ 100000000
+
+#define CONFIG_HPS_ALTERAGRP_MPUCLK 1
+#define CONFIG_HPS_ALTERAGRP_MAINCLK 3
+#define CONFIG_HPS_ALTERAGRP_DBGATCLK 3
+
+
+#endif /* __SOCFPGA_PLL_CONFIG_H__ */
diff --git a/board/terasic/de10-nano/qts/sdram_config.h b/board/terasic/de10-nano/qts/sdram_config.h
new file mode 100644
index 00000000000..34dacc717e7
--- /dev/null
+++ b/board/terasic/de10-nano/qts/sdram_config.h
@@ -0,0 +1,344 @@
+/*
+ * Altera SoCFPGA SDRAM configuration
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+
+#ifndef __SOCFPGA_SDRAM_CONFIG_H__
+#define __SOCFPGA_SDRAM_CONFIG_H__
+
+/* SDRAM configuration */
+#define CONFIG_HPS_SDR_CTRLCFG_CPORTRDWR_CPORTRDWR 0x5A56A
+#define CONFIG_HPS_SDR_CTRLCFG_CPORTRMAP_CPORTRMAP 0xB00088
+#define CONFIG_HPS_SDR_CTRLCFG_CPORTWIDTH_CPORTWIDTH 0x44555
+#define CONFIG_HPS_SDR_CTRLCFG_CPORTWMAP_CPORTWMAP 0x2C011000
+#define CONFIG_HPS_SDR_CTRLCFG_CTRLCFG_ADDRORDER 0
+#define CONFIG_HPS_SDR_CTRLCFG_CTRLCFG_DQSTRKEN 0
+#define CONFIG_HPS_SDR_CTRLCFG_CTRLCFG_ECCCORREN 0
+#define CONFIG_HPS_SDR_CTRLCFG_CTRLCFG_ECCEN 0
+#define CONFIG_HPS_SDR_CTRLCFG_CTRLCFG_MEMBL 8
+#define CONFIG_HPS_SDR_CTRLCFG_CTRLCFG_MEMTYPE 2
+#define CONFIG_HPS_SDR_CTRLCFG_CTRLCFG_NODMPINS 0
+#define CONFIG_HPS_SDR_CTRLCFG_CTRLCFG_REORDEREN 1
+#define CONFIG_HPS_SDR_CTRLCFG_CTRLCFG_STARVELIMIT 10
+#define CONFIG_HPS_SDR_CTRLCFG_CTRLWIDTH_CTRLWIDTH 2
+#define CONFIG_HPS_SDR_CTRLCFG_DRAMADDRW_BANKBITS 3
+#define CONFIG_HPS_SDR_CTRLCFG_DRAMADDRW_COLBITS 10
+#define CONFIG_HPS_SDR_CTRLCFG_DRAMADDRW_CSBITS 1
+#define CONFIG_HPS_SDR_CTRLCFG_DRAMADDRW_ROWBITS 15
+#define CONFIG_HPS_SDR_CTRLCFG_DRAMDEVWIDTH_DEVWIDTH 8
+#define CONFIG_HPS_SDR_CTRLCFG_DRAMIFWIDTH_IFWIDTH 32
+#define CONFIG_HPS_SDR_CTRLCFG_DRAMINTR_INTREN 0
+#define CONFIG_HPS_SDR_CTRLCFG_DRAMODT_READ 0
+#define CONFIG_HPS_SDR_CTRLCFG_DRAMODT_WRITE 1
+#define CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING1_AL 0
+#define CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING1_TCL 7
+#define CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING1_TCWL 7
+#define CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING1_TFAW 15
+#define CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING1_TRFC 120
+#define CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING1_TRRD 3
+#define CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING2_IF_TRCD 6
+#define CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING2_IF_TREFI 3120
+#define CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING2_IF_TRP 6
+#define CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING2_IF_TWR 6
+#define CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING2_IF_TWTR 4
+#define CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING3_TCCD 4
+#define CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING3_TMRD 4
+#define CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING3_TRAS 14
+#define CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING3_TRC 20
+#define CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING3_TRTP 3
+#define CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING4_PWRDOWNEXIT 3
+#define CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING4_SELFRFSHEXIT 512
+#define CONFIG_HPS_SDR_CTRLCFG_EXTRATIME1_CFG_EXTRA_CTL_CLK_RD_TO_WR 2
+#define CONFIG_HPS_SDR_CTRLCFG_EXTRATIME1_CFG_EXTRA_CTL_CLK_RD_TO_WR_BC 2
+#define CONFIG_HPS_SDR_CTRLCFG_EXTRATIME1_CFG_EXTRA_CTL_CLK_RD_TO_WR_DIFF_CHIP 2
+#define CONFIG_HPS_SDR_CTRLCFG_FIFOCFG_INCSYNC 0
+#define CONFIG_HPS_SDR_CTRLCFG_FIFOCFG_SYNCMODE 0
+#define CONFIG_HPS_SDR_CTRLCFG_FPGAPORTRST 0x1FF
+#define CONFIG_HPS_SDR_CTRLCFG_LOWPWREQ_SELFRFSHMASK 3
+#define CONFIG_HPS_SDR_CTRLCFG_LOWPWRTIMING_AUTOPDCYCLES 0
+#define CONFIG_HPS_SDR_CTRLCFG_LOWPWRTIMING_CLKDISABLECYCLES 8
+#define CONFIG_HPS_SDR_CTRLCFG_MPPACING_0_THRESHOLD1_31_0 0x20820820
+#define CONFIG_HPS_SDR_CTRLCFG_MPPACING_1_THRESHOLD1_59_32 0x8208208
+#define CONFIG_HPS_SDR_CTRLCFG_MPPACING_1_THRESHOLD2_3_0 0
+#define CONFIG_HPS_SDR_CTRLCFG_MPPACING_2_THRESHOLD2_35_4 0x41041041
+#define CONFIG_HPS_SDR_CTRLCFG_MPPACING_3_THRESHOLD2_59_36 0x410410
+#define CONFIG_HPS_SDR_CTRLCFG_MPPRIORITY_USERPRIORITY 0x0
+#define CONFIG_HPS_SDR_CTRLCFG_MPTHRESHOLDRST_0_THRESHOLDRSTCYCLES_31_0 0x01010101
+#define CONFIG_HPS_SDR_CTRLCFG_MPTHRESHOLDRST_1_THRESHOLDRSTCYCLES_63_32 0x01010101
+#define CONFIG_HPS_SDR_CTRLCFG_MPTHRESHOLDRST_2_THRESHOLDRSTCYCLES_79_64 0x0101
+#define CONFIG_HPS_SDR_CTRLCFG_MPWIEIGHT_0_STATICWEIGHT_31_0 0x21084210
+#define CONFIG_HPS_SDR_CTRLCFG_MPWIEIGHT_1_STATICWEIGHT_49_32 0x10441
+#define CONFIG_HPS_SDR_CTRLCFG_MPWIEIGHT_1_SUMOFWEIGHT_13_0 0x78
+#define CONFIG_HPS_SDR_CTRLCFG_MPWIEIGHT_2_SUMOFWEIGHT_45_14 0x0
+#define CONFIG_HPS_SDR_CTRLCFG_MPWIEIGHT_3_SUMOFWEIGHT_63_46 0x0
+#define CONFIG_HPS_SDR_CTRLCFG_PHYCTRL_PHYCTRL_0 0x200
+#define CONFIG_HPS_SDR_CTRLCFG_PORTCFG_AUTOPCHEN 0
+#define CONFIG_HPS_SDR_CTRLCFG_RFIFOCMAP_RFIFOCMAP 0x760210
+#define CONFIG_HPS_SDR_CTRLCFG_STATICCFG_MEMBL 2
+#define CONFIG_HPS_SDR_CTRLCFG_STATICCFG_USEECCASDATA 0
+#define CONFIG_HPS_SDR_CTRLCFG_WFIFOCMAP_WFIFOCMAP 0x980543
+
+/* Sequencer auto configuration */
+#define RW_MGR_ACTIVATE_0_AND_1 0x0D
+#define RW_MGR_ACTIVATE_0_AND_1_WAIT1 0x0E
+#define RW_MGR_ACTIVATE_0_AND_1_WAIT2 0x10
+#define RW_MGR_ACTIVATE_1 0x0F
+#define RW_MGR_CLEAR_DQS_ENABLE 0x49
+#define RW_MGR_GUARANTEED_READ 0x4C
+#define RW_MGR_GUARANTEED_READ_CONT 0x54
+#define RW_MGR_GUARANTEED_WRITE 0x18
+#define RW_MGR_GUARANTEED_WRITE_WAIT0 0x1B
+#define RW_MGR_GUARANTEED_WRITE_WAIT1 0x1F
+#define RW_MGR_GUARANTEED_WRITE_WAIT2 0x19
+#define RW_MGR_GUARANTEED_WRITE_WAIT3 0x1D
+#define RW_MGR_IDLE 0x00
+#define RW_MGR_IDLE_LOOP1 0x7B
+#define RW_MGR_IDLE_LOOP2 0x7A
+#define RW_MGR_INIT_RESET_0_CKE_0 0x6F
+#define RW_MGR_INIT_RESET_1_CKE_0 0x74
+#define RW_MGR_LFSR_WR_RD_BANK_0 0x22
+#define RW_MGR_LFSR_WR_RD_BANK_0_DATA 0x25
+#define RW_MGR_LFSR_WR_RD_BANK_0_DQS 0x24
+#define RW_MGR_LFSR_WR_RD_BANK_0_NOP 0x23
+#define RW_MGR_LFSR_WR_RD_BANK_0_WAIT 0x32
+#define RW_MGR_LFSR_WR_RD_BANK_0_WL_1 0x21
+#define RW_MGR_LFSR_WR_RD_DM_BANK_0 0x36
+#define RW_MGR_LFSR_WR_RD_DM_BANK_0_DATA 0x39
+#define RW_MGR_LFSR_WR_RD_DM_BANK_0_DQS 0x38
+#define RW_MGR_LFSR_WR_RD_DM_BANK_0_NOP 0x37
+#define RW_MGR_LFSR_WR_RD_DM_BANK_0_WAIT 0x46
+#define RW_MGR_LFSR_WR_RD_DM_BANK_0_WL_1 0x35
+#define RW_MGR_MRS0_DLL_RESET 0x02
+#define RW_MGR_MRS0_DLL_RESET_MIRR 0x08
+#define RW_MGR_MRS0_USER 0x07
+#define RW_MGR_MRS0_USER_MIRR 0x0C
+#define RW_MGR_MRS1 0x03
+#define RW_MGR_MRS1_MIRR 0x09
+#define RW_MGR_MRS2 0x04
+#define RW_MGR_MRS2_MIRR 0x0A
+#define RW_MGR_MRS3 0x05
+#define RW_MGR_MRS3_MIRR 0x0B
+#define RW_MGR_PRECHARGE_ALL 0x12
+#define RW_MGR_READ_B2B 0x59
+#define RW_MGR_READ_B2B_WAIT1 0x61
+#define RW_MGR_READ_B2B_WAIT2 0x6B
+#define RW_MGR_REFRESH_ALL 0x14
+#define RW_MGR_RETURN 0x01
+#define RW_MGR_SGLE_READ 0x7D
+#define RW_MGR_ZQCL 0x06
+
+/* Sequencer defines configuration */
+#define AFI_RATE_RATIO 1
+#define CALIB_LFIFO_OFFSET 8
+#define CALIB_VFIFO_OFFSET 6
+#define ENABLE_SUPER_QUICK_CALIBRATION 0
+#define IO_DELAY_PER_DCHAIN_TAP 25
+#define IO_DELAY_PER_DQS_EN_DCHAIN_TAP 25
+#define IO_DELAY_PER_OPA_TAP 312
+#define IO_DLL_CHAIN_LENGTH 8
+#define IO_DQDQS_OUT_PHASE_MAX 0
+#define IO_DQS_EN_DELAY_MAX 31
+#define IO_DQS_EN_DELAY_OFFSET 0
+#define IO_DQS_EN_PHASE_MAX 7
+#define IO_DQS_IN_DELAY_MAX 31
+#define IO_DQS_IN_RESERVE 4
+#define IO_DQS_OUT_RESERVE 4
+#define IO_IO_IN_DELAY_MAX 31
+#define IO_IO_OUT1_DELAY_MAX 31
+#define IO_IO_OUT2_DELAY_MAX 0
+#define IO_SHIFT_DQS_EN_WHEN_SHIFT_DQS 0
+#define MAX_LATENCY_COUNT_WIDTH 5
+#define READ_VALID_FIFO_SIZE 16
+#define REG_FILE_INIT_SEQ_SIGNATURE 0x555504a1
+#define RW_MGR_MEM_ADDRESS_MIRRORING 0
+#define RW_MGR_MEM_DATA_MASK_WIDTH 4
+#define RW_MGR_MEM_DATA_WIDTH 32
+#define RW_MGR_MEM_DQ_PER_READ_DQS 8
+#define RW_MGR_MEM_DQ_PER_WRITE_DQS 8
+#define RW_MGR_MEM_IF_READ_DQS_WIDTH 4
+#define RW_MGR_MEM_IF_WRITE_DQS_WIDTH 4
+#define RW_MGR_MEM_NUMBER_OF_CS_PER_DIMM 1
+#define RW_MGR_MEM_NUMBER_OF_RANKS 1
+#define RW_MGR_MEM_VIRTUAL_GROUPS_PER_READ_DQS 1
+#define RW_MGR_MEM_VIRTUAL_GROUPS_PER_WRITE_DQS 1
+#define RW_MGR_TRUE_MEM_DATA_MASK_WIDTH 4
+#define TINIT_CNTR0_VAL 99
+#define TINIT_CNTR1_VAL 32
+#define TINIT_CNTR2_VAL 32
+#define TRESET_CNTR0_VAL 99
+#define TRESET_CNTR1_VAL 99
+#define TRESET_CNTR2_VAL 10
+
+/* Sequencer ac_rom_init configuration */
+const u32 ac_rom_init[] = {
+ 0x20700000,
+ 0x20780000,
+ 0x10080431,
+ 0x10080530,
+ 0x10090044,
+ 0x100a0010,
+ 0x100b0000,
+ 0x10380400,
+ 0x10080449,
+ 0x100804c8,
+ 0x100a0024,
+ 0x10090008,
+ 0x100b0000,
+ 0x30780000,
+ 0x38780000,
+ 0x30780000,
+ 0x10680000,
+ 0x106b0000,
+ 0x10280400,
+ 0x10480000,
+ 0x1c980000,
+ 0x1c9b0000,
+ 0x1c980008,
+ 0x1c9b0008,
+ 0x38f80000,
+ 0x3cf80000,
+ 0x38780000,
+ 0x18180000,
+ 0x18980000,
+ 0x13580000,
+ 0x135b0000,
+ 0x13580008,
+ 0x135b0008,
+ 0x33780000,
+ 0x10580008,
+ 0x10780000
+};
+
+/* Sequencer inst_rom_init configuration */
+const u32 inst_rom_init[] = {
+ 0x80000,
+ 0x80680,
+ 0x8180,
+ 0x8200,
+ 0x8280,
+ 0x8300,
+ 0x8380,
+ 0x8100,
+ 0x8480,
+ 0x8500,
+ 0x8580,
+ 0x8600,
+ 0x8400,
+ 0x800,
+ 0x8680,
+ 0x880,
+ 0xa680,
+ 0x80680,
+ 0x900,
+ 0x80680,
+ 0x980,
+ 0xa680,
+ 0x8680,
+ 0x80680,
+ 0xb68,
+ 0xcce8,
+ 0xae8,
+ 0x8ce8,
+ 0xb88,
+ 0xec88,
+ 0xa08,
+ 0xac88,
+ 0x80680,
+ 0xce00,
+ 0xcd80,
+ 0xe700,
+ 0xc00,
+ 0x20ce0,
+ 0x20ce0,
+ 0x20ce0,
+ 0x20ce0,
+ 0xd00,
+ 0x680,
+ 0x680,
+ 0x680,
+ 0x680,
+ 0x60e80,
+ 0x61080,
+ 0x61080,
+ 0x61080,
+ 0xa680,
+ 0x8680,
+ 0x80680,
+ 0xce00,
+ 0xcd80,
+ 0xe700,
+ 0xc00,
+ 0x30ce0,
+ 0x30ce0,
+ 0x30ce0,
+ 0x30ce0,
+ 0xd00,
+ 0x680,
+ 0x680,
+ 0x680,
+ 0x680,
+ 0x70e80,
+ 0x71080,
+ 0x71080,
+ 0x71080,
+ 0xa680,
+ 0x8680,
+ 0x80680,
+ 0x1158,
+ 0x6d8,
+ 0x80680,
+ 0x1168,
+ 0x7e8,
+ 0x7e8,
+ 0x87e8,
+ 0x40fe8,
+ 0x410e8,
+ 0x410e8,
+ 0x410e8,
+ 0x1168,
+ 0x7e8,
+ 0x7e8,
+ 0xa7e8,
+ 0x80680,
+ 0x40e88,
+ 0x41088,
+ 0x41088,
+ 0x41088,
+ 0x40f68,
+ 0x410e8,
+ 0x410e8,
+ 0x410e8,
+ 0xa680,
+ 0x40fe8,
+ 0x410e8,
+ 0x410e8,
+ 0x410e8,
+ 0x41008,
+ 0x41088,
+ 0x41088,
+ 0x41088,
+ 0x1100,
+ 0xc680,
+ 0x8680,
+ 0xe680,
+ 0x80680,
+ 0x0,
+ 0x8000,
+ 0xa000,
+ 0xc000,
+ 0x80000,
+ 0x80,
+ 0x8080,
+ 0xa080,
+ 0xc080,
+ 0x80080,
+ 0x9180,
+ 0x8680,
+ 0xa680,
+ 0x80680,
+ 0x40f08,
+ 0x80680
+};
+
+#endif /* __SOCFPGA_SDRAM_CONFIG_H__ */
diff --git a/board/terasic/de10-nano/socfpga.c b/board/terasic/de10-nano/socfpga.c
new file mode 100644
index 00000000000..c5852e7cb4f
--- /dev/null
+++ b/board/terasic/de10-nano/socfpga.c
@@ -0,0 +1,6 @@
+/*
+ * Copyright (C) 2017, Intel Corporation
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+#include <common.h>
diff --git a/configs/socfpga_de10_nano_defconfig b/configs/socfpga_de10_nano_defconfig
new file mode 100644
index 00000000000..2fcd95cd55a
--- /dev/null
+++ b/configs/socfpga_de10_nano_defconfig
@@ -0,0 +1,59 @@
+CONFIG_ARM=y
+CONFIG_ARCH_SOCFPGA=y
+CONFIG_SYS_MALLOC_F_LEN=0x2000
+CONFIG_TARGET_SOCFPGA_TERASIC_DE10_NANO=y
+CONFIG_SPL_STACK_R_ADDR=0x00800000
+CONFIG_DEFAULT_DEVICE_TREE="socfpga_cyclone5_de10_nano"
+CONFIG_DEFAULT_FDT_FILE="socfpga_cyclone5_de10_nano.dtb"
+CONFIG_FIT=y
+CONFIG_SYS_CONSOLE_IS_IN_ENV=y
+CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE=y
+CONFIG_SYS_CONSOLE_ENV_OVERWRITE=y
+CONFIG_VERSION_VARIABLE=y
+# CONFIG_DISPLAY_BOARDINFO is not set
+CONFIG_SPL=y
+CONFIG_SPL_SYS_MALLOC_SIMPLE=y
+CONFIG_SPL_STACK_R=y
+CONFIG_HUSH_PARSER=y
+CONFIG_CMD_BOOTZ=y
+# CONFIG_CMD_IMLS is not set
+CONFIG_CMD_ASKENV=y
+CONFIG_CMD_GREPENV=y
+# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_MMC=y
+CONFIG_CMD_SPI=y
+CONFIG_CMD_I2C=y
+CONFIG_CMD_USB=y
+CONFIG_CMD_DFU=y
+CONFIG_CMD_USB_MASS_STORAGE=y
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_DHCP=y
+CONFIG_CMD_MII=y
+CONFIG_CMD_PING=y
+CONFIG_CMD_CACHE=y
+CONFIG_CMD_EXT4=y
+CONFIG_CMD_EXT4_WRITE=y
+CONFIG_CMD_FAT=y
+CONFIG_CMD_FS_GENERIC=y
+CONFIG_SPL_DM=y
+CONFIG_DFU_MMC=y
+CONFIG_DM_GPIO=y
+CONFIG_DWAPB_GPIO=y
+CONFIG_SYS_I2C_DW=y
+CONFIG_DM_MMC=y
+CONFIG_MMC_DW=y
+CONFIG_DM_ETH=y
+CONFIG_ETH_DESIGNWARE=y
+CONFIG_SYS_NS16550=y
+CONFIG_CADENCE_QSPI=y
+CONFIG_DESIGNWARE_SPI=y
+CONFIG_USB=y
+CONFIG_DM_USB=y
+CONFIG_USB_STORAGE=y
+CONFIG_USB_GADGET=y
+CONFIG_USB_GADGET_DWC2_OTG=y
+CONFIG_USB_GADGET_DOWNLOAD=y
+CONFIG_G_DNL_MANUFACTURER="terasic"
+CONFIG_G_DNL_VENDOR_NUM=0x0525
+CONFIG_G_DNL_PRODUCT_NUM=0xa4a5
+CONFIG_USE_TINY_PRINTF=y
diff --git a/include/configs/socfpga_de10_nano.h b/include/configs/socfpga_de10_nano.h
new file mode 100644
index 00000000000..302ec200bde
--- /dev/null
+++ b/include/configs/socfpga_de10_nano.h
@@ -0,0 +1,33 @@
+/*
+ * Copyright (C) 2017, Intel Corporation
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+#ifndef __CONFIG_TERASIC_DE10_H__
+#define __CONFIG_TERASIC_DE10_H__
+
+#include <asm/arch/base_addr_ac5.h>
+
+/* U-Boot Commands */
+#define CONFIG_FAT_WRITE
+#define CONFIG_HW_WATCHDOG
+
+/* Memory configurations */
+#define PHYS_SDRAM_1_SIZE 0x40000000 /* 1GiB */
+
+/* Booting Linux */
+#define CONFIG_LOADADDR 0x01000000
+#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
+
+/* Ethernet on SoC (EMAC) */
+#if defined(CONFIG_CMD_NET)
+#define CONFIG_PHY_MICREL
+#define CONFIG_PHY_MICREL_KSZ9031
+#endif
+
+#define CONFIG_ENV_IS_IN_MMC
+
+/* The rest of the configuration is shared */
+#include <configs/socfpga_common.h>
+
+#endif /* __CONFIG_TERASIC_DE10_H__ */
--
GitLab
From 2511b2ed4df36467898952aa7825abbe8d0a211f Mon Sep 17 00:00:00 2001
From: Heinrich Schuchardt <xypron.glpk@gmx.de>
Date: Sat, 15 Apr 2017 13:46:22 +0200
Subject: [PATCH 134/282] musb: properly detect failed initialization of
controller
We want to check the result of musb_init_controller
and not the address were the result is stored.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
---
drivers/usb/musb-new/musb_uboot.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/usb/musb-new/musb_uboot.c b/drivers/usb/musb-new/musb_uboot.c
index ea71f759476..8662c0ff707 100644
--- a/drivers/usb/musb-new/musb_uboot.c
+++ b/drivers/usb/musb-new/musb_uboot.c
@@ -446,7 +446,7 @@ int musb_register(struct musb_hdrc_platform_data *plat, void *bdata,
}
*musbp = musb_init_controller(plat, (struct device *)bdata, ctl_regs);
- if (!musbp) {
+ if (!*musbp) {
printf("Failed to init the controller\n");
return -EIO;
}
--
GitLab
From 7f2e59aee5894ffc1d79b485f45ae00902baa738 Mon Sep 17 00:00:00 2001
From: Heinrich Schuchardt <xypron.glpk@gmx.de>
Date: Sat, 15 Apr 2017 14:29:54 +0200
Subject: [PATCH 135/282] usb: musb: avoid out of bound access in udc_setup_ep
For id = 15 an out of bound access occurs in udc_setup_ep().
Increase the size of epinfo[] from 30 to 32 to encompass
ids 0..15.
The problem was highlighted by cppcheck.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
---
drivers/usb/musb/musb_udc.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/usb/musb/musb_udc.c b/drivers/usb/musb/musb_udc.c
index 87640f4e326..d643334a2e8 100644
--- a/drivers/usb/musb/musb_udc.c
+++ b/drivers/usb/musb/musb_udc.c
@@ -85,7 +85,7 @@ do { \
/* static implies these initialized to 0 or NULL */
static int debug_setup;
static int debug_level;
-static struct musb_epinfo epinfo[MAX_ENDPOINT * 2];
+static struct musb_epinfo epinfo[MAX_ENDPOINT * 2 + 2];
static enum ep0_state_enum {
IDLE = 0,
TX,
@@ -944,7 +944,7 @@ int udc_init(void)
musbr = musb_cfg.regs;
/* Initialize the endpoints */
- for (ep_loop = 0; ep_loop < MAX_ENDPOINT * 2; ep_loop++) {
+ for (ep_loop = 0; ep_loop <= MAX_ENDPOINT * 2; ep_loop++) {
epinfo[ep_loop].epnum = (ep_loop / 2) + 1;
epinfo[ep_loop].epdir = ep_loop % 2; /* OUT, IN */
epinfo[ep_loop].epsize = 0;
--
GitLab
From 83cb46c286beb5406aaed2e0d5895719717804b3 Mon Sep 17 00:00:00 2001
From: Alexey Brodkin <Alexey.Brodkin@synopsys.com>
Date: Mon, 17 Apr 2017 19:13:17 +0300
Subject: [PATCH 136/282] ehci-ppc4xx: Prepare for usage of readl()/writel()
accessors
We used to have opencoded ehci_readl()/writel() which required no
external functions to be called.
Now with attempt to switch to generic readl()/writel() accessors
we see a missing declaration of those accessors in ehci-ppc4xx.
Something like that happens if applied
http://patchwork.ozlabs.org/patch/726714/:
---------------->8---------------
CC drivers/usb/host/ehci-ppc4xx.o
drivers/usb/host/ehci-ppc4xx.c: In function 'ehci_hcd_init':
drivers/usb/host/ehci-ppc4xx.c:23:3: warning: implicit declaration of function 'readl' [-Wimplicit-function-declaration]
HC_LENGTH(ehci_readl(&(*hccr)->cr_capbase)));
^
---------------->8---------------
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
Cc: Tom Rini <trini@konsulko.com>
Cc: Marek Vasut <marex@denx.de>
Cc: Stefan Roese <sr@denx.de>
Reviewed-by: Stefan Roese <sr@denx.de>
---
drivers/usb/host/ehci-ppc4xx.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/usb/host/ehci-ppc4xx.c b/drivers/usb/host/ehci-ppc4xx.c
index 9aee3ff786c..9d235776428 100644
--- a/drivers/usb/host/ehci-ppc4xx.c
+++ b/drivers/usb/host/ehci-ppc4xx.c
@@ -8,6 +8,7 @@
*/
#include <common.h>
#include <usb.h>
+#include <asm/io.h>
#include "ehci.h"
--
GitLab
From 79ed06f2ccad476b4c10df9f5a0255e104d2e06e Mon Sep 17 00:00:00 2001
From: Mike Looijmans <mike.looijmans@topic.nl>
Date: Mon, 10 Apr 2017 08:56:22 +0200
Subject: [PATCH 137/282] zynq-topic-miami.dts: Add usbotg0 alias to make USB
actually work
Fixes the following problem:
zynq-uboot> run dfu_ram
Setting bus to 1
g_dnl_register: failed!, error: -19
The cause appears to be that the USB framework is looking for a usbotg aliases,
so add the alias to point to our USB device.
Signed-off-by: Mike Looijmans <mike.looijmans@topic.nl>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
---
arch/arm/dts/zynq-topic-miami.dts | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm/dts/zynq-topic-miami.dts b/arch/arm/dts/zynq-topic-miami.dts
index aa05c4d368b..79a3671a8eb 100644
--- a/arch/arm/dts/zynq-topic-miami.dts
+++ b/arch/arm/dts/zynq-topic-miami.dts
@@ -19,6 +19,7 @@
i2c0 = &i2c0;
i2c1 = &i2c1;
mmc0 = &sdhci0;
+ usbotg0 = &usb0;
};
memory@0 {
--
GitLab
From 0a5559c10a8be58537398114619f8d9a26bae46d Mon Sep 17 00:00:00 2001
From: Michal Simek <michal.simek@xilinx.com>
Date: Thu, 20 Apr 2017 11:47:21 +0200
Subject: [PATCH 138/282] arm64: zynqmp: Sync defconfig with Kconfig
Remove option which depends on MMC controller which is disabled for dc2.
Savedefconfig is removing it because of new dependencies.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
---
configs/xilinx_zynqmp_zc1751_xm016_dc2_defconfig | 1 -
1 file changed, 1 deletion(-)
diff --git a/configs/xilinx_zynqmp_zc1751_xm016_dc2_defconfig b/configs/xilinx_zynqmp_zc1751_xm016_dc2_defconfig
index aa40be0ed60..6682b679b35 100644
--- a/configs/xilinx_zynqmp_zc1751_xm016_dc2_defconfig
+++ b/configs/xilinx_zynqmp_zc1751_xm016_dc2_defconfig
@@ -3,7 +3,6 @@ CONFIG_SYS_CONFIG_NAME="xilinx_zynqmp_zc1751_xm016_dc2"
CONFIG_ARCH_ZYNQMP=y
CONFIG_SYS_TEXT_BASE=0x8000000
CONFIG_SYS_MALLOC_F_LEN=0x8000
-# CONFIG_SPL_MMC_SUPPORT is not set
# CONFIG_SPL_LIBDISK_SUPPORT is not set
# CONFIG_SPL_FAT_SUPPORT is not set
CONFIG_ZYNQMP_USB=y
--
GitLab
From 71e48c26a6ec386f330eae3f8c5e002e95d864b9 Mon Sep 17 00:00:00 2001
From: Adam Ford <aford173@gmail.com>
Date: Sat, 8 Apr 2017 17:34:29 -0500
Subject: [PATCH 139/282] omap3: i2c: correct register
The register names and offset were not correct as per the TRM for OMAP3530
and OMAP3630. Correct the naing and offsets per the documentation
Signed-off-by: Adam Ford <aford173@gmail.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
---
arch/arm/include/asm/arch-omap3/i2c.h | 14 +++++++++++++-
1 file changed, 13 insertions(+), 1 deletion(-)
diff --git a/arch/arm/include/asm/arch-omap3/i2c.h b/arch/arm/include/asm/arch-omap3/i2c.h
index b3702909cbe..6b3a3da3f29 100644
--- a/arch/arm/include/asm/arch-omap3/i2c.h
+++ b/arch/arm/include/asm/arch-omap3/i2c.h
@@ -17,7 +17,7 @@ struct i2c {
unsigned short res2;
unsigned short stat; /* 0x08 */
unsigned short res3;
- unsigned short iv; /* 0x0C */
+ unsigned short we; /* 0x0C */
unsigned short res4;
unsigned short syss; /* 0x10 */
unsigned short res4a;
@@ -43,6 +43,18 @@ struct i2c {
unsigned short res14;
unsigned short systest; /* 0x3c */
unsigned short res15;
+ unsigned short bufstat; /* 0x40 */
+ unsigned short res16;
+ unsigned short oa1; /* 0x44 */
+ unsigned short res17;
+ unsigned short oa2; /* 0x48 */
+ unsigned short res18;
+ unsigned short oa3; /* 0x4c */
+ unsigned short res19;
+ unsigned short actoa; /* 0x50 */
+ unsigned short res20;
+ unsigned short sblock; /* 0x54 */
+ unsigned short res21;
};
#endif /* _OMAP3_I2C_H_ */
--
GitLab
From 44913aa52b819d6d601baefdb36fdf2d3dc18c71 Mon Sep 17 00:00:00 2001
From: Adam Ford <aford173@gmail.com>
Date: Sun, 9 Apr 2017 07:35:12 -0500
Subject: [PATCH 140/282] OMAP3: Correct name of omap34xx_gpios when using
DM_GPIO
The name of the gpio bank under DM_GPIO appear to be a copy-paste error.
This changes the name of the gpio bank from am33xx_gpios to omap34xx_gpios.
Signed-off-by: Adam Ford <aford173@gmail.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
---
arch/arm/mach-omap2/omap3/board.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/mach-omap2/omap3/board.c b/arch/arm/mach-omap2/omap3/board.c
index f1436fbf519..01df579df28 100644
--- a/arch/arm/mach-omap2/omap3/board.c
+++ b/arch/arm/mach-omap2/omap3/board.c
@@ -46,7 +46,7 @@ static const struct omap_gpio_platdata omap34xx_gpio[] = {
{ 5, OMAP34XX_GPIO6_BASE },
};
-U_BOOT_DEVICES(am33xx_gpios) = {
+U_BOOT_DEVICES(omap34xx_gpios) = {
{ "gpio_omap", &omap34xx_gpio[0] },
{ "gpio_omap", &omap34xx_gpio[1] },
{ "gpio_omap", &omap34xx_gpio[2] },
--
GitLab
From 29f089a60547178cd59b5482c57e6a87bdd11089 Mon Sep 17 00:00:00 2001
From: Lokesh Vutla <lokeshvutla@ti.com>
Date: Sun, 16 Apr 2017 11:21:28 +0530
Subject: [PATCH 141/282] configs: keystone2: Standardise U-boot prompt
Standardise U-Boot prompt on all keystone2 platforms
instead of platform specific prompt.
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
---
configs/k2e_evm_defconfig | 1 -
configs/k2e_hs_evm_defconfig | 1 -
configs/k2hk_evm_defconfig | 1 -
configs/k2hk_hs_evm_defconfig | 1 -
configs/k2l_evm_defconfig | 1 -
5 files changed, 5 deletions(-)
diff --git a/configs/k2e_evm_defconfig b/configs/k2e_evm_defconfig
index 63db1aef7cb..abe207b38fc 100644
--- a/configs/k2e_evm_defconfig
+++ b/configs/k2e_evm_defconfig
@@ -16,7 +16,6 @@ CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_SPL=y
CONFIG_SPL_I2C_SUPPORT=y
CONFIG_HUSH_PARSER=y
-CONFIG_SYS_PROMPT="K2E EVM # "
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMLS is not set
CONFIG_CMD_ASKENV=y
diff --git a/configs/k2e_hs_evm_defconfig b/configs/k2e_hs_evm_defconfig
index d515cedaca1..11909658126 100644
--- a/configs/k2e_hs_evm_defconfig
+++ b/configs/k2e_hs_evm_defconfig
@@ -10,7 +10,6 @@ CONFIG_OF_BOARD_SETUP=y
CONFIG_SYS_CONSOLE_INFO_QUIET=y
CONFIG_VERSION_VARIABLE=y
CONFIG_HUSH_PARSER=y
-CONFIG_SYS_PROMPT="K2E HS EVM # "
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMLS is not set
CONFIG_CMD_ASKENV=y
diff --git a/configs/k2hk_evm_defconfig b/configs/k2hk_evm_defconfig
index 12b80472d99..55fd3ac67cd 100644
--- a/configs/k2hk_evm_defconfig
+++ b/configs/k2hk_evm_defconfig
@@ -16,7 +16,6 @@ CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_SPL=y
CONFIG_SPL_I2C_SUPPORT=y
CONFIG_HUSH_PARSER=y
-CONFIG_SYS_PROMPT="K2HK EVM # "
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMLS is not set
CONFIG_CMD_ASKENV=y
diff --git a/configs/k2hk_hs_evm_defconfig b/configs/k2hk_hs_evm_defconfig
index 9fe91ea19c0..ea0a80f2577 100644
--- a/configs/k2hk_hs_evm_defconfig
+++ b/configs/k2hk_hs_evm_defconfig
@@ -10,7 +10,6 @@ CONFIG_OF_BOARD_SETUP=y
CONFIG_SYS_CONSOLE_INFO_QUIET=y
CONFIG_VERSION_VARIABLE=y
CONFIG_HUSH_PARSER=y
-CONFIG_SYS_PROMPT="K2HK EVM # "
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMLS is not set
CONFIG_CMD_ASKENV=y
diff --git a/configs/k2l_evm_defconfig b/configs/k2l_evm_defconfig
index 39a992d7971..2abe43160c4 100644
--- a/configs/k2l_evm_defconfig
+++ b/configs/k2l_evm_defconfig
@@ -16,7 +16,6 @@ CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_SPL=y
CONFIG_SPL_I2C_SUPPORT=y
CONFIG_HUSH_PARSER=y
-CONFIG_SYS_PROMPT="K2L EVM # "
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMLS is not set
CONFIG_CMD_ASKENV=y
--
GitLab
From 43b41566f72c3ff1074fe686f37227ebe33e11f9 Mon Sep 17 00:00:00 2001
From: Simon Glass <sjg@chromium.org>
Date: Sun, 16 Apr 2017 21:01:11 -0600
Subject: [PATCH 142/282] dm: sandbox: pwm: Add a basic pwm test
Unfortunately a test for the PWM uclass was not included when it was
submitted. This was noticed when trying to add more functionality:
http://patchwork.ozlabs.org/patch/748172/
Add a simple test to get us started.
Signed-off-by: Simon Glass <sjg@chromium.org>
---
arch/sandbox/dts/test.dts | 8 ++++
configs/sandbox_defconfig | 2 +
configs/sandbox_noblk_defconfig | 2 +
configs/sandbox_spl_defconfig | 2 +
drivers/pwm/Kconfig | 8 ++++
drivers/pwm/Makefile | 1 +
drivers/pwm/sandbox_pwm.c | 75 +++++++++++++++++++++++++++++++++
test/dm/Makefile | 1 +
test/dm/pwm.c | 32 ++++++++++++++
9 files changed, 131 insertions(+)
create mode 100644 drivers/pwm/sandbox_pwm.c
create mode 100644 test/dm/pwm.c
diff --git a/arch/sandbox/dts/test.dts b/arch/sandbox/dts/test.dts
index fff175d1b7a..50bcdebf74d 100644
--- a/arch/sandbox/dts/test.dts
+++ b/arch/sandbox/dts/test.dts
@@ -272,6 +272,14 @@
power-domains = <&pwrdom 2>;
};
+ pwm {
+ compatible = "sandbox,pwm";
+ };
+
+ pwm2 {
+ compatible = "sandbox,pwm";
+ };
+
ram {
compatible = "sandbox,ram";
};
diff --git a/configs/sandbox_defconfig b/configs/sandbox_defconfig
index 9814ea3b819..cdaf3bb7433 100644
--- a/configs/sandbox_defconfig
+++ b/configs/sandbox_defconfig
@@ -173,3 +173,5 @@ CONFIG_UNIT_TEST=y
CONFIG_UT_TIME=y
CONFIG_UT_DM=y
CONFIG_UT_ENV=y
+CONFIG_DM_PWM=y
+CONFIG_PWM_SANDBOX=y
diff --git a/configs/sandbox_noblk_defconfig b/configs/sandbox_noblk_defconfig
index bba744332c2..087c7a84fc4 100644
--- a/configs/sandbox_noblk_defconfig
+++ b/configs/sandbox_noblk_defconfig
@@ -175,3 +175,5 @@ CONFIG_UNIT_TEST=y
CONFIG_UT_TIME=y
CONFIG_UT_DM=y
CONFIG_UT_ENV=y
+CONFIG_DM_PWM=y
+CONFIG_PWM_SANDBOX=y
diff --git a/configs/sandbox_spl_defconfig b/configs/sandbox_spl_defconfig
index 6fe21254fd8..ffdd15b6b58 100644
--- a/configs/sandbox_spl_defconfig
+++ b/configs/sandbox_spl_defconfig
@@ -179,3 +179,5 @@ CONFIG_UNIT_TEST=y
CONFIG_UT_TIME=y
CONFIG_UT_DM=y
CONFIG_UT_ENV=y
+CONFIG_DM_PWM=y
+CONFIG_PWM_SANDBOX=y
diff --git a/drivers/pwm/Kconfig b/drivers/pwm/Kconfig
index 37ea2b88eae..e8275580524 100644
--- a/drivers/pwm/Kconfig
+++ b/drivers/pwm/Kconfig
@@ -27,6 +27,14 @@ config PWM_ROCKCHIP
Various options provided in the hardware (such as capture mode and
continuous/single-shot) are not supported by the driver.
+config PWM_SANDBOX
+ bool "Enable support for the sandbox PWM"
+ help
+ This is a sandbox PWM used for testing. It provides 3 channels and
+ records the settings passed into it, but otherwise does nothing
+ useful. The PWM can be enabled but is not connected to any outputs
+ so this is not very useful.
+
config PWM_TEGRA
bool "Enable support for the Tegra PWM"
depends on DM_PWM
diff --git a/drivers/pwm/Makefile b/drivers/pwm/Makefile
index b0371303851..29d59916cb9 100644
--- a/drivers/pwm/Makefile
+++ b/drivers/pwm/Makefile
@@ -15,4 +15,5 @@ obj-$(CONFIG_DM_PWM) += pwm-uclass.o
obj-$(CONFIG_PWM_EXYNOS) += exynos_pwm.o
obj-$(CONFIG_PWM_IMX) += pwm-imx.o pwm-imx-util.o
obj-$(CONFIG_PWM_ROCKCHIP) += rk_pwm.o
+obj-$(CONFIG_PWM_SANDBOX) += sandbox_pwm.o
obj-$(CONFIG_PWM_TEGRA) += tegra_pwm.o
diff --git a/drivers/pwm/sandbox_pwm.c b/drivers/pwm/sandbox_pwm.c
new file mode 100644
index 00000000000..c2ce974ddea
--- /dev/null
+++ b/drivers/pwm/sandbox_pwm.c
@@ -0,0 +1,75 @@
+/*
+ * Copyright (c) 2015 Google, Inc
+ * Written by Simon Glass <sjg@chromium.org>
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include <common.h>
+#include <dm.h>
+#include <errno.h>
+#include <pwm.h>
+#include <asm/test.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+enum {
+ NUM_CHANNELS = 3,
+};
+
+struct sandbox_pwm_chan {
+ uint period_ns;
+ uint duty_ns;
+ bool enable;
+};
+
+struct sandbox_pwm_priv {
+ struct sandbox_pwm_chan chan[NUM_CHANNELS];
+};
+
+static int sandbox_pwm_set_config(struct udevice *dev, uint channel,
+ uint period_ns, uint duty_ns)
+{
+ struct sandbox_pwm_priv *priv = dev_get_priv(dev);
+ struct sandbox_pwm_chan *chan;
+
+ if (channel >= NUM_CHANNELS)
+ return -ENOSPC;
+ chan = &priv->chan[channel];
+ chan->period_ns = period_ns;
+ chan->duty_ns = duty_ns;
+
+ return 0;
+}
+
+static int sandbox_pwm_set_enable(struct udevice *dev, uint channel,
+ bool enable)
+{
+ struct sandbox_pwm_priv *priv = dev_get_priv(dev);
+ struct sandbox_pwm_chan *chan;
+
+ if (channel >= NUM_CHANNELS)
+ return -ENOSPC;
+ chan = &priv->chan[channel];
+ chan->enable = enable;
+
+ return 0;
+}
+
+static const struct pwm_ops sandbox_pwm_ops = {
+ .set_config = sandbox_pwm_set_config,
+ .set_enable = sandbox_pwm_set_enable,
+};
+
+static const struct udevice_id sandbox_pwm_ids[] = {
+ { .compatible = "sandbox,pwm" },
+ { }
+};
+
+U_BOOT_DRIVER(warm_pwm_sandbox) = {
+ .name = "pwm_sandbox",
+ .id = UCLASS_PWM,
+ .of_match = sandbox_pwm_ids,
+ .ops = &sandbox_pwm_ops,
+ .priv_auto_alloc_size = sizeof(struct sandbox_pwm_priv),
+};
diff --git a/test/dm/Makefile b/test/dm/Makefile
index 1885e17c38d..e956915bc3d 100644
--- a/test/dm/Makefile
+++ b/test/dm/Makefile
@@ -25,6 +25,7 @@ obj-$(CONFIG_DM_MAILBOX) += mailbox.o
obj-$(CONFIG_DM_MMC) += mmc.o
obj-$(CONFIG_DM_PCI) += pci.o
obj-$(CONFIG_POWER_DOMAIN) += power-domain.o
+obj-$(CONFIG_DM_PWM) += pwm.o
obj-$(CONFIG_RAM) += ram.o
obj-y += regmap.o
obj-$(CONFIG_REMOTEPROC) += remoteproc.o
diff --git a/test/dm/pwm.c b/test/dm/pwm.c
new file mode 100644
index 00000000000..7bdc75af099
--- /dev/null
+++ b/test/dm/pwm.c
@@ -0,0 +1,32 @@
+/*
+ * Copyright (C) 2017 Google, Inc
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include <common.h>
+#include <dm.h>
+#include <pwm.h>
+#include <dm/test.h>
+#include <test/ut.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+/* Basic test of the pwm uclass */
+static int dm_test_pwm_base(struct unit_test_state *uts)
+{
+ struct udevice *dev;
+
+ ut_assertok(uclass_get_device(UCLASS_PWM, 0, &dev));
+ ut_assertok(pwm_set_config(dev, 0, 100, 50));
+ ut_assertok(pwm_set_enable(dev, 0, true));
+ ut_assertok(pwm_set_enable(dev, 1, true));
+ ut_assertok(pwm_set_enable(dev, 2, true));
+ ut_asserteq(-ENOSPC, pwm_set_enable(dev, 3, true));
+
+ ut_assertok(uclass_get_device(UCLASS_PWM, 1, &dev));
+ ut_asserteq(-ENODEV, uclass_get_device(UCLASS_PWM, 2, &dev));
+
+ return 0;
+}
+DM_TEST(dm_test_pwm_base, DM_TESTF_SCAN_PDATA | DM_TESTF_SCAN_FDT);
--
GitLab
From d2366dfe1d1c0b760022a034ced944784156c9d4 Mon Sep 17 00:00:00 2001
From: Tom Rini <trini@konsulko.com>
Date: Mon, 17 Apr 2017 09:18:00 -0400
Subject: [PATCH 143/282] arm: Warn that starting with v2018.01 gcc-6 or later
is required
There are more and more cases where if we do not use gcc-6.0 or later we
run into problems where our binaries are too large for the targets.
Given the prevalence of gcc-6.0 or later toolchains at this point in
time, we give notice now that starting with v2018.01 we will require
gcc-6 (or later) for ARM.
Signed-off-by: Tom Rini <trini@konsulko.com>
---
arch/arm/config.mk | 12 +++++++++++-
1 file changed, 11 insertions(+), 1 deletion(-)
diff --git a/arch/arm/config.mk b/arch/arm/config.mk
index 907c69371b9..eb09b0e3787 100644
--- a/arch/arm/config.mk
+++ b/arch/arm/config.mk
@@ -45,7 +45,7 @@ endif
# Only test once
ifeq ($(CONFIG_$(SPL_)SYS_THUMB_BUILD),y)
-archprepare: checkthumb
+archprepare: checkthumb checkgcc6
checkthumb:
@if test "$(call cc-name)" = "gcc" -a \
@@ -55,8 +55,18 @@ checkthumb:
echo '*** Your board is configured for THUMB mode.'; \
false; \
fi
+else
+archprepare: checkgcc6
endif
+checkgcc6:
+ @if test "$(call cc-name)" = "gcc" -a \
+ "$(call cc-version)" -lt "0600"; then \
+ echo -n '*** Your GCC is older than 6.0 and will not be '; \
+ echo 'supported starting in v2018.01.'; \
+ fi
+
+
# Try if EABI is supported, else fall back to old API,
# i. e. for example:
# - with ELDK 4.2 (EABI supported), use:
--
GitLab
From a1b343d754dd153a9bcd884b30a352714676e468 Mon Sep 17 00:00:00 2001
From: Alexey Brodkin <Alexey.Brodkin@synopsys.com>
Date: Tue, 18 Apr 2017 22:09:10 +0300
Subject: [PATCH 144/282] clean-up: Remove uselsess mentions of
CONFIG_COMMAND_HISTORY
These were reminders that somehow slipped through the cracks
or were erroneously introduced after previous clean-ups.
Getting rid of then once again. Hopefully for good now :)
Where missing and appropriate replace with CONFIG_CMDLINE_EDITING
which really enables shell history as of now.
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
Cc: Peter Griffin <peter.griffin@linaro.org>
Cc: Stephen Warren <swarren@wwwdotorg.org>
Cc: Steve Rae <steve.rae@raedomain.com>
Cc: Jon Mason <jon.mason@broadcom.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Stefan Roese <sr@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
---
include/configs/bcm_ep_board.h | 1 -
include/configs/bcm_northstar2.h | 1 -
include/configs/hikey.h | 2 --
include/configs/rpi.h | 2 +-
include/configs/sandbox.h | 1 -
include/configs/tao3530.h | 1 -
include/configs/tegra-common.h | 2 +-
include/configs/x86-common.h | 1 -
scripts/config_whitelist.txt | 1 -
9 files changed, 2 insertions(+), 10 deletions(-)
diff --git a/include/configs/bcm_ep_board.h b/include/configs/bcm_ep_board.h
index c187df233c5..d9b88fa2d31 100644
--- a/include/configs/bcm_ep_board.h
+++ b/include/configs/bcm_ep_board.h
@@ -58,7 +58,6 @@
/* version string, parser, etc */
#define CONFIG_AUTO_COMPLETE
#define CONFIG_CMDLINE_EDITING
-#define CONFIG_COMMAND_HISTORY
#define CONFIG_SYS_LONGHELP
#define CONFIG_CRC32_VERIFY
diff --git a/include/configs/bcm_northstar2.h b/include/configs/bcm_northstar2.h
index ec2ce3f926c..dc2860382d6 100644
--- a/include/configs/bcm_northstar2.h
+++ b/include/configs/bcm_northstar2.h
@@ -49,7 +49,6 @@
/* version string, parser, etc */
#define CONFIG_CMDLINE_EDITING
-#define CONFIG_COMMAND_HISTORY
#define CONFIG_SYS_LONGHELP
#endif /* __BCM_NORTHSTAR2_H */
diff --git a/include/configs/hikey.h b/include/configs/hikey.h
index 4cdb27ccec7..584ce52bd06 100644
--- a/include/configs/hikey.h
+++ b/include/configs/hikey.h
@@ -107,8 +107,6 @@
BOOTENV
/* Preserve environment on sd card */
-#define CONFIG_COMMAND_HISTORY
-
#define CONFIG_ENV_SIZE 0x1000
#define CONFIG_ENV_IS_IN_FAT
#define FAT_ENV_INTERFACE "mmc"
diff --git a/include/configs/rpi.h b/include/configs/rpi.h
index 92eb7929897..244f5101974 100644
--- a/include/configs/rpi.h
+++ b/include/configs/rpi.h
@@ -118,7 +118,7 @@
/* Shell */
#define CONFIG_SYS_MAXARGS 16
-#define CONFIG_COMMAND_HISTORY
+#define CONFIG_CMDLINE_EDITING
/* ATAGs support for bootm/bootz */
#define CONFIG_SETUP_MEMORY_TAGS
diff --git a/include/configs/sandbox.h b/include/configs/sandbox.h
index 4c112cc1a99..e9e78c4b40b 100644
--- a/include/configs/sandbox.h
+++ b/include/configs/sandbox.h
@@ -54,7 +54,6 @@
/* turn on command-line edit/c/auto */
#define CONFIG_CMDLINE_EDITING
-#define CONFIG_COMMAND_HISTORY
#define CONFIG_AUTO_COMPLETE
#define CONFIG_ENV_SIZE 8192
diff --git a/include/configs/tao3530.h b/include/configs/tao3530.h
index 3f2da5795d2..109b8e810d2 100644
--- a/include/configs/tao3530.h
+++ b/include/configs/tao3530.h
@@ -167,7 +167,6 @@
/* turn on command-line edit/hist/auto */
#define CONFIG_CMDLINE_EDITING
-#define CONFIG_COMMAND_HISTORY
#define CONFIG_AUTO_COMPLETE
/* Print Buffer Size */
diff --git a/include/configs/tegra-common.h b/include/configs/tegra-common.h
index c0462bce903..5107a1f6093 100644
--- a/include/configs/tegra-common.h
+++ b/include/configs/tegra-common.h
@@ -51,7 +51,7 @@
#define CONFIG_ENV_OVERWRITE
/* turn on command-line edit/hist/auto */
-#define CONFIG_COMMAND_HISTORY
+#define CONFIG_CMDLINE_EDITING
/*
* Increasing the size of the IO buffer as default nfsargs size is more
diff --git a/include/configs/x86-common.h b/include/configs/x86-common.h
index d69e609bd90..0b67bb7e6f6 100644
--- a/include/configs/x86-common.h
+++ b/include/configs/x86-common.h
@@ -60,7 +60,6 @@
#define CONFIG_SYS_NS16550_PORT_MAPPED
#define CONFIG_CMDLINE_EDITING
-#define CONFIG_COMMAND_HISTORY
#define CONFIG_AUTO_COMPLETE
#define CONFIG_SUPPORT_VFAT
diff --git a/scripts/config_whitelist.txt b/scripts/config_whitelist.txt
index 5e515d215c1..cad6117034c 100644
--- a/scripts/config_whitelist.txt
+++ b/scripts/config_whitelist.txt
@@ -511,7 +511,6 @@ CONFIG_CM_TCRAM
CONFIG_CNTL
CONFIG_COLDFIRE
CONFIG_COMMANDS
-CONFIG_COMMAND_HISTORY
CONFIG_COMMON_BOOT
CONFIG_COMMON_ENV_MISC
CONFIG_COMMON_ENV_SETTINGS
--
GitLab
From 17873341af56847382495f3d9f5a4121aeb9a03b Mon Sep 17 00:00:00 2001
From: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Date: Wed, 19 Apr 2017 15:09:04 +0200
Subject: [PATCH 145/282] rockchip: mkimage: remove (left-over) assignment w/o
effect [coverity]
An assignment (of a value to itself) was left over (after removing and
addition from the line) from moving the common padding code into
rkcommon_vrec_header.
This change removes this to avoid a spurious warning in static code
analysis (i.e. Coverity).
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reported-by: Coverity (CID: 161418)
Reviewed-by: Tom Rini <trini@konsulko.com>
---
tools/rkcommon.c | 1 -
1 file changed, 1 deletion(-)
diff --git a/tools/rkcommon.c b/tools/rkcommon.c
index 6cdb749c4ca..b34373e8fcd 100644
--- a/tools/rkcommon.c
+++ b/tools/rkcommon.c
@@ -227,5 +227,4 @@ void rkcommon_vrec_header(struct image_tool_params *params,
/* Allocate, clear and install the header */
tparams->hdr = malloc(tparams->header_size);
memset(tparams->hdr, 0, tparams->header_size);
- tparams->header_size = tparams->header_size;
}
--
GitLab
From 51c7f34809dab20e16316a5c4556fbb88c6905a8 Mon Sep 17 00:00:00 2001
From: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Date: Wed, 19 Apr 2017 16:46:37 +0200
Subject: [PATCH 146/282] pinctrl: Kconfig: sort pinctrl config options to
prevent future clutter
This originally started out as
"pinctrl: Kconfig: reorder to keep Rockchip options together"
and tried to keep the Rockchip-related config options together.
However, we now rewrite all chip-specific driver selections to start
with CONFIG_PINCTRL_ (with the inadvertent changes to related
Makefiles) and sort those alphabetically. And as this already means
touching most of the file, we also reformat the help text to not exceed
80 characters (but make full use of those 80 characters).
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Acked-by: Simon Glass <sjg@chromium.org>
---
configs/ap121_defconfig | 2 +-
configs/chromebit_mickey_defconfig | 2 +-
configs/chromebook_jerry_defconfig | 2 +-
configs/chromebook_minnie_defconfig | 2 +-
configs/evb-rk3036_defconfig | 2 +-
configs/evb-rk3288_defconfig | 2 +-
configs/evb-rk3328_defconfig | 2 +-
configs/evb-rk3399_defconfig | 2 +-
configs/fennec-rk3288_defconfig | 2 +-
configs/firefly-rk3288_defconfig | 2 +-
configs/kylin-rk3036_defconfig | 2 +-
configs/miqi-rk3288_defconfig | 2 +-
configs/popmetal-rk3288_defconfig | 2 +-
configs/puma-rk3399_defconfig | 2 +-
configs/rock2_defconfig | 2 +-
configs/rock_defconfig | 2 +-
configs/sandbox_defconfig | 4 +-
configs/sandbox_noblk_defconfig | 4 +-
configs/tinker-rk3288_defconfig | 2 +-
drivers/pinctrl/Kconfig | 164 +++++++++++++++-------------
drivers/pinctrl/Makefile | 2 +-
drivers/pinctrl/ath79/Makefile | 4 +-
drivers/pinctrl/rockchip/Makefile | 10 +-
23 files changed, 117 insertions(+), 105 deletions(-)
diff --git a/configs/ap121_defconfig b/configs/ap121_defconfig
index f3472ae16f5..2550aeecb73 100644
--- a/configs/ap121_defconfig
+++ b/configs/ap121_defconfig
@@ -40,7 +40,7 @@ CONFIG_DM_ETH=y
CONFIG_AG7XXX=y
CONFIG_PINCTRL=y
CONFIG_PINCONF=y
-CONFIG_AR933X_PINCTRL=y
+CONFIG_PINCTRL_AR933X=y
CONFIG_DM_SERIAL=y
CONFIG_DEBUG_UART=y
CONFIG_DEBUG_UART_AR933X=y
diff --git a/configs/chromebit_mickey_defconfig b/configs/chromebit_mickey_defconfig
index a29e4e5cf17..e1f96dce12d 100644
--- a/configs/chromebit_mickey_defconfig
+++ b/configs/chromebit_mickey_defconfig
@@ -51,7 +51,7 @@ CONFIG_MMC_DW_ROCKCHIP=y
CONFIG_PINCTRL=y
CONFIG_SPL_PINCTRL=y
# CONFIG_SPL_PINCTRL_FULL is not set
-CONFIG_ROCKCHIP_RK3288_PINCTRL=y
+CONFIG_PINCTRL_ROCKCHIP_RK3288=y
CONFIG_DM_PMIC=y
# CONFIG_SPL_PMIC_CHILDREN is not set
CONFIG_PMIC_RK808=y
diff --git a/configs/chromebook_jerry_defconfig b/configs/chromebook_jerry_defconfig
index e642b8dba16..baebca970bb 100644
--- a/configs/chromebook_jerry_defconfig
+++ b/configs/chromebook_jerry_defconfig
@@ -52,7 +52,7 @@ CONFIG_MMC_DW_ROCKCHIP=y
CONFIG_PINCTRL=y
CONFIG_SPL_PINCTRL=y
# CONFIG_SPL_PINCTRL_FULL is not set
-CONFIG_ROCKCHIP_RK3288_PINCTRL=y
+CONFIG_PINCTRL_ROCKCHIP_RK3288=y
CONFIG_DM_PMIC=y
# CONFIG_SPL_PMIC_CHILDREN is not set
CONFIG_PMIC_RK808=y
diff --git a/configs/chromebook_minnie_defconfig b/configs/chromebook_minnie_defconfig
index 18123626798..ea57810e956 100644
--- a/configs/chromebook_minnie_defconfig
+++ b/configs/chromebook_minnie_defconfig
@@ -52,7 +52,7 @@ CONFIG_MMC_DW_ROCKCHIP=y
CONFIG_PINCTRL=y
CONFIG_SPL_PINCTRL=y
# CONFIG_SPL_PINCTRL_FULL is not set
-CONFIG_ROCKCHIP_RK3288_PINCTRL=y
+CONFIG_PINCTRL_ROCKCHIP_RK3288=y
CONFIG_DM_PMIC=y
# CONFIG_SPL_PMIC_CHILDREN is not set
CONFIG_PMIC_RK808=y
diff --git a/configs/evb-rk3036_defconfig b/configs/evb-rk3036_defconfig
index 19ecae5e53d..4a5664dfa48 100644
--- a/configs/evb-rk3036_defconfig
+++ b/configs/evb-rk3036_defconfig
@@ -28,7 +28,7 @@ CONFIG_LED=y
CONFIG_MMC_DW=y
CONFIG_MMC_DW_ROCKCHIP=y
CONFIG_PINCTRL=y
-CONFIG_ROCKCHIP_RK3036_PINCTRL=y
+CONFIG_PINCTRL_ROCKCHIP_RK3036=y
CONFIG_RAM=y
# CONFIG_SPL_SERIAL_PRESENT is not set
CONFIG_DEBUG_UART=y
diff --git a/configs/evb-rk3288_defconfig b/configs/evb-rk3288_defconfig
index aad25339987..6507011cabd 100644
--- a/configs/evb-rk3288_defconfig
+++ b/configs/evb-rk3288_defconfig
@@ -48,7 +48,7 @@ CONFIG_GMAC_ROCKCHIP=y
CONFIG_PINCTRL=y
CONFIG_SPL_PINCTRL=y
# CONFIG_SPL_PINCTRL_FULL is not set
-CONFIG_ROCKCHIP_RK3288_PINCTRL=y
+CONFIG_PINCTRL_ROCKCHIP_RK3288=y
CONFIG_DM_PMIC=y
CONFIG_PMIC_ACT8846=y
CONFIG_REGULATOR_ACT8846=y
diff --git a/configs/evb-rk3328_defconfig b/configs/evb-rk3328_defconfig
index a9304fe039e..c834a4af286 100644
--- a/configs/evb-rk3328_defconfig
+++ b/configs/evb-rk3328_defconfig
@@ -22,7 +22,7 @@ CONFIG_ROCKCHIP_GPIO=y
CONFIG_MMC_DW=y
CONFIG_MMC_DW_ROCKCHIP=y
CONFIG_PINCTRL=y
-CONFIG_ROCKCHIP_RK3328_PINCTRL=y
+CONFIG_PINCTRL_ROCKCHIP_RK3328=y
CONFIG_REGULATOR_PWM=y
CONFIG_DM_REGULATOR_FIXED=y
CONFIG_RAM=y
diff --git a/configs/evb-rk3399_defconfig b/configs/evb-rk3399_defconfig
index cef8506d997..b115f045073 100644
--- a/configs/evb-rk3399_defconfig
+++ b/configs/evb-rk3399_defconfig
@@ -39,7 +39,7 @@ CONFIG_MMC_SDHCI=y
CONFIG_MMC_SDHCI_ROCKCHIP=y
CONFIG_PINCTRL=y
CONFIG_SPL_PINCTRL=y
-CONFIG_ROCKCHIP_RK3399_PINCTRL=y
+CONFIG_PINCTRL_ROCKCHIP_RK3399=y
CONFIG_REGULATOR_PWM=y
CONFIG_DM_REGULATOR_FIXED=y
CONFIG_PWM_ROCKCHIP=y
diff --git a/configs/fennec-rk3288_defconfig b/configs/fennec-rk3288_defconfig
index d1b0ffc467a..a2d273c804a 100644
--- a/configs/fennec-rk3288_defconfig
+++ b/configs/fennec-rk3288_defconfig
@@ -48,7 +48,7 @@ CONFIG_GMAC_ROCKCHIP=y
CONFIG_PINCTRL=y
CONFIG_SPL_PINCTRL=y
# CONFIG_SPL_PINCTRL_FULL is not set
-CONFIG_ROCKCHIP_RK3288_PINCTRL=y
+CONFIG_PINCTRL_ROCKCHIP_RK3288=y
CONFIG_DM_PMIC=y
CONFIG_PMIC_RK808=y
CONFIG_DM_REGULATOR_FIXED=y
diff --git a/configs/firefly-rk3288_defconfig b/configs/firefly-rk3288_defconfig
index b0741d7bd91..69a54921777 100644
--- a/configs/firefly-rk3288_defconfig
+++ b/configs/firefly-rk3288_defconfig
@@ -49,7 +49,7 @@ CONFIG_GMAC_ROCKCHIP=y
CONFIG_PINCTRL=y
CONFIG_SPL_PINCTRL=y
# CONFIG_SPL_PINCTRL_FULL is not set
-CONFIG_ROCKCHIP_RK3288_PINCTRL=y
+CONFIG_PINCTRL_ROCKCHIP_RK3288=y
CONFIG_DM_PMIC=y
# CONFIG_SPL_PMIC_CHILDREN is not set
CONFIG_PMIC_ACT8846=y
diff --git a/configs/kylin-rk3036_defconfig b/configs/kylin-rk3036_defconfig
index 2b127307c83..ba65bc94986 100644
--- a/configs/kylin-rk3036_defconfig
+++ b/configs/kylin-rk3036_defconfig
@@ -29,7 +29,7 @@ CONFIG_LED=y
CONFIG_MMC_DW=y
CONFIG_MMC_DW_ROCKCHIP=y
CONFIG_PINCTRL=y
-CONFIG_ROCKCHIP_RK3036_PINCTRL=y
+CONFIG_PINCTRL_ROCKCHIP_RK3036=y
CONFIG_DM_REGULATOR_FIXED=y
CONFIG_RAM=y
CONFIG_SYSRESET=y
diff --git a/configs/miqi-rk3288_defconfig b/configs/miqi-rk3288_defconfig
index 203824b8938..2b9da554a95 100644
--- a/configs/miqi-rk3288_defconfig
+++ b/configs/miqi-rk3288_defconfig
@@ -47,7 +47,7 @@ CONFIG_GMAC_ROCKCHIP=y
CONFIG_PINCTRL=y
CONFIG_SPL_PINCTRL=y
# CONFIG_SPL_PINCTRL_FULL is not set
-CONFIG_ROCKCHIP_RK3288_PINCTRL=y
+CONFIG_PINCTRL_ROCKCHIP_RK3288=y
CONFIG_DM_PMIC=y
CONFIG_PMIC_ACT8846=y
CONFIG_REGULATOR_ACT8846=y
diff --git a/configs/popmetal-rk3288_defconfig b/configs/popmetal-rk3288_defconfig
index dfc84b9a83d..80bc83b2c2d 100644
--- a/configs/popmetal-rk3288_defconfig
+++ b/configs/popmetal-rk3288_defconfig
@@ -48,7 +48,7 @@ CONFIG_GMAC_ROCKCHIP=y
CONFIG_PINCTRL=y
CONFIG_SPL_PINCTRL=y
# CONFIG_SPL_PINCTRL_FULL is not set
-CONFIG_ROCKCHIP_RK3288_PINCTRL=y
+CONFIG_PINCTRL_ROCKCHIP_RK3288=y
CONFIG_DM_PMIC=y
CONFIG_PMIC_RK808=y
CONFIG_DM_REGULATOR_FIXED=y
diff --git a/configs/puma-rk3399_defconfig b/configs/puma-rk3399_defconfig
index 500f22093e1..137f7fb1ed4 100644
--- a/configs/puma-rk3399_defconfig
+++ b/configs/puma-rk3399_defconfig
@@ -50,7 +50,7 @@ CONFIG_ETH_DESIGNWARE=y
CONFIG_GMAC_ROCKCHIP=y
CONFIG_PINCTRL=y
CONFIG_SPL_PINCTRL=y
-CONFIG_ROCKCHIP_RK3399_PINCTRL=y
+CONFIG_PINCTRL_ROCKCHIP_RK3399=y
CONFIG_REGULATOR_PWM=y
CONFIG_DM_REGULATOR_FIXED=y
CONFIG_PWM_ROCKCHIP=y
diff --git a/configs/rock2_defconfig b/configs/rock2_defconfig
index e9a32a93c2f..ae432ad14db 100644
--- a/configs/rock2_defconfig
+++ b/configs/rock2_defconfig
@@ -46,7 +46,7 @@ CONFIG_GMAC_ROCKCHIP=y
CONFIG_PINCTRL=y
CONFIG_SPL_PINCTRL=y
# CONFIG_SPL_PINCTRL_FULL is not set
-CONFIG_ROCKCHIP_RK3288_PINCTRL=y
+CONFIG_PINCTRL_ROCKCHIP_RK3288=y
CONFIG_DM_PMIC=y
# CONFIG_SPL_PMIC_CHILDREN is not set
CONFIG_PMIC_ACT8846=y
diff --git a/configs/rock_defconfig b/configs/rock_defconfig
index b61286e84b6..8e817948835 100644
--- a/configs/rock_defconfig
+++ b/configs/rock_defconfig
@@ -33,7 +33,7 @@ CONFIG_LED=y
CONFIG_MMC_DW=y
CONFIG_MMC_DW_ROCKCHIP=y
CONFIG_PINCTRL=y
-CONFIG_ROCKCHIP_RK3188_PINCTRL=y
+CONFIG_PINCTRL_ROCKCHIP_RK3188=y
CONFIG_DM_PMIC=y
# CONFIG_SPL_PMIC_CHILDREN is not set
CONFIG_PMIC_ACT8846=y
diff --git a/configs/sandbox_defconfig b/configs/sandbox_defconfig
index cdaf3bb7433..77a07ac3e14 100644
--- a/configs/sandbox_defconfig
+++ b/configs/sandbox_defconfig
@@ -114,8 +114,8 @@ CONFIG_DM_PCI_COMPAT=y
CONFIG_PCI_SANDBOX=y
CONFIG_PINCTRL=y
CONFIG_PINCONF=y
-CONFIG_ROCKCHIP_RK3036_PINCTRL=y
-CONFIG_ROCKCHIP_RK3288_PINCTRL=y
+CONFIG_PINCTRL_ROCKCHIP_RK3036=y
+CONFIG_PINCTRL_ROCKCHIP_RK3288=y
CONFIG_PINCTRL_SANDBOX=y
CONFIG_POWER_DOMAIN=y
CONFIG_SANDBOX_POWER_DOMAIN=y
diff --git a/configs/sandbox_noblk_defconfig b/configs/sandbox_noblk_defconfig
index 087c7a84fc4..c4610e8efb1 100644
--- a/configs/sandbox_noblk_defconfig
+++ b/configs/sandbox_noblk_defconfig
@@ -120,8 +120,8 @@ CONFIG_DM_PCI_COMPAT=y
CONFIG_PCI_SANDBOX=y
CONFIG_PINCTRL=y
CONFIG_PINCONF=y
-CONFIG_ROCKCHIP_RK3036_PINCTRL=y
-CONFIG_ROCKCHIP_RK3288_PINCTRL=y
+CONFIG_PINCTRL_ROCKCHIP_RK3036=y
+CONFIG_PINCTRL_ROCKCHIP_RK3288=y
CONFIG_PINCTRL_SANDBOX=y
CONFIG_DM_PMIC=y
CONFIG_PMIC_ACT8846=y
diff --git a/configs/tinker-rk3288_defconfig b/configs/tinker-rk3288_defconfig
index cec39384b3c..cd9189f0aff 100644
--- a/configs/tinker-rk3288_defconfig
+++ b/configs/tinker-rk3288_defconfig
@@ -48,7 +48,7 @@ CONFIG_GMAC_ROCKCHIP=y
CONFIG_PINCTRL=y
CONFIG_SPL_PINCTRL=y
# CONFIG_SPL_PINCTRL_FULL is not set
-CONFIG_ROCKCHIP_RK3288_PINCTRL=y
+CONFIG_PINCTRL_ROCKCHIP_RK3288=y
CONFIG_DM_PMIC=y
CONFIG_PMIC_RK808=y
CONFIG_DM_REGULATOR_FIXED=y
diff --git a/drivers/pinctrl/Kconfig b/drivers/pinctrl/Kconfig
index 355aeae854d..9cea6f202cf 100644
--- a/drivers/pinctrl/Kconfig
+++ b/drivers/pinctrl/Kconfig
@@ -105,7 +105,7 @@ config SPL_PINCONF
if PINCTRL || SPL_PINCTRL
-config AR933X_PINCTRL
+config PINCTRL_AR933X
bool "QCA/Athores ar933x pin control driver"
depends on DM && SOC_AR933X
help
@@ -114,98 +114,118 @@ config AR933X_PINCTRL
both the GPIO definitions and pin control functions for each
available multiplex function.
-config QCA953X_PINCTRL
+config PINCTRL_AT91
+ bool "AT91 pinctrl driver"
+ depends on DM
+ help
+ This option is to enable the AT91 pinctrl driver for AT91 PIO
+ controller.
+
+ AT91 PIO controller is a combined gpio-controller, pin-mux and
+ pin-config module. Each I/O pin may be dedicated as a general-purpose
+ I/O or be assigned to a function of an embedded peripheral. Each I/O
+ pin has a glitch filter providing rejection of glitches lower than
+ one-half of peripheral clock cycle and a debouncing filter providing
+ rejection of unwanted pulses from key or push button operations. You
+ can also control the multi-driver capability, pull-up and pull-down
+ feature on each I/O pin.
+
+config PINCTRL_AT91PIO4
+ bool "AT91 PIO4 pinctrl driver"
+ depends on DM
+ help
+ This option is to enable the AT91 pinctrl driver for AT91 PIO4
+ controller which is available on SAMA5D2 SoC.
+
+config PINCTRL_PIC32
+ bool "Microchip PIC32 pin-control and pin-mux driver"
+ depends on DM && MACH_PIC32
+ default y
+ help
+ Supports individual pin selection and configuration for each
+ remappable peripheral available on Microchip PIC32
+ SoCs. This driver is controlled by a device tree node which
+ contains both GPIO defintion and pin control functions.
+
+config PINCTRL_QCA953X
bool "QCA/Athores qca953x pin control driver"
depends on DM && SOC_QCA953X
help
Support pin multiplexing control on QCA/Athores qca953x SoCs.
- The driver is controlled by a device tree node which contains
- both the GPIO definitions and pin control functions for each
- available multiplex function.
-config ROCKCHIP_RK3036_PINCTRL
+ The driver is controlled by a device tree node which contains both
+ the GPIO definitions and pin control functions for each available
+ multiplex function.
+
+config PINCTRL_ROCKCHIP_RK3036
bool "Rockchip rk3036 pin control driver"
depends on DM
help
- Support pin multiplexing control on Rockchip rk3036 SoCs. The driver is
- controlled by a device tree node which contains both the GPIO
- definitions and pin control functions for each available multiplex
- function.
+ Support pin multiplexing control on Rockchip rk3036 SoCs.
+
+ The driver is controlled by a device tree node which contains both
+ the GPIO definitions and pin control functions for each available
+ multiplex function.
-config ROCKCHIP_RK3188_PINCTRL
+config PINCTRL_ROCKCHIP_RK3188
bool "Rockchip rk3188 pin control driver"
depends on DM
help
- Support pin multiplexing control on Rockchip rk3188 SoCs. The driver
- is controlled by a device tree node which contains both the GPIO
- definitions and pin control functions for each available multiplex
- function.
+ Support pin multiplexing control on Rockchip rk3188 SoCs.
-config ROCKCHIP_RK3288_PINCTRL
- bool "Rockchip rk3288 pin control driver"
- depends on DM
- help
- Support pin multiplexing control on Rockchip rk3288 SoCs. The driver
- is controlled by a device tree node which contains both the GPIO
- definitions and pin control functions for each available multiplex
- function.
+ The driver is controlled by a device tree node which contains both
+ the GPIO definitions and pin control functions for each available
+ multiplex function.
-config PINCTRL_AT91
- bool "AT91 pinctrl driver"
+config PINCTRL_ROCKCHIP_RK3288
+ bool "Rockchip rk3288 pin control driver"
depends on DM
help
- This option is to enable the AT91 pinctrl driver for AT91 PIO
- controller. AT91 PIO controller is a combined gpio-controller,
- pin-mux and pin-config module. Each I/O pin may be dedicated as
- a general-purpose I/O or be assigned to a function of an embedded
- peripheral. Each I/O pin has a glitch filter providing rejection of
- glitches lower than one-half of peripheral clock cycle and
- a debouncing filter providing rejection of unwanted pulses from key
- or push button operations. You can also control the multi-driver
- capability, pull-up and pull-down feature on each I/O pin.
+ Support pin multiplexing control on Rockchip rk3288 SoCs.
-config PINCTRL_AT91PIO4
- bool "AT91 PIO4 pinctrl driver"
- depends on DM
- help
- This option is to enable the AT91 pinctrl driver for AT91 PIO4
- controller which is available on SAMA5D2 SoC.
+ The driver is controlled by a device tree node which contains both
+ the GPIO definitions and pin control functions for each available
+ multiplex function.
-config ROCKCHIP_RK3328_PINCTRL
+config PINCTRL_ROCKCHIP_RK3328
bool "Rockchip rk3328 pin control driver"
depends on DM
help
- Support pin multiplexing control on Rockchip rk3328 SoCs. The driver
- is controlled by a device tree node which contains both the GPIO
- definitions and pin control functions for each available multiplex
- function.
+ Support pin multiplexing control on Rockchip rk3328 SoCs.
+
+ The driver is controlled by a device tree node which contains both
+ the GPIO definitions and pin control functions for each available
+ multiplex function.
-config ROCKCHIP_RK3399_PINCTRL
+config PINCTRL_ROCKCHIP_RK3399
bool "Rockchip rk3399 pin control driver"
depends on DM
help
- Support pin multiplexing control on Rockchip rk3399 SoCs. The driver
- is controlled by a device tree node which contains both the GPIO
- definitions and pin control functions for each available multiplex
- function.
+ Support pin multiplexing control on Rockchip rk3399 SoCs.
+
+ The driver is controlled by a device tree node which contains both
+ the GPIO definitions and pin control functions for each available
+ multiplex function.
config PINCTRL_SANDBOX
bool "Sandbox pinctrl driver"
depends on SANDBOX
help
- This enables pinctrl driver for sandbox. Currently, this driver
- actually does nothing but print debug messages when pinctrl
- operations are invoked.
+ This enables pinctrl driver for sandbox.
-config PIC32_PINCTRL
- bool "Microchip PIC32 pin-control and pin-mux driver"
- depends on DM && MACH_PIC32
- default y
+ Currently, this driver actually does nothing but print debug
+ messages when pinctrl operations are invoked.
+
+config PINCTRL_SINGLE
+ bool "Single register pin-control and pin-multiplex driver"
+ depends on DM
help
- Supports individual pin selection and configuration for each remappable
- peripheral available on Microchip PIC32 SoCs. This driver is controlled
- by a device tree node which contains both GPIO defintion and pin control
- functions.
+ This enables pinctrl driver for systems using a single register for
+ pin configuration and multiplexing. TI's AM335X SoCs are examples of
+ such systems.
+
+ Depending on the platform make sure to also enable OF_TRANSLATE and
+ eventually SPL_OF_TRANSLATE to get correct address translations.
config PINCTRL_STI
bool "STMicroelectronics STi pin-control and pin-mux driver"
@@ -213,28 +233,20 @@ config PINCTRL_STI
default y
help
Support pin multiplexing control on STMicrolectronics STi SoCs.
+
The driver is controlled by a device tree node which contains both
- the GPIO definitions and pin control functions for each available multiplex
- function.
+ the GPIO definitions and pin control functions for each available
+ multiplex function.
config PINCTRL_STM32
bool "ST STM32 pin control driver"
depends on DM
help
- Supports pin multiplexing control on stm32 SoCs. The driver is
- controlled by a device tree node which contains both the GPIO
- definitions and pin control functions for each available multiplex
- function.
+ Supports pin multiplexing control on stm32 SoCs.
-config PINCTRL_SINGLE
- bool "Single register pin-control and pin-multiplex driver"
- depends on DM
- help
- This enables pinctrl driver for systems using a single register for
- pin configuration and multiplexing. TI's AM335X SoCs are examples of
- such systems.
- Depending on the platform make sure to also enable OF_TRANSLATE and
- eventually SPL_OF_TRANSLATE to get correct address translations.
+ The driver is controlled by a device tree node which contains both
+ the GPIO definitions and pin control functions for each available
+ multiplex function.
endif
diff --git a/drivers/pinctrl/Makefile b/drivers/pinctrl/Makefile
index bbb2480e865..17a7173d355 100644
--- a/drivers/pinctrl/Makefile
+++ b/drivers/pinctrl/Makefile
@@ -13,7 +13,7 @@ obj-$(CONFIG_ARCH_ROCKCHIP) += rockchip/
obj-$(CONFIG_PINCTRL_SANDBOX) += pinctrl-sandbox.o
obj-$(CONFIG_PINCTRL_UNIPHIER) += uniphier/
-obj-$(CONFIG_PIC32_PINCTRL) += pinctrl_pic32.o
+obj-$(CONFIG_PINCTRL_PIC32) += pinctrl_pic32.o
obj-$(CONFIG_PINCTRL_EXYNOS) += exynos/
obj-$(CONFIG_PINCTRL_MESON) += meson/
obj-$(CONFIG_PINCTRL_MVEBU) += mvebu/
diff --git a/drivers/pinctrl/ath79/Makefile b/drivers/pinctrl/ath79/Makefile
index dcea10ace6a..c87a9aa3e70 100644
--- a/drivers/pinctrl/ath79/Makefile
+++ b/drivers/pinctrl/ath79/Makefile
@@ -2,5 +2,5 @@
# SPDX-License-Identifier: GPL-2.0+
#
-obj-$(CONFIG_AR933X_PINCTRL) += pinctrl_ar933x.o
-obj-$(CONFIG_QCA953x_PINCTRL) += pinctrl_qca953x.o
+obj-$(CONFIG_PINCTRL_AR933X) += pinctrl_ar933x.o
+obj-$(CONFIG_PINCTRL_QCA953x) += pinctrl_qca953x.o
diff --git a/drivers/pinctrl/rockchip/Makefile b/drivers/pinctrl/rockchip/Makefile
index b0b698ac04a..69eef4c0240 100644
--- a/drivers/pinctrl/rockchip/Makefile
+++ b/drivers/pinctrl/rockchip/Makefile
@@ -5,8 +5,8 @@
# SPDX-License-Identifier: GPL-2.0+
#
-obj-$(CONFIG_ROCKCHIP_RK3036_PINCTRL) += pinctrl_rk3036.o
-obj-$(CONFIG_ROCKCHIP_RK3188_PINCTRL) += pinctrl_rk3188.o
-obj-$(CONFIG_ROCKCHIP_RK3288_PINCTRL) += pinctrl_rk3288.o
-obj-$(CONFIG_ROCKCHIP_RK3328_PINCTRL) += pinctrl_rk3328.o
-obj-$(CONFIG_ROCKCHIP_RK3399_PINCTRL) += pinctrl_rk3399.o
+obj-$(CONFIG_PINCTRL_ROCKCHIP_RK3036) += pinctrl_rk3036.o
+obj-$(CONFIG_PINCTRL_ROCKCHIP_RK3188) += pinctrl_rk3188.o
+obj-$(CONFIG_PINCTRL_ROCKCHIP_RK3288) += pinctrl_rk3288.o
+obj-$(CONFIG_PINCTRL_ROCKCHIP_RK3328) += pinctrl_rk3328.o
+obj-$(CONFIG_PINCTRL_ROCKCHIP_RK3399) += pinctrl_rk3399.o
--
GitLab
From 6cc96bc75ac4f8df26f1952e8fe9f05621a4d94d Mon Sep 17 00:00:00 2001
From: Lokesh Vutla <lokeshvutla@ti.com>
Date: Thu, 20 Apr 2017 14:07:52 +0530
Subject: [PATCH 147/282] board: dra71: Fix selection of OPPs
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
As per the DM[1] Dated June 2016–Revised February 2017, Table 5-3,
DRA71 supports the following OPPs for various voltage domains:
VDD_MPU: OPP_NOM
VDD_CORE: OPP_NOM
VDD_GPU: OPP_NOM
VDD_DSPEVE: OPP_NOM, OPP_HIGH
VDD_IVA: OPP_NOM, OPP_HIGH
This patch add support for selection of the above OPPs instead of
using OPP_NOM for all voltage domains.
[1] http://www.ti.com/lit/ds/symlink/dra718.pdf
Reported-by: Vishal Mahaveer <vishalm@ti.com>
Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
---
board/ti/dra7xx/evm.c | 33 +++++++++++++++++++++++++++------
1 file changed, 27 insertions(+), 6 deletions(-)
diff --git a/board/ti/dra7xx/evm.c b/board/ti/dra7xx/evm.c
index ae2d59da432..ed0bc181cf5 100644
--- a/board/ti/dra7xx/evm.c
+++ b/board/ti/dra7xx/evm.c
@@ -438,14 +438,18 @@ struct vcores_data dra718_volts = {
* and are powered by BUCK1 of LP873X PMIC
*/
.eve.value[OPP_NOM] = VDD_EVE_DRA7_NOM,
+ .eve.value[OPP_HIGH] = VDD_EVE_DRA7_HIGH,
.eve.efuse.reg[OPP_NOM] = STD_FUSE_OPP_VMIN_DSPEVE_NOM,
+ .eve.efuse.reg[OPP_HIGH] = STD_FUSE_OPP_VMIN_DSPEVE_HIGH,
.eve.efuse.reg_bits = DRA752_EFUSE_REGBITS,
.eve.addr = LP873X_REG_ADDR_BUCK1,
.eve.pmic = &lp8733,
.eve.abb_tx_done_mask = OMAP_ABB_EVE_TXDONE_MASK,
.iva.value[OPP_NOM] = VDD_IVA_DRA7_NOM,
+ .iva.value[OPP_HIGH] = VDD_IVA_DRA7_HIGH,
.iva.efuse.reg[OPP_NOM] = STD_FUSE_OPP_VMIN_IVA_NOM,
+ .iva.efuse.reg[OPP_HIGH] = STD_FUSE_OPP_VMIN_IVA_HIGH,
.iva.efuse.reg_bits = DRA752_EFUSE_REGBITS,
.iva.addr = LP873X_REG_ADDR_BUCK1,
.iva.pmic = &lp8733,
@@ -456,27 +460,44 @@ int get_voltrail_opp(int rail_offset)
{
int opp;
- /*
- * DRA71x supports only OPP_NOM.
- */
- if (board_is_dra71x_evm())
- return OPP_NOM;
-
switch (rail_offset) {
case VOLT_MPU:
opp = DRA7_MPU_OPP;
+ /* DRA71x supports only OPP_NOM for MPU */
+ if (board_is_dra71x_evm())
+ opp = OPP_NOM;
break;
case VOLT_CORE:
opp = DRA7_CORE_OPP;
+ /* DRA71x supports only OPP_NOM for CORE */
+ if (board_is_dra71x_evm())
+ opp = OPP_NOM;
break;
case VOLT_GPU:
opp = DRA7_GPU_OPP;
+ /* DRA71x supports only OPP_NOM for GPU */
+ if (board_is_dra71x_evm())
+ opp = OPP_NOM;
break;
case VOLT_EVE:
opp = DRA7_DSPEVE_OPP;
+ /*
+ * DRA71x does not support OPP_OD for EVE.
+ * If OPP_OD is selected by menuconfig, fallback
+ * to OPP_NOM.
+ */
+ if (board_is_dra71x_evm() && opp == OPP_OD)
+ opp = OPP_NOM;
break;
case VOLT_IVA:
opp = DRA7_IVA_OPP;
+ /*
+ * DRA71x does not support OPP_OD for IVA.
+ * If OPP_OD is selected by menuconfig, fallback
+ * to OPP_NOM.
+ */
+ if (board_is_dra71x_evm() && opp == OPP_OD)
+ opp = OPP_NOM;
break;
default:
opp = OPP_NOM;
--
GitLab
From 80e4bbfcd92d28dc806abc41190cd0ab324956b5 Mon Sep 17 00:00:00 2001
From: Alexey Brodkin <Alexey.Brodkin@synopsys.com>
Date: Fri, 21 Apr 2017 13:35:43 +0300
Subject: [PATCH 148/282] travisci: Add support for ARC
Finally adding support for ARC boards in TravisCI.
To build for ARC boards we need to install Synopsys prebuilt toolchain
which we do here.
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
Cc: Tom Rini <trini@konsulko.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
---
.travis.yml | 8 ++++++++
1 file changed, 8 insertions(+)
diff --git a/.travis.yml b/.travis.yml
index f6898a2edb7..d7094e325a8 100644
--- a/.travis.yml
+++ b/.travis.yml
@@ -40,6 +40,7 @@ install:
- echo -e "[toolchain]\nroot = /usr" > ~/.buildman
- echo -e "aarch64 = /tmp/gcc-linaro-6.3.1-2017.02-x86_64_aarch64-linux-gnu" >> ~/.buildman
- echo -e "arm = /tmp/gcc-linaro-6.3.1-2017.02-x86_64_arm-linux-gnueabihf" >> ~/.buildman
+ - echo -e "arc = /tmp/arc_gnu_2016.09_prebuilt_uclibc_le_archs_linux_install" >> ~/.buildman
- echo -e "\n[toolchain-alias]\nsh = sh4\nopenrisc = or32" >> ~/.buildman
- cat ~/.buildman
- virtualenv /tmp/venv
@@ -69,6 +70,10 @@ before_script:
./tools/buildman/buildman --fetch-arch x86_64;
echo -e "\n[toolchain-prefix]\nx86 = ${HOME}/.buildman-toolchains/gcc-4.9.0-nolibc/x86_64-linux/bin/x86_64-linux-" >> ~/.buildman;
fi
+ - if [[ "${TOOLCHAIN}" == arc ]]; then
+ wget https://github.com/foss-for-synopsys-dwc-arc-processors/toolchain/releases/download/arc-2016.09-release/arc_gnu_2016.09_prebuilt_uclibc_le_archs_linux_install.tar.gz &&
+ tar -C /tmp -xf arc_gnu_2016.09_prebuilt_uclibc_le_archs_linux_install.tar.gz;
+ fi
- if [[ "${TOOLCHAIN}" == *xtensa* ]]; then ./tools/buildman/buildman --fetch-arch xtensa ; fi
# If TOOLCHAIN is unset, we're on some flavour of ARM.
- if [[ "${TOOLCHAIN}" == "" ]]; then
@@ -118,6 +123,9 @@ matrix:
include:
# we need to build by vendor due to 50min time limit for builds
# each env setting here is a dedicated build
+ - env:
+ - BUILDMAN="arc"
+ TOOLCHAIN="arc"
- env:
- BUILDMAN="arm11"
- env:
--
GitLab
From 46f9ef18461609064a1ffbc3f61dc027ec76b3ff Mon Sep 17 00:00:00 2001
From: "Andrew F. Davis" <afd@ti.com>
Date: Fri, 21 Apr 2017 10:01:28 -0500
Subject: [PATCH 149/282] Kconfig: Enable FIT support by default for TI
platforms
Almost all TI defconfigs enable this already, add this as a default
and remove the explicit assignment.
Signed-off-by: Andrew F. Davis <afd@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
---
arch/arm/Kconfig | 2 ++
configs/am335x_baltos_defconfig | 1 -
configs/am335x_boneblack_defconfig | 1 -
configs/am335x_boneblack_vboot_defconfig | 1 -
configs/am335x_evm_defconfig | 1 -
configs/am335x_evm_nor_defconfig | 1 -
configs/am335x_evm_norboot_defconfig | 1 -
configs/am335x_evm_spiboot_defconfig | 1 -
configs/am335x_evm_usbspl_defconfig | 1 -
configs/am335x_hs_evm_defconfig | 1 -
configs/am335x_shc_defconfig | 1 -
configs/am335x_shc_ict_defconfig | 1 -
configs/am335x_shc_netboot_defconfig | 1 -
configs/am335x_shc_prompt_defconfig | 1 -
configs/am335x_shc_sdboot_defconfig | 1 -
configs/am335x_shc_sdboot_prompt_defconfig | 1 -
configs/am335x_sl50_defconfig | 1 -
configs/am3517_evm_defconfig | 1 -
configs/am43xx_evm_defconfig | 1 -
configs/am43xx_evm_usbhost_boot_defconfig | 1 -
configs/am43xx_hs_evm_defconfig | 1 -
configs/am57xx_evm_defconfig | 1 -
configs/am57xx_hs_evm_defconfig | 1 -
configs/birdland_bav335a_defconfig | 1 -
configs/birdland_bav335b_defconfig | 1 -
configs/chiliboard_defconfig | 1 -
configs/dra7xx_evm_defconfig | 1 -
configs/dra7xx_hs_evm_defconfig | 1 -
configs/eco5pk_defconfig | 1 -
configs/k2e_hs_evm_defconfig | 1 -
configs/k2g_hs_evm_defconfig | 1 -
configs/k2hk_hs_evm_defconfig | 1 -
configs/mcx_defconfig | 1 -
configs/mt_ventoux_defconfig | 1 -
configs/pxm2_defconfig | 1 -
configs/rut_defconfig | 1 -
configs/twister_defconfig | 1 -
37 files changed, 2 insertions(+), 36 deletions(-)
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 7812f21f36b..c71849e9ed1 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -267,6 +267,7 @@ config ARCH_OMAP2
bool
select CPU_V7
select SUPPORT_SPL
+ imply FIT
config ARM64_SUPPORT_AARCH32
bool "ARM64 system support AArch32 execution state"
@@ -613,6 +614,7 @@ config ARCH_KEYSTONE
select SUPPORT_SPL
select SYS_THUMB_BUILD
select CMD_POWEROFF
+ imply FIT
config ARCH_MESON
bool "Amlogic Meson"
diff --git a/configs/am335x_baltos_defconfig b/configs/am335x_baltos_defconfig
index 72c8db09079..002fa799ce0 100644
--- a/configs/am335x_baltos_defconfig
+++ b/configs/am335x_baltos_defconfig
@@ -12,7 +12,6 @@ CONFIG_SPL_WATCHDOG_SUPPORT=y
CONFIG_SPL_FAT_SUPPORT=y
CONFIG_SPL_POWER_SUPPORT=y
CONFIG_SPL_STACK_R_ADDR=0x82000000
-CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_SYS_EXTRA_OPTIONS="NAND"
diff --git a/configs/am335x_boneblack_defconfig b/configs/am335x_boneblack_defconfig
index d0e1bcc8a30..17c9f7c8813 100644
--- a/configs/am335x_boneblack_defconfig
+++ b/configs/am335x_boneblack_defconfig
@@ -4,7 +4,6 @@ CONFIG_TARGET_AM335X_EVM=y
# CONFIG_SPL_NAND_SUPPORT is not set
CONFIG_SPL_STACK_R_ADDR=0x82000000
CONFIG_DISTRO_DEFAULTS=y
-CONFIG_FIT=y
CONFIG_SYS_EXTRA_OPTIONS="EMMC_BOOT"
CONFIG_SYS_CONSOLE_INFO_QUIET=y
CONFIG_VERSION_VARIABLE=y
diff --git a/configs/am335x_boneblack_vboot_defconfig b/configs/am335x_boneblack_vboot_defconfig
index 6e1e8c6c760..f14e1c24ea0 100644
--- a/configs/am335x_boneblack_vboot_defconfig
+++ b/configs/am335x_boneblack_vboot_defconfig
@@ -5,7 +5,6 @@ CONFIG_TARGET_AM335X_EVM=y
CONFIG_SPL_STACK_R_ADDR=0x82000000
CONFIG_DEFAULT_DEVICE_TREE="am335x-boneblack"
CONFIG_DISTRO_DEFAULTS=y
-CONFIG_FIT=y
CONFIG_FIT_SIGNATURE=y
CONFIG_FIT_VERBOSE=y
CONFIG_SYS_EXTRA_OPTIONS="EMMC_BOOT"
diff --git a/configs/am335x_evm_defconfig b/configs/am335x_evm_defconfig
index ab7b9aa6aae..bf91165becc 100644
--- a/configs/am335x_evm_defconfig
+++ b/configs/am335x_evm_defconfig
@@ -4,7 +4,6 @@ CONFIG_TARGET_AM335X_EVM=y
CONFIG_SPL_STACK_R_ADDR=0x82000000
CONFIG_DEFAULT_DEVICE_TREE="am335x-evm"
CONFIG_DISTRO_DEFAULTS=y
-CONFIG_FIT=y
CONFIG_SPL_LOAD_FIT=y
CONFIG_SYS_EXTRA_OPTIONS="NAND"
CONFIG_SYS_CONSOLE_INFO_QUIET=y
diff --git a/configs/am335x_evm_nor_defconfig b/configs/am335x_evm_nor_defconfig
index fffcd57b844..a6ca7a362bd 100644
--- a/configs/am335x_evm_nor_defconfig
+++ b/configs/am335x_evm_nor_defconfig
@@ -4,7 +4,6 @@ CONFIG_TARGET_AM335X_EVM=y
CONFIG_SPL_STACK_R_ADDR=0x82000000
CONFIG_NOR=y
CONFIG_DISTRO_DEFAULTS=y
-CONFIG_FIT=y
CONFIG_SYS_EXTRA_OPTIONS="NAND"
CONFIG_SYS_CONSOLE_INFO_QUIET=y
CONFIG_VERSION_VARIABLE=y
diff --git a/configs/am335x_evm_norboot_defconfig b/configs/am335x_evm_norboot_defconfig
index cb61842613b..3a9506c5ce9 100644
--- a/configs/am335x_evm_norboot_defconfig
+++ b/configs/am335x_evm_norboot_defconfig
@@ -4,7 +4,6 @@ CONFIG_AM33XX=y
CONFIG_TARGET_AM335X_EVM=y
CONFIG_NOR=y
CONFIG_DISTRO_DEFAULTS=y
-CONFIG_FIT=y
CONFIG_NOR_BOOT=y
CONFIG_SYS_CONSOLE_INFO_QUIET=y
CONFIG_VERSION_VARIABLE=y
diff --git a/configs/am335x_evm_spiboot_defconfig b/configs/am335x_evm_spiboot_defconfig
index af3ee27f054..ed2e3c0b9b3 100644
--- a/configs/am335x_evm_spiboot_defconfig
+++ b/configs/am335x_evm_spiboot_defconfig
@@ -6,7 +6,6 @@ CONFIG_SPL_SPI_FLASH_SUPPORT=y
CONFIG_SPL_SPI_SUPPORT=y
CONFIG_SPL_STACK_R_ADDR=0x82000000
CONFIG_DISTRO_DEFAULTS=y
-CONFIG_FIT=y
CONFIG_SYS_EXTRA_OPTIONS="SPI_BOOT"
CONFIG_SPI_BOOT=y
CONFIG_SYS_CONSOLE_INFO_QUIET=y
diff --git a/configs/am335x_evm_usbspl_defconfig b/configs/am335x_evm_usbspl_defconfig
index a79470e8868..1cc9d7c9fef 100644
--- a/configs/am335x_evm_usbspl_defconfig
+++ b/configs/am335x_evm_usbspl_defconfig
@@ -3,7 +3,6 @@ CONFIG_AM33XX=y
CONFIG_TARGET_AM335X_EVM=y
CONFIG_SPL_STACK_R_ADDR=0x82000000
CONFIG_DISTRO_DEFAULTS=y
-CONFIG_FIT=y
CONFIG_SYS_EXTRA_OPTIONS="NAND"
CONFIG_SYS_CONSOLE_INFO_QUIET=y
CONFIG_VERSION_VARIABLE=y
diff --git a/configs/am335x_hs_evm_defconfig b/configs/am335x_hs_evm_defconfig
index 8ab86535b6f..2b80b694c26 100644
--- a/configs/am335x_hs_evm_defconfig
+++ b/configs/am335x_hs_evm_defconfig
@@ -7,7 +7,6 @@ CONFIG_ISW_ENTRY_ADDR=0x40300350
CONFIG_SPL_STACK_R_ADDR=0x82000000
CONFIG_DEFAULT_DEVICE_TREE="am335x-evm"
CONFIG_DISTRO_DEFAULTS=y
-CONFIG_FIT=y
CONFIG_FIT_IMAGE_POST_PROCESS=y
CONFIG_SPL_LOAD_FIT=y
CONFIG_SPL_FIT_IMAGE_POST_PROCESS=y
diff --git a/configs/am335x_shc_defconfig b/configs/am335x_shc_defconfig
index e4bee2316c2..a46e6d22aa1 100644
--- a/configs/am335x_shc_defconfig
+++ b/configs/am335x_shc_defconfig
@@ -12,7 +12,6 @@ CONFIG_SPL_FAT_SUPPORT=y
CONFIG_SERIES=y
CONFIG_SPL_POWER_SUPPORT=y
CONFIG_SPL_STACK_R_ADDR=0x82000000
-CONFIG_FIT=y
CONFIG_SYS_CONSOLE_INFO_QUIET=y
CONFIG_VERSION_VARIABLE=y
CONFIG_SPL=y
diff --git a/configs/am335x_shc_ict_defconfig b/configs/am335x_shc_ict_defconfig
index 451a657a393..fe172ccbf03 100644
--- a/configs/am335x_shc_ict_defconfig
+++ b/configs/am335x_shc_ict_defconfig
@@ -13,7 +13,6 @@ CONFIG_SHC_ICT=y
CONFIG_SERIES=y
CONFIG_SPL_POWER_SUPPORT=y
CONFIG_SPL_STACK_R_ADDR=0x82000000
-CONFIG_FIT=y
CONFIG_SYS_CONSOLE_INFO_QUIET=y
CONFIG_VERSION_VARIABLE=y
CONFIG_SPL=y
diff --git a/configs/am335x_shc_netboot_defconfig b/configs/am335x_shc_netboot_defconfig
index cf28558d969..04cc93c9a58 100644
--- a/configs/am335x_shc_netboot_defconfig
+++ b/configs/am335x_shc_netboot_defconfig
@@ -13,7 +13,6 @@ CONFIG_SHC_NETBOOT=y
CONFIG_SERIES=y
CONFIG_SPL_POWER_SUPPORT=y
CONFIG_SPL_STACK_R_ADDR=0x82000000
-CONFIG_FIT=y
CONFIG_SYS_CONSOLE_INFO_QUIET=y
CONFIG_VERSION_VARIABLE=y
CONFIG_SPL=y
diff --git a/configs/am335x_shc_prompt_defconfig b/configs/am335x_shc_prompt_defconfig
index 4c97a9ac5a0..a308d761f23 100644
--- a/configs/am335x_shc_prompt_defconfig
+++ b/configs/am335x_shc_prompt_defconfig
@@ -12,7 +12,6 @@ CONFIG_SPL_FAT_SUPPORT=y
CONFIG_SERIES=y
CONFIG_SPL_POWER_SUPPORT=y
CONFIG_SPL_STACK_R_ADDR=0x82000000
-CONFIG_FIT=y
CONFIG_SYS_CONSOLE_INFO_QUIET=y
CONFIG_VERSION_VARIABLE=y
CONFIG_SPL=y
diff --git a/configs/am335x_shc_sdboot_defconfig b/configs/am335x_shc_sdboot_defconfig
index e2b94b63dbc..96288a16626 100644
--- a/configs/am335x_shc_sdboot_defconfig
+++ b/configs/am335x_shc_sdboot_defconfig
@@ -13,7 +13,6 @@ CONFIG_SHC_SDBOOT=y
CONFIG_SERIES=y
CONFIG_SPL_POWER_SUPPORT=y
CONFIG_SPL_STACK_R_ADDR=0x82000000
-CONFIG_FIT=y
CONFIG_SYS_CONSOLE_INFO_QUIET=y
CONFIG_VERSION_VARIABLE=y
CONFIG_SPL=y
diff --git a/configs/am335x_shc_sdboot_prompt_defconfig b/configs/am335x_shc_sdboot_prompt_defconfig
index e2b94b63dbc..96288a16626 100644
--- a/configs/am335x_shc_sdboot_prompt_defconfig
+++ b/configs/am335x_shc_sdboot_prompt_defconfig
@@ -13,7 +13,6 @@ CONFIG_SHC_SDBOOT=y
CONFIG_SERIES=y
CONFIG_SPL_POWER_SUPPORT=y
CONFIG_SPL_STACK_R_ADDR=0x82000000
-CONFIG_FIT=y
CONFIG_SYS_CONSOLE_INFO_QUIET=y
CONFIG_VERSION_VARIABLE=y
CONFIG_SPL=y
diff --git a/configs/am335x_sl50_defconfig b/configs/am335x_sl50_defconfig
index 2da8855af33..38d5709eb10 100644
--- a/configs/am335x_sl50_defconfig
+++ b/configs/am335x_sl50_defconfig
@@ -12,7 +12,6 @@ CONFIG_SPL_FAT_SUPPORT=y
CONFIG_SPL_POWER_SUPPORT=y
CONFIG_SPL_STACK_R_ADDR=0x82000000
CONFIG_DISTRO_DEFAULTS=y
-CONFIG_FIT=y
CONFIG_SYS_EXTRA_OPTIONS="EMMC_BOOT"
CONFIG_SYS_CONSOLE_INFO_QUIET=y
CONFIG_VERSION_VARIABLE=y
diff --git a/configs/am3517_evm_defconfig b/configs/am3517_evm_defconfig
index 1f2cd0785ae..54b857c2253 100644
--- a/configs/am3517_evm_defconfig
+++ b/configs/am3517_evm_defconfig
@@ -3,7 +3,6 @@ CONFIG_ARM=y
CONFIG_OMAP34XX=y
# CONFIG_SPL_GPIO_SUPPORT is not set
CONFIG_TARGET_AM3517_EVM=y
-CONFIG_FIT=y
CONFIG_SYS_EXTRA_OPTIONS="NAND"
CONFIG_BOOTDELAY=10
CONFIG_VERSION_VARIABLE=y
diff --git a/configs/am43xx_evm_defconfig b/configs/am43xx_evm_defconfig
index 1f68af6b4a0..5a1af0b2090 100644
--- a/configs/am43xx_evm_defconfig
+++ b/configs/am43xx_evm_defconfig
@@ -4,7 +4,6 @@ CONFIG_SYS_MALLOC_F_LEN=0x2000
CONFIG_TARGET_AM43XX_EVM=y
CONFIG_SPL_STACK_R_ADDR=0x82000000
CONFIG_DEFAULT_DEVICE_TREE="am437x-gp-evm"
-CONFIG_FIT=y
CONFIG_SPL_LOAD_FIT=y
CONFIG_SYS_EXTRA_OPTIONS="CONS_INDEX=1,NAND"
CONFIG_SYS_CONSOLE_INFO_QUIET=y
diff --git a/configs/am43xx_evm_usbhost_boot_defconfig b/configs/am43xx_evm_usbhost_boot_defconfig
index 592398384a4..a9383504e69 100644
--- a/configs/am43xx_evm_usbhost_boot_defconfig
+++ b/configs/am43xx_evm_usbhost_boot_defconfig
@@ -5,7 +5,6 @@ CONFIG_TARGET_AM43XX_EVM=y
CONFIG_ISW_ENTRY_ADDR=0x40300350
CONFIG_SPL_STACK_R_ADDR=0x82000000
CONFIG_DEFAULT_DEVICE_TREE="am437x-gp-evm"
-CONFIG_FIT=y
CONFIG_SPL_LOAD_FIT=y
CONFIG_SYS_EXTRA_OPTIONS="SERIAL1,CONS_INDEX=1,NAND"
CONFIG_SYS_CONSOLE_INFO_QUIET=y
diff --git a/configs/am43xx_hs_evm_defconfig b/configs/am43xx_hs_evm_defconfig
index 795dfd717be..36b76b2b876 100644
--- a/configs/am43xx_hs_evm_defconfig
+++ b/configs/am43xx_hs_evm_defconfig
@@ -6,7 +6,6 @@ CONFIG_TARGET_AM43XX_EVM=y
CONFIG_ISW_ENTRY_ADDR=0x403018e0
CONFIG_SPL_STACK_R_ADDR=0x82000000
CONFIG_DEFAULT_DEVICE_TREE="am437x-gp-evm"
-CONFIG_FIT=y
CONFIG_FIT_IMAGE_POST_PROCESS=y
CONFIG_SPL_LOAD_FIT=y
CONFIG_SPL_FIT_IMAGE_POST_PROCESS=y
diff --git a/configs/am57xx_evm_defconfig b/configs/am57xx_evm_defconfig
index 97bd08ed88f..00569c1a625 100644
--- a/configs/am57xx_evm_defconfig
+++ b/configs/am57xx_evm_defconfig
@@ -8,7 +8,6 @@ CONFIG_SPL_SPI_SUPPORT=y
CONFIG_ARMV7_LPAE=y
CONFIG_SPL_STACK_R_ADDR=0x82000000
CONFIG_DEFAULT_DEVICE_TREE="am572x-idk"
-CONFIG_FIT=y
CONFIG_SPL_LOAD_FIT=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_SYS_CONSOLE_INFO_QUIET=y
diff --git a/configs/am57xx_hs_evm_defconfig b/configs/am57xx_hs_evm_defconfig
index 99907f55258..f7efa2b6425 100644
--- a/configs/am57xx_hs_evm_defconfig
+++ b/configs/am57xx_hs_evm_defconfig
@@ -12,7 +12,6 @@ CONFIG_SPL_SPI_SUPPORT=y
CONFIG_ARMV7_LPAE=y
CONFIG_SPL_STACK_R_ADDR=0x82000000
CONFIG_DEFAULT_DEVICE_TREE="am57xx-beagle-x15"
-CONFIG_FIT=y
CONFIG_FIT_IMAGE_POST_PROCESS=y
CONFIG_SPL_LOAD_FIT=y
CONFIG_SPL_FIT_IMAGE_POST_PROCESS=y
diff --git a/configs/birdland_bav335a_defconfig b/configs/birdland_bav335a_defconfig
index 8c2479e10ee..1770d0a0c94 100644
--- a/configs/birdland_bav335a_defconfig
+++ b/configs/birdland_bav335a_defconfig
@@ -11,7 +11,6 @@ CONFIG_SPL_WATCHDOG_SUPPORT=y
CONFIG_SPL_FAT_SUPPORT=y
CONFIG_SPL_POWER_SUPPORT=y
CONFIG_BAV_VERSION=1
-CONFIG_FIT=y
CONFIG_SYS_EXTRA_OPTIONS="SERIAL1,CONS_INDEX=1"
CONFIG_SYS_CONSOLE_INFO_QUIET=y
CONFIG_VERSION_VARIABLE=y
diff --git a/configs/birdland_bav335b_defconfig b/configs/birdland_bav335b_defconfig
index 64fe1be81ff..3bcecda2646 100644
--- a/configs/birdland_bav335b_defconfig
+++ b/configs/birdland_bav335b_defconfig
@@ -11,7 +11,6 @@ CONFIG_SPL_WATCHDOG_SUPPORT=y
CONFIG_SPL_FAT_SUPPORT=y
CONFIG_SPL_POWER_SUPPORT=y
CONFIG_BAV_VERSION=2
-CONFIG_FIT=y
CONFIG_SYS_EXTRA_OPTIONS="SERIAL1,CONS_INDEX=1"
CONFIG_SYS_CONSOLE_INFO_QUIET=y
CONFIG_VERSION_VARIABLE=y
diff --git a/configs/chiliboard_defconfig b/configs/chiliboard_defconfig
index bf9d2ffc9b8..dae62d35c29 100644
--- a/configs/chiliboard_defconfig
+++ b/configs/chiliboard_defconfig
@@ -11,7 +11,6 @@ CONFIG_SPL_WATCHDOG_SUPPORT=y
CONFIG_SPL_FAT_SUPPORT=y
CONFIG_SPL_POWER_SUPPORT=y
CONFIG_SPL_STACK_R_ADDR=0x82000000
-CONFIG_FIT=y
CONFIG_BOOTDELAY=1
CONFIG_SYS_CONSOLE_INFO_QUIET=y
CONFIG_SPL=y
diff --git a/configs/dra7xx_evm_defconfig b/configs/dra7xx_evm_defconfig
index 42f87b34db5..4582cf0fc66 100644
--- a/configs/dra7xx_evm_defconfig
+++ b/configs/dra7xx_evm_defconfig
@@ -8,7 +8,6 @@ CONFIG_SPL_SPI_SUPPORT=y
CONFIG_ARMV7_LPAE=y
CONFIG_SPL_STACK_R_ADDR=0x82000000
CONFIG_DEFAULT_DEVICE_TREE="dra7-evm"
-CONFIG_FIT=y
CONFIG_SPL_LOAD_FIT=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_SYS_CONSOLE_INFO_QUIET=y
diff --git a/configs/dra7xx_hs_evm_defconfig b/configs/dra7xx_hs_evm_defconfig
index 871604f80cd..7a739359b22 100644
--- a/configs/dra7xx_hs_evm_defconfig
+++ b/configs/dra7xx_hs_evm_defconfig
@@ -12,7 +12,6 @@ CONFIG_SPL_SPI_SUPPORT=y
CONFIG_ARMV7_LPAE=y
CONFIG_SPL_STACK_R_ADDR=0x82000000
CONFIG_DEFAULT_DEVICE_TREE="dra7-evm"
-CONFIG_FIT=y
CONFIG_FIT_IMAGE_POST_PROCESS=y
CONFIG_SPL_LOAD_FIT=y
CONFIG_SPL_FIT_IMAGE_POST_PROCESS=y
diff --git a/configs/eco5pk_defconfig b/configs/eco5pk_defconfig
index ac37764cd2c..59b4d81eb49 100644
--- a/configs/eco5pk_defconfig
+++ b/configs/eco5pk_defconfig
@@ -2,7 +2,6 @@ CONFIG_ARM=y
# CONFIG_SYS_THUMB_BUILD is not set
CONFIG_OMAP34XX=y
CONFIG_TARGET_ECO5PK=y
-CONFIG_FIT=y
CONFIG_BOOTDELAY=10
CONFIG_SPL=y
# CONFIG_SPL_EXT_SUPPORT is not set
diff --git a/configs/k2e_hs_evm_defconfig b/configs/k2e_hs_evm_defconfig
index 11909658126..36e141a8fe2 100644
--- a/configs/k2e_hs_evm_defconfig
+++ b/configs/k2e_hs_evm_defconfig
@@ -4,7 +4,6 @@ CONFIG_SYS_TEXT_BASE=0x0c000060
CONFIG_TARGET_K2E_EVM=y
CONFIG_TI_SECURE_DEVICE=y
CONFIG_DEFAULT_DEVICE_TREE="keystone-k2e-evm"
-CONFIG_FIT=y
CONFIG_FIT_IMAGE_POST_PROCESS=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_SYS_CONSOLE_INFO_QUIET=y
diff --git a/configs/k2g_hs_evm_defconfig b/configs/k2g_hs_evm_defconfig
index 9c218674082..462b807fa29 100644
--- a/configs/k2g_hs_evm_defconfig
+++ b/configs/k2g_hs_evm_defconfig
@@ -4,7 +4,6 @@ CONFIG_TARGET_K2G_EVM=y
CONFIG_TI_SECURE_DEVICE=y
CONFIG_SYS_TEXT_BASE=0x0c000060
CONFIG_DEFAULT_DEVICE_TREE="keystone-k2g-evm"
-CONFIG_FIT=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_FIT_IMAGE_POST_PROCESS=y
CONFIG_SYS_CONSOLE_INFO_QUIET=y
diff --git a/configs/k2hk_hs_evm_defconfig b/configs/k2hk_hs_evm_defconfig
index ea0a80f2577..5a0e6749271 100644
--- a/configs/k2hk_hs_evm_defconfig
+++ b/configs/k2hk_hs_evm_defconfig
@@ -4,7 +4,6 @@ CONFIG_SYS_TEXT_BASE=0x0c000060
CONFIG_TARGET_K2HK_EVM=y
CONFIG_TI_SECURE_DEVICE=y
CONFIG_DEFAULT_DEVICE_TREE="keystone-k2hk-evm"
-CONFIG_FIT=y
CONFIG_FIT_IMAGE_POST_PROCESS=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_SYS_CONSOLE_INFO_QUIET=y
diff --git a/configs/mcx_defconfig b/configs/mcx_defconfig
index fa619dea05d..fc88594e762 100644
--- a/configs/mcx_defconfig
+++ b/configs/mcx_defconfig
@@ -4,7 +4,6 @@ CONFIG_OMAP34XX=y
# CONFIG_SPL_GPIO_SUPPORT is not set
CONFIG_TARGET_MCX=y
CONFIG_VIDEO=y
-CONFIG_FIT=y
CONFIG_BOOTDELAY=3
# CONFIG_CONSOLE_MUX is not set
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
diff --git a/configs/mt_ventoux_defconfig b/configs/mt_ventoux_defconfig
index c6aad14557e..87954d0b485 100644
--- a/configs/mt_ventoux_defconfig
+++ b/configs/mt_ventoux_defconfig
@@ -3,7 +3,6 @@ CONFIG_ARM=y
CONFIG_OMAP34XX=y
CONFIG_TARGET_MT_VENTOUX=y
CONFIG_VIDEO=y
-CONFIG_FIT=y
CONFIG_BOOTDELAY=10
# CONFIG_CONSOLE_MUX is not set
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
diff --git a/configs/pxm2_defconfig b/configs/pxm2_defconfig
index b1d079d2c8c..ff09921ac25 100644
--- a/configs/pxm2_defconfig
+++ b/configs/pxm2_defconfig
@@ -14,7 +14,6 @@ CONFIG_SPL_WATCHDOG_SUPPORT=y
CONFIG_SPL_FAT_SUPPORT=y
CONFIG_VIDEO=y
CONFIG_DEFAULT_DEVICE_TREE="am335x-pxm50"
-CONFIG_FIT=y
CONFIG_BOOTDELAY=3
# CONFIG_CONSOLE_MUX is not set
CONFIG_SYS_CONSOLE_INFO_QUIET=y
diff --git a/configs/rut_defconfig b/configs/rut_defconfig
index 9a690dc29d9..b37c7f46501 100644
--- a/configs/rut_defconfig
+++ b/configs/rut_defconfig
@@ -14,7 +14,6 @@ CONFIG_SPL_WATCHDOG_SUPPORT=y
CONFIG_SPL_FAT_SUPPORT=y
CONFIG_VIDEO=y
CONFIG_DEFAULT_DEVICE_TREE="am335x-rut"
-CONFIG_FIT=y
CONFIG_BOOTDELAY=3
# CONFIG_CONSOLE_MUX is not set
CONFIG_SYS_CONSOLE_INFO_QUIET=y
diff --git a/configs/twister_defconfig b/configs/twister_defconfig
index 9928d0e68da..648fe55d747 100644
--- a/configs/twister_defconfig
+++ b/configs/twister_defconfig
@@ -2,7 +2,6 @@ CONFIG_ARM=y
# CONFIG_SYS_THUMB_BUILD is not set
CONFIG_OMAP34XX=y
CONFIG_TARGET_TWISTER=y
-CONFIG_FIT=y
CONFIG_BOOTDELAY=10
CONFIG_SPL=y
# CONFIG_SPL_EXT_SUPPORT is not set
--
GitLab
From efbe99ceb629fae4ecb7c0b2cd7d28164f585686 Mon Sep 17 00:00:00 2001
From: Josua Mayer <josua.mayer97@gmail.com>
Date: Mon, 24 Apr 2017 10:10:45 +0200
Subject: [PATCH 150/282] add Kconfig for fsuuid command
CONFIG_CMD_FS_UUID was neither whitelisted, nor was it declared in
Kconfig.
Now it can be enabled in .config and defconfig as expected.
Signed-off-by: Josua Mayer <josua.mayer97@gmail.com>
---
cmd/Kconfig | 5 +++++
1 file changed, 5 insertions(+)
diff --git a/cmd/Kconfig b/cmd/Kconfig
index 13dc46a174b..50888236db6 100644
--- a/cmd/Kconfig
+++ b/cmd/Kconfig
@@ -831,6 +831,11 @@ config CMD_FS_GENERIC
Enables filesystem commands (e.g. load, ls) that work for multiple
fs types.
+config CMD_FS_UUID
+ bool "fsuuid command"
+ help
+ Enables fsuuid command for filesystem UUID.
+
config CMD_MTDPARTS
depends on ARCH_SUNXI
bool "MTD partition support"
--
GitLab
From a93fbf4a78924741a1fc157fd182de79ea15f327 Mon Sep 17 00:00:00 2001
From: Masahiro Yamada <yamada.masahiro@socionext.com>
Date: Tue, 25 Apr 2017 13:10:11 +0900
Subject: [PATCH 151/282] ARM: omap2+: rename config to ARCH_OMAP2PLUS and
consolidate Kconfig
In Linux, CONFIG_ARCH_OMAP2PLUS is used for OMAP2 or later SoCs.
Rename CONFIG_ARCH_OMAP2 to CONFIG_ARCH_OMAP2PLUS to follow this
naming.
Move the OMAP2+ board/SoC choice down to mach-omap2/Kconfig to slim
down the arch/arm/Kconfig level.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
---
arch/arm/Kconfig | 179 +--------------------
arch/arm/Makefile | 2 +-
arch/arm/config.mk | 2 +-
arch/arm/include/asm/global_data.h | 2 +-
arch/arm/include/asm/ti-common/sys_proto.h | 2 +-
arch/arm/mach-omap2/Kconfig | 163 +++++++++++++++++++
configs/am335x_baltos_defconfig | 3 +-
configs/am335x_boneblack_defconfig | 1 +
configs/am335x_boneblack_vboot_defconfig | 1 +
configs/am335x_evm_defconfig | 1 +
configs/am335x_evm_nor_defconfig | 3 +-
configs/am335x_evm_norboot_defconfig | 1 +
configs/am335x_evm_spiboot_defconfig | 1 +
configs/am335x_evm_usbspl_defconfig | 1 +
configs/am335x_hs_evm_defconfig | 1 +
configs/am335x_igep0033_defconfig | 3 +-
configs/am335x_shc_defconfig | 3 +-
configs/am335x_shc_ict_defconfig | 3 +-
configs/am335x_shc_netboot_defconfig | 3 +-
configs/am335x_shc_prompt_defconfig | 3 +-
configs/am335x_shc_sdboot_defconfig | 3 +-
configs/am335x_shc_sdboot_prompt_defconfig | 3 +-
configs/am335x_sl50_defconfig | 3 +-
configs/am3517_crane_defconfig | 3 +-
configs/am3517_evm_defconfig | 3 +-
configs/am43xx_evm_defconfig | 8 +-
configs/am43xx_evm_ethboot_defconfig | 1 +
configs/am43xx_evm_qspiboot_defconfig | 1 +
configs/am43xx_evm_usbhost_boot_defconfig | 3 +-
configs/am43xx_hs_evm_defconfig | 7 +-
configs/am57xx_evm_defconfig | 3 +-
configs/am57xx_evm_nodt_defconfig | 1 +
configs/am57xx_hs_evm_defconfig | 3 +-
configs/birdland_bav335a_defconfig | 3 +-
configs/birdland_bav335b_defconfig | 3 +-
configs/brppt1_mmc_defconfig | 3 +-
configs/brppt1_nand_defconfig | 3 +-
configs/brppt1_spi_defconfig | 3 +-
configs/brxre1_defconfig | 2 +-
configs/cairo_defconfig | 1 +
configs/chiliboard_defconfig | 3 +-
configs/cl-som-am57x_defconfig | 1 +
configs/cm_t335_defconfig | 3 +-
configs/cm_t3517_defconfig | 1 +
configs/cm_t35_defconfig | 1 +
configs/cm_t43_defconfig | 3 +-
configs/cm_t54_defconfig | 1 +
configs/devkit8000_defconfig | 1 +
configs/dra7xx_evm_defconfig | 5 +-
configs/dra7xx_hs_evm_defconfig | 3 +-
configs/draco_defconfig | 3 +-
configs/duovero_defconfig | 1 +
configs/eco5pk_defconfig | 1 +
configs/etamin_defconfig | 3 +-
configs/igep0020_defconfig | 1 +
configs/igep0030_defconfig | 1 +
configs/igep0032_defconfig | 1 +
configs/kc1_defconfig | 1 +
configs/mcx_defconfig | 3 +-
configs/mt_ventoux_defconfig | 1 +
configs/nokia_rx51_defconfig | 1 +
configs/omap3_beagle_defconfig | 1 +
configs/omap3_evm_defconfig | 1 +
configs/omap3_ha_defconfig | 1 +
configs/omap3_logic_defconfig | 3 +-
configs/omap3_overo_defconfig | 5 +-
configs/omap3_pandora_defconfig | 1 +
configs/omap3_zoom1_defconfig | 1 +
configs/omap4_panda_defconfig | 1 +
configs/omap4_sdp4430_defconfig | 1 +
configs/omap5_uevm_defconfig | 1 +
configs/pcm051_rev1_defconfig | 3 +-
configs/pcm051_rev3_defconfig | 3 +-
configs/pengwyn_defconfig | 3 +-
configs/pepper_defconfig | 3 +-
configs/pxm2_defconfig | 3 +-
configs/rastaban_defconfig | 3 +-
configs/rut_defconfig | 3 +-
configs/sniper_defconfig | 1 +
configs/tao3530_defconfig | 1 +
configs/thuban_defconfig | 3 +-
configs/ti814x_evm_defconfig | 3 +-
configs/ti816x_evm_defconfig | 3 +-
configs/tricorder_defconfig | 1 +
configs/tricorder_flash_defconfig | 1 +
configs/twister_defconfig | 1 +
include/linux/usb/musb.h | 2 +-
87 files changed, 298 insertions(+), 232 deletions(-)
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index c71849e9ed1..1df6b363ac2 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -263,12 +263,6 @@ config SPL_USE_ARCH_MEMSET
Such implementation may be faster under some conditions
but may increase the binary size.
-config ARCH_OMAP2
- bool
- select CPU_V7
- select SUPPORT_SPL
- imply FIT
-
config ARM64_SUPPORT_AARCH32
bool "ARM64 system support AArch32 execution state"
default y if ARM64 && !TARGET_THUNDERX_88XX
@@ -491,72 +485,6 @@ config TARGET_VEXPRESS_CA9X4
bool "Support vexpress_ca9x4"
select CPU_V7
-config TARGET_BRXRE1
- bool "Support BRXRE1"
- select ARCH_OMAP2
- select BOARD_LATE_INIT
-
-config TARGET_BRPPT1
- bool "Support BRPPT1"
- select ARCH_OMAP2
- select BOARD_LATE_INIT
-
-config TARGET_DRACO
- bool "Support draco"
- select ARCH_OMAP2
- select BOARD_LATE_INIT
- select DM
- select DM_SERIAL
- select DM_GPIO
-
-config TARGET_THUBAN
- bool "Support thuban"
- select ARCH_OMAP2
- select BOARD_LATE_INIT
- select DM
- select DM_SERIAL
- select DM_GPIO
-
-config TARGET_RASTABAN
- bool "Support rastaban"
- select ARCH_OMAP2
- select BOARD_LATE_INIT
- select DM
- select DM_SERIAL
- select DM_GPIO
-
-config TARGET_ETAMIN
- bool "Support etamin"
- select ARCH_OMAP2
- select BOARD_LATE_INIT
- select DM
- select DM_SERIAL
- select DM_GPIO
-
-config TARGET_PXM2
- bool "Support pxm2"
- select ARCH_OMAP2
- select BOARD_LATE_INIT
- select DM
- select DM_SERIAL
- select DM_GPIO
-
-config TARGET_RUT
- bool "Support rut"
- select ARCH_OMAP2
- select BOARD_LATE_INIT
- select DM
- select DM_SERIAL
- select DM_GPIO
-
-config TARGET_TI814X_EVM
- bool "Support ti814x_evm"
- select ARCH_OMAP2
-
-config TARGET_TI816X_EVM
- bool "Support ti816x_evm"
- select ARCH_OMAP2
-
config TARGET_BCM23550_W1D
bool "Support bcm23550_w1d"
select CPU_V7
@@ -616,6 +544,12 @@ config ARCH_KEYSTONE
select CMD_POWEROFF
imply FIT
+config ARCH_OMAP2PLUS
+ bool "TI OMAP2+"
+ select CPU_V7
+ select SUPPORT_SPL
+ imply FIT
+
config ARCH_MESON
bool "Amlogic Meson"
help
@@ -684,92 +618,6 @@ config TARGET_MX53SMD
select CPU_V7
select BOARD_EARLY_INIT_F
-config OMAP34XX
- bool "OMAP34XX SoC"
- select ARCH_OMAP2
- select ARM_ERRATA_430973
- select ARM_ERRATA_454179
- select ARM_ERRATA_621766
- select ARM_ERRATA_725233
- select USE_TINY_PRINTF
- imply SPL_EXT_SUPPORT
- imply SPL_FAT_SUPPORT
- imply SPL_GPIO_SUPPORT
- imply SPL_I2C_SUPPORT
- imply SPL_LIBCOMMON_SUPPORT
- imply SPL_LIBDISK_SUPPORT
- imply SPL_LIBGENERIC_SUPPORT
- imply SPL_MMC_SUPPORT
- imply SPL_NAND_SUPPORT
- imply SPL_POWER_SUPPORT
- imply SPL_SERIAL_SUPPORT
- imply SYS_THUMB_BUILD
-
-config OMAP44XX
- bool "OMAP44XX SoC"
- select ARCH_OMAP2
- select USE_TINY_PRINTF
- imply SPL_DISPLAY_PRINT
- imply SPL_EXT_SUPPORT
- imply SPL_FAT_SUPPORT
- imply SPL_GPIO_SUPPORT
- imply SPL_I2C_SUPPORT
- imply SPL_LIBCOMMON_SUPPORT
- imply SPL_LIBDISK_SUPPORT
- imply SPL_LIBGENERIC_SUPPORT
- imply SPL_MMC_SUPPORT
- imply SPL_NAND_SUPPORT
- imply SPL_POWER_SUPPORT
- imply SPL_SERIAL_SUPPORT
- imply SYS_THUMB_BUILD
-
-config OMAP54XX
- bool "OMAP54XX SoC"
- select ARCH_OMAP2
- select ARM_ERRATA_798870
- select SYS_THUMB_BUILD
- imply SPL_DISPLAY_PRINT
- imply SPL_ENV_SUPPORT
- imply SPL_EXT_SUPPORT
- imply SPL_FAT_SUPPORT
- imply SPL_GPIO_SUPPORT
- imply SPL_I2C_SUPPORT
- imply SPL_LIBCOMMON_SUPPORT
- imply SPL_LIBDISK_SUPPORT
- imply SPL_LIBGENERIC_SUPPORT
- imply SPL_MMC_SUPPORT
- imply SPL_NAND_SUPPORT
- imply SPL_POWER_SUPPORT
- imply SPL_SERIAL_SUPPORT
-
-config AM43XX
- bool "AM43XX SoC"
- select ARCH_OMAP2
- imply SPL_DM
- imply SPL_DM_SEQ_ALIAS
- imply SPL_OF_CONTROL
- imply SPL_OF_TRANSLATE
- imply SPL_SEPARATE_BSS
- imply SPL_SYS_MALLOC_SIMPLE
- imply SYS_THUMB_BUILD
- help
- Support for AM43xx SOC from Texas Instruments.
- The AM43xx high performance SOC features a Cortex-A9
- ARM core, a quad core PRU-ICSS for industrial Ethernet
- protocols, dual camera support, optional 3D graphics
- and an optional customer programmable secure boot.
-
-config AM33XX
- bool "AM33XX SoC"
- select ARCH_OMAP2
- imply SYS_THUMB_BUILD
- help
- Support for AM335x SOC from Texas Instruments.
- The AM335x high performance SOC features a Cortex-A8
- ARM core, a dual core PRU-ICSS for industrial Ethernet
- protocols, optional 3D graphics and an optional customer
- programmable secure boot.
-
config ARCH_RMOBILE
bool "Renesas ARM SoCs"
select DM
@@ -807,10 +655,6 @@ config ARCH_SOCFPGA
select SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION
select SYS_THUMB_BUILD
-config TARGET_CM_T43
- bool "Support cm_t43"
- select ARCH_OMAP2
-
config ARCH_SUNXI
bool "Support sunxi (Allwinner) SoCs"
select CMD_GPIO
@@ -1256,8 +1100,6 @@ source "arch/arm/imx-common/Kconfig"
source "board/aries/m28evk/Kconfig"
source "board/aries/m53evk/Kconfig"
source "board/bosch/shc/Kconfig"
-source "board/BuR/brxre1/Kconfig"
-source "board/BuR/brppt1/Kconfig"
source "board/CarMediaLab/flea3/Kconfig"
source "board/Marvell/aspenite/Kconfig"
source "board/Marvell/gplugd/Kconfig"
@@ -1272,8 +1114,6 @@ source "board/broadcom/bcmnsp/Kconfig"
source "board/broadcom/bcmns2/Kconfig"
source "board/cavium/thunderx/Kconfig"
source "board/cirrus/edb93xx/Kconfig"
-source "board/compulab/cm_t335/Kconfig"
-source "board/compulab/cm_t43/Kconfig"
source "board/creative/xfi3/Kconfig"
source "board/freescale/ls2080a/Kconfig"
source "board/freescale/ls2080aqds/Kconfig"
@@ -1312,9 +1152,6 @@ source "board/phytec/pcm051/Kconfig"
source "board/ppcag/bg0900/Kconfig"
source "board/sandisk/sansa_fuze_plus/Kconfig"
source "board/schulercontrol/sc_sps_1/Kconfig"
-source "board/siemens/draco/Kconfig"
-source "board/siemens/pxm2/Kconfig"
-source "board/siemens/rut/Kconfig"
source "board/silica/pengwyn/Kconfig"
source "board/spear/spear300/Kconfig"
source "board/spear/spear310/Kconfig"
@@ -1325,11 +1162,7 @@ source "board/st/stv0991/Kconfig"
source "board/sunxi/Kconfig"
source "board/syteco/zmx25/Kconfig"
source "board/tcl/sl50/Kconfig"
-source "board/ti/am335x/Kconfig"
-source "board/ti/am43xx/Kconfig"
source "board/birdland/bav335x/Kconfig"
-source "board/ti/ti814x/Kconfig"
-source "board/ti/ti816x/Kconfig"
source "board/timll/devkit3250/Kconfig"
source "board/toradex/colibri_pxa270/Kconfig"
source "board/technologic/ts4600/Kconfig"
diff --git a/arch/arm/Makefile b/arch/arm/Makefile
index 040556c04a6..3e93fd6e6ad 100644
--- a/arch/arm/Makefile
+++ b/arch/arm/Makefile
@@ -64,7 +64,7 @@ machine-$(CONFIG_ARCH_MVEBU) += mvebu
# TODO: rename CONFIG_TEGRA -> CONFIG_ARCH_TEGRA
# TODO: rename CONFIG_ORION5X -> CONFIG_ARCH_ORION5X
machine-$(CONFIG_ORION5X) += orion5x
-machine-$(CONFIG_ARCH_OMAP2) += omap2
+machine-$(CONFIG_ARCH_OMAP2PLUS) += omap2
machine-$(CONFIG_ARCH_S5PC1XX) += s5pc1xx
machine-$(CONFIG_ARCH_SUNXI) += sunxi
machine-$(CONFIG_ARCH_SNAPDRAGON) += snapdragon
diff --git a/arch/arm/config.mk b/arch/arm/config.mk
index eb09b0e3787..2143633fe44 100644
--- a/arch/arm/config.mk
+++ b/arch/arm/config.mk
@@ -6,7 +6,7 @@
#
ifndef CONFIG_STANDALONE_LOAD_ADDR
-ifneq ($(CONFIG_ARCH_OMAP2),)
+ifneq ($(CONFIG_ARCH_OMAP2PLUS),)
CONFIG_STANDALONE_LOAD_ADDR = 0x80300000
else
CONFIG_STANDALONE_LOAD_ADDR = 0xc100000
diff --git a/arch/arm/include/asm/global_data.h b/arch/arm/include/asm/global_data.h
index dfcbcceba3b..1aab6295d60 100644
--- a/arch/arm/include/asm/global_data.h
+++ b/arch/arm/include/asm/global_data.h
@@ -67,7 +67,7 @@ struct arch_global_data {
phys_addr_t resv_ram;
#endif
-#ifdef CONFIG_ARCH_OMAP2
+#ifdef CONFIG_ARCH_OMAP2PLUS
u32 omap_boot_device;
u32 omap_boot_mode;
u8 omap_ch_flags;
diff --git a/arch/arm/include/asm/ti-common/sys_proto.h b/arch/arm/include/asm/ti-common/sys_proto.h
index 60d1160459b..a0475010673 100644
--- a/arch/arm/include/asm/ti-common/sys_proto.h
+++ b/arch/arm/include/asm/ti-common/sys_proto.h
@@ -9,7 +9,7 @@
DECLARE_GLOBAL_DATA_PTR;
-#ifdef CONFIG_ARCH_OMAP2
+#ifdef CONFIG_ARCH_OMAP2PLUS
#define TI_ARMV7_DRAM_ADDR_SPACE_START 0x80000000
#define TI_ARMV7_DRAM_ADDR_SPACE_END 0xFFFFFFFF
diff --git a/arch/arm/mach-omap2/Kconfig b/arch/arm/mach-omap2/Kconfig
index d74b068abc1..93fb3208a13 100644
--- a/arch/arm/mach-omap2/Kconfig
+++ b/arch/arm/mach-omap2/Kconfig
@@ -1,3 +1,152 @@
+if ARCH_OMAP2PLUS
+
+choice
+ prompt "OMAP2+ platform select"
+ default TARGET_BRXRE1
+
+config TARGET_BRXRE1
+ bool "Support BRXRE1"
+ select BOARD_LATE_INIT
+
+config TARGET_BRPPT1
+ bool "Support BRPPT1"
+ select BOARD_LATE_INIT
+
+config TARGET_DRACO
+ bool "Support draco"
+ select BOARD_LATE_INIT
+ select DM
+ select DM_SERIAL
+ select DM_GPIO
+
+config TARGET_THUBAN
+ bool "Support thuban"
+ select BOARD_LATE_INIT
+ select DM
+ select DM_SERIAL
+ select DM_GPIO
+
+config TARGET_RASTABAN
+ bool "Support rastaban"
+ select BOARD_LATE_INIT
+ select DM
+ select DM_SERIAL
+ select DM_GPIO
+
+config TARGET_ETAMIN
+ bool "Support etamin"
+ select BOARD_LATE_INIT
+ select DM
+ select DM_SERIAL
+ select DM_GPIO
+
+config TARGET_PXM2
+ bool "Support pxm2"
+ select BOARD_LATE_INIT
+ select DM
+ select DM_SERIAL
+ select DM_GPIO
+
+config TARGET_RUT
+ bool "Support rut"
+ select BOARD_LATE_INIT
+ select DM
+ select DM_SERIAL
+ select DM_GPIO
+
+config TARGET_TI814X_EVM
+ bool "Support ti814x_evm"
+
+config TARGET_TI816X_EVM
+ bool "Support ti816x_evm"
+
+config OMAP34XX
+ bool "OMAP34XX SoC"
+ select ARM_ERRATA_430973
+ select ARM_ERRATA_454179
+ select ARM_ERRATA_621766
+ select ARM_ERRATA_725233
+ select USE_TINY_PRINTF
+ imply SPL_EXT_SUPPORT
+ imply SPL_FAT_SUPPORT
+ imply SPL_GPIO_SUPPORT
+ imply SPL_I2C_SUPPORT
+ imply SPL_LIBCOMMON_SUPPORT
+ imply SPL_LIBDISK_SUPPORT
+ imply SPL_LIBGENERIC_SUPPORT
+ imply SPL_MMC_SUPPORT
+ imply SPL_NAND_SUPPORT
+ imply SPL_POWER_SUPPORT
+ imply SPL_SERIAL_SUPPORT
+ imply SYS_THUMB_BUILD
+
+config OMAP44XX
+ bool "OMAP44XX SoC"
+ select USE_TINY_PRINTF
+ imply SPL_DISPLAY_PRINT
+ imply SPL_EXT_SUPPORT
+ imply SPL_FAT_SUPPORT
+ imply SPL_GPIO_SUPPORT
+ imply SPL_I2C_SUPPORT
+ imply SPL_LIBCOMMON_SUPPORT
+ imply SPL_LIBDISK_SUPPORT
+ imply SPL_LIBGENERIC_SUPPORT
+ imply SPL_MMC_SUPPORT
+ imply SPL_NAND_SUPPORT
+ imply SPL_POWER_SUPPORT
+ imply SPL_SERIAL_SUPPORT
+ imply SYS_THUMB_BUILD
+
+config OMAP54XX
+ bool "OMAP54XX SoC"
+ select ARM_ERRATA_798870
+ select SYS_THUMB_BUILD
+ imply SPL_DISPLAY_PRINT
+ imply SPL_ENV_SUPPORT
+ imply SPL_EXT_SUPPORT
+ imply SPL_FAT_SUPPORT
+ imply SPL_GPIO_SUPPORT
+ imply SPL_I2C_SUPPORT
+ imply SPL_LIBCOMMON_SUPPORT
+ imply SPL_LIBDISK_SUPPORT
+ imply SPL_LIBGENERIC_SUPPORT
+ imply SPL_MMC_SUPPORT
+ imply SPL_NAND_SUPPORT
+ imply SPL_POWER_SUPPORT
+ imply SPL_SERIAL_SUPPORT
+
+config AM43XX
+ bool "AM43XX SoC"
+ imply SPL_DM
+ imply SPL_DM_SEQ_ALIAS
+ imply SPL_OF_CONTROL
+ imply SPL_OF_TRANSLATE
+ imply SPL_SEPARATE_BSS
+ imply SPL_SYS_MALLOC_SIMPLE
+ imply SYS_THUMB_BUILD
+ help
+ Support for AM43xx SOC from Texas Instruments.
+ The AM43xx high performance SOC features a Cortex-A9
+ ARM core, a quad core PRU-ICSS for industrial Ethernet
+ protocols, dual camera support, optional 3D graphics
+ and an optional customer programmable secure boot.
+
+config AM33XX
+ bool "AM33XX SoC"
+ imply SYS_THUMB_BUILD
+ help
+ Support for AM335x SOC from Texas Instruments.
+ The AM335x high performance SOC features a Cortex-A8
+ ARM core, a dual core PRU-ICSS for industrial Ethernet
+ protocols, optional 3D graphics and an optional customer
+ programmable secure boot.
+
+config TARGET_CM_T43
+ bool "Support cm_t43"
+
+endchoice
+
+
config TI_SECURE_DEVICE
bool "HS Device Type Support"
depends on OMAP54XX || AM43XX || AM33XX || ARCH_KEYSTONE
@@ -15,3 +164,17 @@ source "arch/arm/mach-omap2/omap4/Kconfig"
source "arch/arm/mach-omap2/omap5/Kconfig"
source "arch/arm/mach-omap2/am33xx/Kconfig"
+
+source "board/BuR/brxre1/Kconfig"
+source "board/BuR/brppt1/Kconfig"
+source "board/siemens/draco/Kconfig"
+source "board/siemens/pxm2/Kconfig"
+source "board/siemens/rut/Kconfig"
+source "board/ti/ti814x/Kconfig"
+source "board/ti/ti816x/Kconfig"
+source "board/ti/am43xx/Kconfig"
+source "board/ti/am335x/Kconfig"
+source "board/compulab/cm_t335/Kconfig"
+source "board/compulab/cm_t43/Kconfig"
+
+endif
diff --git a/configs/am335x_baltos_defconfig b/configs/am335x_baltos_defconfig
index 002fa799ce0..dfbb812d653 100644
--- a/configs/am335x_baltos_defconfig
+++ b/configs/am335x_baltos_defconfig
@@ -1,8 +1,9 @@
CONFIG_ARM=y
-CONFIG_AM33XX=y
+CONFIG_ARCH_OMAP2PLUS=y
CONFIG_SPL_GPIO_SUPPORT=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
+CONFIG_AM33XX=y
CONFIG_TARGET_AM335X_BALTOS=y
CONFIG_SPL_MMC_SUPPORT=y
CONFIG_SPL_SERIAL_SUPPORT=y
diff --git a/configs/am335x_boneblack_defconfig b/configs/am335x_boneblack_defconfig
index 17c9f7c8813..d3cb828e41e 100644
--- a/configs/am335x_boneblack_defconfig
+++ b/configs/am335x_boneblack_defconfig
@@ -1,4 +1,5 @@
CONFIG_ARM=y
+CONFIG_ARCH_OMAP2PLUS=y
CONFIG_AM33XX=y
CONFIG_TARGET_AM335X_EVM=y
# CONFIG_SPL_NAND_SUPPORT is not set
diff --git a/configs/am335x_boneblack_vboot_defconfig b/configs/am335x_boneblack_vboot_defconfig
index f14e1c24ea0..109e2a26369 100644
--- a/configs/am335x_boneblack_vboot_defconfig
+++ b/configs/am335x_boneblack_vboot_defconfig
@@ -1,4 +1,5 @@
CONFIG_ARM=y
+CONFIG_ARCH_OMAP2PLUS=y
CONFIG_AM33XX=y
CONFIG_TARGET_AM335X_EVM=y
# CONFIG_SPL_NAND_SUPPORT is not set
diff --git a/configs/am335x_evm_defconfig b/configs/am335x_evm_defconfig
index bf91165becc..0e5afba52f4 100644
--- a/configs/am335x_evm_defconfig
+++ b/configs/am335x_evm_defconfig
@@ -1,4 +1,5 @@
CONFIG_ARM=y
+CONFIG_ARCH_OMAP2PLUS=y
CONFIG_AM33XX=y
CONFIG_TARGET_AM335X_EVM=y
CONFIG_SPL_STACK_R_ADDR=0x82000000
diff --git a/configs/am335x_evm_nor_defconfig b/configs/am335x_evm_nor_defconfig
index a6ca7a362bd..000099eb1f6 100644
--- a/configs/am335x_evm_nor_defconfig
+++ b/configs/am335x_evm_nor_defconfig
@@ -1,8 +1,9 @@
CONFIG_ARM=y
+CONFIG_ARCH_OMAP2PLUS=y
CONFIG_AM33XX=y
CONFIG_TARGET_AM335X_EVM=y
-CONFIG_SPL_STACK_R_ADDR=0x82000000
CONFIG_NOR=y
+CONFIG_SPL_STACK_R_ADDR=0x82000000
CONFIG_DISTRO_DEFAULTS=y
CONFIG_SYS_EXTRA_OPTIONS="NAND"
CONFIG_SYS_CONSOLE_INFO_QUIET=y
diff --git a/configs/am335x_evm_norboot_defconfig b/configs/am335x_evm_norboot_defconfig
index 3a9506c5ce9..023cea461ca 100644
--- a/configs/am335x_evm_norboot_defconfig
+++ b/configs/am335x_evm_norboot_defconfig
@@ -1,5 +1,6 @@
CONFIG_ARM=y
# CONFIG_SYS_THUMB_BUILD is not set
+CONFIG_ARCH_OMAP2PLUS=y
CONFIG_AM33XX=y
CONFIG_TARGET_AM335X_EVM=y
CONFIG_NOR=y
diff --git a/configs/am335x_evm_spiboot_defconfig b/configs/am335x_evm_spiboot_defconfig
index ed2e3c0b9b3..c9373f91576 100644
--- a/configs/am335x_evm_spiboot_defconfig
+++ b/configs/am335x_evm_spiboot_defconfig
@@ -1,4 +1,5 @@
CONFIG_ARM=y
+CONFIG_ARCH_OMAP2PLUS=y
CONFIG_AM33XX=y
CONFIG_TARGET_AM335X_EVM=y
# CONFIG_SPL_NAND_SUPPORT is not set
diff --git a/configs/am335x_evm_usbspl_defconfig b/configs/am335x_evm_usbspl_defconfig
index 1cc9d7c9fef..04005f0e777 100644
--- a/configs/am335x_evm_usbspl_defconfig
+++ b/configs/am335x_evm_usbspl_defconfig
@@ -1,4 +1,5 @@
CONFIG_ARM=y
+CONFIG_ARCH_OMAP2PLUS=y
CONFIG_AM33XX=y
CONFIG_TARGET_AM335X_EVM=y
CONFIG_SPL_STACK_R_ADDR=0x82000000
diff --git a/configs/am335x_hs_evm_defconfig b/configs/am335x_hs_evm_defconfig
index 2b80b694c26..62e763dbf96 100644
--- a/configs/am335x_hs_evm_defconfig
+++ b/configs/am335x_hs_evm_defconfig
@@ -1,4 +1,5 @@
CONFIG_ARM=y
+CONFIG_ARCH_OMAP2PLUS=y
CONFIG_AM33XX=y
CONFIG_TI_SECURE_DEVICE=y
CONFIG_TARGET_AM335X_EVM=y
diff --git a/configs/am335x_igep0033_defconfig b/configs/am335x_igep0033_defconfig
index a1991de4ff2..27bd3f1884b 100644
--- a/configs/am335x_igep0033_defconfig
+++ b/configs/am335x_igep0033_defconfig
@@ -1,8 +1,9 @@
CONFIG_ARM=y
-CONFIG_AM33XX=y
+CONFIG_ARCH_OMAP2PLUS=y
CONFIG_SPL_GPIO_SUPPORT=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
+CONFIG_AM33XX=y
CONFIG_TARGET_AM335X_IGEP0033=y
CONFIG_SPL_MMC_SUPPORT=y
CONFIG_SPL_SERIAL_SUPPORT=y
diff --git a/configs/am335x_shc_defconfig b/configs/am335x_shc_defconfig
index a46e6d22aa1..1068678a7c7 100644
--- a/configs/am335x_shc_defconfig
+++ b/configs/am335x_shc_defconfig
@@ -1,8 +1,9 @@
CONFIG_ARM=y
-CONFIG_AM33XX=y
+CONFIG_ARCH_OMAP2PLUS=y
CONFIG_SPL_GPIO_SUPPORT=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
+CONFIG_AM33XX=y
CONFIG_TARGET_AM335X_SHC=y
CONFIG_SPL_MMC_SUPPORT=y
CONFIG_SPL_SERIAL_SUPPORT=y
diff --git a/configs/am335x_shc_ict_defconfig b/configs/am335x_shc_ict_defconfig
index fe172ccbf03..85b24a548a7 100644
--- a/configs/am335x_shc_ict_defconfig
+++ b/configs/am335x_shc_ict_defconfig
@@ -1,8 +1,9 @@
CONFIG_ARM=y
-CONFIG_AM33XX=y
+CONFIG_ARCH_OMAP2PLUS=y
CONFIG_SPL_GPIO_SUPPORT=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
+CONFIG_AM33XX=y
CONFIG_TARGET_AM335X_SHC=y
CONFIG_SPL_MMC_SUPPORT=y
CONFIG_SPL_SERIAL_SUPPORT=y
diff --git a/configs/am335x_shc_netboot_defconfig b/configs/am335x_shc_netboot_defconfig
index 04cc93c9a58..9117407065e 100644
--- a/configs/am335x_shc_netboot_defconfig
+++ b/configs/am335x_shc_netboot_defconfig
@@ -1,8 +1,9 @@
CONFIG_ARM=y
-CONFIG_AM33XX=y
+CONFIG_ARCH_OMAP2PLUS=y
CONFIG_SPL_GPIO_SUPPORT=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
+CONFIG_AM33XX=y
CONFIG_TARGET_AM335X_SHC=y
CONFIG_SPL_MMC_SUPPORT=y
CONFIG_SPL_SERIAL_SUPPORT=y
diff --git a/configs/am335x_shc_prompt_defconfig b/configs/am335x_shc_prompt_defconfig
index a308d761f23..e71e54b3f5b 100644
--- a/configs/am335x_shc_prompt_defconfig
+++ b/configs/am335x_shc_prompt_defconfig
@@ -1,8 +1,9 @@
CONFIG_ARM=y
-CONFIG_AM33XX=y
+CONFIG_ARCH_OMAP2PLUS=y
CONFIG_SPL_GPIO_SUPPORT=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
+CONFIG_AM33XX=y
CONFIG_TARGET_AM335X_SHC=y
CONFIG_SPL_MMC_SUPPORT=y
CONFIG_SPL_SERIAL_SUPPORT=y
diff --git a/configs/am335x_shc_sdboot_defconfig b/configs/am335x_shc_sdboot_defconfig
index 96288a16626..bd66fbc7b1a 100644
--- a/configs/am335x_shc_sdboot_defconfig
+++ b/configs/am335x_shc_sdboot_defconfig
@@ -1,8 +1,9 @@
CONFIG_ARM=y
-CONFIG_AM33XX=y
+CONFIG_ARCH_OMAP2PLUS=y
CONFIG_SPL_GPIO_SUPPORT=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
+CONFIG_AM33XX=y
CONFIG_TARGET_AM335X_SHC=y
CONFIG_SPL_MMC_SUPPORT=y
CONFIG_SPL_SERIAL_SUPPORT=y
diff --git a/configs/am335x_shc_sdboot_prompt_defconfig b/configs/am335x_shc_sdboot_prompt_defconfig
index 96288a16626..bd66fbc7b1a 100644
--- a/configs/am335x_shc_sdboot_prompt_defconfig
+++ b/configs/am335x_shc_sdboot_prompt_defconfig
@@ -1,8 +1,9 @@
CONFIG_ARM=y
-CONFIG_AM33XX=y
+CONFIG_ARCH_OMAP2PLUS=y
CONFIG_SPL_GPIO_SUPPORT=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
+CONFIG_AM33XX=y
CONFIG_TARGET_AM335X_SHC=y
CONFIG_SPL_MMC_SUPPORT=y
CONFIG_SPL_SERIAL_SUPPORT=y
diff --git a/configs/am335x_sl50_defconfig b/configs/am335x_sl50_defconfig
index 38d5709eb10..994540d6f03 100644
--- a/configs/am335x_sl50_defconfig
+++ b/configs/am335x_sl50_defconfig
@@ -1,8 +1,9 @@
CONFIG_ARM=y
-CONFIG_AM33XX=y
+CONFIG_ARCH_OMAP2PLUS=y
CONFIG_SPL_GPIO_SUPPORT=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
+CONFIG_AM33XX=y
CONFIG_TARGET_AM335X_SL50=y
CONFIG_SPL_MMC_SUPPORT=y
CONFIG_SPL_SERIAL_SUPPORT=y
diff --git a/configs/am3517_crane_defconfig b/configs/am3517_crane_defconfig
index 91cf89ae259..81fec1e082b 100644
--- a/configs/am3517_crane_defconfig
+++ b/configs/am3517_crane_defconfig
@@ -1,7 +1,8 @@
CONFIG_ARM=y
# CONFIG_SYS_THUMB_BUILD is not set
-CONFIG_OMAP34XX=y
+CONFIG_ARCH_OMAP2PLUS=y
# CONFIG_SPL_GPIO_SUPPORT is not set
+CONFIG_OMAP34XX=y
CONFIG_TARGET_AM3517_CRANE=y
CONFIG_BOOTDELAY=10
CONFIG_SPL=y
diff --git a/configs/am3517_evm_defconfig b/configs/am3517_evm_defconfig
index 54b857c2253..04bade94b47 100644
--- a/configs/am3517_evm_defconfig
+++ b/configs/am3517_evm_defconfig
@@ -1,7 +1,8 @@
CONFIG_ARM=y
# CONFIG_SYS_THUMB_BUILD is not set
-CONFIG_OMAP34XX=y
+CONFIG_ARCH_OMAP2PLUS=y
# CONFIG_SPL_GPIO_SUPPORT is not set
+CONFIG_OMAP34XX=y
CONFIG_TARGET_AM3517_EVM=y
CONFIG_SYS_EXTRA_OPTIONS="NAND"
CONFIG_BOOTDELAY=10
diff --git a/configs/am43xx_evm_defconfig b/configs/am43xx_evm_defconfig
index 5a1af0b2090..89a37fb8090 100644
--- a/configs/am43xx_evm_defconfig
+++ b/configs/am43xx_evm_defconfig
@@ -1,6 +1,7 @@
CONFIG_ARM=y
-CONFIG_AM43XX=y
+CONFIG_ARCH_OMAP2PLUS=y
CONFIG_SYS_MALLOC_F_LEN=0x2000
+CONFIG_AM43XX=y
CONFIG_TARGET_AM43XX_EVM=y
CONFIG_SPL_STACK_R_ADDR=0x82000000
CONFIG_DEFAULT_DEVICE_TREE="am437x-gp-evm"
@@ -44,18 +45,13 @@ CONFIG_DFU_MMC=y
CONFIG_DFU_RAM=y
CONFIG_DFU_SF=y
CONFIG_DM_GPIO=y
-CONFIG_DM_I2C=y
CONFIG_DM_MMC=y
# CONFIG_DM_MMC_OPS is not set
CONFIG_MMC_OMAP_HS=y
-CONFIG_DM_SPI_FLASH=y
CONFIG_SPI_FLASH=y
-CONFIG_SPI_FLASH_BAR=y
CONFIG_SPI_FLASH_MACRONIX=y
-CONFIG_DM_ETH=y
CONFIG_DM_SERIAL=y
CONFIG_SYS_NS16550=y
-CONFIG_DM_SPI=y
CONFIG_TI_QSPI=y
CONFIG_TIMER=y
CONFIG_OMAP_TIMER=y
diff --git a/configs/am43xx_evm_ethboot_defconfig b/configs/am43xx_evm_ethboot_defconfig
index 68bb6d88394..fa203f8834d 100644
--- a/configs/am43xx_evm_ethboot_defconfig
+++ b/configs/am43xx_evm_ethboot_defconfig
@@ -1,4 +1,5 @@
CONFIG_ARM=y
+CONFIG_ARCH_OMAP2PLUS=y
CONFIG_AM43XX=y
CONFIG_TARGET_AM43XX_EVM=y
CONFIG_SYS_EXTRA_OPTIONS="SERIAL1,CONS_INDEX=1,NAND"
diff --git a/configs/am43xx_evm_qspiboot_defconfig b/configs/am43xx_evm_qspiboot_defconfig
index 83546ed30b8..65d5d837bb4 100644
--- a/configs/am43xx_evm_qspiboot_defconfig
+++ b/configs/am43xx_evm_qspiboot_defconfig
@@ -1,5 +1,6 @@
CONFIG_ARM=y
# CONFIG_SYS_THUMB_BUILD is not set
+CONFIG_ARCH_OMAP2PLUS=y
CONFIG_AM43XX=y
CONFIG_TARGET_AM43XX_EVM=y
CONFIG_ISW_ENTRY_ADDR=0x30000000
diff --git a/configs/am43xx_evm_usbhost_boot_defconfig b/configs/am43xx_evm_usbhost_boot_defconfig
index a9383504e69..50cca204c3f 100644
--- a/configs/am43xx_evm_usbhost_boot_defconfig
+++ b/configs/am43xx_evm_usbhost_boot_defconfig
@@ -1,6 +1,7 @@
CONFIG_ARM=y
-CONFIG_AM43XX=y
+CONFIG_ARCH_OMAP2PLUS=y
CONFIG_SYS_MALLOC_F_LEN=0x2000
+CONFIG_AM43XX=y
CONFIG_TARGET_AM43XX_EVM=y
CONFIG_ISW_ENTRY_ADDR=0x40300350
CONFIG_SPL_STACK_R_ADDR=0x82000000
diff --git a/configs/am43xx_hs_evm_defconfig b/configs/am43xx_hs_evm_defconfig
index 36b76b2b876..886d54c484b 100644
--- a/configs/am43xx_hs_evm_defconfig
+++ b/configs/am43xx_hs_evm_defconfig
@@ -1,6 +1,7 @@
CONFIG_ARM=y
-CONFIG_AM43XX=y
+CONFIG_ARCH_OMAP2PLUS=y
CONFIG_SYS_MALLOC_F_LEN=0x2000
+CONFIG_AM43XX=y
CONFIG_TI_SECURE_DEVICE=y
CONFIG_TARGET_AM43XX_EVM=y
CONFIG_ISW_ENTRY_ADDR=0x403018e0
@@ -54,17 +55,13 @@ CONFIG_DFU_MMC=y
CONFIG_DFU_RAM=y
CONFIG_DFU_SF=y
CONFIG_DM_GPIO=y
-CONFIG_DM_I2C=y
CONFIG_DM_MMC=y
# CONFIG_DM_MMC_OPS is not set
CONFIG_MMC_OMAP_HS=y
-CONFIG_DM_SPI_FLASH=y
CONFIG_SPI_FLASH=y
-CONFIG_SPI_FLASH_BAR=y
CONFIG_SPI_FLASH_MACRONIX=y
CONFIG_DM_SERIAL=y
CONFIG_SYS_NS16550=y
-CONFIG_DM_SPI=y
CONFIG_TI_QSPI=y
CONFIG_TIMER=y
CONFIG_OMAP_TIMER=y
diff --git a/configs/am57xx_evm_defconfig b/configs/am57xx_evm_defconfig
index 00569c1a625..f64b5836cec 100644
--- a/configs/am57xx_evm_defconfig
+++ b/configs/am57xx_evm_defconfig
@@ -1,6 +1,7 @@
CONFIG_ARM=y
-CONFIG_OMAP54XX=y
+CONFIG_ARCH_OMAP2PLUS=y
CONFIG_SYS_MALLOC_F_LEN=0x2000
+CONFIG_OMAP54XX=y
CONFIG_TARGET_AM57XX_EVM=y
# CONFIG_SPL_NAND_SUPPORT is not set
CONFIG_SPL_SPI_FLASH_SUPPORT=y
diff --git a/configs/am57xx_evm_nodt_defconfig b/configs/am57xx_evm_nodt_defconfig
index 4770a3b5501..33e7f91e434 100644
--- a/configs/am57xx_evm_nodt_defconfig
+++ b/configs/am57xx_evm_nodt_defconfig
@@ -1,4 +1,5 @@
CONFIG_ARM=y
+CONFIG_ARCH_OMAP2PLUS=y
CONFIG_OMAP54XX=y
CONFIG_TARGET_AM57XX_EVM=y
# CONFIG_SPL_NAND_SUPPORT is not set
diff --git a/configs/am57xx_hs_evm_defconfig b/configs/am57xx_hs_evm_defconfig
index f7efa2b6425..743f82ce1e1 100644
--- a/configs/am57xx_hs_evm_defconfig
+++ b/configs/am57xx_hs_evm_defconfig
@@ -1,6 +1,7 @@
CONFIG_ARM=y
-CONFIG_OMAP54XX=y
+CONFIG_ARCH_OMAP2PLUS=y
CONFIG_SYS_MALLOC_F_LEN=0x2000
+CONFIG_OMAP54XX=y
CONFIG_TI_SECURE_DEVICE=y
CONFIG_TARGET_AM57XX_EVM=y
CONFIG_TI_SECURE_EMIF_REGION_START=0xbdb00000
diff --git a/configs/birdland_bav335a_defconfig b/configs/birdland_bav335a_defconfig
index 1770d0a0c94..17c60086692 100644
--- a/configs/birdland_bav335a_defconfig
+++ b/configs/birdland_bav335a_defconfig
@@ -1,8 +1,9 @@
CONFIG_ARM=y
-CONFIG_AM33XX=y
+CONFIG_ARCH_OMAP2PLUS=y
CONFIG_SPL_GPIO_SUPPORT=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
+CONFIG_AM33XX=y
CONFIG_TARGET_BAV335X=y
CONFIG_SPL_MMC_SUPPORT=y
CONFIG_SPL_SERIAL_SUPPORT=y
diff --git a/configs/birdland_bav335b_defconfig b/configs/birdland_bav335b_defconfig
index 3bcecda2646..225271cd96b 100644
--- a/configs/birdland_bav335b_defconfig
+++ b/configs/birdland_bav335b_defconfig
@@ -1,8 +1,9 @@
CONFIG_ARM=y
-CONFIG_AM33XX=y
+CONFIG_ARCH_OMAP2PLUS=y
CONFIG_SPL_GPIO_SUPPORT=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
+CONFIG_AM33XX=y
CONFIG_TARGET_BAV335X=y
CONFIG_SPL_MMC_SUPPORT=y
CONFIG_SPL_SERIAL_SUPPORT=y
diff --git a/configs/brppt1_mmc_defconfig b/configs/brppt1_mmc_defconfig
index 933be91b4f8..621d7dbb433 100644
--- a/configs/brppt1_mmc_defconfig
+++ b/configs/brppt1_mmc_defconfig
@@ -1,8 +1,9 @@
CONFIG_ARM=y
-CONFIG_TARGET_BRPPT1=y
+CONFIG_ARCH_OMAP2PLUS=y
CONFIG_SPL_GPIO_SUPPORT=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
+CONFIG_TARGET_BRPPT1=y
CONFIG_SPL_MMC_SUPPORT=y
CONFIG_SPL_SERIAL_SUPPORT=y
CONFIG_SPL_WATCHDOG_SUPPORT=y
diff --git a/configs/brppt1_nand_defconfig b/configs/brppt1_nand_defconfig
index 54867d9eb3a..a974e680a9e 100644
--- a/configs/brppt1_nand_defconfig
+++ b/configs/brppt1_nand_defconfig
@@ -1,8 +1,9 @@
CONFIG_ARM=y
-CONFIG_TARGET_BRPPT1=y
+CONFIG_ARCH_OMAP2PLUS=y
CONFIG_SPL_GPIO_SUPPORT=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
+CONFIG_TARGET_BRPPT1=y
CONFIG_SPL_SERIAL_SUPPORT=y
CONFIG_SPL_NAND_SUPPORT=y
CONFIG_SPL_WATCHDOG_SUPPORT=y
diff --git a/configs/brppt1_spi_defconfig b/configs/brppt1_spi_defconfig
index 737067f6629..d1a786a90ff 100644
--- a/configs/brppt1_spi_defconfig
+++ b/configs/brppt1_spi_defconfig
@@ -1,8 +1,9 @@
CONFIG_ARM=y
-CONFIG_TARGET_BRPPT1=y
+CONFIG_ARCH_OMAP2PLUS=y
CONFIG_SPL_GPIO_SUPPORT=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
+CONFIG_TARGET_BRPPT1=y
CONFIG_SPL_MMC_SUPPORT=y
CONFIG_SPL_SERIAL_SUPPORT=y
CONFIG_SPL_SPI_FLASH_SUPPORT=y
diff --git a/configs/brxre1_defconfig b/configs/brxre1_defconfig
index 263ce0d5b4d..909d5d41230 100644
--- a/configs/brxre1_defconfig
+++ b/configs/brxre1_defconfig
@@ -1,5 +1,5 @@
CONFIG_ARM=y
-CONFIG_TARGET_BRXRE1=y
+CONFIG_ARCH_OMAP2PLUS=y
CONFIG_SPL_GPIO_SUPPORT=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
diff --git a/configs/cairo_defconfig b/configs/cairo_defconfig
index efd8f28b51e..da28e13d6ba 100644
--- a/configs/cairo_defconfig
+++ b/configs/cairo_defconfig
@@ -1,4 +1,5 @@
CONFIG_ARM=y
+CONFIG_ARCH_OMAP2PLUS=y
CONFIG_OMAP34XX=y
CONFIG_TARGET_OMAP3_CAIRO=y
CONFIG_BOOTDELAY=-2
diff --git a/configs/chiliboard_defconfig b/configs/chiliboard_defconfig
index dae62d35c29..2f4c694a0aa 100644
--- a/configs/chiliboard_defconfig
+++ b/configs/chiliboard_defconfig
@@ -1,7 +1,8 @@
CONFIG_ARM=y
-CONFIG_AM33XX=y
+CONFIG_ARCH_OMAP2PLUS=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
+CONFIG_AM33XX=y
CONFIG_TARGET_CHILIBOARD=y
CONFIG_SPL_MMC_SUPPORT=y
CONFIG_SPL_SERIAL_SUPPORT=y
diff --git a/configs/cl-som-am57x_defconfig b/configs/cl-som-am57x_defconfig
index b0421028bf1..356266f409b 100644
--- a/configs/cl-som-am57x_defconfig
+++ b/configs/cl-som-am57x_defconfig
@@ -1,4 +1,5 @@
CONFIG_ARM=y
+CONFIG_ARCH_OMAP2PLUS=y
CONFIG_OMAP54XX=y
CONFIG_TARGET_CL_SOM_AM57X=y
# CONFIG_SPL_NAND_SUPPORT is not set
diff --git a/configs/cm_t335_defconfig b/configs/cm_t335_defconfig
index 3e2709750bd..4d0d03e68b1 100644
--- a/configs/cm_t335_defconfig
+++ b/configs/cm_t335_defconfig
@@ -1,8 +1,9 @@
CONFIG_ARM=y
-CONFIG_AM33XX=y
+CONFIG_ARCH_OMAP2PLUS=y
CONFIG_SPL_GPIO_SUPPORT=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
+CONFIG_AM33XX=y
CONFIG_TARGET_CM_T335=y
CONFIG_SPL_MMC_SUPPORT=y
CONFIG_SPL_SERIAL_SUPPORT=y
diff --git a/configs/cm_t3517_defconfig b/configs/cm_t3517_defconfig
index 0357b9126bc..f50198edc27 100644
--- a/configs/cm_t3517_defconfig
+++ b/configs/cm_t3517_defconfig
@@ -1,5 +1,6 @@
CONFIG_ARM=y
# CONFIG_SYS_THUMB_BUILD is not set
+CONFIG_ARCH_OMAP2PLUS=y
CONFIG_OMAP34XX=y
CONFIG_TARGET_CM_T3517=y
CONFIG_BOOTDELAY=3
diff --git a/configs/cm_t35_defconfig b/configs/cm_t35_defconfig
index 6c12b28d52c..a07b35e561c 100644
--- a/configs/cm_t35_defconfig
+++ b/configs/cm_t35_defconfig
@@ -1,5 +1,6 @@
CONFIG_ARM=y
# CONFIG_SYS_THUMB_BUILD is not set
+CONFIG_ARCH_OMAP2PLUS=y
CONFIG_OMAP34XX=y
CONFIG_TARGET_CM_T35=y
CONFIG_BOOTDELAY=3
diff --git a/configs/cm_t43_defconfig b/configs/cm_t43_defconfig
index 7095c6d0661..6ef980ab691 100644
--- a/configs/cm_t43_defconfig
+++ b/configs/cm_t43_defconfig
@@ -1,8 +1,9 @@
CONFIG_ARM=y
CONFIG_SYS_THUMB_BUILD=y
-CONFIG_TARGET_CM_T43=y
+CONFIG_ARCH_OMAP2PLUS=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
+CONFIG_TARGET_CM_T43=y
CONFIG_SPL_MMC_SUPPORT=y
CONFIG_SPL_SERIAL_SUPPORT=y
CONFIG_SPL_LIBDISK_SUPPORT=y
diff --git a/configs/cm_t54_defconfig b/configs/cm_t54_defconfig
index 58d13fc8298..d7fd995f7a4 100644
--- a/configs/cm_t54_defconfig
+++ b/configs/cm_t54_defconfig
@@ -1,4 +1,5 @@
CONFIG_ARM=y
+CONFIG_ARCH_OMAP2PLUS=y
CONFIG_OMAP54XX=y
CONFIG_TARGET_CM_T54=y
# CONFIG_SPL_NAND_SUPPORT is not set
diff --git a/configs/devkit8000_defconfig b/configs/devkit8000_defconfig
index 497b98afb93..7edcb083241 100644
--- a/configs/devkit8000_defconfig
+++ b/configs/devkit8000_defconfig
@@ -1,4 +1,5 @@
CONFIG_ARM=y
+CONFIG_ARCH_OMAP2PLUS=y
CONFIG_OMAP34XX=y
CONFIG_TARGET_DEVKIT8000=y
CONFIG_SYS_CONSOLE_INFO_QUIET=y
diff --git a/configs/dra7xx_evm_defconfig b/configs/dra7xx_evm_defconfig
index 4582cf0fc66..462e6ff4082 100644
--- a/configs/dra7xx_evm_defconfig
+++ b/configs/dra7xx_evm_defconfig
@@ -1,8 +1,9 @@
CONFIG_ARM=y
-CONFIG_OMAP54XX=y
+CONFIG_ARCH_OMAP2PLUS=y
CONFIG_SYS_MALLOC_F_LEN=0x2000
-# CONFIG_SPL_NAND_SUPPORT is not set
+CONFIG_OMAP54XX=y
CONFIG_TARGET_DRA7XX_EVM=y
+# CONFIG_SPL_NAND_SUPPORT is not set
CONFIG_SPL_SPI_FLASH_SUPPORT=y
CONFIG_SPL_SPI_SUPPORT=y
CONFIG_ARMV7_LPAE=y
diff --git a/configs/dra7xx_hs_evm_defconfig b/configs/dra7xx_hs_evm_defconfig
index 7a739359b22..a348878342b 100644
--- a/configs/dra7xx_hs_evm_defconfig
+++ b/configs/dra7xx_hs_evm_defconfig
@@ -1,6 +1,7 @@
CONFIG_ARM=y
-CONFIG_OMAP54XX=y
+CONFIG_ARCH_OMAP2PLUS=y
CONFIG_SYS_MALLOC_F_LEN=0x2000
+CONFIG_OMAP54XX=y
CONFIG_TI_SECURE_DEVICE=y
CONFIG_TARGET_DRA7XX_EVM=y
CONFIG_TI_SECURE_EMIF_REGION_START=0xbdb00000
diff --git a/configs/draco_defconfig b/configs/draco_defconfig
index 03e8abb3fc2..ea678b6f48c 100644
--- a/configs/draco_defconfig
+++ b/configs/draco_defconfig
@@ -1,9 +1,10 @@
CONFIG_ARM=y
-CONFIG_TARGET_DRACO=y
+CONFIG_ARCH_OMAP2PLUS=y
CONFIG_SPL_GPIO_SUPPORT=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_SYS_MALLOC_F_LEN=0x2000
+CONFIG_TARGET_DRACO=y
CONFIG_SPL_MMC_SUPPORT=y
CONFIG_SPL_SERIAL_SUPPORT=y
CONFIG_SPL_LIBDISK_SUPPORT=y
diff --git a/configs/duovero_defconfig b/configs/duovero_defconfig
index 667784e01c4..840b3f20572 100644
--- a/configs/duovero_defconfig
+++ b/configs/duovero_defconfig
@@ -1,4 +1,5 @@
CONFIG_ARM=y
+CONFIG_ARCH_OMAP2PLUS=y
CONFIG_OMAP44XX=y
CONFIG_TARGET_DUOVERO=y
# CONFIG_SPL_NAND_SUPPORT is not set
diff --git a/configs/eco5pk_defconfig b/configs/eco5pk_defconfig
index 59b4d81eb49..2f3d8141639 100644
--- a/configs/eco5pk_defconfig
+++ b/configs/eco5pk_defconfig
@@ -1,5 +1,6 @@
CONFIG_ARM=y
# CONFIG_SYS_THUMB_BUILD is not set
+CONFIG_ARCH_OMAP2PLUS=y
CONFIG_OMAP34XX=y
CONFIG_TARGET_ECO5PK=y
CONFIG_BOOTDELAY=10
diff --git a/configs/etamin_defconfig b/configs/etamin_defconfig
index c3e2bdcce79..39d3ad1cd9f 100644
--- a/configs/etamin_defconfig
+++ b/configs/etamin_defconfig
@@ -1,9 +1,10 @@
CONFIG_ARM=y
-CONFIG_TARGET_ETAMIN=y
+CONFIG_ARCH_OMAP2PLUS=y
CONFIG_SPL_GPIO_SUPPORT=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_SYS_MALLOC_F_LEN=0x2000
+CONFIG_TARGET_ETAMIN=y
CONFIG_SPL_MMC_SUPPORT=y
CONFIG_SPL_SERIAL_SUPPORT=y
CONFIG_SPL_LIBDISK_SUPPORT=y
diff --git a/configs/igep0020_defconfig b/configs/igep0020_defconfig
index d3a84ce77a8..c81dfdfbdb8 100644
--- a/configs/igep0020_defconfig
+++ b/configs/igep0020_defconfig
@@ -1,4 +1,5 @@
CONFIG_ARM=y
+CONFIG_ARCH_OMAP2PLUS=y
CONFIG_OMAP34XX=y
CONFIG_TARGET_OMAP3_IGEP00X0=y
CONFIG_OF_BOARD_SETUP=y
diff --git a/configs/igep0030_defconfig b/configs/igep0030_defconfig
index cb64d6f97ea..9098451d84c 100644
--- a/configs/igep0030_defconfig
+++ b/configs/igep0030_defconfig
@@ -1,4 +1,5 @@
CONFIG_ARM=y
+CONFIG_ARCH_OMAP2PLUS=y
CONFIG_OMAP34XX=y
CONFIG_TARGET_OMAP3_IGEP00X0=y
CONFIG_DISTRO_DEFAULTS=y
diff --git a/configs/igep0032_defconfig b/configs/igep0032_defconfig
index 7e3e5423f2e..56be1a1b231 100644
--- a/configs/igep0032_defconfig
+++ b/configs/igep0032_defconfig
@@ -1,4 +1,5 @@
CONFIG_ARM=y
+CONFIG_ARCH_OMAP2PLUS=y
CONFIG_OMAP34XX=y
CONFIG_TARGET_OMAP3_IGEP00X0=y
CONFIG_DISTRO_DEFAULTS=y
diff --git a/configs/kc1_defconfig b/configs/kc1_defconfig
index dae22eebe71..c5ecdda92f8 100644
--- a/configs/kc1_defconfig
+++ b/configs/kc1_defconfig
@@ -1,4 +1,5 @@
CONFIG_ARM=y
+CONFIG_ARCH_OMAP2PLUS=y
CONFIG_OMAP44XX=y
CONFIG_TARGET_KC1=y
# CONFIG_SPL_NAND_SUPPORT is not set
diff --git a/configs/mcx_defconfig b/configs/mcx_defconfig
index fc88594e762..a45d7524046 100644
--- a/configs/mcx_defconfig
+++ b/configs/mcx_defconfig
@@ -1,7 +1,8 @@
CONFIG_ARM=y
# CONFIG_SYS_THUMB_BUILD is not set
-CONFIG_OMAP34XX=y
+CONFIG_ARCH_OMAP2PLUS=y
# CONFIG_SPL_GPIO_SUPPORT is not set
+CONFIG_OMAP34XX=y
CONFIG_TARGET_MCX=y
CONFIG_VIDEO=y
CONFIG_BOOTDELAY=3
diff --git a/configs/mt_ventoux_defconfig b/configs/mt_ventoux_defconfig
index 87954d0b485..395074acfcd 100644
--- a/configs/mt_ventoux_defconfig
+++ b/configs/mt_ventoux_defconfig
@@ -1,5 +1,6 @@
CONFIG_ARM=y
# CONFIG_SYS_THUMB_BUILD is not set
+CONFIG_ARCH_OMAP2PLUS=y
CONFIG_OMAP34XX=y
CONFIG_TARGET_MT_VENTOUX=y
CONFIG_VIDEO=y
diff --git a/configs/nokia_rx51_defconfig b/configs/nokia_rx51_defconfig
index 181bdb11700..ef9d9eda633 100644
--- a/configs/nokia_rx51_defconfig
+++ b/configs/nokia_rx51_defconfig
@@ -1,5 +1,6 @@
CONFIG_ARM=y
# CONFIG_SYS_THUMB_BUILD is not set
+CONFIG_ARCH_OMAP2PLUS=y
CONFIG_OMAP34XX=y
CONFIG_TARGET_NOKIA_RX51=y
CONFIG_VIDEO=y
diff --git a/configs/omap3_beagle_defconfig b/configs/omap3_beagle_defconfig
index 1d32699e52b..46846b2ccce 100644
--- a/configs/omap3_beagle_defconfig
+++ b/configs/omap3_beagle_defconfig
@@ -1,4 +1,5 @@
CONFIG_ARM=y
+CONFIG_ARCH_OMAP2PLUS=y
CONFIG_OMAP34XX=y
CONFIG_TARGET_OMAP3_BEAGLE=y
CONFIG_DISTRO_DEFAULTS=y
diff --git a/configs/omap3_evm_defconfig b/configs/omap3_evm_defconfig
index 915a14271af..1b61d1d8b9e 100644
--- a/configs/omap3_evm_defconfig
+++ b/configs/omap3_evm_defconfig
@@ -1,5 +1,6 @@
CONFIG_ARM=y
# CONFIG_SYS_THUMB_BUILD is not set
+CONFIG_ARCH_OMAP2PLUS=y
CONFIG_OMAP34XX=y
CONFIG_TARGET_OMAP3_EVM=y
CONFIG_BOOTDELAY=3
diff --git a/configs/omap3_ha_defconfig b/configs/omap3_ha_defconfig
index c4ff1369eef..911021b7476 100644
--- a/configs/omap3_ha_defconfig
+++ b/configs/omap3_ha_defconfig
@@ -1,5 +1,6 @@
CONFIG_ARM=y
# CONFIG_SYS_THUMB_BUILD is not set
+CONFIG_ARCH_OMAP2PLUS=y
CONFIG_OMAP34XX=y
CONFIG_TARGET_TAO3530=y
CONFIG_SYS_EXTRA_OPTIONS="SYS_BOARD_OMAP3_HA"
diff --git a/configs/omap3_logic_defconfig b/configs/omap3_logic_defconfig
index 89bf38fc54f..5a88d298625 100644
--- a/configs/omap3_logic_defconfig
+++ b/configs/omap3_logic_defconfig
@@ -1,6 +1,7 @@
CONFIG_ARM=y
-CONFIG_OMAP34XX=y
+CONFIG_ARCH_OMAP2PLUS=y
CONFIG_SYS_MALLOC_F_LEN=0x2000
+CONFIG_OMAP34XX=y
CONFIG_TARGET_OMAP3_LOGIC=y
CONFIG_SPL_STACK_R_ADDR=0x82000000
CONFIG_SYS_EXTRA_OPTIONS="NAND"
diff --git a/configs/omap3_overo_defconfig b/configs/omap3_overo_defconfig
index 0fa05cb0fa8..daea034ba9b 100644
--- a/configs/omap3_overo_defconfig
+++ b/configs/omap3_overo_defconfig
@@ -1,13 +1,14 @@
CONFIG_ARM=y
+CONFIG_ARCH_OMAP2PLUS=y
+CONFIG_SYS_MALLOC_F_LEN=0x2000
CONFIG_OMAP34XX=y
CONFIG_TARGET_OMAP3_OVERO=y
+CONFIG_SPL_STACK_R_ADDR=0x82000000
CONFIG_SYS_CONSOLE_INFO_QUIET=y
CONFIG_VERSION_VARIABLE=y
CONFIG_SPL=y
CONFIG_SPL_SYS_MALLOC_SIMPLE=y
-CONFIG_SPL_STACK_R_ADDR=0x82000000
CONFIG_SPL_STACK_R=y
-CONFIG_SYS_MALLOC_F_LEN=0x2000
CONFIG_SPL_MTD_SUPPORT=y
CONFIG_SPL_OS_BOOT=y
CONFIG_HUSH_PARSER=y
diff --git a/configs/omap3_pandora_defconfig b/configs/omap3_pandora_defconfig
index 311a82d9b7d..3aa7ba3f589 100644
--- a/configs/omap3_pandora_defconfig
+++ b/configs/omap3_pandora_defconfig
@@ -1,4 +1,5 @@
CONFIG_ARM=y
+CONFIG_ARCH_OMAP2PLUS=y
CONFIG_OMAP34XX=y
CONFIG_TARGET_OMAP3_PANDORA=y
CONFIG_DISTRO_DEFAULTS=y
diff --git a/configs/omap3_zoom1_defconfig b/configs/omap3_zoom1_defconfig
index 13ec644a0bb..c985c86d6d1 100644
--- a/configs/omap3_zoom1_defconfig
+++ b/configs/omap3_zoom1_defconfig
@@ -1,4 +1,5 @@
CONFIG_ARM=y
+CONFIG_ARCH_OMAP2PLUS=y
CONFIG_OMAP34XX=y
CONFIG_TARGET_OMAP3_ZOOM1=y
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
diff --git a/configs/omap4_panda_defconfig b/configs/omap4_panda_defconfig
index 91e8caf541b..af459fcfdeb 100644
--- a/configs/omap4_panda_defconfig
+++ b/configs/omap4_panda_defconfig
@@ -1,4 +1,5 @@
CONFIG_ARM=y
+CONFIG_ARCH_OMAP2PLUS=y
CONFIG_OMAP44XX=y
CONFIG_TARGET_OMAP4_PANDA=y
# CONFIG_SPL_NAND_SUPPORT is not set
diff --git a/configs/omap4_sdp4430_defconfig b/configs/omap4_sdp4430_defconfig
index 553d978de27..727a4504fa2 100644
--- a/configs/omap4_sdp4430_defconfig
+++ b/configs/omap4_sdp4430_defconfig
@@ -1,6 +1,7 @@
CONFIG_ARM=y
# CONFIG_SPL_USE_ARCH_MEMCPY is not set
# CONFIG_SPL_USE_ARCH_MEMSET is not set
+CONFIG_ARCH_OMAP2PLUS=y
CONFIG_OMAP44XX=y
CONFIG_TARGET_OMAP4_SDP4430=y
# CONFIG_SPL_NAND_SUPPORT is not set
diff --git a/configs/omap5_uevm_defconfig b/configs/omap5_uevm_defconfig
index 9172613ae98..865845ee9ca 100644
--- a/configs/omap5_uevm_defconfig
+++ b/configs/omap5_uevm_defconfig
@@ -1,4 +1,5 @@
CONFIG_ARM=y
+CONFIG_ARCH_OMAP2PLUS=y
CONFIG_OMAP54XX=y
CONFIG_TARGET_OMAP5_UEVM=y
# CONFIG_SPL_NAND_SUPPORT is not set
diff --git a/configs/pcm051_rev1_defconfig b/configs/pcm051_rev1_defconfig
index ee287d6e8b1..4392c6e1d3c 100644
--- a/configs/pcm051_rev1_defconfig
+++ b/configs/pcm051_rev1_defconfig
@@ -1,8 +1,9 @@
CONFIG_ARM=y
-CONFIG_AM33XX=y
+CONFIG_ARCH_OMAP2PLUS=y
CONFIG_SPL_GPIO_SUPPORT=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
+CONFIG_AM33XX=y
CONFIG_TARGET_PCM051=y
CONFIG_SPL_MMC_SUPPORT=y
CONFIG_SPL_SERIAL_SUPPORT=y
diff --git a/configs/pcm051_rev3_defconfig b/configs/pcm051_rev3_defconfig
index ba606197722..72a263187f1 100644
--- a/configs/pcm051_rev3_defconfig
+++ b/configs/pcm051_rev3_defconfig
@@ -1,8 +1,9 @@
CONFIG_ARM=y
-CONFIG_AM33XX=y
+CONFIG_ARCH_OMAP2PLUS=y
CONFIG_SPL_GPIO_SUPPORT=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
+CONFIG_AM33XX=y
CONFIG_TARGET_PCM051=y
CONFIG_SPL_MMC_SUPPORT=y
CONFIG_SPL_SERIAL_SUPPORT=y
diff --git a/configs/pengwyn_defconfig b/configs/pengwyn_defconfig
index 9136f0e09a4..5dcb46b7268 100644
--- a/configs/pengwyn_defconfig
+++ b/configs/pengwyn_defconfig
@@ -1,8 +1,9 @@
CONFIG_ARM=y
-CONFIG_AM33XX=y
+CONFIG_ARCH_OMAP2PLUS=y
CONFIG_SPL_GPIO_SUPPORT=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
+CONFIG_AM33XX=y
CONFIG_TARGET_PENGWYN=y
CONFIG_SPL_MMC_SUPPORT=y
CONFIG_SPL_SERIAL_SUPPORT=y
diff --git a/configs/pepper_defconfig b/configs/pepper_defconfig
index 42038d0f028..a7d67bf472d 100644
--- a/configs/pepper_defconfig
+++ b/configs/pepper_defconfig
@@ -1,8 +1,9 @@
CONFIG_ARM=y
-CONFIG_AM33XX=y
+CONFIG_ARCH_OMAP2PLUS=y
CONFIG_SPL_GPIO_SUPPORT=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
+CONFIG_AM33XX=y
CONFIG_TARGET_PEPPER=y
CONFIG_SPL_MMC_SUPPORT=y
CONFIG_SPL_SERIAL_SUPPORT=y
diff --git a/configs/pxm2_defconfig b/configs/pxm2_defconfig
index ff09921ac25..3d42332007f 100644
--- a/configs/pxm2_defconfig
+++ b/configs/pxm2_defconfig
@@ -1,9 +1,10 @@
CONFIG_ARM=y
-CONFIG_TARGET_PXM2=y
+CONFIG_ARCH_OMAP2PLUS=y
CONFIG_SPL_GPIO_SUPPORT=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_SYS_MALLOC_F_LEN=0x2000
+CONFIG_TARGET_PXM2=y
CONFIG_SPL_MMC_SUPPORT=y
CONFIG_SPL_SERIAL_SUPPORT=y
CONFIG_SPL_LIBDISK_SUPPORT=y
diff --git a/configs/rastaban_defconfig b/configs/rastaban_defconfig
index 0d259557a7a..084c03cd002 100644
--- a/configs/rastaban_defconfig
+++ b/configs/rastaban_defconfig
@@ -1,9 +1,10 @@
CONFIG_ARM=y
-CONFIG_TARGET_RASTABAN=y
+CONFIG_ARCH_OMAP2PLUS=y
CONFIG_SPL_GPIO_SUPPORT=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_SYS_MALLOC_F_LEN=0x2000
+CONFIG_TARGET_RASTABAN=y
CONFIG_SPL_MMC_SUPPORT=y
CONFIG_SPL_SERIAL_SUPPORT=y
CONFIG_SPL_LIBDISK_SUPPORT=y
diff --git a/configs/rut_defconfig b/configs/rut_defconfig
index b37c7f46501..66614bac6f5 100644
--- a/configs/rut_defconfig
+++ b/configs/rut_defconfig
@@ -1,9 +1,10 @@
CONFIG_ARM=y
-CONFIG_TARGET_RUT=y
+CONFIG_ARCH_OMAP2PLUS=y
CONFIG_SPL_GPIO_SUPPORT=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_SYS_MALLOC_F_LEN=0x2000
+CONFIG_TARGET_RUT=y
CONFIG_SPL_MMC_SUPPORT=y
CONFIG_SPL_SERIAL_SUPPORT=y
CONFIG_SPL_LIBDISK_SUPPORT=y
diff --git a/configs/sniper_defconfig b/configs/sniper_defconfig
index ca2762ad867..c0413926fb9 100644
--- a/configs/sniper_defconfig
+++ b/configs/sniper_defconfig
@@ -1,5 +1,6 @@
CONFIG_ARM=y
# CONFIG_SYS_THUMB_BUILD is not set
+CONFIG_ARCH_OMAP2PLUS=y
CONFIG_OMAP34XX=y
CONFIG_TARGET_SNIPER=y
# CONFIG_SPL_NAND_SUPPORT is not set
diff --git a/configs/tao3530_defconfig b/configs/tao3530_defconfig
index 8f12a99c738..24244134c7e 100644
--- a/configs/tao3530_defconfig
+++ b/configs/tao3530_defconfig
@@ -1,5 +1,6 @@
CONFIG_ARM=y
# CONFIG_SYS_THUMB_BUILD is not set
+CONFIG_ARCH_OMAP2PLUS=y
CONFIG_OMAP34XX=y
CONFIG_TARGET_TAO3530=y
CONFIG_BOOTDELAY=3
diff --git a/configs/thuban_defconfig b/configs/thuban_defconfig
index de2f95a7ee8..a20c4dfb31d 100644
--- a/configs/thuban_defconfig
+++ b/configs/thuban_defconfig
@@ -1,9 +1,10 @@
CONFIG_ARM=y
-CONFIG_TARGET_THUBAN=y
+CONFIG_ARCH_OMAP2PLUS=y
CONFIG_SPL_GPIO_SUPPORT=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_SYS_MALLOC_F_LEN=0x2000
+CONFIG_TARGET_THUBAN=y
CONFIG_SPL_MMC_SUPPORT=y
CONFIG_SPL_SERIAL_SUPPORT=y
CONFIG_SPL_LIBDISK_SUPPORT=y
diff --git a/configs/ti814x_evm_defconfig b/configs/ti814x_evm_defconfig
index 43e71d3ba23..a72c7642f60 100644
--- a/configs/ti814x_evm_defconfig
+++ b/configs/ti814x_evm_defconfig
@@ -1,8 +1,9 @@
CONFIG_ARM=y
-CONFIG_TARGET_TI814X_EVM=y
+CONFIG_ARCH_OMAP2PLUS=y
CONFIG_SPL_GPIO_SUPPORT=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
+CONFIG_TARGET_TI814X_EVM=y
CONFIG_SPL_MMC_SUPPORT=y
CONFIG_SPL_SERIAL_SUPPORT=y
CONFIG_SPL_LIBDISK_SUPPORT=y
diff --git a/configs/ti816x_evm_defconfig b/configs/ti816x_evm_defconfig
index b722f255396..8021defb87a 100644
--- a/configs/ti816x_evm_defconfig
+++ b/configs/ti816x_evm_defconfig
@@ -1,8 +1,9 @@
CONFIG_ARM=y
-CONFIG_TARGET_TI816X_EVM=y
+CONFIG_ARCH_OMAP2PLUS=y
CONFIG_SPL_GPIO_SUPPORT=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
+CONFIG_TARGET_TI816X_EVM=y
CONFIG_SPL_MMC_SUPPORT=y
CONFIG_SPL_SERIAL_SUPPORT=y
CONFIG_SPL_LIBDISK_SUPPORT=y
diff --git a/configs/tricorder_defconfig b/configs/tricorder_defconfig
index 9a2e5c60413..14a8eb4ea63 100644
--- a/configs/tricorder_defconfig
+++ b/configs/tricorder_defconfig
@@ -1,4 +1,5 @@
CONFIG_ARM=y
+CONFIG_ARCH_OMAP2PLUS=y
CONFIG_OMAP34XX=y
CONFIG_TARGET_TRICORDER=y
CONFIG_BOOTDELAY=0
diff --git a/configs/tricorder_flash_defconfig b/configs/tricorder_flash_defconfig
index a477091c401..290e97902ce 100644
--- a/configs/tricorder_flash_defconfig
+++ b/configs/tricorder_flash_defconfig
@@ -1,4 +1,5 @@
CONFIG_ARM=y
+CONFIG_ARCH_OMAP2PLUS=y
CONFIG_OMAP34XX=y
CONFIG_TARGET_TRICORDER=y
CONFIG_SYS_EXTRA_OPTIONS="FLASHCARD"
diff --git a/configs/twister_defconfig b/configs/twister_defconfig
index 648fe55d747..ba7b68b3171 100644
--- a/configs/twister_defconfig
+++ b/configs/twister_defconfig
@@ -1,5 +1,6 @@
CONFIG_ARM=y
# CONFIG_SYS_THUMB_BUILD is not set
+CONFIG_ARCH_OMAP2PLUS=y
CONFIG_OMAP34XX=y
CONFIG_TARGET_TWISTER=y
CONFIG_BOOTDELAY=10
diff --git a/include/linux/usb/musb.h b/include/linux/usb/musb.h
index e1fdab0c0f0..9104414cf0d 100644
--- a/include/linux/usb/musb.h
+++ b/include/linux/usb/musb.h
@@ -135,7 +135,7 @@ struct musb_hdrc_platform_data {
#define TUSB6010_REFCLK_24 41667 /* psec/clk @ 24.0 MHz XI */
#define TUSB6010_REFCLK_19 52083 /* psec/clk @ 19.2 MHz CLKIN */
-#ifdef CONFIG_ARCH_OMAP2
+#ifdef CONFIG_ARCH_OMAP2PLUS
extern int __init tusb6010_setup_interface(
struct musb_hdrc_platform_data *data,
--
GitLab
From dc89c6fb778ed2d12128e2bb976a45d540afce71 Mon Sep 17 00:00:00 2001
From: Patrice Chotard <patrice.chotard@st.com>
Date: Tue, 25 Apr 2017 11:07:46 +0200
Subject: [PATCH 152/282] arm/lib/bootm.c: keep ARM v7M in thumb mode during
boot_jump_linux()
On ARM v7M, the processor will return to ARM mode when executing
a blx instruction with bit 0 of the address == 0. Always set it
to 1 to stay in thumb mode.
Tested on STM32f746-disco board
Similar commit:
f99993c10882f7dc8ec35993d5febe59aac01e6a
Author: Matt Porter <mporter@konsulko.com>
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
---
arch/arm/lib/bootm.c | 5 ++++-
1 file changed, 4 insertions(+), 1 deletion(-)
diff --git a/arch/arm/lib/bootm.c b/arch/arm/lib/bootm.c
index 426bee6da57..4dbe6a53033 100644
--- a/arch/arm/lib/bootm.c
+++ b/arch/arm/lib/bootm.c
@@ -356,7 +356,10 @@ static void boot_jump_linux(bootm_headers_t *images, int flag)
int fake = (flag & BOOTM_STATE_OS_FAKE_GO);
kernel_entry = (void (*)(int, int, uint))images->ep;
-
+#ifdef CONFIG_CPU_V7M
+ ulong addr = (ulong)kernel_entry | 1;
+ kernel_entry = (void *)addr;
+#endif
s = getenv("machid");
if (s) {
if (strict_strtoul(s, 16, &machid) < 0) {
--
GitLab
From 8a707bafe0677b034632dda6dd0dc1061b105ff1 Mon Sep 17 00:00:00 2001
From: Lokesh Vutla <lokeshvutla@ti.com>
Date: Wed, 26 Apr 2017 11:35:19 +0530
Subject: [PATCH 153/282] MAINTAINERS: Update for Keystone2 secure devices
Update Keystone2 secure device configs under
"TI SYSTEM SECURITY". Without this buildman keeps complaining
about the status of these boards.
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Acked-by: Andrew F. Davis <afd@ti.com>
---
MAINTAINERS | 3 +++
1 file changed, 3 insertions(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index eadb21fb394..0962b47bf90 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -436,6 +436,9 @@ F: configs/am335x_hs_evm_defconfig
F: configs/am43xx_hs_evm_defconfig
F: configs/am57xx_hs_evm_defconfig
F: configs/dra7xx_hs_evm_defconfig
+F: configs/k2hk_hs_evm_defconfig
+F: configs/k2e_hs_evm_defconfig
+F: configs/k2g_hs_evm_defconfig
TQ GROUP
#M: Martin Krause <martin.krause@tq-systems.de>
--
GitLab
From 509b498a500afab1111d69f789b630c699b071a3 Mon Sep 17 00:00:00 2001
From: Lokesh Vutla <lokeshvutla@ti.com>
Date: Wed, 26 Apr 2017 16:58:22 +0530
Subject: [PATCH 154/282] ext4: Fix comparision of unsigned expression with < 0
In file ext4fs.c funtion ext4fs_read_file() compares an
unsigned expression with < 0 like below
lbaint_t blknr;
blknr = read_allocated_block(&(node->inode), i);
if (blknr < 0)
return -1;
blknr is of type ulong/uint64_t. read_allocated_block() returns
long int. So comparing blknr with < 0 will always be false. Instead
declare blknr as long int.
Similarly ext4/dev.c does a similar comparison. Drop the redundant
comparison.
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
---
fs/ext4/dev.c | 5 ++---
fs/ext4/ext4fs.c | 2 +-
2 files changed, 3 insertions(+), 4 deletions(-)
diff --git a/fs/ext4/dev.c b/fs/ext4/dev.c
index ee84d3fbe18..ae2ba6a9015 100644
--- a/fs/ext4/dev.c
+++ b/fs/ext4/dev.c
@@ -60,9 +60,8 @@ int ext4fs_devread(lbaint_t sector, int byte_offset, int byte_len, char *buf)
}
/* Check partition boundaries */
- if ((sector < 0) ||
- ((sector + ((byte_offset + byte_len - 1) >> log2blksz))
- >= part_info->size)) {
+ if ((sector + ((byte_offset + byte_len - 1) >> log2blksz))
+ >= part_info->size) {
printf("%s read outside partition " LBAFU "\n", __func__,
sector);
return 0;
diff --git a/fs/ext4/ext4fs.c b/fs/ext4/ext4fs.c
index 7187dcfb056..081509dbb4d 100644
--- a/fs/ext4/ext4fs.c
+++ b/fs/ext4/ext4fs.c
@@ -71,7 +71,7 @@ int ext4fs_read_file(struct ext2fs_node *node, loff_t pos,
blockcnt = lldiv(((len + pos) + blocksize - 1), blocksize);
for (i = lldiv(pos, blocksize); i < blockcnt; i++) {
- lbaint_t blknr;
+ long int blknr;
int blockoff = pos - (blocksize * i);
int blockend = blocksize;
int skipfirst = 0;
--
GitLab
From ae4e4dde5246cd27d0cce29a64761c33cb4ceee4 Mon Sep 17 00:00:00 2001
From: Jernej Skrabec <jernej.skrabec@siol.net>
Date: Thu, 27 Apr 2017 00:03:34 +0200
Subject: [PATCH 155/282] sunxi: power: Compile sy8106a driver only during SPL
build
Driver for that regulator is used only in SPL and it uses old I2C
interface. If we want to use DM I2C in U-Boot proper, compilation of
this driver has to be limited only to SPL.
Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
Reviewed-by: Heiko Schocher <hs@denx.de>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
---
drivers/power/sy8106a.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/power/sy8106a.c b/drivers/power/sy8106a.c
index bbf116f6559..f9db3965f2d 100644
--- a/drivers/power/sy8106a.c
+++ b/drivers/power/sy8106a.c
@@ -12,6 +12,7 @@
#define SY8106A_VOUT1_SEL 1
#define SY8106A_VOUT1_SEL_ENABLE (1 << 7)
+#ifdef CONFIG_SPL_BUILD
static u8 sy8106a_mvolt_to_cfg(int mvolt, int min, int max, int div)
{
if (mvolt < min)
@@ -27,3 +28,4 @@ int sy8106a_set_vout1(unsigned int mvolt)
u8 data = sy8106a_mvolt_to_cfg(mvolt, 680, 1950, 10) | SY8106A_VOUT1_SEL_ENABLE;
return i2c_write(SY8106A_I2C_ADDR, SY8106A_VOUT1_SEL, 1, &data, 1);
}
+#endif
--
GitLab
From acbc7e0a706bc12fe023034bfc4de72e86eb35ea Mon Sep 17 00:00:00 2001
From: Jernej Skrabec <jernej.skrabec@siol.net>
Date: Thu, 27 Apr 2017 00:03:35 +0200
Subject: [PATCH 156/282] sunxi: Move function for later convenience
This commit only moves i2c_init_board() function almost to the top and
doesn't have any functional changes.
This is needed for a temporary workaround in next commit when support
for DM I2C will be introduced.
Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
Reviewed-by: Heiko Schocher <hs@denx.de>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
---
board/sunxi/board.c | 188 ++++++++++++++++++++++----------------------
1 file changed, 94 insertions(+), 94 deletions(-)
diff --git a/board/sunxi/board.c b/board/sunxi/board.c
index 04a629125e0..f903a5d0a02 100644
--- a/board/sunxi/board.c
+++ b/board/sunxi/board.c
@@ -77,6 +77,100 @@ static int soft_i2c_board_init(void) { return 0; }
DECLARE_GLOBAL_DATA_PTR;
+void i2c_init_board(void)
+{
+#ifdef CONFIG_I2C0_ENABLE
+#if defined(CONFIG_MACH_SUN4I) || \
+ defined(CONFIG_MACH_SUN5I) || \
+ defined(CONFIG_MACH_SUN7I) || \
+ defined(CONFIG_MACH_SUN8I_R40)
+ sunxi_gpio_set_cfgpin(SUNXI_GPB(0), SUN4I_GPB_TWI0);
+ sunxi_gpio_set_cfgpin(SUNXI_GPB(1), SUN4I_GPB_TWI0);
+ clock_twi_onoff(0, 1);
+#elif defined(CONFIG_MACH_SUN6I)
+ sunxi_gpio_set_cfgpin(SUNXI_GPH(14), SUN6I_GPH_TWI0);
+ sunxi_gpio_set_cfgpin(SUNXI_GPH(15), SUN6I_GPH_TWI0);
+ clock_twi_onoff(0, 1);
+#elif defined(CONFIG_MACH_SUN8I)
+ sunxi_gpio_set_cfgpin(SUNXI_GPH(2), SUN8I_GPH_TWI0);
+ sunxi_gpio_set_cfgpin(SUNXI_GPH(3), SUN8I_GPH_TWI0);
+ clock_twi_onoff(0, 1);
+#endif
+#endif
+
+#ifdef CONFIG_I2C1_ENABLE
+#if defined(CONFIG_MACH_SUN4I) || \
+ defined(CONFIG_MACH_SUN7I) || \
+ defined(CONFIG_MACH_SUN8I_R40)
+ sunxi_gpio_set_cfgpin(SUNXI_GPB(18), SUN4I_GPB_TWI1);
+ sunxi_gpio_set_cfgpin(SUNXI_GPB(19), SUN4I_GPB_TWI1);
+ clock_twi_onoff(1, 1);
+#elif defined(CONFIG_MACH_SUN5I)
+ sunxi_gpio_set_cfgpin(SUNXI_GPB(15), SUN5I_GPB_TWI1);
+ sunxi_gpio_set_cfgpin(SUNXI_GPB(16), SUN5I_GPB_TWI1);
+ clock_twi_onoff(1, 1);
+#elif defined(CONFIG_MACH_SUN6I)
+ sunxi_gpio_set_cfgpin(SUNXI_GPH(16), SUN6I_GPH_TWI1);
+ sunxi_gpio_set_cfgpin(SUNXI_GPH(17), SUN6I_GPH_TWI1);
+ clock_twi_onoff(1, 1);
+#elif defined(CONFIG_MACH_SUN8I)
+ sunxi_gpio_set_cfgpin(SUNXI_GPH(4), SUN8I_GPH_TWI1);
+ sunxi_gpio_set_cfgpin(SUNXI_GPH(5), SUN8I_GPH_TWI1);
+ clock_twi_onoff(1, 1);
+#endif
+#endif
+
+#ifdef CONFIG_I2C2_ENABLE
+#if defined(CONFIG_MACH_SUN4I) || \
+ defined(CONFIG_MACH_SUN7I) || \
+ defined(CONFIG_MACH_SUN8I_R40)
+ sunxi_gpio_set_cfgpin(SUNXI_GPB(20), SUN4I_GPB_TWI2);
+ sunxi_gpio_set_cfgpin(SUNXI_GPB(21), SUN4I_GPB_TWI2);
+ clock_twi_onoff(2, 1);
+#elif defined(CONFIG_MACH_SUN5I)
+ sunxi_gpio_set_cfgpin(SUNXI_GPB(17), SUN5I_GPB_TWI2);
+ sunxi_gpio_set_cfgpin(SUNXI_GPB(18), SUN5I_GPB_TWI2);
+ clock_twi_onoff(2, 1);
+#elif defined(CONFIG_MACH_SUN6I)
+ sunxi_gpio_set_cfgpin(SUNXI_GPH(18), SUN6I_GPH_TWI2);
+ sunxi_gpio_set_cfgpin(SUNXI_GPH(19), SUN6I_GPH_TWI2);
+ clock_twi_onoff(2, 1);
+#elif defined(CONFIG_MACH_SUN8I)
+ sunxi_gpio_set_cfgpin(SUNXI_GPE(12), SUN8I_GPE_TWI2);
+ sunxi_gpio_set_cfgpin(SUNXI_GPE(13), SUN8I_GPE_TWI2);
+ clock_twi_onoff(2, 1);
+#endif
+#endif
+
+#ifdef CONFIG_I2C3_ENABLE
+#if defined(CONFIG_MACH_SUN6I)
+ sunxi_gpio_set_cfgpin(SUNXI_GPG(10), SUN6I_GPG_TWI3);
+ sunxi_gpio_set_cfgpin(SUNXI_GPG(11), SUN6I_GPG_TWI3);
+ clock_twi_onoff(3, 1);
+#elif defined(CONFIG_MACH_SUN7I) || \
+ defined(CONFIG_MACH_SUN8I_R40)
+ sunxi_gpio_set_cfgpin(SUNXI_GPI(0), SUN7I_GPI_TWI3);
+ sunxi_gpio_set_cfgpin(SUNXI_GPI(1), SUN7I_GPI_TWI3);
+ clock_twi_onoff(3, 1);
+#endif
+#endif
+
+#ifdef CONFIG_I2C4_ENABLE
+#if defined(CONFIG_MACH_SUN7I) || \
+ defined(CONFIG_MACH_SUN8I_R40)
+ sunxi_gpio_set_cfgpin(SUNXI_GPI(2), SUN7I_GPI_TWI4);
+ sunxi_gpio_set_cfgpin(SUNXI_GPI(3), SUN7I_GPI_TWI4);
+ clock_twi_onoff(4, 1);
+#endif
+#endif
+
+#ifdef CONFIG_R_I2C_ENABLE
+ clock_twi_onoff(5, 1);
+ sunxi_gpio_set_cfgpin(SUNXI_GPL(0), SUN8I_H3_GPL_R_TWI);
+ sunxi_gpio_set_cfgpin(SUNXI_GPL(1), SUN8I_H3_GPL_R_TWI);
+#endif
+}
+
/* add board specific code here */
int board_init(void)
{
@@ -406,100 +500,6 @@ int board_mmc_init(bd_t *bis)
}
#endif
-void i2c_init_board(void)
-{
-#ifdef CONFIG_I2C0_ENABLE
-#if defined(CONFIG_MACH_SUN4I) || \
- defined(CONFIG_MACH_SUN5I) || \
- defined(CONFIG_MACH_SUN7I) || \
- defined(CONFIG_MACH_SUN8I_R40)
- sunxi_gpio_set_cfgpin(SUNXI_GPB(0), SUN4I_GPB_TWI0);
- sunxi_gpio_set_cfgpin(SUNXI_GPB(1), SUN4I_GPB_TWI0);
- clock_twi_onoff(0, 1);
-#elif defined(CONFIG_MACH_SUN6I)
- sunxi_gpio_set_cfgpin(SUNXI_GPH(14), SUN6I_GPH_TWI0);
- sunxi_gpio_set_cfgpin(SUNXI_GPH(15), SUN6I_GPH_TWI0);
- clock_twi_onoff(0, 1);
-#elif defined(CONFIG_MACH_SUN8I)
- sunxi_gpio_set_cfgpin(SUNXI_GPH(2), SUN8I_GPH_TWI0);
- sunxi_gpio_set_cfgpin(SUNXI_GPH(3), SUN8I_GPH_TWI0);
- clock_twi_onoff(0, 1);
-#endif
-#endif
-
-#ifdef CONFIG_I2C1_ENABLE
-#if defined(CONFIG_MACH_SUN4I) || \
- defined(CONFIG_MACH_SUN7I) || \
- defined(CONFIG_MACH_SUN8I_R40)
- sunxi_gpio_set_cfgpin(SUNXI_GPB(18), SUN4I_GPB_TWI1);
- sunxi_gpio_set_cfgpin(SUNXI_GPB(19), SUN4I_GPB_TWI1);
- clock_twi_onoff(1, 1);
-#elif defined(CONFIG_MACH_SUN5I)
- sunxi_gpio_set_cfgpin(SUNXI_GPB(15), SUN5I_GPB_TWI1);
- sunxi_gpio_set_cfgpin(SUNXI_GPB(16), SUN5I_GPB_TWI1);
- clock_twi_onoff(1, 1);
-#elif defined(CONFIG_MACH_SUN6I)
- sunxi_gpio_set_cfgpin(SUNXI_GPH(16), SUN6I_GPH_TWI1);
- sunxi_gpio_set_cfgpin(SUNXI_GPH(17), SUN6I_GPH_TWI1);
- clock_twi_onoff(1, 1);
-#elif defined(CONFIG_MACH_SUN8I)
- sunxi_gpio_set_cfgpin(SUNXI_GPH(4), SUN8I_GPH_TWI1);
- sunxi_gpio_set_cfgpin(SUNXI_GPH(5), SUN8I_GPH_TWI1);
- clock_twi_onoff(1, 1);
-#endif
-#endif
-
-#ifdef CONFIG_I2C2_ENABLE
-#if defined(CONFIG_MACH_SUN4I) || \
- defined(CONFIG_MACH_SUN7I) || \
- defined(CONFIG_MACH_SUN8I_R40)
- sunxi_gpio_set_cfgpin(SUNXI_GPB(20), SUN4I_GPB_TWI2);
- sunxi_gpio_set_cfgpin(SUNXI_GPB(21), SUN4I_GPB_TWI2);
- clock_twi_onoff(2, 1);
-#elif defined(CONFIG_MACH_SUN5I)
- sunxi_gpio_set_cfgpin(SUNXI_GPB(17), SUN5I_GPB_TWI2);
- sunxi_gpio_set_cfgpin(SUNXI_GPB(18), SUN5I_GPB_TWI2);
- clock_twi_onoff(2, 1);
-#elif defined(CONFIG_MACH_SUN6I)
- sunxi_gpio_set_cfgpin(SUNXI_GPH(18), SUN6I_GPH_TWI2);
- sunxi_gpio_set_cfgpin(SUNXI_GPH(19), SUN6I_GPH_TWI2);
- clock_twi_onoff(2, 1);
-#elif defined(CONFIG_MACH_SUN8I)
- sunxi_gpio_set_cfgpin(SUNXI_GPE(12), SUN8I_GPE_TWI2);
- sunxi_gpio_set_cfgpin(SUNXI_GPE(13), SUN8I_GPE_TWI2);
- clock_twi_onoff(2, 1);
-#endif
-#endif
-
-#ifdef CONFIG_I2C3_ENABLE
-#if defined(CONFIG_MACH_SUN6I)
- sunxi_gpio_set_cfgpin(SUNXI_GPG(10), SUN6I_GPG_TWI3);
- sunxi_gpio_set_cfgpin(SUNXI_GPG(11), SUN6I_GPG_TWI3);
- clock_twi_onoff(3, 1);
-#elif defined(CONFIG_MACH_SUN7I) || \
- defined(CONFIG_MACH_SUN8I_R40)
- sunxi_gpio_set_cfgpin(SUNXI_GPI(0), SUN7I_GPI_TWI3);
- sunxi_gpio_set_cfgpin(SUNXI_GPI(1), SUN7I_GPI_TWI3);
- clock_twi_onoff(3, 1);
-#endif
-#endif
-
-#ifdef CONFIG_I2C4_ENABLE
-#if defined(CONFIG_MACH_SUN7I) || \
- defined(CONFIG_MACH_SUN8I_R40)
- sunxi_gpio_set_cfgpin(SUNXI_GPI(2), SUN7I_GPI_TWI4);
- sunxi_gpio_set_cfgpin(SUNXI_GPI(3), SUN7I_GPI_TWI4);
- clock_twi_onoff(4, 1);
-#endif
-#endif
-
-#ifdef CONFIG_R_I2C_ENABLE
- clock_twi_onoff(5, 1);
- sunxi_gpio_set_cfgpin(SUNXI_GPL(0), SUN8I_H3_GPL_R_TWI);
- sunxi_gpio_set_cfgpin(SUNXI_GPL(1), SUN8I_H3_GPL_R_TWI);
-#endif
-}
-
#ifdef CONFIG_SPL_BUILD
void sunxi_board_init(void)
{
--
GitLab
From a8f01ccff2abf680449b2e694284ecf089b5d9be Mon Sep 17 00:00:00 2001
From: Jernej Skrabec <jernej.skrabec@siol.net>
Date: Thu, 27 Apr 2017 00:03:36 +0200
Subject: [PATCH 157/282] sunxi: i2c: Add support for DM I2C
This commit adds support for DM I2C on sunxi platform. It can coexist
with old style sunxi I2C driver, because it is still used in SPL and
by some SoCs.
Because sunxi platform doesn't yet support DM clk, reset and pinctrl
driver, workaround is needed to enable clocks and set resets and
pinctrls. This is done by calling i2c_init_board() in board_init().
This means that CONFIG_I2Cx_ENABLE options needs to be correctly set
in order to use needed I2C controller.
Commit is based on the previous patch made by Philipp Tomsich
Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
Reviewed-by: Heiko Schocher <hs@denx.de>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
---
arch/arm/mach-sunxi/board.c | 2 ++
board/sunxi/board.c | 8 ++++++++
drivers/i2c/mvtwsi.c | 9 +++++++++
include/configs/sunxi-common.h | 4 +++-
4 files changed, 22 insertions(+), 1 deletion(-)
diff --git a/arch/arm/mach-sunxi/board.c b/arch/arm/mach-sunxi/board.c
index 4507279cc55..65b1ebd8378 100644
--- a/arch/arm/mach-sunxi/board.c
+++ b/arch/arm/mach-sunxi/board.c
@@ -204,7 +204,9 @@ void s_init(void)
clock_init();
timer_init();
gpio_init();
+#ifndef CONFIG_DM_I2C
i2c_init_board();
+#endif
eth_init_board();
}
diff --git a/board/sunxi/board.c b/board/sunxi/board.c
index f903a5d0a02..01de42d0318 100644
--- a/board/sunxi/board.c
+++ b/board/sunxi/board.c
@@ -222,6 +222,14 @@ int board_init(void)
gpio_direction_output(macpwr_pin, 1);
#endif
+#ifdef CONFIG_DM_I2C
+ /*
+ * Temporary workaround for enabling I2C clocks until proper sunxi DM
+ * clk, reset and pinctrl drivers land.
+ */
+ i2c_init_board();
+#endif
+
/* Uses dm gpio code so do this here and not in i2c_init_board() */
return soft_i2c_board_init();
}
diff --git a/drivers/i2c/mvtwsi.c b/drivers/i2c/mvtwsi.c
index 648a96eeb4e..3703519aa52 100644
--- a/drivers/i2c/mvtwsi.c
+++ b/drivers/i2c/mvtwsi.c
@@ -36,6 +36,14 @@ DECLARE_GLOBAL_DATA_PTR;
#endif
#endif /* CONFIG_DM_I2C */
+/*
+ * On SUNXI, we get CONFIG_SYS_TCLK from this include, so we want to
+ * always have it.
+ */
+#if defined(CONFIG_DM_I2C) && defined(CONFIG_ARCH_SUNXI)
+#include <asm/arch/i2c.h>
+#endif
+
/*
* TWSI register structure
*/
@@ -831,6 +839,7 @@ static const struct dm_i2c_ops mvtwsi_i2c_ops = {
static const struct udevice_id mvtwsi_i2c_ids[] = {
{ .compatible = "marvell,mv64xxx-i2c", },
{ .compatible = "marvell,mv78230-i2c", },
+ { .compatible = "allwinner,sun6i-a31-i2c", },
{ /* sentinel */ }
};
diff --git a/include/configs/sunxi-common.h b/include/configs/sunxi-common.h
index 64a190059ac..b794e427bb8 100644
--- a/include/configs/sunxi-common.h
+++ b/include/configs/sunxi-common.h
@@ -211,11 +211,13 @@
#if defined CONFIG_I2C0_ENABLE || defined CONFIG_I2C1_ENABLE || \
defined CONFIG_I2C2_ENABLE || defined CONFIG_I2C3_ENABLE || \
defined CONFIG_I2C4_ENABLE || defined CONFIG_R_I2C_ENABLE
-#define CONFIG_SYS_I2C
#define CONFIG_SYS_I2C_MVTWSI
+#ifndef CONFIG_DM_I2C
+#define CONFIG_SYS_I2C
#define CONFIG_SYS_I2C_SPEED 400000
#define CONFIG_SYS_I2C_SLAVE 0x7f
#endif
+#endif
#if defined CONFIG_VIDEO_LCD_PANEL_I2C && !(defined CONFIG_SPL_BUILD)
#define CONFIG_SYS_I2C_SOFT
--
GitLab
From a05a45493d9fc0bd7f1da2f62ffdfb64caf8a3c7 Mon Sep 17 00:00:00 2001
From: Jernej Skrabec <jernej.skrabec@siol.net>
Date: Thu, 27 Apr 2017 00:03:37 +0200
Subject: [PATCH 158/282] sunxi: Enable DM_I2C for A64/H3/H5
This commits enable DM I2C support for A64/H3/H5 SoCs.
It is not enabled globaly for all sunxi SoCs, because some boards use
PMICs which are connected through I2C. In order to keep same
functionality, PMIC drivers needs to be ported to DM too.
Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
Reviewed-by: Heiko Schocher <hs@denx.de>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
---
board/sunxi/Kconfig | 2 ++
1 file changed, 2 insertions(+)
diff --git a/board/sunxi/Kconfig b/board/sunxi/Kconfig
index b47034f4175..903cd482a52 100644
--- a/board/sunxi/Kconfig
+++ b/board/sunxi/Kconfig
@@ -58,6 +58,7 @@ config SUNXI_GEN_SUN6I
config MACH_SUNXI_H3_H5
bool
+ select DM_I2C
select SUNXI_DE2
select SUNXI_GEN_SUN6I
select SUPPORT_SPL
@@ -163,6 +164,7 @@ config MACH_SUN9I
config MACH_SUN50I
bool "sun50i (Allwinner A64)"
select ARM64
+ select DM_I2C
select SUNXI_DE2
select SUNXI_GEN_SUN6I
select SUNXI_HIGH_SRAM
--
GitLab
From 56009451d843e8ccaff3408d172fe13af23e2756 Mon Sep 17 00:00:00 2001
From: Jernej Skrabec <jernej.skrabec@siol.net>
Date: Mon, 27 Mar 2017 19:22:32 +0200
Subject: [PATCH 159/282] sunxi: video: Add A64/H3/H5 HDMI driver
This commit adds support for HDMI output.
Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
Reviewed-by: Simon Glass <sjg@chromium.org>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
---
arch/arm/include/asm/arch-sunxi/cpu_sun4i.h | 8 +
arch/arm/include/asm/arch-sunxi/display2.h | 124 +++++++
board/sunxi/Kconfig | 10 +
drivers/video/sunxi/Makefile | 1 +
drivers/video/sunxi/sunxi_de2.c | 258 +++++++++++++
drivers/video/sunxi/sunxi_dw_hdmi.c | 389 ++++++++++++++++++++
include/configs/sunxi-common.h | 5 +
7 files changed, 795 insertions(+)
create mode 100644 arch/arm/include/asm/arch-sunxi/display2.h
create mode 100644 drivers/video/sunxi/sunxi_de2.c
create mode 100644 drivers/video/sunxi/sunxi_dw_hdmi.c
diff --git a/arch/arm/include/asm/arch-sunxi/cpu_sun4i.h b/arch/arm/include/asm/arch-sunxi/cpu_sun4i.h
index 88c3f138173..6aa5e91adae 100644
--- a/arch/arm/include/asm/arch-sunxi/cpu_sun4i.h
+++ b/arch/arm/include/asm/arch-sunxi/cpu_sun4i.h
@@ -18,6 +18,8 @@
#define SUNXI_SRAM_D_BASE 0x00010000 /* 4 kiB */
#define SUNXI_SRAM_B_BASE 0x00020000 /* 64 kiB (secure) */
+#define SUNXI_DE2_BASE 0x01000000
+
#ifdef CONFIG_MACH_SUN8I_A83T
#define SUNXI_CPUCFG_BASE 0x01700000
#endif
@@ -46,7 +48,9 @@
#define SUNXI_USB1_BASE 0x01c14000
#endif
#define SUNXI_SS_BASE 0x01c15000
+#if !defined(CONFIG_MACH_SUNXI_H3_H5) && !defined(CONFIG_MACH_SUN50I)
#define SUNXI_HDMI_BASE 0x01c16000
+#endif
#define SUNXI_SPI2_BASE 0x01c17000
#define SUNXI_SATA_BASE 0x01c18000
#ifdef CONFIG_SUNXI_GEN_SUN4I
@@ -164,6 +168,10 @@ defined(CONFIG_MACH_SUN50I)
#define SUNXI_MP_BASE 0x01e80000
#define SUNXI_AVG_BASE 0x01ea0000
+#if defined(CONFIG_MACH_SUNXI_H3_H5) || defined(CONFIG_MACH_SUN50I)
+#define SUNXI_HDMI_BASE 0x01ee0000
+#endif
+
#define SUNXI_RTC_BASE 0x01f00000
#define SUNXI_PRCM_BASE 0x01f01400
diff --git a/arch/arm/include/asm/arch-sunxi/display2.h b/arch/arm/include/asm/arch-sunxi/display2.h
new file mode 100644
index 00000000000..b5875f96050
--- /dev/null
+++ b/arch/arm/include/asm/arch-sunxi/display2.h
@@ -0,0 +1,124 @@
+/*
+ * Sunxi platform display controller register and constant defines
+ *
+ * (C) Copyright 2017 Jernej Skrabec <jernej.skrabec@siol.net>
+ *
+ * Based on out of tree Linux DRM driver defines:
+ * Copyright (C) 2016 Jean-Francois Moine <moinejf@free.fr>
+ * Copyright (c) 2016 Allwinnertech Co., Ltd.
+*
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#ifndef _SUNXI_DISPLAY2_H
+#define _SUNXI_DISPLAY2_H
+
+/* internal clock settings */
+struct de_clk {
+ u32 gate_cfg;
+ u32 bus_cfg;
+ u32 rst_cfg;
+ u32 div_cfg;
+ u32 sel_cfg;
+};
+
+/* global control */
+struct de_glb {
+ u32 ctl;
+ u32 status;
+ u32 dbuff;
+ u32 size;
+};
+
+/* alpha blending */
+struct de_bld {
+ u32 fcolor_ctl;
+ struct {
+ u32 fcolor;
+ u32 insize;
+ u32 offset;
+ u32 dum;
+ } attr[4];
+ u32 dum0[15];
+ u32 route;
+ u32 premultiply;
+ u32 bkcolor;
+ u32 output_size;
+ u32 bld_mode[4];
+ u32 dum1[4];
+ u32 ck_ctl;
+ u32 ck_cfg;
+ u32 dum2[2];
+ u32 ck_max[4];
+ u32 dum3[4];
+ u32 ck_min[4];
+ u32 dum4[3];
+ u32 out_ctl;
+};
+
+/* VI channel */
+struct de_vi {
+ struct {
+ u32 attr;
+ u32 size;
+ u32 coord;
+ u32 pitch[3];
+ u32 top_laddr[3];
+ u32 bot_laddr[3];
+ } cfg[4];
+ u32 fcolor[4];
+ u32 top_haddr[3];
+ u32 bot_haddr[3];
+ u32 ovl_size[2];
+ u32 hori[2];
+ u32 vert[2];
+};
+
+struct de_ui {
+ struct {
+ u32 attr;
+ u32 size;
+ u32 coord;
+ u32 pitch;
+ u32 top_laddr;
+ u32 bot_laddr;
+ u32 fcolor;
+ u32 dum;
+ } cfg[4];
+ u32 top_haddr;
+ u32 bot_haddr;
+ u32 ovl_size;
+};
+
+/*
+ * DE register constants.
+ */
+#define SUNXI_DE2_MUX0_BASE (SUNXI_DE2_BASE + 0x100000)
+#define SUNXI_DE2_MUX1_BASE (SUNXI_DE2_BASE + 0x200000)
+
+#define SUNXI_DE2_MUX_GLB_REGS 0x00000
+#define SUNXI_DE2_MUX_BLD_REGS 0x01000
+#define SUNXI_DE2_MUX_CHAN_REGS 0x02000
+#define SUNXI_DE2_MUX_CHAN_SZ 0x1000
+#define SUNXI_DE2_MUX_VSU_REGS 0x20000
+#define SUNXI_DE2_MUX_GSU1_REGS 0x30000
+#define SUNXI_DE2_MUX_GSU2_REGS 0x40000
+#define SUNXI_DE2_MUX_GSU3_REGS 0x50000
+#define SUNXI_DE2_MUX_FCE_REGS 0xa0000
+#define SUNXI_DE2_MUX_BWS_REGS 0xa2000
+#define SUNXI_DE2_MUX_LTI_REGS 0xa4000
+#define SUNXI_DE2_MUX_PEAK_REGS 0xa6000
+#define SUNXI_DE2_MUX_ASE_REGS 0xa8000
+#define SUNXI_DE2_MUX_FCC_REGS 0xaa000
+#define SUNXI_DE2_MUX_DCSC_REGS 0xb0000
+
+#define SUNXI_DE2_FORMAT_XRGB_8888 4
+#define SUNXI_DE2_FORMAT_RGB_565 10
+
+#define SUNXI_DE2_MUX_GLB_CTL_EN (1 << 0)
+#define SUNXI_DE2_UI_CFG_ATTR_EN (1 << 0)
+#define SUNXI_DE2_UI_CFG_ATTR_FMT(f) ((f & 0xf) << 8)
+
+#define SUNXI_DE2_WH(w, h) (((h - 1) << 16) | (w - 1))
+
+#endif /* _SUNXI_DISPLAY2_H */
diff --git a/board/sunxi/Kconfig b/board/sunxi/Kconfig
index 903cd482a52..ac3be300fed 100644
--- a/board/sunxi/Kconfig
+++ b/board/sunxi/Kconfig
@@ -708,6 +708,16 @@ config SUNXI_DE2
bool
default n
+config VIDEO_DE2
+ bool "Display Engine 2 video driver"
+ depends on SUNXI_DE2
+ select DM_VIDEO
+ select DISPLAY
+ default y
+ ---help---
+ Say y here if you want to build DE2 video driver which is present on
+ newer SoCs. Currently only HDMI output is supported.
+
choice
prompt "LCD panel support"
diff --git a/drivers/video/sunxi/Makefile b/drivers/video/sunxi/Makefile
index dfc9b47a1f6..b8afd892ad7 100644
--- a/drivers/video/sunxi/Makefile
+++ b/drivers/video/sunxi/Makefile
@@ -6,3 +6,4 @@
#
obj-$(CONFIG_VIDEO_SUNXI) += sunxi_display.o lcdc.o ../videomodes.o
+obj-$(CONFIG_VIDEO_DE2) += sunxi_de2.o sunxi_dw_hdmi.o lcdc.o ../dw_hdmi.o
diff --git a/drivers/video/sunxi/sunxi_de2.c b/drivers/video/sunxi/sunxi_de2.c
new file mode 100644
index 00000000000..9a32c3a0209
--- /dev/null
+++ b/drivers/video/sunxi/sunxi_de2.c
@@ -0,0 +1,258 @@
+/*
+ * Allwinner DE2 display driver
+ *
+ * (C) Copyright 2017 Jernej Skrabec <jernej.skrabec@siol.net>
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include <common.h>
+#include <display.h>
+#include <dm.h>
+#include <edid.h>
+#include <video.h>
+#include <asm/global_data.h>
+#include <asm/io.h>
+#include <asm/arch/clock.h>
+#include <asm/arch/display2.h>
+#include <dm/device-internal.h>
+#include <dm/uclass-internal.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+enum {
+ /* Maximum LCD size we support */
+ LCD_MAX_WIDTH = 3840,
+ LCD_MAX_HEIGHT = 2160,
+ LCD_MAX_LOG2_BPP = VIDEO_BPP32,
+};
+
+static void sunxi_de2_composer_init(void)
+{
+ struct sunxi_ccm_reg * const ccm =
+ (struct sunxi_ccm_reg *)SUNXI_CCM_BASE;
+
+#ifdef CONFIG_MACH_SUN50I
+ u32 reg_value;
+
+ /* set SRAM for video use (A64 only) */
+ reg_value = readl(SUNXI_SRAMC_BASE + 0x04);
+ reg_value &= ~(0x01 << 24);
+ writel(reg_value, SUNXI_SRAMC_BASE + 0x04);
+#endif
+
+ clock_set_pll10(432000000);
+
+ /* Set DE parent to pll10 */
+ clrsetbits_le32(&ccm->de_clk_cfg, CCM_DE2_CTRL_PLL_MASK,
+ CCM_DE2_CTRL_PLL10);
+
+ /* Set ahb gating to pass */
+ setbits_le32(&ccm->ahb_reset1_cfg, 1 << AHB_RESET_OFFSET_DE);
+ setbits_le32(&ccm->ahb_gate1, 1 << AHB_GATE_OFFSET_DE);
+
+ /* Clock on */
+ setbits_le32(&ccm->de_clk_cfg, CCM_DE2_CTRL_GATE);
+}
+
+static void sunxi_de2_mode_set(int mux, const struct display_timing *mode,
+ int bpp, ulong address)
+{
+ ulong de_mux_base = (mux == 0) ?
+ SUNXI_DE2_MUX0_BASE : SUNXI_DE2_MUX1_BASE;
+ struct de_clk * const de_clk_regs =
+ (struct de_clk *)(SUNXI_DE2_BASE);
+ struct de_glb * const de_glb_regs =
+ (struct de_glb *)(de_mux_base +
+ SUNXI_DE2_MUX_GLB_REGS);
+ struct de_bld * const de_bld_regs =
+ (struct de_bld *)(de_mux_base +
+ SUNXI_DE2_MUX_BLD_REGS);
+ struct de_ui * const de_ui_regs =
+ (struct de_ui *)(de_mux_base +
+ SUNXI_DE2_MUX_CHAN_REGS +
+ SUNXI_DE2_MUX_CHAN_SZ * 1);
+ u32 size = SUNXI_DE2_WH(mode->hactive.typ, mode->vactive.typ);
+ int channel;
+ u32 format;
+
+ /* enable clock */
+#ifdef CONFIG_MACH_SUN8I_H3
+ setbits_le32(&de_clk_regs->rst_cfg, (mux == 0) ? 1 : 4);
+#else
+ setbits_le32(&de_clk_regs->rst_cfg, BIT(mux));
+#endif
+ setbits_le32(&de_clk_regs->gate_cfg, BIT(mux));
+ setbits_le32(&de_clk_regs->bus_cfg, BIT(mux));
+
+ clrbits_le32(&de_clk_regs->sel_cfg, 1);
+
+ writel(SUNXI_DE2_MUX_GLB_CTL_EN, &de_glb_regs->ctl);
+ writel(0, &de_glb_regs->status);
+ writel(1, &de_glb_regs->dbuff);
+ writel(size, &de_glb_regs->size);
+
+ for (channel = 0; channel < 4; channel++) {
+ void *ch = (void *)(de_mux_base + SUNXI_DE2_MUX_CHAN_REGS +
+ SUNXI_DE2_MUX_CHAN_SZ * channel);
+ memset(ch, 0, (channel == 0) ?
+ sizeof(struct de_vi) : sizeof(struct de_ui));
+ }
+ memset(de_bld_regs, 0, sizeof(struct de_bld));
+
+ writel(0x00000101, &de_bld_regs->fcolor_ctl);
+
+ writel(1, &de_bld_regs->route);
+
+ writel(0, &de_bld_regs->premultiply);
+ writel(0xff000000, &de_bld_regs->bkcolor);
+
+ writel(0x03010301, &de_bld_regs->bld_mode[0]);
+
+ writel(size, &de_bld_regs->output_size);
+ writel(mode->flags & DISPLAY_FLAGS_INTERLACED ? 2 : 0,
+ &de_bld_regs->out_ctl);
+ writel(0, &de_bld_regs->ck_ctl);
+
+ writel(0xff000000, &de_bld_regs->attr[0].fcolor);
+ writel(size, &de_bld_regs->attr[0].insize);
+
+ /* Disable all other units */
+ writel(0, de_mux_base + SUNXI_DE2_MUX_VSU_REGS);
+ writel(0, de_mux_base + SUNXI_DE2_MUX_GSU1_REGS);
+ writel(0, de_mux_base + SUNXI_DE2_MUX_GSU2_REGS);
+ writel(0, de_mux_base + SUNXI_DE2_MUX_GSU3_REGS);
+ writel(0, de_mux_base + SUNXI_DE2_MUX_FCE_REGS);
+ writel(0, de_mux_base + SUNXI_DE2_MUX_BWS_REGS);
+ writel(0, de_mux_base + SUNXI_DE2_MUX_LTI_REGS);
+ writel(0, de_mux_base + SUNXI_DE2_MUX_PEAK_REGS);
+ writel(0, de_mux_base + SUNXI_DE2_MUX_ASE_REGS);
+ writel(0, de_mux_base + SUNXI_DE2_MUX_FCC_REGS);
+ writel(0, de_mux_base + SUNXI_DE2_MUX_DCSC_REGS);
+
+ switch (bpp) {
+ case 16:
+ format = SUNXI_DE2_UI_CFG_ATTR_FMT(SUNXI_DE2_FORMAT_RGB_565);
+ break;
+ case 32:
+ default:
+ format = SUNXI_DE2_UI_CFG_ATTR_FMT(SUNXI_DE2_FORMAT_XRGB_8888);
+ break;
+ }
+
+ writel(SUNXI_DE2_UI_CFG_ATTR_EN | format, &de_ui_regs->cfg[0].attr);
+ writel(size, &de_ui_regs->cfg[0].size);
+ writel(0, &de_ui_regs->cfg[0].coord);
+ writel((bpp / 8) * mode->hactive.typ, &de_ui_regs->cfg[0].pitch);
+ writel(address, &de_ui_regs->cfg[0].top_laddr);
+ writel(size, &de_ui_regs->ovl_size);
+
+ /* apply settings */
+ writel(1, &de_glb_regs->dbuff);
+}
+
+static int sunxi_de2_init(struct udevice *dev, ulong fbbase,
+ enum video_log2_bpp l2bpp,
+ struct udevice *disp, int mux)
+{
+ struct video_priv *uc_priv = dev_get_uclass_priv(dev);
+ struct display_timing timing;
+ struct display_plat *disp_uc_plat;
+ int ret;
+
+ disp_uc_plat = dev_get_uclass_platdata(disp);
+ debug("Using device '%s', disp_uc_priv=%p\n", disp->name, disp_uc_plat);
+ if (display_in_use(disp)) {
+ debug(" - device in use\n");
+ return -EBUSY;
+ }
+
+ disp_uc_plat->source_id = mux;
+
+ ret = device_probe(disp);
+ if (ret) {
+ debug("%s: device '%s' display won't probe (ret=%d)\n",
+ __func__, dev->name, ret);
+ return ret;
+ }
+
+ ret = display_read_timing(disp, &timing);
+ if (ret) {
+ debug("%s: Failed to read timings\n", __func__);
+ return ret;
+ }
+
+ sunxi_de2_composer_init();
+ sunxi_de2_mode_set(mux, &timing, 1 << l2bpp, fbbase);
+
+ ret = display_enable(disp, 1 << l2bpp, &timing);
+ if (ret) {
+ debug("%s: Failed to enable display\n", __func__);
+ return ret;
+ }
+
+ uc_priv->xsize = timing.hactive.typ;
+ uc_priv->ysize = timing.vactive.typ;
+ uc_priv->bpix = l2bpp;
+ debug("fb=%lx, size=%d %d\n", fbbase, uc_priv->xsize, uc_priv->ysize);
+
+ return 0;
+}
+
+static int sunxi_de2_probe(struct udevice *dev)
+{
+ struct video_uc_platdata *plat = dev_get_uclass_platdata(dev);
+ struct udevice *disp;
+ int ret;
+ int mux;
+
+ /* Before relocation we don't need to do anything */
+ if (!(gd->flags & GD_FLG_RELOC))
+ return 0;
+
+ ret = uclass_find_device_by_name(UCLASS_DISPLAY,
+ "sunxi_dw_hdmi", &disp);
+ if (ret) {
+ debug("%s: hdmi display not found (ret=%d)\n", __func__, ret);
+ return ret;
+ }
+
+ if (IS_ENABLED(CONFIG_MACH_SUNXI_H3_H5))
+ mux = 0;
+ else
+ mux = 1;
+
+ ret = sunxi_de2_init(dev, plat->base, VIDEO_BPP32, disp, mux);
+ if (ret)
+ return ret;
+
+ video_set_flush_dcache(dev, 1);
+
+ return 0;
+}
+
+static int sunxi_de2_bind(struct udevice *dev)
+{
+ struct video_uc_platdata *plat = dev_get_uclass_platdata(dev);
+
+ plat->size = LCD_MAX_WIDTH * LCD_MAX_HEIGHT *
+ (1 << LCD_MAX_LOG2_BPP) / 8;
+
+ return 0;
+}
+
+static const struct video_ops sunxi_de2_ops = {
+};
+
+U_BOOT_DRIVER(sunxi_de2) = {
+ .name = "sunxi_de2",
+ .id = UCLASS_VIDEO,
+ .ops = &sunxi_de2_ops,
+ .bind = sunxi_de2_bind,
+ .probe = sunxi_de2_probe,
+ .flags = DM_FLAG_PRE_RELOC,
+};
+
+U_BOOT_DEVICE(sunxi_de2) = {
+ .name = "sunxi_de2"
+};
diff --git a/drivers/video/sunxi/sunxi_dw_hdmi.c b/drivers/video/sunxi/sunxi_dw_hdmi.c
new file mode 100644
index 00000000000..33920a2b676
--- /dev/null
+++ b/drivers/video/sunxi/sunxi_dw_hdmi.c
@@ -0,0 +1,389 @@
+/*
+ * Allwinner DW HDMI bridge
+ *
+ * (C) Copyright 2017 Jernej Skrabec <jernej.skrabec@siol.net>
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include <common.h>
+#include <display.h>
+#include <dm.h>
+#include <dw_hdmi.h>
+#include <edid.h>
+#include <asm/io.h>
+#include <asm/arch/clock.h>
+#include <asm/arch/lcdc.h>
+
+struct sunxi_dw_hdmi_priv {
+ struct dw_hdmi hdmi;
+ int mux;
+};
+
+struct sunxi_hdmi_phy {
+ u32 pol;
+ u32 res1[3];
+ u32 read_en;
+ u32 unscramble;
+ u32 res2[2];
+ u32 ctrl;
+ u32 unk1;
+ u32 unk2;
+ u32 pll;
+ u32 clk;
+ u32 unk3;
+ u32 status;
+};
+
+#define HDMI_PHY_OFFS 0x10000
+
+static int sunxi_dw_hdmi_get_divider(uint clock)
+{
+ /*
+ * Due to missing documentaion of HDMI PHY, we know correct
+ * settings only for following four PHY dividers. Select one
+ * based on clock speed.
+ */
+ if (clock <= 27000000)
+ return 11;
+ else if (clock <= 74250000)
+ return 4;
+ else if (clock <= 148500000)
+ return 2;
+ else
+ return 1;
+}
+
+static void sunxi_dw_hdmi_phy_init(void)
+{
+ struct sunxi_hdmi_phy * const phy =
+ (struct sunxi_hdmi_phy *)(SUNXI_HDMI_BASE + HDMI_PHY_OFFS);
+ unsigned long tmo;
+ u32 tmp;
+
+ /*
+ * HDMI PHY settings are taken as-is from Allwinner BSP code.
+ * There is no documentation.
+ */
+ writel(0, &phy->ctrl);
+ setbits_le32(&phy->ctrl, BIT(0));
+ udelay(5);
+ setbits_le32(&phy->ctrl, BIT(16));
+ setbits_le32(&phy->ctrl, BIT(1));
+ udelay(10);
+ setbits_le32(&phy->ctrl, BIT(2));
+ udelay(5);
+ setbits_le32(&phy->ctrl, BIT(3));
+ udelay(40);
+ setbits_le32(&phy->ctrl, BIT(19));
+ udelay(100);
+ setbits_le32(&phy->ctrl, BIT(18));
+ setbits_le32(&phy->ctrl, 7 << 4);
+
+ /* Note that Allwinner code doesn't fail in case of timeout */
+ tmo = timer_get_us() + 2000;
+ while ((readl(&phy->status) & 0x80) == 0) {
+ if (timer_get_us() > tmo) {
+ printf("Warning: HDMI PHY init timeout!\n");
+ break;
+ }
+ }
+
+ setbits_le32(&phy->ctrl, 0xf << 8);
+ setbits_le32(&phy->ctrl, BIT(7));
+
+ writel(0x39dc5040, &phy->pll);
+ writel(0x80084343, &phy->clk);
+ udelay(10000);
+ writel(1, &phy->unk3);
+ setbits_le32(&phy->pll, BIT(25));
+ udelay(100000);
+ tmp = (readl(&phy->status) & 0x1f800) >> 11;
+ setbits_le32(&phy->pll, BIT(31) | BIT(30));
+ setbits_le32(&phy->pll, tmp);
+ writel(0x01FF0F7F, &phy->ctrl);
+ writel(0x80639000, &phy->unk1);
+ writel(0x0F81C405, &phy->unk2);
+
+ /* enable read access to HDMI controller */
+ writel(0x54524545, &phy->read_en);
+ /* descramble register offsets */
+ writel(0x42494E47, &phy->unscramble);
+}
+
+static int sunxi_dw_hdmi_get_plug_in_status(void)
+{
+ struct sunxi_hdmi_phy * const phy =
+ (struct sunxi_hdmi_phy *)(SUNXI_HDMI_BASE + HDMI_PHY_OFFS);
+
+ return !!(readl(&phy->status) & (1 << 19));
+}
+
+static int sunxi_dw_hdmi_wait_for_hpd(void)
+{
+ ulong start;
+
+ start = get_timer(0);
+ do {
+ if (sunxi_dw_hdmi_get_plug_in_status())
+ return 0;
+ udelay(100);
+ } while (get_timer(start) < 300);
+
+ return -1;
+}
+
+static void sunxi_dw_hdmi_phy_set(uint clock)
+{
+ struct sunxi_hdmi_phy * const phy =
+ (struct sunxi_hdmi_phy *)(SUNXI_HDMI_BASE + HDMI_PHY_OFFS);
+ int div = sunxi_dw_hdmi_get_divider(clock);
+ u32 tmp;
+
+ /*
+ * Unfortunately, we don't know much about those magic
+ * numbers. They are taken from Allwinner BSP driver.
+ */
+ switch (div) {
+ case 1:
+ writel(0x30dc5fc0, &phy->pll);
+ writel(0x800863C0, &phy->clk);
+ mdelay(10);
+ writel(0x00000001, &phy->unk3);
+ setbits_le32(&phy->pll, BIT(25));
+ mdelay(200);
+ tmp = (readl(&phy->status) & 0x1f800) >> 11;
+ setbits_le32(&phy->pll, BIT(31) | BIT(30));
+ if (tmp < 0x3d)
+ setbits_le32(&phy->pll, tmp + 2);
+ else
+ setbits_le32(&phy->pll, 0x3f);
+ mdelay(100);
+ writel(0x01FFFF7F, &phy->ctrl);
+ writel(0x8063b000, &phy->unk1);
+ writel(0x0F8246B5, &phy->unk2);
+ break;
+ case 2:
+ writel(0x39dc5040, &phy->pll);
+ writel(0x80084381, &phy->clk);
+ mdelay(10);
+ writel(0x00000001, &phy->unk3);
+ setbits_le32(&phy->pll, BIT(25));
+ mdelay(100);
+ tmp = (readl(&phy->status) & 0x1f800) >> 11;
+ setbits_le32(&phy->pll, BIT(31) | BIT(30));
+ setbits_le32(&phy->pll, tmp);
+ writel(0x01FFFF7F, &phy->ctrl);
+ writel(0x8063a800, &phy->unk1);
+ writel(0x0F81C485, &phy->unk2);
+ break;
+ case 4:
+ writel(0x39dc5040, &phy->pll);
+ writel(0x80084343, &phy->clk);
+ mdelay(10);
+ writel(0x00000001, &phy->unk3);
+ setbits_le32(&phy->pll, BIT(25));
+ mdelay(100);
+ tmp = (readl(&phy->status) & 0x1f800) >> 11;
+ setbits_le32(&phy->pll, BIT(31) | BIT(30));
+ setbits_le32(&phy->pll, tmp);
+ writel(0x01FFFF7F, &phy->ctrl);
+ writel(0x8063b000, &phy->unk1);
+ writel(0x0F81C405, &phy->unk2);
+ break;
+ case 11:
+ writel(0x39dc5040, &phy->pll);
+ writel(0x8008430a, &phy->clk);
+ mdelay(10);
+ writel(0x00000001, &phy->unk3);
+ setbits_le32(&phy->pll, BIT(25));
+ mdelay(100);
+ tmp = (readl(&phy->status) & 0x1f800) >> 11;
+ setbits_le32(&phy->pll, BIT(31) | BIT(30));
+ setbits_le32(&phy->pll, tmp);
+ writel(0x01FFFF7F, &phy->ctrl);
+ writel(0x8063b000, &phy->unk1);
+ writel(0x0F81C405, &phy->unk2);
+ break;
+ }
+}
+
+static void sunxi_dw_hdmi_pll_set(uint clk_khz)
+{
+ int value, n, m, div = 0, diff;
+ int best_n = 0, best_m = 0, best_diff = 0x0FFFFFFF;
+
+ div = sunxi_dw_hdmi_get_divider(clk_khz * 1000);
+
+ /*
+ * Find the lowest divider resulting in a matching clock. If there
+ * is no match, pick the closest lower clock, as monitors tend to
+ * not sync to higher frequencies.
+ */
+ for (m = 1; m <= 16; m++) {
+ n = (m * div * clk_khz) / 24000;
+
+ if ((n >= 1) && (n <= 128)) {
+ value = (24000 * n) / m / div;
+ diff = clk_khz - value;
+ if (diff < best_diff) {
+ best_diff = diff;
+ best_m = m;
+ best_n = n;
+ }
+ }
+ }
+
+ clock_set_pll3_factors(best_m, best_n);
+ debug("dotclock: %dkHz = %dkHz: (24MHz * %d) / %d / %d\n",
+ clk_khz, (clock_get_pll3() / 1000) / div,
+ best_n, best_m, div);
+}
+
+static void sunxi_dw_hdmi_lcdc_init(int mux, const struct display_timing *edid,
+ int bpp)
+{
+ struct sunxi_ccm_reg * const ccm =
+ (struct sunxi_ccm_reg *)SUNXI_CCM_BASE;
+ int div = sunxi_dw_hdmi_get_divider(edid->pixelclock.typ);
+ struct sunxi_lcdc_reg *lcdc;
+
+ if (mux == 0) {
+ lcdc = (struct sunxi_lcdc_reg *)SUNXI_LCD0_BASE;
+
+ /* Reset off */
+ setbits_le32(&ccm->ahb_reset1_cfg, 1 << AHB_RESET_OFFSET_LCD0);
+
+ /* Clock on */
+ setbits_le32(&ccm->ahb_gate1, 1 << AHB_GATE_OFFSET_LCD0);
+ writel(CCM_LCD0_CTRL_GATE | CCM_LCD0_CTRL_M(div),
+ &ccm->lcd0_clk_cfg);
+ } else {
+ lcdc = (struct sunxi_lcdc_reg *)SUNXI_LCD1_BASE;
+
+ /* Reset off */
+ setbits_le32(&ccm->ahb_reset1_cfg, 1 << AHB_RESET_OFFSET_LCD1);
+
+ /* Clock on */
+ setbits_le32(&ccm->ahb_gate1, 1 << AHB_GATE_OFFSET_LCD1);
+ writel(CCM_LCD1_CTRL_GATE | CCM_LCD1_CTRL_M(div),
+ &ccm->lcd1_clk_cfg);
+ }
+
+ lcdc_init(lcdc);
+ lcdc_tcon1_mode_set(lcdc, edid, false, false);
+ lcdc_enable(lcdc, bpp);
+}
+
+static int sunxi_dw_hdmi_phy_cfg(struct dw_hdmi *hdmi, uint mpixelclock)
+{
+ sunxi_dw_hdmi_pll_set(mpixelclock/1000);
+ sunxi_dw_hdmi_phy_set(mpixelclock);
+
+ return 0;
+}
+
+static int sunxi_dw_hdmi_read_edid(struct udevice *dev, u8 *buf, int buf_size)
+{
+ struct sunxi_dw_hdmi_priv *priv = dev_get_priv(dev);
+
+ return dw_hdmi_read_edid(&priv->hdmi, buf, buf_size);
+}
+
+static int sunxi_dw_hdmi_enable(struct udevice *dev, int panel_bpp,
+ const struct display_timing *edid)
+{
+ struct sunxi_hdmi_phy * const phy =
+ (struct sunxi_hdmi_phy *)(SUNXI_HDMI_BASE + HDMI_PHY_OFFS);
+ struct sunxi_dw_hdmi_priv *priv = dev_get_priv(dev);
+ int ret;
+
+ ret = dw_hdmi_enable(&priv->hdmi, edid);
+ if (ret)
+ return ret;
+
+ sunxi_dw_hdmi_lcdc_init(priv->mux, edid, panel_bpp);
+
+ /*
+ * Condition in original code is a bit weird. This is attempt
+ * to make it more reasonable and it works. It could be that
+ * bits and conditions are related and should be separated.
+ */
+ if (!((edid->flags & DISPLAY_FLAGS_HSYNC_HIGH) &&
+ (edid->flags & DISPLAY_FLAGS_VSYNC_HIGH))) {
+ setbits_le32(&phy->pol, 0x300);
+ }
+
+ setbits_le32(&phy->ctrl, 0xf << 12);
+
+ /*
+ * This is last hdmi access before boot, so scramble addresses
+ * again or othwerwise BSP driver won't work. Dummy read is
+ * needed or otherwise last write doesn't get written correctly.
+ */
+ (void)readb(SUNXI_HDMI_BASE);
+ writel(0, &phy->unscramble);
+
+ return 0;
+}
+
+static int sunxi_dw_hdmi_probe(struct udevice *dev)
+{
+ struct display_plat *uc_plat = dev_get_uclass_platdata(dev);
+ struct sunxi_dw_hdmi_priv *priv = dev_get_priv(dev);
+ struct sunxi_ccm_reg * const ccm =
+ (struct sunxi_ccm_reg *)SUNXI_CCM_BASE;
+ int ret;
+
+ /* Set pll3 to 297 MHz */
+ clock_set_pll3(297000000);
+
+ /* Set hdmi parent to pll3 */
+ clrsetbits_le32(&ccm->hdmi_clk_cfg, CCM_HDMI_CTRL_PLL_MASK,
+ CCM_HDMI_CTRL_PLL3);
+
+ /* Set ahb gating to pass */
+ setbits_le32(&ccm->ahb_reset1_cfg, 1 << AHB_RESET_OFFSET_HDMI);
+ setbits_le32(&ccm->ahb_reset1_cfg, 1 << AHB_RESET_OFFSET_HDMI2);
+ setbits_le32(&ccm->ahb_gate1, 1 << AHB_GATE_OFFSET_HDMI);
+ setbits_le32(&ccm->hdmi_slow_clk_cfg, CCM_HDMI_SLOW_CTRL_DDC_GATE);
+
+ /* Clock on */
+ setbits_le32(&ccm->hdmi_clk_cfg, CCM_HDMI_CTRL_GATE);
+
+ sunxi_dw_hdmi_phy_init();
+
+ ret = sunxi_dw_hdmi_wait_for_hpd();
+ if (ret < 0) {
+ debug("hdmi can not get hpd signal\n");
+ return -1;
+ }
+
+ priv->hdmi.ioaddr = SUNXI_HDMI_BASE;
+ priv->hdmi.i2c_clk_high = 0xd8;
+ priv->hdmi.i2c_clk_low = 0xfe;
+ priv->hdmi.reg_io_width = 1;
+ priv->hdmi.phy_set = sunxi_dw_hdmi_phy_cfg;
+ priv->mux = uc_plat->source_id;
+
+ dw_hdmi_init(&priv->hdmi);
+
+ return 0;
+}
+
+static const struct dm_display_ops sunxi_dw_hdmi_ops = {
+ .read_edid = sunxi_dw_hdmi_read_edid,
+ .enable = sunxi_dw_hdmi_enable,
+};
+
+U_BOOT_DRIVER(sunxi_dw_hdmi) = {
+ .name = "sunxi_dw_hdmi",
+ .id = UCLASS_DISPLAY,
+ .ops = &sunxi_dw_hdmi_ops,
+ .probe = sunxi_dw_hdmi_probe,
+ .priv_auto_alloc_size = sizeof(struct sunxi_dw_hdmi_priv),
+};
+
+U_BOOT_DEVICE(sunxi_dw_hdmi) = {
+ .name = "sunxi_dw_hdmi"
+};
diff --git a/include/configs/sunxi-common.h b/include/configs/sunxi-common.h
index b794e427bb8..997a92c8be0 100644
--- a/include/configs/sunxi-common.h
+++ b/include/configs/sunxi-common.h
@@ -475,6 +475,11 @@ extern int soft_i2c_gpio_scl;
#define CONSOLE_STDOUT_SETTINGS \
"stdout=serial,vga\0" \
"stderr=serial,vga\0"
+#elif CONFIG_DM_VIDEO
+#define CONFIG_SYS_WHITE_ON_BLACK
+#define CONSOLE_STDOUT_SETTINGS \
+ "stdout=serial,vidconsole\0" \
+ "stderr=serial,vidconsole\0"
#else
#define CONSOLE_STDOUT_SETTINGS \
"stdout=serial\0" \
--
GitLab
From 6e39de1b337e2d77c086fb5dfb0c91d44dde6a01 Mon Sep 17 00:00:00 2001
From: Jernej Skrabec <jernej.skrabec@siol.net>
Date: Mon, 27 Mar 2017 19:22:33 +0200
Subject: [PATCH 160/282] sunxi: Disable DE2 video driver where not needed
Because DE2 driver is enabled by default, it is nice to disable it on
all boards which don't have any video output. List of such boards is
also much shorter.
Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
---
configs/nanopi_neo_air_defconfig | 1 +
configs/nanopi_neo_defconfig | 1 +
configs/orangepi_zero_defconfig | 1 +
3 files changed, 3 insertions(+)
diff --git a/configs/nanopi_neo_air_defconfig b/configs/nanopi_neo_air_defconfig
index 9598bd5cd51..5400d37bd1e 100644
--- a/configs/nanopi_neo_air_defconfig
+++ b/configs/nanopi_neo_air_defconfig
@@ -15,3 +15,4 @@ CONFIG_SPL=y
# CONFIG_SPL_ISO_PARTITION is not set
# CONFIG_SPL_EFI_PARTITION is not set
CONFIG_USB_EHCI_HCD=y
+# CONFIG_VIDEO_DE2 is not set
diff --git a/configs/nanopi_neo_defconfig b/configs/nanopi_neo_defconfig
index 89f5687884b..5afd5d565a0 100644
--- a/configs/nanopi_neo_defconfig
+++ b/configs/nanopi_neo_defconfig
@@ -16,3 +16,4 @@ CONFIG_SPL=y
# CONFIG_SPL_EFI_PARTITION is not set
CONFIG_SUN8I_EMAC=y
CONFIG_USB_EHCI_HCD=y
+# CONFIG_VIDEO_DE2 is not set
diff --git a/configs/orangepi_zero_defconfig b/configs/orangepi_zero_defconfig
index ac44937b16f..97ef08994ab 100644
--- a/configs/orangepi_zero_defconfig
+++ b/configs/orangepi_zero_defconfig
@@ -15,3 +15,4 @@ CONFIG_SPL=y
CONFIG_SPL_SPI_SUNXI=y
CONFIG_SUN8I_EMAC=y
CONFIG_USB_EHCI_HCD=y
+# CONFIG_VIDEO_DE2 is not set
--
GitLab
From 29ec68588383e8382c6c274e2cb4dcdd150cce76 Mon Sep 17 00:00:00 2001
From: Tom Rini <trini@konsulko.com>
Date: Sat, 29 Apr 2017 19:20:27 -0400
Subject: [PATCH 161/282] arm: Re-sync ARCH_MX5 / MX51 / MX53 CONFIG options
A few boards had not been fully re-synced with CONFIG_ARCH_MX5 / CONFIG_MX51 /
CONFIG_MX53 being in Kconfig. Do so now.
Signed-off-by: Tom Rini <trini@konsulko.com>
---
arch/arm/Kconfig | 46 ---------------------------------
arch/arm/cpu/armv7/mx5/Kconfig | 47 +++++++++++++++++++++++++++++++---
configs/m53evk_defconfig | 3 ++-
configs/mx51evk_defconfig | 1 +
configs/mx53ard_defconfig | 1 +
configs/mx53evk_defconfig | 1 +
configs/mx53loco_defconfig | 1 +
configs/mx53smd_defconfig | 1 +
configs/ts4800_defconfig | 2 +-
include/configs/m53evk.h | 1 -
include/configs/mx51evk.h | 2 --
include/configs/mx53ard.h | 2 --
include/configs/mx53evk.h | 2 --
include/configs/mx53loco.h | 2 --
include/configs/mx53smd.h | 2 --
include/configs/ts4800.h | 1 -
include/configs/usbarmory.h | 1 -
17 files changed, 51 insertions(+), 65 deletions(-)
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 1df6b363ac2..0b70c474070 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -584,40 +584,6 @@ config ARCH_MX5
select CPU_V7
select BOARD_EARLY_INIT_F
-config TARGET_M53EVK
- bool "Support m53evk"
- select CPU_V7
- select SUPPORT_SPL
- select BOARD_EARLY_INIT_F
-
-config TARGET_MX51EVK
- bool "Support mx51evk"
- select BOARD_LATE_INIT
- select CPU_V7
- select BOARD_EARLY_INIT_F
-
-config TARGET_MX53ARD
- bool "Support mx53ard"
- select CPU_V7
- select BOARD_EARLY_INIT_F
-
-config TARGET_MX53EVK
- bool "Support mx53evk"
- select BOARD_LATE_INIT
- select CPU_V7
- select BOARD_EARLY_INIT_F
-
-config TARGET_MX53LOCO
- bool "Support mx53loco"
- select BOARD_LATE_INIT
- select CPU_V7
- select BOARD_EARLY_INIT_F
-
-config TARGET_MX53SMD
- bool "Support mx53smd"
- select CPU_V7
- select BOARD_EARLY_INIT_F
-
config ARCH_RMOBILE
bool "Renesas ARM SoCs"
select DM
@@ -683,11 +649,6 @@ config TARGET_TS4600
select CPU_ARM926EJS
select SUPPORT_SPL
-config TARGET_TS4800
- bool "Support TS4800"
- select CPU_V7
- select SYS_FSL_ERRATUM_ESDHC_A001
-
config ARCH_VF610
bool "Freescale Vybrid"
select CPU_V7
@@ -1098,7 +1059,6 @@ source "arch/arm/cpu/armv8/Kconfig"
source "arch/arm/imx-common/Kconfig"
source "board/aries/m28evk/Kconfig"
-source "board/aries/m53evk/Kconfig"
source "board/bosch/shc/Kconfig"
source "board/CarMediaLab/flea3/Kconfig"
source "board/Marvell/aspenite/Kconfig"
@@ -1134,11 +1094,6 @@ source "board/freescale/mx28evk/Kconfig"
source "board/freescale/mx31ads/Kconfig"
source "board/freescale/mx31pdk/Kconfig"
source "board/freescale/mx35pdk/Kconfig"
-source "board/freescale/mx51evk/Kconfig"
-source "board/freescale/mx53ard/Kconfig"
-source "board/freescale/mx53evk/Kconfig"
-source "board/freescale/mx53loco/Kconfig"
-source "board/freescale/mx53smd/Kconfig"
source "board/freescale/s32v234evb/Kconfig"
source "board/gdsys/a38x/Kconfig"
source "board/grinn/chiliboard/Kconfig"
@@ -1166,7 +1121,6 @@ source "board/birdland/bav335x/Kconfig"
source "board/timll/devkit3250/Kconfig"
source "board/toradex/colibri_pxa270/Kconfig"
source "board/technologic/ts4600/Kconfig"
-source "board/technologic/ts4800/Kconfig"
source "board/vscom/baltos/Kconfig"
source "board/woodburn/Kconfig"
source "board/work-microwave/work_92105/Kconfig"
diff --git a/arch/arm/cpu/armv7/mx5/Kconfig b/arch/arm/cpu/armv7/mx5/Kconfig
index 7b55747612a..ef37c351d04 100644
--- a/arch/arm/cpu/armv7/mx5/Kconfig
+++ b/arch/arm/cpu/armv7/mx5/Kconfig
@@ -14,24 +14,63 @@ choice
prompt "MX5 board select"
optional
-config TARGET_USBARMORY
- bool "Support USB armory"
- select CPU_V7
+config TARGET_M53EVK
+ bool "Support m53evk"
+ select MX53
+ select SUPPORT_SPL
+
+config TARGET_MX51EVK
+ bool "Support mx51evk"
+ select BOARD_LATE_INIT
+ select MX51
+
+config TARGET_MX53ARD
+ bool "Support mx53ard"
+ select MX53
config TARGET_MX53CX9020
bool "Support CX9020"
select BOARD_LATE_INIT
- select CPU_V7
select MX53
select DM
select DM_SERIAL
+config TARGET_MX53EVK
+ bool "Support mx53evk"
+ select BOARD_LATE_INIT
+ select MX53
+
+config TARGET_MX53LOCO
+ bool "Support mx53loco"
+ select BOARD_LATE_INIT
+ select MX53
+
+config TARGET_MX53SMD
+ bool "Support mx53smd"
+ select MX53
+
+config TARGET_TS4800
+ bool "Support TS4800"
+ select MX51
+ select SYS_FSL_ERRATUM_ESDHC_A001
+
+config TARGET_USBARMORY
+ bool "Support USB armory"
+ select MX53
+
endchoice
config SYS_SOC
default "mx5"
+source "board/aries/m53evk/Kconfig"
source "board/beckhoff/mx53cx9020/Kconfig"
+source "board/freescale/mx51evk/Kconfig"
+source "board/freescale/mx53ard/Kconfig"
+source "board/freescale/mx53evk/Kconfig"
+source "board/freescale/mx53loco/Kconfig"
+source "board/freescale/mx53smd/Kconfig"
source "board/inversepath/usbarmory/Kconfig"
+source "board/technologic/ts4800/Kconfig"
endif
diff --git a/configs/m53evk_defconfig b/configs/m53evk_defconfig
index 4dff335ef5c..74b1ae6eb8a 100644
--- a/configs/m53evk_defconfig
+++ b/configs/m53evk_defconfig
@@ -1,8 +1,9 @@
CONFIG_ARM=y
-CONFIG_TARGET_M53EVK=y
+CONFIG_ARCH_MX5=y
CONFIG_SPL_GPIO_SUPPORT=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
+CONFIG_TARGET_M53EVK=y
CONFIG_SPL_SERIAL_SUPPORT=y
CONFIG_SPL_NAND_SUPPORT=y
CONFIG_VIDEO=y
diff --git a/configs/mx51evk_defconfig b/configs/mx51evk_defconfig
index 9ac4b65f621..b385009c53f 100644
--- a/configs/mx51evk_defconfig
+++ b/configs/mx51evk_defconfig
@@ -1,4 +1,5 @@
CONFIG_ARM=y
+CONFIG_ARCH_MX5=y
CONFIG_TARGET_MX51EVK=y
CONFIG_VIDEO=y
CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/mx51evk/imximage.cfg"
diff --git a/configs/mx53ard_defconfig b/configs/mx53ard_defconfig
index 886296b1529..51d3bfb6a46 100644
--- a/configs/mx53ard_defconfig
+++ b/configs/mx53ard_defconfig
@@ -1,4 +1,5 @@
CONFIG_ARM=y
+CONFIG_ARCH_MX5=y
CONFIG_TARGET_MX53ARD=y
CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/mx53ard/imximage_dd3.cfg"
CONFIG_BOOTDELAY=3
diff --git a/configs/mx53evk_defconfig b/configs/mx53evk_defconfig
index 9a05a8bf8c9..2c54942e836 100644
--- a/configs/mx53evk_defconfig
+++ b/configs/mx53evk_defconfig
@@ -1,4 +1,5 @@
CONFIG_ARM=y
+CONFIG_ARCH_MX5=y
CONFIG_TARGET_MX53EVK=y
CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/mx53evk/imximage.cfg"
CONFIG_BOOTDELAY=3
diff --git a/configs/mx53loco_defconfig b/configs/mx53loco_defconfig
index a7a481363ea..5b62f03c087 100644
--- a/configs/mx53loco_defconfig
+++ b/configs/mx53loco_defconfig
@@ -1,4 +1,5 @@
CONFIG_ARM=y
+CONFIG_ARCH_MX5=y
CONFIG_TARGET_MX53LOCO=y
CONFIG_VIDEO=y
CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/mx53loco/imximage.cfg"
diff --git a/configs/mx53smd_defconfig b/configs/mx53smd_defconfig
index 93b20d7044f..95ca52eb213 100644
--- a/configs/mx53smd_defconfig
+++ b/configs/mx53smd_defconfig
@@ -1,4 +1,5 @@
CONFIG_ARM=y
+CONFIG_ARCH_MX5=y
CONFIG_TARGET_MX53SMD=y
CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/mx53smd/imximage.cfg"
CONFIG_BOOTDELAY=3
diff --git a/configs/ts4800_defconfig b/configs/ts4800_defconfig
index 255eedfbc38..5a4bf2773e3 100644
--- a/configs/ts4800_defconfig
+++ b/configs/ts4800_defconfig
@@ -1,7 +1,7 @@
CONFIG_ARM=y
+CONFIG_ARCH_MX5=y
CONFIG_TARGET_TS4800=y
CONFIG_BOOTDELAY=1
-CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMLS is not set
diff --git a/include/configs/m53evk.h b/include/configs/m53evk.h
index 275ecf36ca0..02cd6353fb9 100644
--- a/include/configs/m53evk.h
+++ b/include/configs/m53evk.h
@@ -8,7 +8,6 @@
#ifndef __M53EVK_CONFIG_H__
#define __M53EVK_CONFIG_H__
-#define CONFIG_MX53
#define CONFIG_MXC_GPIO
#include <asm/arch/imx-regs.h>
diff --git a/include/configs/mx51evk.h b/include/configs/mx51evk.h
index 98c9f9bbf62..726d3c88f2e 100644
--- a/include/configs/mx51evk.h
+++ b/include/configs/mx51evk.h
@@ -13,8 +13,6 @@
/* High Level Configuration Options */
-#define CONFIG_MX51 /* in a mx51 */
-
#define CONFIG_SYS_FSL_CLK
#define CONFIG_SYS_TEXT_BASE 0x97800000
diff --git a/include/configs/mx53ard.h b/include/configs/mx53ard.h
index 86126144379..aee6e70c39c 100644
--- a/include/configs/mx53ard.h
+++ b/include/configs/mx53ard.h
@@ -9,8 +9,6 @@
#ifndef __CONFIG_H
#define __CONFIG_H
-#define CONFIG_MX53
-
#define CONFIG_MACH_TYPE MACH_TYPE_MX53_ARD
#include <asm/arch/imx-regs.h>
diff --git a/include/configs/mx53evk.h b/include/configs/mx53evk.h
index b3519ae7e79..dc49e24f154 100644
--- a/include/configs/mx53evk.h
+++ b/include/configs/mx53evk.h
@@ -9,8 +9,6 @@
#ifndef __CONFIG_H
#define __CONFIG_H
-#define CONFIG_MX53
-
#define CONFIG_MACH_TYPE MACH_TYPE_MX53_EVK
#include <asm/arch/imx-regs.h>
diff --git a/include/configs/mx53loco.h b/include/configs/mx53loco.h
index fed40eb58db..945be5835bf 100644
--- a/include/configs/mx53loco.h
+++ b/include/configs/mx53loco.h
@@ -10,8 +10,6 @@
#ifndef __CONFIG_H
#define __CONFIG_H
-#define CONFIG_MX53
-
#define CONFIG_MACH_TYPE MACH_TYPE_MX53_LOCO
#include <asm/arch/imx-regs.h>
diff --git a/include/configs/mx53smd.h b/include/configs/mx53smd.h
index e9d570e1d77..d064337f472 100644
--- a/include/configs/mx53smd.h
+++ b/include/configs/mx53smd.h
@@ -9,8 +9,6 @@
#ifndef __CONFIG_H
#define __CONFIG_H
-#define CONFIG_MX53
-
#define CONFIG_MACH_TYPE MACH_TYPE_MX53_SMD
#include <asm/arch/imx-regs.h>
diff --git a/include/configs/ts4800.h b/include/configs/ts4800.h
index a65c5f1c710..7bb8c879887 100644
--- a/include/configs/ts4800.h
+++ b/include/configs/ts4800.h
@@ -14,7 +14,6 @@
#define __CONFIG_H
/* High Level Configuration Options */
-#define CONFIG_MX51
#define CONFIG_SKIP_LOWLEVEL_INIT /* U-Boot is a 2nd stage bootloader */
diff --git a/include/configs/usbarmory.h b/include/configs/usbarmory.h
index a67802a1600..58b62d24489 100644
--- a/include/configs/usbarmory.h
+++ b/include/configs/usbarmory.h
@@ -11,7 +11,6 @@
#ifndef __CONFIG_H
#define __CONFIG_H
-#define CONFIG_MX53
#define CONFIG_SYS_FSL_CLK
#define CONFIG_MXC_GPIO
--
GitLab
From 56aceaf2828ea3471fec99916c6c6558a309fb82 Mon Sep 17 00:00:00 2001
From: Simon Glass <sjg@chromium.org>
Date: Wed, 26 Apr 2017 22:27:44 -0600
Subject: [PATCH 162/282] power: Rename CONFIG_AS3722_POWER to
CONFIG_PMIC_AS3722
Before converting this to Kconfig, rename it to match the other PMICs.
Signed-off-by: Simon Glass <sjg@chromium.org>
---
arch/arm/mach-tegra/board2.c | 2 +-
drivers/power/Makefile | 2 +-
include/configs/apalis-tk1.h | 2 +-
include/configs/cei-tk1-som.h | 2 +-
include/configs/jetson-tk1.h | 2 +-
include/configs/nyan-big.h | 2 +-
scripts/config_whitelist.txt | 2 +-
7 files changed, 7 insertions(+), 7 deletions(-)
diff --git a/arch/arm/mach-tegra/board2.c b/arch/arm/mach-tegra/board2.c
index b73cd632e7d..84f1ee5035f 100644
--- a/arch/arm/mach-tegra/board2.c
+++ b/arch/arm/mach-tegra/board2.c
@@ -148,7 +148,7 @@ int board_init(void)
debug("Memory controller init failed: %d\n", err);
# endif
# endif /* CONFIG_TEGRA_PMU */
-#ifdef CONFIG_AS3722_POWER
+#ifdef CONFIG_PMIC_AS3722
err = as3722_init(NULL);
if (err && err != -ENODEV)
return err;
diff --git a/drivers/power/Makefile b/drivers/power/Makefile
index b43523e6282..29e135756ba 100644
--- a/drivers/power/Makefile
+++ b/drivers/power/Makefile
@@ -5,7 +5,7 @@
# SPDX-License-Identifier: GPL-2.0+
#
-obj-$(CONFIG_AS3722_POWER) += as3722.o
+obj-$(CONFIG_PMIC_AS3722) += as3722.o
obj-$(CONFIG_AXP152_POWER) += axp152.o
obj-$(CONFIG_AXP209_POWER) += axp209.o
obj-$(CONFIG_AXP221_POWER) += axp221.o
diff --git a/include/configs/apalis-tk1.h b/include/configs/apalis-tk1.h
index 84652decd63..a64037b5954 100644
--- a/include/configs/apalis-tk1.h
+++ b/include/configs/apalis-tk1.h
@@ -12,7 +12,7 @@
#include <linux/sizes.h>
/* enable PMIC */
-#define CONFIG_AS3722_POWER
+#define CONFIG_PMIC_AS3722
#include "tegra124-common.h"
diff --git a/include/configs/cei-tk1-som.h b/include/configs/cei-tk1-som.h
index 5ec63cd8bec..de56920fe99 100644
--- a/include/configs/cei-tk1-som.h
+++ b/include/configs/cei-tk1-som.h
@@ -15,7 +15,7 @@
#include <linux/sizes.h>
/* enable PMIC */
-#define CONFIG_AS3722_POWER
+#define CONFIG_PMIC_AS3722
#include "tegra124-common.h"
diff --git a/include/configs/jetson-tk1.h b/include/configs/jetson-tk1.h
index 7c0456c5ce3..5482f55ce0a 100644
--- a/include/configs/jetson-tk1.h
+++ b/include/configs/jetson-tk1.h
@@ -11,7 +11,7 @@
#include <linux/sizes.h>
/* enable PMIC */
-#define CONFIG_AS3722_POWER
+#define CONFIG_PMIC_AS3722
#include "tegra124-common.h"
diff --git a/include/configs/nyan-big.h b/include/configs/nyan-big.h
index acf9d66ae04..906423dba94 100644
--- a/include/configs/nyan-big.h
+++ b/include/configs/nyan-big.h
@@ -31,7 +31,7 @@
#define CONFIG_ENV_OFFSET (-CONFIG_ENV_SIZE)
/* LCD support */
-#define CONFIG_AS3722_POWER
+#define CONFIG_PMIC_AS3722
#define CONFIG_SYS_WHITE_ON_BLACK
#define CONFIG_CMD_BMP
diff --git a/scripts/config_whitelist.txt b/scripts/config_whitelist.txt
index cad6117034c..1349fb0f7d8 100644
--- a/scripts/config_whitelist.txt
+++ b/scripts/config_whitelist.txt
@@ -147,7 +147,6 @@ CONFIG_ARM_PL180_MMCI_BASE
CONFIG_ARM_PL180_MMCI_CLOCK_FREQ
CONFIG_ARM_THUMB
CONFIG_ARP_TIMEOUT
-CONFIG_AS3722_POWER
CONFIG_ASTRO5373L
CONFIG_ASTRO_COFDMDUOS2
CONFIG_ASTRO_TWIN7S2
@@ -2231,6 +2230,7 @@ CONFIG_PMECC_INDEX_TABLE_OFFSET
CONFIG_PMECC_SECTOR_SIZE
CONFIG_PME_PLAT_CLK_DIV
CONFIG_PMIC
+CONFIG_PMIC_AS3722
CONFIG_PMU
CONFIG_PMW_BASE
CONFIG_PM_SLEEP
--
GitLab
From 2838c07f47016fe632273f5f799a4cefa7341b41 Mon Sep 17 00:00:00 2001
From: Simon Glass <sjg@chromium.org>
Date: Wed, 26 Apr 2017 22:27:45 -0600
Subject: [PATCH 163/282] power: Move as3722 pmic to pmic/ directory
Most of the PMICs are in the drivers/power/pmic/ directory. Move this one
there.
Signed-off-by: Simon Glass <sjg@chromium.org>
---
drivers/power/Makefile | 1 -
drivers/power/pmic/Makefile | 1 +
drivers/power/{ => pmic}/as3722.c | 0
3 files changed, 1 insertion(+), 1 deletion(-)
rename drivers/power/{ => pmic}/as3722.c (100%)
diff --git a/drivers/power/Makefile b/drivers/power/Makefile
index 29e135756ba..90a3b00a7cf 100644
--- a/drivers/power/Makefile
+++ b/drivers/power/Makefile
@@ -5,7 +5,6 @@
# SPDX-License-Identifier: GPL-2.0+
#
-obj-$(CONFIG_PMIC_AS3722) += as3722.o
obj-$(CONFIG_AXP152_POWER) += axp152.o
obj-$(CONFIG_AXP209_POWER) += axp209.o
obj-$(CONFIG_AXP221_POWER) += axp221.o
diff --git a/drivers/power/pmic/Makefile b/drivers/power/pmic/Makefile
index 40240c79362..5f1bef33cdd 100644
--- a/drivers/power/pmic/Makefile
+++ b/drivers/power/pmic/Makefile
@@ -12,6 +12,7 @@ obj-$(CONFIG_DM_PMIC_PFUZE100) += pfuze100.o
obj-$(CONFIG_PMIC_S2MPS11) += s2mps11.o
obj-$(CONFIG_DM_PMIC_SANDBOX) += sandbox.o i2c_pmic_emul.o
obj-$(CONFIG_PMIC_ACT8846) += act8846.o
+obj-$(CONFIG_PMIC_AS3722) += as3722.o
obj-$(CONFIG_PMIC_MAX8997) += max8997.o
obj-$(CONFIG_PMIC_PM8916) += pm8916.o
obj-$(CONFIG_PMIC_RK808) += rk808.o
diff --git a/drivers/power/as3722.c b/drivers/power/pmic/as3722.c
similarity index 100%
rename from drivers/power/as3722.c
rename to drivers/power/pmic/as3722.c
--
GitLab
From bdf25a5e04078951e5b7fef4f4c432e88263244f Mon Sep 17 00:00:00 2001
From: Simon Glass <sjg@chromium.org>
Date: Wed, 26 Apr 2017 22:27:46 -0600
Subject: [PATCH 164/282] power: Convert CONFIG_PMIC_AS3722 to Kconfig
This converts the following to Kconfig:
CONFIG_PMIC_AS3722
Signed-off-by: Simon Glass <sjg@chromium.org>
---
configs/apalis-tk1_defconfig | 1 +
configs/cei-tk1-som_defconfig | 1 +
configs/jetson-tk1_defconfig | 1 +
configs/nyan-big_defconfig | 1 +
drivers/power/pmic/Kconfig | 8 ++++++++
include/configs/apalis-tk1.h | 3 ---
include/configs/cei-tk1-som.h | 3 ---
include/configs/jetson-tk1.h | 3 ---
include/configs/nyan-big.h | 1 -
scripts/config_whitelist.txt | 1 -
10 files changed, 12 insertions(+), 11 deletions(-)
diff --git a/configs/apalis-tk1_defconfig b/configs/apalis-tk1_defconfig
index 10862e56e75..648be92fcbb 100644
--- a/configs/apalis-tk1_defconfig
+++ b/configs/apalis-tk1_defconfig
@@ -34,6 +34,7 @@ CONFIG_PCI=y
CONFIG_DM_PCI=y
CONFIG_DM_PCI_COMPAT=y
CONFIG_PCI_TEGRA=y
+CONFIG_PMIC_AS3722=y
CONFIG_SYS_NS16550=y
CONFIG_USB=y
CONFIG_DM_USB=y
diff --git a/configs/cei-tk1-som_defconfig b/configs/cei-tk1-som_defconfig
index 88b93cb0ffa..dd6fd498b7f 100644
--- a/configs/cei-tk1-som_defconfig
+++ b/configs/cei-tk1-som_defconfig
@@ -38,6 +38,7 @@ CONFIG_PCI=y
CONFIG_DM_PCI=y
CONFIG_DM_PCI_COMPAT=y
CONFIG_PCI_TEGRA=y
+CONFIG_PMIC_AS3722=y
CONFIG_SYS_NS16550=y
CONFIG_TEGRA114_SPI=y
CONFIG_USB=y
diff --git a/configs/jetson-tk1_defconfig b/configs/jetson-tk1_defconfig
index 58d41846007..2c3f1748d8f 100644
--- a/configs/jetson-tk1_defconfig
+++ b/configs/jetson-tk1_defconfig
@@ -38,6 +38,7 @@ CONFIG_PCI=y
CONFIG_DM_PCI=y
CONFIG_DM_PCI_COMPAT=y
CONFIG_PCI_TEGRA=y
+CONFIG_PMIC_AS3722=y
CONFIG_SYS_NS16550=y
CONFIG_TEGRA114_SPI=y
CONFIG_USB=y
diff --git a/configs/nyan-big_defconfig b/configs/nyan-big_defconfig
index 63f1a6f03f9..b132eb1f601 100644
--- a/configs/nyan-big_defconfig
+++ b/configs/nyan-big_defconfig
@@ -42,6 +42,7 @@ CONFIG_CROS_EC_SPI=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_WINBOND=y
CONFIG_DM_PMIC=y
+CONFIG_PMIC_AS3722=y
CONFIG_DM_REGULATOR=y
CONFIG_DM_REGULATOR_FIXED=y
CONFIG_PWM_TEGRA=y
diff --git a/drivers/power/pmic/Kconfig b/drivers/power/pmic/Kconfig
index 03fea078daa..4891b1704e8 100644
--- a/drivers/power/pmic/Kconfig
+++ b/drivers/power/pmic/Kconfig
@@ -40,6 +40,14 @@ config PMIC_ACT8846
functions. It uses an I2C interface and is designed for use with
tablets and smartphones.
+config PMIC_AS3722
+ bool "Enable support for the Austria Micro Systems (AMS) AS7322 PMIC"
+ help
+ The AS3722 includes 7 DC/DC buck convertors, 11 low-noise LDOs, a
+ real-time clock, GPIOs, ADC and a few other features. It uses an I2C
+ interface and is designs to cover most of the power managementment
+ required for a tablets or laptop.
+
config DM_PMIC_PFUZE100
bool "Enable Driver Model for PMIC PFUZE100"
depends on DM_PMIC
diff --git a/include/configs/apalis-tk1.h b/include/configs/apalis-tk1.h
index a64037b5954..c6c956e1ee1 100644
--- a/include/configs/apalis-tk1.h
+++ b/include/configs/apalis-tk1.h
@@ -11,9 +11,6 @@
#include <linux/sizes.h>
-/* enable PMIC */
-#define CONFIG_PMIC_AS3722
-
#include "tegra124-common.h"
#define CONFIG_ARCH_MISC_INIT
diff --git a/include/configs/cei-tk1-som.h b/include/configs/cei-tk1-som.h
index de56920fe99..8185926590e 100644
--- a/include/configs/cei-tk1-som.h
+++ b/include/configs/cei-tk1-som.h
@@ -14,9 +14,6 @@
#include <linux/sizes.h>
-/* enable PMIC */
-#define CONFIG_PMIC_AS3722
-
#include "tegra124-common.h"
/* High-level configuration options */
diff --git a/include/configs/jetson-tk1.h b/include/configs/jetson-tk1.h
index 5482f55ce0a..b31ba6a4ee5 100644
--- a/include/configs/jetson-tk1.h
+++ b/include/configs/jetson-tk1.h
@@ -10,9 +10,6 @@
#include <linux/sizes.h>
-/* enable PMIC */
-#define CONFIG_PMIC_AS3722
-
#include "tegra124-common.h"
/* High-level configuration options */
diff --git a/include/configs/nyan-big.h b/include/configs/nyan-big.h
index 906423dba94..a3a2a8cbcce 100644
--- a/include/configs/nyan-big.h
+++ b/include/configs/nyan-big.h
@@ -31,7 +31,6 @@
#define CONFIG_ENV_OFFSET (-CONFIG_ENV_SIZE)
/* LCD support */
-#define CONFIG_PMIC_AS3722
#define CONFIG_SYS_WHITE_ON_BLACK
#define CONFIG_CMD_BMP
diff --git a/scripts/config_whitelist.txt b/scripts/config_whitelist.txt
index 1349fb0f7d8..f639d2b0824 100644
--- a/scripts/config_whitelist.txt
+++ b/scripts/config_whitelist.txt
@@ -2230,7 +2230,6 @@ CONFIG_PMECC_INDEX_TABLE_OFFSET
CONFIG_PMECC_SECTOR_SIZE
CONFIG_PME_PLAT_CLK_DIV
CONFIG_PMIC
-CONFIG_PMIC_AS3722
CONFIG_PMU
CONFIG_PMW_BASE
CONFIG_PM_SLEEP
--
GitLab
From 0fd28b1f0ed85fe80e68b112259e21c6275da56f Mon Sep 17 00:00:00 2001
From: Simon Glass <sjg@chromium.org>
Date: Wed, 26 Apr 2017 22:27:47 -0600
Subject: [PATCH 165/282] power: Drop CONFIG_I2C_PMIC
This is only used by one board and should not be a CONFIG option. Instead
it should use the driver model pmic framework. For now, just move the
setting into the only board that uses it.
Signed-off-by: Simon Glass <sjg@chromium.org>
---
board/gateworks/gw_ventana/common.c | 7 ++++---
include/configs/gw_ventana.h | 1 -
scripts/config_whitelist.txt | 1 -
3 files changed, 4 insertions(+), 5 deletions(-)
diff --git a/board/gateworks/gw_ventana/common.c b/board/gateworks/gw_ventana/common.c
index 56a7b3e7fd4..d27bd57648c 100644
--- a/board/gateworks/gw_ventana/common.c
+++ b/board/gateworks/gw_ventana/common.c
@@ -1272,14 +1272,15 @@ void setup_pmic(void)
struct pmic *p;
struct ventana_board_info ventana_info;
int board = read_eeprom(CONFIG_I2C_GSC, &ventana_info);
+ const int i2c_pmic = 1;
u32 reg;
- i2c_set_bus_num(CONFIG_I2C_PMIC);
+ i2c_set_bus_num(i2c_pmic);
/* configure PFUZE100 PMIC */
if (!i2c_probe(CONFIG_POWER_PFUZE100_I2C_ADDR)) {
debug("probed PFUZE100@0x%x\n", CONFIG_POWER_PFUZE100_I2C_ADDR);
- power_pfuze100_init(CONFIG_I2C_PMIC);
+ power_pfuze100_init(i2c_pmic);
p = pmic_get("PFUZE100");
if (p && !pmic_probe(p)) {
pmic_reg_read(p, PFUZE100_DEVICEID, ®);
@@ -1302,7 +1303,7 @@ void setup_pmic(void)
/* configure LTC3676 PMIC */
else if (!i2c_probe(CONFIG_POWER_LTC3676_I2C_ADDR)) {
debug("probed LTC3676@0x%x\n", CONFIG_POWER_LTC3676_I2C_ADDR);
- power_ltc3676_init(CONFIG_I2C_PMIC);
+ power_ltc3676_init(i2c_pmic);
p = pmic_get("LTC3676_PMIC");
if (!p || pmic_probe(p))
return;
diff --git a/include/configs/gw_ventana.h b/include/configs/gw_ventana.h
index 2b98f535c6b..28289a348fe 100644
--- a/include/configs/gw_ventana.h
+++ b/include/configs/gw_ventana.h
@@ -95,7 +95,6 @@
#define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */
#define CONFIG_SYS_I2C_SPEED 100000
#define CONFIG_I2C_GSC 0
-#define CONFIG_I2C_PMIC 1
#define CONFIG_I2C_EDID
/* MMC Configs */
diff --git a/scripts/config_whitelist.txt b/scripts/config_whitelist.txt
index f639d2b0824..b17b87bd7bc 100644
--- a/scripts/config_whitelist.txt
+++ b/scripts/config_whitelist.txt
@@ -1399,7 +1399,6 @@ CONFIG_I2C_MVTWSI_BASE3
CONFIG_I2C_MVTWSI_BASE4
CONFIG_I2C_MVTWSI_BASE5
CONFIG_I2C_MXC
-CONFIG_I2C_PMIC
CONFIG_I2C_REPEATED_START
CONFIG_I2C_RTC_ADDR
CONFIG_I2C_TIMEOUT
--
GitLab
From 92572ecf8069858b3bea282cd4ee6010aaa65c21 Mon Sep 17 00:00:00 2001
From: Simon Glass <sjg@chromium.org>
Date: Wed, 26 Apr 2017 22:27:48 -0600
Subject: [PATCH 166/282] power: Drop CONFIG_PMIC
This option is not used in U-Boot. Drop it.
Signed-off-by: Simon Glass <sjg@chromium.org>
---
include/configs/arndale.h | 1 -
scripts/config_whitelist.txt | 1 -
2 files changed, 2 deletions(-)
diff --git a/include/configs/arndale.h b/include/configs/arndale.h
index e6f2422f03d..4d770e6077d 100644
--- a/include/configs/arndale.h
+++ b/include/configs/arndale.h
@@ -36,7 +36,6 @@
/* PMIC */
#define CONFIG_POWER
-#define CONFIG_PMIC
#define CONFIG_POWER_I2C
#define CONFIG_PREBOOT
diff --git a/scripts/config_whitelist.txt b/scripts/config_whitelist.txt
index b17b87bd7bc..b1101484211 100644
--- a/scripts/config_whitelist.txt
+++ b/scripts/config_whitelist.txt
@@ -2228,7 +2228,6 @@ CONFIG_PMECC_CAP
CONFIG_PMECC_INDEX_TABLE_OFFSET
CONFIG_PMECC_SECTOR_SIZE
CONFIG_PME_PLAT_CLK_DIV
-CONFIG_PMIC
CONFIG_PMU
CONFIG_PMW_BASE
CONFIG_PM_SLEEP
--
GitLab
From b1a873df0a3fb4e4cac8da5e68263715cf71dd4a Mon Sep 17 00:00:00 2001
From: Simon Glass <sjg@chromium.org>
Date: Wed, 26 Apr 2017 22:27:49 -0600
Subject: [PATCH 167/282] Convert CONFIG_CMD_AES et al to Kconfig
This converts the following to Kconfig:
CONFIG_CMD_AES
CONFIG_AES
Signed-off-by: Simon Glass <sjg@chromium.org>
[trini: Add select AES to CMD_AES]
Signed-off-by: Tom Rini <trini@konsulko.com>
---
cmd/Kconfig | 10 ++++++++++
configs/seaboard_defconfig | 1 +
include/configs/amcore.h | 1 -
include/configs/seaboard.h | 1 -
include/configs/topic_miami.h | 1 -
lib/Kconfig | 13 +++++++++++++
scripts/config_whitelist.txt | 2 --
7 files changed, 24 insertions(+), 5 deletions(-)
diff --git a/cmd/Kconfig b/cmd/Kconfig
index 50888236db6..e52af92cb4b 100644
--- a/cmd/Kconfig
+++ b/cmd/Kconfig
@@ -769,6 +769,16 @@ config CMD_REGULATOR
endmenu
menu "Security commands"
+config CMD_AES
+ bool "Enable the 'aes' command"
+ select AES
+ help
+ This provides a means to encrypt and decrypt data using the AES
+ (Advanced Encryption Standard). This algorithm uses a symetric key
+ and is widely used as a streaming cipher. Different key lengths are
+ supported by the algorithm but this command only supports 128 bits
+ at present.
+
config CMD_TPM
bool "Enable the 'tpm' command"
depends on TPM
diff --git a/configs/seaboard_defconfig b/configs/seaboard_defconfig
index 3e5549c0731..9e50f702bfd 100644
--- a/configs/seaboard_defconfig
+++ b/configs/seaboard_defconfig
@@ -38,3 +38,4 @@ CONFIG_USB_KEYBOARD=y
CONFIG_DM_VIDEO=y
CONFIG_VIDEO_TEGRA20=y
CONFIG_CONSOLE_SCROLL_LINES=10
+CONFIG_AES=y
diff --git a/include/configs/amcore.h b/include/configs/amcore.h
index 4f462d61e0a..06d08d44830 100644
--- a/include/configs/amcore.h
+++ b/include/configs/amcore.h
@@ -30,7 +30,6 @@
"erase 0xfff00000 0xffffffff; " \
"cp.b 0x20000 0xfff00000 ${filesize}\0"
-#undef CONFIG_CMD_AES
#define CONFIG_CMD_DIAG
/* undef to save memory */
diff --git a/include/configs/seaboard.h b/include/configs/seaboard.h
index 671afa71ec4..661d1fee6f8 100644
--- a/include/configs/seaboard.h
+++ b/include/configs/seaboard.h
@@ -12,7 +12,6 @@
/* LP0 suspend / resume */
#define CONFIG_TEGRA_LP0
-#define CONFIG_AES
#define CONFIG_TEGRA_PMU
#define CONFIG_TPS6586X_POWER
#define CONFIG_TEGRA_CLOCK_SCALING
diff --git a/include/configs/topic_miami.h b/include/configs/topic_miami.h
index a56ceef85a7..23160bd88d7 100644
--- a/include/configs/topic_miami.h
+++ b/include/configs/topic_miami.h
@@ -142,6 +142,5 @@
/* Further tweaks to reduce image size */
#undef CONFIG_CMD_BOOTZ
#undef CONFIG_CMD_NET
-#undef CONFIG_CMD_AES
#endif /* __CONFIG_TOPIC_MIAMI_H */
diff --git a/lib/Kconfig b/lib/Kconfig
index a0d5d926eb6..db0915153cb 100644
--- a/lib/Kconfig
+++ b/lib/Kconfig
@@ -66,6 +66,17 @@ config RBTREE
source lib/dhry/Kconfig
+menu "Security support"
+
+config AES
+ bool "Support the AES algorithm"
+ help
+ This provides a means to encrypt and decrypt data using the AES
+ (Advanced Encryption Standard). This algorithm uses a symetric key
+ and is widely used as a streaming cipher. Different key lengths are
+ supported by the algorithm but only a 128-bit key is supported at
+ present.
+
source lib/rsa/Kconfig
config TPM
@@ -79,6 +90,8 @@ config TPM
for the low-level TPM interface, but only one TPM is supported at
a time by the TPM library.
+endmenu
+
menu "Hashing Support"
config SHA1
diff --git a/scripts/config_whitelist.txt b/scripts/config_whitelist.txt
index b1101484211..f06d384dcdd 100644
--- a/scripts/config_whitelist.txt
+++ b/scripts/config_whitelist.txt
@@ -70,7 +70,6 @@ CONFIG_ADNPESC1
CONFIG_ADP_AG101P
CONFIG_AEABI
CONFIG_AEMIF_CNTRL_BASE
-CONFIG_AES
CONFIG_ALTERA_SDRAM
CONFIG_ALTERA_SPI_IDLE_VAL
CONFIG_ALTIVEC
@@ -394,7 +393,6 @@ CONFIG_CM922T_XA10
CONFIG_CMDLINE_EDITING
CONFIG_CMDLINE_PS_SUPPORT
CONFIG_CMDLINE_TAG
-CONFIG_CMD_AES
CONFIG_CMD_ASKEN
CONFIG_CMD_BAT
CONFIG_CMD_BEDBUG
--
GitLab
From 4848d89d1ffe3e13ed1cbade9f25e0331493d5e5 Mon Sep 17 00:00:00 2001
From: Simon Glass <sjg@chromium.org>
Date: Wed, 26 Apr 2017 22:27:50 -0600
Subject: [PATCH 168/282] ti816x_evm: Change CONFIG_CMD_ASKEN to
CONFIG_CMD_ASKENV
This looks like a typo. Fix it.
Signed-off-by: Simon Glass <sjg@chromium.org>
---
include/configs/ti816x_evm.h | 2 +-
scripts/config_whitelist.txt | 1 -
2 files changed, 1 insertion(+), 2 deletions(-)
diff --git a/include/configs/ti816x_evm.h b/include/configs/ti816x_evm.h
index b5af700e381..b7ec200e068 100644
--- a/include/configs/ti816x_evm.h
+++ b/include/configs/ti816x_evm.h
@@ -49,7 +49,7 @@
#define CONFIG_SYS_LOAD_ADDR 0x81000000 /* Default load address */
-#define CONFIG_CMD_ASKEN
+#define CONFIG_CMD_ASKENV
#define CONFIG_OMAP_GPIO
#define CONFIG_FS_FAT
diff --git a/scripts/config_whitelist.txt b/scripts/config_whitelist.txt
index f06d384dcdd..29b4032e98e 100644
--- a/scripts/config_whitelist.txt
+++ b/scripts/config_whitelist.txt
@@ -393,7 +393,6 @@ CONFIG_CM922T_XA10
CONFIG_CMDLINE_EDITING
CONFIG_CMDLINE_PS_SUPPORT
CONFIG_CMDLINE_TAG
-CONFIG_CMD_ASKEN
CONFIG_CMD_BAT
CONFIG_CMD_BEDBUG
CONFIG_CMD_BLOB
--
GitLab
From ac60e46e7d316cdcec44d01a7c19e13dedd00b49 Mon Sep 17 00:00:00 2001
From: Simon Glass <sjg@chromium.org>
Date: Wed, 26 Apr 2017 22:27:51 -0600
Subject: [PATCH 169/282] Convert CONFIG_CMD_BAT to Kconfig
This converts the following to Kconfig:
CONFIG_CMD_BAT
Signed-off-by: Simon Glass <sjg@chromium.org>
---
board/ti/sdp4430/Kconfig | 3 +++
configs/omap4_sdp4430_defconfig | 1 +
include/configs/omap4_sdp4430.h | 5 -----
scripts/config_whitelist.txt | 1 -
4 files changed, 4 insertions(+), 6 deletions(-)
diff --git a/board/ti/sdp4430/Kconfig b/board/ti/sdp4430/Kconfig
index 5826d8fd0b2..36f18528216 100644
--- a/board/ti/sdp4430/Kconfig
+++ b/board/ti/sdp4430/Kconfig
@@ -9,4 +9,7 @@ config SYS_VENDOR
config SYS_CONFIG_NAME
default "omap4_sdp4430"
+config CMD_BAT
+ bool "Enable board-specific battery command"
+
endif
diff --git a/configs/omap4_sdp4430_defconfig b/configs/omap4_sdp4430_defconfig
index 727a4504fa2..72291428960 100644
--- a/configs/omap4_sdp4430_defconfig
+++ b/configs/omap4_sdp4430_defconfig
@@ -4,6 +4,7 @@ CONFIG_ARM=y
CONFIG_ARCH_OMAP2PLUS=y
CONFIG_OMAP44XX=y
CONFIG_TARGET_OMAP4_SDP4430=y
+CONFIG_CMD_BAT=y
# CONFIG_SPL_NAND_SUPPORT is not set
CONFIG_DISTRO_DEFAULTS=y
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
diff --git a/include/configs/omap4_sdp4430.h b/include/configs/omap4_sdp4430.h
index 072b97ec99e..b82ad13489c 100644
--- a/include/configs/omap4_sdp4430.h
+++ b/include/configs/omap4_sdp4430.h
@@ -21,11 +21,6 @@
#include <configs/ti_omap4_common.h>
-/* Battery Charger */
-#ifndef CONFIG_SPL_BUILD
-#define CONFIG_CMD_BAT 1
-#endif
-
/* ENV related config options */
#define CONFIG_ENV_IS_IN_MMC 1
#define CONFIG_SYS_MMC_ENV_DEV 1 /* SLOT2: eMMC(1) */
diff --git a/scripts/config_whitelist.txt b/scripts/config_whitelist.txt
index 29b4032e98e..caea65b1a57 100644
--- a/scripts/config_whitelist.txt
+++ b/scripts/config_whitelist.txt
@@ -393,7 +393,6 @@ CONFIG_CM922T_XA10
CONFIG_CMDLINE_EDITING
CONFIG_CMDLINE_PS_SUPPORT
CONFIG_CMDLINE_TAG
-CONFIG_CMD_BAT
CONFIG_CMD_BEDBUG
CONFIG_CMD_BLOB
CONFIG_CMD_BMODE
--
GitLab
From ac20a1b21caeb779848f8f4731060dbc00f4bd7b Mon Sep 17 00:00:00 2001
From: Simon Glass <sjg@chromium.org>
Date: Wed, 26 Apr 2017 22:27:52 -0600
Subject: [PATCH 170/282] Convert CONFIG_CMD_BEDBUG to Kconfig
This converts the following to Kconfig:
CONFIG_CMD_BEDBUG
Signed-off-by: Simon Glass <sjg@chromium.org>
---
README | 1 -
cmd/Kconfig | 11 +++++++++++
configs/motionpro_defconfig | 1 +
include/config_cmd_all.h | 1 -
include/configs/dbau1x00.h | 1 -
include/configs/motionpro.h | 1 -
include/configs/pb1x00.h | 1 -
include/configs/vct.h | 1 -
scripts/config_whitelist.txt | 1 -
9 files changed, 12 insertions(+), 7 deletions(-)
diff --git a/README b/README
index f7ab78a8bfb..cec6851dd33 100644
--- a/README
+++ b/README
@@ -823,7 +823,6 @@ The following options need to be configured:
CONFIG_CMD_AES AES 128 CBC encrypt/decrypt
CONFIG_CMD_ASKENV * ask for env variable
CONFIG_CMD_BDI bdinfo
- CONFIG_CMD_BEDBUG * Include BedBug Debugger
CONFIG_CMD_BMP * BMP support
CONFIG_CMD_BSP * Board specific commands
CONFIG_CMD_BOOTD bootd
diff --git a/cmd/Kconfig b/cmd/Kconfig
index e52af92cb4b..0c6d44e2966 100644
--- a/cmd/Kconfig
+++ b/cmd/Kconfig
@@ -867,6 +867,17 @@ config MTDPARTS_DEFAULT
endmenu
+menu "Debug commands"
+
+config CMD_BEDBUG
+ bool "bedbug"
+ help
+ The bedbug (emBEDded deBUGger) command provides debugging features
+ for some PowerPC processors. For details please see the
+ docuemntation in doc/README.beddbug
+
+endmenu
+
config CMD_UBI
tristate "Enable UBI - Unsorted block images commands"
select CRC32
diff --git a/configs/motionpro_defconfig b/configs/motionpro_defconfig
index b770820dff5..70c04c343d2 100644
--- a/configs/motionpro_defconfig
+++ b/configs/motionpro_defconfig
@@ -14,6 +14,7 @@ CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_CMD_FAT=y
+CONFIG_CMD_BEDBUG=y
CONFIG_LED_STATUS=y
CONFIG_LED_STATUS0=y
CONFIG_LED_STATUS_BIT=0
diff --git a/include/config_cmd_all.h b/include/config_cmd_all.h
index a8befe38e8e..825ccf705c6 100644
--- a/include/config_cmd_all.h
+++ b/include/config_cmd_all.h
@@ -13,7 +13,6 @@
* Alphabetical list of all possible commands.
*/
-#define CONFIG_CMD_BEDBUG /* Include BedBug Debugger */
#define CONFIG_CMD_BMP /* BMP support */
#define CONFIG_CMD_BSP /* Board Specific functions */
#define CONFIG_CMD_CLK /* Clock support */
diff --git a/include/configs/dbau1x00.h b/include/configs/dbau1x00.h
index 04372962f69..e788f9c6357 100644
--- a/include/configs/dbau1x00.h
+++ b/include/configs/dbau1x00.h
@@ -66,7 +66,6 @@
/*
* Command line configuration.
*/
-#undef CONFIG_CMD_BEDBUG
#ifdef CONFIG_DBAU1550
diff --git a/include/configs/motionpro.h b/include/configs/motionpro.h
index 7ebcd038727..ec4f8f5df0a 100644
--- a/include/configs/motionpro.h
+++ b/include/configs/motionpro.h
@@ -33,7 +33,6 @@
/*
* Command line configuration.
*/
-#define CONFIG_CMD_BEDBUG
#define CONFIG_CMD_DATE
#define CONFIG_CMD_DTT
#define CONFIG_CMD_EEPROM
diff --git a/include/configs/pb1x00.h b/include/configs/pb1x00.h
index 504ddf729ba..f6bd4fec887 100644
--- a/include/configs/pb1x00.h
+++ b/include/configs/pb1x00.h
@@ -149,6 +149,5 @@
*/
#undef CONFIG_CMD_IDE
-#undef CONFIG_CMD_BEDBUG
#endif /* __CONFIG_H */
diff --git a/include/configs/vct.h b/include/configs/vct.h
index 99cb31148aa..9db6fee6e78 100644
--- a/include/configs/vct.h
+++ b/include/configs/vct.h
@@ -255,7 +255,6 @@ int vct_gpio_get(int pin);
* (NOR/OneNAND) usage and Linux kernel booting.
*/
#if defined(CONFIG_VCT_SMALL_IMAGE)
-#undef CONFIG_CMD_BEDBUG
#undef CONFIG_CMD_EEPROM
#undef CONFIG_CMD_EEPROM
#undef CONFIG_CMD_IRQ
diff --git a/scripts/config_whitelist.txt b/scripts/config_whitelist.txt
index caea65b1a57..a58faf71947 100644
--- a/scripts/config_whitelist.txt
+++ b/scripts/config_whitelist.txt
@@ -393,7 +393,6 @@ CONFIG_CM922T_XA10
CONFIG_CMDLINE_EDITING
CONFIG_CMDLINE_PS_SUPPORT
CONFIG_CMDLINE_TAG
-CONFIG_CMD_BEDBUG
CONFIG_CMD_BLOB
CONFIG_CMD_BMODE
CONFIG_CMD_BMP
--
GitLab
From c04b9b3440a2b2c55267bc76c594f49d101657fb Mon Sep 17 00:00:00 2001
From: Simon Glass <sjg@chromium.org>
Date: Wed, 26 Apr 2017 22:27:53 -0600
Subject: [PATCH 171/282] Convert CONFIG_CMD_BLOB to Kconfig
This converts the following to Kconfig:
CONFIG_CMD_BLOB
Signed-off-by: Simon Glass <sjg@chromium.org>
[trini: Add imply CMD_BLOB under CHAIN_OF_TRUST]
Signed-off-by: Tom Rini <trini@konsulko.com>
---
arch/arm/include/asm/fsl_secure_boot.h | 1 -
arch/powerpc/include/asm/fsl_secure_boot.h | 1 -
board/freescale/common/Kconfig | 1 +
cmd/Kconfig | 44 ++++++++++++++++++++++
cmd/Makefile | 2 +-
scripts/config_whitelist.txt | 1 -
6 files changed, 46 insertions(+), 4 deletions(-)
diff --git a/arch/arm/include/asm/fsl_secure_boot.h b/arch/arm/include/asm/fsl_secure_boot.h
index f5ca5d3b697..b0ca4bcf044 100644
--- a/arch/arm/include/asm/fsl_secure_boot.h
+++ b/arch/arm/include/asm/fsl_secure_boot.h
@@ -30,7 +30,6 @@
#define CONFIG_KEY_REVOCATION
#ifndef CONFIG_SPL_BUILD
-#define CONFIG_CMD_BLOB
#define CONFIG_CMD_HASH
#ifndef CONFIG_SYS_RAMBOOT
/* The key used for verification of next level images
diff --git a/arch/powerpc/include/asm/fsl_secure_boot.h b/arch/powerpc/include/asm/fsl_secure_boot.h
index 2b5a2913ec9..62ce816b135 100644
--- a/arch/powerpc/include/asm/fsl_secure_boot.h
+++ b/arch/powerpc/include/asm/fsl_secure_boot.h
@@ -104,7 +104,6 @@
#define CONFIG_SHA_PROG_HW_ACCEL
#ifndef CONFIG_SPL_BUILD
-#define CONFIG_CMD_BLOB
/*
* fsl_setenv_chain_of_trust() must be called from
* board_late_init()
diff --git a/board/freescale/common/Kconfig b/board/freescale/common/Kconfig
index f5190ac1789..8a9a9be8ce8 100644
--- a/board/freescale/common/Kconfig
+++ b/board/freescale/common/Kconfig
@@ -1,5 +1,6 @@
config CHAIN_OF_TRUST
depends on !FIT_SIGNATURE && SECURE_BOOT
+ imply CMD_BLOB
select FSL_CAAM
bool
default y
diff --git a/cmd/Kconfig b/cmd/Kconfig
index 0c6d44e2966..306027c11a6 100644
--- a/cmd/Kconfig
+++ b/cmd/Kconfig
@@ -779,6 +779,50 @@ config CMD_AES
supported by the algorithm but this command only supports 128 bits
at present.
+config CMD_BLOB
+ bool "Enable the 'blob' command"
+ help
+ This is used with the Freescale secure boot mechanism.
+
+ Freescale's SEC block has built-in Blob Protocol which provides
+ a method for protecting user-defined data across system power
+ cycles. SEC block protects data in a data structure called a Blob,
+ which provides both confidentiality and integrity protection.
+
+ Encapsulating data as a blob
+ Each time that the Blob Protocol is used to protect data, a
+ different randomly generated key is used to encrypt the data.
+ This random key is itself encrypted using a key which is derived
+ from SoC's non-volatile secret key and a 16 bit Key identifier.
+ The resulting encrypted key along with encrypted data is called a
+ blob. The non-volatile secure key is available for use only during
+ secure boot.
+
+ During decapsulation, the reverse process is performed to get back
+ the original data.
+
+ Sub-commands:
+ blob enc - encapsulating data as a cryptgraphic blob
+ blob dec - decapsulating cryptgraphic blob to get the data
+
+ Syntax:
+
+ blob enc src dst len km
+
+ Encapsulate and create blob of data $len bytes long
+ at address $src and store the result at address $dst.
+ $km is the 16 byte key modifier is also required for
+ generation/use as key for cryptographic operation. Key
+ modifier should be 16 byte long.
+
+ blob dec src dst len km
+
+ Decapsulate the blob of data at address $src and
+ store result of $len byte at addr $dst.
+ $km is the 16 byte key modifier is also required for
+ generation/use as key for cryptographic operation. Key
+ modifier should be 16 byte long.
+
config CMD_TPM
bool "Enable the 'tpm' command"
depends on TPM
diff --git a/cmd/Makefile b/cmd/Makefile
index 97c862f6511..e98786807b6 100644
--- a/cmd/Makefile
+++ b/cmd/Makefile
@@ -152,9 +152,9 @@ obj-$(CONFIG_CMD_ETHSW) += ethsw.o
# Power
obj-$(CONFIG_CMD_PMIC) += pmic.o
obj-$(CONFIG_CMD_REGULATOR) += regulator.o
-endif # !CONFIG_SPL_BUILD
obj-$(CONFIG_CMD_BLOB) += blob.o
+endif # !CONFIG_SPL_BUILD
# core command
obj-y += nvedit.o
diff --git a/scripts/config_whitelist.txt b/scripts/config_whitelist.txt
index a58faf71947..091cfd35af1 100644
--- a/scripts/config_whitelist.txt
+++ b/scripts/config_whitelist.txt
@@ -393,7 +393,6 @@ CONFIG_CM922T_XA10
CONFIG_CMDLINE_EDITING
CONFIG_CMDLINE_PS_SUPPORT
CONFIG_CMDLINE_TAG
-CONFIG_CMD_BLOB
CONFIG_CMD_BMODE
CONFIG_CMD_BMP
CONFIG_CMD_BSP
--
GitLab
From 218257b01a73b114fa1136f6ee6f25aea80bf113 Mon Sep 17 00:00:00 2001
From: Simon Glass <sjg@chromium.org>
Date: Wed, 26 Apr 2017 22:27:54 -0600
Subject: [PATCH 172/282] Convert CONFIG_CMD_BMODE to Kconfig
This converts the following to Kconfig:
CONFIG_CMD_BMODE
Signed-off-by: Simon Glass <sjg@chromium.org>
[trini: Make this default y and depend on mx5/6/7]
Signed-off-by: Tom Rini <trini@konsulko.com>
---
README | 10 ----------
arch/arm/imx-common/Kconfig | 14 ++++++++++++++
configs/cm_fx6_defconfig | 1 +
configs/imx6dl_icore_mmc_defconfig | 1 +
configs/imx6dl_icore_nand_defconfig | 1 +
configs/imx6dl_icore_rqs_mmc_defconfig | 1 +
configs/imx6q_icore_mmc_defconfig | 1 +
configs/imx6q_icore_nand_defconfig | 1 +
configs/imx6q_icore_rqs_mmc_defconfig | 1 +
configs/imx6ul_geam_mmc_defconfig | 1 +
configs/imx6ul_geam_nand_defconfig | 1 +
configs/imx6ul_isiot_emmc_defconfig | 1 +
configs/imx6ul_isiot_mmc_defconfig | 1 +
configs/imx6ul_isiot_nand_defconfig | 1 +
configs/m53evk_defconfig | 1 +
configs/mccmon6_nor_defconfig | 1 +
configs/mccmon6_sd_defconfig | 1 +
configs/mx51evk_defconfig | 1 +
configs/mx53ard_defconfig | 1 +
configs/mx53cx9020_defconfig | 1 +
configs/mx53loco_defconfig | 1 +
configs/mx53smd_defconfig | 1 +
configs/mx6cuboxi_defconfig | 1 +
configs/mx6dlarm2_defconfig | 1 +
configs/mx6dlarm2_lpddr2_defconfig | 1 +
configs/mx6qarm2_defconfig | 1 +
configs/mx6qarm2_lpddr2_defconfig | 1 +
configs/mx6slevk_defconfig | 1 +
configs/mx6slevk_spinor_defconfig | 1 +
configs/mx6slevk_spl_defconfig | 1 +
configs/mx6sllevk_defconfig | 1 +
configs/mx6sllevk_plugin_defconfig | 1 +
configs/mx6sxsabreauto_defconfig | 1 +
configs/mx6sxsabresd_defconfig | 1 +
configs/mx6sxsabresd_spl_defconfig | 1 +
configs/mx7dsabresd_defconfig | 1 +
configs/mx7dsabresd_secure_defconfig | 1 +
configs/opos6uldev_defconfig | 1 +
configs/pico-imx6ul_defconfig | 1 +
configs/ts4800_defconfig | 1 +
configs/udoo_neo_defconfig | 1 +
configs/usbarmory_defconfig | 1 +
configs/vining_2000_defconfig | 1 +
configs/warp7_defconfig | 1 +
configs/warp7_secure_defconfig | 1 +
configs/warp_defconfig | 1 +
include/configs/advantech_dms-ba16.h | 3 ---
include/configs/apalis_imx6.h | 1 -
include/configs/aristainetos-common.h | 3 ---
include/configs/cgtqmx6eval.h | 3 ---
include/configs/colibri_imx6.h | 1 -
include/configs/colibri_imx7.h | 2 --
include/configs/el6x_common.h | 2 --
include/configs/embestmx6boards.h | 2 --
include/configs/ge_bx50v3.h | 3 ---
include/configs/gw_ventana.h | 1 -
include/configs/imx6_logic.h | 3 ---
include/configs/liteboard.h | 2 --
include/configs/mx53evk.h | 3 ---
include/configs/mx6sabre_common.h | 3 ---
include/configs/mx6ul_14x14_evk.h | 2 --
include/configs/mx6ullevk.h | 2 --
include/configs/nitrogen6x.h | 3 ---
include/configs/novena.h | 1 -
include/configs/ot1200.h | 3 ---
include/configs/pcm058.h | 1 -
include/configs/platinum.h | 1 -
include/configs/secomx6quq7.h | 3 ---
include/configs/tbs2910.h | 3 ---
include/configs/titanium.h | 3 ---
include/configs/tqma6.h | 3 ---
include/configs/udoo.h | 3 ---
include/configs/wandboard.h | 3 ---
include/configs/xpress.h | 2 --
scripts/config_whitelist.txt | 1 -
75 files changed, 58 insertions(+), 76 deletions(-)
diff --git a/README b/README
index cec6851dd33..e5e6d5782fc 100644
--- a/README
+++ b/README
@@ -2848,16 +2848,6 @@ The following options need to be configured:
This enables 'hdmidet' command which returns true if an
HDMI monitor is detected. This command is i.MX 6 specific.
- CONFIG_CMD_BMODE
- This enables the 'bmode' (bootmode) command for forcing
- a boot from specific media.
-
- This is useful for forcing the ROM's usb downloader to
- activate upon a watchdog reset which is nice when iterating
- on U-Boot. Using the reset button or running bmode normal
- will set it back to normal. This command currently
- supports i.MX53 and i.MX6.
-
- bootcount support:
CONFIG_BOOTCOUNT_LIMIT
diff --git a/arch/arm/imx-common/Kconfig b/arch/arm/imx-common/Kconfig
index 7ee74d59a85..5eb3ba01416 100644
--- a/arch/arm/imx-common/Kconfig
+++ b/arch/arm/imx-common/Kconfig
@@ -32,3 +32,17 @@ config SECURE_BOOT
help
This option enables the support for secure boot (HAB).
See doc/README.mxc_hab for more details.
+
+config CMD_BMODE
+ bool "Support the 'bmode' command"
+ default y
+ depends on ARCH_MX7 || ARCH_MX6 || ARCH_MX5
+ help
+ This enables the 'bmode' (bootmode) command for forcing
+ a boot from specific media.
+
+ This is useful for forcing the ROM's usb downloader to
+ activate upon a watchdog reset which is nice when iterating
+ on U-Boot. Using the reset button or running bmode normal
+ will set it back to normal. This command currently
+ supports i.MX53 and i.MX6.
diff --git a/configs/cm_fx6_defconfig b/configs/cm_fx6_defconfig
index 21544892340..2e178f18fe4 100644
--- a/configs/cm_fx6_defconfig
+++ b/configs/cm_fx6_defconfig
@@ -9,6 +9,7 @@ CONFIG_SPL_SERIAL_SUPPORT=y
CONFIG_SPL_SPI_FLASH_SUPPORT=y
CONFIG_SPL_SPI_SUPPORT=y
CONFIG_SPL_WATCHDOG_SUPPORT=y
+# CONFIG_CMD_BMODE is not set
CONFIG_VIDEO=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/imx-common/spl_sd.cfg,MX6QDL,SPL"
diff --git a/configs/imx6dl_icore_mmc_defconfig b/configs/imx6dl_icore_mmc_defconfig
index da16dc565d0..6b67156ca55 100644
--- a/configs/imx6dl_icore_mmc_defconfig
+++ b/configs/imx6dl_icore_mmc_defconfig
@@ -7,6 +7,7 @@ CONFIG_TARGET_MX6Q_ICORE=y
CONFIG_SPL_SERIAL_SUPPORT=y
CONFIG_SPL_LIBDISK_SUPPORT=y
CONFIG_SPL_WATCHDOG_SUPPORT=y
+# CONFIG_CMD_BMODE is not set
CONFIG_VIDEO=y
CONFIG_DEFAULT_DEVICE_TREE="imx6dl-icore"
CONFIG_FIT=y
diff --git a/configs/imx6dl_icore_nand_defconfig b/configs/imx6dl_icore_nand_defconfig
index 69d6b56cb1a..2099370aa3f 100644
--- a/configs/imx6dl_icore_nand_defconfig
+++ b/configs/imx6dl_icore_nand_defconfig
@@ -6,6 +6,7 @@ CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_TARGET_MX6Q_ICORE=y
CONFIG_SPL_SERIAL_SUPPORT=y
CONFIG_SPL_WATCHDOG_SUPPORT=y
+# CONFIG_CMD_BMODE is not set
CONFIG_VIDEO=y
CONFIG_DEFAULT_DEVICE_TREE="imx6dl-icore"
CONFIG_FIT=y
diff --git a/configs/imx6dl_icore_rqs_mmc_defconfig b/configs/imx6dl_icore_rqs_mmc_defconfig
index 64fa2ec7cd3..1a7d8efcedc 100644
--- a/configs/imx6dl_icore_rqs_mmc_defconfig
+++ b/configs/imx6dl_icore_rqs_mmc_defconfig
@@ -7,6 +7,7 @@ CONFIG_TARGET_MX6Q_ICORE_RQS=y
CONFIG_SPL_SERIAL_SUPPORT=y
CONFIG_SPL_LIBDISK_SUPPORT=y
CONFIG_SPL_WATCHDOG_SUPPORT=y
+# CONFIG_CMD_BMODE is not set
CONFIG_DEFAULT_DEVICE_TREE="imx6dl-icore-rqs"
CONFIG_FIT=y
CONFIG_FIT_SIGNATURE=y
diff --git a/configs/imx6q_icore_mmc_defconfig b/configs/imx6q_icore_mmc_defconfig
index bc800088ae4..adb04728111 100644
--- a/configs/imx6q_icore_mmc_defconfig
+++ b/configs/imx6q_icore_mmc_defconfig
@@ -7,6 +7,7 @@ CONFIG_TARGET_MX6Q_ICORE=y
CONFIG_SPL_SERIAL_SUPPORT=y
CONFIG_SPL_LIBDISK_SUPPORT=y
CONFIG_SPL_WATCHDOG_SUPPORT=y
+# CONFIG_CMD_BMODE is not set
CONFIG_VIDEO=y
CONFIG_DEFAULT_DEVICE_TREE="imx6q-icore"
CONFIG_FIT=y
diff --git a/configs/imx6q_icore_nand_defconfig b/configs/imx6q_icore_nand_defconfig
index e9e41a0a2b3..45d5fcec588 100644
--- a/configs/imx6q_icore_nand_defconfig
+++ b/configs/imx6q_icore_nand_defconfig
@@ -6,6 +6,7 @@ CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_TARGET_MX6Q_ICORE=y
CONFIG_SPL_SERIAL_SUPPORT=y
CONFIG_SPL_WATCHDOG_SUPPORT=y
+# CONFIG_CMD_BMODE is not set
CONFIG_VIDEO=y
CONFIG_DEFAULT_DEVICE_TREE="imx6q-icore"
CONFIG_FIT=y
diff --git a/configs/imx6q_icore_rqs_mmc_defconfig b/configs/imx6q_icore_rqs_mmc_defconfig
index 6bbdfa8981f..aef6d364acc 100644
--- a/configs/imx6q_icore_rqs_mmc_defconfig
+++ b/configs/imx6q_icore_rqs_mmc_defconfig
@@ -7,6 +7,7 @@ CONFIG_TARGET_MX6Q_ICORE_RQS=y
CONFIG_SPL_SERIAL_SUPPORT=y
CONFIG_SPL_LIBDISK_SUPPORT=y
CONFIG_SPL_WATCHDOG_SUPPORT=y
+# CONFIG_CMD_BMODE is not set
CONFIG_DEFAULT_DEVICE_TREE="imx6q-icore-rqs"
CONFIG_FIT=y
CONFIG_FIT_SIGNATURE=y
diff --git a/configs/imx6ul_geam_mmc_defconfig b/configs/imx6ul_geam_mmc_defconfig
index c59b56d457c..35610c6f823 100644
--- a/configs/imx6ul_geam_mmc_defconfig
+++ b/configs/imx6ul_geam_mmc_defconfig
@@ -7,6 +7,7 @@ CONFIG_TARGET_MX6UL_GEAM=y
CONFIG_SPL_SERIAL_SUPPORT=y
CONFIG_SPL_LIBDISK_SUPPORT=y
CONFIG_SPL_WATCHDOG_SUPPORT=y
+# CONFIG_CMD_BMODE is not set
CONFIG_DEFAULT_DEVICE_TREE="imx6ul-geam-kit"
CONFIG_FIT=y
CONFIG_FIT_SIGNATURE=y
diff --git a/configs/imx6ul_geam_nand_defconfig b/configs/imx6ul_geam_nand_defconfig
index a4512c525c1..7010d3d1e3a 100644
--- a/configs/imx6ul_geam_nand_defconfig
+++ b/configs/imx6ul_geam_nand_defconfig
@@ -6,6 +6,7 @@ CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_TARGET_MX6UL_GEAM=y
CONFIG_SPL_SERIAL_SUPPORT=y
CONFIG_SPL_WATCHDOG_SUPPORT=y
+# CONFIG_CMD_BMODE is not set
CONFIG_DEFAULT_DEVICE_TREE="imx6ul-geam-kit"
CONFIG_FIT=y
CONFIG_FIT_SIGNATURE=y
diff --git a/configs/imx6ul_isiot_emmc_defconfig b/configs/imx6ul_isiot_emmc_defconfig
index 94fe80866dc..a08a1759651 100644
--- a/configs/imx6ul_isiot_emmc_defconfig
+++ b/configs/imx6ul_isiot_emmc_defconfig
@@ -8,6 +8,7 @@ CONFIG_SPL_EXT_SUPPORT=y
CONFIG_SPL_LIBDISK_SUPPORT=y
CONFIG_SPL_SERIAL_SUPPORT=y
CONFIG_SPL_WATCHDOG_SUPPORT=y
+# CONFIG_CMD_BMODE is not set
CONFIG_DEFAULT_DEVICE_TREE="imx6ul-isiot-emmc"
CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/imx-common/spl_sd.cfg,ENV_IS_IN_MMC"
CONFIG_BOOTDELAY=3
diff --git a/configs/imx6ul_isiot_mmc_defconfig b/configs/imx6ul_isiot_mmc_defconfig
index 8ecdd8e5691..08624a1ce08 100644
--- a/configs/imx6ul_isiot_mmc_defconfig
+++ b/configs/imx6ul_isiot_mmc_defconfig
@@ -8,6 +8,7 @@ CONFIG_SPL_EXT_SUPPORT=y
CONFIG_SPL_LIBDISK_SUPPORT=y
CONFIG_SPL_SERIAL_SUPPORT=y
CONFIG_SPL_WATCHDOG_SUPPORT=y
+# CONFIG_CMD_BMODE is not set
CONFIG_DEFAULT_DEVICE_TREE="imx6ul-isiot-mmc"
CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/imx-common/spl_sd.cfg,ENV_IS_IN_MMC"
CONFIG_BOOTDELAY=3
diff --git a/configs/imx6ul_isiot_nand_defconfig b/configs/imx6ul_isiot_nand_defconfig
index 6f1a05471f9..045c3e7ab82 100644
--- a/configs/imx6ul_isiot_nand_defconfig
+++ b/configs/imx6ul_isiot_nand_defconfig
@@ -6,6 +6,7 @@ CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_TARGET_MX6UL_ISIOT=y
CONFIG_SPL_SERIAL_SUPPORT=y
CONFIG_SPL_WATCHDOG_SUPPORT=y
+# CONFIG_CMD_BMODE is not set
CONFIG_DEFAULT_DEVICE_TREE="imx6ul-isiot-nand"
CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/imx-common/spl_sd.cfg,ENV_IS_IN_NAND"
CONFIG_BOOTDELAY=3
diff --git a/configs/m53evk_defconfig b/configs/m53evk_defconfig
index 74b1ae6eb8a..21a29aafc2d 100644
--- a/configs/m53evk_defconfig
+++ b/configs/m53evk_defconfig
@@ -6,6 +6,7 @@ CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_TARGET_M53EVK=y
CONFIG_SPL_SERIAL_SUPPORT=y
CONFIG_SPL_NAND_SUPPORT=y
+# CONFIG_CMD_BMODE is not set
CONFIG_VIDEO=y
CONFIG_FIT=y
CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/aries/m53evk/imximage.cfg"
diff --git a/configs/mccmon6_nor_defconfig b/configs/mccmon6_nor_defconfig
index 87f48990a1c..77a4035384a 100644
--- a/configs/mccmon6_nor_defconfig
+++ b/configs/mccmon6_nor_defconfig
@@ -4,6 +4,7 @@ CONFIG_SPL_GPIO_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_TARGET_MCCMON6=y
CONFIG_SPL_SERIAL_SUPPORT=y
+# CONFIG_CMD_BMODE is not set
CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/liebherr/mccmon6/mon6_imximage_nor.cfg,MX6QDL"
CONFIG_SPL=y
CONFIG_SPL_ENV_SUPPORT=y
diff --git a/configs/mccmon6_sd_defconfig b/configs/mccmon6_sd_defconfig
index d478fbe8c73..332eddfa38a 100644
--- a/configs/mccmon6_sd_defconfig
+++ b/configs/mccmon6_sd_defconfig
@@ -5,6 +5,7 @@ CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_TARGET_MCCMON6=y
CONFIG_SPL_MMC_SUPPORT=y
CONFIG_SPL_SERIAL_SUPPORT=y
+# CONFIG_CMD_BMODE is not set
CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/liebherr/mccmon6/mon6_imximage_sd.cfg,MX6QDL"
CONFIG_SPL=y
CONFIG_SPL_ENV_SUPPORT=y
diff --git a/configs/mx51evk_defconfig b/configs/mx51evk_defconfig
index b385009c53f..5b92912346e 100644
--- a/configs/mx51evk_defconfig
+++ b/configs/mx51evk_defconfig
@@ -1,6 +1,7 @@
CONFIG_ARM=y
CONFIG_ARCH_MX5=y
CONFIG_TARGET_MX51EVK=y
+# CONFIG_CMD_BMODE is not set
CONFIG_VIDEO=y
CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/mx51evk/imximage.cfg"
CONFIG_BOOTDELAY=1
diff --git a/configs/mx53ard_defconfig b/configs/mx53ard_defconfig
index 51d3bfb6a46..146e7de7e38 100644
--- a/configs/mx53ard_defconfig
+++ b/configs/mx53ard_defconfig
@@ -1,6 +1,7 @@
CONFIG_ARM=y
CONFIG_ARCH_MX5=y
CONFIG_TARGET_MX53ARD=y
+# CONFIG_CMD_BMODE is not set
CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/mx53ard/imximage_dd3.cfg"
CONFIG_BOOTDELAY=3
CONFIG_DEFAULT_FDT_FILE="imx53-ard.dtb"
diff --git a/configs/mx53cx9020_defconfig b/configs/mx53cx9020_defconfig
index 9784267386a..d947d9fd5b1 100644
--- a/configs/mx53cx9020_defconfig
+++ b/configs/mx53cx9020_defconfig
@@ -1,6 +1,7 @@
CONFIG_ARM=y
CONFIG_ARCH_MX5=y
CONFIG_TARGET_MX53CX9020=y
+# CONFIG_CMD_BMODE is not set
CONFIG_VIDEO=y
CONFIG_DEFAULT_DEVICE_TREE="imx53-cx9020"
CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/beckhoff/mx53cx9020/imximage.cfg"
diff --git a/configs/mx53loco_defconfig b/configs/mx53loco_defconfig
index 5b62f03c087..b71c3ae7191 100644
--- a/configs/mx53loco_defconfig
+++ b/configs/mx53loco_defconfig
@@ -1,6 +1,7 @@
CONFIG_ARM=y
CONFIG_ARCH_MX5=y
CONFIG_TARGET_MX53LOCO=y
+# CONFIG_CMD_BMODE is not set
CONFIG_VIDEO=y
CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/mx53loco/imximage.cfg"
CONFIG_BOOTDELAY=1
diff --git a/configs/mx53smd_defconfig b/configs/mx53smd_defconfig
index 95ca52eb213..2a481a399e2 100644
--- a/configs/mx53smd_defconfig
+++ b/configs/mx53smd_defconfig
@@ -1,6 +1,7 @@
CONFIG_ARM=y
CONFIG_ARCH_MX5=y
CONFIG_TARGET_MX53SMD=y
+# CONFIG_CMD_BMODE is not set
CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/mx53smd/imximage.cfg"
CONFIG_BOOTDELAY=3
CONFIG_HUSH_PARSER=y
diff --git a/configs/mx6cuboxi_defconfig b/configs/mx6cuboxi_defconfig
index 11c18ec4fbb..c34beb74e2f 100644
--- a/configs/mx6cuboxi_defconfig
+++ b/configs/mx6cuboxi_defconfig
@@ -8,6 +8,7 @@ CONFIG_SPL_MMC_SUPPORT=y
CONFIG_SPL_SERIAL_SUPPORT=y
CONFIG_SPL_LIBDISK_SUPPORT=y
CONFIG_SPL_WATCHDOG_SUPPORT=y
+# CONFIG_CMD_BMODE is not set
CONFIG_VIDEO=y
CONFIG_DISTRO_DEFAULTS=y
CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/imx-common/spl_sd.cfg,MX6QDL"
diff --git a/configs/mx6dlarm2_defconfig b/configs/mx6dlarm2_defconfig
index e370c41f771..82e9a069a32 100644
--- a/configs/mx6dlarm2_defconfig
+++ b/configs/mx6dlarm2_defconfig
@@ -1,6 +1,7 @@
CONFIG_ARM=y
CONFIG_ARCH_MX6=y
CONFIG_TARGET_MX6QARM2=y
+# CONFIG_CMD_BMODE is not set
CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/mx6qarm2/imximage_mx6dl.cfg,MX6DL,DDR_MB=2048"
CONFIG_BOOTDELAY=3
CONFIG_BOARD_EARLY_INIT_F=y
diff --git a/configs/mx6dlarm2_lpddr2_defconfig b/configs/mx6dlarm2_lpddr2_defconfig
index c5072786867..19fede69619 100644
--- a/configs/mx6dlarm2_lpddr2_defconfig
+++ b/configs/mx6dlarm2_lpddr2_defconfig
@@ -1,6 +1,7 @@
CONFIG_ARM=y
CONFIG_ARCH_MX6=y
CONFIG_TARGET_MX6QARM2=y
+# CONFIG_CMD_BMODE is not set
CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/mx6qarm2/imximage_mx6dl.cfg,MX6DL,MX6DL_LPDDR2,DDR_MB=512"
CONFIG_BOOTDELAY=3
CONFIG_BOARD_EARLY_INIT_F=y
diff --git a/configs/mx6qarm2_defconfig b/configs/mx6qarm2_defconfig
index e0e99188fb9..cee1300a2dd 100644
--- a/configs/mx6qarm2_defconfig
+++ b/configs/mx6qarm2_defconfig
@@ -1,6 +1,7 @@
CONFIG_ARM=y
CONFIG_ARCH_MX6=y
CONFIG_TARGET_MX6QARM2=y
+# CONFIG_CMD_BMODE is not set
CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/mx6qarm2/imximage.cfg,MX6Q,DDR_MB=2048"
CONFIG_BOOTDELAY=3
CONFIG_BOARD_EARLY_INIT_F=y
diff --git a/configs/mx6qarm2_lpddr2_defconfig b/configs/mx6qarm2_lpddr2_defconfig
index 0f80ba19a97..f150e3287ef 100644
--- a/configs/mx6qarm2_lpddr2_defconfig
+++ b/configs/mx6qarm2_lpddr2_defconfig
@@ -1,6 +1,7 @@
CONFIG_ARM=y
CONFIG_ARCH_MX6=y
CONFIG_TARGET_MX6QARM2=y
+# CONFIG_CMD_BMODE is not set
CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/mx6qarm2/imximage.cfg,MX6Q,MX6DQ_LPDDR2,DDR_MB=512"
CONFIG_BOOTDELAY=3
CONFIG_BOARD_EARLY_INIT_F=y
diff --git a/configs/mx6slevk_defconfig b/configs/mx6slevk_defconfig
index fcacd21680b..6903fc9ebc6 100644
--- a/configs/mx6slevk_defconfig
+++ b/configs/mx6slevk_defconfig
@@ -1,6 +1,7 @@
CONFIG_ARM=y
CONFIG_ARCH_MX6=y
CONFIG_TARGET_MX6SLEVK=y
+# CONFIG_CMD_BMODE is not set
CONFIG_DEFAULT_DEVICE_TREE="imx6sl-evk"
CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/mx6slevk/imximage.cfg,MX6SL"
CONFIG_BOOTDELAY=3
diff --git a/configs/mx6slevk_spinor_defconfig b/configs/mx6slevk_spinor_defconfig
index f9eba0c1f6d..67d62f88127 100644
--- a/configs/mx6slevk_spinor_defconfig
+++ b/configs/mx6slevk_spinor_defconfig
@@ -1,6 +1,7 @@
CONFIG_ARM=y
CONFIG_ARCH_MX6=y
CONFIG_TARGET_MX6SLEVK=y
+# CONFIG_CMD_BMODE is not set
CONFIG_DEFAULT_DEVICE_TREE="imx6sl-evk"
CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/mx6slevk/imximage.cfg,MX6SL"
CONFIG_SPI_BOOT=y
diff --git a/configs/mx6slevk_spl_defconfig b/configs/mx6slevk_spl_defconfig
index 7d3de1f943e..1fd86fc7f16 100644
--- a/configs/mx6slevk_spl_defconfig
+++ b/configs/mx6slevk_spl_defconfig
@@ -8,6 +8,7 @@ CONFIG_SPL_MMC_SUPPORT=y
CONFIG_SPL_SERIAL_SUPPORT=y
CONFIG_SPL_LIBDISK_SUPPORT=y
CONFIG_SPL_WATCHDOG_SUPPORT=y
+# CONFIG_CMD_BMODE is not set
CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/imx-common/spl_sd.cfg,SPL,MX6SL,SYS_I2C"
CONFIG_BOOTDELAY=3
CONFIG_BOARD_EARLY_INIT_F=y
diff --git a/configs/mx6sllevk_defconfig b/configs/mx6sllevk_defconfig
index 12664f50112..a87dec8e3a1 100644
--- a/configs/mx6sllevk_defconfig
+++ b/configs/mx6sllevk_defconfig
@@ -1,6 +1,7 @@
CONFIG_ARM=y
CONFIG_ARCH_MX6=y
CONFIG_TARGET_MX6SLLEVK=y
+# CONFIG_CMD_BMODE is not set
CONFIG_DEFAULT_DEVICE_TREE="imx6sll-evk"
CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/mx6sllevk/imximage.cfg"
CONFIG_BOOTDELAY=3
diff --git a/configs/mx6sllevk_plugin_defconfig b/configs/mx6sllevk_plugin_defconfig
index 8a7a01b220c..41ecf923226 100644
--- a/configs/mx6sllevk_plugin_defconfig
+++ b/configs/mx6sllevk_plugin_defconfig
@@ -2,6 +2,7 @@ CONFIG_ARM=y
CONFIG_ARCH_MX6=y
CONFIG_TARGET_MX6SLLEVK=y
CONFIG_USE_IMXIMG_PLUGIN=y
+# CONFIG_CMD_BMODE is not set
CONFIG_DEFAULT_DEVICE_TREE="imx6sll-evk"
CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/mx6sllevk/imximage.cfg"
CONFIG_BOOTDELAY=3
diff --git a/configs/mx6sxsabreauto_defconfig b/configs/mx6sxsabreauto_defconfig
index b5467406a9d..f9c2af95b1a 100644
--- a/configs/mx6sxsabreauto_defconfig
+++ b/configs/mx6sxsabreauto_defconfig
@@ -1,6 +1,7 @@
CONFIG_ARM=y
CONFIG_ARCH_MX6=y
CONFIG_TARGET_MX6SXSABREAUTO=y
+# CONFIG_CMD_BMODE is not set
CONFIG_DEFAULT_DEVICE_TREE="imx6sx-sabreauto"
CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/mx6sxsabreauto/imximage.cfg"
CONFIG_BOOTDELAY=3
diff --git a/configs/mx6sxsabresd_defconfig b/configs/mx6sxsabresd_defconfig
index 1a21eb069da..847dd5980f1 100644
--- a/configs/mx6sxsabresd_defconfig
+++ b/configs/mx6sxsabresd_defconfig
@@ -1,6 +1,7 @@
CONFIG_ARM=y
CONFIG_ARCH_MX6=y
CONFIG_TARGET_MX6SXSABRESD=y
+# CONFIG_CMD_BMODE is not set
CONFIG_VIDEO=y
CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/mx6sxsabresd/imximage.cfg"
CONFIG_BOOTDELAY=3
diff --git a/configs/mx6sxsabresd_spl_defconfig b/configs/mx6sxsabresd_spl_defconfig
index 522c862a172..85ccd5f6e3c 100644
--- a/configs/mx6sxsabresd_spl_defconfig
+++ b/configs/mx6sxsabresd_spl_defconfig
@@ -8,6 +8,7 @@ CONFIG_SPL_MMC_SUPPORT=y
CONFIG_SPL_SERIAL_SUPPORT=y
CONFIG_SPL_LIBDISK_SUPPORT=y
CONFIG_SPL_WATCHDOG_SUPPORT=y
+# CONFIG_CMD_BMODE is not set
CONFIG_VIDEO=y
CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/imx-common/spl_sd.cfg"
CONFIG_BOOTDELAY=3
diff --git a/configs/mx7dsabresd_defconfig b/configs/mx7dsabresd_defconfig
index 9541e1249df..9cca305113b 100644
--- a/configs/mx7dsabresd_defconfig
+++ b/configs/mx7dsabresd_defconfig
@@ -4,6 +4,7 @@ CONFIG_TARGET_MX7DSABRESD=y
# CONFIG_ARMV7_VIRT is not set
CONFIG_IMX_RDC=y
CONFIG_IMX_BOOTAUX=y
+# CONFIG_CMD_BMODE is not set
CONFIG_VIDEO=y
CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/mx7dsabresd/imximage.cfg"
CONFIG_BOOTDELAY=3
diff --git a/configs/mx7dsabresd_secure_defconfig b/configs/mx7dsabresd_secure_defconfig
index e8ccbd3eea6..f183277dcbb 100644
--- a/configs/mx7dsabresd_secure_defconfig
+++ b/configs/mx7dsabresd_secure_defconfig
@@ -4,6 +4,7 @@ CONFIG_TARGET_MX7DSABRESD=y
CONFIG_ARMV7_BOOT_SEC_DEFAULT=y
CONFIG_IMX_RDC=y
CONFIG_IMX_BOOTAUX=y
+# CONFIG_CMD_BMODE is not set
CONFIG_VIDEO=y
CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/mx7dsabresd/imximage.cfg"
CONFIG_BOOTDELAY=3
diff --git a/configs/opos6uldev_defconfig b/configs/opos6uldev_defconfig
index 5c3a3f6e5d0..6c61ad7c72b 100644
--- a/configs/opos6uldev_defconfig
+++ b/configs/opos6uldev_defconfig
@@ -8,6 +8,7 @@ CONFIG_SPL_MMC_SUPPORT=y
CONFIG_SPL_SERIAL_SUPPORT=y
CONFIG_SPL_ENV_SUPPORT=y
CONFIG_SPL_WATCHDOG_SUPPORT=y
+# CONFIG_CMD_BMODE is not set
CONFIG_VIDEO=y
CONFIG_SPL_YMODEM_SUPPORT=y
CONFIG_DEFAULT_DEVICE_TREE="imx6ul-opos6uldev"
diff --git a/configs/pico-imx6ul_defconfig b/configs/pico-imx6ul_defconfig
index a2a303c37a3..d18a96e18e6 100644
--- a/configs/pico-imx6ul_defconfig
+++ b/configs/pico-imx6ul_defconfig
@@ -1,6 +1,7 @@
CONFIG_ARM=y
CONFIG_ARCH_MX6=y
CONFIG_TARGET_PICO_IMX6UL=y
+# CONFIG_CMD_BMODE is not set
CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/technexion/pico-imx6ul/imximage.cfg"
CONFIG_BOOTDELAY=3
CONFIG_DEFAULT_FDT_FILE="imx6ul-pico-hobbit.dtb"
diff --git a/configs/ts4800_defconfig b/configs/ts4800_defconfig
index 5a4bf2773e3..4d4aebd06ff 100644
--- a/configs/ts4800_defconfig
+++ b/configs/ts4800_defconfig
@@ -1,6 +1,7 @@
CONFIG_ARM=y
CONFIG_ARCH_MX5=y
CONFIG_TARGET_TS4800=y
+# CONFIG_CMD_BMODE is not set
CONFIG_BOOTDELAY=1
CONFIG_HUSH_PARSER=y
CONFIG_CMD_BOOTZ=y
diff --git a/configs/udoo_neo_defconfig b/configs/udoo_neo_defconfig
index cac16114559..cad2a024a61 100644
--- a/configs/udoo_neo_defconfig
+++ b/configs/udoo_neo_defconfig
@@ -8,6 +8,7 @@ CONFIG_SPL_MMC_SUPPORT=y
CONFIG_SPL_SERIAL_SUPPORT=y
CONFIG_SPL_LIBDISK_SUPPORT=y
CONFIG_SPL_WATCHDOG_SUPPORT=y
+# CONFIG_CMD_BMODE is not set
CONFIG_DISTRO_DEFAULTS=y
CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/imx-common/spl_sd.cfg"
CONFIG_BOARD_EARLY_INIT_F=y
diff --git a/configs/usbarmory_defconfig b/configs/usbarmory_defconfig
index ed161055ae0..43256177be0 100644
--- a/configs/usbarmory_defconfig
+++ b/configs/usbarmory_defconfig
@@ -1,6 +1,7 @@
CONFIG_ARM=y
CONFIG_ARCH_MX5=y
CONFIG_TARGET_USBARMORY=y
+# CONFIG_CMD_BMODE is not set
CONFIG_DISTRO_DEFAULTS=y
# CONFIG_CMD_IMLS is not set
CONFIG_CMD_MEMTEST=y
diff --git a/configs/vining_2000_defconfig b/configs/vining_2000_defconfig
index 612292c0685..0099cabc823 100644
--- a/configs/vining_2000_defconfig
+++ b/configs/vining_2000_defconfig
@@ -1,6 +1,7 @@
CONFIG_ARM=y
CONFIG_ARCH_MX6=y
CONFIG_TARGET_SAMTEC_VINING_2000=y
+# CONFIG_CMD_BMODE is not set
CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/samtec/vining_2000/imximage.cfg"
CONFIG_BOOTDELAY=0
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
diff --git a/configs/warp7_defconfig b/configs/warp7_defconfig
index b5489b0dcbb..db1c7cb46d3 100644
--- a/configs/warp7_defconfig
+++ b/configs/warp7_defconfig
@@ -4,6 +4,7 @@ CONFIG_TARGET_WARP7=y
# CONFIG_ARMV7_VIRT is not set
CONFIG_IMX_RDC=y
CONFIG_IMX_BOOTAUX=y
+# CONFIG_CMD_BMODE is not set
CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/warp7/imximage.cfg"
CONFIG_HUSH_PARSER=y
# CONFIG_CMD_BOOTD is not set
diff --git a/configs/warp7_secure_defconfig b/configs/warp7_secure_defconfig
index bb2154398d0..b80e1a6e8de 100644
--- a/configs/warp7_secure_defconfig
+++ b/configs/warp7_secure_defconfig
@@ -5,6 +5,7 @@ CONFIG_ARMV7_BOOT_SEC_DEFAULT=y
# CONFIG_ARMV7_VIRT is not set
CONFIG_IMX_RDC=y
CONFIG_IMX_BOOTAUX=y
+# CONFIG_CMD_BMODE is not set
CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/warp7/imximage.cfg"
CONFIG_HUSH_PARSER=y
# CONFIG_CMD_BOOTD is not set
diff --git a/configs/warp_defconfig b/configs/warp_defconfig
index 2f423271bb4..e29afe7b4a1 100644
--- a/configs/warp_defconfig
+++ b/configs/warp_defconfig
@@ -1,6 +1,7 @@
CONFIG_ARM=y
CONFIG_ARCH_MX6=y
CONFIG_TARGET_WARP=y
+# CONFIG_CMD_BMODE is not set
CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/warp/imximage.cfg,MX6SL"
CONFIG_BOOTDELAY=3
CONFIG_BOARD_EARLY_INIT_F=y
diff --git a/include/configs/advantech_dms-ba16.h b/include/configs/advantech_dms-ba16.h
index 30dd9e59667..52f84756697 100644
--- a/include/configs/advantech_dms-ba16.h
+++ b/include/configs/advantech_dms-ba16.h
@@ -91,9 +91,6 @@
#define CONFIG_ENV_OVERWRITE
#define CONFIG_CONS_INDEX 1
-/* Command definition */
-#define CONFIG_CMD_BMODE
-
#define CONFIG_LOADADDR 0x12000000
#define CONFIG_SYS_TEXT_BASE 0x17800000
diff --git a/include/configs/apalis_imx6.h b/include/configs/apalis_imx6.h
index c0c575a490b..e195af4d642 100644
--- a/include/configs/apalis_imx6.h
+++ b/include/configs/apalis_imx6.h
@@ -121,7 +121,6 @@
#define CONFIG_DFU_MMC
/* Miscellaneous commands */
-#define CONFIG_CMD_BMODE
#define CONFIG_MXC_GPIO
/* Framebuffer and LCD */
diff --git a/include/configs/aristainetos-common.h b/include/configs/aristainetos-common.h
index 5c27055e457..607dadf98ef 100644
--- a/include/configs/aristainetos-common.h
+++ b/include/configs/aristainetos-common.h
@@ -41,9 +41,6 @@
#define CONFIG_SF_DEFAULT_MODE SPI_MODE_0
#define CONFIG_SYS_SPI_ST_ENABLE_WP_PIN
-/* Command definition */
-#define CONFIG_CMD_BMODE
-
#define CONFIG_EXTRA_ENV_SETTINGS \
"script=u-boot.scr\0" \
"fit_file=/boot/system.itb\0" \
diff --git a/include/configs/cgtqmx6eval.h b/include/configs/cgtqmx6eval.h
index c32372a66ce..e05db3ed8a1 100644
--- a/include/configs/cgtqmx6eval.h
+++ b/include/configs/cgtqmx6eval.h
@@ -43,9 +43,6 @@
#define CONFIG_SF_DEFAULT_SPEED 20000000
#define CONFIG_SF_DEFAULT_MODE (SPI_MODE_0)
-/* Miscellaneous commands */
-#define CONFIG_CMD_BMODE
-
/* Thermal support */
#define CONFIG_IMX_THERMAL
diff --git a/include/configs/colibri_imx6.h b/include/configs/colibri_imx6.h
index 0b58e5b9f5c..5d188e80d9d 100644
--- a/include/configs/colibri_imx6.h
+++ b/include/configs/colibri_imx6.h
@@ -102,7 +102,6 @@
#define CONFIG_DFU_MMC
/* Miscellaneous commands */
-#define CONFIG_CMD_BMODE
#define CONFIG_MXC_GPIO
/* Framebuffer and LCD */
diff --git a/include/configs/colibri_imx7.h b/include/configs/colibri_imx7.h
index 87d20129849..7e25fd7066c 100644
--- a/include/configs/colibri_imx7.h
+++ b/include/configs/colibri_imx7.h
@@ -25,8 +25,6 @@
/* Size of malloc() pool */
#define CONFIG_SYS_MALLOC_LEN (32 * SZ_1M)
-#define CONFIG_CMD_BMODE
-
/* Network */
#define CONFIG_FEC_MXC
#define CONFIG_MII
diff --git a/include/configs/el6x_common.h b/include/configs/el6x_common.h
index 084839702b0..575610d4104 100644
--- a/include/configs/el6x_common.h
+++ b/include/configs/el6x_common.h
@@ -57,8 +57,6 @@
#define CONFIG_MXC_UART_BASE UART2_BASE
/* Command definition */
-
-#define CONFIG_CMD_BMODE
#undef CONFIG_CMD_IMLS
#define CONFIG_BOARD_NAME EL6Q
diff --git a/include/configs/embestmx6boards.h b/include/configs/embestmx6boards.h
index 658f4d932da..68d48b2e6ae 100644
--- a/include/configs/embestmx6boards.h
+++ b/include/configs/embestmx6boards.h
@@ -65,8 +65,6 @@
#define CONFIG_SF_DEFAULT_MODE SPI_MODE_0
#endif
-#define CONFIG_CMD_BMODE
-
#define CONFIG_ARP_TIMEOUT 200UL
/* Print Buffer Size */
diff --git a/include/configs/ge_bx50v3.h b/include/configs/ge_bx50v3.h
index 43b1fb030c1..776910c6cdd 100644
--- a/include/configs/ge_bx50v3.h
+++ b/include/configs/ge_bx50v3.h
@@ -114,9 +114,6 @@
#define CONFIG_ENV_OVERWRITE
#define CONFIG_CONS_INDEX 1
-/* Command definition */
-#define CONFIG_CMD_BMODE
-
#define CONFIG_LOADADDR 0x12000000
#define CONFIG_SYS_TEXT_BASE 0x17800000
diff --git a/include/configs/gw_ventana.h b/include/configs/gw_ventana.h
index 28289a348fe..92eded6cdad 100644
--- a/include/configs/gw_ventana.h
+++ b/include/configs/gw_ventana.h
@@ -141,7 +141,6 @@
#define CONFIG_POWER_LTC3676_I2C_ADDR 0x3c
/* Various command support */
-#define CONFIG_CMD_BMODE /* set eFUSE shadow for a boot dev and reset */
#define CONFIG_CMD_HDMIDETECT /* detect HDMI output device */
#define CONFIG_CMD_GSC
#define CONFIG_CMD_EECONFIG /* Gateworks EEPROM config cmd */
diff --git a/include/configs/imx6_logic.h b/include/configs/imx6_logic.h
index 175ddc48866..821f1ffacdb 100644
--- a/include/configs/imx6_logic.h
+++ b/include/configs/imx6_logic.h
@@ -33,9 +33,6 @@
#define CONFIG_PHYLIB
#define CONFIG_PHY_SMSC
-/* Command definition */
-#define CONFIG_CMD_BMODE
-
#define CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
#define CONFIG_EXTRA_ENV_SETTINGS \
diff --git a/include/configs/liteboard.h b/include/configs/liteboard.h
index 258fd3ac62b..22941068026 100644
--- a/include/configs/liteboard.h
+++ b/include/configs/liteboard.h
@@ -135,8 +135,6 @@
#define CONFIG_SYS_MMC_ENV_PART 0
#define CONFIG_MMCROOT "/dev/mmcblk0p2"
-#define CONFIG_CMD_BMODE
-
/* USB Configs */
#ifdef CONFIG_CMD_USB
#define CONFIG_USB_EHCI
diff --git a/include/configs/mx53evk.h b/include/configs/mx53evk.h
index dc49e24f154..63bd80d6628 100644
--- a/include/configs/mx53evk.h
+++ b/include/configs/mx53evk.h
@@ -57,9 +57,6 @@
#define CONFIG_CMD_DATE
-/* Miscellaneous commands */
-#define CONFIG_CMD_BMODE
-
/* allow to overwrite serial and ethaddr */
#define CONFIG_ENV_OVERWRITE
#define CONFIG_CONS_INDEX 1
diff --git a/include/configs/mx6sabre_common.h b/include/configs/mx6sabre_common.h
index c04ae96f9da..9b0fe5a3c27 100644
--- a/include/configs/mx6sabre_common.h
+++ b/include/configs/mx6sabre_common.h
@@ -39,9 +39,6 @@
#define CONFIG_SF_DEFAULT_MODE SPI_MODE_0
#endif
-/* Command definition */
-#define CONFIG_CMD_BMODE
-
#ifdef CONFIG_SUPPORT_EMMC_BOOT
#define EMMC_ENV \
"emmcdev=2\0" \
diff --git a/include/configs/mx6ul_14x14_evk.h b/include/configs/mx6ul_14x14_evk.h
index f466c626a2c..ade0d0a63a8 100644
--- a/include/configs/mx6ul_14x14_evk.h
+++ b/include/configs/mx6ul_14x14_evk.h
@@ -172,8 +172,6 @@
#define CONFIG_SYS_MMC_ENV_PART 0 /* user area */
#define CONFIG_MMCROOT "/dev/mmcblk1p2" /* USDHC2 */
-#define CONFIG_CMD_BMODE
-
#ifndef CONFIG_SYS_DCACHE_OFF
#endif
diff --git a/include/configs/mx6ullevk.h b/include/configs/mx6ullevk.h
index 5bc26aac7e2..19b0630d9d0 100644
--- a/include/configs/mx6ullevk.h
+++ b/include/configs/mx6ullevk.h
@@ -159,8 +159,6 @@
#define CONFIG_ENV_SIZE SZ_8K
#define CONFIG_ENV_OFFSET (12 * SZ_64K)
-#define CONFIG_CMD_BMODE
-
#define CONFIG_IMX_THERMAL
#define CONFIG_IOMUX_LPSR
diff --git a/include/configs/nitrogen6x.h b/include/configs/nitrogen6x.h
index efa5065d9ba..1714c190adb 100644
--- a/include/configs/nitrogen6x.h
+++ b/include/configs/nitrogen6x.h
@@ -86,9 +86,6 @@
#define CONFIG_MXC_USB_FLAGS 0
#define CONFIG_SYS_USB_EVENT_POLL_VIA_CONTROL_EP
-/* Miscellaneous commands */
-#define CONFIG_CMD_BMODE
-
/* Framebuffer and LCD */
#define CONFIG_VIDEO_IPUV3
#define CONFIG_VIDEO_BMP_RLE8
diff --git a/include/configs/novena.h b/include/configs/novena.h
index 5a07bf38912..df0efbca92d 100644
--- a/include/configs/novena.h
+++ b/include/configs/novena.h
@@ -17,7 +17,6 @@
#include "mx6_common.h"
/* U-Boot Commands */
-#define CONFIG_CMD_BMODE
#define CONFIG_CMD_EEPROM
#define CONFIG_FAT_WRITE
#define CONFIG_CMD_PCI
diff --git a/include/configs/ot1200.h b/include/configs/ot1200.h
index 6704e973dea..b4d2b0a8715 100644
--- a/include/configs/ot1200.h
+++ b/include/configs/ot1200.h
@@ -101,9 +101,6 @@
#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 5
#endif
-/* Miscellaneous commands */
-#define CONFIG_CMD_BMODE
-
#define CONFIG_PREBOOT ""
/* Print Buffer Size */
diff --git a/include/configs/pcm058.h b/include/configs/pcm058.h
index 098b02afa81..f622be62b7a 100644
--- a/include/configs/pcm058.h
+++ b/include/configs/pcm058.h
@@ -86,7 +86,6 @@
#define MTDPARTS_DEFAULT "mtdparts=nand:16m(uboot),1m(env),-(rootfs)"
/* Various command support */
-#define CONFIG_CMD_BMODE /* set eFUSE shadow for a boot dev and reset */
#define CONFIG_CMD_HDMIDETECT /* detect HDMI output device */
#define CONFIG_CMD_GSC
#define CONFIG_CMD_EECONFIG /* Gateworks EEPROM config cmd */
diff --git a/include/configs/platinum.h b/include/configs/platinum.h
index 2610e243e72..6687c38c992 100644
--- a/include/configs/platinum.h
+++ b/include/configs/platinum.h
@@ -19,7 +19,6 @@
* Console configuration
*/
-#define CONFIG_CMD_BMODE
#define CONFIG_CMD_MTDPARTS
#define CONFIG_CMD_NAND
#define CONFIG_CMD_NAND_TRIMFFS
diff --git a/include/configs/secomx6quq7.h b/include/configs/secomx6quq7.h
index a5de46ac1c8..c90626fa23f 100644
--- a/include/configs/secomx6quq7.h
+++ b/include/configs/secomx6quq7.h
@@ -19,9 +19,6 @@
#define CONFIG_MXC_UART
#define CONFIG_MXC_UART_BASE UART2_BASE
-/* Command definition */
-#define CONFIG_CMD_BMODE
-
#define CONFIG_SYS_MEMTEST_START 0x10000000
#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + 500 * SZ_1M)
diff --git a/include/configs/tbs2910.h b/include/configs/tbs2910.h
index dc6db17f766..c19840c485d 100644
--- a/include/configs/tbs2910.h
+++ b/include/configs/tbs2910.h
@@ -44,9 +44,6 @@
#define CONFIG_CONS_INDEX 1
-/* *** Command definition *** */
-#define CONFIG_CMD_BMODE
-
/* Filesystems / image support */
/* MMC */
diff --git a/include/configs/titanium.h b/include/configs/titanium.h
index 4a122458108..2c05f9c9308 100644
--- a/include/configs/titanium.h
+++ b/include/configs/titanium.h
@@ -56,9 +56,6 @@
#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
#define CONFIG_MXC_USB_FLAGS 0
-/* Miscellaneous commands */
-#define CONFIG_CMD_BMODE
-
#define CONFIG_SYS_MEMTEST_START 0x10000000
#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + (500 << 20))
diff --git a/include/configs/tqma6.h b/include/configs/tqma6.h
index 1bfc438b81d..e662e65204e 100644
--- a/include/configs/tqma6.h
+++ b/include/configs/tqma6.h
@@ -96,9 +96,6 @@
#define CONFIG_ARP_TIMEOUT 200UL
-/* Command definition */
-#define CONFIG_CMD_BMODE
-
#define CONFIG_ENV_SIZE (SZ_8K)
/* Size of malloc() pool */
#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 2 * SZ_1M)
diff --git a/include/configs/udoo.h b/include/configs/udoo.h
index 90b682e1009..d84aa1679eb 100644
--- a/include/configs/udoo.h
+++ b/include/configs/udoo.h
@@ -46,9 +46,6 @@
#define CONFIG_PHY_MICREL
#define CONFIG_PHY_MICREL_KSZ9031
-/* Command definition */
-#define CONFIG_CMD_BMODE
-
#define CONFIG_SYS_MEMTEST_START 0x10000000
#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + 500 * SZ_1M)
diff --git a/include/configs/wandboard.h b/include/configs/wandboard.h
index 7e9757a4806..47daf724ab6 100644
--- a/include/configs/wandboard.h
+++ b/include/configs/wandboard.h
@@ -34,9 +34,6 @@
#define CONFIG_LIBATA
#endif
-/* Command definition */
-#define CONFIG_CMD_BMODE
-
#define CONFIG_SYS_MEMTEST_START 0x10000000
#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + 500 * SZ_1M)
diff --git a/include/configs/xpress.h b/include/configs/xpress.h
index e7c82e5bd76..e3ae4e8f745 100644
--- a/include/configs/xpress.h
+++ b/include/configs/xpress.h
@@ -63,8 +63,6 @@
#define CONFIG_SYS_MMC_ENV_PART 1 /* boot parition */
#define CONFIG_MMCROOT "/dev/mmcblk0p2" /* USDHC2 */
-#define CONFIG_CMD_BMODE
-
/* USB Configs */
#define CONFIG_USB_EHCI
#define CONFIG_USB_EHCI_MX6
diff --git a/scripts/config_whitelist.txt b/scripts/config_whitelist.txt
index 091cfd35af1..215868c724e 100644
--- a/scripts/config_whitelist.txt
+++ b/scripts/config_whitelist.txt
@@ -393,7 +393,6 @@ CONFIG_CM922T_XA10
CONFIG_CMDLINE_EDITING
CONFIG_CMDLINE_PS_SUPPORT
CONFIG_CMDLINE_TAG
-CONFIG_CMD_BMODE
CONFIG_CMD_BMP
CONFIG_CMD_BSP
CONFIG_CMD_CBFS
--
GitLab
From 0f7102588cfb48e74b13646ce6df7c11a374423b Mon Sep 17 00:00:00 2001
From: Simon Glass <sjg@chromium.org>
Date: Wed, 26 Apr 2017 22:27:55 -0600
Subject: [PATCH 173/282] Convert CONFIG_CMD_BMP to Kconfig
This converts the following to Kconfig:
CONFIG_CMD_BMP
Signed-off-by: Simon Glass <sjg@chromium.org>
[trini: Add depends on LCD || DM_VIDEO || VIDEO]
Signed-off-by: Tom Rini <trini@konsulko.com>
---
README | 1 -
cmd/Kconfig | 12 ++++++++++++
configs/MPC8610HPCD_defconfig | 1 +
configs/MiniFAP_defconfig | 1 +
configs/T1024QDS_DDR4_SECURE_BOOT_defconfig | 1 +
configs/T1024QDS_DDR4_defconfig | 1 +
configs/T1024QDS_NAND_defconfig | 1 +
configs/T1024QDS_SDCARD_defconfig | 1 +
configs/T1024QDS_SECURE_BOOT_defconfig | 1 +
configs/T1024QDS_SPIFLASH_defconfig | 1 +
configs/T1024QDS_defconfig | 1 +
configs/T1040QDS_DDR4_defconfig | 1 +
configs/T1040QDS_SECURE_BOOT_defconfig | 1 +
configs/T1040QDS_defconfig | 1 +
configs/T1042D4RDB_NAND_defconfig | 1 +
configs/T1042D4RDB_SDCARD_defconfig | 1 +
configs/T1042D4RDB_SECURE_BOOT_defconfig | 1 +
configs/T1042D4RDB_SPIFLASH_defconfig | 1 +
configs/T1042D4RDB_defconfig | 1 +
configs/T1042RDB_PI_NAND_SECURE_BOOT_defconfig | 1 +
configs/T1042RDB_PI_NAND_defconfig | 1 +
configs/T1042RDB_PI_SDCARD_defconfig | 1 +
configs/T1042RDB_PI_SPIFLASH_defconfig | 1 +
configs/T1042RDB_PI_defconfig | 1 +
configs/TQM5200_B_HIGHBOOT_defconfig | 1 +
configs/TQM5200_B_defconfig | 1 +
configs/TQM5200_STK100_defconfig | 1 +
configs/TQM5200_defconfig | 1 +
configs/TQM823L_LCD_defconfig | 1 +
configs/TTTech_defconfig | 1 +
configs/apalis_imx6_defconfig | 1 +
configs/apalis_imx6_nospl_com_defconfig | 1 +
configs/apalis_imx6_nospl_it_defconfig | 1 +
configs/aristainetos2_defconfig | 1 +
configs/aristainetos2b_defconfig | 1 +
configs/aristainetos_defconfig | 1 +
configs/brxre1_defconfig | 1 +
configs/charon_defconfig | 1 +
configs/cm_fx6_defconfig | 1 +
configs/cm_t3517_defconfig | 1 +
configs/cm_t35_defconfig | 1 +
configs/colibri_imx6_defconfig | 1 +
configs/colibri_imx6_nospl_defconfig | 1 +
configs/colibri_imx7_defconfig | 1 +
configs/colibri_t20_defconfig | 1 +
configs/colibri_vf_defconfig | 1 +
.../controlcenterd_36BIT_SDCARD_DEVELOP_defconfig | 1 +
configs/controlcenterd_36BIT_SDCARD_defconfig | 1 +
configs/digsy_mtc_RAMBOOT_defconfig | 1 +
configs/digsy_mtc_defconfig | 1 +
configs/digsy_mtc_rev5_RAMBOOT_defconfig | 1 +
configs/digsy_mtc_rev5_defconfig | 1 +
configs/ea20_defconfig | 1 +
configs/fo300_defconfig | 1 +
configs/icon_defconfig | 1 +
configs/imx31_phycore_eet_defconfig | 1 +
configs/ipek01_defconfig | 1 +
configs/ls1021aqds_ddr4_nor_defconfig | 1 +
configs/ls1021aqds_ddr4_nor_lpuart_defconfig | 1 +
configs/ls1021aqds_nand_defconfig | 1 +
configs/ls1021aqds_nor_SECURE_BOOT_defconfig | 1 +
configs/ls1021aqds_nor_defconfig | 1 +
configs/ls1021aqds_nor_lpuart_defconfig | 1 +
configs/ls1021aqds_qspi_defconfig | 1 +
configs/ls1021aqds_sdcard_ifc_defconfig | 1 +
configs/ls1021aqds_sdcard_qspi_defconfig | 1 +
configs/ls1021atwr_nor_SECURE_BOOT_defconfig | 1 +
configs/ls1021atwr_nor_defconfig | 1 +
configs/ls1021atwr_nor_lpuart_defconfig | 1 +
configs/ls1021atwr_qspi_defconfig | 1 +
configs/ls1021atwr_sdcard_ifc_SECURE_BOOT_defconfig | 1 +
configs/ls1021atwr_sdcard_ifc_defconfig | 1 +
configs/ls1021atwr_sdcard_qspi_defconfig | 1 +
configs/lwmon5_defconfig | 1 +
configs/m28evk_defconfig | 1 +
configs/m53evk_defconfig | 1 +
configs/mcx_defconfig | 1 +
configs/mt_ventoux_defconfig | 1 +
configs/mx23evk_defconfig | 1 +
configs/mx28evk_auart_console_defconfig | 1 +
configs/mx28evk_defconfig | 1 +
configs/mx28evk_nand_defconfig | 1 +
configs/mx28evk_spi_defconfig | 1 +
configs/mx6qsabrelite_defconfig | 1 +
configs/mx6sxsabresd_defconfig | 1 +
configs/mx6sxsabresd_spl_defconfig | 1 +
configs/mx6ul_14x14_evk_defconfig | 1 +
configs/mx6ul_9x9_evk_defconfig | 1 +
configs/mx7dsabresd_defconfig | 1 +
configs/mx7dsabresd_secure_defconfig | 1 +
configs/nitrogen6dl2g_defconfig | 1 +
configs/nitrogen6dl_defconfig | 1 +
configs/nitrogen6q2g_defconfig | 1 +
configs/nitrogen6q_defconfig | 1 +
configs/nitrogen6s1g_defconfig | 1 +
configs/nitrogen6s_defconfig | 1 +
configs/nyan-big_defconfig | 1 +
configs/opos6uldev_defconfig | 1 +
configs/pdm360ng_defconfig | 1 +
configs/pxm2_defconfig | 1 +
configs/rut_defconfig | 1 +
configs/sandbox_defconfig | 1 +
configs/sandbox_noblk_defconfig | 1 +
configs/sandbox_spl_defconfig | 1 +
configs/socrates_defconfig | 1 +
configs/theadorable_debug_defconfig | 1 +
configs/theadorable_defconfig | 1 +
configs/wtk_defconfig | 1 +
include/config_cmd_all.h | 1 -
include/config_fallbacks.h | 4 ----
include/configs/M52277EVB.h | 1 -
include/configs/MPC8610HPCD.h | 1 -
include/configs/P1022DS.h | 1 -
include/configs/T102xQDS.h | 1 -
include/configs/T102xRDB.h | 1 -
include/configs/T1040QDS.h | 1 -
include/configs/T104xRDB.h | 1 -
include/configs/TQM5200.h | 4 ----
include/configs/TQM823L.h | 4 ----
include/configs/apalis_imx6.h | 1 -
include/configs/aristainetos-common.h | 2 --
include/configs/aristainetos2.h | 2 --
include/configs/aristainetos2b.h | 2 --
include/configs/brxre1.h | 1 -
include/configs/cm_fx6.h | 1 -
include/configs/cm_t35.h | 1 -
include/configs/cm_t3517.h | 1 -
include/configs/colibri_imx6.h | 1 -
include/configs/colibri_imx7.h | 1 -
include/configs/colibri_pxa270.h | 1 -
include/configs/colibri_t20.h | 1 -
include/configs/colibri_vf.h | 1 -
include/configs/conga-qeval20-qa3-e3845.h | 1 -
include/configs/controlcenterd.h | 1 -
include/configs/dfi-bt700.h | 1 -
include/configs/digsy_mtc.h | 3 ---
include/configs/ea20.h | 1 -
include/configs/icon.h | 3 ---
include/configs/imx31_phycore.h | 1 -
include/configs/ipek01.h | 3 ---
include/configs/ls1021aqds.h | 1 -
include/configs/ls1021atwr.h | 1 -
include/configs/lwmon5.h | 4 ----
include/configs/m28evk.h | 2 --
include/configs/m53evk.h | 1 -
include/configs/ma5d4evk.h | 1 -
include/configs/mcx.h | 1 -
include/configs/mpc5121ads.h | 1 -
include/configs/mt_ventoux.h | 1 -
include/configs/mx23evk.h | 1 -
include/configs/mx28evk.h | 1 -
include/configs/mx6sxsabresd.h | 1 -
include/configs/mx6ul_14x14_evk.h | 1 -
include/configs/mx7dsabresd.h | 1 -
include/configs/nitrogen6x.h | 2 --
include/configs/nyan-big.h | 1 -
include/configs/opos6uldev.h | 1 -
include/configs/pdm360ng.h | 4 ----
include/configs/pxm2.h | 1 -
include/configs/rut.h | 1 -
include/configs/sandbox.h | 1 -
include/configs/sequoia.h | 1 -
include/configs/socrates.h | 1 -
include/configs/theadorable.h | 2 --
scripts/config_whitelist.txt | 1 -
165 files changed, 118 insertions(+), 85 deletions(-)
diff --git a/README b/README
index e5e6d5782fc..8445d2b63ce 100644
--- a/README
+++ b/README
@@ -823,7 +823,6 @@ The following options need to be configured:
CONFIG_CMD_AES AES 128 CBC encrypt/decrypt
CONFIG_CMD_ASKENV * ask for env variable
CONFIG_CMD_BDI bdinfo
- CONFIG_CMD_BMP * BMP support
CONFIG_CMD_BSP * Board specific commands
CONFIG_CMD_BOOTD bootd
CONFIG_CMD_BOOTI * ARM64 Linux kernel Image support
diff --git a/cmd/Kconfig b/cmd/Kconfig
index 306027c11a6..6488701b08f 100644
--- a/cmd/Kconfig
+++ b/cmd/Kconfig
@@ -642,6 +642,18 @@ endmenu
menu "Misc commands"
+config CMD_BMP
+ bool "Enable 'bmp' command"
+ depends on LCD || DM_VIDEO || VIDEO
+ help
+ This provides a way to obtain information about a BMP-format iamge
+ and to display it. BMP (which presumably stands for BitMaP) is a
+ file format defined by Microsoft which supports images of various
+ depths, formats and compression methods. Headers on the file
+ determine the formats used. This command can be used by first loading
+ the image into RAM, then using this command to look at it or display
+ it.
+
config CMD_BKOPS_ENABLE
bool "mmc bkops enable"
depends on CMD_MMC
diff --git a/configs/MPC8610HPCD_defconfig b/configs/MPC8610HPCD_defconfig
index 86b351941ac..d9499905fde 100644
--- a/configs/MPC8610HPCD_defconfig
+++ b/configs/MPC8610HPCD_defconfig
@@ -12,6 +12,7 @@ CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
+CONFIG_CMD_BMP=y
CONFIG_CMD_EXT2=y
CONFIG_DOS_PARTITION=y
# CONFIG_MMC is not set
diff --git a/configs/MiniFAP_defconfig b/configs/MiniFAP_defconfig
index e2fc169b5c9..b1bc697cc6f 100644
--- a/configs/MiniFAP_defconfig
+++ b/configs/MiniFAP_defconfig
@@ -17,6 +17,7 @@ CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_CMD_SNTP=y
+CONFIG_CMD_BMP=y
CONFIG_CMD_EXT2=y
CONFIG_CMD_FAT=y
CONFIG_MAC_PARTITION=y
diff --git a/configs/T1024QDS_DDR4_SECURE_BOOT_defconfig b/configs/T1024QDS_DDR4_SECURE_BOOT_defconfig
index 11c5d94dd76..512abc03513 100644
--- a/configs/T1024QDS_DDR4_SECURE_BOOT_defconfig
+++ b/configs/T1024QDS_DDR4_SECURE_BOOT_defconfig
@@ -22,6 +22,7 @@ CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
+CONFIG_CMD_BMP=y
CONFIG_CMD_EXT2=y
CONFIG_CMD_FAT=y
CONFIG_DM=y
diff --git a/configs/T1024QDS_DDR4_defconfig b/configs/T1024QDS_DDR4_defconfig
index 61cde46ca56..8fa0d8f3e25 100644
--- a/configs/T1024QDS_DDR4_defconfig
+++ b/configs/T1024QDS_DDR4_defconfig
@@ -20,6 +20,7 @@ CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
+CONFIG_CMD_BMP=y
CONFIG_CMD_EXT2=y
CONFIG_CMD_FAT=y
CONFIG_FSL_CAAM=y
diff --git a/configs/T1024QDS_NAND_defconfig b/configs/T1024QDS_NAND_defconfig
index fd9166cfed0..17403e3f9a7 100644
--- a/configs/T1024QDS_NAND_defconfig
+++ b/configs/T1024QDS_NAND_defconfig
@@ -30,6 +30,7 @@ CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
+CONFIG_CMD_BMP=y
CONFIG_CMD_EXT2=y
CONFIG_CMD_FAT=y
CONFIG_FSL_CAAM=y
diff --git a/configs/T1024QDS_SDCARD_defconfig b/configs/T1024QDS_SDCARD_defconfig
index 124048001e5..cd6414c6fcd 100644
--- a/configs/T1024QDS_SDCARD_defconfig
+++ b/configs/T1024QDS_SDCARD_defconfig
@@ -30,6 +30,7 @@ CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
+CONFIG_CMD_BMP=y
CONFIG_CMD_EXT2=y
CONFIG_CMD_FAT=y
CONFIG_FSL_CAAM=y
diff --git a/configs/T1024QDS_SECURE_BOOT_defconfig b/configs/T1024QDS_SECURE_BOOT_defconfig
index 7446013ddc2..3045412f3b4 100644
--- a/configs/T1024QDS_SECURE_BOOT_defconfig
+++ b/configs/T1024QDS_SECURE_BOOT_defconfig
@@ -22,6 +22,7 @@ CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
+CONFIG_CMD_BMP=y
CONFIG_CMD_EXT2=y
CONFIG_CMD_FAT=y
CONFIG_DM=y
diff --git a/configs/T1024QDS_SPIFLASH_defconfig b/configs/T1024QDS_SPIFLASH_defconfig
index 8a9bc7904ec..aab3d3ab539 100644
--- a/configs/T1024QDS_SPIFLASH_defconfig
+++ b/configs/T1024QDS_SPIFLASH_defconfig
@@ -31,6 +31,7 @@ CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
+CONFIG_CMD_BMP=y
CONFIG_CMD_EXT2=y
CONFIG_CMD_FAT=y
CONFIG_FSL_CAAM=y
diff --git a/configs/T1024QDS_defconfig b/configs/T1024QDS_defconfig
index 0e47435ad25..4196524ff52 100644
--- a/configs/T1024QDS_defconfig
+++ b/configs/T1024QDS_defconfig
@@ -20,6 +20,7 @@ CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
+CONFIG_CMD_BMP=y
CONFIG_CMD_EXT2=y
CONFIG_CMD_FAT=y
CONFIG_FSL_CAAM=y
diff --git a/configs/T1040QDS_DDR4_defconfig b/configs/T1040QDS_DDR4_defconfig
index 22ef513efb6..9aeff626a69 100644
--- a/configs/T1040QDS_DDR4_defconfig
+++ b/configs/T1040QDS_DDR4_defconfig
@@ -20,6 +20,7 @@ CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
+CONFIG_CMD_BMP=y
CONFIG_CMD_EXT2=y
CONFIG_CMD_FAT=y
CONFIG_FSL_CAAM=y
diff --git a/configs/T1040QDS_SECURE_BOOT_defconfig b/configs/T1040QDS_SECURE_BOOT_defconfig
index 5cfaa84cb32..7de09933374 100644
--- a/configs/T1040QDS_SECURE_BOOT_defconfig
+++ b/configs/T1040QDS_SECURE_BOOT_defconfig
@@ -22,6 +22,7 @@ CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
+CONFIG_CMD_BMP=y
CONFIG_CMD_EXT2=y
CONFIG_CMD_FAT=y
CONFIG_DM=y
diff --git a/configs/T1040QDS_defconfig b/configs/T1040QDS_defconfig
index 8f6fa8864a9..6c806c3dd95 100644
--- a/configs/T1040QDS_defconfig
+++ b/configs/T1040QDS_defconfig
@@ -20,6 +20,7 @@ CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
+CONFIG_CMD_BMP=y
CONFIG_CMD_EXT2=y
CONFIG_CMD_FAT=y
CONFIG_FSL_CAAM=y
diff --git a/configs/T1042D4RDB_NAND_defconfig b/configs/T1042D4RDB_NAND_defconfig
index 99ec615dad7..fed89fd5f5d 100644
--- a/configs/T1042D4RDB_NAND_defconfig
+++ b/configs/T1042D4RDB_NAND_defconfig
@@ -30,6 +30,7 @@ CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
+CONFIG_CMD_BMP=y
CONFIG_CMD_EXT2=y
CONFIG_CMD_FAT=y
CONFIG_FSL_CAAM=y
diff --git a/configs/T1042D4RDB_SDCARD_defconfig b/configs/T1042D4RDB_SDCARD_defconfig
index defebbadf42..52bb08f653c 100644
--- a/configs/T1042D4RDB_SDCARD_defconfig
+++ b/configs/T1042D4RDB_SDCARD_defconfig
@@ -30,6 +30,7 @@ CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
+CONFIG_CMD_BMP=y
CONFIG_CMD_EXT2=y
CONFIG_CMD_FAT=y
CONFIG_FSL_CAAM=y
diff --git a/configs/T1042D4RDB_SECURE_BOOT_defconfig b/configs/T1042D4RDB_SECURE_BOOT_defconfig
index 59716e2d102..4a94e30117f 100644
--- a/configs/T1042D4RDB_SECURE_BOOT_defconfig
+++ b/configs/T1042D4RDB_SECURE_BOOT_defconfig
@@ -22,6 +22,7 @@ CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
+CONFIG_CMD_BMP=y
CONFIG_CMD_EXT2=y
CONFIG_CMD_FAT=y
CONFIG_DM=y
diff --git a/configs/T1042D4RDB_SPIFLASH_defconfig b/configs/T1042D4RDB_SPIFLASH_defconfig
index 8ba922e5689..c6fcaf3b98d 100644
--- a/configs/T1042D4RDB_SPIFLASH_defconfig
+++ b/configs/T1042D4RDB_SPIFLASH_defconfig
@@ -31,6 +31,7 @@ CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
+CONFIG_CMD_BMP=y
CONFIG_CMD_EXT2=y
CONFIG_CMD_FAT=y
CONFIG_FSL_CAAM=y
diff --git a/configs/T1042D4RDB_defconfig b/configs/T1042D4RDB_defconfig
index c3095ff04cc..410a1249086 100644
--- a/configs/T1042D4RDB_defconfig
+++ b/configs/T1042D4RDB_defconfig
@@ -20,6 +20,7 @@ CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
+CONFIG_CMD_BMP=y
CONFIG_CMD_EXT2=y
CONFIG_CMD_FAT=y
CONFIG_FSL_CAAM=y
diff --git a/configs/T1042RDB_PI_NAND_SECURE_BOOT_defconfig b/configs/T1042RDB_PI_NAND_SECURE_BOOT_defconfig
index 282cd58e552..4ead58f2122 100644
--- a/configs/T1042RDB_PI_NAND_SECURE_BOOT_defconfig
+++ b/configs/T1042RDB_PI_NAND_SECURE_BOOT_defconfig
@@ -33,6 +33,7 @@ CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
+CONFIG_CMD_BMP=y
CONFIG_CMD_EXT2=y
CONFIG_CMD_FAT=y
CONFIG_DM=y
diff --git a/configs/T1042RDB_PI_NAND_defconfig b/configs/T1042RDB_PI_NAND_defconfig
index 9f778f9516b..a63374cc4bb 100644
--- a/configs/T1042RDB_PI_NAND_defconfig
+++ b/configs/T1042RDB_PI_NAND_defconfig
@@ -30,6 +30,7 @@ CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
+CONFIG_CMD_BMP=y
CONFIG_CMD_EXT2=y
CONFIG_CMD_FAT=y
CONFIG_FSL_CAAM=y
diff --git a/configs/T1042RDB_PI_SDCARD_defconfig b/configs/T1042RDB_PI_SDCARD_defconfig
index e1115b70d91..606ec618d9b 100644
--- a/configs/T1042RDB_PI_SDCARD_defconfig
+++ b/configs/T1042RDB_PI_SDCARD_defconfig
@@ -30,6 +30,7 @@ CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
+CONFIG_CMD_BMP=y
CONFIG_CMD_EXT2=y
CONFIG_CMD_FAT=y
CONFIG_FSL_CAAM=y
diff --git a/configs/T1042RDB_PI_SPIFLASH_defconfig b/configs/T1042RDB_PI_SPIFLASH_defconfig
index 8795a481217..8858aecb456 100644
--- a/configs/T1042RDB_PI_SPIFLASH_defconfig
+++ b/configs/T1042RDB_PI_SPIFLASH_defconfig
@@ -31,6 +31,7 @@ CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
+CONFIG_CMD_BMP=y
CONFIG_CMD_EXT2=y
CONFIG_CMD_FAT=y
CONFIG_FSL_CAAM=y
diff --git a/configs/T1042RDB_PI_defconfig b/configs/T1042RDB_PI_defconfig
index e96b7ad93e7..77f0c667e37 100644
--- a/configs/T1042RDB_PI_defconfig
+++ b/configs/T1042RDB_PI_defconfig
@@ -20,6 +20,7 @@ CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
+CONFIG_CMD_BMP=y
CONFIG_CMD_EXT2=y
CONFIG_CMD_FAT=y
CONFIG_FSL_CAAM=y
diff --git a/configs/TQM5200_B_HIGHBOOT_defconfig b/configs/TQM5200_B_HIGHBOOT_defconfig
index 1f79bf84a24..d543d17cfc4 100644
--- a/configs/TQM5200_B_HIGHBOOT_defconfig
+++ b/configs/TQM5200_B_HIGHBOOT_defconfig
@@ -17,6 +17,7 @@ CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_CMD_SNTP=y
+CONFIG_CMD_BMP=y
CONFIG_CMD_EXT2=y
CONFIG_CMD_FAT=y
CONFIG_MAC_PARTITION=y
diff --git a/configs/TQM5200_B_defconfig b/configs/TQM5200_B_defconfig
index 63441959549..1a222f3d18a 100644
--- a/configs/TQM5200_B_defconfig
+++ b/configs/TQM5200_B_defconfig
@@ -17,6 +17,7 @@ CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_CMD_SNTP=y
+CONFIG_CMD_BMP=y
CONFIG_CMD_EXT2=y
CONFIG_CMD_FAT=y
CONFIG_MAC_PARTITION=y
diff --git a/configs/TQM5200_STK100_defconfig b/configs/TQM5200_STK100_defconfig
index ff0f4d31be5..5f0283dc8e0 100644
--- a/configs/TQM5200_STK100_defconfig
+++ b/configs/TQM5200_STK100_defconfig
@@ -17,6 +17,7 @@ CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_CMD_SNTP=y
+CONFIG_CMD_BMP=y
CONFIG_CMD_EXT2=y
CONFIG_CMD_FAT=y
CONFIG_MAC_PARTITION=y
diff --git a/configs/TQM5200_defconfig b/configs/TQM5200_defconfig
index 027b55a8caa..f1f1e8d167f 100644
--- a/configs/TQM5200_defconfig
+++ b/configs/TQM5200_defconfig
@@ -16,6 +16,7 @@ CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_CMD_SNTP=y
+CONFIG_CMD_BMP=y
CONFIG_CMD_EXT2=y
CONFIG_CMD_FAT=y
CONFIG_MAC_PARTITION=y
diff --git a/configs/TQM823L_LCD_defconfig b/configs/TQM823L_LCD_defconfig
index e44374da12a..e466836b53a 100644
--- a/configs/TQM823L_LCD_defconfig
+++ b/configs/TQM823L_LCD_defconfig
@@ -10,6 +10,7 @@ CONFIG_CMD_ASKENV=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_SNTP=y
+CONFIG_CMD_BMP=y
CONFIG_CMD_EXT2=y
CONFIG_MAC_PARTITION=y
CONFIG_DOS_PARTITION=y
diff --git a/configs/TTTech_defconfig b/configs/TTTech_defconfig
index cfe56a24c41..b6080ad131e 100644
--- a/configs/TTTech_defconfig
+++ b/configs/TTTech_defconfig
@@ -10,6 +10,7 @@ CONFIG_CMD_ASKENV=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_SNTP=y
+CONFIG_CMD_BMP=y
CONFIG_CMD_EXT2=y
CONFIG_MAC_PARTITION=y
CONFIG_DOS_PARTITION=y
diff --git a/configs/apalis_imx6_defconfig b/configs/apalis_imx6_defconfig
index 3940dacf03b..d4dc1d38656 100644
--- a/configs/apalis_imx6_defconfig
+++ b/configs/apalis_imx6_defconfig
@@ -34,6 +34,7 @@ CONFIG_CMD_GPIO=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
+CONFIG_CMD_BMP=y
CONFIG_CMD_CACHE=y
CONFIG_CMD_EXT4=y
CONFIG_CMD_FAT=y
diff --git a/configs/apalis_imx6_nospl_com_defconfig b/configs/apalis_imx6_nospl_com_defconfig
index b0e099549b5..87affc0bdb7 100644
--- a/configs/apalis_imx6_nospl_com_defconfig
+++ b/configs/apalis_imx6_nospl_com_defconfig
@@ -27,6 +27,7 @@ CONFIG_CMD_GPIO=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
+CONFIG_CMD_BMP=y
CONFIG_CMD_CACHE=y
CONFIG_CMD_EXT4=y
CONFIG_CMD_FAT=y
diff --git a/configs/apalis_imx6_nospl_it_defconfig b/configs/apalis_imx6_nospl_it_defconfig
index 231639e6bf3..97a4d2c1ed4 100644
--- a/configs/apalis_imx6_nospl_it_defconfig
+++ b/configs/apalis_imx6_nospl_it_defconfig
@@ -27,6 +27,7 @@ CONFIG_CMD_GPIO=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
+CONFIG_CMD_BMP=y
CONFIG_CMD_CACHE=y
CONFIG_CMD_EXT4=y
CONFIG_CMD_FAT=y
diff --git a/configs/aristainetos2_defconfig b/configs/aristainetos2_defconfig
index 9bc9b0fbc5f..884dcc84c2e 100644
--- a/configs/aristainetos2_defconfig
+++ b/configs/aristainetos2_defconfig
@@ -21,6 +21,7 @@ CONFIG_CMD_GPIO=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
+CONFIG_CMD_BMP=y
CONFIG_CMD_CACHE=y
CONFIG_CMD_EXT2=y
CONFIG_CMD_EXT4=y
diff --git a/configs/aristainetos2b_defconfig b/configs/aristainetos2b_defconfig
index 9ac58279313..eaa9addd249 100644
--- a/configs/aristainetos2b_defconfig
+++ b/configs/aristainetos2b_defconfig
@@ -21,6 +21,7 @@ CONFIG_CMD_GPIO=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
+CONFIG_CMD_BMP=y
CONFIG_CMD_CACHE=y
CONFIG_CMD_EXT2=y
CONFIG_CMD_EXT4=y
diff --git a/configs/aristainetos_defconfig b/configs/aristainetos_defconfig
index d8b1afeeae8..1c39e362fa1 100644
--- a/configs/aristainetos_defconfig
+++ b/configs/aristainetos_defconfig
@@ -21,6 +21,7 @@ CONFIG_CMD_GPIO=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
+CONFIG_CMD_BMP=y
CONFIG_CMD_CACHE=y
CONFIG_CMD_EXT2=y
CONFIG_CMD_EXT4=y
diff --git a/configs/brxre1_defconfig b/configs/brxre1_defconfig
index 909d5d41230..9616d9bc2c0 100644
--- a/configs/brxre1_defconfig
+++ b/configs/brxre1_defconfig
@@ -45,6 +45,7 @@ CONFIG_CMD_GPIO=y
CONFIG_CMD_DHCP=y
# CONFIG_CMD_NFS is not set
CONFIG_CMD_PING=y
+CONFIG_CMD_BMP=y
CONFIG_CMD_TIME=y
CONFIG_CMD_FAT=y
CONFIG_CMD_FS_GENERIC=y
diff --git a/configs/charon_defconfig b/configs/charon_defconfig
index 4b604ff38c8..3dd15882e53 100644
--- a/configs/charon_defconfig
+++ b/configs/charon_defconfig
@@ -16,6 +16,7 @@ CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_CMD_SNTP=y
+CONFIG_CMD_BMP=y
CONFIG_CMD_EXT2=y
CONFIG_CMD_FAT=y
CONFIG_MAC_PARTITION=y
diff --git a/configs/cm_fx6_defconfig b/configs/cm_fx6_defconfig
index 2e178f18fe4..33b53160a76 100644
--- a/configs/cm_fx6_defconfig
+++ b/configs/cm_fx6_defconfig
@@ -35,6 +35,7 @@ CONFIG_CMD_GPIO=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_PING=y
+CONFIG_CMD_BMP=y
CONFIG_CMD_CACHE=y
CONFIG_CMD_EXT2=y
CONFIG_CMD_EXT4=y
diff --git a/configs/cm_t3517_defconfig b/configs/cm_t3517_defconfig
index f50198edc27..c1cb2c04218 100644
--- a/configs/cm_t3517_defconfig
+++ b/configs/cm_t3517_defconfig
@@ -19,6 +19,7 @@ CONFIG_CMD_GPIO=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_PING=y
+CONFIG_CMD_BMP=y
CONFIG_CMD_CACHE=y
CONFIG_CMD_EXT2=y
CONFIG_CMD_FAT=y
diff --git a/configs/cm_t35_defconfig b/configs/cm_t35_defconfig
index a07b35e561c..b9a79408a20 100644
--- a/configs/cm_t35_defconfig
+++ b/configs/cm_t35_defconfig
@@ -21,6 +21,7 @@ CONFIG_CMD_GPIO=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_PING=y
+CONFIG_CMD_BMP=y
CONFIG_CMD_CACHE=y
CONFIG_CMD_EXT2=y
CONFIG_CMD_FAT=y
diff --git a/configs/colibri_imx6_defconfig b/configs/colibri_imx6_defconfig
index 943334b97dd..6ab2b9d6ef8 100644
--- a/configs/colibri_imx6_defconfig
+++ b/configs/colibri_imx6_defconfig
@@ -34,6 +34,7 @@ CONFIG_CMD_GPIO=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
+CONFIG_CMD_BMP=y
CONFIG_CMD_CACHE=y
CONFIG_CMD_EXT4=y
CONFIG_CMD_FAT=y
diff --git a/configs/colibri_imx6_nospl_defconfig b/configs/colibri_imx6_nospl_defconfig
index 4539f2b24b6..93897fff969 100644
--- a/configs/colibri_imx6_nospl_defconfig
+++ b/configs/colibri_imx6_nospl_defconfig
@@ -27,6 +27,7 @@ CONFIG_CMD_GPIO=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
+CONFIG_CMD_BMP=y
CONFIG_CMD_CACHE=y
CONFIG_CMD_EXT4=y
CONFIG_CMD_FAT=y
diff --git a/configs/colibri_imx7_defconfig b/configs/colibri_imx7_defconfig
index 46f7bb242f5..d5838acbccc 100644
--- a/configs/colibri_imx7_defconfig
+++ b/configs/colibri_imx7_defconfig
@@ -31,6 +31,7 @@ CONFIG_CMD_GPIO=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
+CONFIG_CMD_BMP=y
CONFIG_CMD_CACHE=y
CONFIG_CMD_EXT4=y
CONFIG_CMD_FAT=y
diff --git a/configs/colibri_t20_defconfig b/configs/colibri_t20_defconfig
index 85956c52eae..5f6114ed6dc 100644
--- a/configs/colibri_t20_defconfig
+++ b/configs/colibri_t20_defconfig
@@ -19,6 +19,7 @@ CONFIG_CMD_USB_MASS_STORAGE=y
# CONFIG_CMD_FPGA is not set
CONFIG_CMD_GPIO=y
# CONFIG_CMD_NFS is not set
+CONFIG_CMD_BMP=y
CONFIG_CMD_CACHE=y
CONFIG_CMD_PMIC=y
CONFIG_CMD_REGULATOR=y
diff --git a/configs/colibri_vf_defconfig b/configs/colibri_vf_defconfig
index 1f0f929ce57..a5ef07cf56f 100644
--- a/configs/colibri_vf_defconfig
+++ b/configs/colibri_vf_defconfig
@@ -25,6 +25,7 @@ CONFIG_CMD_GPIO=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
+CONFIG_CMD_BMP=y
CONFIG_CMD_EXT4=y
CONFIG_CMD_FAT=y
CONFIG_CMD_FS_GENERIC=y
diff --git a/configs/controlcenterd_36BIT_SDCARD_DEVELOP_defconfig b/configs/controlcenterd_36BIT_SDCARD_DEVELOP_defconfig
index 504de212fa0..6c46ac8bf73 100644
--- a/configs/controlcenterd_36BIT_SDCARD_DEVELOP_defconfig
+++ b/configs/controlcenterd_36BIT_SDCARD_DEVELOP_defconfig
@@ -23,6 +23,7 @@ CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
+CONFIG_CMD_BMP=y
CONFIG_CMD_TPM=y
CONFIG_CMD_EXT2=y
CONFIG_CMD_FAT=y
diff --git a/configs/controlcenterd_36BIT_SDCARD_defconfig b/configs/controlcenterd_36BIT_SDCARD_defconfig
index fd21c1de7bb..0c1181f67d1 100644
--- a/configs/controlcenterd_36BIT_SDCARD_defconfig
+++ b/configs/controlcenterd_36BIT_SDCARD_defconfig
@@ -23,6 +23,7 @@ CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
+CONFIG_CMD_BMP=y
CONFIG_CMD_TPM=y
CONFIG_CMD_EXT2=y
CONFIG_CMD_FAT=y
diff --git a/configs/digsy_mtc_RAMBOOT_defconfig b/configs/digsy_mtc_RAMBOOT_defconfig
index bf6ca8ddf36..2a469587d9f 100644
--- a/configs/digsy_mtc_RAMBOOT_defconfig
+++ b/configs/digsy_mtc_RAMBOOT_defconfig
@@ -19,6 +19,7 @@ CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
+CONFIG_CMD_BMP=y
CONFIG_CMD_CACHE=y
CONFIG_CMD_EXT2=y
CONFIG_CMD_FAT=y
diff --git a/configs/digsy_mtc_defconfig b/configs/digsy_mtc_defconfig
index 7cdd3c16039..01f97554400 100644
--- a/configs/digsy_mtc_defconfig
+++ b/configs/digsy_mtc_defconfig
@@ -17,6 +17,7 @@ CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
+CONFIG_CMD_BMP=y
CONFIG_CMD_CACHE=y
CONFIG_CMD_EXT2=y
CONFIG_CMD_FAT=y
diff --git a/configs/digsy_mtc_rev5_RAMBOOT_defconfig b/configs/digsy_mtc_rev5_RAMBOOT_defconfig
index 03555d421dd..fb9e97c2e53 100644
--- a/configs/digsy_mtc_rev5_RAMBOOT_defconfig
+++ b/configs/digsy_mtc_rev5_RAMBOOT_defconfig
@@ -19,6 +19,7 @@ CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
+CONFIG_CMD_BMP=y
CONFIG_CMD_CACHE=y
CONFIG_CMD_EXT2=y
CONFIG_CMD_FAT=y
diff --git a/configs/digsy_mtc_rev5_defconfig b/configs/digsy_mtc_rev5_defconfig
index 11f2a8ae176..dd1a649b6d3 100644
--- a/configs/digsy_mtc_rev5_defconfig
+++ b/configs/digsy_mtc_rev5_defconfig
@@ -19,6 +19,7 @@ CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
+CONFIG_CMD_BMP=y
CONFIG_CMD_CACHE=y
CONFIG_CMD_EXT2=y
CONFIG_CMD_FAT=y
diff --git a/configs/ea20_defconfig b/configs/ea20_defconfig
index f24ad1aafdc..2e97bc432c9 100644
--- a/configs/ea20_defconfig
+++ b/configs/ea20_defconfig
@@ -24,6 +24,7 @@ CONFIG_CMD_GPIO=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
+CONFIG_CMD_BMP=y
CONFIG_CMD_UBI=y
# CONFIG_MMC is not set
CONFIG_SPI_FLASH=y
diff --git a/configs/fo300_defconfig b/configs/fo300_defconfig
index d33f98dfa59..7a774aa58b9 100644
--- a/configs/fo300_defconfig
+++ b/configs/fo300_defconfig
@@ -19,6 +19,7 @@ CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_CMD_SNTP=y
+CONFIG_CMD_BMP=y
CONFIG_CMD_EXT2=y
CONFIG_CMD_FAT=y
CONFIG_MAC_PARTITION=y
diff --git a/configs/icon_defconfig b/configs/icon_defconfig
index 2e7de7d4823..c2e510dd9ba 100644
--- a/configs/icon_defconfig
+++ b/configs/icon_defconfig
@@ -18,6 +18,7 @@ CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_CMD_SNTP=y
+CONFIG_CMD_BMP=y
CONFIG_CMD_CACHE=y
CONFIG_CMD_EXT2=y
CONFIG_CMD_FAT=y
diff --git a/configs/imx31_phycore_eet_defconfig b/configs/imx31_phycore_eet_defconfig
index b31eb39d42f..7de703e4c12 100644
--- a/configs/imx31_phycore_eet_defconfig
+++ b/configs/imx31_phycore_eet_defconfig
@@ -8,5 +8,6 @@ CONFIG_CMD_SPI=y
CONFIG_CMD_I2C=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_PING=y
+CONFIG_CMD_BMP=y
# CONFIG_MMC is not set
CONFIG_MTD_NOR_FLASH=y
diff --git a/configs/ipek01_defconfig b/configs/ipek01_defconfig
index 45aabbfc5d5..8b746e630ee 100644
--- a/configs/ipek01_defconfig
+++ b/configs/ipek01_defconfig
@@ -12,6 +12,7 @@ CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
+CONFIG_CMD_BMP=y
CONFIG_CMD_FAT=y
# CONFIG_MMC is not set
CONFIG_MTD_NOR_FLASH=y
diff --git a/configs/ls1021aqds_ddr4_nor_defconfig b/configs/ls1021aqds_ddr4_nor_defconfig
index 5566053ae98..62345a93016 100644
--- a/configs/ls1021aqds_ddr4_nor_defconfig
+++ b/configs/ls1021aqds_ddr4_nor_defconfig
@@ -23,6 +23,7 @@ CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
+CONFIG_CMD_BMP=y
CONFIG_CMD_EXT2=y
CONFIG_CMD_FAT=y
CONFIG_OF_CONTROL=y
diff --git a/configs/ls1021aqds_ddr4_nor_lpuart_defconfig b/configs/ls1021aqds_ddr4_nor_lpuart_defconfig
index 9582662e538..992adba76c1 100644
--- a/configs/ls1021aqds_ddr4_nor_lpuart_defconfig
+++ b/configs/ls1021aqds_ddr4_nor_lpuart_defconfig
@@ -24,6 +24,7 @@ CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
+CONFIG_CMD_BMP=y
CONFIG_CMD_EXT2=y
CONFIG_CMD_FAT=y
CONFIG_OF_CONTROL=y
diff --git a/configs/ls1021aqds_nand_defconfig b/configs/ls1021aqds_nand_defconfig
index 73f2fb070d9..248d0365007 100644
--- a/configs/ls1021aqds_nand_defconfig
+++ b/configs/ls1021aqds_nand_defconfig
@@ -37,6 +37,7 @@ CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
+CONFIG_CMD_BMP=y
CONFIG_CMD_EXT2=y
CONFIG_CMD_FAT=y
# CONFIG_SPL_EFI_PARTITION is not set
diff --git a/configs/ls1021aqds_nor_SECURE_BOOT_defconfig b/configs/ls1021aqds_nor_SECURE_BOOT_defconfig
index 74e12419744..11399426f33 100644
--- a/configs/ls1021aqds_nor_SECURE_BOOT_defconfig
+++ b/configs/ls1021aqds_nor_SECURE_BOOT_defconfig
@@ -25,6 +25,7 @@ CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
+CONFIG_CMD_BMP=y
CONFIG_CMD_EXT2=y
CONFIG_CMD_FAT=y
CONFIG_OF_CONTROL=y
diff --git a/configs/ls1021aqds_nor_defconfig b/configs/ls1021aqds_nor_defconfig
index 14a2b7f5623..a604dba0695 100644
--- a/configs/ls1021aqds_nor_defconfig
+++ b/configs/ls1021aqds_nor_defconfig
@@ -23,6 +23,7 @@ CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
+CONFIG_CMD_BMP=y
CONFIG_CMD_EXT2=y
CONFIG_CMD_FAT=y
CONFIG_OF_CONTROL=y
diff --git a/configs/ls1021aqds_nor_lpuart_defconfig b/configs/ls1021aqds_nor_lpuart_defconfig
index 9ed301ceddb..762d1af162e 100644
--- a/configs/ls1021aqds_nor_lpuart_defconfig
+++ b/configs/ls1021aqds_nor_lpuart_defconfig
@@ -24,6 +24,7 @@ CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
+CONFIG_CMD_BMP=y
CONFIG_CMD_EXT2=y
CONFIG_CMD_FAT=y
CONFIG_OF_CONTROL=y
diff --git a/configs/ls1021aqds_qspi_defconfig b/configs/ls1021aqds_qspi_defconfig
index 9ec21c58a3f..f11709e13d4 100644
--- a/configs/ls1021aqds_qspi_defconfig
+++ b/configs/ls1021aqds_qspi_defconfig
@@ -27,6 +27,7 @@ CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
+CONFIG_CMD_BMP=y
CONFIG_CMD_EXT2=y
CONFIG_CMD_FAT=y
CONFIG_OF_CONTROL=y
diff --git a/configs/ls1021aqds_sdcard_ifc_defconfig b/configs/ls1021aqds_sdcard_ifc_defconfig
index 492676a2c1e..328c7779d6d 100644
--- a/configs/ls1021aqds_sdcard_ifc_defconfig
+++ b/configs/ls1021aqds_sdcard_ifc_defconfig
@@ -35,6 +35,7 @@ CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
+CONFIG_CMD_BMP=y
CONFIG_CMD_EXT2=y
CONFIG_CMD_FAT=y
# CONFIG_SPL_EFI_PARTITION is not set
diff --git a/configs/ls1021aqds_sdcard_qspi_defconfig b/configs/ls1021aqds_sdcard_qspi_defconfig
index ed0b17be7ce..d7264ae6072 100644
--- a/configs/ls1021aqds_sdcard_qspi_defconfig
+++ b/configs/ls1021aqds_sdcard_qspi_defconfig
@@ -37,6 +37,7 @@ CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
+CONFIG_CMD_BMP=y
CONFIG_CMD_EXT2=y
CONFIG_CMD_FAT=y
# CONFIG_SPL_EFI_PARTITION is not set
diff --git a/configs/ls1021atwr_nor_SECURE_BOOT_defconfig b/configs/ls1021atwr_nor_SECURE_BOOT_defconfig
index 6af8dbd928c..122b12f6824 100644
--- a/configs/ls1021atwr_nor_SECURE_BOOT_defconfig
+++ b/configs/ls1021atwr_nor_SECURE_BOOT_defconfig
@@ -25,6 +25,7 @@ CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
+CONFIG_CMD_BMP=y
CONFIG_CMD_EXT2=y
CONFIG_CMD_FAT=y
CONFIG_OF_CONTROL=y
diff --git a/configs/ls1021atwr_nor_defconfig b/configs/ls1021atwr_nor_defconfig
index 93b646796b1..4fe45cf8c3d 100644
--- a/configs/ls1021atwr_nor_defconfig
+++ b/configs/ls1021atwr_nor_defconfig
@@ -23,6 +23,7 @@ CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
+CONFIG_CMD_BMP=y
CONFIG_CMD_EXT2=y
CONFIG_CMD_FAT=y
CONFIG_OF_CONTROL=y
diff --git a/configs/ls1021atwr_nor_lpuart_defconfig b/configs/ls1021atwr_nor_lpuart_defconfig
index c176e8377a7..a786c0ae3b7 100644
--- a/configs/ls1021atwr_nor_lpuart_defconfig
+++ b/configs/ls1021atwr_nor_lpuart_defconfig
@@ -24,6 +24,7 @@ CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
+CONFIG_CMD_BMP=y
CONFIG_CMD_EXT2=y
CONFIG_CMD_FAT=y
CONFIG_OF_CONTROL=y
diff --git a/configs/ls1021atwr_qspi_defconfig b/configs/ls1021atwr_qspi_defconfig
index 548d574fa06..608b1736dd5 100644
--- a/configs/ls1021atwr_qspi_defconfig
+++ b/configs/ls1021atwr_qspi_defconfig
@@ -27,6 +27,7 @@ CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
+CONFIG_CMD_BMP=y
CONFIG_CMD_EXT2=y
CONFIG_CMD_FAT=y
CONFIG_OF_CONTROL=y
diff --git a/configs/ls1021atwr_sdcard_ifc_SECURE_BOOT_defconfig b/configs/ls1021atwr_sdcard_ifc_SECURE_BOOT_defconfig
index bd001700a58..1da03468dae 100644
--- a/configs/ls1021atwr_sdcard_ifc_SECURE_BOOT_defconfig
+++ b/configs/ls1021atwr_sdcard_ifc_SECURE_BOOT_defconfig
@@ -38,6 +38,7 @@ CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
+CONFIG_CMD_BMP=y
CONFIG_CMD_EXT2=y
CONFIG_CMD_FAT=y
# CONFIG_SPL_EFI_PARTITION is not set
diff --git a/configs/ls1021atwr_sdcard_ifc_defconfig b/configs/ls1021atwr_sdcard_ifc_defconfig
index 107011163c1..a93a16d5180 100644
--- a/configs/ls1021atwr_sdcard_ifc_defconfig
+++ b/configs/ls1021atwr_sdcard_ifc_defconfig
@@ -35,6 +35,7 @@ CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
+CONFIG_CMD_BMP=y
CONFIG_CMD_EXT2=y
CONFIG_CMD_FAT=y
# CONFIG_SPL_EFI_PARTITION is not set
diff --git a/configs/ls1021atwr_sdcard_qspi_defconfig b/configs/ls1021atwr_sdcard_qspi_defconfig
index 5eddabd0205..86e70d8c86c 100644
--- a/configs/ls1021atwr_sdcard_qspi_defconfig
+++ b/configs/ls1021atwr_sdcard_qspi_defconfig
@@ -37,6 +37,7 @@ CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
+CONFIG_CMD_BMP=y
CONFIG_CMD_EXT2=y
CONFIG_CMD_FAT=y
# CONFIG_SPL_EFI_PARTITION is not set
diff --git a/configs/lwmon5_defconfig b/configs/lwmon5_defconfig
index 5c8e3daf923..1fbed29032c 100644
--- a/configs/lwmon5_defconfig
+++ b/configs/lwmon5_defconfig
@@ -20,6 +20,7 @@ CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
+CONFIG_CMD_BMP=y
CONFIG_CMD_FAT=y
CONFIG_MAC_PARTITION=y
CONFIG_ISO_PARTITION=y
diff --git a/configs/m28evk_defconfig b/configs/m28evk_defconfig
index c372450592b..c14b21892ad 100644
--- a/configs/m28evk_defconfig
+++ b/configs/m28evk_defconfig
@@ -28,6 +28,7 @@ CONFIG_CMD_GPIO=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
+CONFIG_CMD_BMP=y
CONFIG_CMD_CACHE=y
CONFIG_CMD_EXT4=y
CONFIG_CMD_EXT4_WRITE=y
diff --git a/configs/m53evk_defconfig b/configs/m53evk_defconfig
index 21a29aafc2d..20103bb59db 100644
--- a/configs/m53evk_defconfig
+++ b/configs/m53evk_defconfig
@@ -26,6 +26,7 @@ CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
+CONFIG_CMD_BMP=y
CONFIG_CMD_EXT4=y
CONFIG_CMD_EXT4_WRITE=y
CONFIG_CMD_FAT=y
diff --git a/configs/mcx_defconfig b/configs/mcx_defconfig
index a45d7524046..d731f35ed7f 100644
--- a/configs/mcx_defconfig
+++ b/configs/mcx_defconfig
@@ -24,6 +24,7 @@ CONFIG_CMD_GPIO=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
+CONFIG_CMD_BMP=y
CONFIG_CMD_CACHE=y
CONFIG_CMD_EXT2=y
CONFIG_CMD_FAT=y
diff --git a/configs/mt_ventoux_defconfig b/configs/mt_ventoux_defconfig
index 395074acfcd..08e400cc4e1 100644
--- a/configs/mt_ventoux_defconfig
+++ b/configs/mt_ventoux_defconfig
@@ -21,6 +21,7 @@ CONFIG_CMD_GPIO=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
+CONFIG_CMD_BMP=y
CONFIG_CMD_CACHE=y
CONFIG_CMD_EXT2=y
CONFIG_CMD_FAT=y
diff --git a/configs/mx23evk_defconfig b/configs/mx23evk_defconfig
index 61294907c4d..2e71dd97420 100644
--- a/configs/mx23evk_defconfig
+++ b/configs/mx23evk_defconfig
@@ -22,6 +22,7 @@ CONFIG_CMD_GPIO=y
# CONFIG_CMD_SETEXPR is not set
# CONFIG_CMD_NET is not set
# CONFIG_CMD_NFS is not set
+CONFIG_CMD_BMP=y
CONFIG_CMD_CACHE=y
CONFIG_CMD_EXT2=y
CONFIG_CMD_FAT=y
diff --git a/configs/mx28evk_auart_console_defconfig b/configs/mx28evk_auart_console_defconfig
index c6956606f69..bce5870db03 100644
--- a/configs/mx28evk_auart_console_defconfig
+++ b/configs/mx28evk_auart_console_defconfig
@@ -25,6 +25,7 @@ CONFIG_CMD_GPIO=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
+CONFIG_CMD_BMP=y
CONFIG_CMD_CACHE=y
CONFIG_CMD_EXT4=y
CONFIG_CMD_EXT4_WRITE=y
diff --git a/configs/mx28evk_defconfig b/configs/mx28evk_defconfig
index 021c6891f8b..fd7ec78a174 100644
--- a/configs/mx28evk_defconfig
+++ b/configs/mx28evk_defconfig
@@ -26,6 +26,7 @@ CONFIG_CMD_GPIO=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
+CONFIG_CMD_BMP=y
CONFIG_CMD_CACHE=y
CONFIG_CMD_EXT4=y
CONFIG_CMD_EXT4_WRITE=y
diff --git a/configs/mx28evk_nand_defconfig b/configs/mx28evk_nand_defconfig
index 2668f9e5e16..7b49110fcd7 100644
--- a/configs/mx28evk_nand_defconfig
+++ b/configs/mx28evk_nand_defconfig
@@ -25,6 +25,7 @@ CONFIG_CMD_GPIO=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
+CONFIG_CMD_BMP=y
CONFIG_CMD_CACHE=y
CONFIG_CMD_EXT4=y
CONFIG_CMD_EXT4_WRITE=y
diff --git a/configs/mx28evk_spi_defconfig b/configs/mx28evk_spi_defconfig
index abda1c867bf..3212e4553e6 100644
--- a/configs/mx28evk_spi_defconfig
+++ b/configs/mx28evk_spi_defconfig
@@ -25,6 +25,7 @@ CONFIG_CMD_GPIO=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
+CONFIG_CMD_BMP=y
CONFIG_CMD_CACHE=y
CONFIG_CMD_EXT4=y
CONFIG_CMD_EXT4_WRITE=y
diff --git a/configs/mx6qsabrelite_defconfig b/configs/mx6qsabrelite_defconfig
index fe633fcbbdc..c4301e1f0af 100644
--- a/configs/mx6qsabrelite_defconfig
+++ b/configs/mx6qsabrelite_defconfig
@@ -21,6 +21,7 @@ CONFIG_CMD_GPIO=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
+CONFIG_CMD_BMP=y
CONFIG_CMD_CACHE=y
CONFIG_CMD_TIME=y
CONFIG_CMD_EXT2=y
diff --git a/configs/mx6sxsabresd_defconfig b/configs/mx6sxsabresd_defconfig
index 847dd5980f1..ff23345c1e0 100644
--- a/configs/mx6sxsabresd_defconfig
+++ b/configs/mx6sxsabresd_defconfig
@@ -19,6 +19,7 @@ CONFIG_CMD_GPIO=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
+CONFIG_CMD_BMP=y
CONFIG_CMD_CACHE=y
CONFIG_CMD_TIME=y
CONFIG_CMD_EXT2=y
diff --git a/configs/mx6sxsabresd_spl_defconfig b/configs/mx6sxsabresd_spl_defconfig
index 85ccd5f6e3c..c08cadab4dd 100644
--- a/configs/mx6sxsabresd_spl_defconfig
+++ b/configs/mx6sxsabresd_spl_defconfig
@@ -29,6 +29,7 @@ CONFIG_CMD_GPIO=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
+CONFIG_CMD_BMP=y
CONFIG_CMD_CACHE=y
CONFIG_CMD_TIME=y
CONFIG_CMD_EXT2=y
diff --git a/configs/mx6ul_14x14_evk_defconfig b/configs/mx6ul_14x14_evk_defconfig
index 7c1dae9151e..56e66eef3df 100644
--- a/configs/mx6ul_14x14_evk_defconfig
+++ b/configs/mx6ul_14x14_evk_defconfig
@@ -28,6 +28,7 @@ CONFIG_CMD_USB=y
CONFIG_CMD_GPIO=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_PING=y
+CONFIG_CMD_BMP=y
CONFIG_CMD_CACHE=y
CONFIG_CMD_EXT2=y
CONFIG_CMD_EXT4=y
diff --git a/configs/mx6ul_9x9_evk_defconfig b/configs/mx6ul_9x9_evk_defconfig
index 8ac3de13250..aa6cc08a4f9 100644
--- a/configs/mx6ul_9x9_evk_defconfig
+++ b/configs/mx6ul_9x9_evk_defconfig
@@ -28,6 +28,7 @@ CONFIG_CMD_USB=y
CONFIG_CMD_GPIO=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_PING=y
+CONFIG_CMD_BMP=y
CONFIG_CMD_CACHE=y
CONFIG_CMD_EXT2=y
CONFIG_CMD_EXT4=y
diff --git a/configs/mx7dsabresd_defconfig b/configs/mx7dsabresd_defconfig
index 9cca305113b..0701e1d3248 100644
--- a/configs/mx7dsabresd_defconfig
+++ b/configs/mx7dsabresd_defconfig
@@ -28,6 +28,7 @@ CONFIG_CMD_GPIO=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
+CONFIG_CMD_BMP=y
CONFIG_CMD_CACHE=y
CONFIG_CMD_EXT2=y
CONFIG_CMD_EXT4=y
diff --git a/configs/mx7dsabresd_secure_defconfig b/configs/mx7dsabresd_secure_defconfig
index f183277dcbb..2e8b5bedd35 100644
--- a/configs/mx7dsabresd_secure_defconfig
+++ b/configs/mx7dsabresd_secure_defconfig
@@ -29,6 +29,7 @@ CONFIG_CMD_GPIO=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
+CONFIG_CMD_BMP=y
CONFIG_CMD_CACHE=y
CONFIG_CMD_EXT2=y
CONFIG_CMD_EXT4=y
diff --git a/configs/nitrogen6dl2g_defconfig b/configs/nitrogen6dl2g_defconfig
index 0268298bb7c..9b16bf48b03 100644
--- a/configs/nitrogen6dl2g_defconfig
+++ b/configs/nitrogen6dl2g_defconfig
@@ -21,6 +21,7 @@ CONFIG_CMD_GPIO=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
+CONFIG_CMD_BMP=y
CONFIG_CMD_CACHE=y
CONFIG_CMD_TIME=y
CONFIG_CMD_EXT2=y
diff --git a/configs/nitrogen6dl_defconfig b/configs/nitrogen6dl_defconfig
index 886e28a1be2..83bbf8e02f1 100644
--- a/configs/nitrogen6dl_defconfig
+++ b/configs/nitrogen6dl_defconfig
@@ -21,6 +21,7 @@ CONFIG_CMD_GPIO=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
+CONFIG_CMD_BMP=y
CONFIG_CMD_CACHE=y
CONFIG_CMD_TIME=y
CONFIG_CMD_EXT2=y
diff --git a/configs/nitrogen6q2g_defconfig b/configs/nitrogen6q2g_defconfig
index c9cc5340661..69cf637eea5 100644
--- a/configs/nitrogen6q2g_defconfig
+++ b/configs/nitrogen6q2g_defconfig
@@ -21,6 +21,7 @@ CONFIG_CMD_GPIO=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
+CONFIG_CMD_BMP=y
CONFIG_CMD_CACHE=y
CONFIG_CMD_TIME=y
CONFIG_CMD_EXT2=y
diff --git a/configs/nitrogen6q_defconfig b/configs/nitrogen6q_defconfig
index 8791272ac51..2e9ee2e2931 100644
--- a/configs/nitrogen6q_defconfig
+++ b/configs/nitrogen6q_defconfig
@@ -21,6 +21,7 @@ CONFIG_CMD_GPIO=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
+CONFIG_CMD_BMP=y
CONFIG_CMD_CACHE=y
CONFIG_CMD_TIME=y
CONFIG_CMD_EXT2=y
diff --git a/configs/nitrogen6s1g_defconfig b/configs/nitrogen6s1g_defconfig
index 7e2eb861469..f3dd324dce4 100644
--- a/configs/nitrogen6s1g_defconfig
+++ b/configs/nitrogen6s1g_defconfig
@@ -21,6 +21,7 @@ CONFIG_CMD_GPIO=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
+CONFIG_CMD_BMP=y
CONFIG_CMD_CACHE=y
CONFIG_CMD_TIME=y
CONFIG_CMD_EXT2=y
diff --git a/configs/nitrogen6s_defconfig b/configs/nitrogen6s_defconfig
index 6fc18e43d6f..5a825d6e22d 100644
--- a/configs/nitrogen6s_defconfig
+++ b/configs/nitrogen6s_defconfig
@@ -21,6 +21,7 @@ CONFIG_CMD_GPIO=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
+CONFIG_CMD_BMP=y
CONFIG_CMD_CACHE=y
CONFIG_CMD_TIME=y
CONFIG_CMD_EXT2=y
diff --git a/configs/nyan-big_defconfig b/configs/nyan-big_defconfig
index b132eb1f601..42fe1207864 100644
--- a/configs/nyan-big_defconfig
+++ b/configs/nyan-big_defconfig
@@ -22,6 +22,7 @@ CONFIG_CMD_USB_MASS_STORAGE=y
CONFIG_CMD_GPIO=y
# CONFIG_CMD_SETEXPR is not set
# CONFIG_CMD_NFS is not set
+CONFIG_CMD_BMP=y
CONFIG_CMD_PMIC=y
CONFIG_CMD_REGULATOR=y
CONFIG_CMD_TPM=y
diff --git a/configs/opos6uldev_defconfig b/configs/opos6uldev_defconfig
index 6c61ad7c72b..c092cc699a3 100644
--- a/configs/opos6uldev_defconfig
+++ b/configs/opos6uldev_defconfig
@@ -43,6 +43,7 @@ CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_CMD_SNTP=y
CONFIG_CMD_DNS=y
+CONFIG_CMD_BMP=y
CONFIG_CMD_REGULATOR=y
CONFIG_CMD_EXT2=y
CONFIG_CMD_EXT4=y
diff --git a/configs/pdm360ng_defconfig b/configs/pdm360ng_defconfig
index 7a94f9cff5f..42cf0213466 100644
--- a/configs/pdm360ng_defconfig
+++ b/configs/pdm360ng_defconfig
@@ -15,6 +15,7 @@ CONFIG_CMD_I2C=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
+CONFIG_CMD_BMP=y
# CONFIG_MMC is not set
CONFIG_MTD_NOR_FLASH=y
# CONFIG_PCI is not set
diff --git a/configs/pxm2_defconfig b/configs/pxm2_defconfig
index 3d42332007f..5b7c5ef3e99 100644
--- a/configs/pxm2_defconfig
+++ b/configs/pxm2_defconfig
@@ -44,6 +44,7 @@ CONFIG_CMD_GPIO=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
+CONFIG_CMD_BMP=y
CONFIG_CMD_CACHE=y
CONFIG_CMD_TIME=y
CONFIG_CMD_EXT2=y
diff --git a/configs/rut_defconfig b/configs/rut_defconfig
index 66614bac6f5..33289962a88 100644
--- a/configs/rut_defconfig
+++ b/configs/rut_defconfig
@@ -45,6 +45,7 @@ CONFIG_CMD_GPIO=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
+CONFIG_CMD_BMP=y
CONFIG_CMD_CACHE=y
CONFIG_CMD_TIME=y
CONFIG_CMD_EXT2=y
diff --git a/configs/sandbox_defconfig b/configs/sandbox_defconfig
index 77a07ac3e14..afb4d939b85 100644
--- a/configs/sandbox_defconfig
+++ b/configs/sandbox_defconfig
@@ -42,6 +42,7 @@ CONFIG_CMD_CDP=y
CONFIG_CMD_SNTP=y
CONFIG_CMD_DNS=y
CONFIG_CMD_LINK_LOCAL=y
+CONFIG_CMD_BMP=y
CONFIG_CMD_TIME=y
CONFIG_CMD_TIMER=y
CONFIG_CMD_SOUND=y
diff --git a/configs/sandbox_noblk_defconfig b/configs/sandbox_noblk_defconfig
index c4610e8efb1..7cc9257a5bf 100644
--- a/configs/sandbox_noblk_defconfig
+++ b/configs/sandbox_noblk_defconfig
@@ -46,6 +46,7 @@ CONFIG_CMD_CDP=y
CONFIG_CMD_SNTP=y
CONFIG_CMD_DNS=y
CONFIG_CMD_LINK_LOCAL=y
+CONFIG_CMD_BMP=y
CONFIG_CMD_TIME=y
CONFIG_CMD_TIMER=y
CONFIG_CMD_SOUND=y
diff --git a/configs/sandbox_spl_defconfig b/configs/sandbox_spl_defconfig
index ffdd15b6b58..e0ee8c23fe2 100644
--- a/configs/sandbox_spl_defconfig
+++ b/configs/sandbox_spl_defconfig
@@ -49,6 +49,7 @@ CONFIG_CMD_CDP=y
CONFIG_CMD_SNTP=y
CONFIG_CMD_DNS=y
CONFIG_CMD_LINK_LOCAL=y
+CONFIG_CMD_BMP=y
CONFIG_CMD_TIME=y
CONFIG_CMD_TIMER=y
CONFIG_CMD_SOUND=y
diff --git a/configs/socrates_defconfig b/configs/socrates_defconfig
index 474f3145f8a..c34670db800 100644
--- a/configs/socrates_defconfig
+++ b/configs/socrates_defconfig
@@ -17,6 +17,7 @@ CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_CMD_SNTP=y
+CONFIG_CMD_BMP=y
CONFIG_CMD_EXT2=y
# CONFIG_MMC is not set
CONFIG_MTD_NOR_FLASH=y
diff --git a/configs/theadorable_debug_defconfig b/configs/theadorable_debug_defconfig
index e53b4903cb0..2164237b378 100644
--- a/configs/theadorable_debug_defconfig
+++ b/configs/theadorable_debug_defconfig
@@ -31,6 +31,7 @@ CONFIG_CMD_TFTPPUT=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
+CONFIG_CMD_BMP=y
CONFIG_CMD_CACHE=y
CONFIG_CMD_TIME=y
CONFIG_CMD_EXT2=y
diff --git a/configs/theadorable_defconfig b/configs/theadorable_defconfig
index 97e37387450..d5eef7060e8 100644
--- a/configs/theadorable_defconfig
+++ b/configs/theadorable_defconfig
@@ -26,6 +26,7 @@ CONFIG_CMD_I2C=y
# CONFIG_CMD_SETEXPR is not set
# CONFIG_CMD_NET is not set
# CONFIG_CMD_NFS is not set
+CONFIG_CMD_BMP=y
CONFIG_CMD_CACHE=y
CONFIG_CMD_TIME=y
CONFIG_CMD_EXT2=y
diff --git a/configs/wtk_defconfig b/configs/wtk_defconfig
index 6b73178038b..d0c01369cec 100644
--- a/configs/wtk_defconfig
+++ b/configs/wtk_defconfig
@@ -10,6 +10,7 @@ CONFIG_CMD_ASKENV=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_SNTP=y
+CONFIG_CMD_BMP=y
CONFIG_CMD_EXT2=y
CONFIG_MAC_PARTITION=y
CONFIG_DOS_PARTITION=y
diff --git a/include/config_cmd_all.h b/include/config_cmd_all.h
index 825ccf705c6..25b030f4a36 100644
--- a/include/config_cmd_all.h
+++ b/include/config_cmd_all.h
@@ -13,7 +13,6 @@
* Alphabetical list of all possible commands.
*/
-#define CONFIG_CMD_BMP /* BMP support */
#define CONFIG_CMD_BSP /* Board Specific functions */
#define CONFIG_CMD_CLK /* Clock support */
#define CONFIG_CMD_DATE /* support for RTC, date/time...*/
diff --git a/include/config_fallbacks.h b/include/config_fallbacks.h
index 31691755eeb..7aa5b02396f 100644
--- a/include/config_fallbacks.h
+++ b/include/config_fallbacks.h
@@ -71,10 +71,6 @@
#define CONFIG_LIB_RAND
#endif
-#if defined(CONFIG_API) && defined(CONFIG_LCD)
-#define CONFIG_CMD_BMP
-#endif
-
#ifndef CONFIG_SYS_PBSIZE
#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + 128)
#endif
diff --git a/include/configs/M52277EVB.h b/include/configs/M52277EVB.h
index 126f889e97e..9325be84695 100644
--- a/include/configs/M52277EVB.h
+++ b/include/configs/M52277EVB.h
@@ -39,7 +39,6 @@
#define CONFIG_CMD_DATE
#define CONFIG_CMD_JFFS2
#define CONFIG_CMD_REGINFO
-#undef CONFIG_CMD_BMP
#define CONFIG_HOSTNAME M52277EVB
#define CONFIG_SYS_UBOOT_END 0x3FFFF
diff --git a/include/configs/MPC8610HPCD.h b/include/configs/MPC8610HPCD.h
index 0e9aaf4d661..2014450be83 100644
--- a/include/configs/MPC8610HPCD.h
+++ b/include/configs/MPC8610HPCD.h
@@ -21,7 +21,6 @@
#ifdef CONFIG_FSL_DIU_FB
#define CONFIG_SYS_DIU_ADDR (CONFIG_SYS_CCSRBAR + 0x2c000)
-#define CONFIG_CMD_BMP
#define CONFIG_VIDEO_LOGO
#define CONFIG_VIDEO_BMP_LOGO
#endif
diff --git a/include/configs/P1022DS.h b/include/configs/P1022DS.h
index 823eaf673f2..db66c309e7f 100644
--- a/include/configs/P1022DS.h
+++ b/include/configs/P1022DS.h
@@ -365,7 +365,6 @@
#ifdef CONFIG_FSL_DIU_FB
#define CONFIG_SYS_DIU_ADDR (CONFIG_SYS_CCSRBAR + 0x10000)
-#define CONFIG_CMD_BMP
#define CONFIG_VIDEO_LOGO
#define CONFIG_VIDEO_BMP_LOGO
#define CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS
diff --git a/include/configs/T102xQDS.h b/include/configs/T102xQDS.h
index 5b4ea141da4..0fc5405bb9c 100644
--- a/include/configs/T102xQDS.h
+++ b/include/configs/T102xQDS.h
@@ -486,7 +486,6 @@ unsigned long get_board_ddr_clk(void);
#ifdef CONFIG_FSL_DIU_FB
#define CONFIG_FSL_DIU_CH7301
#define CONFIG_SYS_DIU_ADDR (CONFIG_SYS_CCSRBAR + 0x180000)
-#define CONFIG_CMD_BMP
#define CONFIG_VIDEO_LOGO
#define CONFIG_VIDEO_BMP_LOGO
#define CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS
diff --git a/include/configs/T102xRDB.h b/include/configs/T102xRDB.h
index c9a848f6b15..82794c424bd 100644
--- a/include/configs/T102xRDB.h
+++ b/include/configs/T102xRDB.h
@@ -493,7 +493,6 @@ unsigned long get_board_ddr_clk(void);
#undef CONFIG_FSL_DIU_FB /* RDB doesn't support DIU */
#ifdef CONFIG_FSL_DIU_FB
#define CONFIG_SYS_DIU_ADDR (CONFIG_SYS_CCSRBAR + 0x180000)
-#define CONFIG_CMD_BMP
#define CONFIG_VIDEO_LOGO
#define CONFIG_VIDEO_BMP_LOGO
#define CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS
diff --git a/include/configs/T1040QDS.h b/include/configs/T1040QDS.h
index 0d60747dc8d..2f9497eb7dc 100644
--- a/include/configs/T1040QDS.h
+++ b/include/configs/T1040QDS.h
@@ -396,7 +396,6 @@ unsigned long get_board_ddr_clk(void);
#ifdef CONFIG_FSL_DIU_FB
#define CONFIG_FSL_DIU_CH7301
#define CONFIG_SYS_DIU_ADDR (CONFIG_SYS_CCSRBAR + 0x180000)
-#define CONFIG_CMD_BMP
#define CONFIG_VIDEO_LOGO
#define CONFIG_VIDEO_BMP_LOGO
#define CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS
diff --git a/include/configs/T104xRDB.h b/include/configs/T104xRDB.h
index 5107dc342dd..9bf09387b0b 100644
--- a/include/configs/T104xRDB.h
+++ b/include/configs/T104xRDB.h
@@ -505,7 +505,6 @@ $(SRCTREE)/board/freescale/t104xrdb/t1042d4_sd_rcw.cfg
#ifdef CONFIG_FSL_DIU_FB
#define CONFIG_FSL_DIU_CH7301
#define CONFIG_SYS_DIU_ADDR (CONFIG_SYS_CCSRBAR + 0x180000)
-#define CONFIG_CMD_BMP
#define CONFIG_VIDEO_LOGO
#define CONFIG_VIDEO_BMP_LOGO
#endif
diff --git a/include/configs/TQM5200.h b/include/configs/TQM5200.h
index e5911d0d96b..0be6820ef90 100644
--- a/include/configs/TQM5200.h
+++ b/include/configs/TQM5200.h
@@ -150,10 +150,6 @@
#define CONFIG_CMD_REGINFO
#define CONFIG_CMD_BSP
-#ifdef CONFIG_VIDEO
- #define CONFIG_CMD_BMP
-#endif
-
#ifdef CONFIG_PCI
#define CONFIG_CMD_PCI
#define CONFIG_PCIAUTO_SKIP_HOST_BRIDGE 1
diff --git a/include/configs/TQM823L.h b/include/configs/TQM823L.h
index 61748ca4123..ddfadf1c1fd 100644
--- a/include/configs/TQM823L.h
+++ b/include/configs/TQM823L.h
@@ -95,10 +95,6 @@
#define CONFIG_CMD_IDE
#define CONFIG_CMD_JFFS2
-#ifdef CONFIG_SPLASH_SCREEN
- #define CONFIG_CMD_BMP
-#endif
-
#define CONFIG_NETCONSOLE
/*
diff --git a/include/configs/apalis_imx6.h b/include/configs/apalis_imx6.h
index e195af4d642..c1c0f592d25 100644
--- a/include/configs/apalis_imx6.h
+++ b/include/configs/apalis_imx6.h
@@ -138,7 +138,6 @@
#define CONFIG_CONSOLE_MUX
#define CONFIG_IMX_HDMI
#define CONFIG_IMX_VIDEO_SKIP
-#define CONFIG_CMD_BMP
/* allow to overwrite serial and ethaddr */
#define CONFIG_ENV_OVERWRITE
diff --git a/include/configs/aristainetos-common.h b/include/configs/aristainetos-common.h
index 607dadf98ef..d6726925842 100644
--- a/include/configs/aristainetos-common.h
+++ b/include/configs/aristainetos-common.h
@@ -233,8 +233,6 @@
#define CONFIG_IPUV3_CLK 198000000
#define CONFIG_IMX_VIDEO_SKIP
-#define CONFIG_CMD_BMP
-
#define CONFIG_PWM_IMX
#define CONFIG_IMX6_PWM_PER_CLK 66000000
diff --git a/include/configs/aristainetos2.h b/include/configs/aristainetos2.h
index 961a29a86a8..30abafc0ae5 100644
--- a/include/configs/aristainetos2.h
+++ b/include/configs/aristainetos2.h
@@ -50,8 +50,6 @@
#define CONFIG_LG4573_BUS 0
#define CONFIG_LG4573_CS 0
-#define CONFIG_CMD_BMP
-
#define CONFIG_PWM_IMX
#define CONFIG_IMX6_PWM_PER_CLK 66000000
diff --git a/include/configs/aristainetos2b.h b/include/configs/aristainetos2b.h
index 638c89e53c8..7a475145155 100644
--- a/include/configs/aristainetos2b.h
+++ b/include/configs/aristainetos2b.h
@@ -50,8 +50,6 @@
#define CONFIG_LG4573_BUS 0
#define CONFIG_LG4573_CS 1
-#define CONFIG_CMD_BMP
-
#define CONFIG_PWM_IMX
#define CONFIG_IMX6_PWM_PER_CLK 66000000
diff --git a/include/configs/brxre1.h b/include/configs/brxre1.h
index 82ee7c62e00..49aea8f1962 100644
--- a/include/configs/brxre1.h
+++ b/include/configs/brxre1.h
@@ -22,7 +22,6 @@
#define CONFIG_VIDEO_BMP_GZIP
#define CONFIG_SYS_VIDEO_LOGO_MAX_SIZE (1366*767*4)
-#define CONFIG_CMD_BMP
#define CONFIG_BMP_24BMP
#define CONFIG_BMP_32BPP
diff --git a/include/configs/cm_fx6.h b/include/configs/cm_fx6.h
index 14b25d410b1..f5f3df3ad69 100644
--- a/include/configs/cm_fx6.h
+++ b/include/configs/cm_fx6.h
@@ -252,7 +252,6 @@
#define CONFIG_SPLASH_SCREEN
#define CONFIG_SPLASH_SOURCE
-#define CONFIG_CMD_BMP
#define CONFIG_VIDEO_BMP_RLE8
#define CONFIG_VIDEO_LOGO
diff --git a/include/configs/cm_t35.h b/include/configs/cm_t35.h
index 8e6571b9f05..4da8d54eda4 100644
--- a/include/configs/cm_t35.h
+++ b/include/configs/cm_t35.h
@@ -262,7 +262,6 @@
#define CONFIG_SPLASH_SCREEN
#define CONFIG_SPLASH_SOURCE
-#define CONFIG_CMD_BMP
#define CONFIG_BMP_16BPP
#define CONFIG_SCF0403_LCD
diff --git a/include/configs/cm_t3517.h b/include/configs/cm_t3517.h
index 55d4786fd85..e12dc020ff7 100644
--- a/include/configs/cm_t3517.h
+++ b/include/configs/cm_t3517.h
@@ -263,7 +263,6 @@
#define CONFIG_SPLASH_SCREEN
#define CONFIG_SPLASHIMAGE_GUARD
-#define CONFIG_CMD_BMP
#define CONFIG_BMP_16BPP
#define CONFIG_SCF0403_LCD
diff --git a/include/configs/colibri_imx6.h b/include/configs/colibri_imx6.h
index 5d188e80d9d..9c4085245a7 100644
--- a/include/configs/colibri_imx6.h
+++ b/include/configs/colibri_imx6.h
@@ -119,7 +119,6 @@
#define CONFIG_CONSOLE_MUX
#define CONFIG_IMX_HDMI
#define CONFIG_IMX_VIDEO_SKIP
-#define CONFIG_CMD_BMP
/* allow to overwrite serial and ethaddr */
#define CONFIG_ENV_OVERWRITE
diff --git a/include/configs/colibri_imx7.h b/include/configs/colibri_imx7.h
index 7e25fd7066c..3388a95ed3d 100644
--- a/include/configs/colibri_imx7.h
+++ b/include/configs/colibri_imx7.h
@@ -216,7 +216,6 @@
#define CONFIG_VIDEO_LOGO
#define CONFIG_SPLASH_SCREEN
#define CONFIG_SPLASH_SCREEN_ALIGN
-#define CONFIG_CMD_BMP
#define CONFIG_BMP_16BPP
#define CONFIG_VIDEO_BMP_RLE8
#define CONFIG_VIDEO_BMP_LOGO
diff --git a/include/configs/colibri_pxa270.h b/include/configs/colibri_pxa270.h
index 015f98241ef..0dbd996920b 100644
--- a/include/configs/colibri_pxa270.h
+++ b/include/configs/colibri_pxa270.h
@@ -66,7 +66,6 @@
#define CONFIG_PXA_LCD
#define CONFIG_PXA_VGA
#define CONFIG_SYS_WHITE_ON_BLACK
-#define CONFIG_CMD_BMP
#define CONFIG_LCD_LOGO
#endif
diff --git a/include/configs/colibri_t20.h b/include/configs/colibri_t20.h
index 8b854c37a13..743f92c9627 100644
--- a/include/configs/colibri_t20.h
+++ b/include/configs/colibri_t20.h
@@ -40,7 +40,6 @@
/* LCD support */
#define CONFIG_SYS_WHITE_ON_BLACK
-#define CONFIG_CMD_BMP
#define CONFIG_LCD_LOGO
/* NAND support */
diff --git a/include/configs/colibri_vf.h b/include/configs/colibri_vf.h
index 5dc5ed0b717..c7f174839f0 100644
--- a/include/configs/colibri_vf.h
+++ b/include/configs/colibri_vf.h
@@ -26,7 +26,6 @@
#endif
#ifdef CONFIG_VIDEO_FSL_DCU_FB
-#define CONFIG_CMD_BMP
#define CONFIG_SPLASH_SCREEN_ALIGN
#define CONFIG_VIDEO_LOGO
#define CONFIG_VIDEO_BMP_LOGO
diff --git a/include/configs/conga-qeval20-qa3-e3845.h b/include/configs/conga-qeval20-qa3-e3845.h
index a70845e1017..231e5990ec1 100644
--- a/include/configs/conga-qeval20-qa3-e3845.h
+++ b/include/configs/conga-qeval20-qa3-e3845.h
@@ -28,7 +28,6 @@
#define VIDEO_IO_OFFSET 0
#define CONFIG_X86EMU_RAW_IO
-#define CONFIG_CMD_BMP
#define CONFIG_ENV_SECT_SIZE 0x1000
#define CONFIG_ENV_OFFSET 0x006ef000
diff --git a/include/configs/controlcenterd.h b/include/configs/controlcenterd.h
index 1bd3195ff14..b52f300af92 100644
--- a/include/configs/controlcenterd.h
+++ b/include/configs/controlcenterd.h
@@ -214,7 +214,6 @@
*/
#define CONFIG_FSL_DIU_FB
#define CONFIG_SYS_DIU_ADDR (CONFIG_SYS_CCSRBAR + 0x10000)
-#define CONFIG_CMD_BMP
/*
* General PCI
diff --git a/include/configs/dfi-bt700.h b/include/configs/dfi-bt700.h
index edb495842b0..1cb4b5ee812 100644
--- a/include/configs/dfi-bt700.h
+++ b/include/configs/dfi-bt700.h
@@ -39,7 +39,6 @@
#define VIDEO_IO_OFFSET 0
#define CONFIG_X86EMU_RAW_IO
-#define CONFIG_CMD_BMP
#define CONFIG_ENV_SECT_SIZE 0x1000
#define CONFIG_ENV_OFFSET 0x006ef000
diff --git a/include/configs/digsy_mtc.h b/include/configs/digsy_mtc.h
index 71068a8ae33..00578f0d8c4 100644
--- a/include/configs/digsy_mtc.h
+++ b/include/configs/digsy_mtc.h
@@ -85,9 +85,6 @@
/*
* Command line configuration.
*/
-#ifdef CONFIG_VIDEO
-#define CONFIG_CMD_BMP
-#endif
#define CONFIG_CMD_DATE
#define CONFIG_CMD_DIAG
#define CONFIG_CMD_EEPROM
diff --git a/include/configs/ea20.h b/include/configs/ea20.h
index a7b2dc82e11..84085dcd4dc 100644
--- a/include/configs/ea20.h
+++ b/include/configs/ea20.h
@@ -102,7 +102,6 @@
#define CONFIG_VIDEO_LOGO
#define CONFIG_VIDEO_BMP_RLE8
#define CONFIG_VIDEO_BMP_LOGO
-#define CONFIG_CMD_BMP
#endif
/*
diff --git a/include/configs/icon.h b/include/configs/icon.h
index 22e5f87286d..3cb2196d792 100644
--- a/include/configs/icon.h
+++ b/include/configs/icon.h
@@ -163,9 +163,6 @@
#define CONFIG_CMD_DATE
#define CONFIG_CMD_PCI
#define CONFIG_CMD_SDRAM
-#ifdef CONFIG_VIDEO
-#define CONFIG_CMD_BMP
-#endif
#define CONFIG_IBM_EMAC4_V4 /* 440SPe has this EMAC version */
#define CONFIG_PHY_ADDR 1 /* PHY address, See schematics */
diff --git a/include/configs/imx31_phycore.h b/include/configs/imx31_phycore.h
index ae5009a5562..0a66720a7d2 100644
--- a/include/configs/imx31_phycore.h
+++ b/include/configs/imx31_phycore.h
@@ -177,7 +177,6 @@
#define CONFIG_VIDEO_MX3
#define CONFIG_VIDEO_LOGO
#define CONFIG_SPLASH_SCREEN
-#define CONFIG_CMD_BMP
#define CONFIG_BMP_16BPP
#endif
diff --git a/include/configs/ipek01.h b/include/configs/ipek01.h
index a99e928e2ee..eb7ac91a8d2 100644
--- a/include/configs/ipek01.h
+++ b/include/configs/ipek01.h
@@ -88,9 +88,6 @@
/*
* Command line configuration.
*/
-#ifdef CONFIG_VIDEO
-#define CONFIG_CMD_BMP /* BMP support */
-#endif
#define CONFIG_CMD_DATE /* support for RTC, date/time...*/
#define CONFIG_CMD_IDE /* IDE harddisk support */
#define CONFIG_CMD_IRQ /* irqinfo */
diff --git a/include/configs/ls1021aqds.h b/include/configs/ls1021aqds.h
index c3224c8c3f4..373de40d298 100644
--- a/include/configs/ls1021aqds.h
+++ b/include/configs/ls1021aqds.h
@@ -420,7 +420,6 @@ unsigned long get_board_ddr_clk(void);
* Video
*/
#ifdef CONFIG_VIDEO_FSL_DCU_FB
-#define CONFIG_CMD_BMP
#define CONFIG_VIDEO_LOGO
#define CONFIG_VIDEO_BMP_LOGO
diff --git a/include/configs/ls1021atwr.h b/include/configs/ls1021atwr.h
index 1d0b4698bbf..1ff3d9ee9e9 100644
--- a/include/configs/ls1021atwr.h
+++ b/include/configs/ls1021atwr.h
@@ -299,7 +299,6 @@
* Video
*/
#ifdef CONFIG_VIDEO_FSL_DCU_FB
-#define CONFIG_CMD_BMP
#define CONFIG_VIDEO_LOGO
#define CONFIG_VIDEO_BMP_LOGO
diff --git a/include/configs/lwmon5.h b/include/configs/lwmon5.h
index 70e75880cfd..367423484f0 100644
--- a/include/configs/lwmon5.h
+++ b/include/configs/lwmon5.h
@@ -389,10 +389,6 @@
#define CONFIG_CMD_REGINFO
#define CONFIG_CMD_SDRAM
-#ifdef CONFIG_VIDEO
-#define CONFIG_CMD_BMP
-#endif
-
#ifdef CONFIG_440EPX
#endif
diff --git a/include/configs/m28evk.h b/include/configs/m28evk.h
index 7f98f1f8a88..f3abdb187e2 100644
--- a/include/configs/m28evk.h
+++ b/include/configs/m28evk.h
@@ -16,7 +16,6 @@
/* U-Boot Commands */
#define CONFIG_FAT_WRITE
-#define CONFIG_CMD_BMP
#define CONFIG_CMD_DATE
#define CONFIG_CMD_EEPROM
#define CONFIG_CMD_NAND
@@ -115,7 +114,6 @@
#ifdef CONFIG_VIDEO
#define CONFIG_VIDEO_LOGO
#define CONFIG_SPLASH_SCREEN
-#define CONFIG_CMD_BMP
#define CONFIG_BMP_16BPP
#define CONFIG_VIDEO_BMP_RLE8
#define CONFIG_VIDEO_BMP_GZIP
diff --git a/include/configs/m53evk.h b/include/configs/m53evk.h
index 02cd6353fb9..9731d4942da 100644
--- a/include/configs/m53evk.h
+++ b/include/configs/m53evk.h
@@ -22,7 +22,6 @@
*/
#define CONFIG_FAT_WRITE
-#define CONFIG_CMD_BMP
#define CONFIG_CMD_DATE
#define CONFIG_CMD_NAND
#define CONFIG_CMD_NAND_TRIMFFS
diff --git a/include/configs/ma5d4evk.h b/include/configs/ma5d4evk.h
index a5db11ce122..db58f735bcd 100644
--- a/include/configs/ma5d4evk.h
+++ b/include/configs/ma5d4evk.h
@@ -71,7 +71,6 @@
* LCD
*/
#ifdef CONFIG_LCD
-#define CONFIG_CMD_BMP
#define CONFIG_BMP_16BPP
#define CONFIG_BMP_24BPP
#define CONFIG_BMP_32BPP
diff --git a/include/configs/mcx.h b/include/configs/mcx.h
index 6894c0b4b84..7c93976790c 100644
--- a/include/configs/mcx.h
+++ b/include/configs/mcx.h
@@ -353,7 +353,6 @@
#define CONFIG_SPLASH_SCREEN
#define CONFIG_VIDEO_BMP_RLE8
-#define CONFIG_CMD_BMP
#define CONFIG_VIDEO_OMAP3
#endif /* __CONFIG_H */
diff --git a/include/configs/mpc5121ads.h b/include/configs/mpc5121ads.h
index 1714a9bec8a..8aa9f327c98 100644
--- a/include/configs/mpc5121ads.h
+++ b/include/configs/mpc5121ads.h
@@ -36,7 +36,6 @@
/* video */
#ifdef CONFIG_FSL_DIU_FB
#define CONFIG_SYS_DIU_ADDR (CONFIG_SYS_IMMR + 0x2100)
-#define CONFIG_CMD_BMP
#define CONFIG_VIDEO_LOGO
#define CONFIG_VIDEO_BMP_LOGO
#endif
diff --git a/include/configs/mt_ventoux.h b/include/configs/mt_ventoux.h
index 3172c0e7251..dfebde20ecd 100644
--- a/include/configs/mt_ventoux.h
+++ b/include/configs/mt_ventoux.h
@@ -52,7 +52,6 @@
#define CONFIG_SPLASH_SCREEN
#define CONFIG_VIDEO_BMP_RLE8
-#define CONFIG_CMD_BMP
#define CONFIG_VIDEO_OMAP3 /* DSS Support */
#define CONFIG_EXTRA_ENV_SETTINGS CONFIG_TAM3517_SETTINGS \
diff --git a/include/configs/mx23evk.h b/include/configs/mx23evk.h
index d4854458759..34051728039 100644
--- a/include/configs/mx23evk.h
+++ b/include/configs/mx23evk.h
@@ -42,7 +42,6 @@
#ifdef CONFIG_VIDEO
#define CONFIG_VIDEO_LOGO
#define CONFIG_SPLASH_SCREEN
-#define CONFIG_CMD_BMP
#define CONFIG_BMP_16BPP
#define CONFIG_VIDEO_BMP_RLE8
#define CONFIG_VIDEO_BMP_GZIP
diff --git a/include/configs/mx28evk.h b/include/configs/mx28evk.h
index 33c9e95decb..1d2350e96c0 100644
--- a/include/configs/mx28evk.h
+++ b/include/configs/mx28evk.h
@@ -123,7 +123,6 @@
#ifdef CONFIG_VIDEO
#define CONFIG_VIDEO_LOGO
#define CONFIG_SPLASH_SCREEN
-#define CONFIG_CMD_BMP
#define CONFIG_BMP_16BPP
#define CONFIG_VIDEO_BMP_RLE8
#define CONFIG_VIDEO_BMP_GZIP
diff --git a/include/configs/mx6sxsabresd.h b/include/configs/mx6sxsabresd.h
index e63da436921..dafa946e478 100644
--- a/include/configs/mx6sxsabresd.h
+++ b/include/configs/mx6sxsabresd.h
@@ -204,7 +204,6 @@
#define CONFIG_VIDEO_LOGO
#define CONFIG_SPLASH_SCREEN
#define CONFIG_SPLASH_SCREEN_ALIGN
-#define CONFIG_CMD_BMP
#define CONFIG_BMP_16BPP
#define CONFIG_VIDEO_BMP_RLE8
#define CONFIG_VIDEO_BMP_LOGO
diff --git a/include/configs/mx6ul_14x14_evk.h b/include/configs/mx6ul_14x14_evk.h
index ade0d0a63a8..240d3a226c3 100644
--- a/include/configs/mx6ul_14x14_evk.h
+++ b/include/configs/mx6ul_14x14_evk.h
@@ -222,7 +222,6 @@
#define CONFIG_VIDEO_LOGO
#define CONFIG_SPLASH_SCREEN
#define CONFIG_SPLASH_SCREEN_ALIGN
-#define CONFIG_CMD_BMP
#define CONFIG_BMP_16BPP
#define CONFIG_VIDEO_BMP_RLE8
#define CONFIG_VIDEO_BMP_LOGO
diff --git a/include/configs/mx7dsabresd.h b/include/configs/mx7dsabresd.h
index 9807ace1d90..9c3cec19928 100644
--- a/include/configs/mx7dsabresd.h
+++ b/include/configs/mx7dsabresd.h
@@ -248,7 +248,6 @@
#define CONFIG_VIDEO_LOGO
#define CONFIG_SPLASH_SCREEN
#define CONFIG_SPLASH_SCREEN_ALIGN
-#define CONFIG_CMD_BMP
#define CONFIG_BMP_16BPP
#define CONFIG_VIDEO_BMP_RLE8
#define CONFIG_VIDEO_BMP_LOGO
diff --git a/include/configs/nitrogen6x.h b/include/configs/nitrogen6x.h
index 1714c190adb..cacc1b81f07 100644
--- a/include/configs/nitrogen6x.h
+++ b/include/configs/nitrogen6x.h
@@ -295,8 +295,6 @@
#define CONFIG_ENV_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED
#endif
-#define CONFIG_CMD_BMP
-
#define CONFIG_SYS_ALT_MEMTEST
/*
diff --git a/include/configs/nyan-big.h b/include/configs/nyan-big.h
index a3a2a8cbcce..38bb6f343c6 100644
--- a/include/configs/nyan-big.h
+++ b/include/configs/nyan-big.h
@@ -32,7 +32,6 @@
/* LCD support */
#define CONFIG_SYS_WHITE_ON_BLACK
-#define CONFIG_CMD_BMP
/* Align LCD to 1MB boundary */
#define CONFIG_LCD_ALIGNMENT MMU_SECTION_SIZE
diff --git a/include/configs/opos6uldev.h b/include/configs/opos6uldev.h
index e5ab06777aa..e7bc044acf5 100644
--- a/include/configs/opos6uldev.h
+++ b/include/configs/opos6uldev.h
@@ -68,7 +68,6 @@
#define CONFIG_SPLASH_SOURCE
#define CONFIG_VIDEO_BMP_RLE8
#define CONFIG_VIDEO_BMP_LOGO
-#define CONFIG_CMD_BMP
#define CONFIG_BMP_16BPP
#define CONFIG_VIDEO_MXS
#define MXS_LCDIF_BASE MX6UL_LCDIF1_BASE_ADDR
diff --git a/include/configs/pdm360ng.h b/include/configs/pdm360ng.h
index eca984a9efc..5d529988cd2 100644
--- a/include/configs/pdm360ng.h
+++ b/include/configs/pdm360ng.h
@@ -373,10 +373,6 @@
#undef CONFIG_CMD_FUSE
-#ifdef CONFIG_VIDEO
-#define CONFIG_CMD_BMP
-#endif
-
/*
* Miscellaneous configurable options
*/
diff --git a/include/configs/pxm2.h b/include/configs/pxm2.h
index 4776e97ed6a..c8bc8f35128 100644
--- a/include/configs/pxm2.h
+++ b/include/configs/pxm2.h
@@ -128,7 +128,6 @@
#define CONFIG_VIDEO_LOGO
#define CONFIG_VIDEO_BMP_RLE8
#define CONFIG_VIDEO_BMP_LOGO
-#define CONFIG_CMD_BMP
#define DA8XX_LCD_CNTL_BASE LCD_CNTL_BASE
#define PWM_TICKS 0x1388
#define PWM_DUTY 0x200
diff --git a/include/configs/rut.h b/include/configs/rut.h
index 51021e0e18d..bd819f1aadd 100644
--- a/include/configs/rut.h
+++ b/include/configs/rut.h
@@ -122,7 +122,6 @@
#define CONFIG_VIDEO_LOGO
#define CONFIG_VIDEO_BMP_RLE8
#define CONFIG_VIDEO_BMP_LOGO
-#define CONFIG_CMD_BMP
#define DA8XX_LCD_CNTL_BASE LCD_CNTL_BASE
#define CONFIG_SPI
diff --git a/include/configs/sandbox.h b/include/configs/sandbox.h
index e9e78c4b40b..b2d21cec713 100644
--- a/include/configs/sandbox.h
+++ b/include/configs/sandbox.h
@@ -122,7 +122,6 @@
/* LCD and keyboard require SDL support */
#ifdef CONFIG_SANDBOX_SDL
-#define CONFIG_CMD_BMP
#define LCD_BPP LCD_COLOR16
#define CONFIG_LCD_BMP_RLE8
#define CONFIG_VIDEO_BMP_RLE8
diff --git a/include/configs/sequoia.h b/include/configs/sequoia.h
index 572e6b17667..b0475229c34 100644
--- a/include/configs/sequoia.h
+++ b/include/configs/sequoia.h
@@ -404,7 +404,6 @@
#define CONFIG_SYS_ISA_IO_BASE_ADDRESS VIDEO_IO_OFFSET
#define CONFIG_VIDEO_LOGO
#define CONFIG_SPLASH_SCREEN
-#define CONFIG_CMD_BMP
#endif
#endif /* __CONFIG_H */
diff --git a/include/configs/socrates.h b/include/configs/socrates.h
index 3f9c34b8f6c..a1098abbc03 100644
--- a/include/configs/socrates.h
+++ b/include/configs/socrates.h
@@ -286,7 +286,6 @@
/*
* Command line configuration.
*/
-#define CONFIG_CMD_BMP
#define CONFIG_CMD_DATE
#define CONFIG_CMD_DTT
#undef CONFIG_CMD_EEPROM
diff --git a/include/configs/theadorable.h b/include/configs/theadorable.h
index c132d8fa471..2a671e84ec0 100644
--- a/include/configs/theadorable.h
+++ b/include/configs/theadorable.h
@@ -88,8 +88,6 @@
/* Enable LCD and reserve 512KB from top of memory*/
#define CONFIG_SYS_MEM_TOP_HIDE 0x80000
-#define CONFIG_CMD_BMP
-
/* FPGA programming support */
#define CONFIG_FPGA
#define CONFIG_FPGA_ALTERA
diff --git a/scripts/config_whitelist.txt b/scripts/config_whitelist.txt
index 215868c724e..0e494e6c38d 100644
--- a/scripts/config_whitelist.txt
+++ b/scripts/config_whitelist.txt
@@ -393,7 +393,6 @@ CONFIG_CM922T_XA10
CONFIG_CMDLINE_EDITING
CONFIG_CMDLINE_PS_SUPPORT
CONFIG_CMDLINE_TAG
-CONFIG_CMD_BMP
CONFIG_CMD_BSP
CONFIG_CMD_CBFS
CONFIG_CMD_CHIP_CONFIG
--
GitLab
From 4893e34b00a6a3e44aafe40f86be6c4c10ade536 Mon Sep 17 00:00:00 2001
From: Simon Glass <sjg@chromium.org>
Date: Wed, 26 Apr 2017 22:27:56 -0600
Subject: [PATCH 174/282] Convert CONFIG_CMD_BSP to Kconfig
This converts the following to Kconfig:
CONFIG_CMD_BSP
Signed-off-by: Simon Glass <sjg@chromium.org>
---
README | 2 --
cmd/Kconfig | 10 ++++++++++
configs/CPCI2DP_defconfig | 1 +
configs/CPCI4052_defconfig | 1 +
configs/MIP405T_defconfig | 1 +
configs/MIP405_defconfig | 1 +
configs/MiniFAP_defconfig | 1 +
configs/O3DNT_defconfig | 1 +
configs/PATI_defconfig | 1 +
configs/PIP405_defconfig | 1 +
configs/PMC405DE_defconfig | 1 +
configs/PMC440_defconfig | 1 +
configs/TQM5200S_HIGHBOOT_defconfig | 1 +
configs/TQM5200S_defconfig | 1 +
configs/TQM5200_B_HIGHBOOT_defconfig | 1 +
configs/TQM5200_B_defconfig | 1 +
configs/TQM5200_STK100_defconfig | 1 +
configs/TQM5200_defconfig | 1 +
configs/VOM405_defconfig | 1 +
configs/a3m071_defconfig | 1 +
configs/a4m2k_defconfig | 1 +
configs/apf27_defconfig | 1 +
configs/cam5200_defconfig | 1 +
configs/cam5200_niosflash_defconfig | 1 +
configs/charon_defconfig | 1 +
configs/cm5200_defconfig | 1 +
configs/ethernut5_defconfig | 1 +
configs/fo300_defconfig | 1 +
include/config_cmd_all.h | 1 -
include/configs/CPCI2DP.h | 1 -
include/configs/CPCI4052.h | 1 -
include/configs/MIP405.h | 1 -
include/configs/PATI.h | 1 -
include/configs/PIP405.h | 1 -
include/configs/PMC405DE.h | 1 -
include/configs/PMC440.h | 1 -
include/configs/TQM5200.h | 1 -
include/configs/VOM405.h | 1 -
include/configs/a3m071.h | 1 -
include/configs/apf27.h | 1 -
include/configs/cm5200.h | 1 -
include/configs/ethernut5.h | 1 -
include/configs/o3dnt.h | 1 -
scripts/config_whitelist.txt | 1 -
44 files changed, 36 insertions(+), 18 deletions(-)
diff --git a/README b/README
index 8445d2b63ce..616dd5e348d 100644
--- a/README
+++ b/README
@@ -823,7 +823,6 @@ The following options need to be configured:
CONFIG_CMD_AES AES 128 CBC encrypt/decrypt
CONFIG_CMD_ASKENV * ask for env variable
CONFIG_CMD_BDI bdinfo
- CONFIG_CMD_BSP * Board specific commands
CONFIG_CMD_BOOTD bootd
CONFIG_CMD_BOOTI * ARM64 Linux kernel Image support
CONFIG_CMD_CACHE * icache, dcache
@@ -1579,7 +1578,6 @@ The following options need to be configured:
CONFIG_SYS_DIU_ADDR
CONFIG_VIDEO
- CONFIG_CMD_BMP
CONFIG_CFB_CONSOLE
CONFIG_VIDEO_SW_CURSOR
CONFIG_VGA_AS_SINGLE_DEVICE
diff --git a/cmd/Kconfig b/cmd/Kconfig
index 6488701b08f..049fb2724a1 100644
--- a/cmd/Kconfig
+++ b/cmd/Kconfig
@@ -654,6 +654,16 @@ config CMD_BMP
the image into RAM, then using this command to look at it or display
it.
+config CMD_BSP
+ bool "Enable board-specific commands"
+ help
+ (deprecated: instead, please define a Kconfig option for each command)
+
+ Some boards have board-specific commands which are only enabled
+ during developemnt and need to be turned off for production. This
+ option provides a way to control this. The commands that are enabled
+ vary depending on the board.
+
config CMD_BKOPS_ENABLE
bool "mmc bkops enable"
depends on CMD_MMC
diff --git a/configs/CPCI2DP_defconfig b/configs/CPCI2DP_defconfig
index 1787a8aa480..96a7643ca46 100644
--- a/configs/CPCI2DP_defconfig
+++ b/configs/CPCI2DP_defconfig
@@ -10,6 +10,7 @@ CONFIG_CMD_I2C=y
# CONFIG_CMD_SETEXPR is not set
# CONFIG_CMD_NET is not set
# CONFIG_CMD_NFS is not set
+CONFIG_CMD_BSP=y
# CONFIG_MMC is not set
CONFIG_MTD_NOR_FLASH=y
CONFIG_BAUDRATE=9600
diff --git a/configs/CPCI4052_defconfig b/configs/CPCI4052_defconfig
index 1d1bcf235d3..b4089f7709c 100644
--- a/configs/CPCI4052_defconfig
+++ b/configs/CPCI4052_defconfig
@@ -15,6 +15,7 @@ CONFIG_CMD_I2C=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
+CONFIG_CMD_BSP=y
CONFIG_CMD_FAT=y
CONFIG_MAC_PARTITION=y
# CONFIG_MMC is not set
diff --git a/configs/MIP405T_defconfig b/configs/MIP405T_defconfig
index d3742c76593..d9e8b805dd2 100644
--- a/configs/MIP405T_defconfig
+++ b/configs/MIP405T_defconfig
@@ -16,6 +16,7 @@ CONFIG_CMD_I2C=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
+CONFIG_CMD_BSP=y
CONFIG_CMD_CACHE=y
CONFIG_CMD_FAT=y
CONFIG_MAC_PARTITION=y
diff --git a/configs/MIP405_defconfig b/configs/MIP405_defconfig
index f828b58783b..1b6d8ae26e6 100644
--- a/configs/MIP405_defconfig
+++ b/configs/MIP405_defconfig
@@ -17,6 +17,7 @@ CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
+CONFIG_CMD_BSP=y
CONFIG_CMD_CACHE=y
CONFIG_CMD_FAT=y
CONFIG_MAC_PARTITION=y
diff --git a/configs/MiniFAP_defconfig b/configs/MiniFAP_defconfig
index b1bc697cc6f..8c186f73121 100644
--- a/configs/MiniFAP_defconfig
+++ b/configs/MiniFAP_defconfig
@@ -18,6 +18,7 @@ CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_CMD_SNTP=y
CONFIG_CMD_BMP=y
+CONFIG_CMD_BSP=y
CONFIG_CMD_EXT2=y
CONFIG_CMD_FAT=y
CONFIG_MAC_PARTITION=y
diff --git a/configs/O3DNT_defconfig b/configs/O3DNT_defconfig
index 49e1fbb45e7..5ce41408593 100644
--- a/configs/O3DNT_defconfig
+++ b/configs/O3DNT_defconfig
@@ -9,6 +9,7 @@ CONFIG_CMD_I2C=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
+CONFIG_CMD_BSP=y
CONFIG_CMD_FAT=y
CONFIG_MAC_PARTITION=y
CONFIG_ISO_PARTITION=y
diff --git a/configs/PATI_defconfig b/configs/PATI_defconfig
index d8262ebf0b1..fbf3227fc06 100644
--- a/configs/PATI_defconfig
+++ b/configs/PATI_defconfig
@@ -19,6 +19,7 @@ CONFIG_SYS_PROMPT="pati=> "
# CONFIG_CMD_SETEXPR is not set
# CONFIG_CMD_NET is not set
# CONFIG_CMD_NFS is not set
+CONFIG_CMD_BSP=y
# CONFIG_MMC is not set
CONFIG_MTD_NOR_FLASH=y
# CONFIG_PCI is not set
diff --git a/configs/PIP405_defconfig b/configs/PIP405_defconfig
index 1d02b9d07df..4fe31f1e304 100644
--- a/configs/PIP405_defconfig
+++ b/configs/PIP405_defconfig
@@ -17,6 +17,7 @@ CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
+CONFIG_CMD_BSP=y
CONFIG_CMD_CACHE=y
CONFIG_CMD_FAT=y
CONFIG_MAC_PARTITION=y
diff --git a/configs/PMC405DE_defconfig b/configs/PMC405DE_defconfig
index 90040c73db9..7ac77d915b7 100644
--- a/configs/PMC405DE_defconfig
+++ b/configs/PMC405DE_defconfig
@@ -15,6 +15,7 @@ CONFIG_CMD_I2C=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
+CONFIG_CMD_BSP=y
# CONFIG_MMC is not set
CONFIG_MTD_NOR_FLASH=y
CONFIG_SYS_NS16550=y
diff --git a/configs/PMC440_defconfig b/configs/PMC440_defconfig
index ca20fc0ea9f..0cc41314412 100644
--- a/configs/PMC440_defconfig
+++ b/configs/PMC440_defconfig
@@ -17,6 +17,7 @@ CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
+CONFIG_CMD_BSP=y
CONFIG_CMD_FAT=y
CONFIG_MAC_PARTITION=y
CONFIG_ISO_PARTITION=y
diff --git a/configs/TQM5200S_HIGHBOOT_defconfig b/configs/TQM5200S_HIGHBOOT_defconfig
index 0c4e2923dcf..ea022e54d39 100644
--- a/configs/TQM5200S_HIGHBOOT_defconfig
+++ b/configs/TQM5200S_HIGHBOOT_defconfig
@@ -14,6 +14,7 @@ CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_CMD_SNTP=y
+CONFIG_CMD_BSP=y
CONFIG_CMD_EXT2=y
CONFIG_CMD_FAT=y
CONFIG_MAC_PARTITION=y
diff --git a/configs/TQM5200S_defconfig b/configs/TQM5200S_defconfig
index 9ef02e3ddad..8cddc8f9326 100644
--- a/configs/TQM5200S_defconfig
+++ b/configs/TQM5200S_defconfig
@@ -14,6 +14,7 @@ CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_CMD_SNTP=y
+CONFIG_CMD_BSP=y
CONFIG_CMD_EXT2=y
CONFIG_CMD_FAT=y
CONFIG_MAC_PARTITION=y
diff --git a/configs/TQM5200_B_HIGHBOOT_defconfig b/configs/TQM5200_B_HIGHBOOT_defconfig
index d543d17cfc4..b0c1252e62c 100644
--- a/configs/TQM5200_B_HIGHBOOT_defconfig
+++ b/configs/TQM5200_B_HIGHBOOT_defconfig
@@ -18,6 +18,7 @@ CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_CMD_SNTP=y
CONFIG_CMD_BMP=y
+CONFIG_CMD_BSP=y
CONFIG_CMD_EXT2=y
CONFIG_CMD_FAT=y
CONFIG_MAC_PARTITION=y
diff --git a/configs/TQM5200_B_defconfig b/configs/TQM5200_B_defconfig
index 1a222f3d18a..71fb84049cf 100644
--- a/configs/TQM5200_B_defconfig
+++ b/configs/TQM5200_B_defconfig
@@ -18,6 +18,7 @@ CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_CMD_SNTP=y
CONFIG_CMD_BMP=y
+CONFIG_CMD_BSP=y
CONFIG_CMD_EXT2=y
CONFIG_CMD_FAT=y
CONFIG_MAC_PARTITION=y
diff --git a/configs/TQM5200_STK100_defconfig b/configs/TQM5200_STK100_defconfig
index 5f0283dc8e0..b2c14089d6d 100644
--- a/configs/TQM5200_STK100_defconfig
+++ b/configs/TQM5200_STK100_defconfig
@@ -18,6 +18,7 @@ CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_CMD_SNTP=y
CONFIG_CMD_BMP=y
+CONFIG_CMD_BSP=y
CONFIG_CMD_EXT2=y
CONFIG_CMD_FAT=y
CONFIG_MAC_PARTITION=y
diff --git a/configs/TQM5200_defconfig b/configs/TQM5200_defconfig
index f1f1e8d167f..2cc80573a93 100644
--- a/configs/TQM5200_defconfig
+++ b/configs/TQM5200_defconfig
@@ -17,6 +17,7 @@ CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_CMD_SNTP=y
CONFIG_CMD_BMP=y
+CONFIG_CMD_BSP=y
CONFIG_CMD_EXT2=y
CONFIG_CMD_FAT=y
CONFIG_MAC_PARTITION=y
diff --git a/configs/VOM405_defconfig b/configs/VOM405_defconfig
index d0777ca9fba..23d33a649f3 100644
--- a/configs/VOM405_defconfig
+++ b/configs/VOM405_defconfig
@@ -11,6 +11,7 @@ CONFIG_CMD_I2C=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
+CONFIG_CMD_BSP=y
# CONFIG_MMC is not set
CONFIG_MTD_NOR_FLASH=y
# CONFIG_PCI is not set
diff --git a/configs/a3m071_defconfig b/configs/a3m071_defconfig
index d485a0cd933..8d636e03d20 100644
--- a/configs/a3m071_defconfig
+++ b/configs/a3m071_defconfig
@@ -21,6 +21,7 @@ CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_CMD_LINK_LOCAL=y
+CONFIG_CMD_BSP=y
CONFIG_CMD_CACHE=y
CONFIG_CMD_UBI=y
# CONFIG_MMC is not set
diff --git a/configs/a4m2k_defconfig b/configs/a4m2k_defconfig
index 7b99bb55496..c3ee19945cf 100644
--- a/configs/a4m2k_defconfig
+++ b/configs/a4m2k_defconfig
@@ -22,6 +22,7 @@ CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_CMD_LINK_LOCAL=y
+CONFIG_CMD_BSP=y
CONFIG_CMD_CACHE=y
CONFIG_CMD_UBI=y
# CONFIG_MMC is not set
diff --git a/configs/apf27_defconfig b/configs/apf27_defconfig
index 071ff7f8a02..e22dc0743bd 100644
--- a/configs/apf27_defconfig
+++ b/configs/apf27_defconfig
@@ -18,6 +18,7 @@ CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_CMD_DNS=y
+CONFIG_CMD_BSP=y
CONFIG_CMD_CACHE=y
CONFIG_CMD_EXT2=y
CONFIG_CMD_FAT=y
diff --git a/configs/cam5200_defconfig b/configs/cam5200_defconfig
index 725a3b09d30..2c8449dfd67 100644
--- a/configs/cam5200_defconfig
+++ b/configs/cam5200_defconfig
@@ -13,6 +13,7 @@ CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_CMD_SNTP=y
+CONFIG_CMD_BSP=y
CONFIG_MAC_PARTITION=y
CONFIG_DOS_PARTITION=y
CONFIG_ISO_PARTITION=y
diff --git a/configs/cam5200_niosflash_defconfig b/configs/cam5200_niosflash_defconfig
index 7bd95fae689..730d7506044 100644
--- a/configs/cam5200_niosflash_defconfig
+++ b/configs/cam5200_niosflash_defconfig
@@ -13,6 +13,7 @@ CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_CMD_SNTP=y
+CONFIG_CMD_BSP=y
CONFIG_MAC_PARTITION=y
CONFIG_DOS_PARTITION=y
CONFIG_ISO_PARTITION=y
diff --git a/configs/charon_defconfig b/configs/charon_defconfig
index 3dd15882e53..4e292349761 100644
--- a/configs/charon_defconfig
+++ b/configs/charon_defconfig
@@ -17,6 +17,7 @@ CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_CMD_SNTP=y
CONFIG_CMD_BMP=y
+CONFIG_CMD_BSP=y
CONFIG_CMD_EXT2=y
CONFIG_CMD_FAT=y
CONFIG_MAC_PARTITION=y
diff --git a/configs/cm5200_defconfig b/configs/cm5200_defconfig
index 8b12a3aec23..5f691de2d32 100644
--- a/configs/cm5200_defconfig
+++ b/configs/cm5200_defconfig
@@ -13,6 +13,7 @@ CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_CMD_SNTP=y
+CONFIG_CMD_BSP=y
CONFIG_CMD_FAT=y
CONFIG_MAC_PARTITION=y
CONFIG_ISO_PARTITION=y
diff --git a/configs/ethernut5_defconfig b/configs/ethernut5_defconfig
index 1255b4f8085..4d0be51f7b5 100644
--- a/configs/ethernut5_defconfig
+++ b/configs/ethernut5_defconfig
@@ -23,6 +23,7 @@ CONFIG_CMD_PING=y
CONFIG_CMD_CDP=y
CONFIG_CMD_SNTP=y
CONFIG_CMD_DNS=y
+CONFIG_CMD_BSP=y
CONFIG_CMD_CACHE=y
CONFIG_CMD_EXT2=y
CONFIG_CMD_FAT=y
diff --git a/configs/fo300_defconfig b/configs/fo300_defconfig
index 7a774aa58b9..d0728eb6515 100644
--- a/configs/fo300_defconfig
+++ b/configs/fo300_defconfig
@@ -20,6 +20,7 @@ CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_CMD_SNTP=y
CONFIG_CMD_BMP=y
+CONFIG_CMD_BSP=y
CONFIG_CMD_EXT2=y
CONFIG_CMD_FAT=y
CONFIG_MAC_PARTITION=y
diff --git a/include/config_cmd_all.h b/include/config_cmd_all.h
index 25b030f4a36..38c96001421 100644
--- a/include/config_cmd_all.h
+++ b/include/config_cmd_all.h
@@ -13,7 +13,6 @@
* Alphabetical list of all possible commands.
*/
-#define CONFIG_CMD_BSP /* Board Specific functions */
#define CONFIG_CMD_CLK /* Clock support */
#define CONFIG_CMD_DATE /* support for RTC, date/time...*/
#define CONFIG_CMD_DIAG /* Diagnostics */
diff --git a/include/configs/CPCI2DP.h b/include/configs/CPCI2DP.h
index bc5fa0394c2..c3b2353f5f1 100644
--- a/include/configs/CPCI2DP.h
+++ b/include/configs/CPCI2DP.h
@@ -47,7 +47,6 @@
*/
#define CONFIG_CMD_PCI
#define CONFIG_CMD_IRQ
-#define CONFIG_CMD_BSP
#define CONFIG_CMD_EEPROM
#undef CONFIG_WATCHDOG /* watchdog disabled */
diff --git a/include/configs/CPCI4052.h b/include/configs/CPCI4052.h
index feabc5fc096..d869a5fa611 100644
--- a/include/configs/CPCI4052.h
+++ b/include/configs/CPCI4052.h
@@ -64,7 +64,6 @@
#define CONFIG_CMD_IRQ
#define CONFIG_CMD_IDE
#define CONFIG_CMD_DATE
-#define CONFIG_CMD_BSP
#define CONFIG_CMD_EEPROM
#define CONFIG_SUPPORT_VFAT
diff --git a/include/configs/MIP405.h b/include/configs/MIP405.h
index d362197ed51..bcdba714a54 100644
--- a/include/configs/MIP405.h
+++ b/include/configs/MIP405.h
@@ -54,7 +54,6 @@
#define CONFIG_CMD_PCI
#define CONFIG_CMD_REGINFO
#define CONFIG_CMD_SAVES
-#define CONFIG_CMD_BSP
/**************************************************************
* I2C Stuff:
diff --git a/include/configs/PATI.h b/include/configs/PATI.h
index 2c048abba65..e53db2485b8 100644
--- a/include/configs/PATI.h
+++ b/include/configs/PATI.h
@@ -38,7 +38,6 @@
*/
#define CONFIG_CMD_REGINFO
#define CONFIG_CMD_REGINFO
-#define CONFIG_CMD_BSP
#define CONFIG_CMD_EEPROM
#define CONFIG_CMD_IRQ
diff --git a/include/configs/PIP405.h b/include/configs/PIP405.h
index b00cf8eeb21..321059b7b2f 100644
--- a/include/configs/PIP405.h
+++ b/include/configs/PIP405.h
@@ -47,7 +47,6 @@
#define CONFIG_CMD_DATE
#define CONFIG_CMD_SDRAM
#define CONFIG_CMD_SAVES
-#define CONFIG_CMD_BSP
/**************************************************************
* I2C Stuff:
diff --git a/include/configs/PMC405DE.h b/include/configs/PMC405DE.h
index 5c3f56682cf..a7d7bbf10b1 100644
--- a/include/configs/PMC405DE.h
+++ b/include/configs/PMC405DE.h
@@ -48,7 +48,6 @@
/*
* Command line configuration.
*/
-#define CONFIG_CMD_BSP
#define CONFIG_CMD_CHIP_CONFIG
#define CONFIG_CMD_DATE
#define CONFIG_CMD_EEPROM
diff --git a/include/configs/PMC440.h b/include/configs/PMC440.h
index 1b059d4f58b..31e95c1b65b 100644
--- a/include/configs/PMC440.h
+++ b/include/configs/PMC440.h
@@ -258,7 +258,6 @@
/* Partitions */
-#define CONFIG_CMD_BSP
#define CONFIG_CMD_DATE
#define CONFIG_CMD_DTT
#define CONFIG_CMD_EEPROM
diff --git a/include/configs/TQM5200.h b/include/configs/TQM5200.h
index 0be6820ef90..0fdc62ec149 100644
--- a/include/configs/TQM5200.h
+++ b/include/configs/TQM5200.h
@@ -148,7 +148,6 @@
#define CONFIG_CMD_EEPROM
#define CONFIG_CMD_JFFS2
#define CONFIG_CMD_REGINFO
-#define CONFIG_CMD_BSP
#ifdef CONFIG_PCI
#define CONFIG_CMD_PCI
diff --git a/include/configs/VOM405.h b/include/configs/VOM405.h
index 7e421155404..fbadcd17f1c 100644
--- a/include/configs/VOM405.h
+++ b/include/configs/VOM405.h
@@ -53,7 +53,6 @@
/*
* Command line configuration.
*/
-#define CONFIG_CMD_BSP
#define CONFIG_CMD_IRQ
#define CONFIG_CMD_EEPROM
diff --git a/include/configs/a3m071.h b/include/configs/a3m071.h
index 60158f96d4a..07f74db0899 100644
--- a/include/configs/a3m071.h
+++ b/include/configs/a3m071.h
@@ -42,7 +42,6 @@
/*
* Command line configuration.
*/
-#define CONFIG_CMD_BSP
#define CONFIG_CMD_REGINFO
#define CONFIG_BOOTP_SEND_HOSTNAME
#define CONFIG_BOOTP_SERVERIP
diff --git a/include/configs/apf27.h b/include/configs/apf27.h
index 82898bfa136..15149331378 100644
--- a/include/configs/apf27.h
+++ b/include/configs/apf27.h
@@ -54,7 +54,6 @@
/*
* U-Boot Commands
*/
-#define CONFIG_CMD_BSP /* Board Specific functions */
#define CONFIG_CMD_DATE
#define CONFIG_CMD_EEPROM
#define CONFIG_CMD_IMX_FUSE /* imx iim fuse */
diff --git a/include/configs/cm5200.h b/include/configs/cm5200.h
index 51a5f6dce7a..89a2d229da5 100644
--- a/include/configs/cm5200.h
+++ b/include/configs/cm5200.h
@@ -21,7 +21,6 @@
/*
* Supported commands
*/
-#define CONFIG_CMD_BSP
#define CONFIG_CMD_DATE
#define CONFIG_CMD_DIAG
#define CONFIG_CMD_JFFS2
diff --git a/include/configs/ethernut5.h b/include/configs/ethernut5.h
index b83eb451116..2ae39c04883 100644
--- a/include/configs/ethernut5.h
+++ b/include/configs/ethernut5.h
@@ -89,7 +89,6 @@
#define CONFIG_CMD_NAND
#ifndef MINIMAL_LOADER
-#define CONFIG_CMD_BSP
#define CONFIG_CMD_DATE
#define CONFIG_CMD_REISER
#define CONFIG_CMD_SAVES
diff --git a/include/configs/o3dnt.h b/include/configs/o3dnt.h
index 77907507b30..f0fcedaffc3 100644
--- a/include/configs/o3dnt.h
+++ b/include/configs/o3dnt.h
@@ -26,7 +26,6 @@
#include "o2dnt-common.h"
/* Additional commands */
-#define CONFIG_CMD_BSP
#define CONFIG_CMD_REGINFO
/*
diff --git a/scripts/config_whitelist.txt b/scripts/config_whitelist.txt
index 0e494e6c38d..df115d1106c 100644
--- a/scripts/config_whitelist.txt
+++ b/scripts/config_whitelist.txt
@@ -393,7 +393,6 @@ CONFIG_CM922T_XA10
CONFIG_CMDLINE_EDITING
CONFIG_CMDLINE_PS_SUPPORT
CONFIG_CMDLINE_TAG
-CONFIG_CMD_BSP
CONFIG_CMD_CBFS
CONFIG_CMD_CHIP_CONFIG
CONFIG_CMD_CLEAR
--
GitLab
From 983b103f1cb1d2d6da039dbdcf1a85d3d2cc0cf4 Mon Sep 17 00:00:00 2001
From: Simon Glass <sjg@chromium.org>
Date: Wed, 26 Apr 2017 22:27:57 -0600
Subject: [PATCH 175/282] Convert CONFIG_SYS_WHITE_ON_BLACK to Kconfig
This converts the following to Kconfig:
CONFIG_SYS_WHITE_ON_BLACK
Signed-off-by: Simon Glass <sjg@chromium.org>
[trini: Make this default y on various SoCs]
Signed-off-by: Tom Rini <trini@konsulko.com>
---
README | 3 ---
configs/brppt1_mmc_defconfig | 1 +
configs/brppt1_nand_defconfig | 1 +
configs/brppt1_spi_defconfig | 1 +
configs/brxre1_defconfig | 1 +
configs/rpi_2_defconfig | 1 +
configs/rpi_3_32b_defconfig | 1 +
configs/rpi_3_defconfig | 1 +
configs/rpi_defconfig | 1 +
drivers/video/Kconfig | 9 +++++++++
include/configs/at91sam9261ek.h | 1 -
include/configs/at91sam9263ek.h | 1 -
include/configs/at91sam9m10g45ek.h | 1 -
include/configs/at91sam9n12ek.h | 1 -
include/configs/at91sam9rlek.h | 1 -
include/configs/at91sam9x5ek.h | 1 -
include/configs/brppt1.h | 1 -
include/configs/brxre1.h | 1 -
include/configs/colibri_pxa270.h | 1 -
include/configs/colibri_t20.h | 1 -
include/configs/evb_rk3288.h | 2 --
include/configs/evb_rk3328.h | 1 -
include/configs/evb_rk3399.h | 2 --
include/configs/exynos5-dt-common.h | 1 -
include/configs/fennec_rk3288.h | 2 --
include/configs/firefly-rk3288.h | 2 --
include/configs/harmony.h | 5 -----
include/configs/medcom-wide.h | 5 -----
include/configs/miqi_rk3288.h | 2 --
include/configs/nyan-big.h | 3 ---
include/configs/paz00.h | 5 -----
include/configs/picosam9g45.h | 1 -
include/configs/pm9261.h | 1 -
include/configs/pm9263.h | 1 -
include/configs/popmetal_rk3288.h | 2 --
include/configs/puma_rk3399.h | 2 --
include/configs/rock2.h | 2 --
include/configs/rpi.h | 1 -
include/configs/s5pc210_universal.h | 1 -
include/configs/sama5d2_xplained.h | 1 -
include/configs/sama5d3xek.h | 1 -
include/configs/sama5d4_xplained.h | 1 -
include/configs/sama5d4ek.h | 1 -
include/configs/seaboard.h | 7 -------
include/configs/tec.h | 5 -----
include/configs/tinker_rk3288.h | 2 --
include/configs/trats.h | 1 -
include/configs/trats2.h | 1 -
include/configs/ventana.h | 7 -------
include/configs/veyron.h | 2 --
include/configs/x86-chromebook.h | 2 --
scripts/config_whitelist.txt | 1 -
52 files changed, 17 insertions(+), 86 deletions(-)
diff --git a/README b/README
index 616dd5e348d..3afffbde1c5 100644
--- a/README
+++ b/README
@@ -1638,9 +1638,6 @@ The following options need to be configured:
320x240. Black & white.
- Normally display is black on white background; define
- CONFIG_SYS_WHITE_ON_BLACK to get it inverted.
-
CONFIG_LCD_ALIGNMENT
Normally the LCD is page-aligned (typically 4KB). If this is
diff --git a/configs/brppt1_mmc_defconfig b/configs/brppt1_mmc_defconfig
index 621d7dbb433..7d92c139402 100644
--- a/configs/brppt1_mmc_defconfig
+++ b/configs/brppt1_mmc_defconfig
@@ -55,5 +55,6 @@ CONFIG_SYS_NS16550=y
CONFIG_USB=y
CONFIG_USB_MUSB_HOST=y
CONFIG_USB_STORAGE=y
+CONFIG_SYS_WHITE_ON_BLACK=y
CONFIG_LCD=y
CONFIG_OF_LIBFDT=y
diff --git a/configs/brppt1_nand_defconfig b/configs/brppt1_nand_defconfig
index a974e680a9e..9abe61760e1 100644
--- a/configs/brppt1_nand_defconfig
+++ b/configs/brppt1_nand_defconfig
@@ -55,5 +55,6 @@ CONFIG_SYS_NS16550=y
CONFIG_USB=y
CONFIG_USB_MUSB_HOST=y
CONFIG_USB_STORAGE=y
+CONFIG_SYS_WHITE_ON_BLACK=y
CONFIG_LCD=y
CONFIG_OF_LIBFDT=y
diff --git a/configs/brppt1_spi_defconfig b/configs/brppt1_spi_defconfig
index d1a786a90ff..79bb9057bfc 100644
--- a/configs/brppt1_spi_defconfig
+++ b/configs/brppt1_spi_defconfig
@@ -63,5 +63,6 @@ CONFIG_SYS_NS16550=y
CONFIG_USB=y
CONFIG_USB_MUSB_HOST=y
CONFIG_USB_STORAGE=y
+CONFIG_SYS_WHITE_ON_BLACK=y
CONFIG_LCD=y
CONFIG_OF_LIBFDT=y
diff --git a/configs/brxre1_defconfig b/configs/brxre1_defconfig
index 9616d9bc2c0..940793b5a67 100644
--- a/configs/brxre1_defconfig
+++ b/configs/brxre1_defconfig
@@ -55,6 +55,7 @@ CONFIG_SYS_NS16550=y
CONFIG_USB=y
CONFIG_USB_MUSB_HOST=y
CONFIG_USB_STORAGE=y
+CONFIG_SYS_WHITE_ON_BLACK=y
CONFIG_LCD=y
CONFIG_OF_LIBFDT=y
# CONFIG_EFI_LOADER is not set
diff --git a/configs/rpi_2_defconfig b/configs/rpi_2_defconfig
index 9d669c92e42..9875f5d2950 100644
--- a/configs/rpi_2_defconfig
+++ b/configs/rpi_2_defconfig
@@ -19,6 +19,7 @@ CONFIG_MMC_SDHCI_BCM2835=y
CONFIG_USB=y
CONFIG_USB_STORAGE=y
CONFIG_USB_KEYBOARD=y
+CONFIG_SYS_WHITE_ON_BLACK=y
CONFIG_CONSOLE_SCROLL_LINES=10
CONFIG_LCD=y
CONFIG_PHYS_TO_BUS=y
diff --git a/configs/rpi_3_32b_defconfig b/configs/rpi_3_32b_defconfig
index d0f7beaa0b3..e4a81b882d1 100644
--- a/configs/rpi_3_32b_defconfig
+++ b/configs/rpi_3_32b_defconfig
@@ -21,6 +21,7 @@ CONFIG_MMC_SDHCI_BCM2835=y
CONFIG_USB=y
CONFIG_USB_STORAGE=y
CONFIG_USB_KEYBOARD=y
+CONFIG_SYS_WHITE_ON_BLACK=y
CONFIG_CONSOLE_SCROLL_LINES=10
CONFIG_LCD=y
CONFIG_PHYS_TO_BUS=y
diff --git a/configs/rpi_3_defconfig b/configs/rpi_3_defconfig
index ce28c312832..e0be6c76f8f 100644
--- a/configs/rpi_3_defconfig
+++ b/configs/rpi_3_defconfig
@@ -21,6 +21,7 @@ CONFIG_MMC_SDHCI_BCM2835=y
CONFIG_USB=y
CONFIG_USB_STORAGE=y
CONFIG_USB_KEYBOARD=y
+CONFIG_SYS_WHITE_ON_BLACK=y
CONFIG_CONSOLE_SCROLL_LINES=10
CONFIG_LCD=y
CONFIG_PHYS_TO_BUS=y
diff --git a/configs/rpi_defconfig b/configs/rpi_defconfig
index 4a90ca83486..a07d69800ce 100644
--- a/configs/rpi_defconfig
+++ b/configs/rpi_defconfig
@@ -19,6 +19,7 @@ CONFIG_MMC_SDHCI_BCM2835=y
CONFIG_USB=y
CONFIG_USB_STORAGE=y
CONFIG_USB_KEYBOARD=y
+CONFIG_SYS_WHITE_ON_BLACK=y
CONFIG_CONSOLE_SCROLL_LINES=10
CONFIG_LCD=y
CONFIG_PHYS_TO_BUS=y
diff --git a/drivers/video/Kconfig b/drivers/video/Kconfig
index 19e97452bda..e29c3fcfc6d 100644
--- a/drivers/video/Kconfig
+++ b/drivers/video/Kconfig
@@ -89,6 +89,15 @@ config CONSOLE_TRUETYPE_SIZE
method to select the display's physical size, which would allow
U-Boot to calculate the correct font size.
+config SYS_WHITE_ON_BLACK
+ bool "Display console as white on a black background"
+ default y if ARCH_AT91 || ARCH_EXYNOS || ARCH_ROCKCHIP || TEGRA || X86
+ help
+ Normally the display is black on a white background, Enable this
+ option to invert this, i.e. white on a black background. This can be
+ better in low-light situations or to reduce eye strain in some
+ cases.
+
source "drivers/video/fonts/Kconfig"
config VIDCONSOLE_AS_LCD
diff --git a/include/configs/at91sam9261ek.h b/include/configs/at91sam9261ek.h
index 0afc92c91de..505f945bd31 100644
--- a/include/configs/at91sam9261ek.h
+++ b/include/configs/at91sam9261ek.h
@@ -51,7 +51,6 @@
#undef LCD_TEST_PATTERN
#define CONFIG_LCD_INFO
#define CONFIG_LCD_INFO_BELOW_LOGO
-#define CONFIG_SYS_WHITE_ON_BLACK
#define CONFIG_ATMEL_LCD
#ifdef CONFIG_AT91SAM9261EK
#define CONFIG_ATMEL_LCD_BGR555
diff --git a/include/configs/at91sam9263ek.h b/include/configs/at91sam9263ek.h
index 51941312437..663c193a5b0 100644
--- a/include/configs/at91sam9263ek.h
+++ b/include/configs/at91sam9263ek.h
@@ -59,7 +59,6 @@
#undef LCD_TEST_PATTERN
#define CONFIG_LCD_INFO 1
#define CONFIG_LCD_INFO_BELOW_LOGO 1
-#define CONFIG_SYS_WHITE_ON_BLACK 1
#define CONFIG_ATMEL_LCD 1
#define CONFIG_ATMEL_LCD_BGR555 1
diff --git a/include/configs/at91sam9m10g45ek.h b/include/configs/at91sam9m10g45ek.h
index 0708d536623..a62b70b4596 100644
--- a/include/configs/at91sam9m10g45ek.h
+++ b/include/configs/at91sam9m10g45ek.h
@@ -44,7 +44,6 @@
#undef LCD_TEST_PATTERN
#define CONFIG_LCD_INFO
#define CONFIG_LCD_INFO_BELOW_LOGO
-#define CONFIG_SYS_WHITE_ON_BLACK
#define CONFIG_ATMEL_LCD
#define CONFIG_ATMEL_LCD_RGB565
/* board specific(not enough SRAM) */
diff --git a/include/configs/at91sam9n12ek.h b/include/configs/at91sam9n12ek.h
index 872d471d055..dd49f4ebd3a 100644
--- a/include/configs/at91sam9n12ek.h
+++ b/include/configs/at91sam9n12ek.h
@@ -42,7 +42,6 @@
#define CONFIG_LCD_LOGO
#define CONFIG_LCD_INFO
#define CONFIG_LCD_INFO_BELOW_LOGO
-#define CONFIG_SYS_WHITE_ON_BLACK
#define CONFIG_ATMEL_HLCD
#define CONFIG_ATMEL_LCD_RGB565
diff --git a/include/configs/at91sam9rlek.h b/include/configs/at91sam9rlek.h
index 8752f1f3b61..31a7cb18d86 100644
--- a/include/configs/at91sam9rlek.h
+++ b/include/configs/at91sam9rlek.h
@@ -47,7 +47,6 @@
#undef LCD_TEST_PATTERN
#define CONFIG_LCD_INFO 1
#define CONFIG_LCD_INFO_BELOW_LOGO 1
-#define CONFIG_SYS_WHITE_ON_BLACK 1
#define CONFIG_ATMEL_LCD 1
#define CONFIG_ATMEL_LCD_RGB565 1
/* Let board_init_f handle the framebuffer allocation */
diff --git a/include/configs/at91sam9x5ek.h b/include/configs/at91sam9x5ek.h
index c81003e3116..ff0a78ba437 100644
--- a/include/configs/at91sam9x5ek.h
+++ b/include/configs/at91sam9x5ek.h
@@ -39,7 +39,6 @@
#define CONFIG_LCD_LOGO
#define CONFIG_LCD_INFO
#define CONFIG_LCD_INFO_BELOW_LOGO
-#define CONFIG_SYS_WHITE_ON_BLACK
#define CONFIG_ATMEL_HLCD
#define CONFIG_ATMEL_LCD_RGB565
diff --git a/include/configs/brppt1.h b/include/configs/brppt1.h
index 68e9efef1c2..0c1a54d7ba2 100644
--- a/include/configs/brppt1.h
+++ b/include/configs/brppt1.h
@@ -18,7 +18,6 @@
#define CONFIG_AM335X_LCD
#define CONFIG_LCD_ROTATION
#define CONFIG_LCD_DT_SIMPLEFB
-#define CONFIG_SYS_WHITE_ON_BLACK
#define LCD_BPP LCD_COLOR32
#define CONFIG_HW_WATCHDOG
diff --git a/include/configs/brxre1.h b/include/configs/brxre1.h
index 49aea8f1962..49f223a32aa 100644
--- a/include/configs/brxre1.h
+++ b/include/configs/brxre1.h
@@ -17,7 +17,6 @@
/* ------------------------------------------------------------------------- */
#define CONFIG_AM335X_LCD
#define CONFIG_LCD_NOSTDOUT
-#define CONFIG_SYS_WHITE_ON_BLACK
#define LCD_BPP LCD_COLOR32
#define CONFIG_VIDEO_BMP_GZIP
diff --git a/include/configs/colibri_pxa270.h b/include/configs/colibri_pxa270.h
index 0dbd996920b..62a404a7b1d 100644
--- a/include/configs/colibri_pxa270.h
+++ b/include/configs/colibri_pxa270.h
@@ -65,7 +65,6 @@
#ifdef CONFIG_LCD
#define CONFIG_PXA_LCD
#define CONFIG_PXA_VGA
-#define CONFIG_SYS_WHITE_ON_BLACK
#define CONFIG_LCD_LOGO
#endif
diff --git a/include/configs/colibri_t20.h b/include/configs/colibri_t20.h
index 743f92c9627..023e75cf33d 100644
--- a/include/configs/colibri_t20.h
+++ b/include/configs/colibri_t20.h
@@ -39,7 +39,6 @@
#define CONFIG_TFTP_TSIZE
/* LCD support */
-#define CONFIG_SYS_WHITE_ON_BLACK
#define CONFIG_LCD_LOGO
/* NAND support */
diff --git a/include/configs/evb_rk3288.h b/include/configs/evb_rk3288.h
index bbd54a1160f..0dc3532f330 100644
--- a/include/configs/evb_rk3288.h
+++ b/include/configs/evb_rk3288.h
@@ -13,6 +13,4 @@
#define CONFIG_ENV_IS_IN_MMC
#define CONFIG_SYS_MMC_ENV_DEV 0
-#define CONFIG_SYS_WHITE_ON_BLACK
-
#endif
diff --git a/include/configs/evb_rk3328.h b/include/configs/evb_rk3328.h
index 3a39a1bffe5..fe3ec8c1778 100644
--- a/include/configs/evb_rk3328.h
+++ b/include/configs/evb_rk3328.h
@@ -20,7 +20,6 @@
#define SDRAM_BANK_SIZE (2UL << 30)
-#define CONFIG_SYS_WHITE_ON_BLACK
#define CONFIG_CONSOLE_SCROLL_LINES 10
#endif
diff --git a/include/configs/evb_rk3399.h b/include/configs/evb_rk3399.h
index 8fdefa29c72..b9fd5b417a7 100644
--- a/include/configs/evb_rk3399.h
+++ b/include/configs/evb_rk3399.h
@@ -20,6 +20,4 @@
#define SDRAM_BANK_SIZE (2UL << 30)
-#define CONFIG_SYS_WHITE_ON_BLACK
-
#endif
diff --git a/include/configs/exynos5-dt-common.h b/include/configs/exynos5-dt-common.h
index 7cb3a296b57..1b94d07f674 100644
--- a/include/configs/exynos5-dt-common.h
+++ b/include/configs/exynos5-dt-common.h
@@ -31,7 +31,6 @@
#define CONFIG_EXYNOS_FB
#define CONFIG_EXYNOS_DP
#define LCD_BPP LCD_COLOR16
-#define CONFIG_SYS_WHITE_ON_BLACK
#endif
/* Enable keyboard */
diff --git a/include/configs/fennec_rk3288.h b/include/configs/fennec_rk3288.h
index bbd54a1160f..0dc3532f330 100644
--- a/include/configs/fennec_rk3288.h
+++ b/include/configs/fennec_rk3288.h
@@ -13,6 +13,4 @@
#define CONFIG_ENV_IS_IN_MMC
#define CONFIG_SYS_MMC_ENV_DEV 0
-#define CONFIG_SYS_WHITE_ON_BLACK
-
#endif
diff --git a/include/configs/firefly-rk3288.h b/include/configs/firefly-rk3288.h
index ec555dd9667..b4dcf23b1cf 100644
--- a/include/configs/firefly-rk3288.h
+++ b/include/configs/firefly-rk3288.h
@@ -17,6 +17,4 @@
#define CONFIG_ENV_IS_IN_MMC
#define CONFIG_SYS_MMC_ENV_DEV 0
-#define CONFIG_SYS_WHITE_ON_BLACK
-
#endif
diff --git a/include/configs/harmony.h b/include/configs/harmony.h
index 923c38f9685..1a5d4b1dd5d 100644
--- a/include/configs/harmony.h
+++ b/include/configs/harmony.h
@@ -45,11 +45,6 @@
#define CONFIG_USB_ETHER_MCS7830
#define CONFIG_USB_ETHER_SMSC95XX
-/* General networking support */
-
-/* LCD support */
-#define CONFIG_SYS_WHITE_ON_BLACK
-
#include "tegra-common-post.h"
#endif /* __CONFIG_H */
diff --git a/include/configs/medcom-wide.h b/include/configs/medcom-wide.h
index 342bcf3051d..b9b666fd3e4 100644
--- a/include/configs/medcom-wide.h
+++ b/include/configs/medcom-wide.h
@@ -36,11 +36,6 @@
#define CONFIG_USB_HOST_ETHER
#define CONFIG_USB_ETHER_SMSC95XX
-/* General networking support */
-
-/* LCD support */
-#define CONFIG_SYS_WHITE_ON_BLACK
-
#include "tegra-common-post.h"
#endif /* __CONFIG_H */
diff --git a/include/configs/miqi_rk3288.h b/include/configs/miqi_rk3288.h
index f6860424995..477f296542d 100644
--- a/include/configs/miqi_rk3288.h
+++ b/include/configs/miqi_rk3288.h
@@ -17,6 +17,4 @@
#define CONFIG_ENV_IS_IN_MMC
#define CONFIG_SYS_MMC_ENV_DEV 0
-#define CONFIG_SYS_WHITE_ON_BLACK
-
#endif
diff --git a/include/configs/nyan-big.h b/include/configs/nyan-big.h
index 38bb6f343c6..d9d4f2d5837 100644
--- a/include/configs/nyan-big.h
+++ b/include/configs/nyan-big.h
@@ -30,9 +30,6 @@
#define CONFIG_SYS_MMC_ENV_PART 2
#define CONFIG_ENV_OFFSET (-CONFIG_ENV_SIZE)
-/* LCD support */
-#define CONFIG_SYS_WHITE_ON_BLACK
-
/* Align LCD to 1MB boundary */
#define CONFIG_LCD_ALIGNMENT MMU_SECTION_SIZE
diff --git a/include/configs/paz00.h b/include/configs/paz00.h
index fe7be6983db..2e8cbd94cf6 100644
--- a/include/configs/paz00.h
+++ b/include/configs/paz00.h
@@ -36,11 +36,6 @@
#define CONFIG_USB_HOST_ETHER
#define CONFIG_USB_ETHER_ASIX
-/* General networking support */
-
-/* LCD support */
-#define CONFIG_SYS_WHITE_ON_BLACK
-
#include "tegra-common-post.h"
#endif /* __CONFIG_H */
diff --git a/include/configs/picosam9g45.h b/include/configs/picosam9g45.h
index 61c4b98b1dc..733768aa7b2 100644
--- a/include/configs/picosam9g45.h
+++ b/include/configs/picosam9g45.h
@@ -47,7 +47,6 @@
#undef LCD_TEST_PATTERN
#define CONFIG_LCD_INFO
#define CONFIG_LCD_INFO_BELOW_LOGO
-#define CONFIG_SYS_WHITE_ON_BLACK
#define CONFIG_ATMEL_LCD
#define CONFIG_ATMEL_LCD_RGB565
/* board specific(not enough SRAM) */
diff --git a/include/configs/pm9261.h b/include/configs/pm9261.h
index ca1404ae9fc..b22a3b6a2bf 100644
--- a/include/configs/pm9261.h
+++ b/include/configs/pm9261.h
@@ -152,7 +152,6 @@
#undef LCD_TEST_PATTERN
#define CONFIG_LCD_INFO 1
#define CONFIG_LCD_INFO_BELOW_LOGO 1
-#define CONFIG_SYS_WHITE_ON_BLACK 1
#define CONFIG_ATMEL_LCD 1
#define CONFIG_ATMEL_LCD_BGR555 1
diff --git a/include/configs/pm9263.h b/include/configs/pm9263.h
index 52791bce555..b220d14dd86 100644
--- a/include/configs/pm9263.h
+++ b/include/configs/pm9263.h
@@ -165,7 +165,6 @@
#undef LCD_TEST_PATTERN
#define CONFIG_LCD_INFO 1
#define CONFIG_LCD_INFO_BELOW_LOGO 1
-#define CONFIG_SYS_WHITE_ON_BLACK 1
#define CONFIG_ATMEL_LCD 1
#define CONFIG_ATMEL_LCD_BGR555 1
diff --git a/include/configs/popmetal_rk3288.h b/include/configs/popmetal_rk3288.h
index bbd54a1160f..0dc3532f330 100644
--- a/include/configs/popmetal_rk3288.h
+++ b/include/configs/popmetal_rk3288.h
@@ -13,6 +13,4 @@
#define CONFIG_ENV_IS_IN_MMC
#define CONFIG_SYS_MMC_ENV_DEV 0
-#define CONFIG_SYS_WHITE_ON_BLACK
-
#endif
diff --git a/include/configs/puma_rk3399.h b/include/configs/puma_rk3399.h
index fd62c72a203..f7787443195 100644
--- a/include/configs/puma_rk3399.h
+++ b/include/configs/puma_rk3399.h
@@ -22,6 +22,4 @@
#define SDRAM_BANK_SIZE (2UL << 30)
-#define CONFIG_SYS_WHITE_ON_BLACK
-
#endif
diff --git a/include/configs/rock2.h b/include/configs/rock2.h
index ec555dd9667..b4dcf23b1cf 100644
--- a/include/configs/rock2.h
+++ b/include/configs/rock2.h
@@ -17,6 +17,4 @@
#define CONFIG_ENV_IS_IN_MMC
#define CONFIG_SYS_MMC_ENV_DEV 0
-#define CONFIG_SYS_WHITE_ON_BLACK
-
#endif
diff --git a/include/configs/rpi.h b/include/configs/rpi.h
index 244f5101974..5caf90a9ac2 100644
--- a/include/configs/rpi.h
+++ b/include/configs/rpi.h
@@ -76,7 +76,6 @@
*/
#define CONFIG_FB_ADDR 0
#define CONFIG_VIDEO_BCM2835
-#define CONFIG_SYS_WHITE_ON_BLACK
#ifdef CONFIG_CMD_USB
#define CONFIG_USB_DWC2
diff --git a/include/configs/s5pc210_universal.h b/include/configs/s5pc210_universal.h
index 627a3411969..6c75626e824 100644
--- a/include/configs/s5pc210_universal.h
+++ b/include/configs/s5pc210_universal.h
@@ -190,7 +190,6 @@ int universal_spi_read(void);
/* LCD console */
#define LCD_BPP LCD_COLOR16
-#define CONFIG_SYS_WHITE_ON_BLACK
/*
* LCD Settings
diff --git a/include/configs/sama5d2_xplained.h b/include/configs/sama5d2_xplained.h
index ccbcc765c3c..ea28fce6ef8 100644
--- a/include/configs/sama5d2_xplained.h
+++ b/include/configs/sama5d2_xplained.h
@@ -61,7 +61,6 @@
#define CONFIG_LCD_LOGO
#define CONFIG_LCD_INFO
#define CONFIG_LCD_INFO_BELOW_LOGO
-#define CONFIG_SYS_WHITE_ON_BLACK
#define CONFIG_ATMEL_HLCD
#define CONFIG_ATMEL_LCD_RGB565
#endif
diff --git a/include/configs/sama5d3xek.h b/include/configs/sama5d3xek.h
index 6c28c4c19eb..509457b9bf0 100644
--- a/include/configs/sama5d3xek.h
+++ b/include/configs/sama5d3xek.h
@@ -34,7 +34,6 @@
#define CONFIG_LCD_LOGO
#define CONFIG_LCD_INFO
#define CONFIG_LCD_INFO_BELOW_LOGO
-#define CONFIG_SYS_WHITE_ON_BLACK
#define CONFIG_ATMEL_HLCD
#define CONFIG_ATMEL_LCD_RGB565
diff --git a/include/configs/sama5d4_xplained.h b/include/configs/sama5d4_xplained.h
index aced293fa84..c584b0b9e3f 100644
--- a/include/configs/sama5d4_xplained.h
+++ b/include/configs/sama5d4_xplained.h
@@ -54,7 +54,6 @@
#define CONFIG_LCD_LOGO
#define CONFIG_LCD_INFO
#define CONFIG_LCD_INFO_BELOW_LOGO
-#define CONFIG_SYS_WHITE_ON_BLACK
#define CONFIG_ATMEL_HLCD
#define CONFIG_ATMEL_LCD_RGB565
#endif
diff --git a/include/configs/sama5d4ek.h b/include/configs/sama5d4ek.h
index a5fd37f46b2..91f286b6477 100644
--- a/include/configs/sama5d4ek.h
+++ b/include/configs/sama5d4ek.h
@@ -53,7 +53,6 @@
#define CONFIG_LCD_LOGO
#define CONFIG_LCD_INFO
#define CONFIG_LCD_INFO_BELOW_LOGO
-#define CONFIG_SYS_WHITE_ON_BLACK
#define CONFIG_ATMEL_HLCD
#define CONFIG_ATMEL_LCD_RGB565
diff --git a/include/configs/seaboard.h b/include/configs/seaboard.h
index 661d1fee6f8..207b59118d0 100644
--- a/include/configs/seaboard.h
+++ b/include/configs/seaboard.h
@@ -44,17 +44,10 @@
#define CONFIG_USB_HOST_ETHER
#define CONFIG_USB_ETHER_ASIX
-/* General networking support */
-
/* Enable keyboard */
#define CONFIG_TEGRA_KEYBOARD
#define CONFIG_KEYBOARD
-/* USB keyboard */
-
-/* LCD support */
-#define CONFIG_SYS_WHITE_ON_BLACK
-
/* NAND support */
#define CONFIG_CMD_NAND
#define CONFIG_TEGRA_NAND
diff --git a/include/configs/tec.h b/include/configs/tec.h
index ebfca8f3199..b380a69bdf7 100644
--- a/include/configs/tec.h
+++ b/include/configs/tec.h
@@ -36,11 +36,6 @@
#define CONFIG_USB_HOST_ETHER
#define CONFIG_USB_ETHER_SMSC95XX
-/* General networking support */
-
-/* LCD support */
-#define CONFIG_SYS_WHITE_ON_BLACK
-
#include "tegra-common-post.h"
#endif /* __CONFIG_H */
diff --git a/include/configs/tinker_rk3288.h b/include/configs/tinker_rk3288.h
index 402ae2def22..72578f9202b 100644
--- a/include/configs/tinker_rk3288.h
+++ b/include/configs/tinker_rk3288.h
@@ -21,6 +21,4 @@
#define CONFIG_ENV_IS_IN_MMC
#define CONFIG_SYS_MMC_ENV_DEV 1
-#define CONFIG_SYS_WHITE_ON_BLACK
-
#endif
diff --git a/include/configs/trats.h b/include/configs/trats.h
index 1e68c032428..6806cd95650 100644
--- a/include/configs/trats.h
+++ b/include/configs/trats.h
@@ -202,7 +202,6 @@
/* LCD console */
#define LCD_BPP LCD_COLOR16
-#define CONFIG_SYS_WHITE_ON_BLACK
/* LCD */
#define CONFIG_BMP_16BPP
diff --git a/include/configs/trats2.h b/include/configs/trats2.h
index 722d492518f..6a4604ce938 100644
--- a/include/configs/trats2.h
+++ b/include/configs/trats2.h
@@ -183,7 +183,6 @@
/* LCD console */
#define LCD_BPP LCD_COLOR16
-#define CONFIG_SYS_WHITE_ON_BLACK
/* LCD */
#define CONFIG_BMP_16BPP
diff --git a/include/configs/ventana.h b/include/configs/ventana.h
index 87b5136facb..0e851a1b108 100644
--- a/include/configs/ventana.h
+++ b/include/configs/ventana.h
@@ -34,13 +34,6 @@
#define CONFIG_USB_HOST_ETHER
#define CONFIG_USB_ETHER_ASIX
-/* General networking support */
-
-/* USB keyboard */
-
-/* LCD support */
-#define CONFIG_SYS_WHITE_ON_BLACK
-
#include "tegra-common-post.h"
#endif /* __CONFIG_H */
diff --git a/include/configs/veyron.h b/include/configs/veyron.h
index b15cc26bebc..3bd8dd60b5b 100644
--- a/include/configs/veyron.h
+++ b/include/configs/veyron.h
@@ -22,6 +22,4 @@
#define CONFIG_KEYBOARD
-#define CONFIG_SYS_WHITE_ON_BLACK
-
#endif
diff --git a/include/configs/x86-chromebook.h b/include/configs/x86-chromebook.h
index e8ad29d3d09..b0e7e8115f7 100644
--- a/include/configs/x86-chromebook.h
+++ b/include/configs/x86-chromebook.h
@@ -46,8 +46,6 @@
#define CONFIG_ENV_IS_IN_SPI_FLASH
#define CONFIG_ENV_OFFSET 0x003f8000
-#define CONFIG_SYS_WHITE_ON_BLACK
-
#define CONFIG_STD_DEVICES_SETTINGS "stdin=usbkbd,i8042-kbd,serial\0" \
"stdout=vidconsole,serial\0" \
"stderr=vidconsole,serial\0"
diff --git a/scripts/config_whitelist.txt b/scripts/config_whitelist.txt
index df115d1106c..58e1522e6f4 100644
--- a/scripts/config_whitelist.txt
+++ b/scripts/config_whitelist.txt
@@ -6229,7 +6229,6 @@ CONFIG_SYS_WDTC_WDMR_VAL
CONFIG_SYS_WDTTIMERBASE
CONFIG_SYS_WDT_PERIOD_HIGH
CONFIG_SYS_WDT_PERIOD_LOW
-CONFIG_SYS_WHITE_ON_BLACK
CONFIG_SYS_WINDOW1_BASE
CONFIG_SYS_WRITE_SWAPPED_DATA
CONFIG_SYS_XHCI_USB1_ADDR
--
GitLab
From d66a10fc00407fda3c5091ca38c090dc055f7953 Mon Sep 17 00:00:00 2001
From: Simon Glass <sjg@chromium.org>
Date: Wed, 26 Apr 2017 22:27:58 -0600
Subject: [PATCH 176/282] fs: Convert CONFIG_CMD_CBFS to Kconfig
This converts the following to Kconfig:
CONFIG_CMD_CBFS
Signed-off-by: Simon Glass <sjg@chromium.org>
[trini: imply CMD_CBFS on SYS_COREBOOT]
Signed-off-by: Tom Rini <trini@konsulko.com>
---
README | 7 -------
arch/x86/cpu/coreboot/Kconfig | 1 +
cmd/Kconfig | 9 +++++++++
configs/sandbox_defconfig | 1 +
configs/sandbox_noblk_defconfig | 1 +
configs/sandbox_spl_defconfig | 1 +
include/configs/sandbox.h | 1 -
include/configs/x86-common.h | 4 ----
scripts/config_whitelist.txt | 1 -
9 files changed, 13 insertions(+), 13 deletions(-)
diff --git a/README b/README
index 3afffbde1c5..2d084b2cbbf 100644
--- a/README
+++ b/README
@@ -1546,13 +1546,6 @@ The following options need to be configured:
This will also enable the command "fatwrite" enabling the
user to write files to FAT.
-- CBFS (Coreboot Filesystem) support:
- CONFIG_CMD_CBFS
-
- Define this to enable support for reading from a Coreboot
- filesystem. Available commands are cbfsinit, cbfsinfo, cbfsls
- and cbfsload.
-
- FAT(File Allocation Table) filesystem cluster size:
CONFIG_FS_FAT_MAX_CLUSTSIZE
diff --git a/arch/x86/cpu/coreboot/Kconfig b/arch/x86/cpu/coreboot/Kconfig
index 4b3601f66d9..0a4a82ad13f 100644
--- a/arch/x86/cpu/coreboot/Kconfig
+++ b/arch/x86/cpu/coreboot/Kconfig
@@ -3,6 +3,7 @@ if TARGET_COREBOOT
config SYS_COREBOOT
bool
default y
+ imply CMD_CBFS
config CBMEM_CONSOLE
bool
diff --git a/cmd/Kconfig b/cmd/Kconfig
index 049fb2724a1..8a16ed77a89 100644
--- a/cmd/Kconfig
+++ b/cmd/Kconfig
@@ -880,6 +880,15 @@ config CMD_CROS_EC
endmenu
menu "Filesystem commands"
+config CMD_CBFS
+ bool "Enable the 'cbfs' command"
+ help
+ Define this to enable support for reading from a Coreboot
+ filesystem. This is a ROM-based filesystem used for accessing files
+ on systems that use coreboot as the first boot-loader and then load
+ U-Boot to actually boot the Operating System. Available commands are
+ cbfsinit, cbfsinfo, cbfsls and cbfsload.
+
config CMD_EXT2
bool "ext2 command support"
help
diff --git a/configs/sandbox_defconfig b/configs/sandbox_defconfig
index afb4d939b85..2dbeaccb09e 100644
--- a/configs/sandbox_defconfig
+++ b/configs/sandbox_defconfig
@@ -52,6 +52,7 @@ CONFIG_CMD_PMIC=y
CONFIG_CMD_REGULATOR=y
CONFIG_CMD_TPM=y
CONFIG_CMD_TPM_TEST=y
+CONFIG_CMD_CBFS=y
CONFIG_CMD_EXT4_WRITE=y
CONFIG_MAC_PARTITION=y
CONFIG_AMIGA_PARTITION=y
diff --git a/configs/sandbox_noblk_defconfig b/configs/sandbox_noblk_defconfig
index 7cc9257a5bf..56b5e687691 100644
--- a/configs/sandbox_noblk_defconfig
+++ b/configs/sandbox_noblk_defconfig
@@ -55,6 +55,7 @@ CONFIG_CMD_PMIC=y
CONFIG_CMD_REGULATOR=y
CONFIG_CMD_TPM=y
CONFIG_CMD_TPM_TEST=y
+CONFIG_CMD_CBFS=y
CONFIG_CMD_EXT2=y
CONFIG_CMD_EXT4=y
CONFIG_CMD_EXT4_WRITE=y
diff --git a/configs/sandbox_spl_defconfig b/configs/sandbox_spl_defconfig
index e0ee8c23fe2..eb70a5fbd18 100644
--- a/configs/sandbox_spl_defconfig
+++ b/configs/sandbox_spl_defconfig
@@ -59,6 +59,7 @@ CONFIG_CMD_PMIC=y
CONFIG_CMD_REGULATOR=y
CONFIG_CMD_TPM=y
CONFIG_CMD_TPM_TEST=y
+CONFIG_CMD_CBFS=y
CONFIG_CMD_EXT4_WRITE=y
CONFIG_MAC_PARTITION=y
CONFIG_AMIGA_PARTITION=y
diff --git a/include/configs/sandbox.h b/include/configs/sandbox.h
index b2d21cec713..12fc9f3c73f 100644
--- a/include/configs/sandbox.h
+++ b/include/configs/sandbox.h
@@ -35,7 +35,6 @@
#define CONFIG_FAT_WRITE
#define CONFIG_FS_EXT4
#define CONFIG_EXT4_WRITE
-#define CONFIG_CMD_CBFS
#define CONFIG_CMD_CRAMFS
#define CONFIG_HOST_MAX_DEVICES 4
diff --git a/include/configs/x86-common.h b/include/configs/x86-common.h
index 0b67bb7e6f6..e422a970486 100644
--- a/include/configs/x86-common.h
+++ b/include/configs/x86-common.h
@@ -64,10 +64,6 @@
#define CONFIG_SUPPORT_VFAT
-#ifdef CONFIG_SYS_COREBOOT
-#define CONFIG_CMD_CBFS
-#endif
-
/* x86 GPIOs are accessed through a PCI device */
#define CONFIG_INTEL_ICH6_GPIO
diff --git a/scripts/config_whitelist.txt b/scripts/config_whitelist.txt
index 58e1522e6f4..56af3c7a5a0 100644
--- a/scripts/config_whitelist.txt
+++ b/scripts/config_whitelist.txt
@@ -393,7 +393,6 @@ CONFIG_CM922T_XA10
CONFIG_CMDLINE_EDITING
CONFIG_CMDLINE_PS_SUPPORT
CONFIG_CMDLINE_TAG
-CONFIG_CMD_CBFS
CONFIG_CMD_CHIP_CONFIG
CONFIG_CMD_CLEAR
CONFIG_CMD_CLK
--
GitLab
From deb959991528bee05079426c189f538ad3850337 Mon Sep 17 00:00:00 2001
From: Simon Glass <sjg@chromium.org>
Date: Wed, 26 Apr 2017 22:27:59 -0600
Subject: [PATCH 177/282] fs: Kconfig: Add a separate config for FS_CBFS
Rather than using CMD_CBFS for both the filesystem and its command, we
should have a separate option for each. This allows us to enable CBFS
support without the command, if desired, which reduces U-Boot's size
slightly.
Signed-off-by: Simon Glass <sjg@chromium.org>
[trini: imply FS_CBFS on SYS_COREBOOT]
Signed-off-by: Tom Rini <trini@konsulko.com>
---
arch/x86/cpu/coreboot/Kconfig | 1 +
cmd/Kconfig | 1 +
configs/sandbox_defconfig | 1 +
configs/sandbox_noblk_defconfig | 1 +
configs/sandbox_spl_defconfig | 1 +
fs/Kconfig | 2 ++
fs/Makefile | 2 +-
fs/cbfs/Kconfig | 8 ++++++++
8 files changed, 16 insertions(+), 1 deletion(-)
create mode 100644 fs/cbfs/Kconfig
diff --git a/arch/x86/cpu/coreboot/Kconfig b/arch/x86/cpu/coreboot/Kconfig
index 0a4a82ad13f..98206519315 100644
--- a/arch/x86/cpu/coreboot/Kconfig
+++ b/arch/x86/cpu/coreboot/Kconfig
@@ -4,6 +4,7 @@ config SYS_COREBOOT
bool
default y
imply CMD_CBFS
+ imply FS_CBFS
config CBMEM_CONSOLE
bool
diff --git a/cmd/Kconfig b/cmd/Kconfig
index 8a16ed77a89..7a124415ed2 100644
--- a/cmd/Kconfig
+++ b/cmd/Kconfig
@@ -882,6 +882,7 @@ endmenu
menu "Filesystem commands"
config CMD_CBFS
bool "Enable the 'cbfs' command"
+ depends on FS_CBFS
help
Define this to enable support for reading from a Coreboot
filesystem. This is a ROM-based filesystem used for accessing files
diff --git a/configs/sandbox_defconfig b/configs/sandbox_defconfig
index 2dbeaccb09e..8d51c49346e 100644
--- a/configs/sandbox_defconfig
+++ b/configs/sandbox_defconfig
@@ -167,6 +167,7 @@ CONFIG_CONSOLE_ROTATION=y
CONFIG_CONSOLE_TRUETYPE=y
CONFIG_CONSOLE_TRUETYPE_CANTORAONE=y
CONFIG_VIDEO_SANDBOX_SDL=y
+CONFIG_FS_CBFS=y
CONFIG_CMD_DHRYSTONE=y
CONFIG_TPM=y
CONFIG_LZ4=y
diff --git a/configs/sandbox_noblk_defconfig b/configs/sandbox_noblk_defconfig
index 56b5e687691..8669c6cb9a1 100644
--- a/configs/sandbox_noblk_defconfig
+++ b/configs/sandbox_noblk_defconfig
@@ -169,6 +169,7 @@ CONFIG_CONSOLE_ROTATION=y
CONFIG_CONSOLE_TRUETYPE=y
CONFIG_CONSOLE_TRUETYPE_CANTORAONE=y
CONFIG_VIDEO_SANDBOX_SDL=y
+CONFIG_FS_CBFS=y
CONFIG_CMD_DHRYSTONE=y
CONFIG_TPM=y
CONFIG_LZ4=y
diff --git a/configs/sandbox_spl_defconfig b/configs/sandbox_spl_defconfig
index eb70a5fbd18..f22ed39fe0a 100644
--- a/configs/sandbox_spl_defconfig
+++ b/configs/sandbox_spl_defconfig
@@ -173,6 +173,7 @@ CONFIG_CONSOLE_ROTATION=y
CONFIG_CONSOLE_TRUETYPE=y
CONFIG_CONSOLE_TRUETYPE_CANTORAONE=y
CONFIG_VIDEO_SANDBOX_SDL=y
+CONFIG_FS_CBFS=y
CONFIG_CMD_DHRYSTONE=y
CONFIG_TPM=y
CONFIG_LZ4=y
diff --git a/fs/Kconfig b/fs/Kconfig
index 41bb0b9f3a4..e6438ad0ea3 100644
--- a/fs/Kconfig
+++ b/fs/Kconfig
@@ -4,6 +4,8 @@
menu "File systems"
+source "fs/cbfs/Kconfig"
+
source "fs/ext4/Kconfig"
source "fs/reiserfs/Kconfig"
diff --git a/fs/Makefile b/fs/Makefile
index 51d06fccb61..5c90656ba1d 100644
--- a/fs/Makefile
+++ b/fs/Makefile
@@ -12,7 +12,7 @@ obj-$(CONFIG_SPL_EXT_SUPPORT) += ext4/
else
obj-y += fs.o
-obj-$(CONFIG_CMD_CBFS) += cbfs/
+obj-$(CONFIG_FS_CBFS) += cbfs/
obj-$(CONFIG_CMD_CRAMFS) += cramfs/
obj-$(CONFIG_FS_EXT4) += ext4/
obj-y += fat/
diff --git a/fs/cbfs/Kconfig b/fs/cbfs/Kconfig
new file mode 100644
index 00000000000..16089547a51
--- /dev/null
+++ b/fs/cbfs/Kconfig
@@ -0,0 +1,8 @@
+config FS_CBFS
+ bool "Enable CBFS (Coreboot Filesystem)"
+ help
+ Define this to enable support for reading from a Coreboot
+ filesystem. This is a ROM-based filesystem used for accessing files
+ on systems that use coreboot as the first boot-loader and then load
+ U-Boot to actually boot the Operating System. You can also enable
+ CMD_CBFS to get command-line access.
--
GitLab
From 854fcd553764709939ad542c2c5bd5470b780c2f Mon Sep 17 00:00:00 2001
From: Simon Glass <sjg@chromium.org>
Date: Wed, 26 Apr 2017 22:28:00 -0600
Subject: [PATCH 178/282] Convert CONFIG_CMD_CHIP_CONFIG to Kconfig
This converts the following to Kconfig:
CONFIG_CMD_CHIP_CONFIG
Signed-off-by: Simon Glass <sjg@chromium.org>
---
arch/powerpc/cpu/ppc4xx/Kconfig | 8 ++++++++
configs/PMC405DE_defconfig | 1 +
configs/arches_defconfig | 1 +
configs/canyonlands_defconfig | 1 +
configs/devconcenter_defconfig | 1 +
configs/glacier_defconfig | 1 +
configs/glacier_ramboot_defconfig | 1 +
configs/haleakala_defconfig | 1 +
configs/icon_defconfig | 1 +
configs/intip_defconfig | 1 +
configs/io64_defconfig | 1 +
configs/katmai_defconfig | 1 +
configs/kilauea_defconfig | 1 +
configs/rainier_defconfig | 1 +
configs/rainier_ramboot_defconfig | 1 +
configs/sequoia_defconfig | 1 +
configs/sequoia_ramboot_defconfig | 1 +
configs/t3corp_defconfig | 1 +
include/configs/PMC405DE.h | 1 -
include/configs/canyonlands.h | 1 -
include/configs/icon.h | 1 -
include/configs/intip.h | 1 -
include/configs/io64.h | 1 -
include/configs/katmai.h | 1 -
include/configs/kilauea.h | 1 -
include/configs/sequoia.h | 1 -
include/configs/t3corp.h | 1 -
scripts/config_whitelist.txt | 1 -
28 files changed, 25 insertions(+), 10 deletions(-)
diff --git a/arch/powerpc/cpu/ppc4xx/Kconfig b/arch/powerpc/cpu/ppc4xx/Kconfig
index a6066efe816..38121c14274 100644
--- a/arch/powerpc/cpu/ppc4xx/Kconfig
+++ b/arch/powerpc/cpu/ppc4xx/Kconfig
@@ -129,6 +129,14 @@ config TARGET_XILINX_PPC440_GENERIC
endchoice
+config CMD_CHIP_CONFIG
+ bool "Enable the 'chip_config' command"
+ help
+ This command programs the I2C bootstrap EEPROM or shows a list of
+ possible configurations. The configurations are board-specific
+ and control the CPU and peripehrals clocks. The programmed
+ configuration is then used when the board boots.
+
source "board/amcc/acadia/Kconfig"
source "board/amcc/bamboo/Kconfig"
source "board/amcc/bubinga/Kconfig"
diff --git a/configs/PMC405DE_defconfig b/configs/PMC405DE_defconfig
index 7ac77d915b7..50fdbd4dab9 100644
--- a/configs/PMC405DE_defconfig
+++ b/configs/PMC405DE_defconfig
@@ -1,6 +1,7 @@
CONFIG_PPC=y
CONFIG_4xx=y
CONFIG_TARGET_PMC405DE=y
+CONFIG_CMD_CHIP_CONFIG=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_BOOTDELAY=3
CONFIG_SYS_CONSOLE_INFO_QUIET=y
diff --git a/configs/arches_defconfig b/configs/arches_defconfig
index da525800f2c..c76c8d6ebf5 100644
--- a/configs/arches_defconfig
+++ b/configs/arches_defconfig
@@ -2,6 +2,7 @@ CONFIG_PPC=y
CONFIG_4xx=y
CONFIG_TARGET_CANYONLANDS=y
CONFIG_ARCHES=y
+CONFIG_CMD_CHIP_CONFIG=y
CONFIG_DEFAULT_DEVICE_TREE="arches"
CONFIG_OF_BOARD_SETUP=y
CONFIG_BOOTDELAY=5
diff --git a/configs/canyonlands_defconfig b/configs/canyonlands_defconfig
index 94e5e856b06..cbb0f2a69fd 100644
--- a/configs/canyonlands_defconfig
+++ b/configs/canyonlands_defconfig
@@ -2,6 +2,7 @@ CONFIG_PPC=y
CONFIG_4xx=y
CONFIG_TARGET_CANYONLANDS=y
CONFIG_CANYONLANDS=y
+CONFIG_CMD_CHIP_CONFIG=y
CONFIG_DEFAULT_DEVICE_TREE="canyonlands"
CONFIG_OF_BOARD_SETUP=y
CONFIG_BOOTDELAY=5
diff --git a/configs/devconcenter_defconfig b/configs/devconcenter_defconfig
index 0d8a0cd768a..f6b6c950285 100644
--- a/configs/devconcenter_defconfig
+++ b/configs/devconcenter_defconfig
@@ -2,6 +2,7 @@ CONFIG_PPC=y
CONFIG_IDENT_STRING=" devconcenter 0.06"
CONFIG_4xx=y
CONFIG_TARGET_INTIP=y
+CONFIG_CMD_CHIP_CONFIG=y
CONFIG_FIT=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_SYS_EXTRA_OPTIONS="DEVCONCENTER"
diff --git a/configs/glacier_defconfig b/configs/glacier_defconfig
index cf9a1d73a3e..5a82757b6a5 100644
--- a/configs/glacier_defconfig
+++ b/configs/glacier_defconfig
@@ -2,6 +2,7 @@ CONFIG_PPC=y
CONFIG_4xx=y
CONFIG_TARGET_CANYONLANDS=y
CONFIG_GLACIER=y
+CONFIG_CMD_CHIP_CONFIG=y
CONFIG_DEFAULT_DEVICE_TREE="glacier"
CONFIG_OF_BOARD_SETUP=y
CONFIG_BOOTDELAY=5
diff --git a/configs/glacier_ramboot_defconfig b/configs/glacier_ramboot_defconfig
index bf1ae128efa..4601963930f 100644
--- a/configs/glacier_ramboot_defconfig
+++ b/configs/glacier_ramboot_defconfig
@@ -2,6 +2,7 @@ CONFIG_PPC=y
CONFIG_4xx=y
CONFIG_TARGET_CANYONLANDS=y
CONFIG_GLACIER=y
+CONFIG_CMD_CHIP_CONFIG=y
CONFIG_DEFAULT_DEVICE_TREE="glacier"
CONFIG_OF_BOARD_SETUP=y
CONFIG_SYS_EXTRA_OPTIONS="SYS_RAMBOOT,SYS_TEXT_BASE=0x01000000,SYS_LDSCRIPT=board/amcc/canyonlands/u-boot-ram.lds"
diff --git a/configs/haleakala_defconfig b/configs/haleakala_defconfig
index ddb0900cedd..9e3d16dab9a 100644
--- a/configs/haleakala_defconfig
+++ b/configs/haleakala_defconfig
@@ -1,6 +1,7 @@
CONFIG_PPC=y
CONFIG_4xx=y
CONFIG_TARGET_KILAUEA=y
+CONFIG_CMD_CHIP_CONFIG=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_SYS_EXTRA_OPTIONS="HALEAKALA"
CONFIG_BOOTDELAY=5
diff --git a/configs/icon_defconfig b/configs/icon_defconfig
index c2e510dd9ba..117fcb559db 100644
--- a/configs/icon_defconfig
+++ b/configs/icon_defconfig
@@ -2,6 +2,7 @@ CONFIG_PPC=y
CONFIG_VIDEO=y
CONFIG_4xx=y
CONFIG_TARGET_ICON=y
+CONFIG_CMD_CHIP_CONFIG=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_BOOTDELAY=5
# CONFIG_CONSOLE_MUX is not set
diff --git a/configs/intip_defconfig b/configs/intip_defconfig
index bd199564fa4..eb47db4f0c6 100644
--- a/configs/intip_defconfig
+++ b/configs/intip_defconfig
@@ -2,6 +2,7 @@ CONFIG_PPC=y
CONFIG_IDENT_STRING=" intip 0.06"
CONFIG_4xx=y
CONFIG_TARGET_INTIP=y
+CONFIG_CMD_CHIP_CONFIG=y
CONFIG_FIT=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_SYS_EXTRA_OPTIONS="INTIB"
diff --git a/configs/io64_defconfig b/configs/io64_defconfig
index 3eb3ff6aa33..9701135f98a 100644
--- a/configs/io64_defconfig
+++ b/configs/io64_defconfig
@@ -2,6 +2,7 @@ CONFIG_PPC=y
CONFIG_IDENT_STRING=" io64 0.02"
CONFIG_4xx=y
CONFIG_TARGET_IO64=y
+CONFIG_CMD_CHIP_CONFIG=y
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
diff --git a/configs/katmai_defconfig b/configs/katmai_defconfig
index aee12e7b99b..9c80f06d949 100644
--- a/configs/katmai_defconfig
+++ b/configs/katmai_defconfig
@@ -1,6 +1,7 @@
CONFIG_PPC=y
CONFIG_4xx=y
CONFIG_TARGET_KATMAI=y
+CONFIG_CMD_CHIP_CONFIG=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_BOOTDELAY=5
CONFIG_SYS_CONSOLE_INFO_QUIET=y
diff --git a/configs/kilauea_defconfig b/configs/kilauea_defconfig
index eea989a9d3f..2ec7fa84d54 100644
--- a/configs/kilauea_defconfig
+++ b/configs/kilauea_defconfig
@@ -1,6 +1,7 @@
CONFIG_PPC=y
CONFIG_4xx=y
CONFIG_TARGET_KILAUEA=y
+CONFIG_CMD_CHIP_CONFIG=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_SYS_EXTRA_OPTIONS="KILAUEA"
CONFIG_BOOTDELAY=5
diff --git a/configs/rainier_defconfig b/configs/rainier_defconfig
index aa3b9cc2f7b..0a0b4ddd9f7 100644
--- a/configs/rainier_defconfig
+++ b/configs/rainier_defconfig
@@ -1,6 +1,7 @@
CONFIG_PPC=y
CONFIG_4xx=y
CONFIG_TARGET_SEQUOIA=y
+CONFIG_CMD_CHIP_CONFIG=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_SYS_EXTRA_OPTIONS="RAINIER"
CONFIG_BOOTDELAY=5
diff --git a/configs/rainier_ramboot_defconfig b/configs/rainier_ramboot_defconfig
index ed9eb356b45..6690e9b5688 100644
--- a/configs/rainier_ramboot_defconfig
+++ b/configs/rainier_ramboot_defconfig
@@ -1,6 +1,7 @@
CONFIG_PPC=y
CONFIG_4xx=y
CONFIG_TARGET_SEQUOIA=y
+CONFIG_CMD_CHIP_CONFIG=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_SYS_EXTRA_OPTIONS="RAINIER,SYS_RAMBOOT,SYS_TEXT_BASE=0x01000000,SYS_LDSCRIPT=board/amcc/sequoia/u-boot-ram.lds"
CONFIG_BOOTDELAY=5
diff --git a/configs/sequoia_defconfig b/configs/sequoia_defconfig
index 554d12483b3..628cdd8b05b 100644
--- a/configs/sequoia_defconfig
+++ b/configs/sequoia_defconfig
@@ -1,6 +1,7 @@
CONFIG_PPC=y
CONFIG_4xx=y
CONFIG_TARGET_SEQUOIA=y
+CONFIG_CMD_CHIP_CONFIG=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_SYS_EXTRA_OPTIONS="SEQUOIA"
CONFIG_BOOTDELAY=5
diff --git a/configs/sequoia_ramboot_defconfig b/configs/sequoia_ramboot_defconfig
index 3214d45f94d..ddafa275812 100644
--- a/configs/sequoia_ramboot_defconfig
+++ b/configs/sequoia_ramboot_defconfig
@@ -1,6 +1,7 @@
CONFIG_PPC=y
CONFIG_4xx=y
CONFIG_TARGET_SEQUOIA=y
+CONFIG_CMD_CHIP_CONFIG=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_SYS_EXTRA_OPTIONS="SEQUOIA,SYS_RAMBOOT,SYS_TEXT_BASE=0x01000000,SYS_LDSCRIPT=board/amcc/sequoia/u-boot-ram.lds"
CONFIG_BOOTDELAY=5
diff --git a/configs/t3corp_defconfig b/configs/t3corp_defconfig
index a804e95b40a..21c4c892124 100644
--- a/configs/t3corp_defconfig
+++ b/configs/t3corp_defconfig
@@ -1,6 +1,7 @@
CONFIG_PPC=y
CONFIG_4xx=y
CONFIG_TARGET_T3CORP=y
+CONFIG_CMD_CHIP_CONFIG=y
CONFIG_FIT=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_BOOTDELAY=5
diff --git a/include/configs/PMC405DE.h b/include/configs/PMC405DE.h
index a7d7bbf10b1..2c5bcbd60e2 100644
--- a/include/configs/PMC405DE.h
+++ b/include/configs/PMC405DE.h
@@ -48,7 +48,6 @@
/*
* Command line configuration.
*/
-#define CONFIG_CMD_CHIP_CONFIG
#define CONFIG_CMD_DATE
#define CONFIG_CMD_EEPROM
#define CONFIG_CMD_IRQ
diff --git a/include/configs/canyonlands.h b/include/configs/canyonlands.h
index 9babc3d62cc..5c1422d3472 100644
--- a/include/configs/canyonlands.h
+++ b/include/configs/canyonlands.h
@@ -372,7 +372,6 @@
/*
* Commands additional to the ones defined in amcc-common.h
*/
-#define CONFIG_CMD_CHIP_CONFIG
#if defined(CONFIG_ARCHES)
#define CONFIG_CMD_DTT
#define CONFIG_CMD_PCI
diff --git a/include/configs/icon.h b/include/configs/icon.h
index 3cb2196d792..b459366719c 100644
--- a/include/configs/icon.h
+++ b/include/configs/icon.h
@@ -159,7 +159,6 @@
/*
* Commands additional to the ones defined in amcc-common.h
*/
-#define CONFIG_CMD_CHIP_CONFIG
#define CONFIG_CMD_DATE
#define CONFIG_CMD_PCI
#define CONFIG_CMD_SDRAM
diff --git a/include/configs/intip.h b/include/configs/intip.h
index 34770598652..7f73b66b553 100644
--- a/include/configs/intip.h
+++ b/include/configs/intip.h
@@ -272,7 +272,6 @@
/*
* Commands additional to the ones defined in amcc-common.h
*/
-#define CONFIG_CMD_CHIP_CONFIG
#define CONFIG_CMD_DATE
#define CONFIG_CMD_DTT
#define CONFIG_CMD_PCI
diff --git a/include/configs/io64.h b/include/configs/io64.h
index 8619de4af9a..8e754fc10b7 100644
--- a/include/configs/io64.h
+++ b/include/configs/io64.h
@@ -373,7 +373,6 @@
/*
* Commands additional to the ones defined in amcc-common.h
*/
-#define CONFIG_CMD_CHIP_CONFIG
#define CONFIG_CMD_DTT
#define CONFIG_SYS_POST_MEMORY_ON CONFIG_SYS_POST_MEMORY
diff --git a/include/configs/katmai.h b/include/configs/katmai.h
index 45c1e06fbd7..f33bfd6f44e 100644
--- a/include/configs/katmai.h
+++ b/include/configs/katmai.h
@@ -170,7 +170,6 @@
/*
* Commands additional to the ones defined in amcc-common.h
*/
-#define CONFIG_CMD_CHIP_CONFIG
#define CONFIG_CMD_DATE
#define CONFIG_CMD_ECCTEST
#define CONFIG_CMD_PCI
diff --git a/include/configs/kilauea.h b/include/configs/kilauea.h
index 43eb405e638..f89f0ce92d1 100644
--- a/include/configs/kilauea.h
+++ b/include/configs/kilauea.h
@@ -364,7 +364,6 @@
/*
* Commands additional to the ones defined in amcc-common.h
*/
-#define CONFIG_CMD_CHIP_CONFIG
#define CONFIG_CMD_DATE
#define CONFIG_CMD_NAND
#define CONFIG_CMD_PCI
diff --git a/include/configs/sequoia.h b/include/configs/sequoia.h
index b0475229c34..f5b03caf830 100644
--- a/include/configs/sequoia.h
+++ b/include/configs/sequoia.h
@@ -222,7 +222,6 @@
/*
* Commands additional to the ones defined in amcc-common.h
*/
-#define CONFIG_CMD_CHIP_CONFIG
#define CONFIG_CMD_DTT
#define CONFIG_CMD_NAND
#define CONFIG_CMD_PCI
diff --git a/include/configs/t3corp.h b/include/configs/t3corp.h
index d3f20507361..964115f980c 100644
--- a/include/configs/t3corp.h
+++ b/include/configs/t3corp.h
@@ -349,7 +349,6 @@
/*
* Commands additional to the ones defined in amcc-common.h
*/
-#define CONFIG_CMD_CHIP_CONFIG
#define CONFIG_CMD_ECCTEST
#define CONFIG_CMD_PCI
#define CONFIG_CMD_SDRAM
diff --git a/scripts/config_whitelist.txt b/scripts/config_whitelist.txt
index 56af3c7a5a0..7db1365d2bc 100644
--- a/scripts/config_whitelist.txt
+++ b/scripts/config_whitelist.txt
@@ -393,7 +393,6 @@ CONFIG_CM922T_XA10
CONFIG_CMDLINE_EDITING
CONFIG_CMDLINE_PS_SUPPORT
CONFIG_CMDLINE_TAG
-CONFIG_CMD_CHIP_CONFIG
CONFIG_CMD_CLEAR
CONFIG_CMD_CLK
CONFIG_CMD_CRAMFS
--
GitLab
From 3d0aeb909001f37f35332606713cd92f213501cc Mon Sep 17 00:00:00 2001
From: Simon Glass <sjg@chromium.org>
Date: Wed, 26 Apr 2017 22:28:01 -0600
Subject: [PATCH 179/282] Drop CONFIG_CMD_CLEAR
This option is not used in U-Boot. Drop it.
Signed-off-by: Simon Glass <sjg@chromium.org>
---
include/configs/nokia_rx51.h | 2 --
scripts/config_whitelist.txt | 1 -
2 files changed, 3 deletions(-)
diff --git a/include/configs/nokia_rx51.h b/include/configs/nokia_rx51.h
index e99968c805e..eb2a60a57da 100644
--- a/include/configs/nokia_rx51.h
+++ b/include/configs/nokia_rx51.h
@@ -106,8 +106,6 @@
#define CONFIG_CMDLINE_EDITING /* add command line history */
#define CONFIG_AUTO_COMPLETE /* add autocompletion support */
-#define CONFIG_CMD_CLEAR /* ANSI terminal clear screen command */
-
#ifdef ONENAND_SUPPORT
#define CONFIG_CMD_ONENAND /* ONENAND support */
diff --git a/scripts/config_whitelist.txt b/scripts/config_whitelist.txt
index 7db1365d2bc..af81d25d917 100644
--- a/scripts/config_whitelist.txt
+++ b/scripts/config_whitelist.txt
@@ -393,7 +393,6 @@ CONFIG_CM922T_XA10
CONFIG_CMDLINE_EDITING
CONFIG_CMDLINE_PS_SUPPORT
CONFIG_CMDLINE_TAG
-CONFIG_CMD_CLEAR
CONFIG_CMD_CLK
CONFIG_CMD_CRAMFS
CONFIG_CMD_DATE
--
GitLab
From d315628edbc99572c3d35cb72fffcd32e12f859b Mon Sep 17 00:00:00 2001
From: Simon Glass <sjg@chromium.org>
Date: Wed, 26 Apr 2017 22:28:02 -0600
Subject: [PATCH 180/282] Convert CONFIG_CMD_CLK to Kconfig
This converts the following to Kconfig:
CONFIG_CMD_CLK
Signed-off-by: Simon Glass <sjg@chromium.org>
[trini: imply CMD_CLK on ARCH_ZYNQ]
Signed-off-by: Tom Rini <trini@konsulko.com>
---
README | 1 -
arch/arm/Kconfig | 1 +
cmd/Kconfig | 9 +++++++++
configs/pic32mzdask_defconfig | 1 +
include/config_cmd_all.h | 1 -
include/configs/pic32mzdask.h | 1 -
include/configs/zynq-common.h | 1 -
scripts/config_whitelist.txt | 1 -
8 files changed, 11 insertions(+), 5 deletions(-)
diff --git a/README b/README
index 2d084b2cbbf..0ac01363f7a 100644
--- a/README
+++ b/README
@@ -826,7 +826,6 @@ The following options need to be configured:
CONFIG_CMD_BOOTD bootd
CONFIG_CMD_BOOTI * ARM64 Linux kernel Image support
CONFIG_CMD_CACHE * icache, dcache
- CONFIG_CMD_CLK * clock command support
CONFIG_CMD_CONSOLE coninfo
CONFIG_CMD_CRC32 * crc32
CONFIG_CMD_DATE * support for RTC, date/time...
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 0b70c474070..513a35fc4e9 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -676,6 +676,7 @@ config ARCH_ZYNQ
select CLK
select SPL_CLK
select CLK_ZYNQ
+ imply CMD_CLK
config ARCH_ZYNQMP
bool "Support Xilinx ZynqMP Platform"
diff --git a/cmd/Kconfig b/cmd/Kconfig
index 7a124415ed2..9eb6a353cb1 100644
--- a/cmd/Kconfig
+++ b/cmd/Kconfig
@@ -387,6 +387,15 @@ endmenu
menu "Device access commands"
+config CMD_CLK
+ bool "clk - Show clock frequencies"
+ help
+ (deprecated)
+ Shows clock frequences by calling a sock_clk_dump() hook function.
+ This is depreated in favour of using the CLK uclass and accessing
+ clock values from associated drivers. However currently no command
+ exists for this.
+
config CMD_DM
bool "dm - Access to driver model information"
depends on DM
diff --git a/configs/pic32mzdask_defconfig b/configs/pic32mzdask_defconfig
index e1676643d5b..9eb80766ed4 100644
--- a/configs/pic32mzdask_defconfig
+++ b/configs/pic32mzdask_defconfig
@@ -12,6 +12,7 @@ CONFIG_SYS_PROMPT="dask # "
CONFIG_LOOPW=y
CONFIG_CMD_MEMTEST=y
CONFIG_CMD_MEMINFO=y
+CONFIG_CMD_CLK=y
# CONFIG_CMD_FLASH is not set
CONFIG_CMD_MMC=y
CONFIG_CMD_USB=y
diff --git a/include/config_cmd_all.h b/include/config_cmd_all.h
index 38c96001421..d40e18f65d4 100644
--- a/include/config_cmd_all.h
+++ b/include/config_cmd_all.h
@@ -13,7 +13,6 @@
* Alphabetical list of all possible commands.
*/
-#define CONFIG_CMD_CLK /* Clock support */
#define CONFIG_CMD_DATE /* support for RTC, date/time...*/
#define CONFIG_CMD_DIAG /* Diagnostics */
#define CONFIG_CMD_DISPLAY /* Display support */
diff --git a/include/configs/pic32mzdask.h b/include/configs/pic32mzdask.h
index 9042dc269e0..2dcc6c4539c 100644
--- a/include/configs/pic32mzdask.h
+++ b/include/configs/pic32mzdask.h
@@ -53,7 +53,6 @@
* Commands
*/
#define CONFIG_SYS_LONGHELP /* undef to save memory */
-#define CONFIG_CMD_CLK
/*------------------------------------------------------------
* Console Configuration
diff --git a/include/configs/zynq-common.h b/include/configs/zynq-common.h
index 1fa55998655..51edd463a15 100644
--- a/include/configs/zynq-common.h
+++ b/include/configs/zynq-common.h
@@ -236,7 +236,6 @@
#define CONFIG_AUTO_COMPLETE
#define CONFIG_SYS_LONGHELP
#define CONFIG_CLOCKS
-#define CONFIG_CMD_CLK
#define CONFIG_SYS_MAXARGS 32 /* max number of command args */
#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
diff --git a/scripts/config_whitelist.txt b/scripts/config_whitelist.txt
index af81d25d917..0f72fc430c7 100644
--- a/scripts/config_whitelist.txt
+++ b/scripts/config_whitelist.txt
@@ -393,7 +393,6 @@ CONFIG_CM922T_XA10
CONFIG_CMDLINE_EDITING
CONFIG_CMDLINE_PS_SUPPORT
CONFIG_CMDLINE_TAG
-CONFIG_CMD_CLK
CONFIG_CMD_CRAMFS
CONFIG_CMD_DATE
CONFIG_CMD_DEFAULTENV_VARS
--
GitLab
From 9707274718b0d343d93941fb19f9314ef3cffa4b Mon Sep 17 00:00:00 2001
From: Simon Glass <sjg@chromium.org>
Date: Wed, 26 Apr 2017 22:28:03 -0600
Subject: [PATCH 181/282] fs: Convert CONFIG_CMD_CRAMFS to Kconfig
This converts the following to Kconfig:
CONFIG_CMD_CRAMFS
Signed-off-by: Simon Glass <sjg@chromium.org>
[trini: imply CMD_CRAMFS for keymile]
Signed-off-by: Tom Rini <trini@konsulko.com>
---
arch/arm/mach-kirkwood/Kconfig | 1 +
arch/powerpc/cpu/mpc8260/Kconfig | 1 +
arch/powerpc/cpu/mpc83xx/Kconfig | 3 +++
arch/powerpc/cpu/mpc85xx/Kconfig | 1 +
cmd/Kconfig | 10 ++++++++++
configs/UCP1020_SPIFLASH_defconfig | 1 +
configs/UCP1020_defconfig | 1 +
configs/sandbox_defconfig | 1 +
configs/sandbox_noblk_defconfig | 1 +
configs/sandbox_spl_defconfig | 1 +
include/configs/UCP1020.h | 1 -
include/configs/km/keymile-common.h | 2 --
include/configs/sandbox.h | 1 -
scripts/config_whitelist.txt | 1 -
14 files changed, 21 insertions(+), 5 deletions(-)
diff --git a/arch/arm/mach-kirkwood/Kconfig b/arch/arm/mach-kirkwood/Kconfig
index ddfae8c4b4e..8aa54281bee 100644
--- a/arch/arm/mach-kirkwood/Kconfig
+++ b/arch/arm/mach-kirkwood/Kconfig
@@ -34,6 +34,7 @@ config TARGET_ICONNECT
config TARGET_KM_KIRKWOOD
bool "KM_KIRKWOOD Board"
select BOARD_LATE_INIT
+ imply CMD_CRAMFS
config TARGET_NET2BIG_V2
bool "LaCie 2Big Network v2 NAS Board"
diff --git a/arch/powerpc/cpu/mpc8260/Kconfig b/arch/powerpc/cpu/mpc8260/Kconfig
index e93732d058d..1a5ea73552e 100644
--- a/arch/powerpc/cpu/mpc8260/Kconfig
+++ b/arch/powerpc/cpu/mpc8260/Kconfig
@@ -10,6 +10,7 @@ choice
config TARGET_KM82XX
bool "Support km82xx"
+ imply CMD_CRAMFS
endchoice
diff --git a/arch/powerpc/cpu/mpc83xx/Kconfig b/arch/powerpc/cpu/mpc83xx/Kconfig
index bf3be50c48c..4890e137704 100644
--- a/arch/powerpc/cpu/mpc83xx/Kconfig
+++ b/arch/powerpc/cpu/mpc83xx/Kconfig
@@ -64,12 +64,15 @@ config TARGET_IDS8313
config TARGET_KM8360
bool "Support km8360"
+ imply CMD_CRAMFS
config TARGET_SUVD3
bool "Support suvd3"
+ imply CMD_CRAMFS
config TARGET_TUXX1
bool "Support tuxx1"
+ imply CMD_CRAMFS
config TARGET_TQM834X
bool "Support TQM834x"
diff --git a/arch/powerpc/cpu/mpc85xx/Kconfig b/arch/powerpc/cpu/mpc85xx/Kconfig
index 592b58171ad..48896331284 100644
--- a/arch/powerpc/cpu/mpc85xx/Kconfig
+++ b/arch/powerpc/cpu/mpc85xx/Kconfig
@@ -321,6 +321,7 @@ config TARGET_KMP204X
bool "Support kmp204x"
select ARCH_P2041
select PHYS_64BIT
+ imply CMD_CRAMFS
config TARGET_XPEDITE520X
bool "Support xpedite520x"
diff --git a/cmd/Kconfig b/cmd/Kconfig
index 9eb6a353cb1..4145fcf056c 100644
--- a/cmd/Kconfig
+++ b/cmd/Kconfig
@@ -899,6 +899,16 @@ config CMD_CBFS
U-Boot to actually boot the Operating System. Available commands are
cbfsinit, cbfsinfo, cbfsls and cbfsload.
+config CMD_CRAMFS
+ bool "Enable the 'cramfs' command"
+ help
+ This provides commands for dealing with CRAMFS (Compressed ROM
+ filesystem). CRAMFS is useful when space is tight since files are
+ compressed. Two commands are provided:
+
+ cramfsls - lists files in a cramfs image
+ cramfsload - loads a file from a cramfs image
+
config CMD_EXT2
bool "ext2 command support"
help
diff --git a/configs/UCP1020_SPIFLASH_defconfig b/configs/UCP1020_SPIFLASH_defconfig
index 77ae65c19fd..4e5e0c16b8e 100644
--- a/configs/UCP1020_SPIFLASH_defconfig
+++ b/configs/UCP1020_SPIFLASH_defconfig
@@ -20,6 +20,7 @@ CONFIG_CMD_GPIO=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
+CONFIG_CMD_CRAMFS=y
CONFIG_CMD_EXT2=y
CONFIG_CMD_FAT=y
CONFIG_MTD_NOR_FLASH=y
diff --git a/configs/UCP1020_defconfig b/configs/UCP1020_defconfig
index 085c1ddecbd..ae7cb256116 100644
--- a/configs/UCP1020_defconfig
+++ b/configs/UCP1020_defconfig
@@ -20,6 +20,7 @@ CONFIG_CMD_GPIO=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
+CONFIG_CMD_CRAMFS=y
CONFIG_CMD_EXT2=y
CONFIG_CMD_FAT=y
CONFIG_MTD_NOR_FLASH=y
diff --git a/configs/sandbox_defconfig b/configs/sandbox_defconfig
index 8d51c49346e..d6966d32c42 100644
--- a/configs/sandbox_defconfig
+++ b/configs/sandbox_defconfig
@@ -53,6 +53,7 @@ CONFIG_CMD_REGULATOR=y
CONFIG_CMD_TPM=y
CONFIG_CMD_TPM_TEST=y
CONFIG_CMD_CBFS=y
+CONFIG_CMD_CRAMFS=y
CONFIG_CMD_EXT4_WRITE=y
CONFIG_MAC_PARTITION=y
CONFIG_AMIGA_PARTITION=y
diff --git a/configs/sandbox_noblk_defconfig b/configs/sandbox_noblk_defconfig
index 8669c6cb9a1..06ca3c652bc 100644
--- a/configs/sandbox_noblk_defconfig
+++ b/configs/sandbox_noblk_defconfig
@@ -56,6 +56,7 @@ CONFIG_CMD_REGULATOR=y
CONFIG_CMD_TPM=y
CONFIG_CMD_TPM_TEST=y
CONFIG_CMD_CBFS=y
+CONFIG_CMD_CRAMFS=y
CONFIG_CMD_EXT2=y
CONFIG_CMD_EXT4=y
CONFIG_CMD_EXT4_WRITE=y
diff --git a/configs/sandbox_spl_defconfig b/configs/sandbox_spl_defconfig
index f22ed39fe0a..a8ddb99c095 100644
--- a/configs/sandbox_spl_defconfig
+++ b/configs/sandbox_spl_defconfig
@@ -60,6 +60,7 @@ CONFIG_CMD_REGULATOR=y
CONFIG_CMD_TPM=y
CONFIG_CMD_TPM_TEST=y
CONFIG_CMD_CBFS=y
+CONFIG_CMD_CRAMFS=y
CONFIG_CMD_EXT4_WRITE=y
CONFIG_MAC_PARTITION=y
CONFIG_AMIGA_PARTITION=y
diff --git a/include/configs/UCP1020.h b/include/configs/UCP1020.h
index f1b72a329c3..a64ba1cfd37 100644
--- a/include/configs/UCP1020.h
+++ b/include/configs/UCP1020.h
@@ -447,7 +447,6 @@
#define CONFIG_CMD_IRQ
#define CONFIG_CMD_REGINFO
#define CONFIG_CMD_ERRATA
-#define CONFIG_CMD_CRAMFS
/*
* USB
diff --git a/include/configs/km/keymile-common.h b/include/configs/km/keymile-common.h
index 24830ee6ee1..40d5d53c2bd 100644
--- a/include/configs/km/keymile-common.h
+++ b/include/configs/km/keymile-common.h
@@ -69,8 +69,6 @@
#define CONFIG_MTD_DEVICE
#define CONFIG_MTD_CONCAT
-#define CONFIG_CMD_CRAMFS
-
#ifndef CONFIG_KM_DEF_ENV_BOOTPARAMS
#define CONFIG_KM_DEF_ENV_BOOTPARAMS \
"actual_bank=0\0"
diff --git a/include/configs/sandbox.h b/include/configs/sandbox.h
index 12fc9f3c73f..c02d3060e1d 100644
--- a/include/configs/sandbox.h
+++ b/include/configs/sandbox.h
@@ -35,7 +35,6 @@
#define CONFIG_FAT_WRITE
#define CONFIG_FS_EXT4
#define CONFIG_EXT4_WRITE
-#define CONFIG_CMD_CRAMFS
#define CONFIG_HOST_MAX_DEVICES 4
/*
diff --git a/scripts/config_whitelist.txt b/scripts/config_whitelist.txt
index 0f72fc430c7..dc90398c265 100644
--- a/scripts/config_whitelist.txt
+++ b/scripts/config_whitelist.txt
@@ -393,7 +393,6 @@ CONFIG_CM922T_XA10
CONFIG_CMDLINE_EDITING
CONFIG_CMDLINE_PS_SUPPORT
CONFIG_CMDLINE_TAG
-CONFIG_CMD_CRAMFS
CONFIG_CMD_DATE
CONFIG_CMD_DEFAULTENV_VARS
CONFIG_CMD_DEKBLOB
--
GitLab
From 80e44cfe10f751bbb3b892f91873703a1c3df6e6 Mon Sep 17 00:00:00 2001
From: Simon Glass <sjg@chromium.org>
Date: Wed, 26 Apr 2017 22:28:04 -0600
Subject: [PATCH 182/282] fs: Kconfig: Add a separate option for FS_CRAMFS
Rather than using CMD_CRAMFS for both the filesystem and its command, we
should have a separate option for each. This allows us to enable CRAMFS
support without the command, if desired, which reduces U-Boot's size
slightly.
Signed-off-by: Simon Glass <sjg@chromium.org>
[trini: imply FS_CRAMFS for keymile]
Signed-off-by: Tom Rini <trini@konsulko.com>
---
arch/arm/mach-kirkwood/Kconfig | 1 +
arch/powerpc/cpu/mpc8260/Kconfig | 1 +
arch/powerpc/cpu/mpc83xx/Kconfig | 3 +++
arch/powerpc/cpu/mpc85xx/Kconfig | 1 +
cmd/Kconfig | 1 +
configs/UCP1020_SPIFLASH_defconfig | 1 +
configs/UCP1020_defconfig | 1 +
configs/sandbox_defconfig | 1 +
configs/sandbox_noblk_defconfig | 1 +
configs/sandbox_spl_defconfig | 1 +
fs/cramfs/Kconfig | 7 +++++++
11 files changed, 19 insertions(+)
diff --git a/arch/arm/mach-kirkwood/Kconfig b/arch/arm/mach-kirkwood/Kconfig
index 8aa54281bee..4a7e36e8fa4 100644
--- a/arch/arm/mach-kirkwood/Kconfig
+++ b/arch/arm/mach-kirkwood/Kconfig
@@ -35,6 +35,7 @@ config TARGET_KM_KIRKWOOD
bool "KM_KIRKWOOD Board"
select BOARD_LATE_INIT
imply CMD_CRAMFS
+ imply FS_CRAMFS
config TARGET_NET2BIG_V2
bool "LaCie 2Big Network v2 NAS Board"
diff --git a/arch/powerpc/cpu/mpc8260/Kconfig b/arch/powerpc/cpu/mpc8260/Kconfig
index 1a5ea73552e..47bae55b9db 100644
--- a/arch/powerpc/cpu/mpc8260/Kconfig
+++ b/arch/powerpc/cpu/mpc8260/Kconfig
@@ -11,6 +11,7 @@ choice
config TARGET_KM82XX
bool "Support km82xx"
imply CMD_CRAMFS
+ imply FS_CRAMFS
endchoice
diff --git a/arch/powerpc/cpu/mpc83xx/Kconfig b/arch/powerpc/cpu/mpc83xx/Kconfig
index 4890e137704..7ebc27cd28a 100644
--- a/arch/powerpc/cpu/mpc83xx/Kconfig
+++ b/arch/powerpc/cpu/mpc83xx/Kconfig
@@ -65,14 +65,17 @@ config TARGET_IDS8313
config TARGET_KM8360
bool "Support km8360"
imply CMD_CRAMFS
+ imply FS_CRAMFS
config TARGET_SUVD3
bool "Support suvd3"
imply CMD_CRAMFS
+ imply FS_CRAMFS
config TARGET_TUXX1
bool "Support tuxx1"
imply CMD_CRAMFS
+ imply FS_CRAMFS
config TARGET_TQM834X
bool "Support TQM834x"
diff --git a/arch/powerpc/cpu/mpc85xx/Kconfig b/arch/powerpc/cpu/mpc85xx/Kconfig
index 48896331284..31c09649946 100644
--- a/arch/powerpc/cpu/mpc85xx/Kconfig
+++ b/arch/powerpc/cpu/mpc85xx/Kconfig
@@ -322,6 +322,7 @@ config TARGET_KMP204X
select ARCH_P2041
select PHYS_64BIT
imply CMD_CRAMFS
+ imply FS_CRAMFS
config TARGET_XPEDITE520X
bool "Support xpedite520x"
diff --git a/cmd/Kconfig b/cmd/Kconfig
index 4145fcf056c..54513988e89 100644
--- a/cmd/Kconfig
+++ b/cmd/Kconfig
@@ -901,6 +901,7 @@ config CMD_CBFS
config CMD_CRAMFS
bool "Enable the 'cramfs' command"
+ depends on FS_CRAMFS
help
This provides commands for dealing with CRAMFS (Compressed ROM
filesystem). CRAMFS is useful when space is tight since files are
diff --git a/configs/UCP1020_SPIFLASH_defconfig b/configs/UCP1020_SPIFLASH_defconfig
index 4e5e0c16b8e..2b3e4bd042c 100644
--- a/configs/UCP1020_SPIFLASH_defconfig
+++ b/configs/UCP1020_SPIFLASH_defconfig
@@ -34,4 +34,5 @@ CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
CONFIG_USB=y
CONFIG_USB_STORAGE=y
+CONFIG_FS_CRAMFS=y
CONFIG_OF_LIBFDT=y
diff --git a/configs/UCP1020_defconfig b/configs/UCP1020_defconfig
index ae7cb256116..df0f8cc5f7b 100644
--- a/configs/UCP1020_defconfig
+++ b/configs/UCP1020_defconfig
@@ -34,4 +34,5 @@ CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
CONFIG_USB=y
CONFIG_USB_STORAGE=y
+CONFIG_FS_CRAMFS=y
CONFIG_OF_LIBFDT=y
diff --git a/configs/sandbox_defconfig b/configs/sandbox_defconfig
index d6966d32c42..7db9807e611 100644
--- a/configs/sandbox_defconfig
+++ b/configs/sandbox_defconfig
@@ -169,6 +169,7 @@ CONFIG_CONSOLE_TRUETYPE=y
CONFIG_CONSOLE_TRUETYPE_CANTORAONE=y
CONFIG_VIDEO_SANDBOX_SDL=y
CONFIG_FS_CBFS=y
+CONFIG_FS_CRAMFS=y
CONFIG_CMD_DHRYSTONE=y
CONFIG_TPM=y
CONFIG_LZ4=y
diff --git a/configs/sandbox_noblk_defconfig b/configs/sandbox_noblk_defconfig
index 06ca3c652bc..d051fde990f 100644
--- a/configs/sandbox_noblk_defconfig
+++ b/configs/sandbox_noblk_defconfig
@@ -171,6 +171,7 @@ CONFIG_CONSOLE_TRUETYPE=y
CONFIG_CONSOLE_TRUETYPE_CANTORAONE=y
CONFIG_VIDEO_SANDBOX_SDL=y
CONFIG_FS_CBFS=y
+CONFIG_FS_CRAMFS=y
CONFIG_CMD_DHRYSTONE=y
CONFIG_TPM=y
CONFIG_LZ4=y
diff --git a/configs/sandbox_spl_defconfig b/configs/sandbox_spl_defconfig
index a8ddb99c095..ef41fce104a 100644
--- a/configs/sandbox_spl_defconfig
+++ b/configs/sandbox_spl_defconfig
@@ -175,6 +175,7 @@ CONFIG_CONSOLE_TRUETYPE=y
CONFIG_CONSOLE_TRUETYPE_CANTORAONE=y
CONFIG_VIDEO_SANDBOX_SDL=y
CONFIG_FS_CBFS=y
+CONFIG_FS_CRAMFS=y
CONFIG_CMD_DHRYSTONE=y
CONFIG_TPM=y
CONFIG_LZ4=y
diff --git a/fs/cramfs/Kconfig b/fs/cramfs/Kconfig
index e69de29bb2d..6c9f63d6fa7 100644
--- a/fs/cramfs/Kconfig
+++ b/fs/cramfs/Kconfig
@@ -0,0 +1,7 @@
+config FS_CRAMFS
+ bool "Enable CRAMFS filesystem support"
+ help
+ This provides support for reading images from CRAMFS (Compressed ROM
+ filesystem). CRAMFS is useful when space is tight since files are
+ compressed. You can also enable CMD_CRAMFS to get command-line
+ access.
--
GitLab
From 279e7c491b140d69fb1a87c7ab507fdc6978568b Mon Sep 17 00:00:00 2001
From: Simon Glass <sjg@chromium.org>
Date: Wed, 26 Apr 2017 22:28:05 -0600
Subject: [PATCH 183/282] Kconfig: Drop CONFIG_CMD_DEFAULTENV_VARS
This option does not exist in U-Boot. Drop it.
Signed-off-by: Simon Glass <sjg@chromium.org>
---
include/configs/km/keymile-common.h | 1 -
scripts/config_whitelist.txt | 1 -
2 files changed, 2 deletions(-)
diff --git a/include/configs/km/keymile-common.h b/include/configs/km/keymile-common.h
index 40d5d53c2bd..872e2b3403a 100644
--- a/include/configs/km/keymile-common.h
+++ b/include/configs/km/keymile-common.h
@@ -13,7 +13,6 @@
/*
* Command line configuration.
*/
-#define CONFIG_CMD_DEFAULTENV_VARS
#define CONFIG_CMD_IMMAP
#define CONFIG_CMD_EEPROM
#define CONFIG_CMD_JFFS2
diff --git a/scripts/config_whitelist.txt b/scripts/config_whitelist.txt
index dc90398c265..bbb0a1dec09 100644
--- a/scripts/config_whitelist.txt
+++ b/scripts/config_whitelist.txt
@@ -394,7 +394,6 @@ CONFIG_CMDLINE_EDITING
CONFIG_CMDLINE_PS_SUPPORT
CONFIG_CMDLINE_TAG
CONFIG_CMD_DATE
-CONFIG_CMD_DEFAULTENV_VARS
CONFIG_CMD_DEKBLOB
CONFIG_CMD_DFL
CONFIG_CMD_DIAG
--
GitLab
From d569c95ec0daf8749ac07414f979bb9483d2d8a6 Mon Sep 17 00:00:00 2001
From: Simon Glass <sjg@chromium.org>
Date: Wed, 26 Apr 2017 22:28:06 -0600
Subject: [PATCH 184/282] Convert CONFIG_CMD_DEKBLOB to Kconfig
This converts the following to Kconfig:
CONFIG_CMD_DEKBLOB
Note: This option does not seem to actually be enabled by any board.
Signed-off-by: Simon Glass <sjg@chromium.org>
[trini: imply under SECURE_BOOT for mx5/6/7]
Signed-off-by: Tom Rini <trini@konsulko.com>
---
arch/arm/imx-common/Kconfig | 9 +++++++++
include/configs/mx6_common.h | 1 -
include/configs/mx7_common.h | 1 -
scripts/config_whitelist.txt | 1 -
4 files changed, 9 insertions(+), 3 deletions(-)
diff --git a/arch/arm/imx-common/Kconfig b/arch/arm/imx-common/Kconfig
index 5eb3ba01416..25cbd12c899 100644
--- a/arch/arm/imx-common/Kconfig
+++ b/arch/arm/imx-common/Kconfig
@@ -29,6 +29,7 @@ config SECURE_BOOT
bool "Support i.MX HAB features"
depends on ARCH_MX7 || ARCH_MX6 || ARCH_MX5
select FSL_CAAM
+ imply CMD_DEKBLOB
help
This option enables the support for secure boot (HAB).
See doc/README.mxc_hab for more details.
@@ -46,3 +47,11 @@ config CMD_BMODE
on U-Boot. Using the reset button or running bmode normal
will set it back to normal. This command currently
supports i.MX53 and i.MX6.
+
+config CMD_DEKBLOB
+ bool "Support the 'dek_blob' command"
+ help
+ This enables the 'dek_blob' command which is used with the
+ Freescale secure boot mechanism. This command encapsulates and
+ creates a blob of data. See also CMD_BLOB and doc/README.mxc_hab for
+ more information.
diff --git a/include/configs/mx6_common.h b/include/configs/mx6_common.h
index c841ca91158..21ac3fc357a 100644
--- a/include/configs/mx6_common.h
+++ b/include/configs/mx6_common.h
@@ -84,7 +84,6 @@
/* Secure boot (HAB) support */
#ifdef CONFIG_SECURE_BOOT
#define CONFIG_CSF_SIZE 0x2000
-#define CONFIG_CMD_DEKBLOB
#ifdef CONFIG_SPL_BUILD
#define CONFIG_SPL_DRIVERS_MISC_SUPPORT
#endif
diff --git a/include/configs/mx7_common.h b/include/configs/mx7_common.h
index e2b05caa945..9a20c7732dd 100644
--- a/include/configs/mx7_common.h
+++ b/include/configs/mx7_common.h
@@ -67,7 +67,6 @@
/* Secure boot (HAB) support */
#ifdef CONFIG_SECURE_BOOT
#define CONFIG_CSF_SIZE 0x2000
-#define CONFIG_CMD_DEKBLOB
#endif
#endif
diff --git a/scripts/config_whitelist.txt b/scripts/config_whitelist.txt
index bbb0a1dec09..3c1feed2539 100644
--- a/scripts/config_whitelist.txt
+++ b/scripts/config_whitelist.txt
@@ -394,7 +394,6 @@ CONFIG_CMDLINE_EDITING
CONFIG_CMDLINE_PS_SUPPORT
CONFIG_CMDLINE_TAG
CONFIG_CMD_DATE
-CONFIG_CMD_DEKBLOB
CONFIG_CMD_DFL
CONFIG_CMD_DIAG
CONFIG_CMD_DISPLAY
--
GitLab
From 10c01337d3ad0d4878b4b5fb14145a8e6e6f63c7 Mon Sep 17 00:00:00 2001
From: Simon Glass <sjg@chromium.org>
Date: Wed, 26 Apr 2017 22:28:07 -0600
Subject: [PATCH 185/282] Kconfig: Drop CONFIG_CMD_DFL
This option is not used in U-Boot. Drop it.
Signed-off-by: Simon Glass <sjg@chromium.org>
---
include/configs/armadillo-800eva.h | 1 -
include/configs/rcar-gen2-common.h | 1 -
include/configs/rcar-gen3-common.h | 1 -
include/configs/sh7752evb.h | 1 -
include/configs/sh7753evb.h | 1 -
scripts/config_whitelist.txt | 1 -
6 files changed, 6 deletions(-)
diff --git a/include/configs/armadillo-800eva.h b/include/configs/armadillo-800eva.h
index 7e81c5e349c..2023895c3ef 100644
--- a/include/configs/armadillo-800eva.h
+++ b/include/configs/armadillo-800eva.h
@@ -16,7 +16,6 @@
#include <asm/arch/rmobile.h>
-#define CONFIG_CMD_DFL
#define CONFIG_CMD_SDRAM
#define BOARD_LATE_INIT
diff --git a/include/configs/rcar-gen2-common.h b/include/configs/rcar-gen2-common.h
index afa37a57792..3a719c0b37d 100644
--- a/include/configs/rcar-gen2-common.h
+++ b/include/configs/rcar-gen2-common.h
@@ -11,7 +11,6 @@
#include <asm/arch/rmobile.h>
-#define CONFIG_CMD_DFL
#define CONFIG_CMD_SDRAM
/* Support File sytems */
diff --git a/include/configs/rcar-gen3-common.h b/include/configs/rcar-gen3-common.h
index 36e07dc73dc..056aea3fdb0 100644
--- a/include/configs/rcar-gen3-common.h
+++ b/include/configs/rcar-gen3-common.h
@@ -12,7 +12,6 @@
#include <asm/arch/rmobile.h>
-#define CONFIG_CMD_DFL
#define CONFIG_CMD_SDRAM
#define CONFIG_CMD_FAT
#define CONFIG_CMD_EXT2
diff --git a/include/configs/sh7752evb.h b/include/configs/sh7752evb.h
index 0cfcbab48a6..3342a2966c3 100644
--- a/include/configs/sh7752evb.h
+++ b/include/configs/sh7752evb.h
@@ -14,7 +14,6 @@
#define CONFIG_SYS_TEXT_BASE 0x5ff80000
-#define CONFIG_CMD_DFL
#define CONFIG_CMD_SDRAM
#define CONFIG_BOOTARGS "console=ttySC2,115200 root=/dev/nfs ip=dhcp"
diff --git a/include/configs/sh7753evb.h b/include/configs/sh7753evb.h
index 58aad05358e..78670422f7a 100644
--- a/include/configs/sh7753evb.h
+++ b/include/configs/sh7753evb.h
@@ -14,7 +14,6 @@
#define CONFIG_SYS_TEXT_BASE 0x5ff80000
-#define CONFIG_CMD_DFL
#define CONFIG_CMD_SDRAM
#define CONFIG_BOOTARGS "console=ttySC2,115200 root=/dev/nfs ip=dhcp"
diff --git a/scripts/config_whitelist.txt b/scripts/config_whitelist.txt
index 3c1feed2539..08f5d9c5ba9 100644
--- a/scripts/config_whitelist.txt
+++ b/scripts/config_whitelist.txt
@@ -394,7 +394,6 @@ CONFIG_CMDLINE_EDITING
CONFIG_CMDLINE_PS_SUPPORT
CONFIG_CMDLINE_TAG
CONFIG_CMD_DATE
-CONFIG_CMD_DFL
CONFIG_CMD_DIAG
CONFIG_CMD_DISPLAY
CONFIG_CMD_DS4510
--
GitLab
From 3bd25cb512b912e9c8e9074467e730a73f87371d Mon Sep 17 00:00:00 2001
From: Simon Glass <sjg@chromium.org>
Date: Wed, 26 Apr 2017 22:28:08 -0600
Subject: [PATCH 186/282] Convert CONFIG_CMD_DIAG to Kconfig
This converts the following to Kconfig:
CONFIG_CMD_DIAG
Signed-off-by: Simon Glass <sjg@chromium.org>
[trini: imply CMD_DIAG on some keymile configs]
Signed-off-by: Tom Rini <trini@konsulko.com>
---
arch/arm/mach-kirkwood/Kconfig | 1 +
arch/powerpc/cpu/mpc83xx/Kconfig | 1 +
cmd/Kconfig | 8 ++++++++
configs/MiniFAP_defconfig | 1 +
configs/TQM5200S_HIGHBOOT_defconfig | 1 +
configs/TQM5200S_defconfig | 1 +
configs/TQM5200_B_HIGHBOOT_defconfig | 1 +
configs/TQM5200_B_defconfig | 1 +
configs/TQM5200_STK100_defconfig | 1 +
configs/TQM5200_defconfig | 1 +
configs/acadia_defconfig | 1 +
configs/amcore_defconfig | 1 +
configs/bamboo_defconfig | 1 +
configs/bubinga_defconfig | 1 +
configs/calimain_defconfig | 1 +
configs/charon_defconfig | 1 +
configs/cm5200_defconfig | 1 +
configs/da850_am18xxevm_defconfig | 1 +
configs/da850evm_defconfig | 1 +
configs/da850evm_direct_nor_defconfig | 1 +
configs/digsy_mtc_RAMBOOT_defconfig | 1 +
configs/digsy_mtc_defconfig | 1 +
configs/digsy_mtc_rev5_RAMBOOT_defconfig | 1 +
configs/digsy_mtc_rev5_defconfig | 1 +
configs/ea20_defconfig | 1 +
configs/fo300_defconfig | 1 +
configs/gdppc440etx_defconfig | 1 +
configs/haleakala_defconfig | 1 +
configs/io64_defconfig | 1 +
configs/iocon_defconfig | 1 +
configs/ipam390_defconfig | 1 +
configs/kilauea_defconfig | 1 +
configs/kmtegr1_defconfig | 1 +
configs/kmvect1_defconfig | 1 +
configs/legoev3_defconfig | 1 +
configs/luan_defconfig | 1 +
configs/lwmon5_defconfig | 1 +
configs/makalu_defconfig | 1 +
configs/omapl138_lcdk_defconfig | 5 +++--
configs/pengwyn_defconfig | 1 +
configs/rainier_defconfig | 1 +
configs/rainier_ramboot_defconfig | 1 +
configs/redwood_defconfig | 1 +
configs/sequoia_defconfig | 1 +
configs/sequoia_ramboot_defconfig | 1 +
configs/sycamore_defconfig | 1 +
configs/v38b_defconfig | 1 +
configs/walnut_defconfig | 1 +
configs/xilinx-ppc405-generic_defconfig | 1 +
configs/xilinx-ppc440-generic_defconfig | 1 +
configs/xtfpga_defconfig | 1 +
configs/yellowstone_defconfig | 1 +
configs/yosemite_defconfig | 1 +
configs/yucca_defconfig | 1 +
include/config_cmd_all.h | 1 -
include/configs/TQM5200.h | 4 ----
include/configs/amcc-common.h | 1 -
include/configs/amcore.h | 2 --
include/configs/calimain.h | 1 -
include/configs/cm5200.h | 1 -
include/configs/da850evm.h | 1 -
include/configs/digsy_mtc.h | 1 -
include/configs/dlvision-10g.h | 1 -
include/configs/dlvision.h | 1 -
include/configs/ea20.h | 1 -
include/configs/imx27lite-common.h | 1 -
include/configs/io.h | 1 -
include/configs/ipam390.h | 1 -
include/configs/km/km8309-common.h | 1 -
include/configs/km/km_arm.h | 1 -
include/configs/km8360.h | 1 -
include/configs/legoev3.h | 1 -
include/configs/lwmon5.h | 1 -
include/configs/neo.h | 1 -
include/configs/o2dnt-common.h | 3 ---
include/configs/omapl138_lcdk.h | 1 -
include/configs/pengwyn.h | 2 --
include/configs/v38b.h | 1 -
include/configs/xilinx-ppc.h | 1 -
include/configs/xtfpga.h | 1 -
scripts/config_whitelist.txt | 1 -
81 files changed, 63 insertions(+), 36 deletions(-)
diff --git a/arch/arm/mach-kirkwood/Kconfig b/arch/arm/mach-kirkwood/Kconfig
index 4a7e36e8fa4..2dd107a8b3b 100644
--- a/arch/arm/mach-kirkwood/Kconfig
+++ b/arch/arm/mach-kirkwood/Kconfig
@@ -35,6 +35,7 @@ config TARGET_KM_KIRKWOOD
bool "KM_KIRKWOOD Board"
select BOARD_LATE_INIT
imply CMD_CRAMFS
+ imply CMD_DIAG
imply FS_CRAMFS
config TARGET_NET2BIG_V2
diff --git a/arch/powerpc/cpu/mpc83xx/Kconfig b/arch/powerpc/cpu/mpc83xx/Kconfig
index 7ebc27cd28a..02e43bc5155 100644
--- a/arch/powerpc/cpu/mpc83xx/Kconfig
+++ b/arch/powerpc/cpu/mpc83xx/Kconfig
@@ -65,6 +65,7 @@ config TARGET_IDS8313
config TARGET_KM8360
bool "Support km8360"
imply CMD_CRAMFS
+ imply CMD_DIAG
imply FS_CRAMFS
config TARGET_SUVD3
diff --git a/cmd/Kconfig b/cmd/Kconfig
index 54513988e89..334e531ffed 100644
--- a/cmd/Kconfig
+++ b/cmd/Kconfig
@@ -972,6 +972,14 @@ config CMD_BEDBUG
for some PowerPC processors. For details please see the
docuemntation in doc/README.beddbug
+config CMD_DIAG
+ bool "diag - Board diagnostics"
+ help
+ This command provides access to board diagnostic tests. These are
+ called Power-on Self Tests (POST). The command allows listing of
+ available tests and running either all the tests, or specific tests
+ identified by name.
+
endmenu
config CMD_UBI
diff --git a/configs/MiniFAP_defconfig b/configs/MiniFAP_defconfig
index 8c186f73121..ee9e99a80fd 100644
--- a/configs/MiniFAP_defconfig
+++ b/configs/MiniFAP_defconfig
@@ -21,6 +21,7 @@ CONFIG_CMD_BMP=y
CONFIG_CMD_BSP=y
CONFIG_CMD_EXT2=y
CONFIG_CMD_FAT=y
+CONFIG_CMD_DIAG=y
CONFIG_MAC_PARTITION=y
CONFIG_ISO_PARTITION=y
# CONFIG_MMC is not set
diff --git a/configs/TQM5200S_HIGHBOOT_defconfig b/configs/TQM5200S_HIGHBOOT_defconfig
index ea022e54d39..b2f5e5ebfb2 100644
--- a/configs/TQM5200S_HIGHBOOT_defconfig
+++ b/configs/TQM5200S_HIGHBOOT_defconfig
@@ -17,6 +17,7 @@ CONFIG_CMD_SNTP=y
CONFIG_CMD_BSP=y
CONFIG_CMD_EXT2=y
CONFIG_CMD_FAT=y
+CONFIG_CMD_DIAG=y
CONFIG_MAC_PARTITION=y
CONFIG_ISO_PARTITION=y
# CONFIG_MMC is not set
diff --git a/configs/TQM5200S_defconfig b/configs/TQM5200S_defconfig
index 8cddc8f9326..fc876b957ee 100644
--- a/configs/TQM5200S_defconfig
+++ b/configs/TQM5200S_defconfig
@@ -17,6 +17,7 @@ CONFIG_CMD_SNTP=y
CONFIG_CMD_BSP=y
CONFIG_CMD_EXT2=y
CONFIG_CMD_FAT=y
+CONFIG_CMD_DIAG=y
CONFIG_MAC_PARTITION=y
CONFIG_ISO_PARTITION=y
# CONFIG_MMC is not set
diff --git a/configs/TQM5200_B_HIGHBOOT_defconfig b/configs/TQM5200_B_HIGHBOOT_defconfig
index b0c1252e62c..5b5544aeeaa 100644
--- a/configs/TQM5200_B_HIGHBOOT_defconfig
+++ b/configs/TQM5200_B_HIGHBOOT_defconfig
@@ -21,6 +21,7 @@ CONFIG_CMD_BMP=y
CONFIG_CMD_BSP=y
CONFIG_CMD_EXT2=y
CONFIG_CMD_FAT=y
+CONFIG_CMD_DIAG=y
CONFIG_MAC_PARTITION=y
CONFIG_ISO_PARTITION=y
# CONFIG_MMC is not set
diff --git a/configs/TQM5200_B_defconfig b/configs/TQM5200_B_defconfig
index 71fb84049cf..11359746a69 100644
--- a/configs/TQM5200_B_defconfig
+++ b/configs/TQM5200_B_defconfig
@@ -21,6 +21,7 @@ CONFIG_CMD_BMP=y
CONFIG_CMD_BSP=y
CONFIG_CMD_EXT2=y
CONFIG_CMD_FAT=y
+CONFIG_CMD_DIAG=y
CONFIG_MAC_PARTITION=y
CONFIG_ISO_PARTITION=y
# CONFIG_MMC is not set
diff --git a/configs/TQM5200_STK100_defconfig b/configs/TQM5200_STK100_defconfig
index b2c14089d6d..c1f4753af3f 100644
--- a/configs/TQM5200_STK100_defconfig
+++ b/configs/TQM5200_STK100_defconfig
@@ -21,6 +21,7 @@ CONFIG_CMD_BMP=y
CONFIG_CMD_BSP=y
CONFIG_CMD_EXT2=y
CONFIG_CMD_FAT=y
+CONFIG_CMD_DIAG=y
CONFIG_MAC_PARTITION=y
CONFIG_ISO_PARTITION=y
# CONFIG_MMC is not set
diff --git a/configs/TQM5200_defconfig b/configs/TQM5200_defconfig
index 2cc80573a93..a1d1ce2b2ee 100644
--- a/configs/TQM5200_defconfig
+++ b/configs/TQM5200_defconfig
@@ -20,6 +20,7 @@ CONFIG_CMD_BMP=y
CONFIG_CMD_BSP=y
CONFIG_CMD_EXT2=y
CONFIG_CMD_FAT=y
+CONFIG_CMD_DIAG=y
CONFIG_MAC_PARTITION=y
CONFIG_ISO_PARTITION=y
# CONFIG_MMC is not set
diff --git a/configs/acadia_defconfig b/configs/acadia_defconfig
index 0f675539877..a30e34dea38 100644
--- a/configs/acadia_defconfig
+++ b/configs/acadia_defconfig
@@ -15,6 +15,7 @@ CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
+CONFIG_CMD_DIAG=y
CONFIG_MAC_PARTITION=y
CONFIG_ISO_PARTITION=y
# CONFIG_MMC is not set
diff --git a/configs/amcore_defconfig b/configs/amcore_defconfig
index 420fdfa1cc0..e8c6adccb4c 100644
--- a/configs/amcore_defconfig
+++ b/configs/amcore_defconfig
@@ -15,6 +15,7 @@ CONFIG_LOOPW=y
# CONFIG_CMD_NFS is not set
CONFIG_CMD_CACHE=y
CONFIG_CMD_TIMER=y
+CONFIG_CMD_DIAG=y
CONFIG_DM=y
CONFIG_MTD_NOR_FLASH=y
CONFIG_DM_SERIAL=y
diff --git a/configs/bamboo_defconfig b/configs/bamboo_defconfig
index 45e54937d3b..2322337ee3e 100644
--- a/configs/bamboo_defconfig
+++ b/configs/bamboo_defconfig
@@ -19,6 +19,7 @@ CONFIG_CMD_SNTP=y
CONFIG_CMD_CACHE=y
CONFIG_CMD_EXT2=y
CONFIG_CMD_FAT=y
+CONFIG_CMD_DIAG=y
CONFIG_MAC_PARTITION=y
CONFIG_ISO_PARTITION=y
# CONFIG_MMC is not set
diff --git a/configs/bubinga_defconfig b/configs/bubinga_defconfig
index 376ffb3863c..9a5cbd34f63 100644
--- a/configs/bubinga_defconfig
+++ b/configs/bubinga_defconfig
@@ -15,6 +15,7 @@ CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_CMD_SNTP=y
+CONFIG_CMD_DIAG=y
# CONFIG_MMC is not set
CONFIG_MTD_NOR_FLASH=y
CONFIG_SYS_NS16550=y
diff --git a/configs/calimain_defconfig b/configs/calimain_defconfig
index c69e4436f12..489d85fc4f1 100644
--- a/configs/calimain_defconfig
+++ b/configs/calimain_defconfig
@@ -15,6 +15,7 @@ CONFIG_CMD_GPIO=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
+CONFIG_CMD_DIAG=y
# CONFIG_MMC is not set
CONFIG_MTD_NOR_FLASH=y
CONFIG_SYS_NS16550=y
diff --git a/configs/charon_defconfig b/configs/charon_defconfig
index 4e292349761..ec22a6368f2 100644
--- a/configs/charon_defconfig
+++ b/configs/charon_defconfig
@@ -20,6 +20,7 @@ CONFIG_CMD_BMP=y
CONFIG_CMD_BSP=y
CONFIG_CMD_EXT2=y
CONFIG_CMD_FAT=y
+CONFIG_CMD_DIAG=y
CONFIG_MAC_PARTITION=y
CONFIG_ISO_PARTITION=y
# CONFIG_MMC is not set
diff --git a/configs/cm5200_defconfig b/configs/cm5200_defconfig
index 5f691de2d32..b3db9a6fbbb 100644
--- a/configs/cm5200_defconfig
+++ b/configs/cm5200_defconfig
@@ -15,6 +15,7 @@ CONFIG_CMD_PING=y
CONFIG_CMD_SNTP=y
CONFIG_CMD_BSP=y
CONFIG_CMD_FAT=y
+CONFIG_CMD_DIAG=y
CONFIG_MAC_PARTITION=y
CONFIG_ISO_PARTITION=y
# CONFIG_MMC is not set
diff --git a/configs/da850_am18xxevm_defconfig b/configs/da850_am18xxevm_defconfig
index 9fd9a8a8911..d87310130c7 100644
--- a/configs/da850_am18xxevm_defconfig
+++ b/configs/da850_am18xxevm_defconfig
@@ -26,6 +26,7 @@ CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_CMD_EXT2=y
CONFIG_CMD_FAT=y
+CONFIG_CMD_DIAG=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_STMICRO=y
CONFIG_SPI_FLASH_WINBOND=y
diff --git a/configs/da850evm_defconfig b/configs/da850evm_defconfig
index aa792a144c4..f50a9499723 100644
--- a/configs/da850evm_defconfig
+++ b/configs/da850evm_defconfig
@@ -28,6 +28,7 @@ CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_CMD_EXT2=y
CONFIG_CMD_FAT=y
+CONFIG_CMD_DIAG=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_STMICRO=y
CONFIG_SPI_FLASH_WINBOND=y
diff --git a/configs/da850evm_direct_nor_defconfig b/configs/da850evm_direct_nor_defconfig
index e835f2459ce..1e17ce736a6 100644
--- a/configs/da850evm_direct_nor_defconfig
+++ b/configs/da850evm_direct_nor_defconfig
@@ -15,6 +15,7 @@ CONFIG_CMD_SF=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
+CONFIG_CMD_DIAG=y
# CONFIG_MMC is not set
CONFIG_MTD_NOR_FLASH=y
CONFIG_SPI_FLASH=y
diff --git a/configs/digsy_mtc_RAMBOOT_defconfig b/configs/digsy_mtc_RAMBOOT_defconfig
index 2a469587d9f..eb0e9471e00 100644
--- a/configs/digsy_mtc_RAMBOOT_defconfig
+++ b/configs/digsy_mtc_RAMBOOT_defconfig
@@ -23,6 +23,7 @@ CONFIG_CMD_BMP=y
CONFIG_CMD_CACHE=y
CONFIG_CMD_EXT2=y
CONFIG_CMD_FAT=y
+CONFIG_CMD_DIAG=y
# CONFIG_MMC is not set
CONFIG_MTD_NOR_FLASH=y
CONFIG_USB=y
diff --git a/configs/digsy_mtc_defconfig b/configs/digsy_mtc_defconfig
index 01f97554400..07587d3afc6 100644
--- a/configs/digsy_mtc_defconfig
+++ b/configs/digsy_mtc_defconfig
@@ -21,6 +21,7 @@ CONFIG_CMD_BMP=y
CONFIG_CMD_CACHE=y
CONFIG_CMD_EXT2=y
CONFIG_CMD_FAT=y
+CONFIG_CMD_DIAG=y
# CONFIG_MMC is not set
CONFIG_MTD_NOR_FLASH=y
CONFIG_USB=y
diff --git a/configs/digsy_mtc_rev5_RAMBOOT_defconfig b/configs/digsy_mtc_rev5_RAMBOOT_defconfig
index fb9e97c2e53..5d0d00a0197 100644
--- a/configs/digsy_mtc_rev5_RAMBOOT_defconfig
+++ b/configs/digsy_mtc_rev5_RAMBOOT_defconfig
@@ -23,6 +23,7 @@ CONFIG_CMD_BMP=y
CONFIG_CMD_CACHE=y
CONFIG_CMD_EXT2=y
CONFIG_CMD_FAT=y
+CONFIG_CMD_DIAG=y
# CONFIG_MMC is not set
CONFIG_MTD_NOR_FLASH=y
CONFIG_USB=y
diff --git a/configs/digsy_mtc_rev5_defconfig b/configs/digsy_mtc_rev5_defconfig
index dd1a649b6d3..11373277b48 100644
--- a/configs/digsy_mtc_rev5_defconfig
+++ b/configs/digsy_mtc_rev5_defconfig
@@ -23,6 +23,7 @@ CONFIG_CMD_BMP=y
CONFIG_CMD_CACHE=y
CONFIG_CMD_EXT2=y
CONFIG_CMD_FAT=y
+CONFIG_CMD_DIAG=y
# CONFIG_MMC is not set
CONFIG_MTD_NOR_FLASH=y
CONFIG_USB=y
diff --git a/configs/ea20_defconfig b/configs/ea20_defconfig
index 2e97bc432c9..be48626b3cc 100644
--- a/configs/ea20_defconfig
+++ b/configs/ea20_defconfig
@@ -25,6 +25,7 @@ CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_CMD_BMP=y
+CONFIG_CMD_DIAG=y
CONFIG_CMD_UBI=y
# CONFIG_MMC is not set
CONFIG_SPI_FLASH=y
diff --git a/configs/fo300_defconfig b/configs/fo300_defconfig
index d0728eb6515..f876dfad23c 100644
--- a/configs/fo300_defconfig
+++ b/configs/fo300_defconfig
@@ -23,6 +23,7 @@ CONFIG_CMD_BMP=y
CONFIG_CMD_BSP=y
CONFIG_CMD_EXT2=y
CONFIG_CMD_FAT=y
+CONFIG_CMD_DIAG=y
CONFIG_MAC_PARTITION=y
CONFIG_ISO_PARTITION=y
# CONFIG_MMC is not set
diff --git a/configs/gdppc440etx_defconfig b/configs/gdppc440etx_defconfig
index 5a3b1fc0af8..442f4564246 100644
--- a/configs/gdppc440etx_defconfig
+++ b/configs/gdppc440etx_defconfig
@@ -18,6 +18,7 @@ CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_CMD_CACHE=y
+CONFIG_CMD_DIAG=y
# CONFIG_MMC is not set
CONFIG_MTD_NOR_FLASH=y
# CONFIG_PCI_PNP is not set
diff --git a/configs/haleakala_defconfig b/configs/haleakala_defconfig
index 9e3d16dab9a..c8a72f625f6 100644
--- a/configs/haleakala_defconfig
+++ b/configs/haleakala_defconfig
@@ -18,6 +18,7 @@ CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_CMD_SNTP=y
+CONFIG_CMD_DIAG=y
# CONFIG_MMC is not set
CONFIG_MTD_NOR_FLASH=y
CONFIG_SYS_NS16550=y
diff --git a/configs/io64_defconfig b/configs/io64_defconfig
index 9701135f98a..9026ac87021 100644
--- a/configs/io64_defconfig
+++ b/configs/io64_defconfig
@@ -22,6 +22,7 @@ CONFIG_CMD_I2C=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
+CONFIG_CMD_DIAG=y
# CONFIG_MMC is not set
CONFIG_MTD_NOR_FLASH=y
# CONFIG_PCI is not set
diff --git a/configs/iocon_defconfig b/configs/iocon_defconfig
index 211a734e5f5..c74df944a6a 100644
--- a/configs/iocon_defconfig
+++ b/configs/iocon_defconfig
@@ -21,6 +21,7 @@ CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_CMD_CACHE=y
+CONFIG_CMD_DIAG=y
# CONFIG_MMC is not set
CONFIG_MTD_NOR_FLASH=y
# CONFIG_PCI is not set
diff --git a/configs/ipam390_defconfig b/configs/ipam390_defconfig
index d6869879d58..72ceb5ea433 100644
--- a/configs/ipam390_defconfig
+++ b/configs/ipam390_defconfig
@@ -21,6 +21,7 @@ CONFIG_CMD_ASKENV=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
+CONFIG_CMD_DIAG=y
CONFIG_CMD_UBI=y
# CONFIG_MMC is not set
CONFIG_SYS_NS16550=y
diff --git a/configs/kilauea_defconfig b/configs/kilauea_defconfig
index 2ec7fa84d54..28ed55182cd 100644
--- a/configs/kilauea_defconfig
+++ b/configs/kilauea_defconfig
@@ -18,6 +18,7 @@ CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_CMD_SNTP=y
+CONFIG_CMD_DIAG=y
# CONFIG_MMC is not set
CONFIG_MTD_NOR_FLASH=y
CONFIG_SYS_NS16550=y
diff --git a/configs/kmtegr1_defconfig b/configs/kmtegr1_defconfig
index 96107d91c6c..746af8c7247 100644
--- a/configs/kmtegr1_defconfig
+++ b/configs/kmtegr1_defconfig
@@ -15,6 +15,7 @@ CONFIG_CMD_I2C=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
+CONFIG_CMD_DIAG=y
CONFIG_CMD_UBI=y
# CONFIG_MMC is not set
CONFIG_MTD_NOR_FLASH=y
diff --git a/configs/kmvect1_defconfig b/configs/kmvect1_defconfig
index 07c18e17894..83650558b99 100644
--- a/configs/kmvect1_defconfig
+++ b/configs/kmvect1_defconfig
@@ -15,6 +15,7 @@ CONFIG_CMD_I2C=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
+CONFIG_CMD_DIAG=y
CONFIG_CMD_UBI=y
# CONFIG_MMC is not set
CONFIG_MTD_NOR_FLASH=y
diff --git a/configs/legoev3_defconfig b/configs/legoev3_defconfig
index 510c4c5bf64..86ff6a150dd 100644
--- a/configs/legoev3_defconfig
+++ b/configs/legoev3_defconfig
@@ -22,6 +22,7 @@ CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_CMD_EXT4=y
CONFIG_CMD_FAT=y
+CONFIG_CMD_DIAG=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_STMICRO=y
CONFIG_SYS_NS16550=y
diff --git a/configs/luan_defconfig b/configs/luan_defconfig
index d6e32207de6..1ee1e6f1352 100644
--- a/configs/luan_defconfig
+++ b/configs/luan_defconfig
@@ -15,6 +15,7 @@ CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_CMD_CACHE=y
+CONFIG_CMD_DIAG=y
# CONFIG_MMC is not set
CONFIG_MTD_NOR_FLASH=y
CONFIG_SYS_NS16550=y
diff --git a/configs/lwmon5_defconfig b/configs/lwmon5_defconfig
index 1fbed29032c..7e524b0f53c 100644
--- a/configs/lwmon5_defconfig
+++ b/configs/lwmon5_defconfig
@@ -22,6 +22,7 @@ CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_CMD_BMP=y
CONFIG_CMD_FAT=y
+CONFIG_CMD_DIAG=y
CONFIG_MAC_PARTITION=y
CONFIG_ISO_PARTITION=y
# CONFIG_MMC is not set
diff --git a/configs/makalu_defconfig b/configs/makalu_defconfig
index 7dfd55ba8fb..feba0e7e234 100644
--- a/configs/makalu_defconfig
+++ b/configs/makalu_defconfig
@@ -16,6 +16,7 @@ CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_CMD_SNTP=y
+CONFIG_CMD_DIAG=y
# CONFIG_MMC is not set
CONFIG_MTD_NOR_FLASH=y
CONFIG_SYS_NS16550=y
diff --git a/configs/omapl138_lcdk_defconfig b/configs/omapl138_lcdk_defconfig
index 7c8228bf5bc..7a5a78f4944 100644
--- a/configs/omapl138_lcdk_defconfig
+++ b/configs/omapl138_lcdk_defconfig
@@ -20,15 +20,16 @@ CONFIG_CMD_BOOTZ=y
CONFIG_CMD_ASKENV=y
# CONFIG_CMD_FLASH is not set
CONFIG_CMD_MMC=y
+CONFIG_CMD_PART=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_CMD_EXT2=y
CONFIG_CMD_FAT=y
-CONFIG_CMD_UBI=y
CONFIG_CMD_FS_GENERIC=y
-CONFIG_CMD_PART=y
+CONFIG_CMD_DIAG=y
+CONFIG_CMD_UBI=y
CONFIG_SYS_NAND_U_BOOT_LOCATIONS=y
CONFIG_SYS_NAND_U_BOOT_OFFS=0x28000
CONFIG_SPI_FLASH=y
diff --git a/configs/pengwyn_defconfig b/configs/pengwyn_defconfig
index 5dcb46b7268..4c46f1ebdd8 100644
--- a/configs/pengwyn_defconfig
+++ b/configs/pengwyn_defconfig
@@ -45,6 +45,7 @@ CONFIG_CMD_EXT4=y
CONFIG_CMD_EXT4_WRITE=y
CONFIG_CMD_FAT=y
CONFIG_CMD_FS_GENERIC=y
+CONFIG_CMD_DIAG=y
CONFIG_ISO_PARTITION=y
CONFIG_EFI_PARTITION=y
CONFIG_MMC_OMAP_HS=y
diff --git a/configs/rainier_defconfig b/configs/rainier_defconfig
index 0a0b4ddd9f7..be2beb72a9e 100644
--- a/configs/rainier_defconfig
+++ b/configs/rainier_defconfig
@@ -19,6 +19,7 @@ CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_CMD_CACHE=y
CONFIG_CMD_FAT=y
+CONFIG_CMD_DIAG=y
CONFIG_MAC_PARTITION=y
CONFIG_ISO_PARTITION=y
# CONFIG_MMC is not set
diff --git a/configs/rainier_ramboot_defconfig b/configs/rainier_ramboot_defconfig
index 6690e9b5688..0c0559a3afd 100644
--- a/configs/rainier_ramboot_defconfig
+++ b/configs/rainier_ramboot_defconfig
@@ -19,6 +19,7 @@ CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_CMD_CACHE=y
CONFIG_CMD_FAT=y
+CONFIG_CMD_DIAG=y
CONFIG_MAC_PARTITION=y
CONFIG_ISO_PARTITION=y
# CONFIG_MMC is not set
diff --git a/configs/redwood_defconfig b/configs/redwood_defconfig
index 182da740966..425b2fe98cc 100644
--- a/configs/redwood_defconfig
+++ b/configs/redwood_defconfig
@@ -15,6 +15,7 @@ CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_CMD_CACHE=y
+CONFIG_CMD_DIAG=y
# CONFIG_MMC is not set
CONFIG_MTD_NOR_FLASH=y
# CONFIG_PCI is not set
diff --git a/configs/sequoia_defconfig b/configs/sequoia_defconfig
index 628cdd8b05b..b21e369473d 100644
--- a/configs/sequoia_defconfig
+++ b/configs/sequoia_defconfig
@@ -20,6 +20,7 @@ CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_CMD_CACHE=y
CONFIG_CMD_FAT=y
+CONFIG_CMD_DIAG=y
CONFIG_MAC_PARTITION=y
CONFIG_ISO_PARTITION=y
# CONFIG_MMC is not set
diff --git a/configs/sequoia_ramboot_defconfig b/configs/sequoia_ramboot_defconfig
index ddafa275812..ffdf6c4787a 100644
--- a/configs/sequoia_ramboot_defconfig
+++ b/configs/sequoia_ramboot_defconfig
@@ -20,6 +20,7 @@ CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_CMD_CACHE=y
CONFIG_CMD_FAT=y
+CONFIG_CMD_DIAG=y
CONFIG_MAC_PARTITION=y
CONFIG_ISO_PARTITION=y
# CONFIG_MMC is not set
diff --git a/configs/sycamore_defconfig b/configs/sycamore_defconfig
index 6880ae8b6dc..1e660ab01ed 100644
--- a/configs/sycamore_defconfig
+++ b/configs/sycamore_defconfig
@@ -15,6 +15,7 @@ CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_CMD_SNTP=y
+CONFIG_CMD_DIAG=y
# CONFIG_MMC is not set
CONFIG_MTD_NOR_FLASH=y
CONFIG_SYS_NS16550=y
diff --git a/configs/v38b_defconfig b/configs/v38b_defconfig
index 9440b8c26a5..94706288234 100644
--- a/configs/v38b_defconfig
+++ b/configs/v38b_defconfig
@@ -10,6 +10,7 @@ CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_CMD_FAT=y
+CONFIG_CMD_DIAG=y
CONFIG_MAC_PARTITION=y
CONFIG_LED_STATUS=y
CONFIG_LED_STATUS0=y
diff --git a/configs/walnut_defconfig b/configs/walnut_defconfig
index 6880ae8b6dc..1e660ab01ed 100644
--- a/configs/walnut_defconfig
+++ b/configs/walnut_defconfig
@@ -15,6 +15,7 @@ CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_CMD_SNTP=y
+CONFIG_CMD_DIAG=y
# CONFIG_MMC is not set
CONFIG_MTD_NOR_FLASH=y
CONFIG_SYS_NS16550=y
diff --git a/configs/xilinx-ppc405-generic_defconfig b/configs/xilinx-ppc405-generic_defconfig
index b109be5436b..6aa049c4500 100644
--- a/configs/xilinx-ppc405-generic_defconfig
+++ b/configs/xilinx-ppc405-generic_defconfig
@@ -18,6 +18,7 @@ CONFIG_LOOPW=y
# CONFIG_CMD_NET is not set
# CONFIG_CMD_NFS is not set
CONFIG_CMD_CACHE=y
+CONFIG_CMD_DIAG=y
CONFIG_OF_EMBED=y
# CONFIG_MMC is not set
CONFIG_MTD_NOR_FLASH=y
diff --git a/configs/xilinx-ppc440-generic_defconfig b/configs/xilinx-ppc440-generic_defconfig
index 723da699730..c9a1e2b087a 100644
--- a/configs/xilinx-ppc440-generic_defconfig
+++ b/configs/xilinx-ppc440-generic_defconfig
@@ -17,6 +17,7 @@ CONFIG_CMD_TFTPPUT=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_PING=y
CONFIG_CMD_CACHE=y
+CONFIG_CMD_DIAG=y
CONFIG_OF_EMBED=y
CONFIG_NETCONSOLE=y
# CONFIG_MMC is not set
diff --git a/configs/xtfpga_defconfig b/configs/xtfpga_defconfig
index bb63e562527..c797c257d0a 100644
--- a/configs/xtfpga_defconfig
+++ b/configs/xtfpga_defconfig
@@ -10,6 +10,7 @@ CONFIG_AUTOBOOT_STOP_STR=" "
CONFIG_CMD_ASKENV=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_PING=y
+CONFIG_CMD_DIAG=y
CONFIG_DM=y
# CONFIG_DM_WARN is not set
# CONFIG_DM_DEVICE_REMOVE is not set
diff --git a/configs/yellowstone_defconfig b/configs/yellowstone_defconfig
index 8331a2d5574..1eb3eef3ad1 100644
--- a/configs/yellowstone_defconfig
+++ b/configs/yellowstone_defconfig
@@ -16,6 +16,7 @@ CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_CMD_CACHE=y
+CONFIG_CMD_DIAG=y
CONFIG_MAC_PARTITION=y
CONFIG_DOS_PARTITION=y
CONFIG_ISO_PARTITION=y
diff --git a/configs/yosemite_defconfig b/configs/yosemite_defconfig
index f185a4c11c7..237a7ca5a77 100644
--- a/configs/yosemite_defconfig
+++ b/configs/yosemite_defconfig
@@ -19,6 +19,7 @@ CONFIG_CMD_PING=y
CONFIG_CMD_CACHE=y
CONFIG_CMD_EXT2=y
CONFIG_CMD_FAT=y
+CONFIG_CMD_DIAG=y
CONFIG_MAC_PARTITION=y
CONFIG_ISO_PARTITION=y
# CONFIG_MMC is not set
diff --git a/configs/yucca_defconfig b/configs/yucca_defconfig
index 68ce67c174e..10fbafcb4b1 100644
--- a/configs/yucca_defconfig
+++ b/configs/yucca_defconfig
@@ -15,6 +15,7 @@ CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_CMD_CACHE=y
+CONFIG_CMD_DIAG=y
# CONFIG_MMC is not set
CONFIG_MTD_NOR_FLASH=y
CONFIG_SYS_NS16550=y
diff --git a/include/config_cmd_all.h b/include/config_cmd_all.h
index d40e18f65d4..39e02c25a5c 100644
--- a/include/config_cmd_all.h
+++ b/include/config_cmd_all.h
@@ -14,7 +14,6 @@
*/
#define CONFIG_CMD_DATE /* support for RTC, date/time...*/
-#define CONFIG_CMD_DIAG /* Diagnostics */
#define CONFIG_CMD_DISPLAY /* Display support */
#define CONFIG_CMD_DTT /* Digital Therm and Thermostat */
#define CONFIG_CMD_EEPROM /* EEPROM read/write support */
diff --git a/include/configs/TQM5200.h b/include/configs/TQM5200.h
index 0fdc62ec149..97c6cbf0490 100644
--- a/include/configs/TQM5200.h
+++ b/include/configs/TQM5200.h
@@ -165,10 +165,6 @@
#define CONFIG_CFG_FAT
#endif
-#ifdef CONFIG_POST
- #define CONFIG_CMD_DIAG
-#endif
-
#define CONFIG_TIMESTAMP /* display image timestamps */
#if (CONFIG_SYS_TEXT_BASE != 0xFFF00000)
diff --git a/include/configs/amcc-common.h b/include/configs/amcc-common.h
index 0f0fe4bedd2..01406640b03 100644
--- a/include/configs/amcc-common.h
+++ b/include/configs/amcc-common.h
@@ -51,7 +51,6 @@
*/
#if defined(CONFIG_440)
#endif
-#define CONFIG_CMD_DIAG
#define CONFIG_CMD_EEPROM
#define CONFIG_CMD_IRQ
#define CONFIG_CMD_REGINFO
diff --git a/include/configs/amcore.h b/include/configs/amcore.h
index 06d08d44830..acae6914e59 100644
--- a/include/configs/amcore.h
+++ b/include/configs/amcore.h
@@ -30,8 +30,6 @@
"erase 0xfff00000 0xffffffff; " \
"cp.b 0x20000 0xfff00000 ${filesize}\0"
-#define CONFIG_CMD_DIAG
-
/* undef to save memory */
#undef CONFIG_SYS_LONGHELP
diff --git a/include/configs/calimain.h b/include/configs/calimain.h
index a4ff1e89950..425a38f5519 100644
--- a/include/configs/calimain.h
+++ b/include/configs/calimain.h
@@ -301,7 +301,6 @@
* U-Boot commands
*/
#define CONFIG_CMD_ENV
-#define CONFIG_CMD_DIAG
#define CONFIG_CMD_SAVES
#ifndef CONFIG_DRIVER_TI_EMAC
diff --git a/include/configs/cm5200.h b/include/configs/cm5200.h
index 89a2d229da5..9d0cb52ba64 100644
--- a/include/configs/cm5200.h
+++ b/include/configs/cm5200.h
@@ -22,7 +22,6 @@
* Supported commands
*/
#define CONFIG_CMD_DATE
-#define CONFIG_CMD_DIAG
#define CONFIG_CMD_JFFS2
#define CONFIG_CMD_REGINFO
diff --git a/include/configs/da850evm.h b/include/configs/da850evm.h
index 3ce905859e9..9442c05943b 100644
--- a/include/configs/da850evm.h
+++ b/include/configs/da850evm.h
@@ -274,7 +274,6 @@
* U-Boot commands
*/
#define CONFIG_CMD_ENV
-#define CONFIG_CMD_DIAG
#define CONFIG_CMD_SAVES
#ifdef CONFIG_CMD_BDI
diff --git a/include/configs/digsy_mtc.h b/include/configs/digsy_mtc.h
index 00578f0d8c4..f08a485f926 100644
--- a/include/configs/digsy_mtc.h
+++ b/include/configs/digsy_mtc.h
@@ -86,7 +86,6 @@
* Command line configuration.
*/
#define CONFIG_CMD_DATE
-#define CONFIG_CMD_DIAG
#define CONFIG_CMD_EEPROM
#define CONFIG_CMD_IDE
#define CONFIG_CMD_IRQ
diff --git a/include/configs/dlvision-10g.h b/include/configs/dlvision-10g.h
index 6b3cd15cb65..e32651f5411 100644
--- a/include/configs/dlvision-10g.h
+++ b/include/configs/dlvision-10g.h
@@ -58,7 +58,6 @@
* Commands additional to the ones defined in amcc-common.h
*/
#define CONFIG_CMD_DTT
-#undef CONFIG_CMD_DIAG
#undef CONFIG_CMD_EEPROM
#undef CONFIG_CMD_IRQ
diff --git a/include/configs/dlvision.h b/include/configs/dlvision.h
index 6269768df1a..2b7d62b0348 100644
--- a/include/configs/dlvision.h
+++ b/include/configs/dlvision.h
@@ -56,7 +56,6 @@
* Commands additional to the ones defined in amcc-common.h
*/
#define CONFIG_CMD_DTT
-#undef CONFIG_CMD_DIAG
#undef CONFIG_CMD_EEPROM
#undef CONFIG_CMD_IRQ
diff --git a/include/configs/ea20.h b/include/configs/ea20.h
index 84085dcd4dc..75100718831 100644
--- a/include/configs/ea20.h
+++ b/include/configs/ea20.h
@@ -130,7 +130,6 @@
* U-Boot commands
*/
#define CONFIG_CMD_ENV
-#define CONFIG_CMD_DIAG
#define CONFIG_CMD_SAVES
#ifdef CONFIG_CMD_BDI
diff --git a/include/configs/imx27lite-common.h b/include/configs/imx27lite-common.h
index db745b28a7c..b8a867c7ba1 100644
--- a/include/configs/imx27lite-common.h
+++ b/include/configs/imx27lite-common.h
@@ -159,7 +159,6 @@
/*
* U-Boot commands
*/
-#define CONFIG_CMD_DIAG
#define CONFIG_CMD_JFFS2
#define CONFIG_CMD_NAND
diff --git a/include/configs/io.h b/include/configs/io.h
index 8a21b3f60f7..3e44a8c6075 100644
--- a/include/configs/io.h
+++ b/include/configs/io.h
@@ -58,7 +58,6 @@
* Commands additional to the ones defined in amcc-common.h
*/
#define CONFIG_CMD_DTT
-#undef CONFIG_CMD_DIAG
#undef CONFIG_CMD_EEPROM
#undef CONFIG_CMD_IRQ
diff --git a/include/configs/ipam390.h b/include/configs/ipam390.h
index 41e7dca6537..5caf02e8d9a 100644
--- a/include/configs/ipam390.h
+++ b/include/configs/ipam390.h
@@ -242,7 +242,6 @@
* U-Boot commands
*/
#define CONFIG_CMD_ENV
-#define CONFIG_CMD_DIAG
#define CONFIG_CMD_SAVES
#ifdef CONFIG_CMD_BDI
diff --git a/include/configs/km/km8309-common.h b/include/configs/km/km8309-common.h
index 0fe89af32f1..f9fed791279 100644
--- a/include/configs/km/km8309-common.h
+++ b/include/configs/km/km8309-common.h
@@ -19,7 +19,6 @@
#define CONFIG_MPC8309 1 /* MPC8309 CPU specific */
#define CONFIG_KM_DEF_ARCH "arch=ppc_82xx\0"
-#define CONFIG_CMD_DIAG 1
/* include common defines/options for all 83xx Keymile boards */
#include "km83xx-common.h"
diff --git a/include/configs/km/km_arm.h b/include/configs/km/km_arm.h
index c44ab361288..0c5f6e75154 100644
--- a/include/configs/km/km_arm.h
+++ b/include/configs/km/km_arm.h
@@ -310,7 +310,6 @@ int get_scl(void);
#define CONFIG_POST (CONFIG_SYS_POST_MEM_REGIONS)
#define CONFIG_POST_SKIP_ENV_FLAGS
#define CONFIG_POST_EXTERNAL_WORD_FUNCS
-#define CONFIG_CMD_DIAG
/* we do the whole PCIe FPGA config stuff here */
diff --git a/include/configs/km8360.h b/include/configs/km8360.h
index 6fa4e63e740..3104a8f05c4 100644
--- a/include/configs/km8360.h
+++ b/include/configs/km8360.h
@@ -270,7 +270,6 @@
#define CPM_POST_WORD_ADDR CONFIG_SYS_MEMTEST_END
#define CONFIG_TESTPIN_REG gprt3 /* for kmcoge5ne */
#define CONFIG_TESTPIN_MASK 0x20 /* for kmcoge5ne */
-#define CONFIG_CMD_DIAG /* so that testpin is inquired for POST test */
#else
#define CONFIG_SYS_IBAT6L (0)
diff --git a/include/configs/legoev3.h b/include/configs/legoev3.h
index 07f42e3496a..c5e7d629ab0 100644
--- a/include/configs/legoev3.h
+++ b/include/configs/legoev3.h
@@ -201,7 +201,6 @@
/*
* U-Boot commands
*/
-#define CONFIG_CMD_DIAG
#define CONFIG_CMD_SAVES
#ifdef CONFIG_CMD_BDI
diff --git a/include/configs/lwmon5.h b/include/configs/lwmon5.h
index 367423484f0..7e634140f9b 100644
--- a/include/configs/lwmon5.h
+++ b/include/configs/lwmon5.h
@@ -383,7 +383,6 @@
* Command line configuration.
*/
#define CONFIG_CMD_DATE
-#define CONFIG_CMD_DIAG
#define CONFIG_CMD_EEPROM
#define CONFIG_CMD_IRQ
#define CONFIG_CMD_REGINFO
diff --git a/include/configs/neo.h b/include/configs/neo.h
index f6b4cc01c28..9115e251b1b 100644
--- a/include/configs/neo.h
+++ b/include/configs/neo.h
@@ -58,7 +58,6 @@
* Commands additional to the ones defined in amcc-common.h
*/
#define CONFIG_CMD_DTT
-#undef CONFIG_CMD_DIAG
#undef CONFIG_CMD_EEPROM
#undef CONFIG_CMD_IRQ
diff --git a/include/configs/o2dnt-common.h b/include/configs/o2dnt-common.h
index 1470c513a38..e2881a7177b 100644
--- a/include/configs/o2dnt-common.h
+++ b/include/configs/o2dnt-common.h
@@ -72,9 +72,6 @@
#ifdef CONFIG_PCI
#define CONFIG_CMD_PCI
#endif
-#ifdef CONFIG_POST
-#define CONFIG_CMD_DIAG
-#endif
#if (CONFIG_SYS_TEXT_BASE == 0xFC000000) || (CONFIG_SYS_TEXT_BASE == 0xFF000000)
/* Boot low with 16 or 32 MB Flash */
diff --git a/include/configs/omapl138_lcdk.h b/include/configs/omapl138_lcdk.h
index 9d90e46b806..4efddb62074 100644
--- a/include/configs/omapl138_lcdk.h
+++ b/include/configs/omapl138_lcdk.h
@@ -286,7 +286,6 @@
* U-Boot commands
*/
#define CONFIG_CMD_ENV
-#define CONFIG_CMD_DIAG
#define CONFIG_CMD_SAVES
#ifdef CONFIG_CMD_BDI
#define CONFIG_CLOCKS
diff --git a/include/configs/pengwyn.h b/include/configs/pengwyn.h
index b8fb3718275..cdfaf7c9123 100644
--- a/include/configs/pengwyn.h
+++ b/include/configs/pengwyn.h
@@ -155,8 +155,6 @@
#define CONFIG_CMD_MTDPARTS
-#define CONFIG_CMD_DIAG /* monitor functions : Diagnostics */
-
#define MTDIDS_DEFAULT "nand0=omap2-nand.0"
/* Size must be a multiple of Nand erase size (524288 b) */
#define MTDPARTS_DEFAULT "mtdparts=omap2-nand.0:512k(SPL)," \
diff --git a/include/configs/v38b.h b/include/configs/v38b.h
index dc7186c3ccd..8e3746f337a 100644
--- a/include/configs/v38b.h
+++ b/include/configs/v38b.h
@@ -74,7 +74,6 @@
* Command line configuration.
*/
#define CONFIG_CMD_IDE
-#define CONFIG_CMD_DIAG
#define CONFIG_CMD_IRQ
#define CONFIG_CMD_JFFS2
#define CONFIG_CMD_SDRAM
diff --git a/include/configs/xilinx-ppc.h b/include/configs/xilinx-ppc.h
index 2afc645b7d5..ea4b739d0b3 100644
--- a/include/configs/xilinx-ppc.h
+++ b/include/configs/xilinx-ppc.h
@@ -24,7 +24,6 @@
#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 128 * 1024)
/*Cmd*/
-#define CONFIG_CMD_DIAG
#define CONFIG_CMD_IRQ
#define CONFIG_CMD_REGINFO
#undef CONFIG_CMD_JFFS2
diff --git a/include/configs/xtfpga.h b/include/configs/xtfpga.h
index b1aa57935dd..7b15f311fe4 100644
--- a/include/configs/xtfpga.h
+++ b/include/configs/xtfpga.h
@@ -127,7 +127,6 @@
/* U-Boot commands */
/*=================*/
-#define CONFIG_CMD_DIAG
#define CONFIG_CMD_SAVES
/*==============================*/
diff --git a/scripts/config_whitelist.txt b/scripts/config_whitelist.txt
index 08f5d9c5ba9..2ad4e088538 100644
--- a/scripts/config_whitelist.txt
+++ b/scripts/config_whitelist.txt
@@ -394,7 +394,6 @@ CONFIG_CMDLINE_EDITING
CONFIG_CMDLINE_PS_SUPPORT
CONFIG_CMDLINE_TAG
CONFIG_CMD_DATE
-CONFIG_CMD_DIAG
CONFIG_CMD_DISPLAY
CONFIG_CMD_DS4510
CONFIG_CMD_DS4510_INFO
--
GitLab
From 93d66ee56699456a4f0e03cf1ab38fa1adbfcdc7 Mon Sep 17 00:00:00 2001
From: Simon Glass <sjg@chromium.org>
Date: Wed, 26 Apr 2017 22:28:09 -0600
Subject: [PATCH 187/282] Convert CONFIG_CMD_DISPLAY to Kconfig
This converts the following to Kconfig:
CONFIG_CMD_DISPLAY
Signed-off-by: Simon Glass <sjg@chromium.org>
---
cmd/Kconfig | 8 ++++++++
configs/a4m072_defconfig | 1 +
include/config_cmd_all.h | 1 -
include/configs/a4m072.h | 1 -
include/configs/manroland/common.h | 1 -
scripts/config_whitelist.txt | 1 -
6 files changed, 9 insertions(+), 4 deletions(-)
diff --git a/cmd/Kconfig b/cmd/Kconfig
index 334e531ffed..73fc29e1b98 100644
--- a/cmd/Kconfig
+++ b/cmd/Kconfig
@@ -698,6 +698,14 @@ config CMD_CACHE
help
Enable the "icache" and "dcache" commands
+config CMD_DISPLAY
+ bool "Enable the 'display' command, for character displays"
+ help
+ (this needs porting to driver model)
+ This enables the 'display' command which allows a string to be
+ displayed on a simple board-specific display. Implement
+ display_putc() to use it.
+
config CMD_LED
bool "led"
default y if LED
diff --git a/configs/a4m072_defconfig b/configs/a4m072_defconfig
index 25a06cf7a50..ce5edcbf01b 100644
--- a/configs/a4m072_defconfig
+++ b/configs/a4m072_defconfig
@@ -14,6 +14,7 @@ CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_CMD_SNTP=y
+CONFIG_CMD_DISPLAY=y
CONFIG_CMD_FAT=y
CONFIG_MAC_PARTITION=y
# CONFIG_MMC is not set
diff --git a/include/config_cmd_all.h b/include/config_cmd_all.h
index 39e02c25a5c..bba3b789640 100644
--- a/include/config_cmd_all.h
+++ b/include/config_cmd_all.h
@@ -14,7 +14,6 @@
*/
#define CONFIG_CMD_DATE /* support for RTC, date/time...*/
-#define CONFIG_CMD_DISPLAY /* Display support */
#define CONFIG_CMD_DTT /* Digital Therm and Thermostat */
#define CONFIG_CMD_EEPROM /* EEPROM read/write support */
#define CONFIG_CMD_FDC /* Floppy Disk Support */
diff --git a/include/configs/a4m072.h b/include/configs/a4m072.h
index e07a782fec6..79099518e7b 100644
--- a/include/configs/a4m072.h
+++ b/include/configs/a4m072.h
@@ -83,7 +83,6 @@
*/
#define CONFIG_CMD_EEPROM
#define CONFIG_CMD_IDE
-#define CONFIG_CMD_DISPLAY
#if defined(CONFIG_PCI)
#define CONFIG_CMD_PCI
diff --git a/include/configs/manroland/common.h b/include/configs/manroland/common.h
index 7f3231bd0c6..7d63e14030e 100644
--- a/include/configs/manroland/common.h
+++ b/include/configs/manroland/common.h
@@ -19,7 +19,6 @@
* Command line configuration.
*/
#define CONFIG_CMD_DATE
-#define CONFIG_CMD_DISPLAY
#define CONFIG_CMD_EEPROM
#define CONFIG_CMD_DTT
#define CONFIG_CMD_IDE
diff --git a/scripts/config_whitelist.txt b/scripts/config_whitelist.txt
index 2ad4e088538..11689e85808 100644
--- a/scripts/config_whitelist.txt
+++ b/scripts/config_whitelist.txt
@@ -394,7 +394,6 @@ CONFIG_CMDLINE_EDITING
CONFIG_CMDLINE_PS_SUPPORT
CONFIG_CMDLINE_TAG
CONFIG_CMD_DATE
-CONFIG_CMD_DISPLAY
CONFIG_CMD_DS4510
CONFIG_CMD_DS4510_INFO
CONFIG_CMD_DS4510_MEM
--
GitLab
From 00aff7bbc3f22616d34bd8c0150a6c3045d06ec5 Mon Sep 17 00:00:00 2001
From: Simon Glass <sjg@chromium.org>
Date: Wed, 26 Apr 2017 22:28:10 -0600
Subject: [PATCH 188/282] powerpc: Drop configs/manroland
This is not used in U-Boot. Drop it.
Signed-off-by: Simon Glass <sjg@chromium.org>
---
include/configs/manroland/common.h | 106 -----------
include/configs/manroland/mpc5200-common.h | 205 ---------------------
2 files changed, 311 deletions(-)
delete mode 100644 include/configs/manroland/common.h
delete mode 100644 include/configs/manroland/mpc5200-common.h
diff --git a/include/configs/manroland/common.h b/include/configs/manroland/common.h
deleted file mode 100644
index 7d63e14030e..00000000000
--- a/include/configs/manroland/common.h
+++ /dev/null
@@ -1,106 +0,0 @@
-/*
- * (C) Copyright 2009
- * Heiko Schocher, DENX Software Engineering, hs@denx.de.
- *
- * SPDX-License-Identifier: GPL-2.0+
- */
-
-#ifndef __MANROLAND_COMMON_H
-#define __MANROLAND_COMMON_H
-
-/*
- * High Level Configuration Options
- * (easy to change)
- */
-
-#define CONFIG_BOARD_EARLY_INIT_R
-
-/*
- * Command line configuration.
- */
-#define CONFIG_CMD_DATE
-#define CONFIG_CMD_EEPROM
-#define CONFIG_CMD_DTT
-#define CONFIG_CMD_IDE
-
-/*
- * 8-symbol LED display (can be accessed with 'display' command)
- */
-#define CONFIG_PDSP188x
-
-#define CONFIG_TIMESTAMP 1 /* Print image info with timestamp */
-
-/*
- * Autobooting
- */
-
-#define CONFIG_PREBOOT "echo;" \
- "echo Type \\\"run flash_nfs\\\" to mount root filesystem over NFS;" \
- "echo"
-
-#undef CONFIG_BOOTARGS
-
-#define CONFIG_EXTRA_ENV_SETTINGS \
- "netdev=eth0\0" \
- "nfsargs=setenv bootargs root=/dev/nfs rw " \
- "nfsroot=${serverip}:${rootpath}\0" \
- "ramargs=setenv bootargs root=/dev/ram rw\0" \
- "addwdt=setenv bootargs ${bootargs} wdt=off\0" \
- "logval=4\0" \
- "addlog=setenv bootargs ${bootargs} loglevel=${logval}\0" \
- "addip=setenv bootargs ${bootargs} " \
- "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}" \
- ":${hostname}:${netdev}:off panic=1\0" \
- "kernel_addr=ff810000\0" \
- "fdt_addr="__stringify(CONFIG_SYS_FLASH_BASE)"\0" \
- "flash_nfs=run nfsargs addip addcon addwdt addlog;" \
- "bootm ${kernel_addr} - ${fdt_addr}\0" \
- "rootpath=/opt/eldk/ppc_82xx\0" \
- "kernel_addr_r=300000\0" \
- "fdt_addr_r=200000\0" \
- "fdt_file=" __stringify(CONFIG_HOSTNAME) "/" \
- __stringify(CONFIG_HOSTNAME) ".dtb\0" \
- "kernel_file=" __stringify(CONFIG_HOSTNAME) "/uImage \0" \
- "load_fdt=tftp ${fdt_addr_r} ${fdt_file};\0" \
- "load_kernel=tftp ${kernel_addr_r} ${kernel_file};\0" \
- "addcon=setenv bootargs ${bootargs} console=ttyPSC0,${baudrate}\0"\
- "net_nfs=run load_fdt load_kernel; " \
- "run nfsargs addip addcon addwdt addlog;" \
- "bootm ${kernel_addr_r} - ${fdt_addr_r}\0" \
- "u-boot=" __stringify(CONFIG_HOSTNAME) "/u-boot.bin \0" \
- "u-boot_addr_r=200000\0" \
- "load=tftp ${u-boot_addr_r} ${u-boot}\0" \
- "update=protect off " __stringify(CONFIG_SYS_TEXT_BASE) " +${filesize};"\
- "erase " __stringify(CONFIG_SYS_TEXT_BASE) " +${filesize};"\
- "cp.b ${u-boot_addr_r} " __stringify(CONFIG_SYS_TEXT_BASE) \
- " ${filesize};" \
- "protect on " __stringify(CONFIG_SYS_TEXT_BASE) " +${filesize}\0"\
- ""
-
-#define CONFIG_BOOTCOMMAND "run net_nfs"
-
-#define CONFIG_MISC_INIT_R 1
-
-/*
- * Miscellaneous configurable options
- */
-#define CONFIG_SYS_LONGHELP /* undef to save memory */
-#if defined(CONFIG_CMD_KGDB)
-#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
-#else
-#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
-#endif
-#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16)
-#define CONFIG_SYS_MAXARGS 16 /* max number of command args*/
-#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
-#define CONFIG_CMDLINE_EDITING 1 /* add command line history */
-#define CONFIG_AUTO_COMPLETE /* add autocompletion support */
-
-/* Enable an alternate, more extensive memory test */
-#define CONFIG_SYS_ALT_MEMTEST
-
-/*
- * Enable loopw command.
- */
-
-#endif /* __MANROLAND_COMMON_H */
diff --git a/include/configs/manroland/mpc5200-common.h b/include/configs/manroland/mpc5200-common.h
deleted file mode 100644
index 60e8716a790..00000000000
--- a/include/configs/manroland/mpc5200-common.h
+++ /dev/null
@@ -1,205 +0,0 @@
-/*
- * (C) Copyright 2009
- * Heiko Schocher, DENX Software Engineering, hs@denx.de.
- *
- * SPDX-License-Identifier: GPL-2.0+
- */
-
-#ifndef __MANROLAND_MPC52XX__COMMON_H
-#define __MANROLAND_MPC52XX__COMMON_H
-
-/*
- * High Level Configuration Options
- * (easy to change)
- */
-#define CONFIG_MPC5200 1 /* MPC5200 CPU */
-
-#define CONFIG_SYS_MPC5XXX_CLKIN 33000000 /* ... running at 33.000000MHz */
-
-#define CONFIG_HIGH_BATS 1 /* High BATs supported */
-
-/*
- * Serial console configuration
- */
-#define CONFIG_PSC_CONSOLE 1 /* console is on PSC1 */
-#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200,\
- 230400 }
-
-#if (CONFIG_SYS_TEXT_BASE == 0xFFF00000) /* Boot low */
-# define CONFIG_SYS_LOWBOOT 1
-#endif
-
-/*
- * IPB Bus clocking configuration.
- */
-#define CONFIG_SYS_IPBCLK_EQUALS_XLBCLK /* define for 133MHz speed */
-
-/*
- * I2C configuration
- */
-#define CONFIG_HARD_I2C 1 /* I2C with hardware support */
-#define CONFIG_SYS_I2C_MODULE 2 /* Select I2C module #1 or #2 */
-
-#define CONFIG_SYS_I2C_SPEED 100000 /* 100 kHz */
-#define CONFIG_SYS_I2C_SLAVE 0x7F
-
-/*
- * EEPROM configuration
- */
-#define CONFIG_SYS_I2C_EEPROM_ADDR 0x58
-#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1
-#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 4
-#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 10
-
-/*
- * RTC configuration
- */
-#define CONFIG_RTC_PCF8563
-#define CONFIG_SYS_I2C_RTC_ADDR 0x51
-
-/* I2C SYSMON (LM75) */
-#define CONFIG_DTT_LM81 1 /* ON Semi's LM75 */
-#define CONFIG_DTT_SENSORS {0} /* Sensor addresses */
-#define CONFIG_SYS_DTT_MAX_TEMP 70
-#define CONFIG_SYS_DTT_LOW_TEMP -30
-#define CONFIG_SYS_DTT_HYSTERESIS 3
-
-/*
- * Flash configuration
- */
-#define CONFIG_SYS_FLASH_BASE 0xFF800000
-
-#define CONFIG_SYS_FLASH_SIZE 0x00800000 /* 8 MByte */
-
-#define CONFIG_ENV_ADDR (CONFIG_SYS_TEXT_BASE+0x40000) /* second sector */
-#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max num of flash banks
- (= chip selects) */
-#define CONFIG_SYS_FLASH_ERASE_TOUT 240000 /* Flash Erase Timeout [ms]*/
-#define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Flash Write Timeout [ms]*/
-
-#define CONFIG_FLASH_CFI_DRIVER
-#define CONFIG_SYS_FLASH_CFI
-#define CONFIG_SYS_FLASH_EMPTY_INFO
-#define CONFIG_SYS_FLASH_CFI_AMD_RESET
-
-/*
- * Environment settings
- */
-#define CONFIG_ENV_IS_IN_FLASH 1
-#define CONFIG_ENV_SIZE 0x4000
-#define CONFIG_ENV_OFFSET_REDUND (CONFIG_ENV_OFFSET+CONFIG_ENV_SECT_SIZE)
-#define CONFIG_ENV_SIZE_REDUND (CONFIG_ENV_SIZE)
-
-/*
- * Memory map
- */
-#define CONFIG_SYS_MBAR 0xF0000000
-#define CONFIG_SYS_DEFAULT_MBAR 0x80000000
-
-#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE -\
- GENERATED_GBL_DATA_SIZE)
-#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET
-
-#define CONFIG_SYS_SDRAM_BASE 0x00000000
-#define CONFIG_SYS_SRAM_BASE 0x80100000 /* CS 1 */
-#define CONFIG_SYS_DISPLAY_BASE 0x80600000 /* CS 3 */
-
-/* Settings for XLB = 132 MHz */
-#define SDRAM_DDR 1
-#define SDRAM_MODE 0x018D0000
-#define SDRAM_EMODE 0x40090000
-#define SDRAM_CONTROL 0x714f0f00
-#define SDRAM_CONFIG1 0x73722930
-#define SDRAM_CONFIG2 0x47770000
-#define SDRAM_TAPDELAY 0x10000000
-
-/* Use ON-Chip SRAM until RAM will be available */
-#define CONFIG_SYS_INIT_RAM_ADDR MPC5XXX_SRAM
-#ifdef CONFIG_POST
-/* preserve space for the post_word at end of on-chip SRAM */
-#define CONFIG_SYS_INIT_RAM_SIZE MPC5XXX_SRAM_POST_SIZE
-#else
-#define CONFIG_SYS_INIT_RAM_SIZE MPC5XXX_SRAM_SIZE
-#endif
-
-#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
-#if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE)
-# define CONFIG_SYS_RAMBOOT 1
-#endif
-
-#define CONFIG_SYS_MONITOR_LEN (192 << 10)
-#define CONFIG_SYS_MALLOC_LEN (512 << 10)
-#define CONFIG_SYS_BOOTMAPSZ (8 << 20)
-
-/*
- * Ethernet configuration
- */
-#define CONFIG_MPC5xxx_FEC 1
-#define CONFIG_MPC5xxx_FEC_MII100
-#define CONFIG_PHY_ADDR 0x00
-#define CONFIG_MII 1
-
-/*use Hardware WDT */
-#define CONFIG_HW_WATCHDOG
-
-#define CONFIG_SYS_CACHELINE_SIZE 32 /* For MPC5xxx CPUs */
-#if defined(CONFIG_CMD_KGDB)
-# define CONFIG_SYS_CACHELINE_SHIFT 5 /* log base 2 of the above value*/
-#endif
-
-/*
- * Various low-level settings
- */
-#define CONFIG_SYS_HID0_INIT HID0_ICE | HID0_ICFI
-#define CONFIG_SYS_HID0_FINAL HID0_ICE
-
-#define CONFIG_SYS_BOOTCS_START CONFIG_SYS_FLASH_BASE
-#define CONFIG_SYS_BOOTCS_SIZE CONFIG_SYS_FLASH_SIZE
-#define CONFIG_SYS_CS0_START CONFIG_SYS_FLASH_BASE
-#define CONFIG_SYS_CS0_SIZE CONFIG_SYS_FLASH_SIZE
-
-/* 8Mbit SRAM @0x80100000 */
-#define CONFIG_SYS_CS1_START CONFIG_SYS_SRAM_BASE
-
-#define CONFIG_SYS_CS_BURST 0x00000000
-#define CONFIG_SYS_CS_DEADCYCLE 0x33333333
-
-/*-----------------------------------------------------------------------
- * IDE/ATA stuff Supports IDE harddisk
- *-----------------------------------------------------------------------
- */
-
-#undef CONFIG_IDE_8xx_PCCARD /* Use IDE with PC Card Adapter */
-
-#undef CONFIG_IDE_8xx_DIRECT /* Direct IDE not supported */
-#undef CONFIG_IDE_LED /* LED for ide not supported */
-
-#define CONFIG_SYS_IDE_MAXBUS 1 /* max. 1 IDE bus */
-
-#define CONFIG_IDE_PREINIT 1
-
-#define CONFIG_SYS_ATA_IDE0_OFFSET 0x0000
-
-#define CONFIG_SYS_ATA_BASE_ADDR MPC5XXX_ATA
-
-/* Offset for data I/O */
-#define CONFIG_SYS_ATA_DATA_OFFSET (0x0060)
-
-/* Offset for normal register accesses */
-#define CONFIG_SYS_ATA_REG_OFFSET (CONFIG_SYS_ATA_DATA_OFFSET)
-
-/* Offset for alternate registers */
-#define CONFIG_SYS_ATA_ALT_OFFSET (0x005C)
-
-/* Interval between registers */
-#define CONFIG_SYS_ATA_STRIDE 4
-
-#define CONFIG_ATAPI 1
-
-#define OF_CPU "PowerPC,5200@0"
-#define OF_SOC "soc5200@f0000000"
-#define OF_TBCLK (bd->bi_busfreq / 4)
-#define OF_STDOUT_PATH "/soc5200@f0000000/serial@2000"
-#define CONFIG_OF_IDE_FIXUP
-
-#endif /* __MANROLAND_MPC52XX__COMMON_H */
--
GitLab
From ae189ba1ac85e47fe57d6422bc9474ff081a30a4 Mon Sep 17 00:00:00 2001
From: Simon Glass <sjg@chromium.org>
Date: Wed, 26 Apr 2017 22:28:11 -0600
Subject: [PATCH 189/282] Drop the pdsp188x driver
This is not used in U-Boot.
Signed-off-by: Simon Glass <sjg@chromium.org>
---
drivers/misc/Makefile | 1 -
drivers/misc/pdsp188x.c | 45 ------------------------------------
scripts/config_whitelist.txt | 1 -
3 files changed, 47 deletions(-)
delete mode 100644 drivers/misc/pdsp188x.c
diff --git a/drivers/misc/Makefile b/drivers/misc/Makefile
index e3151ea097c..4543cd647e5 100644
--- a/drivers/misc/Makefile
+++ b/drivers/misc/Makefile
@@ -25,7 +25,6 @@ obj-$(CONFIG_MXC_OCOTP) += mxc_ocotp.o
obj-$(CONFIG_MXS_OCOTP) += mxs_ocotp.o
obj-$(CONFIG_NUVOTON_NCT6102D) += nuvoton_nct6102d.o
obj-$(CONFIG_NS87308) += ns87308.o
-obj-$(CONFIG_PDSP188x) += pdsp188x.o
obj-$(CONFIG_$(SPL_)PWRSEQ) += pwrseq-uclass.o
ifdef CONFIG_DM_I2C
ifndef CONFIG_SPL_BUILD
diff --git a/drivers/misc/pdsp188x.c b/drivers/misc/pdsp188x.c
deleted file mode 100644
index aa4351a0ad4..00000000000
--- a/drivers/misc/pdsp188x.c
+++ /dev/null
@@ -1,45 +0,0 @@
-/*
- * Copyright 2010 Sergey Poselenov, Emcraft Systems, <sposelenov@emcraft.com>
- * Copyright 2010 Ilya Yanok, Emcraft Systems, <yanok@emcraft.com>
- *
- * SPDX-License-Identifier: GPL-2.0+
- */
-
-#include <common.h>
-#include <led-display.h>
-#include <asm/io.h>
-
-#ifdef CONFIG_CMD_DISPLAY
-#define CWORD_CLEAR 0x80
-#define CLEAR_DELAY (110 * 2)
-#define DISPLAY_SIZE 8
-
-static int pos; /* Current display position */
-
-/* Handle different display commands */
-void display_set(int cmd)
-{
- if (cmd & DISPLAY_CLEAR) {
- out_8((unsigned char *)CONFIG_SYS_DISP_CWORD, CWORD_CLEAR);
- udelay(1000 * CLEAR_DELAY);
- }
-
- if (cmd & DISPLAY_HOME) {
- pos = 0;
- }
-}
-
-/*
- * Display a character at the current display position.
- * Characters beyond the display size are ignored.
- */
-int display_putc(char c)
-{
- if (pos >= DISPLAY_SIZE)
- return -1;
-
- out_8((unsigned char *)CONFIG_SYS_DISP_CHR_RAM + pos++, c);
-
- return c;
-}
-#endif
diff --git a/scripts/config_whitelist.txt b/scripts/config_whitelist.txt
index 11689e85808..5cd7103c0d6 100644
--- a/scripts/config_whitelist.txt
+++ b/scripts/config_whitelist.txt
@@ -2137,7 +2137,6 @@ CONFIG_PCNET
CONFIG_PCNET_79C973
CONFIG_PCNET_79C975
CONFIG_PDM360NG
-CONFIG_PDSP188x
CONFIG_PEN_ADDR_BIG_ENDIAN
CONFIG_PERIF1_FREQ
CONFIG_PERIF2_FREQ
--
GitLab
From c9032ce168c1344fe8ffe8604825ec343ec14adf Mon Sep 17 00:00:00 2001
From: Chris Packham <judge.packham@gmail.com>
Date: Sat, 29 Apr 2017 15:20:28 +1200
Subject: [PATCH 190/282] cmd: add Kconfig option for 'date' command
Signed-off-by: Chris Packham <judge.packham@gmail.com>
[trini: default y if DM_RTC, re-sync]
Signed-off-by: Tom Rini <trini@konsulko.com>
---
cmd/Kconfig | 7 +++++++
configs/B4420QDS_NAND_defconfig | 1 +
configs/B4420QDS_SPIFLASH_defconfig | 1 +
configs/B4420QDS_defconfig | 1 +
configs/B4860QDS_NAND_defconfig | 1 +
configs/B4860QDS_SECURE_BOOT_defconfig | 1 +
configs/B4860QDS_SPIFLASH_defconfig | 1 +
configs/B4860QDS_SRIO_PCIE_BOOT_defconfig | 1 +
configs/B4860QDS_defconfig | 1 +
configs/BSC9132QDS_NAND_DDRCLK100_SECURE_defconfig | 1 +
configs/BSC9132QDS_NAND_DDRCLK100_defconfig | 1 +
configs/BSC9132QDS_NAND_DDRCLK133_SECURE_defconfig | 1 +
configs/BSC9132QDS_NAND_DDRCLK133_defconfig | 1 +
configs/BSC9132QDS_NOR_DDRCLK100_SECURE_defconfig | 1 +
configs/BSC9132QDS_NOR_DDRCLK100_defconfig | 1 +
configs/BSC9132QDS_NOR_DDRCLK133_SECURE_defconfig | 1 +
configs/BSC9132QDS_NOR_DDRCLK133_defconfig | 1 +
configs/BSC9132QDS_SDCARD_DDRCLK100_SECURE_defconfig | 1 +
configs/BSC9132QDS_SDCARD_DDRCLK100_defconfig | 1 +
configs/BSC9132QDS_SDCARD_DDRCLK133_SECURE_defconfig | 1 +
configs/BSC9132QDS_SDCARD_DDRCLK133_defconfig | 1 +
configs/BSC9132QDS_SPIFLASH_DDRCLK100_SECURE_defconfig | 1 +
configs/BSC9132QDS_SPIFLASH_DDRCLK100_defconfig | 1 +
configs/BSC9132QDS_SPIFLASH_DDRCLK133_SECURE_defconfig | 1 +
configs/BSC9132QDS_SPIFLASH_DDRCLK133_defconfig | 1 +
configs/CPCI4052_defconfig | 1 +
configs/Cyrus_P5020_defconfig | 1 +
configs/Cyrus_P5040_defconfig | 1 +
configs/M52277EVB_defconfig | 1 +
configs/M52277EVB_stmicro_defconfig | 1 +
configs/M53017EVB_defconfig | 1 +
configs/M5329AFEE_defconfig | 1 +
configs/M5329BFEE_defconfig | 1 +
configs/M5373EVB_defconfig | 1 +
configs/M54451EVB_defconfig | 1 +
configs/M54451EVB_stmicro_defconfig | 1 +
configs/M54455EVB_a66_defconfig | 1 +
configs/M54455EVB_defconfig | 1 +
configs/M54455EVB_i66_defconfig | 1 +
configs/M54455EVB_intel_defconfig | 1 +
configs/M54455EVB_stm33_defconfig | 1 +
configs/MIP405T_defconfig | 1 +
configs/MIP405_defconfig | 1 +
configs/MPC8308RDB_defconfig | 1 +
configs/MPC8313ERDB_33_defconfig | 1 +
configs/MPC8313ERDB_66_defconfig | 1 +
configs/MPC8313ERDB_NAND_33_defconfig | 1 +
configs/MPC8313ERDB_NAND_66_defconfig | 1 +
configs/MPC8315ERDB_defconfig | 1 +
configs/MPC8349EMDS_defconfig | 1 +
configs/MPC8349ITXGP_defconfig | 1 +
configs/MPC8349ITX_LOWBOOT_defconfig | 1 +
configs/MPC8349ITX_defconfig | 1 +
configs/MPC837XEMDS_HOST_defconfig | 1 +
configs/MPC837XEMDS_defconfig | 1 +
configs/MPC837XERDB_defconfig | 1 +
configs/MiniFAP_defconfig | 1 +
configs/P1010RDB-PA_36BIT_NAND_SECBOOT_defconfig | 1 +
configs/P1010RDB-PA_36BIT_NAND_defconfig | 1 +
configs/P1010RDB-PA_36BIT_NOR_SECBOOT_defconfig | 1 +
configs/P1010RDB-PA_36BIT_NOR_defconfig | 1 +
configs/P1010RDB-PA_36BIT_SDCARD_defconfig | 1 +
configs/P1010RDB-PA_36BIT_SPIFLASH_SECBOOT_defconfig | 1 +
configs/P1010RDB-PA_36BIT_SPIFLASH_defconfig | 1 +
configs/P1010RDB-PA_NAND_SECBOOT_defconfig | 1 +
configs/P1010RDB-PA_NAND_defconfig | 1 +
configs/P1010RDB-PA_NOR_SECBOOT_defconfig | 1 +
configs/P1010RDB-PA_NOR_defconfig | 1 +
configs/P1010RDB-PA_SDCARD_defconfig | 1 +
configs/P1010RDB-PA_SPIFLASH_SECBOOT_defconfig | 1 +
configs/P1010RDB-PA_SPIFLASH_defconfig | 1 +
configs/P1010RDB-PB_36BIT_NAND_SECBOOT_defconfig | 1 +
configs/P1010RDB-PB_36BIT_NAND_defconfig | 1 +
configs/P1010RDB-PB_36BIT_NOR_SECBOOT_defconfig | 1 +
configs/P1010RDB-PB_36BIT_NOR_defconfig | 1 +
configs/P1010RDB-PB_36BIT_SDCARD_defconfig | 1 +
configs/P1010RDB-PB_36BIT_SPIFLASH_SECBOOT_defconfig | 1 +
configs/P1010RDB-PB_36BIT_SPIFLASH_defconfig | 1 +
configs/P1010RDB-PB_NAND_SECBOOT_defconfig | 1 +
configs/P1010RDB-PB_NAND_defconfig | 1 +
configs/P1010RDB-PB_NOR_SECBOOT_defconfig | 1 +
configs/P1010RDB-PB_NOR_defconfig | 1 +
configs/P1010RDB-PB_SDCARD_defconfig | 1 +
configs/P1010RDB-PB_SPIFLASH_SECBOOT_defconfig | 1 +
configs/P1010RDB-PB_SPIFLASH_defconfig | 1 +
configs/P1020MBG-PC_36BIT_SDCARD_defconfig | 1 +
configs/P1020MBG-PC_36BIT_defconfig | 1 +
configs/P1020MBG-PC_SDCARD_defconfig | 1 +
configs/P1020MBG-PC_defconfig | 1 +
configs/P1020RDB-PC_36BIT_NAND_defconfig | 1 +
configs/P1020RDB-PC_36BIT_SDCARD_defconfig | 1 +
configs/P1020RDB-PC_36BIT_SPIFLASH_defconfig | 1 +
configs/P1020RDB-PC_36BIT_defconfig | 1 +
configs/P1020RDB-PC_NAND_defconfig | 1 +
configs/P1020RDB-PC_SDCARD_defconfig | 1 +
configs/P1020RDB-PC_SPIFLASH_defconfig | 1 +
configs/P1020RDB-PC_defconfig | 1 +
configs/P1020RDB-PD_NAND_defconfig | 1 +
configs/P1020RDB-PD_SDCARD_defconfig | 1 +
configs/P1020RDB-PD_SPIFLASH_defconfig | 1 +
configs/P1020RDB-PD_defconfig | 1 +
configs/P1020UTM-PC_36BIT_SDCARD_defconfig | 1 +
configs/P1020UTM-PC_36BIT_defconfig | 1 +
configs/P1020UTM-PC_SDCARD_defconfig | 1 +
configs/P1020UTM-PC_defconfig | 1 +
configs/P1021RDB-PC_36BIT_NAND_defconfig | 1 +
configs/P1021RDB-PC_36BIT_SDCARD_defconfig | 1 +
configs/P1021RDB-PC_36BIT_SPIFLASH_defconfig | 1 +
configs/P1021RDB-PC_36BIT_defconfig | 1 +
configs/P1021RDB-PC_NAND_defconfig | 1 +
configs/P1021RDB-PC_SDCARD_defconfig | 1 +
configs/P1021RDB-PC_SPIFLASH_defconfig | 1 +
configs/P1021RDB-PC_defconfig | 1 +
configs/P1024RDB_36BIT_defconfig | 1 +
configs/P1024RDB_NAND_defconfig | 1 +
configs/P1024RDB_SDCARD_defconfig | 1 +
configs/P1024RDB_SPIFLASH_defconfig | 1 +
configs/P1024RDB_defconfig | 1 +
configs/P1025RDB_36BIT_defconfig | 1 +
configs/P1025RDB_NAND_defconfig | 1 +
configs/P1025RDB_SDCARD_defconfig | 1 +
configs/P1025RDB_SPIFLASH_defconfig | 1 +
configs/P1025RDB_defconfig | 1 +
configs/P2020RDB-PC_36BIT_NAND_defconfig | 1 +
configs/P2020RDB-PC_36BIT_SDCARD_defconfig | 1 +
configs/P2020RDB-PC_36BIT_SPIFLASH_defconfig | 1 +
configs/P2020RDB-PC_36BIT_defconfig | 1 +
configs/P2020RDB-PC_NAND_defconfig | 1 +
configs/P2020RDB-PC_SDCARD_defconfig | 1 +
configs/P2020RDB-PC_SPIFLASH_defconfig | 1 +
configs/P2020RDB-PC_defconfig | 1 +
configs/PIP405_defconfig | 1 +
configs/PLU405_defconfig | 1 +
configs/PMC405DE_defconfig | 1 +
configs/PMC440_defconfig | 1 +
configs/T1023RDB_NAND_defconfig | 1 +
configs/T1023RDB_SDCARD_defconfig | 1 +
configs/T1023RDB_SECURE_BOOT_defconfig | 1 +
configs/T1023RDB_SPIFLASH_defconfig | 1 +
configs/T1023RDB_defconfig | 1 +
configs/T1024QDS_DDR4_SECURE_BOOT_defconfig | 1 +
configs/T1024QDS_DDR4_defconfig | 1 +
configs/T1024QDS_NAND_defconfig | 1 +
configs/T1024QDS_SDCARD_defconfig | 1 +
configs/T1024QDS_SECURE_BOOT_defconfig | 1 +
configs/T1024QDS_SPIFLASH_defconfig | 1 +
configs/T1024QDS_defconfig | 1 +
configs/T1024RDB_NAND_defconfig | 1 +
configs/T1024RDB_SDCARD_defconfig | 1 +
configs/T1024RDB_SECURE_BOOT_defconfig | 1 +
configs/T1024RDB_SPIFLASH_defconfig | 1 +
configs/T1024RDB_defconfig | 1 +
configs/T1040QDS_DDR4_defconfig | 1 +
configs/T1040QDS_SECURE_BOOT_defconfig | 1 +
configs/T1040QDS_defconfig | 1 +
configs/T1042RDB_PI_NAND_SECURE_BOOT_defconfig | 1 +
configs/T1042RDB_PI_NAND_defconfig | 1 +
configs/T1042RDB_PI_SDCARD_defconfig | 1 +
configs/T1042RDB_PI_SPIFLASH_defconfig | 1 +
configs/T1042RDB_PI_defconfig | 1 +
configs/TQM5200S_HIGHBOOT_defconfig | 1 +
configs/TQM5200S_defconfig | 1 +
configs/TQM5200_B_HIGHBOOT_defconfig | 1 +
configs/TQM5200_B_defconfig | 1 +
configs/TQM5200_STK100_defconfig | 1 +
configs/TQM5200_defconfig | 1 +
configs/TQM823L_LCD_defconfig | 1 +
configs/TQM823L_defconfig | 1 +
configs/TQM823M_defconfig | 1 +
configs/TQM834x_defconfig | 1 +
configs/TQM850L_defconfig | 1 +
configs/TQM850M_defconfig | 1 +
configs/TQM855L_defconfig | 1 +
configs/TQM855M_defconfig | 1 +
configs/TQM860L_defconfig | 1 +
configs/TQM860M_defconfig | 1 +
configs/TQM862L_defconfig | 1 +
configs/TQM862M_defconfig | 1 +
configs/TQM885D_defconfig | 1 +
configs/TTTech_defconfig | 1 +
configs/UCP1020_SPIFLASH_defconfig | 1 +
configs/UCP1020_defconfig | 1 +
configs/adp-ag101p_defconfig | 1 +
configs/apf27_defconfig | 1 +
configs/apx4devkit_defconfig | 1 +
configs/aristainetos2_defconfig | 1 +
configs/aristainetos2b_defconfig | 1 +
configs/aristainetos_defconfig | 1 +
configs/astro_mcf5373l_defconfig | 1 +
configs/bamboo_defconfig | 1 +
configs/bk4r1_defconfig | 1 +
configs/bubinga_defconfig | 1 +
configs/caddy2_defconfig | 1 +
configs/cam5200_defconfig | 1 +
configs/cam5200_niosflash_defconfig | 1 +
configs/canmb_defconfig | 1 +
configs/canyonlands_defconfig | 1 +
configs/cm5200_defconfig | 1 +
configs/devconcenter_defconfig | 1 +
configs/digsy_mtc_RAMBOOT_defconfig | 1 +
configs/digsy_mtc_defconfig | 1 +
configs/digsy_mtc_rev5_RAMBOOT_defconfig | 1 +
configs/digsy_mtc_rev5_defconfig | 1 +
configs/dns325_defconfig | 1 +
configs/dreamplug_defconfig | 1 +
configs/ds109_defconfig | 1 +
configs/eb_cpu5282_defconfig | 1 +
configs/eb_cpu5282_internal_defconfig | 1 +
configs/efi-x86_defconfig | 1 +
configs/ethernut5_defconfig | 1 +
configs/fo300_defconfig | 1 +
configs/glacier_defconfig | 1 +
configs/glacier_ramboot_defconfig | 1 +
configs/goflexhome_defconfig | 1 +
configs/guruplug_defconfig | 1 +
configs/haleakala_defconfig | 1 +
configs/icon_defconfig | 1 +
configs/ids8313_defconfig | 1 +
configs/inka4x0_defconfig | 1 +
configs/intip_defconfig | 1 +
configs/ipek01_defconfig | 1 +
configs/katmai_defconfig | 1 +
configs/kilauea_defconfig | 1 +
configs/ls1012aqds_qspi_defconfig | 1 +
configs/ls2080aqds_SECURE_BOOT_defconfig | 1 +
configs/ls2080aqds_defconfig | 2 +-
configs/ls2080aqds_nand_defconfig | 1 +
configs/ls2080aqds_qspi_defconfig | 1 +
configs/ls2080ardb_SECURE_BOOT_defconfig | 1 +
configs/ls2080ardb_defconfig | 2 +-
configs/ls2080ardb_nand_defconfig | 1 +
configs/lwmon5_defconfig | 1 +
configs/m28evk_defconfig | 1 +
configs/m53evk_defconfig | 1 +
configs/makalu_defconfig | 1 +
configs/malta64_defconfig | 1 +
configs/malta64el_defconfig | 1 +
configs/malta_defconfig | 1 +
configs/maltael_defconfig | 1 +
configs/mcx_defconfig | 1 +
configs/mecp5123_defconfig | 1 +
configs/motionpro_defconfig | 1 +
configs/mpc5121ads_defconfig | 1 +
configs/mpc5121ads_rev2_defconfig | 1 +
configs/mx25pdk_defconfig | 1 +
configs/mx28evk_auart_console_defconfig | 1 +
configs/mx28evk_defconfig | 1 +
configs/mx28evk_nand_defconfig | 1 +
configs/mx28evk_spi_defconfig | 1 +
configs/mx31ads_defconfig | 1 +
configs/mx31pdk_defconfig | 1 +
configs/mx35pdk_defconfig | 1 +
configs/mx51evk_defconfig | 1 +
configs/mx53evk_defconfig | 1 +
configs/nas220_defconfig | 1 +
configs/pcm030_LOWBOOT_defconfig | 1 +
configs/pcm030_defconfig | 1 +
configs/pcm052_defconfig | 1 +
configs/pdm360ng_defconfig | 1 +
configs/sheevaplug_defconfig | 1 +
configs/socrates_defconfig | 1 +
configs/sycamore_defconfig | 1 +
configs/tbs2910_defconfig | 1 +
configs/tqma6s_wru4_mmc_defconfig | 1 +
configs/v38b_defconfig | 1 +
configs/vme8349_defconfig | 1 +
configs/walnut_defconfig | 1 +
configs/woodburn_defconfig | 1 +
configs/woodburn_sd_defconfig | 1 +
configs/work_92105_defconfig | 1 +
configs/wtk_defconfig | 1 +
configs/x600_defconfig | 1 +
configs/xpedite1000_defconfig | 1 +
configs/xpedite517x_defconfig | 1 +
configs/xpedite520x_defconfig | 1 +
configs/xpedite537x_defconfig | 1 +
configs/xpedite550x_defconfig | 1 +
include/config_cmd_all.h | 1 -
include/configs/B4860QDS.h | 1 -
include/configs/BSC9132QDS.h | 1 -
include/configs/CPCI4052.h | 1 -
include/configs/M52277EVB.h | 1 -
include/configs/M53017EVB.h | 1 -
include/configs/M5329EVB.h | 1 -
include/configs/M5373EVB.h | 1 -
include/configs/M54418TWR.h | 1 -
include/configs/M54451EVB.h | 1 -
include/configs/M54455EVB.h | 1 -
include/configs/M5475EVB.h | 1 -
include/configs/M5485EVB.h | 1 -
include/configs/MIP405.h | 1 -
include/configs/MPC8308RDB.h | 1 -
include/configs/MPC8313ERDB.h | 1 -
include/configs/MPC8315ERDB.h | 1 -
include/configs/MPC8349EMDS.h | 1 -
include/configs/MPC8349ITX.h | 1 -
include/configs/MPC837XEMDS.h | 1 -
include/configs/MPC837XERDB.h | 1 -
include/configs/P1010RDB.h | 1 -
include/configs/PIP405.h | 1 -
include/configs/PLU405.h | 1 -
include/configs/PMC405DE.h | 1 -
include/configs/PMC440.h | 1 -
include/configs/T102xQDS.h | 1 -
include/configs/T102xRDB.h | 1 -
include/configs/T1040QDS.h | 1 -
include/configs/T104xRDB.h | 3 ---
include/configs/TQM5200.h | 1 -
include/configs/TQM823L.h | 1 -
include/configs/TQM823M.h | 1 -
include/configs/TQM834x.h | 1 -
include/configs/TQM850L.h | 1 -
include/configs/TQM850M.h | 1 -
include/configs/TQM855L.h | 1 -
include/configs/TQM855M.h | 1 -
include/configs/TQM860L.h | 1 -
include/configs/TQM860M.h | 1 -
include/configs/TQM862L.h | 1 -
include/configs/TQM862M.h | 1 -
include/configs/TQM885D.h | 1 -
include/configs/UCP1020.h | 1 -
include/configs/adp-ag101p.h | 5 -----
include/configs/apf27.h | 1 -
include/configs/apx4devkit.h | 1 -
include/configs/aristainetos-common.h | 1 -
include/configs/astro_mcf5373l.h | 1 -
include/configs/bamboo.h | 1 -
include/configs/bubinga.h | 1 -
include/configs/canmb.h | 1 -
include/configs/canyonlands.h | 2 --
include/configs/charon.h | 1 -
include/configs/cm5200.h | 1 -
include/configs/cyrus.h | 1 -
include/configs/digsy_mtc.h | 1 -
include/configs/dns325.h | 1 -
include/configs/eb_cpu5282.h | 1 -
include/configs/edb93xx.h | 1 -
include/configs/ethernut5.h | 1 -
include/configs/goflexhome.h | 1 -
include/configs/icon.h | 1 -
include/configs/ids8313.h | 1 -
include/configs/inka4x0.h | 1 -
include/configs/intip.h | 1 -
include/configs/ipek01.h | 1 -
include/configs/katmai.h | 1 -
include/configs/kilauea.h | 1 -
include/configs/ls1012aqds.h | 1 -
include/configs/ls2080aqds.h | 1 -
include/configs/ls2080ardb.h | 1 -
include/configs/lwmon5.h | 1 -
include/configs/m28evk.h | 1 -
include/configs/m53evk.h | 1 -
include/configs/makalu.h | 1 -
include/configs/malta.h | 1 -
include/configs/mcx.h | 1 -
include/configs/mecp5123.h | 1 -
include/configs/motionpro.h | 1 -
include/configs/mpc5121ads.h | 1 -
include/configs/mv-plug-common.h | 1 -
include/configs/mx25pdk.h | 1 -
include/configs/mx28evk.h | 1 -
include/configs/mx31ads.h | 6 ------
include/configs/mx31pdk.h | 1 -
include/configs/mx35pdk.h | 1 -
include/configs/mx51evk.h | 7 -------
include/configs/mx53evk.h | 2 --
include/configs/nas220.h | 1 -
include/configs/p1_p2_rdb_pc.h | 1 -
include/configs/pcm030.h | 1 -
include/configs/pcm052.h | 1 -
include/configs/pdm360ng.h | 1 -
include/configs/sandbox.h | 1 -
include/configs/socrates.h | 1 -
include/configs/tbs2910.h | 1 -
include/configs/tqma6_wru4.h | 1 -
include/configs/v38b.h | 1 -
include/configs/vme8349.h | 1 -
include/configs/walnut.h | 1 -
include/configs/woodburn_common.h | 1 -
include/configs/work_92105.h | 1 -
include/configs/x600.h | 1 -
include/configs/x86-common.h | 1 -
include/configs/xpedite1000.h | 1 -
include/configs/xpedite517x.h | 1 -
include/configs/xpedite520x.h | 1 -
include/configs/xpedite537x.h | 1 -
include/configs/xpedite550x.h | 1 -
387 files changed, 283 insertions(+), 131 deletions(-)
diff --git a/cmd/Kconfig b/cmd/Kconfig
index 73fc29e1b98..d9f7151bacd 100644
--- a/cmd/Kconfig
+++ b/cmd/Kconfig
@@ -715,6 +715,13 @@ config CMD_LED
with led on/off/togle/blink. Any LED drivers can be controlled with
this command, e.g. led_gpio.
+config CMD_DATE
+ bool "date"
+ default y if DM_RTC
+ help
+ Enable the 'date' command for getting/setting the time/date in RTC
+ devices.
+
config CMD_TIME
bool "time"
help
diff --git a/configs/B4420QDS_NAND_defconfig b/configs/B4420QDS_NAND_defconfig
index ca9f3592ec0..a33c8ea4f6b 100644
--- a/configs/B4420QDS_NAND_defconfig
+++ b/configs/B4420QDS_NAND_defconfig
@@ -25,6 +25,7 @@ CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
+CONFIG_CMD_DATE=y
CONFIG_CMD_EXT2=y
CONFIG_FSL_CAAM=y
# CONFIG_MMC is not set
diff --git a/configs/B4420QDS_SPIFLASH_defconfig b/configs/B4420QDS_SPIFLASH_defconfig
index 764145ac1f9..bf0b26f0a2c 100644
--- a/configs/B4420QDS_SPIFLASH_defconfig
+++ b/configs/B4420QDS_SPIFLASH_defconfig
@@ -16,6 +16,7 @@ CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
+CONFIG_CMD_DATE=y
CONFIG_CMD_EXT2=y
CONFIG_FSL_CAAM=y
# CONFIG_MMC is not set
diff --git a/configs/B4420QDS_defconfig b/configs/B4420QDS_defconfig
index 3aa228afefd..a64bc6bdb65 100644
--- a/configs/B4420QDS_defconfig
+++ b/configs/B4420QDS_defconfig
@@ -15,6 +15,7 @@ CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
+CONFIG_CMD_DATE=y
CONFIG_CMD_EXT2=y
CONFIG_FSL_CAAM=y
# CONFIG_MMC is not set
diff --git a/configs/B4860QDS_NAND_defconfig b/configs/B4860QDS_NAND_defconfig
index f0eb0cc6d7a..ce18507373f 100644
--- a/configs/B4860QDS_NAND_defconfig
+++ b/configs/B4860QDS_NAND_defconfig
@@ -25,6 +25,7 @@ CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
+CONFIG_CMD_DATE=y
CONFIG_CMD_EXT2=y
CONFIG_FSL_CAAM=y
# CONFIG_MMC is not set
diff --git a/configs/B4860QDS_SECURE_BOOT_defconfig b/configs/B4860QDS_SECURE_BOOT_defconfig
index a9eecc90f2c..e679d0a618b 100644
--- a/configs/B4860QDS_SECURE_BOOT_defconfig
+++ b/configs/B4860QDS_SECURE_BOOT_defconfig
@@ -17,6 +17,7 @@ CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
+CONFIG_CMD_DATE=y
CONFIG_CMD_EXT2=y
CONFIG_DM=y
# CONFIG_MMC is not set
diff --git a/configs/B4860QDS_SPIFLASH_defconfig b/configs/B4860QDS_SPIFLASH_defconfig
index db565c6fbcc..04849d63158 100644
--- a/configs/B4860QDS_SPIFLASH_defconfig
+++ b/configs/B4860QDS_SPIFLASH_defconfig
@@ -16,6 +16,7 @@ CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
+CONFIG_CMD_DATE=y
CONFIG_CMD_EXT2=y
CONFIG_FSL_CAAM=y
# CONFIG_MMC is not set
diff --git a/configs/B4860QDS_SRIO_PCIE_BOOT_defconfig b/configs/B4860QDS_SRIO_PCIE_BOOT_defconfig
index e5e6793081e..3f35106fbf8 100644
--- a/configs/B4860QDS_SRIO_PCIE_BOOT_defconfig
+++ b/configs/B4860QDS_SRIO_PCIE_BOOT_defconfig
@@ -18,6 +18,7 @@ CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
+CONFIG_CMD_DATE=y
CONFIG_CMD_EXT2=y
CONFIG_FSL_CAAM=y
# CONFIG_MMC is not set
diff --git a/configs/B4860QDS_defconfig b/configs/B4860QDS_defconfig
index e3e9e73d293..80e06fb0d6a 100644
--- a/configs/B4860QDS_defconfig
+++ b/configs/B4860QDS_defconfig
@@ -15,6 +15,7 @@ CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
+CONFIG_CMD_DATE=y
CONFIG_CMD_EXT2=y
CONFIG_FSL_CAAM=y
# CONFIG_MMC is not set
diff --git a/configs/BSC9132QDS_NAND_DDRCLK100_SECURE_defconfig b/configs/BSC9132QDS_NAND_DDRCLK100_SECURE_defconfig
index 60b3d7d4721..aea470cfbee 100644
--- a/configs/BSC9132QDS_NAND_DDRCLK100_SECURE_defconfig
+++ b/configs/BSC9132QDS_NAND_DDRCLK100_SECURE_defconfig
@@ -18,6 +18,7 @@ CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
+CONFIG_CMD_DATE=y
CONFIG_CMD_EXT2=y
CONFIG_CMD_FAT=y
CONFIG_DM=y
diff --git a/configs/BSC9132QDS_NAND_DDRCLK100_defconfig b/configs/BSC9132QDS_NAND_DDRCLK100_defconfig
index 0f0c3817481..42ee22741d4 100644
--- a/configs/BSC9132QDS_NAND_DDRCLK100_defconfig
+++ b/configs/BSC9132QDS_NAND_DDRCLK100_defconfig
@@ -19,6 +19,7 @@ CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
+CONFIG_CMD_DATE=y
CONFIG_CMD_EXT2=y
CONFIG_CMD_FAT=y
CONFIG_FSL_CAAM=y
diff --git a/configs/BSC9132QDS_NAND_DDRCLK133_SECURE_defconfig b/configs/BSC9132QDS_NAND_DDRCLK133_SECURE_defconfig
index e1b8b02c5c7..51e19946d8e 100644
--- a/configs/BSC9132QDS_NAND_DDRCLK133_SECURE_defconfig
+++ b/configs/BSC9132QDS_NAND_DDRCLK133_SECURE_defconfig
@@ -18,6 +18,7 @@ CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
+CONFIG_CMD_DATE=y
CONFIG_CMD_EXT2=y
CONFIG_CMD_FAT=y
CONFIG_DM=y
diff --git a/configs/BSC9132QDS_NAND_DDRCLK133_defconfig b/configs/BSC9132QDS_NAND_DDRCLK133_defconfig
index f39ebd844ae..81ace7bda4f 100644
--- a/configs/BSC9132QDS_NAND_DDRCLK133_defconfig
+++ b/configs/BSC9132QDS_NAND_DDRCLK133_defconfig
@@ -19,6 +19,7 @@ CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
+CONFIG_CMD_DATE=y
CONFIG_CMD_EXT2=y
CONFIG_CMD_FAT=y
CONFIG_FSL_CAAM=y
diff --git a/configs/BSC9132QDS_NOR_DDRCLK100_SECURE_defconfig b/configs/BSC9132QDS_NOR_DDRCLK100_SECURE_defconfig
index 693fd039f82..cea3cb44b87 100644
--- a/configs/BSC9132QDS_NOR_DDRCLK100_SECURE_defconfig
+++ b/configs/BSC9132QDS_NOR_DDRCLK100_SECURE_defconfig
@@ -18,6 +18,7 @@ CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
+CONFIG_CMD_DATE=y
CONFIG_CMD_EXT2=y
CONFIG_CMD_FAT=y
CONFIG_DM=y
diff --git a/configs/BSC9132QDS_NOR_DDRCLK100_defconfig b/configs/BSC9132QDS_NOR_DDRCLK100_defconfig
index bb34051c7aa..f07841feabd 100644
--- a/configs/BSC9132QDS_NOR_DDRCLK100_defconfig
+++ b/configs/BSC9132QDS_NOR_DDRCLK100_defconfig
@@ -16,6 +16,7 @@ CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
+CONFIG_CMD_DATE=y
CONFIG_CMD_EXT2=y
CONFIG_CMD_FAT=y
CONFIG_FSL_CAAM=y
diff --git a/configs/BSC9132QDS_NOR_DDRCLK133_SECURE_defconfig b/configs/BSC9132QDS_NOR_DDRCLK133_SECURE_defconfig
index 2d9b9068c4d..c5642abd904 100644
--- a/configs/BSC9132QDS_NOR_DDRCLK133_SECURE_defconfig
+++ b/configs/BSC9132QDS_NOR_DDRCLK133_SECURE_defconfig
@@ -18,6 +18,7 @@ CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
+CONFIG_CMD_DATE=y
CONFIG_CMD_EXT2=y
CONFIG_CMD_FAT=y
CONFIG_DM=y
diff --git a/configs/BSC9132QDS_NOR_DDRCLK133_defconfig b/configs/BSC9132QDS_NOR_DDRCLK133_defconfig
index f6a63f58d81..ae753405ec6 100644
--- a/configs/BSC9132QDS_NOR_DDRCLK133_defconfig
+++ b/configs/BSC9132QDS_NOR_DDRCLK133_defconfig
@@ -16,6 +16,7 @@ CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
+CONFIG_CMD_DATE=y
CONFIG_CMD_EXT2=y
CONFIG_CMD_FAT=y
CONFIG_FSL_CAAM=y
diff --git a/configs/BSC9132QDS_SDCARD_DDRCLK100_SECURE_defconfig b/configs/BSC9132QDS_SDCARD_DDRCLK100_SECURE_defconfig
index 2b14c316315..e8c548286b0 100644
--- a/configs/BSC9132QDS_SDCARD_DDRCLK100_SECURE_defconfig
+++ b/configs/BSC9132QDS_SDCARD_DDRCLK100_SECURE_defconfig
@@ -18,6 +18,7 @@ CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
+CONFIG_CMD_DATE=y
CONFIG_CMD_EXT2=y
CONFIG_CMD_FAT=y
CONFIG_DM=y
diff --git a/configs/BSC9132QDS_SDCARD_DDRCLK100_defconfig b/configs/BSC9132QDS_SDCARD_DDRCLK100_defconfig
index fab33a1149d..22413b4812d 100644
--- a/configs/BSC9132QDS_SDCARD_DDRCLK100_defconfig
+++ b/configs/BSC9132QDS_SDCARD_DDRCLK100_defconfig
@@ -16,6 +16,7 @@ CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
+CONFIG_CMD_DATE=y
CONFIG_CMD_EXT2=y
CONFIG_CMD_FAT=y
CONFIG_FSL_CAAM=y
diff --git a/configs/BSC9132QDS_SDCARD_DDRCLK133_SECURE_defconfig b/configs/BSC9132QDS_SDCARD_DDRCLK133_SECURE_defconfig
index 3ebadeea1c0..3afb011012d 100644
--- a/configs/BSC9132QDS_SDCARD_DDRCLK133_SECURE_defconfig
+++ b/configs/BSC9132QDS_SDCARD_DDRCLK133_SECURE_defconfig
@@ -18,6 +18,7 @@ CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
+CONFIG_CMD_DATE=y
CONFIG_CMD_EXT2=y
CONFIG_CMD_FAT=y
CONFIG_DM=y
diff --git a/configs/BSC9132QDS_SDCARD_DDRCLK133_defconfig b/configs/BSC9132QDS_SDCARD_DDRCLK133_defconfig
index e5a5410c1da..10cbd222d22 100644
--- a/configs/BSC9132QDS_SDCARD_DDRCLK133_defconfig
+++ b/configs/BSC9132QDS_SDCARD_DDRCLK133_defconfig
@@ -16,6 +16,7 @@ CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
+CONFIG_CMD_DATE=y
CONFIG_CMD_EXT2=y
CONFIG_CMD_FAT=y
CONFIG_FSL_CAAM=y
diff --git a/configs/BSC9132QDS_SPIFLASH_DDRCLK100_SECURE_defconfig b/configs/BSC9132QDS_SPIFLASH_DDRCLK100_SECURE_defconfig
index 7822c10f0aa..c5d17bc5162 100644
--- a/configs/BSC9132QDS_SPIFLASH_DDRCLK100_SECURE_defconfig
+++ b/configs/BSC9132QDS_SPIFLASH_DDRCLK100_SECURE_defconfig
@@ -18,6 +18,7 @@ CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
+CONFIG_CMD_DATE=y
CONFIG_CMD_EXT2=y
CONFIG_CMD_FAT=y
CONFIG_DM=y
diff --git a/configs/BSC9132QDS_SPIFLASH_DDRCLK100_defconfig b/configs/BSC9132QDS_SPIFLASH_DDRCLK100_defconfig
index 629c8929926..e848d8a2afd 100644
--- a/configs/BSC9132QDS_SPIFLASH_DDRCLK100_defconfig
+++ b/configs/BSC9132QDS_SPIFLASH_DDRCLK100_defconfig
@@ -16,6 +16,7 @@ CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
+CONFIG_CMD_DATE=y
CONFIG_CMD_EXT2=y
CONFIG_CMD_FAT=y
CONFIG_FSL_CAAM=y
diff --git a/configs/BSC9132QDS_SPIFLASH_DDRCLK133_SECURE_defconfig b/configs/BSC9132QDS_SPIFLASH_DDRCLK133_SECURE_defconfig
index 9f36cbd286c..ba0772c07dd 100644
--- a/configs/BSC9132QDS_SPIFLASH_DDRCLK133_SECURE_defconfig
+++ b/configs/BSC9132QDS_SPIFLASH_DDRCLK133_SECURE_defconfig
@@ -18,6 +18,7 @@ CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
+CONFIG_CMD_DATE=y
CONFIG_CMD_EXT2=y
CONFIG_CMD_FAT=y
CONFIG_DM=y
diff --git a/configs/BSC9132QDS_SPIFLASH_DDRCLK133_defconfig b/configs/BSC9132QDS_SPIFLASH_DDRCLK133_defconfig
index 684860e7d1c..444d5522938 100644
--- a/configs/BSC9132QDS_SPIFLASH_DDRCLK133_defconfig
+++ b/configs/BSC9132QDS_SPIFLASH_DDRCLK133_defconfig
@@ -16,6 +16,7 @@ CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
+CONFIG_CMD_DATE=y
CONFIG_CMD_EXT2=y
CONFIG_CMD_FAT=y
CONFIG_FSL_CAAM=y
diff --git a/configs/CPCI4052_defconfig b/configs/CPCI4052_defconfig
index b4089f7709c..4d818d7b7c8 100644
--- a/configs/CPCI4052_defconfig
+++ b/configs/CPCI4052_defconfig
@@ -16,6 +16,7 @@ CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_CMD_BSP=y
+CONFIG_CMD_DATE=y
CONFIG_CMD_FAT=y
CONFIG_MAC_PARTITION=y
# CONFIG_MMC is not set
diff --git a/configs/Cyrus_P5020_defconfig b/configs/Cyrus_P5020_defconfig
index 2307a6dd1b5..443eec675b6 100644
--- a/configs/Cyrus_P5020_defconfig
+++ b/configs/Cyrus_P5020_defconfig
@@ -19,6 +19,7 @@ CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
+CONFIG_CMD_DATE=y
CONFIG_CMD_EXT2=y
CONFIG_CMD_FAT=y
CONFIG_NETDEVICES=y
diff --git a/configs/Cyrus_P5040_defconfig b/configs/Cyrus_P5040_defconfig
index 768f495d181..7400f3978de 100644
--- a/configs/Cyrus_P5040_defconfig
+++ b/configs/Cyrus_P5040_defconfig
@@ -19,6 +19,7 @@ CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
+CONFIG_CMD_DATE=y
CONFIG_CMD_EXT2=y
CONFIG_CMD_FAT=y
CONFIG_NETDEVICES=y
diff --git a/configs/M52277EVB_defconfig b/configs/M52277EVB_defconfig
index 9772fa2349e..e7564011624 100644
--- a/configs/M52277EVB_defconfig
+++ b/configs/M52277EVB_defconfig
@@ -12,6 +12,7 @@ CONFIG_CMD_I2C=y
# CONFIG_CMD_NET is not set
# CONFIG_CMD_NFS is not set
CONFIG_CMD_CACHE=y
+CONFIG_CMD_DATE=y
CONFIG_MTD_NOR_FLASH=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_STMICRO=y
diff --git a/configs/M52277EVB_stmicro_defconfig b/configs/M52277EVB_stmicro_defconfig
index d5ced96a185..4f9d97ee55a 100644
--- a/configs/M52277EVB_stmicro_defconfig
+++ b/configs/M52277EVB_stmicro_defconfig
@@ -11,6 +11,7 @@ CONFIG_CMD_I2C=y
# CONFIG_CMD_NET is not set
# CONFIG_CMD_NFS is not set
CONFIG_CMD_CACHE=y
+CONFIG_CMD_DATE=y
CONFIG_MTD_NOR_FLASH=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_STMICRO=y
diff --git a/configs/M53017EVB_defconfig b/configs/M53017EVB_defconfig
index 2d146b98b19..19b1fcd237c 100644
--- a/configs/M53017EVB_defconfig
+++ b/configs/M53017EVB_defconfig
@@ -8,4 +8,5 @@ CONFIG_SYS_PROMPT="-> "
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_CMD_CACHE=y
+CONFIG_CMD_DATE=y
CONFIG_MTD_NOR_FLASH=y
diff --git a/configs/M5329AFEE_defconfig b/configs/M5329AFEE_defconfig
index 474db15001d..1b4431ae547 100644
--- a/configs/M5329AFEE_defconfig
+++ b/configs/M5329AFEE_defconfig
@@ -10,4 +10,5 @@ CONFIG_CMD_I2C=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_CMD_CACHE=y
+CONFIG_CMD_DATE=y
CONFIG_MTD_NOR_FLASH=y
diff --git a/configs/M5329BFEE_defconfig b/configs/M5329BFEE_defconfig
index 54c0c690592..cca678043e5 100644
--- a/configs/M5329BFEE_defconfig
+++ b/configs/M5329BFEE_defconfig
@@ -10,4 +10,5 @@ CONFIG_CMD_I2C=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_CMD_CACHE=y
+CONFIG_CMD_DATE=y
CONFIG_MTD_NOR_FLASH=y
diff --git a/configs/M5373EVB_defconfig b/configs/M5373EVB_defconfig
index e651f74090f..cc8b4402662 100644
--- a/configs/M5373EVB_defconfig
+++ b/configs/M5373EVB_defconfig
@@ -10,4 +10,5 @@ CONFIG_CMD_I2C=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_CMD_CACHE=y
+CONFIG_CMD_DATE=y
CONFIG_MTD_NOR_FLASH=y
diff --git a/configs/M54451EVB_defconfig b/configs/M54451EVB_defconfig
index 931e34b7e97..63c1a4bbe61 100644
--- a/configs/M54451EVB_defconfig
+++ b/configs/M54451EVB_defconfig
@@ -14,6 +14,7 @@ CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_CMD_CACHE=y
+CONFIG_CMD_DATE=y
CONFIG_MTD_NOR_FLASH=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_STMICRO=y
diff --git a/configs/M54451EVB_stmicro_defconfig b/configs/M54451EVB_stmicro_defconfig
index 3d63401d438..d6758250185 100644
--- a/configs/M54451EVB_stmicro_defconfig
+++ b/configs/M54451EVB_stmicro_defconfig
@@ -13,6 +13,7 @@ CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_CMD_CACHE=y
+CONFIG_CMD_DATE=y
CONFIG_MTD_NOR_FLASH=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_STMICRO=y
diff --git a/configs/M54455EVB_a66_defconfig b/configs/M54455EVB_a66_defconfig
index 1d420bb11a0..3aed04e8131 100644
--- a/configs/M54455EVB_a66_defconfig
+++ b/configs/M54455EVB_a66_defconfig
@@ -13,6 +13,7 @@ CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_CMD_CACHE=y
+CONFIG_CMD_DATE=y
CONFIG_CMD_EXT2=y
CONFIG_CMD_FAT=y
CONFIG_ISO_PARTITION=y
diff --git a/configs/M54455EVB_defconfig b/configs/M54455EVB_defconfig
index 96204bd1b72..6f624e6a00d 100644
--- a/configs/M54455EVB_defconfig
+++ b/configs/M54455EVB_defconfig
@@ -14,6 +14,7 @@ CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_CMD_CACHE=y
+CONFIG_CMD_DATE=y
CONFIG_CMD_EXT2=y
CONFIG_CMD_FAT=y
CONFIG_ISO_PARTITION=y
diff --git a/configs/M54455EVB_i66_defconfig b/configs/M54455EVB_i66_defconfig
index c056dbbf55a..ecc610b74b1 100644
--- a/configs/M54455EVB_i66_defconfig
+++ b/configs/M54455EVB_i66_defconfig
@@ -13,6 +13,7 @@ CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_CMD_CACHE=y
+CONFIG_CMD_DATE=y
CONFIG_CMD_EXT2=y
CONFIG_CMD_FAT=y
CONFIG_ISO_PARTITION=y
diff --git a/configs/M54455EVB_intel_defconfig b/configs/M54455EVB_intel_defconfig
index d06188c156c..93756b2e272 100644
--- a/configs/M54455EVB_intel_defconfig
+++ b/configs/M54455EVB_intel_defconfig
@@ -13,6 +13,7 @@ CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_CMD_CACHE=y
+CONFIG_CMD_DATE=y
CONFIG_CMD_EXT2=y
CONFIG_CMD_FAT=y
CONFIG_ISO_PARTITION=y
diff --git a/configs/M54455EVB_stm33_defconfig b/configs/M54455EVB_stm33_defconfig
index d551d267093..f10027693d4 100644
--- a/configs/M54455EVB_stm33_defconfig
+++ b/configs/M54455EVB_stm33_defconfig
@@ -13,6 +13,7 @@ CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_CMD_CACHE=y
+CONFIG_CMD_DATE=y
CONFIG_CMD_EXT2=y
CONFIG_CMD_FAT=y
CONFIG_ISO_PARTITION=y
diff --git a/configs/MIP405T_defconfig b/configs/MIP405T_defconfig
index d9e8b805dd2..833c263bb61 100644
--- a/configs/MIP405T_defconfig
+++ b/configs/MIP405T_defconfig
@@ -18,6 +18,7 @@ CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_CMD_BSP=y
CONFIG_CMD_CACHE=y
+CONFIG_CMD_DATE=y
CONFIG_CMD_FAT=y
CONFIG_MAC_PARTITION=y
CONFIG_ISO_PARTITION=y
diff --git a/configs/MIP405_defconfig b/configs/MIP405_defconfig
index 1b6d8ae26e6..3da515295ef 100644
--- a/configs/MIP405_defconfig
+++ b/configs/MIP405_defconfig
@@ -19,6 +19,7 @@ CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_CMD_BSP=y
CONFIG_CMD_CACHE=y
+CONFIG_CMD_DATE=y
CONFIG_CMD_FAT=y
CONFIG_MAC_PARTITION=y
CONFIG_ISO_PARTITION=y
diff --git a/configs/MPC8308RDB_defconfig b/configs/MPC8308RDB_defconfig
index 709b490257d..c0f994a5ea2 100644
--- a/configs/MPC8308RDB_defconfig
+++ b/configs/MPC8308RDB_defconfig
@@ -13,6 +13,7 @@ CONFIG_CMD_I2C=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
+CONFIG_CMD_DATE=y
CONFIG_CMD_FAT=y
CONFIG_MTD_NOR_FLASH=y
CONFIG_SYS_NS16550=y
diff --git a/configs/MPC8313ERDB_33_defconfig b/configs/MPC8313ERDB_33_defconfig
index c8dc080690a..f4bdfe046d6 100644
--- a/configs/MPC8313ERDB_33_defconfig
+++ b/configs/MPC8313ERDB_33_defconfig
@@ -12,6 +12,7 @@ CONFIG_CMD_GPIO=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
+CONFIG_CMD_DATE=y
# CONFIG_MMC is not set
CONFIG_MTD_NOR_FLASH=y
CONFIG_SYS_NS16550=y
diff --git a/configs/MPC8313ERDB_66_defconfig b/configs/MPC8313ERDB_66_defconfig
index 621f03520b6..119c04e6611 100644
--- a/configs/MPC8313ERDB_66_defconfig
+++ b/configs/MPC8313ERDB_66_defconfig
@@ -12,6 +12,7 @@ CONFIG_CMD_GPIO=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
+CONFIG_CMD_DATE=y
# CONFIG_MMC is not set
CONFIG_MTD_NOR_FLASH=y
CONFIG_SYS_NS16550=y
diff --git a/configs/MPC8313ERDB_NAND_33_defconfig b/configs/MPC8313ERDB_NAND_33_defconfig
index 7049c1d6383..64247a53356 100644
--- a/configs/MPC8313ERDB_NAND_33_defconfig
+++ b/configs/MPC8313ERDB_NAND_33_defconfig
@@ -15,6 +15,7 @@ CONFIG_CMD_GPIO=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
+CONFIG_CMD_DATE=y
# CONFIG_MMC is not set
CONFIG_MTD_NOR_FLASH=y
CONFIG_SYS_NS16550=y
diff --git a/configs/MPC8313ERDB_NAND_66_defconfig b/configs/MPC8313ERDB_NAND_66_defconfig
index 7558f7e2f5a..363d849efc5 100644
--- a/configs/MPC8313ERDB_NAND_66_defconfig
+++ b/configs/MPC8313ERDB_NAND_66_defconfig
@@ -15,6 +15,7 @@ CONFIG_CMD_GPIO=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
+CONFIG_CMD_DATE=y
# CONFIG_MMC is not set
CONFIG_MTD_NOR_FLASH=y
CONFIG_SYS_NS16550=y
diff --git a/configs/MPC8315ERDB_defconfig b/configs/MPC8315ERDB_defconfig
index 568da3a9f6f..dbe060f0016 100644
--- a/configs/MPC8315ERDB_defconfig
+++ b/configs/MPC8315ERDB_defconfig
@@ -10,6 +10,7 @@ CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
+CONFIG_CMD_DATE=y
CONFIG_CMD_EXT2=y
# CONFIG_MMC is not set
CONFIG_MTD_NOR_FLASH=y
diff --git a/configs/MPC8349EMDS_defconfig b/configs/MPC8349EMDS_defconfig
index 8fc08c28977..82a61f88833 100644
--- a/configs/MPC8349EMDS_defconfig
+++ b/configs/MPC8349EMDS_defconfig
@@ -9,6 +9,7 @@ CONFIG_CMD_I2C=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
+CONFIG_CMD_DATE=y
# CONFIG_MMC is not set
CONFIG_MTD_NOR_FLASH=y
# CONFIG_PCI is not set
diff --git a/configs/MPC8349ITXGP_defconfig b/configs/MPC8349ITXGP_defconfig
index 31f5f5dfb0f..fc672be7e91 100644
--- a/configs/MPC8349ITXGP_defconfig
+++ b/configs/MPC8349ITXGP_defconfig
@@ -12,6 +12,7 @@ CONFIG_CMD_I2C=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_PING=y
CONFIG_CMD_CACHE=y
+CONFIG_CMD_DATE=y
# CONFIG_MMC is not set
CONFIG_MTD_NOR_FLASH=y
CONFIG_SYS_NS16550=y
diff --git a/configs/MPC8349ITX_LOWBOOT_defconfig b/configs/MPC8349ITX_LOWBOOT_defconfig
index 564523f87b8..a97ce25a280 100644
--- a/configs/MPC8349ITX_LOWBOOT_defconfig
+++ b/configs/MPC8349ITX_LOWBOOT_defconfig
@@ -13,6 +13,7 @@ CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_PING=y
CONFIG_CMD_CACHE=y
+CONFIG_CMD_DATE=y
CONFIG_CMD_EXT2=y
CONFIG_CMD_FAT=y
# CONFIG_MMC is not set
diff --git a/configs/MPC8349ITX_defconfig b/configs/MPC8349ITX_defconfig
index dfa9a173c36..c61f260dc3b 100644
--- a/configs/MPC8349ITX_defconfig
+++ b/configs/MPC8349ITX_defconfig
@@ -13,6 +13,7 @@ CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_PING=y
CONFIG_CMD_CACHE=y
+CONFIG_CMD_DATE=y
CONFIG_CMD_EXT2=y
CONFIG_CMD_FAT=y
# CONFIG_MMC is not set
diff --git a/configs/MPC837XEMDS_HOST_defconfig b/configs/MPC837XEMDS_HOST_defconfig
index 165e30f99e8..774ecb81b53 100644
--- a/configs/MPC837XEMDS_HOST_defconfig
+++ b/configs/MPC837XEMDS_HOST_defconfig
@@ -11,6 +11,7 @@ CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
+CONFIG_CMD_DATE=y
CONFIG_CMD_EXT2=y
CONFIG_CMD_FAT=y
CONFIG_MTD_NOR_FLASH=y
diff --git a/configs/MPC837XEMDS_defconfig b/configs/MPC837XEMDS_defconfig
index b7dc8bdb3cb..f76cec11042 100644
--- a/configs/MPC837XEMDS_defconfig
+++ b/configs/MPC837XEMDS_defconfig
@@ -10,6 +10,7 @@ CONFIG_CMD_I2C=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
+CONFIG_CMD_DATE=y
CONFIG_CMD_EXT2=y
CONFIG_CMD_FAT=y
CONFIG_MTD_NOR_FLASH=y
diff --git a/configs/MPC837XERDB_defconfig b/configs/MPC837XERDB_defconfig
index ab7980412e2..717fee1cfe0 100644
--- a/configs/MPC837XERDB_defconfig
+++ b/configs/MPC837XERDB_defconfig
@@ -11,6 +11,7 @@ CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
+CONFIG_CMD_DATE=y
CONFIG_CMD_EXT2=y
CONFIG_CMD_FAT=y
CONFIG_MTD_NOR_FLASH=y
diff --git a/configs/MiniFAP_defconfig b/configs/MiniFAP_defconfig
index ee9e99a80fd..7d719f81f52 100644
--- a/configs/MiniFAP_defconfig
+++ b/configs/MiniFAP_defconfig
@@ -19,6 +19,7 @@ CONFIG_CMD_PING=y
CONFIG_CMD_SNTP=y
CONFIG_CMD_BMP=y
CONFIG_CMD_BSP=y
+CONFIG_CMD_DATE=y
CONFIG_CMD_EXT2=y
CONFIG_CMD_FAT=y
CONFIG_CMD_DIAG=y
diff --git a/configs/P1010RDB-PA_36BIT_NAND_SECBOOT_defconfig b/configs/P1010RDB-PA_36BIT_NAND_SECBOOT_defconfig
index 803a23b15d6..28029b8a74c 100644
--- a/configs/P1010RDB-PA_36BIT_NAND_SECBOOT_defconfig
+++ b/configs/P1010RDB-PA_36BIT_NAND_SECBOOT_defconfig
@@ -19,6 +19,7 @@ CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
+CONFIG_CMD_DATE=y
CONFIG_CMD_EXT2=y
CONFIG_CMD_FAT=y
CONFIG_DM=y
diff --git a/configs/P1010RDB-PA_36BIT_NAND_defconfig b/configs/P1010RDB-PA_36BIT_NAND_defconfig
index 23cd5152d2a..469cdbbf36a 100644
--- a/configs/P1010RDB-PA_36BIT_NAND_defconfig
+++ b/configs/P1010RDB-PA_36BIT_NAND_defconfig
@@ -28,6 +28,7 @@ CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
+CONFIG_CMD_DATE=y
CONFIG_CMD_EXT2=y
CONFIG_CMD_FAT=y
CONFIG_FSL_CAAM=y
diff --git a/configs/P1010RDB-PA_36BIT_NOR_SECBOOT_defconfig b/configs/P1010RDB-PA_36BIT_NOR_SECBOOT_defconfig
index b79f694d555..f9109e495a4 100644
--- a/configs/P1010RDB-PA_36BIT_NOR_SECBOOT_defconfig
+++ b/configs/P1010RDB-PA_36BIT_NOR_SECBOOT_defconfig
@@ -18,6 +18,7 @@ CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
+CONFIG_CMD_DATE=y
CONFIG_CMD_EXT2=y
CONFIG_CMD_FAT=y
CONFIG_DM=y
diff --git a/configs/P1010RDB-PA_36BIT_NOR_defconfig b/configs/P1010RDB-PA_36BIT_NOR_defconfig
index ed8c01d0b80..48157c22a4d 100644
--- a/configs/P1010RDB-PA_36BIT_NOR_defconfig
+++ b/configs/P1010RDB-PA_36BIT_NOR_defconfig
@@ -16,6 +16,7 @@ CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
+CONFIG_CMD_DATE=y
CONFIG_CMD_EXT2=y
CONFIG_CMD_FAT=y
CONFIG_FSL_CAAM=y
diff --git a/configs/P1010RDB-PA_36BIT_SDCARD_defconfig b/configs/P1010RDB-PA_36BIT_SDCARD_defconfig
index 632e7e5391b..29738f31264 100644
--- a/configs/P1010RDB-PA_36BIT_SDCARD_defconfig
+++ b/configs/P1010RDB-PA_36BIT_SDCARD_defconfig
@@ -26,6 +26,7 @@ CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
+CONFIG_CMD_DATE=y
CONFIG_CMD_EXT2=y
CONFIG_CMD_FAT=y
CONFIG_FSL_CAAM=y
diff --git a/configs/P1010RDB-PA_36BIT_SPIFLASH_SECBOOT_defconfig b/configs/P1010RDB-PA_36BIT_SPIFLASH_SECBOOT_defconfig
index 61b595483aa..a5cec4b8b1f 100644
--- a/configs/P1010RDB-PA_36BIT_SPIFLASH_SECBOOT_defconfig
+++ b/configs/P1010RDB-PA_36BIT_SPIFLASH_SECBOOT_defconfig
@@ -19,6 +19,7 @@ CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
+CONFIG_CMD_DATE=y
CONFIG_CMD_EXT2=y
CONFIG_CMD_FAT=y
CONFIG_DM=y
diff --git a/configs/P1010RDB-PA_36BIT_SPIFLASH_defconfig b/configs/P1010RDB-PA_36BIT_SPIFLASH_defconfig
index 5ff54867456..dc4a6a72c92 100644
--- a/configs/P1010RDB-PA_36BIT_SPIFLASH_defconfig
+++ b/configs/P1010RDB-PA_36BIT_SPIFLASH_defconfig
@@ -27,6 +27,7 @@ CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
+CONFIG_CMD_DATE=y
CONFIG_CMD_EXT2=y
CONFIG_CMD_FAT=y
CONFIG_FSL_CAAM=y
diff --git a/configs/P1010RDB-PA_NAND_SECBOOT_defconfig b/configs/P1010RDB-PA_NAND_SECBOOT_defconfig
index e2457520024..d720c229e22 100644
--- a/configs/P1010RDB-PA_NAND_SECBOOT_defconfig
+++ b/configs/P1010RDB-PA_NAND_SECBOOT_defconfig
@@ -18,6 +18,7 @@ CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
+CONFIG_CMD_DATE=y
CONFIG_CMD_EXT2=y
CONFIG_CMD_FAT=y
CONFIG_DM=y
diff --git a/configs/P1010RDB-PA_NAND_defconfig b/configs/P1010RDB-PA_NAND_defconfig
index 56ab91487eb..77b4b9437fd 100644
--- a/configs/P1010RDB-PA_NAND_defconfig
+++ b/configs/P1010RDB-PA_NAND_defconfig
@@ -27,6 +27,7 @@ CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
+CONFIG_CMD_DATE=y
CONFIG_CMD_EXT2=y
CONFIG_CMD_FAT=y
CONFIG_FSL_CAAM=y
diff --git a/configs/P1010RDB-PA_NOR_SECBOOT_defconfig b/configs/P1010RDB-PA_NOR_SECBOOT_defconfig
index 87a052ca942..d473d6ddaa7 100644
--- a/configs/P1010RDB-PA_NOR_SECBOOT_defconfig
+++ b/configs/P1010RDB-PA_NOR_SECBOOT_defconfig
@@ -17,6 +17,7 @@ CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
+CONFIG_CMD_DATE=y
CONFIG_CMD_EXT2=y
CONFIG_CMD_FAT=y
CONFIG_DM=y
diff --git a/configs/P1010RDB-PA_NOR_defconfig b/configs/P1010RDB-PA_NOR_defconfig
index 4e82d34e1b5..e94feb5997b 100644
--- a/configs/P1010RDB-PA_NOR_defconfig
+++ b/configs/P1010RDB-PA_NOR_defconfig
@@ -15,6 +15,7 @@ CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
+CONFIG_CMD_DATE=y
CONFIG_CMD_EXT2=y
CONFIG_CMD_FAT=y
CONFIG_FSL_CAAM=y
diff --git a/configs/P1010RDB-PA_SDCARD_defconfig b/configs/P1010RDB-PA_SDCARD_defconfig
index dd23131b1fb..d0e5de8331b 100644
--- a/configs/P1010RDB-PA_SDCARD_defconfig
+++ b/configs/P1010RDB-PA_SDCARD_defconfig
@@ -25,6 +25,7 @@ CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
+CONFIG_CMD_DATE=y
CONFIG_CMD_EXT2=y
CONFIG_CMD_FAT=y
CONFIG_FSL_CAAM=y
diff --git a/configs/P1010RDB-PA_SPIFLASH_SECBOOT_defconfig b/configs/P1010RDB-PA_SPIFLASH_SECBOOT_defconfig
index dbf7363a51f..aa944310943 100644
--- a/configs/P1010RDB-PA_SPIFLASH_SECBOOT_defconfig
+++ b/configs/P1010RDB-PA_SPIFLASH_SECBOOT_defconfig
@@ -18,6 +18,7 @@ CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
+CONFIG_CMD_DATE=y
CONFIG_CMD_EXT2=y
CONFIG_CMD_FAT=y
CONFIG_DM=y
diff --git a/configs/P1010RDB-PA_SPIFLASH_defconfig b/configs/P1010RDB-PA_SPIFLASH_defconfig
index 1ab027a1ebb..f15da83b99d 100644
--- a/configs/P1010RDB-PA_SPIFLASH_defconfig
+++ b/configs/P1010RDB-PA_SPIFLASH_defconfig
@@ -26,6 +26,7 @@ CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
+CONFIG_CMD_DATE=y
CONFIG_CMD_EXT2=y
CONFIG_CMD_FAT=y
CONFIG_FSL_CAAM=y
diff --git a/configs/P1010RDB-PB_36BIT_NAND_SECBOOT_defconfig b/configs/P1010RDB-PB_36BIT_NAND_SECBOOT_defconfig
index d0001cd6a93..137a9ff90b8 100644
--- a/configs/P1010RDB-PB_36BIT_NAND_SECBOOT_defconfig
+++ b/configs/P1010RDB-PB_36BIT_NAND_SECBOOT_defconfig
@@ -19,6 +19,7 @@ CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
+CONFIG_CMD_DATE=y
CONFIG_CMD_EXT2=y
CONFIG_CMD_FAT=y
CONFIG_DM=y
diff --git a/configs/P1010RDB-PB_36BIT_NAND_defconfig b/configs/P1010RDB-PB_36BIT_NAND_defconfig
index f48be239530..36d9b1652df 100644
--- a/configs/P1010RDB-PB_36BIT_NAND_defconfig
+++ b/configs/P1010RDB-PB_36BIT_NAND_defconfig
@@ -28,6 +28,7 @@ CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
+CONFIG_CMD_DATE=y
CONFIG_CMD_EXT2=y
CONFIG_CMD_FAT=y
CONFIG_FSL_CAAM=y
diff --git a/configs/P1010RDB-PB_36BIT_NOR_SECBOOT_defconfig b/configs/P1010RDB-PB_36BIT_NOR_SECBOOT_defconfig
index a6a18e71899..d1c728b01eb 100644
--- a/configs/P1010RDB-PB_36BIT_NOR_SECBOOT_defconfig
+++ b/configs/P1010RDB-PB_36BIT_NOR_SECBOOT_defconfig
@@ -18,6 +18,7 @@ CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
+CONFIG_CMD_DATE=y
CONFIG_CMD_EXT2=y
CONFIG_CMD_FAT=y
CONFIG_DM=y
diff --git a/configs/P1010RDB-PB_36BIT_NOR_defconfig b/configs/P1010RDB-PB_36BIT_NOR_defconfig
index 4bea0cea5c6..53b5d732e48 100644
--- a/configs/P1010RDB-PB_36BIT_NOR_defconfig
+++ b/configs/P1010RDB-PB_36BIT_NOR_defconfig
@@ -16,6 +16,7 @@ CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
+CONFIG_CMD_DATE=y
CONFIG_CMD_EXT2=y
CONFIG_CMD_FAT=y
CONFIG_FSL_CAAM=y
diff --git a/configs/P1010RDB-PB_36BIT_SDCARD_defconfig b/configs/P1010RDB-PB_36BIT_SDCARD_defconfig
index 3545f1dcf41..343f225f68d 100644
--- a/configs/P1010RDB-PB_36BIT_SDCARD_defconfig
+++ b/configs/P1010RDB-PB_36BIT_SDCARD_defconfig
@@ -26,6 +26,7 @@ CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
+CONFIG_CMD_DATE=y
CONFIG_CMD_EXT2=y
CONFIG_CMD_FAT=y
CONFIG_FSL_CAAM=y
diff --git a/configs/P1010RDB-PB_36BIT_SPIFLASH_SECBOOT_defconfig b/configs/P1010RDB-PB_36BIT_SPIFLASH_SECBOOT_defconfig
index 79f6f64e2af..2c1f471c619 100644
--- a/configs/P1010RDB-PB_36BIT_SPIFLASH_SECBOOT_defconfig
+++ b/configs/P1010RDB-PB_36BIT_SPIFLASH_SECBOOT_defconfig
@@ -19,6 +19,7 @@ CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
+CONFIG_CMD_DATE=y
CONFIG_CMD_EXT2=y
CONFIG_CMD_FAT=y
CONFIG_DM=y
diff --git a/configs/P1010RDB-PB_36BIT_SPIFLASH_defconfig b/configs/P1010RDB-PB_36BIT_SPIFLASH_defconfig
index 5d4bc301afb..8f33a9be788 100644
--- a/configs/P1010RDB-PB_36BIT_SPIFLASH_defconfig
+++ b/configs/P1010RDB-PB_36BIT_SPIFLASH_defconfig
@@ -27,6 +27,7 @@ CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
+CONFIG_CMD_DATE=y
CONFIG_CMD_EXT2=y
CONFIG_CMD_FAT=y
CONFIG_FSL_CAAM=y
diff --git a/configs/P1010RDB-PB_NAND_SECBOOT_defconfig b/configs/P1010RDB-PB_NAND_SECBOOT_defconfig
index 60fde61c044..765e460d644 100644
--- a/configs/P1010RDB-PB_NAND_SECBOOT_defconfig
+++ b/configs/P1010RDB-PB_NAND_SECBOOT_defconfig
@@ -18,6 +18,7 @@ CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
+CONFIG_CMD_DATE=y
CONFIG_CMD_EXT2=y
CONFIG_CMD_FAT=y
CONFIG_DM=y
diff --git a/configs/P1010RDB-PB_NAND_defconfig b/configs/P1010RDB-PB_NAND_defconfig
index 25b713b3553..0a81999547c 100644
--- a/configs/P1010RDB-PB_NAND_defconfig
+++ b/configs/P1010RDB-PB_NAND_defconfig
@@ -28,6 +28,7 @@ CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
+CONFIG_CMD_DATE=y
CONFIG_CMD_EXT2=y
CONFIG_CMD_FAT=y
CONFIG_FSL_CAAM=y
diff --git a/configs/P1010RDB-PB_NOR_SECBOOT_defconfig b/configs/P1010RDB-PB_NOR_SECBOOT_defconfig
index 08b38311f43..76f28fd817f 100644
--- a/configs/P1010RDB-PB_NOR_SECBOOT_defconfig
+++ b/configs/P1010RDB-PB_NOR_SECBOOT_defconfig
@@ -17,6 +17,7 @@ CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
+CONFIG_CMD_DATE=y
CONFIG_CMD_EXT2=y
CONFIG_CMD_FAT=y
CONFIG_DM=y
diff --git a/configs/P1010RDB-PB_NOR_defconfig b/configs/P1010RDB-PB_NOR_defconfig
index 0564908d37a..35e85306fc9 100644
--- a/configs/P1010RDB-PB_NOR_defconfig
+++ b/configs/P1010RDB-PB_NOR_defconfig
@@ -15,6 +15,7 @@ CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
+CONFIG_CMD_DATE=y
CONFIG_CMD_EXT2=y
CONFIG_CMD_FAT=y
CONFIG_FSL_CAAM=y
diff --git a/configs/P1010RDB-PB_SDCARD_defconfig b/configs/P1010RDB-PB_SDCARD_defconfig
index e59f7fa0f13..1c1781b289a 100644
--- a/configs/P1010RDB-PB_SDCARD_defconfig
+++ b/configs/P1010RDB-PB_SDCARD_defconfig
@@ -25,6 +25,7 @@ CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
+CONFIG_CMD_DATE=y
CONFIG_CMD_EXT2=y
CONFIG_CMD_FAT=y
CONFIG_FSL_CAAM=y
diff --git a/configs/P1010RDB-PB_SPIFLASH_SECBOOT_defconfig b/configs/P1010RDB-PB_SPIFLASH_SECBOOT_defconfig
index 5189ee9fb53..a0c9a716ae2 100644
--- a/configs/P1010RDB-PB_SPIFLASH_SECBOOT_defconfig
+++ b/configs/P1010RDB-PB_SPIFLASH_SECBOOT_defconfig
@@ -18,6 +18,7 @@ CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
+CONFIG_CMD_DATE=y
CONFIG_CMD_EXT2=y
CONFIG_CMD_FAT=y
CONFIG_DM=y
diff --git a/configs/P1010RDB-PB_SPIFLASH_defconfig b/configs/P1010RDB-PB_SPIFLASH_defconfig
index 44093b95d27..6070bf1f577 100644
--- a/configs/P1010RDB-PB_SPIFLASH_defconfig
+++ b/configs/P1010RDB-PB_SPIFLASH_defconfig
@@ -26,6 +26,7 @@ CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
+CONFIG_CMD_DATE=y
CONFIG_CMD_EXT2=y
CONFIG_CMD_FAT=y
CONFIG_FSL_CAAM=y
diff --git a/configs/P1020MBG-PC_36BIT_SDCARD_defconfig b/configs/P1020MBG-PC_36BIT_SDCARD_defconfig
index f8d343c45b1..e50bbb7e410 100644
--- a/configs/P1020MBG-PC_36BIT_SDCARD_defconfig
+++ b/configs/P1020MBG-PC_36BIT_SDCARD_defconfig
@@ -23,6 +23,7 @@ CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
+CONFIG_CMD_DATE=y
CONFIG_CMD_EXT2=y
CONFIG_CMD_FAT=y
CONFIG_MTD_NOR_FLASH=y
diff --git a/configs/P1020MBG-PC_36BIT_defconfig b/configs/P1020MBG-PC_36BIT_defconfig
index 0b2652e2e1a..45620a93b22 100644
--- a/configs/P1020MBG-PC_36BIT_defconfig
+++ b/configs/P1020MBG-PC_36BIT_defconfig
@@ -14,6 +14,7 @@ CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
+CONFIG_CMD_DATE=y
CONFIG_CMD_EXT2=y
CONFIG_CMD_FAT=y
CONFIG_MTD_NOR_FLASH=y
diff --git a/configs/P1020MBG-PC_SDCARD_defconfig b/configs/P1020MBG-PC_SDCARD_defconfig
index df2556abeb8..6d8041fed97 100644
--- a/configs/P1020MBG-PC_SDCARD_defconfig
+++ b/configs/P1020MBG-PC_SDCARD_defconfig
@@ -22,6 +22,7 @@ CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
+CONFIG_CMD_DATE=y
CONFIG_CMD_EXT2=y
CONFIG_CMD_FAT=y
CONFIG_MTD_NOR_FLASH=y
diff --git a/configs/P1020MBG-PC_defconfig b/configs/P1020MBG-PC_defconfig
index 11144c5d76c..c0dd859a034 100644
--- a/configs/P1020MBG-PC_defconfig
+++ b/configs/P1020MBG-PC_defconfig
@@ -13,6 +13,7 @@ CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
+CONFIG_CMD_DATE=y
CONFIG_CMD_EXT2=y
CONFIG_CMD_FAT=y
CONFIG_MTD_NOR_FLASH=y
diff --git a/configs/P1020RDB-PC_36BIT_NAND_defconfig b/configs/P1020RDB-PC_36BIT_NAND_defconfig
index f86b1b43c99..d04f3dd26a1 100644
--- a/configs/P1020RDB-PC_36BIT_NAND_defconfig
+++ b/configs/P1020RDB-PC_36BIT_NAND_defconfig
@@ -26,6 +26,7 @@ CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
+CONFIG_CMD_DATE=y
CONFIG_CMD_EXT2=y
CONFIG_CMD_FAT=y
CONFIG_MTD_NOR_FLASH=y
diff --git a/configs/P1020RDB-PC_36BIT_SDCARD_defconfig b/configs/P1020RDB-PC_36BIT_SDCARD_defconfig
index 3c772351d28..b5837ca7a91 100644
--- a/configs/P1020RDB-PC_36BIT_SDCARD_defconfig
+++ b/configs/P1020RDB-PC_36BIT_SDCARD_defconfig
@@ -24,6 +24,7 @@ CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
+CONFIG_CMD_DATE=y
CONFIG_CMD_EXT2=y
CONFIG_CMD_FAT=y
CONFIG_MTD_NOR_FLASH=y
diff --git a/configs/P1020RDB-PC_36BIT_SPIFLASH_defconfig b/configs/P1020RDB-PC_36BIT_SPIFLASH_defconfig
index 91ba858c4f3..59c05f894f7 100644
--- a/configs/P1020RDB-PC_36BIT_SPIFLASH_defconfig
+++ b/configs/P1020RDB-PC_36BIT_SPIFLASH_defconfig
@@ -25,6 +25,7 @@ CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
+CONFIG_CMD_DATE=y
CONFIG_CMD_EXT2=y
CONFIG_CMD_FAT=y
CONFIG_MTD_NOR_FLASH=y
diff --git a/configs/P1020RDB-PC_36BIT_defconfig b/configs/P1020RDB-PC_36BIT_defconfig
index 8ae3184a59e..85fbc05f0fc 100644
--- a/configs/P1020RDB-PC_36BIT_defconfig
+++ b/configs/P1020RDB-PC_36BIT_defconfig
@@ -15,6 +15,7 @@ CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
+CONFIG_CMD_DATE=y
CONFIG_CMD_EXT2=y
CONFIG_CMD_FAT=y
CONFIG_MTD_NOR_FLASH=y
diff --git a/configs/P1020RDB-PC_NAND_defconfig b/configs/P1020RDB-PC_NAND_defconfig
index 8301c77ca2f..e99890ce914 100644
--- a/configs/P1020RDB-PC_NAND_defconfig
+++ b/configs/P1020RDB-PC_NAND_defconfig
@@ -25,6 +25,7 @@ CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
+CONFIG_CMD_DATE=y
CONFIG_CMD_EXT2=y
CONFIG_CMD_FAT=y
CONFIG_MTD_NOR_FLASH=y
diff --git a/configs/P1020RDB-PC_SDCARD_defconfig b/configs/P1020RDB-PC_SDCARD_defconfig
index dc142b0da07..1a7f5cd5f76 100644
--- a/configs/P1020RDB-PC_SDCARD_defconfig
+++ b/configs/P1020RDB-PC_SDCARD_defconfig
@@ -23,6 +23,7 @@ CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
+CONFIG_CMD_DATE=y
CONFIG_CMD_EXT2=y
CONFIG_CMD_FAT=y
CONFIG_MTD_NOR_FLASH=y
diff --git a/configs/P1020RDB-PC_SPIFLASH_defconfig b/configs/P1020RDB-PC_SPIFLASH_defconfig
index a01122b8cf3..13e63c76fa9 100644
--- a/configs/P1020RDB-PC_SPIFLASH_defconfig
+++ b/configs/P1020RDB-PC_SPIFLASH_defconfig
@@ -24,6 +24,7 @@ CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
+CONFIG_CMD_DATE=y
CONFIG_CMD_EXT2=y
CONFIG_CMD_FAT=y
CONFIG_MTD_NOR_FLASH=y
diff --git a/configs/P1020RDB-PC_defconfig b/configs/P1020RDB-PC_defconfig
index 308b4f23cee..19febe4cc95 100644
--- a/configs/P1020RDB-PC_defconfig
+++ b/configs/P1020RDB-PC_defconfig
@@ -14,6 +14,7 @@ CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
+CONFIG_CMD_DATE=y
CONFIG_CMD_EXT2=y
CONFIG_CMD_FAT=y
CONFIG_MTD_NOR_FLASH=y
diff --git a/configs/P1020RDB-PD_NAND_defconfig b/configs/P1020RDB-PD_NAND_defconfig
index 499e9b63f81..56e874630b8 100644
--- a/configs/P1020RDB-PD_NAND_defconfig
+++ b/configs/P1020RDB-PD_NAND_defconfig
@@ -25,6 +25,7 @@ CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
+CONFIG_CMD_DATE=y
CONFIG_CMD_EXT2=y
CONFIG_CMD_FAT=y
CONFIG_MTD_NOR_FLASH=y
diff --git a/configs/P1020RDB-PD_SDCARD_defconfig b/configs/P1020RDB-PD_SDCARD_defconfig
index 7b725fd85c9..67dbcface53 100644
--- a/configs/P1020RDB-PD_SDCARD_defconfig
+++ b/configs/P1020RDB-PD_SDCARD_defconfig
@@ -23,6 +23,7 @@ CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
+CONFIG_CMD_DATE=y
CONFIG_CMD_EXT2=y
CONFIG_CMD_FAT=y
CONFIG_MTD_NOR_FLASH=y
diff --git a/configs/P1020RDB-PD_SPIFLASH_defconfig b/configs/P1020RDB-PD_SPIFLASH_defconfig
index 25854642d6e..7b58c085cbd 100644
--- a/configs/P1020RDB-PD_SPIFLASH_defconfig
+++ b/configs/P1020RDB-PD_SPIFLASH_defconfig
@@ -24,6 +24,7 @@ CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
+CONFIG_CMD_DATE=y
CONFIG_CMD_EXT2=y
CONFIG_CMD_FAT=y
CONFIG_MTD_NOR_FLASH=y
diff --git a/configs/P1020RDB-PD_defconfig b/configs/P1020RDB-PD_defconfig
index 05d22482792..ce1bfa2e24a 100644
--- a/configs/P1020RDB-PD_defconfig
+++ b/configs/P1020RDB-PD_defconfig
@@ -14,6 +14,7 @@ CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
+CONFIG_CMD_DATE=y
CONFIG_CMD_EXT2=y
CONFIG_CMD_FAT=y
CONFIG_MTD_NOR_FLASH=y
diff --git a/configs/P1020UTM-PC_36BIT_SDCARD_defconfig b/configs/P1020UTM-PC_36BIT_SDCARD_defconfig
index 44e6cb423e2..b9bc52e75e0 100644
--- a/configs/P1020UTM-PC_36BIT_SDCARD_defconfig
+++ b/configs/P1020UTM-PC_36BIT_SDCARD_defconfig
@@ -23,6 +23,7 @@ CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
+CONFIG_CMD_DATE=y
CONFIG_CMD_EXT2=y
CONFIG_CMD_FAT=y
CONFIG_MTD_NOR_FLASH=y
diff --git a/configs/P1020UTM-PC_36BIT_defconfig b/configs/P1020UTM-PC_36BIT_defconfig
index 64e66e20ff1..f25d19bb6f3 100644
--- a/configs/P1020UTM-PC_36BIT_defconfig
+++ b/configs/P1020UTM-PC_36BIT_defconfig
@@ -14,6 +14,7 @@ CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
+CONFIG_CMD_DATE=y
CONFIG_CMD_EXT2=y
CONFIG_CMD_FAT=y
CONFIG_MTD_NOR_FLASH=y
diff --git a/configs/P1020UTM-PC_SDCARD_defconfig b/configs/P1020UTM-PC_SDCARD_defconfig
index 35e1e40ef33..b2535524a70 100644
--- a/configs/P1020UTM-PC_SDCARD_defconfig
+++ b/configs/P1020UTM-PC_SDCARD_defconfig
@@ -22,6 +22,7 @@ CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
+CONFIG_CMD_DATE=y
CONFIG_CMD_EXT2=y
CONFIG_CMD_FAT=y
CONFIG_MTD_NOR_FLASH=y
diff --git a/configs/P1020UTM-PC_defconfig b/configs/P1020UTM-PC_defconfig
index 25022b2b6d2..2e367099ed9 100644
--- a/configs/P1020UTM-PC_defconfig
+++ b/configs/P1020UTM-PC_defconfig
@@ -13,6 +13,7 @@ CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
+CONFIG_CMD_DATE=y
CONFIG_CMD_EXT2=y
CONFIG_CMD_FAT=y
CONFIG_MTD_NOR_FLASH=y
diff --git a/configs/P1021RDB-PC_36BIT_NAND_defconfig b/configs/P1021RDB-PC_36BIT_NAND_defconfig
index 1abea9d195a..de7188866ee 100644
--- a/configs/P1021RDB-PC_36BIT_NAND_defconfig
+++ b/configs/P1021RDB-PC_36BIT_NAND_defconfig
@@ -26,6 +26,7 @@ CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
+CONFIG_CMD_DATE=y
CONFIG_CMD_EXT2=y
CONFIG_CMD_FAT=y
CONFIG_MTD_NOR_FLASH=y
diff --git a/configs/P1021RDB-PC_36BIT_SDCARD_defconfig b/configs/P1021RDB-PC_36BIT_SDCARD_defconfig
index f944f51d1f8..7848b593404 100644
--- a/configs/P1021RDB-PC_36BIT_SDCARD_defconfig
+++ b/configs/P1021RDB-PC_36BIT_SDCARD_defconfig
@@ -24,6 +24,7 @@ CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
+CONFIG_CMD_DATE=y
CONFIG_CMD_EXT2=y
CONFIG_CMD_FAT=y
CONFIG_MTD_NOR_FLASH=y
diff --git a/configs/P1021RDB-PC_36BIT_SPIFLASH_defconfig b/configs/P1021RDB-PC_36BIT_SPIFLASH_defconfig
index c9a0d86aba0..7b187cd1232 100644
--- a/configs/P1021RDB-PC_36BIT_SPIFLASH_defconfig
+++ b/configs/P1021RDB-PC_36BIT_SPIFLASH_defconfig
@@ -25,6 +25,7 @@ CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
+CONFIG_CMD_DATE=y
CONFIG_CMD_EXT2=y
CONFIG_CMD_FAT=y
CONFIG_MTD_NOR_FLASH=y
diff --git a/configs/P1021RDB-PC_36BIT_defconfig b/configs/P1021RDB-PC_36BIT_defconfig
index 0cc56fd5933..82a2637bf4a 100644
--- a/configs/P1021RDB-PC_36BIT_defconfig
+++ b/configs/P1021RDB-PC_36BIT_defconfig
@@ -15,6 +15,7 @@ CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
+CONFIG_CMD_DATE=y
CONFIG_CMD_EXT2=y
CONFIG_CMD_FAT=y
CONFIG_MTD_NOR_FLASH=y
diff --git a/configs/P1021RDB-PC_NAND_defconfig b/configs/P1021RDB-PC_NAND_defconfig
index 4d99d7ba660..126cfc9b9ff 100644
--- a/configs/P1021RDB-PC_NAND_defconfig
+++ b/configs/P1021RDB-PC_NAND_defconfig
@@ -25,6 +25,7 @@ CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
+CONFIG_CMD_DATE=y
CONFIG_CMD_EXT2=y
CONFIG_CMD_FAT=y
CONFIG_MTD_NOR_FLASH=y
diff --git a/configs/P1021RDB-PC_SDCARD_defconfig b/configs/P1021RDB-PC_SDCARD_defconfig
index cab564917e0..b74bc653020 100644
--- a/configs/P1021RDB-PC_SDCARD_defconfig
+++ b/configs/P1021RDB-PC_SDCARD_defconfig
@@ -23,6 +23,7 @@ CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
+CONFIG_CMD_DATE=y
CONFIG_CMD_EXT2=y
CONFIG_CMD_FAT=y
CONFIG_MTD_NOR_FLASH=y
diff --git a/configs/P1021RDB-PC_SPIFLASH_defconfig b/configs/P1021RDB-PC_SPIFLASH_defconfig
index 82a010642da..48f66b211aa 100644
--- a/configs/P1021RDB-PC_SPIFLASH_defconfig
+++ b/configs/P1021RDB-PC_SPIFLASH_defconfig
@@ -24,6 +24,7 @@ CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
+CONFIG_CMD_DATE=y
CONFIG_CMD_EXT2=y
CONFIG_CMD_FAT=y
CONFIG_MTD_NOR_FLASH=y
diff --git a/configs/P1021RDB-PC_defconfig b/configs/P1021RDB-PC_defconfig
index 853c05b2052..c7d109cb56b 100644
--- a/configs/P1021RDB-PC_defconfig
+++ b/configs/P1021RDB-PC_defconfig
@@ -14,6 +14,7 @@ CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
+CONFIG_CMD_DATE=y
CONFIG_CMD_EXT2=y
CONFIG_CMD_FAT=y
CONFIG_MTD_NOR_FLASH=y
diff --git a/configs/P1024RDB_36BIT_defconfig b/configs/P1024RDB_36BIT_defconfig
index ddfba3beef7..80880d6daa3 100644
--- a/configs/P1024RDB_36BIT_defconfig
+++ b/configs/P1024RDB_36BIT_defconfig
@@ -15,6 +15,7 @@ CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
+CONFIG_CMD_DATE=y
CONFIG_CMD_EXT2=y
CONFIG_CMD_FAT=y
CONFIG_MTD_NOR_FLASH=y
diff --git a/configs/P1024RDB_NAND_defconfig b/configs/P1024RDB_NAND_defconfig
index 19120da8b29..350923a0653 100644
--- a/configs/P1024RDB_NAND_defconfig
+++ b/configs/P1024RDB_NAND_defconfig
@@ -25,6 +25,7 @@ CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
+CONFIG_CMD_DATE=y
CONFIG_CMD_EXT2=y
CONFIG_CMD_FAT=y
CONFIG_MTD_NOR_FLASH=y
diff --git a/configs/P1024RDB_SDCARD_defconfig b/configs/P1024RDB_SDCARD_defconfig
index 2e55e5d560c..9343fbba1e1 100644
--- a/configs/P1024RDB_SDCARD_defconfig
+++ b/configs/P1024RDB_SDCARD_defconfig
@@ -23,6 +23,7 @@ CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
+CONFIG_CMD_DATE=y
CONFIG_CMD_EXT2=y
CONFIG_CMD_FAT=y
CONFIG_MTD_NOR_FLASH=y
diff --git a/configs/P1024RDB_SPIFLASH_defconfig b/configs/P1024RDB_SPIFLASH_defconfig
index fefbb16ec41..a500b09d66b 100644
--- a/configs/P1024RDB_SPIFLASH_defconfig
+++ b/configs/P1024RDB_SPIFLASH_defconfig
@@ -24,6 +24,7 @@ CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
+CONFIG_CMD_DATE=y
CONFIG_CMD_EXT2=y
CONFIG_CMD_FAT=y
CONFIG_MTD_NOR_FLASH=y
diff --git a/configs/P1024RDB_defconfig b/configs/P1024RDB_defconfig
index e4ef7e6f397..5253acf01f3 100644
--- a/configs/P1024RDB_defconfig
+++ b/configs/P1024RDB_defconfig
@@ -14,6 +14,7 @@ CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
+CONFIG_CMD_DATE=y
CONFIG_CMD_EXT2=y
CONFIG_CMD_FAT=y
CONFIG_MTD_NOR_FLASH=y
diff --git a/configs/P1025RDB_36BIT_defconfig b/configs/P1025RDB_36BIT_defconfig
index f51f497794e..23c57c787ca 100644
--- a/configs/P1025RDB_36BIT_defconfig
+++ b/configs/P1025RDB_36BIT_defconfig
@@ -15,6 +15,7 @@ CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
+CONFIG_CMD_DATE=y
CONFIG_CMD_EXT2=y
CONFIG_CMD_FAT=y
CONFIG_MTD_NOR_FLASH=y
diff --git a/configs/P1025RDB_NAND_defconfig b/configs/P1025RDB_NAND_defconfig
index 66efc628dd9..49436efc46c 100644
--- a/configs/P1025RDB_NAND_defconfig
+++ b/configs/P1025RDB_NAND_defconfig
@@ -26,6 +26,7 @@ CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
+CONFIG_CMD_DATE=y
CONFIG_CMD_EXT2=y
CONFIG_CMD_FAT=y
CONFIG_MTD_NOR_FLASH=y
diff --git a/configs/P1025RDB_SDCARD_defconfig b/configs/P1025RDB_SDCARD_defconfig
index f1b24c45e3f..3165ca1b617 100644
--- a/configs/P1025RDB_SDCARD_defconfig
+++ b/configs/P1025RDB_SDCARD_defconfig
@@ -23,6 +23,7 @@ CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
+CONFIG_CMD_DATE=y
CONFIG_CMD_EXT2=y
CONFIG_CMD_FAT=y
CONFIG_MTD_NOR_FLASH=y
diff --git a/configs/P1025RDB_SPIFLASH_defconfig b/configs/P1025RDB_SPIFLASH_defconfig
index 87dea079ae6..a8901c15bfa 100644
--- a/configs/P1025RDB_SPIFLASH_defconfig
+++ b/configs/P1025RDB_SPIFLASH_defconfig
@@ -24,6 +24,7 @@ CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
+CONFIG_CMD_DATE=y
CONFIG_CMD_EXT2=y
CONFIG_CMD_FAT=y
CONFIG_MTD_NOR_FLASH=y
diff --git a/configs/P1025RDB_defconfig b/configs/P1025RDB_defconfig
index dec5cf8bc0b..d8cb2cbb287 100644
--- a/configs/P1025RDB_defconfig
+++ b/configs/P1025RDB_defconfig
@@ -14,6 +14,7 @@ CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
+CONFIG_CMD_DATE=y
CONFIG_CMD_EXT2=y
CONFIG_CMD_FAT=y
CONFIG_MTD_NOR_FLASH=y
diff --git a/configs/P2020RDB-PC_36BIT_NAND_defconfig b/configs/P2020RDB-PC_36BIT_NAND_defconfig
index d9516208640..378e8094218 100644
--- a/configs/P2020RDB-PC_36BIT_NAND_defconfig
+++ b/configs/P2020RDB-PC_36BIT_NAND_defconfig
@@ -27,6 +27,7 @@ CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
+CONFIG_CMD_DATE=y
CONFIG_CMD_EXT2=y
CONFIG_CMD_FAT=y
CONFIG_MTD_NOR_FLASH=y
diff --git a/configs/P2020RDB-PC_36BIT_SDCARD_defconfig b/configs/P2020RDB-PC_36BIT_SDCARD_defconfig
index a03b44562f1..218a00afc85 100644
--- a/configs/P2020RDB-PC_36BIT_SDCARD_defconfig
+++ b/configs/P2020RDB-PC_36BIT_SDCARD_defconfig
@@ -24,6 +24,7 @@ CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
+CONFIG_CMD_DATE=y
CONFIG_CMD_EXT2=y
CONFIG_CMD_FAT=y
CONFIG_MTD_NOR_FLASH=y
diff --git a/configs/P2020RDB-PC_36BIT_SPIFLASH_defconfig b/configs/P2020RDB-PC_36BIT_SPIFLASH_defconfig
index 18219d3b29d..e7c491a4a9e 100644
--- a/configs/P2020RDB-PC_36BIT_SPIFLASH_defconfig
+++ b/configs/P2020RDB-PC_36BIT_SPIFLASH_defconfig
@@ -25,6 +25,7 @@ CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
+CONFIG_CMD_DATE=y
CONFIG_CMD_EXT2=y
CONFIG_CMD_FAT=y
CONFIG_MTD_NOR_FLASH=y
diff --git a/configs/P2020RDB-PC_36BIT_defconfig b/configs/P2020RDB-PC_36BIT_defconfig
index 15be73de7fe..4de5745d2e3 100644
--- a/configs/P2020RDB-PC_36BIT_defconfig
+++ b/configs/P2020RDB-PC_36BIT_defconfig
@@ -15,6 +15,7 @@ CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
+CONFIG_CMD_DATE=y
CONFIG_CMD_EXT2=y
CONFIG_CMD_FAT=y
CONFIG_MTD_NOR_FLASH=y
diff --git a/configs/P2020RDB-PC_NAND_defconfig b/configs/P2020RDB-PC_NAND_defconfig
index 5ad8c627b8e..7ca8282c86f 100644
--- a/configs/P2020RDB-PC_NAND_defconfig
+++ b/configs/P2020RDB-PC_NAND_defconfig
@@ -25,6 +25,7 @@ CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
+CONFIG_CMD_DATE=y
CONFIG_CMD_EXT2=y
CONFIG_CMD_FAT=y
CONFIG_MTD_NOR_FLASH=y
diff --git a/configs/P2020RDB-PC_SDCARD_defconfig b/configs/P2020RDB-PC_SDCARD_defconfig
index f046596aae5..0275b6c3030 100644
--- a/configs/P2020RDB-PC_SDCARD_defconfig
+++ b/configs/P2020RDB-PC_SDCARD_defconfig
@@ -23,6 +23,7 @@ CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
+CONFIG_CMD_DATE=y
CONFIG_CMD_EXT2=y
CONFIG_CMD_FAT=y
CONFIG_MTD_NOR_FLASH=y
diff --git a/configs/P2020RDB-PC_SPIFLASH_defconfig b/configs/P2020RDB-PC_SPIFLASH_defconfig
index cc169c710e7..400c8138879 100644
--- a/configs/P2020RDB-PC_SPIFLASH_defconfig
+++ b/configs/P2020RDB-PC_SPIFLASH_defconfig
@@ -24,6 +24,7 @@ CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
+CONFIG_CMD_DATE=y
CONFIG_CMD_EXT2=y
CONFIG_CMD_FAT=y
CONFIG_MTD_NOR_FLASH=y
diff --git a/configs/P2020RDB-PC_defconfig b/configs/P2020RDB-PC_defconfig
index 3093fa89589..e4038c6c739 100644
--- a/configs/P2020RDB-PC_defconfig
+++ b/configs/P2020RDB-PC_defconfig
@@ -14,6 +14,7 @@ CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
+CONFIG_CMD_DATE=y
CONFIG_CMD_EXT2=y
CONFIG_CMD_FAT=y
CONFIG_MTD_NOR_FLASH=y
diff --git a/configs/PIP405_defconfig b/configs/PIP405_defconfig
index 4fe31f1e304..4c2d558b85d 100644
--- a/configs/PIP405_defconfig
+++ b/configs/PIP405_defconfig
@@ -19,6 +19,7 @@ CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_CMD_BSP=y
CONFIG_CMD_CACHE=y
+CONFIG_CMD_DATE=y
CONFIG_CMD_FAT=y
CONFIG_MAC_PARTITION=y
CONFIG_ISO_PARTITION=y
diff --git a/configs/PLU405_defconfig b/configs/PLU405_defconfig
index 652edcdc70b..5b679760e66 100644
--- a/configs/PLU405_defconfig
+++ b/configs/PLU405_defconfig
@@ -15,6 +15,7 @@ CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
+CONFIG_CMD_DATE=y
CONFIG_CMD_FAT=y
CONFIG_CMD_UBI=y
CONFIG_MAC_PARTITION=y
diff --git a/configs/PMC405DE_defconfig b/configs/PMC405DE_defconfig
index 50fdbd4dab9..0dd9ca7ff6e 100644
--- a/configs/PMC405DE_defconfig
+++ b/configs/PMC405DE_defconfig
@@ -17,6 +17,7 @@ CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_CMD_BSP=y
+CONFIG_CMD_DATE=y
# CONFIG_MMC is not set
CONFIG_MTD_NOR_FLASH=y
CONFIG_SYS_NS16550=y
diff --git a/configs/PMC440_defconfig b/configs/PMC440_defconfig
index 0cc41314412..6b8854b5d84 100644
--- a/configs/PMC440_defconfig
+++ b/configs/PMC440_defconfig
@@ -18,6 +18,7 @@ CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_CMD_BSP=y
+CONFIG_CMD_DATE=y
CONFIG_CMD_FAT=y
CONFIG_MAC_PARTITION=y
CONFIG_ISO_PARTITION=y
diff --git a/configs/T1023RDB_NAND_defconfig b/configs/T1023RDB_NAND_defconfig
index 53f1914b513..dcd3b3fb67f 100644
--- a/configs/T1023RDB_NAND_defconfig
+++ b/configs/T1023RDB_NAND_defconfig
@@ -29,6 +29,7 @@ CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
+CONFIG_CMD_DATE=y
CONFIG_CMD_EXT2=y
CONFIG_CMD_FAT=y
CONFIG_FSL_CAAM=y
diff --git a/configs/T1023RDB_SDCARD_defconfig b/configs/T1023RDB_SDCARD_defconfig
index c5cc69ba984..581d044f989 100644
--- a/configs/T1023RDB_SDCARD_defconfig
+++ b/configs/T1023RDB_SDCARD_defconfig
@@ -29,6 +29,7 @@ CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
+CONFIG_CMD_DATE=y
CONFIG_CMD_EXT2=y
CONFIG_CMD_FAT=y
CONFIG_FSL_CAAM=y
diff --git a/configs/T1023RDB_SECURE_BOOT_defconfig b/configs/T1023RDB_SECURE_BOOT_defconfig
index 1400f90ea3a..f760f4dc34d 100644
--- a/configs/T1023RDB_SECURE_BOOT_defconfig
+++ b/configs/T1023RDB_SECURE_BOOT_defconfig
@@ -19,6 +19,7 @@ CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
+CONFIG_CMD_DATE=y
CONFIG_CMD_EXT2=y
CONFIG_CMD_FAT=y
CONFIG_DM=y
diff --git a/configs/T1023RDB_SPIFLASH_defconfig b/configs/T1023RDB_SPIFLASH_defconfig
index 9d1cdd30072..c63b98c8ef0 100644
--- a/configs/T1023RDB_SPIFLASH_defconfig
+++ b/configs/T1023RDB_SPIFLASH_defconfig
@@ -30,6 +30,7 @@ CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
+CONFIG_CMD_DATE=y
CONFIG_CMD_EXT2=y
CONFIG_CMD_FAT=y
CONFIG_FSL_CAAM=y
diff --git a/configs/T1023RDB_defconfig b/configs/T1023RDB_defconfig
index fba80b5399e..43853e7f85a 100644
--- a/configs/T1023RDB_defconfig
+++ b/configs/T1023RDB_defconfig
@@ -17,6 +17,7 @@ CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
+CONFIG_CMD_DATE=y
CONFIG_CMD_EXT2=y
CONFIG_CMD_FAT=y
CONFIG_FSL_CAAM=y
diff --git a/configs/T1024QDS_DDR4_SECURE_BOOT_defconfig b/configs/T1024QDS_DDR4_SECURE_BOOT_defconfig
index 512abc03513..19f1000657f 100644
--- a/configs/T1024QDS_DDR4_SECURE_BOOT_defconfig
+++ b/configs/T1024QDS_DDR4_SECURE_BOOT_defconfig
@@ -23,6 +23,7 @@ CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_CMD_BMP=y
+CONFIG_CMD_DATE=y
CONFIG_CMD_EXT2=y
CONFIG_CMD_FAT=y
CONFIG_DM=y
diff --git a/configs/T1024QDS_DDR4_defconfig b/configs/T1024QDS_DDR4_defconfig
index 8fa0d8f3e25..7a57b080851 100644
--- a/configs/T1024QDS_DDR4_defconfig
+++ b/configs/T1024QDS_DDR4_defconfig
@@ -21,6 +21,7 @@ CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_CMD_BMP=y
+CONFIG_CMD_DATE=y
CONFIG_CMD_EXT2=y
CONFIG_CMD_FAT=y
CONFIG_FSL_CAAM=y
diff --git a/configs/T1024QDS_NAND_defconfig b/configs/T1024QDS_NAND_defconfig
index 17403e3f9a7..ac429f6a856 100644
--- a/configs/T1024QDS_NAND_defconfig
+++ b/configs/T1024QDS_NAND_defconfig
@@ -31,6 +31,7 @@ CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_CMD_BMP=y
+CONFIG_CMD_DATE=y
CONFIG_CMD_EXT2=y
CONFIG_CMD_FAT=y
CONFIG_FSL_CAAM=y
diff --git a/configs/T1024QDS_SDCARD_defconfig b/configs/T1024QDS_SDCARD_defconfig
index cd6414c6fcd..0b75721da2d 100644
--- a/configs/T1024QDS_SDCARD_defconfig
+++ b/configs/T1024QDS_SDCARD_defconfig
@@ -31,6 +31,7 @@ CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_CMD_BMP=y
+CONFIG_CMD_DATE=y
CONFIG_CMD_EXT2=y
CONFIG_CMD_FAT=y
CONFIG_FSL_CAAM=y
diff --git a/configs/T1024QDS_SECURE_BOOT_defconfig b/configs/T1024QDS_SECURE_BOOT_defconfig
index 3045412f3b4..f1d04889ffb 100644
--- a/configs/T1024QDS_SECURE_BOOT_defconfig
+++ b/configs/T1024QDS_SECURE_BOOT_defconfig
@@ -23,6 +23,7 @@ CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_CMD_BMP=y
+CONFIG_CMD_DATE=y
CONFIG_CMD_EXT2=y
CONFIG_CMD_FAT=y
CONFIG_DM=y
diff --git a/configs/T1024QDS_SPIFLASH_defconfig b/configs/T1024QDS_SPIFLASH_defconfig
index aab3d3ab539..f55a2bb4240 100644
--- a/configs/T1024QDS_SPIFLASH_defconfig
+++ b/configs/T1024QDS_SPIFLASH_defconfig
@@ -32,6 +32,7 @@ CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_CMD_BMP=y
+CONFIG_CMD_DATE=y
CONFIG_CMD_EXT2=y
CONFIG_CMD_FAT=y
CONFIG_FSL_CAAM=y
diff --git a/configs/T1024QDS_defconfig b/configs/T1024QDS_defconfig
index 4196524ff52..b09e9a026d2 100644
--- a/configs/T1024QDS_defconfig
+++ b/configs/T1024QDS_defconfig
@@ -21,6 +21,7 @@ CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_CMD_BMP=y
+CONFIG_CMD_DATE=y
CONFIG_CMD_EXT2=y
CONFIG_CMD_FAT=y
CONFIG_FSL_CAAM=y
diff --git a/configs/T1024RDB_NAND_defconfig b/configs/T1024RDB_NAND_defconfig
index c342e404d29..eeca0a67182 100644
--- a/configs/T1024RDB_NAND_defconfig
+++ b/configs/T1024RDB_NAND_defconfig
@@ -29,6 +29,7 @@ CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
+CONFIG_CMD_DATE=y
CONFIG_CMD_EXT2=y
CONFIG_CMD_FAT=y
CONFIG_FSL_CAAM=y
diff --git a/configs/T1024RDB_SDCARD_defconfig b/configs/T1024RDB_SDCARD_defconfig
index c105197838d..d742a326513 100644
--- a/configs/T1024RDB_SDCARD_defconfig
+++ b/configs/T1024RDB_SDCARD_defconfig
@@ -29,6 +29,7 @@ CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
+CONFIG_CMD_DATE=y
CONFIG_CMD_EXT2=y
CONFIG_CMD_FAT=y
CONFIG_FSL_CAAM=y
diff --git a/configs/T1024RDB_SECURE_BOOT_defconfig b/configs/T1024RDB_SECURE_BOOT_defconfig
index 6d980a22b5c..968d8a89412 100644
--- a/configs/T1024RDB_SECURE_BOOT_defconfig
+++ b/configs/T1024RDB_SECURE_BOOT_defconfig
@@ -21,6 +21,7 @@ CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
+CONFIG_CMD_DATE=y
CONFIG_CMD_EXT2=y
CONFIG_CMD_FAT=y
CONFIG_DM=y
diff --git a/configs/T1024RDB_SPIFLASH_defconfig b/configs/T1024RDB_SPIFLASH_defconfig
index 9ece7f9bcf9..25e81fdc199 100644
--- a/configs/T1024RDB_SPIFLASH_defconfig
+++ b/configs/T1024RDB_SPIFLASH_defconfig
@@ -30,6 +30,7 @@ CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
+CONFIG_CMD_DATE=y
CONFIG_CMD_EXT2=y
CONFIG_CMD_FAT=y
CONFIG_FSL_CAAM=y
diff --git a/configs/T1024RDB_defconfig b/configs/T1024RDB_defconfig
index e7b306c10ab..da924d8f54a 100644
--- a/configs/T1024RDB_defconfig
+++ b/configs/T1024RDB_defconfig
@@ -19,6 +19,7 @@ CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
+CONFIG_CMD_DATE=y
CONFIG_CMD_EXT2=y
CONFIG_CMD_FAT=y
CONFIG_FSL_CAAM=y
diff --git a/configs/T1040QDS_DDR4_defconfig b/configs/T1040QDS_DDR4_defconfig
index 9aeff626a69..6ebde4d2df1 100644
--- a/configs/T1040QDS_DDR4_defconfig
+++ b/configs/T1040QDS_DDR4_defconfig
@@ -21,6 +21,7 @@ CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_CMD_BMP=y
+CONFIG_CMD_DATE=y
CONFIG_CMD_EXT2=y
CONFIG_CMD_FAT=y
CONFIG_FSL_CAAM=y
diff --git a/configs/T1040QDS_SECURE_BOOT_defconfig b/configs/T1040QDS_SECURE_BOOT_defconfig
index 7de09933374..e437cdac351 100644
--- a/configs/T1040QDS_SECURE_BOOT_defconfig
+++ b/configs/T1040QDS_SECURE_BOOT_defconfig
@@ -23,6 +23,7 @@ CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_CMD_BMP=y
+CONFIG_CMD_DATE=y
CONFIG_CMD_EXT2=y
CONFIG_CMD_FAT=y
CONFIG_DM=y
diff --git a/configs/T1040QDS_defconfig b/configs/T1040QDS_defconfig
index 6c806c3dd95..7b96193c85a 100644
--- a/configs/T1040QDS_defconfig
+++ b/configs/T1040QDS_defconfig
@@ -21,6 +21,7 @@ CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_CMD_BMP=y
+CONFIG_CMD_DATE=y
CONFIG_CMD_EXT2=y
CONFIG_CMD_FAT=y
CONFIG_FSL_CAAM=y
diff --git a/configs/T1042RDB_PI_NAND_SECURE_BOOT_defconfig b/configs/T1042RDB_PI_NAND_SECURE_BOOT_defconfig
index 4ead58f2122..513bfd39ca5 100644
--- a/configs/T1042RDB_PI_NAND_SECURE_BOOT_defconfig
+++ b/configs/T1042RDB_PI_NAND_SECURE_BOOT_defconfig
@@ -34,6 +34,7 @@ CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_CMD_BMP=y
+CONFIG_CMD_DATE=y
CONFIG_CMD_EXT2=y
CONFIG_CMD_FAT=y
CONFIG_DM=y
diff --git a/configs/T1042RDB_PI_NAND_defconfig b/configs/T1042RDB_PI_NAND_defconfig
index a63374cc4bb..f2e72c229ef 100644
--- a/configs/T1042RDB_PI_NAND_defconfig
+++ b/configs/T1042RDB_PI_NAND_defconfig
@@ -31,6 +31,7 @@ CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_CMD_BMP=y
+CONFIG_CMD_DATE=y
CONFIG_CMD_EXT2=y
CONFIG_CMD_FAT=y
CONFIG_FSL_CAAM=y
diff --git a/configs/T1042RDB_PI_SDCARD_defconfig b/configs/T1042RDB_PI_SDCARD_defconfig
index 606ec618d9b..3e28c563348 100644
--- a/configs/T1042RDB_PI_SDCARD_defconfig
+++ b/configs/T1042RDB_PI_SDCARD_defconfig
@@ -31,6 +31,7 @@ CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_CMD_BMP=y
+CONFIG_CMD_DATE=y
CONFIG_CMD_EXT2=y
CONFIG_CMD_FAT=y
CONFIG_FSL_CAAM=y
diff --git a/configs/T1042RDB_PI_SPIFLASH_defconfig b/configs/T1042RDB_PI_SPIFLASH_defconfig
index 8858aecb456..807519162a3 100644
--- a/configs/T1042RDB_PI_SPIFLASH_defconfig
+++ b/configs/T1042RDB_PI_SPIFLASH_defconfig
@@ -32,6 +32,7 @@ CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_CMD_BMP=y
+CONFIG_CMD_DATE=y
CONFIG_CMD_EXT2=y
CONFIG_CMD_FAT=y
CONFIG_FSL_CAAM=y
diff --git a/configs/T1042RDB_PI_defconfig b/configs/T1042RDB_PI_defconfig
index 77f0c667e37..bad51b55343 100644
--- a/configs/T1042RDB_PI_defconfig
+++ b/configs/T1042RDB_PI_defconfig
@@ -21,6 +21,7 @@ CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_CMD_BMP=y
+CONFIG_CMD_DATE=y
CONFIG_CMD_EXT2=y
CONFIG_CMD_FAT=y
CONFIG_FSL_CAAM=y
diff --git a/configs/TQM5200S_HIGHBOOT_defconfig b/configs/TQM5200S_HIGHBOOT_defconfig
index b2f5e5ebfb2..d0cd50a63cd 100644
--- a/configs/TQM5200S_HIGHBOOT_defconfig
+++ b/configs/TQM5200S_HIGHBOOT_defconfig
@@ -15,6 +15,7 @@ CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_CMD_SNTP=y
CONFIG_CMD_BSP=y
+CONFIG_CMD_DATE=y
CONFIG_CMD_EXT2=y
CONFIG_CMD_FAT=y
CONFIG_CMD_DIAG=y
diff --git a/configs/TQM5200S_defconfig b/configs/TQM5200S_defconfig
index fc876b957ee..5324a9a11c0 100644
--- a/configs/TQM5200S_defconfig
+++ b/configs/TQM5200S_defconfig
@@ -15,6 +15,7 @@ CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_CMD_SNTP=y
CONFIG_CMD_BSP=y
+CONFIG_CMD_DATE=y
CONFIG_CMD_EXT2=y
CONFIG_CMD_FAT=y
CONFIG_CMD_DIAG=y
diff --git a/configs/TQM5200_B_HIGHBOOT_defconfig b/configs/TQM5200_B_HIGHBOOT_defconfig
index 5b5544aeeaa..2f933e6cab3 100644
--- a/configs/TQM5200_B_HIGHBOOT_defconfig
+++ b/configs/TQM5200_B_HIGHBOOT_defconfig
@@ -19,6 +19,7 @@ CONFIG_CMD_PING=y
CONFIG_CMD_SNTP=y
CONFIG_CMD_BMP=y
CONFIG_CMD_BSP=y
+CONFIG_CMD_DATE=y
CONFIG_CMD_EXT2=y
CONFIG_CMD_FAT=y
CONFIG_CMD_DIAG=y
diff --git a/configs/TQM5200_B_defconfig b/configs/TQM5200_B_defconfig
index 11359746a69..f204484f598 100644
--- a/configs/TQM5200_B_defconfig
+++ b/configs/TQM5200_B_defconfig
@@ -19,6 +19,7 @@ CONFIG_CMD_PING=y
CONFIG_CMD_SNTP=y
CONFIG_CMD_BMP=y
CONFIG_CMD_BSP=y
+CONFIG_CMD_DATE=y
CONFIG_CMD_EXT2=y
CONFIG_CMD_FAT=y
CONFIG_CMD_DIAG=y
diff --git a/configs/TQM5200_STK100_defconfig b/configs/TQM5200_STK100_defconfig
index c1f4753af3f..db9bb8a30dd 100644
--- a/configs/TQM5200_STK100_defconfig
+++ b/configs/TQM5200_STK100_defconfig
@@ -19,6 +19,7 @@ CONFIG_CMD_PING=y
CONFIG_CMD_SNTP=y
CONFIG_CMD_BMP=y
CONFIG_CMD_BSP=y
+CONFIG_CMD_DATE=y
CONFIG_CMD_EXT2=y
CONFIG_CMD_FAT=y
CONFIG_CMD_DIAG=y
diff --git a/configs/TQM5200_defconfig b/configs/TQM5200_defconfig
index a1d1ce2b2ee..eec60f1be4e 100644
--- a/configs/TQM5200_defconfig
+++ b/configs/TQM5200_defconfig
@@ -18,6 +18,7 @@ CONFIG_CMD_PING=y
CONFIG_CMD_SNTP=y
CONFIG_CMD_BMP=y
CONFIG_CMD_BSP=y
+CONFIG_CMD_DATE=y
CONFIG_CMD_EXT2=y
CONFIG_CMD_FAT=y
CONFIG_CMD_DIAG=y
diff --git a/configs/TQM823L_LCD_defconfig b/configs/TQM823L_LCD_defconfig
index e466836b53a..89f2ecb1047 100644
--- a/configs/TQM823L_LCD_defconfig
+++ b/configs/TQM823L_LCD_defconfig
@@ -11,6 +11,7 @@ CONFIG_CMD_ASKENV=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_SNTP=y
CONFIG_CMD_BMP=y
+CONFIG_CMD_DATE=y
CONFIG_CMD_EXT2=y
CONFIG_MAC_PARTITION=y
CONFIG_DOS_PARTITION=y
diff --git a/configs/TQM823L_defconfig b/configs/TQM823L_defconfig
index c8e6f75dfb5..e2681ad7156 100644
--- a/configs/TQM823L_defconfig
+++ b/configs/TQM823L_defconfig
@@ -8,6 +8,7 @@ CONFIG_CMD_ASKENV=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_SNTP=y
+CONFIG_CMD_DATE=y
CONFIG_CMD_EXT2=y
CONFIG_MAC_PARTITION=y
CONFIG_DOS_PARTITION=y
diff --git a/configs/TQM823M_defconfig b/configs/TQM823M_defconfig
index 4e41733087e..829942ef621 100644
--- a/configs/TQM823M_defconfig
+++ b/configs/TQM823M_defconfig
@@ -8,6 +8,7 @@ CONFIG_CMD_ASKENV=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_SNTP=y
+CONFIG_CMD_DATE=y
CONFIG_CMD_EXT2=y
CONFIG_MAC_PARTITION=y
CONFIG_DOS_PARTITION=y
diff --git a/configs/TQM834x_defconfig b/configs/TQM834x_defconfig
index b4eeec60a6c..b03f79ef39a 100644
--- a/configs/TQM834x_defconfig
+++ b/configs/TQM834x_defconfig
@@ -12,6 +12,7 @@ CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_CMD_SNTP=y
+CONFIG_CMD_DATE=y
# CONFIG_MMC is not set
CONFIG_MTD_NOR_FLASH=y
CONFIG_SYS_NS16550=y
diff --git a/configs/TQM850L_defconfig b/configs/TQM850L_defconfig
index 95a33195897..2c248446830 100644
--- a/configs/TQM850L_defconfig
+++ b/configs/TQM850L_defconfig
@@ -8,6 +8,7 @@ CONFIG_CMD_ASKENV=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_SNTP=y
+CONFIG_CMD_DATE=y
CONFIG_CMD_EXT2=y
CONFIG_MAC_PARTITION=y
CONFIG_DOS_PARTITION=y
diff --git a/configs/TQM850M_defconfig b/configs/TQM850M_defconfig
index 56d9161eff8..a6882aab4d3 100644
--- a/configs/TQM850M_defconfig
+++ b/configs/TQM850M_defconfig
@@ -8,6 +8,7 @@ CONFIG_CMD_ASKENV=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_SNTP=y
+CONFIG_CMD_DATE=y
CONFIG_CMD_EXT2=y
CONFIG_MAC_PARTITION=y
CONFIG_DOS_PARTITION=y
diff --git a/configs/TQM855L_defconfig b/configs/TQM855L_defconfig
index 66646a378e2..8be81ae2a4b 100644
--- a/configs/TQM855L_defconfig
+++ b/configs/TQM855L_defconfig
@@ -8,6 +8,7 @@ CONFIG_CMD_ASKENV=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_SNTP=y
+CONFIG_CMD_DATE=y
CONFIG_CMD_EXT2=y
CONFIG_MAC_PARTITION=y
CONFIG_DOS_PARTITION=y
diff --git a/configs/TQM855M_defconfig b/configs/TQM855M_defconfig
index 29e27e967a8..ea0ad4df9fa 100644
--- a/configs/TQM855M_defconfig
+++ b/configs/TQM855M_defconfig
@@ -8,6 +8,7 @@ CONFIG_CMD_ASKENV=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_SNTP=y
+CONFIG_CMD_DATE=y
CONFIG_CMD_EXT2=y
CONFIG_MAC_PARTITION=y
CONFIG_DOS_PARTITION=y
diff --git a/configs/TQM860L_defconfig b/configs/TQM860L_defconfig
index 483b245aa2a..e65b01fc36a 100644
--- a/configs/TQM860L_defconfig
+++ b/configs/TQM860L_defconfig
@@ -8,6 +8,7 @@ CONFIG_CMD_ASKENV=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_SNTP=y
+CONFIG_CMD_DATE=y
CONFIG_CMD_EXT2=y
CONFIG_MAC_PARTITION=y
CONFIG_DOS_PARTITION=y
diff --git a/configs/TQM860M_defconfig b/configs/TQM860M_defconfig
index 3c013caf9ae..5c69085fdbe 100644
--- a/configs/TQM860M_defconfig
+++ b/configs/TQM860M_defconfig
@@ -8,6 +8,7 @@ CONFIG_CMD_ASKENV=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_SNTP=y
+CONFIG_CMD_DATE=y
CONFIG_CMD_EXT2=y
CONFIG_MAC_PARTITION=y
CONFIG_DOS_PARTITION=y
diff --git a/configs/TQM862L_defconfig b/configs/TQM862L_defconfig
index 4006c26d2d6..f3d077c4bd8 100644
--- a/configs/TQM862L_defconfig
+++ b/configs/TQM862L_defconfig
@@ -8,6 +8,7 @@ CONFIG_CMD_ASKENV=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_SNTP=y
+CONFIG_CMD_DATE=y
CONFIG_CMD_EXT2=y
CONFIG_MAC_PARTITION=y
CONFIG_DOS_PARTITION=y
diff --git a/configs/TQM862M_defconfig b/configs/TQM862M_defconfig
index 8e0795d37da..3069dcbadd5 100644
--- a/configs/TQM862M_defconfig
+++ b/configs/TQM862M_defconfig
@@ -8,6 +8,7 @@ CONFIG_CMD_ASKENV=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_SNTP=y
+CONFIG_CMD_DATE=y
CONFIG_CMD_EXT2=y
CONFIG_MAC_PARTITION=y
CONFIG_DOS_PARTITION=y
diff --git a/configs/TQM885D_defconfig b/configs/TQM885D_defconfig
index a3a55678934..4ecdf6db835 100644
--- a/configs/TQM885D_defconfig
+++ b/configs/TQM885D_defconfig
@@ -11,6 +11,7 @@ CONFIG_CMD_I2C=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
+CONFIG_CMD_DATE=y
CONFIG_CMD_EXT2=y
CONFIG_MAC_PARTITION=y
CONFIG_DOS_PARTITION=y
diff --git a/configs/TTTech_defconfig b/configs/TTTech_defconfig
index b6080ad131e..e0493a12fbc 100644
--- a/configs/TTTech_defconfig
+++ b/configs/TTTech_defconfig
@@ -11,6 +11,7 @@ CONFIG_CMD_ASKENV=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_SNTP=y
CONFIG_CMD_BMP=y
+CONFIG_CMD_DATE=y
CONFIG_CMD_EXT2=y
CONFIG_MAC_PARTITION=y
CONFIG_DOS_PARTITION=y
diff --git a/configs/UCP1020_SPIFLASH_defconfig b/configs/UCP1020_SPIFLASH_defconfig
index 2b3e4bd042c..da538afb529 100644
--- a/configs/UCP1020_SPIFLASH_defconfig
+++ b/configs/UCP1020_SPIFLASH_defconfig
@@ -20,6 +20,7 @@ CONFIG_CMD_GPIO=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
+CONFIG_CMD_DATE=y
CONFIG_CMD_CRAMFS=y
CONFIG_CMD_EXT2=y
CONFIG_CMD_FAT=y
diff --git a/configs/UCP1020_defconfig b/configs/UCP1020_defconfig
index df0f8cc5f7b..c7ec446867b 100644
--- a/configs/UCP1020_defconfig
+++ b/configs/UCP1020_defconfig
@@ -20,6 +20,7 @@ CONFIG_CMD_GPIO=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
+CONFIG_CMD_DATE=y
CONFIG_CMD_CRAMFS=y
CONFIG_CMD_EXT2=y
CONFIG_CMD_FAT=y
diff --git a/configs/adp-ag101p_defconfig b/configs/adp-ag101p_defconfig
index d55f6589513..48d08cc44b5 100644
--- a/configs/adp-ag101p_defconfig
+++ b/configs/adp-ag101p_defconfig
@@ -6,6 +6,7 @@ CONFIG_CMD_MMC=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_PING=y
CONFIG_CMD_CACHE=y
+CONFIG_CMD_DATE=y
CONFIG_CMD_EXT2=y
CONFIG_CMD_FAT=y
CONFIG_MMC=y
diff --git a/configs/apf27_defconfig b/configs/apf27_defconfig
index e22dc0743bd..71839f575e6 100644
--- a/configs/apf27_defconfig
+++ b/configs/apf27_defconfig
@@ -20,6 +20,7 @@ CONFIG_CMD_PING=y
CONFIG_CMD_DNS=y
CONFIG_CMD_BSP=y
CONFIG_CMD_CACHE=y
+CONFIG_CMD_DATE=y
CONFIG_CMD_EXT2=y
CONFIG_CMD_FAT=y
CONFIG_CMD_UBI=y
diff --git a/configs/apx4devkit_defconfig b/configs/apx4devkit_defconfig
index 0e789948d6c..e2061a2cce9 100644
--- a/configs/apx4devkit_defconfig
+++ b/configs/apx4devkit_defconfig
@@ -21,6 +21,7 @@ CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_CMD_CACHE=y
+CONFIG_CMD_DATE=y
CONFIG_CMD_EXT2=y
CONFIG_CMD_FAT=y
CONFIG_CMD_UBI=y
diff --git a/configs/aristainetos2_defconfig b/configs/aristainetos2_defconfig
index 884dcc84c2e..4bd3087cb9a 100644
--- a/configs/aristainetos2_defconfig
+++ b/configs/aristainetos2_defconfig
@@ -23,6 +23,7 @@ CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_CMD_BMP=y
CONFIG_CMD_CACHE=y
+CONFIG_CMD_DATE=y
CONFIG_CMD_EXT2=y
CONFIG_CMD_EXT4=y
CONFIG_CMD_EXT4_WRITE=y
diff --git a/configs/aristainetos2b_defconfig b/configs/aristainetos2b_defconfig
index eaa9addd249..dfdc9723278 100644
--- a/configs/aristainetos2b_defconfig
+++ b/configs/aristainetos2b_defconfig
@@ -23,6 +23,7 @@ CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_CMD_BMP=y
CONFIG_CMD_CACHE=y
+CONFIG_CMD_DATE=y
CONFIG_CMD_EXT2=y
CONFIG_CMD_EXT4=y
CONFIG_CMD_EXT4_WRITE=y
diff --git a/configs/aristainetos_defconfig b/configs/aristainetos_defconfig
index 1c39e362fa1..0a8b38d9c6a 100644
--- a/configs/aristainetos_defconfig
+++ b/configs/aristainetos_defconfig
@@ -23,6 +23,7 @@ CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_CMD_BMP=y
CONFIG_CMD_CACHE=y
+CONFIG_CMD_DATE=y
CONFIG_CMD_EXT2=y
CONFIG_CMD_EXT4=y
CONFIG_CMD_EXT4_WRITE=y
diff --git a/configs/astro_mcf5373l_defconfig b/configs/astro_mcf5373l_defconfig
index c22020eba19..d5e84308d64 100644
--- a/configs/astro_mcf5373l_defconfig
+++ b/configs/astro_mcf5373l_defconfig
@@ -9,4 +9,5 @@ CONFIG_CMD_I2C=y
# CONFIG_CMD_NET is not set
# CONFIG_CMD_NFS is not set
CONFIG_CMD_CACHE=y
+CONFIG_CMD_DATE=y
CONFIG_MTD_NOR_FLASH=y
diff --git a/configs/bamboo_defconfig b/configs/bamboo_defconfig
index 2322337ee3e..44d91984bb8 100644
--- a/configs/bamboo_defconfig
+++ b/configs/bamboo_defconfig
@@ -17,6 +17,7 @@ CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_CMD_SNTP=y
CONFIG_CMD_CACHE=y
+CONFIG_CMD_DATE=y
CONFIG_CMD_EXT2=y
CONFIG_CMD_FAT=y
CONFIG_CMD_DIAG=y
diff --git a/configs/bk4r1_defconfig b/configs/bk4r1_defconfig
index 173b2221519..c15070e804e 100644
--- a/configs/bk4r1_defconfig
+++ b/configs/bk4r1_defconfig
@@ -17,6 +17,7 @@ CONFIG_CMD_GPIO=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
+CONFIG_CMD_DATE=y
CONFIG_CMD_FAT=y
CONFIG_CMD_UBI=y
CONFIG_OF_CONTROL=y
diff --git a/configs/bubinga_defconfig b/configs/bubinga_defconfig
index 9a5cbd34f63..e2e7ce0e623 100644
--- a/configs/bubinga_defconfig
+++ b/configs/bubinga_defconfig
@@ -15,6 +15,7 @@ CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_CMD_SNTP=y
+CONFIG_CMD_DATE=y
CONFIG_CMD_DIAG=y
# CONFIG_MMC is not set
CONFIG_MTD_NOR_FLASH=y
diff --git a/configs/caddy2_defconfig b/configs/caddy2_defconfig
index 85c21e572be..007cce10753 100644
--- a/configs/caddy2_defconfig
+++ b/configs/caddy2_defconfig
@@ -10,6 +10,7 @@ CONFIG_CMD_I2C=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
+CONFIG_CMD_DATE=y
# CONFIG_MMC is not set
CONFIG_MTD_NOR_FLASH=y
CONFIG_NETDEVICES=y
diff --git a/configs/cam5200_defconfig b/configs/cam5200_defconfig
index 2c8449dfd67..92985ab3d61 100644
--- a/configs/cam5200_defconfig
+++ b/configs/cam5200_defconfig
@@ -14,6 +14,7 @@ CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_CMD_SNTP=y
CONFIG_CMD_BSP=y
+CONFIG_CMD_DATE=y
CONFIG_MAC_PARTITION=y
CONFIG_DOS_PARTITION=y
CONFIG_ISO_PARTITION=y
diff --git a/configs/cam5200_niosflash_defconfig b/configs/cam5200_niosflash_defconfig
index 730d7506044..32bc58ee9bb 100644
--- a/configs/cam5200_niosflash_defconfig
+++ b/configs/cam5200_niosflash_defconfig
@@ -14,6 +14,7 @@ CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_CMD_SNTP=y
CONFIG_CMD_BSP=y
+CONFIG_CMD_DATE=y
CONFIG_MAC_PARTITION=y
CONFIG_DOS_PARTITION=y
CONFIG_ISO_PARTITION=y
diff --git a/configs/canmb_defconfig b/configs/canmb_defconfig
index 02b876dfe3b..1f6f18d601e 100644
--- a/configs/canmb_defconfig
+++ b/configs/canmb_defconfig
@@ -7,6 +7,7 @@ CONFIG_CMD_ASKENV=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_SNTP=y
+CONFIG_CMD_DATE=y
# CONFIG_MMC is not set
CONFIG_MTD_NOR_FLASH=y
# CONFIG_PCI is not set
diff --git a/configs/canyonlands_defconfig b/configs/canyonlands_defconfig
index cbb0f2a69fd..bcdb3b84a3c 100644
--- a/configs/canyonlands_defconfig
+++ b/configs/canyonlands_defconfig
@@ -20,6 +20,7 @@ CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_CMD_SNTP=y
CONFIG_CMD_CACHE=y
+CONFIG_CMD_DATE=y
CONFIG_CMD_EXT2=y
CONFIG_CMD_FAT=y
CONFIG_MAC_PARTITION=y
diff --git a/configs/cm5200_defconfig b/configs/cm5200_defconfig
index b3db9a6fbbb..7d8d01aaaaa 100644
--- a/configs/cm5200_defconfig
+++ b/configs/cm5200_defconfig
@@ -14,6 +14,7 @@ CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_CMD_SNTP=y
CONFIG_CMD_BSP=y
+CONFIG_CMD_DATE=y
CONFIG_CMD_FAT=y
CONFIG_CMD_DIAG=y
CONFIG_MAC_PARTITION=y
diff --git a/configs/devconcenter_defconfig b/configs/devconcenter_defconfig
index f6b6c950285..1c16ed2a4bd 100644
--- a/configs/devconcenter_defconfig
+++ b/configs/devconcenter_defconfig
@@ -22,6 +22,7 @@ CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_CMD_SNTP=y
CONFIG_CMD_CACHE=y
+CONFIG_CMD_DATE=y
CONFIG_CMD_EXT2=y
CONFIG_CMD_FAT=y
CONFIG_MAC_PARTITION=y
diff --git a/configs/digsy_mtc_RAMBOOT_defconfig b/configs/digsy_mtc_RAMBOOT_defconfig
index eb0e9471e00..0d11eec75ac 100644
--- a/configs/digsy_mtc_RAMBOOT_defconfig
+++ b/configs/digsy_mtc_RAMBOOT_defconfig
@@ -21,6 +21,7 @@ CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_CMD_BMP=y
CONFIG_CMD_CACHE=y
+CONFIG_CMD_DATE=y
CONFIG_CMD_EXT2=y
CONFIG_CMD_FAT=y
CONFIG_CMD_DIAG=y
diff --git a/configs/digsy_mtc_defconfig b/configs/digsy_mtc_defconfig
index 07587d3afc6..dc17ab4406e 100644
--- a/configs/digsy_mtc_defconfig
+++ b/configs/digsy_mtc_defconfig
@@ -19,6 +19,7 @@ CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_CMD_BMP=y
CONFIG_CMD_CACHE=y
+CONFIG_CMD_DATE=y
CONFIG_CMD_EXT2=y
CONFIG_CMD_FAT=y
CONFIG_CMD_DIAG=y
diff --git a/configs/digsy_mtc_rev5_RAMBOOT_defconfig b/configs/digsy_mtc_rev5_RAMBOOT_defconfig
index 5d0d00a0197..4ab11c755b1 100644
--- a/configs/digsy_mtc_rev5_RAMBOOT_defconfig
+++ b/configs/digsy_mtc_rev5_RAMBOOT_defconfig
@@ -21,6 +21,7 @@ CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_CMD_BMP=y
CONFIG_CMD_CACHE=y
+CONFIG_CMD_DATE=y
CONFIG_CMD_EXT2=y
CONFIG_CMD_FAT=y
CONFIG_CMD_DIAG=y
diff --git a/configs/digsy_mtc_rev5_defconfig b/configs/digsy_mtc_rev5_defconfig
index 11373277b48..1f3f3c8bb60 100644
--- a/configs/digsy_mtc_rev5_defconfig
+++ b/configs/digsy_mtc_rev5_defconfig
@@ -21,6 +21,7 @@ CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_CMD_BMP=y
CONFIG_CMD_CACHE=y
+CONFIG_CMD_DATE=y
CONFIG_CMD_EXT2=y
CONFIG_CMD_FAT=y
CONFIG_CMD_DIAG=y
diff --git a/configs/dns325_defconfig b/configs/dns325_defconfig
index 063c71ccf19..a363292350d 100644
--- a/configs/dns325_defconfig
+++ b/configs/dns325_defconfig
@@ -13,6 +13,7 @@ CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
+CONFIG_CMD_DATE=y
CONFIG_CMD_EXT2=y
CONFIG_CMD_FAT=y
CONFIG_CMD_UBI=y
diff --git a/configs/dreamplug_defconfig b/configs/dreamplug_defconfig
index 823cc55a9a2..c8b8ce3dd0e 100644
--- a/configs/dreamplug_defconfig
+++ b/configs/dreamplug_defconfig
@@ -13,6 +13,7 @@ CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
+CONFIG_CMD_DATE=y
CONFIG_CMD_EXT2=y
CONFIG_CMD_EXT4=y
CONFIG_CMD_FAT=y
diff --git a/configs/ds109_defconfig b/configs/ds109_defconfig
index 336b582c64b..16f05856576 100644
--- a/configs/ds109_defconfig
+++ b/configs/ds109_defconfig
@@ -10,6 +10,7 @@ CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_PING=y
+CONFIG_CMD_DATE=y
CONFIG_DOS_PARTITION=y
CONFIG_ISO_PARTITION=y
# CONFIG_MMC is not set
diff --git a/configs/eb_cpu5282_defconfig b/configs/eb_cpu5282_defconfig
index c3668917131..b04d4ab9854 100644
--- a/configs/eb_cpu5282_defconfig
+++ b/configs/eb_cpu5282_defconfig
@@ -12,6 +12,7 @@ CONFIG_CMD_I2C=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
+CONFIG_CMD_DATE=y
CONFIG_LED_STATUS=y
CONFIG_LED_STATUS0=y
CONFIG_LED_STATUS_BIT=8
diff --git a/configs/eb_cpu5282_internal_defconfig b/configs/eb_cpu5282_internal_defconfig
index 52f2166bcf7..b498f2daf05 100644
--- a/configs/eb_cpu5282_internal_defconfig
+++ b/configs/eb_cpu5282_internal_defconfig
@@ -11,6 +11,7 @@ CONFIG_CMD_I2C=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
+CONFIG_CMD_DATE=y
CONFIG_LED_STATUS=y
CONFIG_LED_STATUS0=y
CONFIG_LED_STATUS_BIT=8
diff --git a/configs/efi-x86_defconfig b/configs/efi-x86_defconfig
index 7e1fa308e87..fb5203ec171 100644
--- a/configs/efi-x86_defconfig
+++ b/configs/efi-x86_defconfig
@@ -18,6 +18,7 @@ CONFIG_CMD_GPIO=y
# CONFIG_CMD_NET is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_PING=y
+CONFIG_CMD_DATE=y
CONFIG_CMD_TIME=y
CONFIG_CMD_EXT2=y
CONFIG_CMD_EXT4=y
diff --git a/configs/ethernut5_defconfig b/configs/ethernut5_defconfig
index 4d0be51f7b5..d5e08889d00 100644
--- a/configs/ethernut5_defconfig
+++ b/configs/ethernut5_defconfig
@@ -25,6 +25,7 @@ CONFIG_CMD_SNTP=y
CONFIG_CMD_DNS=y
CONFIG_CMD_BSP=y
CONFIG_CMD_CACHE=y
+CONFIG_CMD_DATE=y
CONFIG_CMD_EXT2=y
CONFIG_CMD_FAT=y
CONFIG_CMD_UBI=y
diff --git a/configs/fo300_defconfig b/configs/fo300_defconfig
index f876dfad23c..b4f334a4361 100644
--- a/configs/fo300_defconfig
+++ b/configs/fo300_defconfig
@@ -21,6 +21,7 @@ CONFIG_CMD_PING=y
CONFIG_CMD_SNTP=y
CONFIG_CMD_BMP=y
CONFIG_CMD_BSP=y
+CONFIG_CMD_DATE=y
CONFIG_CMD_EXT2=y
CONFIG_CMD_FAT=y
CONFIG_CMD_DIAG=y
diff --git a/configs/glacier_defconfig b/configs/glacier_defconfig
index 5a82757b6a5..3fb53cc23c4 100644
--- a/configs/glacier_defconfig
+++ b/configs/glacier_defconfig
@@ -19,6 +19,7 @@ CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_CMD_SNTP=y
CONFIG_CMD_CACHE=y
+CONFIG_CMD_DATE=y
CONFIG_MAC_PARTITION=y
CONFIG_DOS_PARTITION=y
CONFIG_ISO_PARTITION=y
diff --git a/configs/glacier_ramboot_defconfig b/configs/glacier_ramboot_defconfig
index 4601963930f..e5c2be416db 100644
--- a/configs/glacier_ramboot_defconfig
+++ b/configs/glacier_ramboot_defconfig
@@ -20,6 +20,7 @@ CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_CMD_SNTP=y
CONFIG_CMD_CACHE=y
+CONFIG_CMD_DATE=y
CONFIG_MAC_PARTITION=y
CONFIG_DOS_PARTITION=y
CONFIG_ISO_PARTITION=y
diff --git a/configs/goflexhome_defconfig b/configs/goflexhome_defconfig
index 0641fd1a971..dbd81331a84 100644
--- a/configs/goflexhome_defconfig
+++ b/configs/goflexhome_defconfig
@@ -13,6 +13,7 @@ CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
+CONFIG_CMD_DATE=y
CONFIG_CMD_EXT2=y
CONFIG_CMD_EXT4=y
CONFIG_CMD_FAT=y
diff --git a/configs/guruplug_defconfig b/configs/guruplug_defconfig
index e15b77c4efe..c09d3a61e1e 100644
--- a/configs/guruplug_defconfig
+++ b/configs/guruplug_defconfig
@@ -14,6 +14,7 @@ CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
+CONFIG_CMD_DATE=y
CONFIG_CMD_EXT2=y
CONFIG_CMD_EXT4=y
CONFIG_CMD_FAT=y
diff --git a/configs/haleakala_defconfig b/configs/haleakala_defconfig
index c8a72f625f6..9ff43da384d 100644
--- a/configs/haleakala_defconfig
+++ b/configs/haleakala_defconfig
@@ -18,6 +18,7 @@ CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_CMD_SNTP=y
+CONFIG_CMD_DATE=y
CONFIG_CMD_DIAG=y
# CONFIG_MMC is not set
CONFIG_MTD_NOR_FLASH=y
diff --git a/configs/icon_defconfig b/configs/icon_defconfig
index 117fcb559db..b47b15d8d6b 100644
--- a/configs/icon_defconfig
+++ b/configs/icon_defconfig
@@ -21,6 +21,7 @@ CONFIG_CMD_PING=y
CONFIG_CMD_SNTP=y
CONFIG_CMD_BMP=y
CONFIG_CMD_CACHE=y
+CONFIG_CMD_DATE=y
CONFIG_CMD_EXT2=y
CONFIG_CMD_FAT=y
# CONFIG_MMC is not set
diff --git a/configs/ids8313_defconfig b/configs/ids8313_defconfig
index ad7ec60a686..165e2eb4950 100644
--- a/configs/ids8313_defconfig
+++ b/configs/ids8313_defconfig
@@ -20,6 +20,7 @@ CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_CMD_SNTP=y
+CONFIG_CMD_DATE=y
CONFIG_CMD_UBI=y
# CONFIG_MMC is not set
CONFIG_MTD_NOR_FLASH=y
diff --git a/configs/inka4x0_defconfig b/configs/inka4x0_defconfig
index 9b30244e3c2..174719c3675 100644
--- a/configs/inka4x0_defconfig
+++ b/configs/inka4x0_defconfig
@@ -8,6 +8,7 @@ CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_PING=y
CONFIG_CMD_SNTP=y
+CONFIG_CMD_DATE=y
CONFIG_CMD_EXT2=y
CONFIG_CMD_FAT=y
CONFIG_MAC_PARTITION=y
diff --git a/configs/intip_defconfig b/configs/intip_defconfig
index eb47db4f0c6..da4f3f4730b 100644
--- a/configs/intip_defconfig
+++ b/configs/intip_defconfig
@@ -24,6 +24,7 @@ CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_CMD_SNTP=y
CONFIG_CMD_CACHE=y
+CONFIG_CMD_DATE=y
CONFIG_CMD_EXT2=y
CONFIG_CMD_FAT=y
CONFIG_MAC_PARTITION=y
diff --git a/configs/ipek01_defconfig b/configs/ipek01_defconfig
index 8b746e630ee..cac9326b6cb 100644
--- a/configs/ipek01_defconfig
+++ b/configs/ipek01_defconfig
@@ -13,6 +13,7 @@ CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_BMP=y
+CONFIG_CMD_DATE=y
CONFIG_CMD_FAT=y
# CONFIG_MMC is not set
CONFIG_MTD_NOR_FLASH=y
diff --git a/configs/katmai_defconfig b/configs/katmai_defconfig
index 9c80f06d949..406bdcd6964 100644
--- a/configs/katmai_defconfig
+++ b/configs/katmai_defconfig
@@ -17,6 +17,7 @@ CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_CMD_SNTP=y
CONFIG_CMD_CACHE=y
+CONFIG_CMD_DATE=y
CONFIG_CMD_EXT2=y
CONFIG_CMD_FAT=y
# CONFIG_MMC is not set
diff --git a/configs/kilauea_defconfig b/configs/kilauea_defconfig
index 28ed55182cd..0ed41c388ee 100644
--- a/configs/kilauea_defconfig
+++ b/configs/kilauea_defconfig
@@ -18,6 +18,7 @@ CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_CMD_SNTP=y
+CONFIG_CMD_DATE=y
CONFIG_CMD_DIAG=y
# CONFIG_MMC is not set
CONFIG_MTD_NOR_FLASH=y
diff --git a/configs/ls1012aqds_qspi_defconfig b/configs/ls1012aqds_qspi_defconfig
index 06934ebcf25..a6995abc605 100644
--- a/configs/ls1012aqds_qspi_defconfig
+++ b/configs/ls1012aqds_qspi_defconfig
@@ -23,6 +23,7 @@ CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_CMD_CACHE=y
+CONFIG_CMD_DATE=y
CONFIG_CMD_EXT2=y
CONFIG_CMD_FAT=y
CONFIG_OF_CONTROL=y
diff --git a/configs/ls2080aqds_SECURE_BOOT_defconfig b/configs/ls2080aqds_SECURE_BOOT_defconfig
index 45e5d87f361..a680706fa2a 100644
--- a/configs/ls2080aqds_SECURE_BOOT_defconfig
+++ b/configs/ls2080aqds_SECURE_BOOT_defconfig
@@ -16,6 +16,7 @@ CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_CACHE=y
+CONFIG_CMD_DATE=y
# CONFIG_ISO_PARTITION is not set
CONFIG_OF_CONTROL=y
CONFIG_NET_RANDOM_ETHADDR=y
diff --git a/configs/ls2080aqds_defconfig b/configs/ls2080aqds_defconfig
index 770dea06056..fd889580a49 100644
--- a/configs/ls2080aqds_defconfig
+++ b/configs/ls2080aqds_defconfig
@@ -3,7 +3,6 @@ CONFIG_TARGET_LS2080AQDS=y
CONFIG_FSL_LS_PPA=y
CONFIG_DEFAULT_DEVICE_TREE="fsl-ls2080a-qds"
# CONFIG_SYS_MALLOC_F is not set
-CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
@@ -16,6 +15,7 @@ CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_CACHE=y
+CONFIG_CMD_DATE=y
# CONFIG_ISO_PARTITION is not set
CONFIG_OF_CONTROL=y
CONFIG_NET_RANDOM_ETHADDR=y
diff --git a/configs/ls2080aqds_nand_defconfig b/configs/ls2080aqds_nand_defconfig
index aa4f1345586..26c9210545e 100644
--- a/configs/ls2080aqds_nand_defconfig
+++ b/configs/ls2080aqds_nand_defconfig
@@ -24,6 +24,7 @@ CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_CACHE=y
+CONFIG_CMD_DATE=y
# CONFIG_ISO_PARTITION is not set
# CONFIG_SPL_EFI_PARTITION is not set
CONFIG_OF_CONTROL=y
diff --git a/configs/ls2080aqds_qspi_defconfig b/configs/ls2080aqds_qspi_defconfig
index 6deb0acbd23..447808040c0 100644
--- a/configs/ls2080aqds_qspi_defconfig
+++ b/configs/ls2080aqds_qspi_defconfig
@@ -16,6 +16,7 @@ CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_CACHE=y
+CONFIG_CMD_DATE=y
# CONFIG_ISO_PARTITION is not set
CONFIG_OF_CONTROL=y
CONFIG_OF_EMBED=y
diff --git a/configs/ls2080ardb_SECURE_BOOT_defconfig b/configs/ls2080ardb_SECURE_BOOT_defconfig
index 19c9db5ae83..a5ebe0e4a5c 100644
--- a/configs/ls2080ardb_SECURE_BOOT_defconfig
+++ b/configs/ls2080ardb_SECURE_BOOT_defconfig
@@ -16,6 +16,7 @@ CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_CACHE=y
+CONFIG_CMD_DATE=y
CONFIG_OF_CONTROL=y
CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_DM=y
diff --git a/configs/ls2080ardb_defconfig b/configs/ls2080ardb_defconfig
index e0cb7f898e7..efdb0f105d2 100644
--- a/configs/ls2080ardb_defconfig
+++ b/configs/ls2080ardb_defconfig
@@ -3,7 +3,6 @@ CONFIG_TARGET_LS2080ARDB=y
CONFIG_FSL_LS_PPA=y
CONFIG_DEFAULT_DEVICE_TREE="fsl-ls2080a-rdb"
# CONFIG_SYS_MALLOC_F is not set
-CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
@@ -16,6 +15,7 @@ CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_CACHE=y
+CONFIG_CMD_DATE=y
CONFIG_OF_CONTROL=y
CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_DM=y
diff --git a/configs/ls2080ardb_nand_defconfig b/configs/ls2080ardb_nand_defconfig
index cd57374a4e7..f642fc72065 100644
--- a/configs/ls2080ardb_nand_defconfig
+++ b/configs/ls2080ardb_nand_defconfig
@@ -23,6 +23,7 @@ CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_CACHE=y
+CONFIG_CMD_DATE=y
CONFIG_OF_CONTROL=y
CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_DM=y
diff --git a/configs/lwmon5_defconfig b/configs/lwmon5_defconfig
index 7e524b0f53c..429a81f6b71 100644
--- a/configs/lwmon5_defconfig
+++ b/configs/lwmon5_defconfig
@@ -21,6 +21,7 @@ CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_CMD_BMP=y
+CONFIG_CMD_DATE=y
CONFIG_CMD_FAT=y
CONFIG_CMD_DIAG=y
CONFIG_MAC_PARTITION=y
diff --git a/configs/m28evk_defconfig b/configs/m28evk_defconfig
index c14b21892ad..6acbd77d5f3 100644
--- a/configs/m28evk_defconfig
+++ b/configs/m28evk_defconfig
@@ -30,6 +30,7 @@ CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_CMD_BMP=y
CONFIG_CMD_CACHE=y
+CONFIG_CMD_DATE=y
CONFIG_CMD_EXT4=y
CONFIG_CMD_EXT4_WRITE=y
CONFIG_CMD_FAT=y
diff --git a/configs/m53evk_defconfig b/configs/m53evk_defconfig
index 20103bb59db..b0379b8e630 100644
--- a/configs/m53evk_defconfig
+++ b/configs/m53evk_defconfig
@@ -27,6 +27,7 @@ CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_CMD_BMP=y
+CONFIG_CMD_DATE=y
CONFIG_CMD_EXT4=y
CONFIG_CMD_EXT4_WRITE=y
CONFIG_CMD_FAT=y
diff --git a/configs/makalu_defconfig b/configs/makalu_defconfig
index feba0e7e234..47198fc56a3 100644
--- a/configs/makalu_defconfig
+++ b/configs/makalu_defconfig
@@ -16,6 +16,7 @@ CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_CMD_SNTP=y
+CONFIG_CMD_DATE=y
CONFIG_CMD_DIAG=y
# CONFIG_MMC is not set
CONFIG_MTD_NOR_FLASH=y
diff --git a/configs/malta64_defconfig b/configs/malta64_defconfig
index 4479a8aef5d..a7f14bde196 100644
--- a/configs/malta64_defconfig
+++ b/configs/malta64_defconfig
@@ -13,6 +13,7 @@ CONFIG_SYS_PROMPT="malta # "
CONFIG_CMD_DHCP=y
# CONFIG_CMD_NFS is not set
CONFIG_CMD_PING=y
+CONFIG_CMD_DATE=y
# CONFIG_ISO_PARTITION is not set
CONFIG_OF_EMBED=y
CONFIG_MTD_NOR_FLASH=y
diff --git a/configs/malta64el_defconfig b/configs/malta64el_defconfig
index 485441f8ab3..9b04e0be31c 100644
--- a/configs/malta64el_defconfig
+++ b/configs/malta64el_defconfig
@@ -14,6 +14,7 @@ CONFIG_SYS_PROMPT="maltael # "
CONFIG_CMD_DHCP=y
# CONFIG_CMD_NFS is not set
CONFIG_CMD_PING=y
+CONFIG_CMD_DATE=y
# CONFIG_ISO_PARTITION is not set
CONFIG_OF_EMBED=y
CONFIG_MTD_NOR_FLASH=y
diff --git a/configs/malta_defconfig b/configs/malta_defconfig
index bcb41e01229..237b3ab333e 100644
--- a/configs/malta_defconfig
+++ b/configs/malta_defconfig
@@ -12,6 +12,7 @@ CONFIG_SYS_PROMPT="malta # "
CONFIG_CMD_DHCP=y
# CONFIG_CMD_NFS is not set
CONFIG_CMD_PING=y
+CONFIG_CMD_DATE=y
# CONFIG_ISO_PARTITION is not set
CONFIG_OF_EMBED=y
CONFIG_MTD_NOR_FLASH=y
diff --git a/configs/maltael_defconfig b/configs/maltael_defconfig
index 268fd9ec0eb..fe5e00c2599 100644
--- a/configs/maltael_defconfig
+++ b/configs/maltael_defconfig
@@ -13,6 +13,7 @@ CONFIG_SYS_PROMPT="maltael # "
CONFIG_CMD_DHCP=y
# CONFIG_CMD_NFS is not set
CONFIG_CMD_PING=y
+CONFIG_CMD_DATE=y
# CONFIG_ISO_PARTITION is not set
CONFIG_OF_EMBED=y
CONFIG_MTD_NOR_FLASH=y
diff --git a/configs/mcx_defconfig b/configs/mcx_defconfig
index d731f35ed7f..3cc1a2ba14b 100644
--- a/configs/mcx_defconfig
+++ b/configs/mcx_defconfig
@@ -26,6 +26,7 @@ CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_CMD_BMP=y
CONFIG_CMD_CACHE=y
+CONFIG_CMD_DATE=y
CONFIG_CMD_EXT2=y
CONFIG_CMD_FAT=y
CONFIG_CMD_UBI=y
diff --git a/configs/mecp5123_defconfig b/configs/mecp5123_defconfig
index c233e9ea1a7..ebf54154648 100644
--- a/configs/mecp5123_defconfig
+++ b/configs/mecp5123_defconfig
@@ -11,6 +11,7 @@ CONFIG_CMD_I2C=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
+CONFIG_CMD_DATE=y
CONFIG_CMD_FAT=y
# CONFIG_MMC is not set
CONFIG_MTD_NOR_FLASH=y
diff --git a/configs/motionpro_defconfig b/configs/motionpro_defconfig
index 70c04c343d2..91384a62595 100644
--- a/configs/motionpro_defconfig
+++ b/configs/motionpro_defconfig
@@ -13,6 +13,7 @@ CONFIG_CMD_I2C=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
+CONFIG_CMD_DATE=y
CONFIG_CMD_FAT=y
CONFIG_CMD_BEDBUG=y
CONFIG_LED_STATUS=y
diff --git a/configs/mpc5121ads_defconfig b/configs/mpc5121ads_defconfig
index 2dde2035614..c0af8127b5c 100644
--- a/configs/mpc5121ads_defconfig
+++ b/configs/mpc5121ads_defconfig
@@ -12,6 +12,7 @@ CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
+CONFIG_CMD_DATE=y
CONFIG_CMD_EXT2=y
CONFIG_CMD_FAT=y
CONFIG_MAC_PARTITION=y
diff --git a/configs/mpc5121ads_rev2_defconfig b/configs/mpc5121ads_rev2_defconfig
index 80033a8a783..ad46e02e94b 100644
--- a/configs/mpc5121ads_rev2_defconfig
+++ b/configs/mpc5121ads_rev2_defconfig
@@ -13,6 +13,7 @@ CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
+CONFIG_CMD_DATE=y
CONFIG_CMD_EXT2=y
CONFIG_CMD_FAT=y
CONFIG_MAC_PARTITION=y
diff --git a/configs/mx25pdk_defconfig b/configs/mx25pdk_defconfig
index 87d7fabf0b7..c3a0091ce49 100644
--- a/configs/mx25pdk_defconfig
+++ b/configs/mx25pdk_defconfig
@@ -14,6 +14,7 @@ CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_CMD_CACHE=y
+CONFIG_CMD_DATE=y
CONFIG_CMD_EXT2=y
CONFIG_CMD_FAT=y
CONFIG_OF_LIBFDT=y
diff --git a/configs/mx28evk_auart_console_defconfig b/configs/mx28evk_auart_console_defconfig
index bce5870db03..d7a1d684c87 100644
--- a/configs/mx28evk_auart_console_defconfig
+++ b/configs/mx28evk_auart_console_defconfig
@@ -27,6 +27,7 @@ CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_CMD_BMP=y
CONFIG_CMD_CACHE=y
+CONFIG_CMD_DATE=y
CONFIG_CMD_EXT4=y
CONFIG_CMD_EXT4_WRITE=y
CONFIG_CMD_FAT=y
diff --git a/configs/mx28evk_defconfig b/configs/mx28evk_defconfig
index fd7ec78a174..c5fe5595bc0 100644
--- a/configs/mx28evk_defconfig
+++ b/configs/mx28evk_defconfig
@@ -28,6 +28,7 @@ CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_CMD_BMP=y
CONFIG_CMD_CACHE=y
+CONFIG_CMD_DATE=y
CONFIG_CMD_EXT4=y
CONFIG_CMD_EXT4_WRITE=y
CONFIG_CMD_FAT=y
diff --git a/configs/mx28evk_nand_defconfig b/configs/mx28evk_nand_defconfig
index 7b49110fcd7..f878bafa002 100644
--- a/configs/mx28evk_nand_defconfig
+++ b/configs/mx28evk_nand_defconfig
@@ -27,6 +27,7 @@ CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_CMD_BMP=y
CONFIG_CMD_CACHE=y
+CONFIG_CMD_DATE=y
CONFIG_CMD_EXT4=y
CONFIG_CMD_EXT4_WRITE=y
CONFIG_CMD_FAT=y
diff --git a/configs/mx28evk_spi_defconfig b/configs/mx28evk_spi_defconfig
index 3212e4553e6..5203349c7a3 100644
--- a/configs/mx28evk_spi_defconfig
+++ b/configs/mx28evk_spi_defconfig
@@ -27,6 +27,7 @@ CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_CMD_BMP=y
CONFIG_CMD_CACHE=y
+CONFIG_CMD_DATE=y
CONFIG_CMD_EXT4=y
CONFIG_CMD_EXT4_WRITE=y
CONFIG_CMD_FAT=y
diff --git a/configs/mx31ads_defconfig b/configs/mx31ads_defconfig
index 6747ee06614..c9ba6975f88 100644
--- a/configs/mx31ads_defconfig
+++ b/configs/mx31ads_defconfig
@@ -5,5 +5,6 @@ CONFIG_CMD_SPI=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_PING=y
+CONFIG_CMD_DATE=y
# CONFIG_MMC is not set
CONFIG_MTD_NOR_FLASH=y
diff --git a/configs/mx31pdk_defconfig b/configs/mx31pdk_defconfig
index afe19aadaae..e704dfd5f8c 100644
--- a/configs/mx31pdk_defconfig
+++ b/configs/mx31pdk_defconfig
@@ -14,4 +14,5 @@ CONFIG_CMD_SPI=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
+CONFIG_CMD_DATE=y
# CONFIG_MMC is not set
diff --git a/configs/mx35pdk_defconfig b/configs/mx35pdk_defconfig
index 2933d88182b..655a1a52244 100644
--- a/configs/mx35pdk_defconfig
+++ b/configs/mx35pdk_defconfig
@@ -14,6 +14,7 @@ CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_CMD_CACHE=y
+CONFIG_CMD_DATE=y
CONFIG_CMD_EXT2=y
CONFIG_CMD_FAT=y
CONFIG_EFI_PARTITION=y
diff --git a/configs/mx51evk_defconfig b/configs/mx51evk_defconfig
index 5b92912346e..d7e5404048d 100644
--- a/configs/mx51evk_defconfig
+++ b/configs/mx51evk_defconfig
@@ -18,6 +18,7 @@ CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
+CONFIG_CMD_DATE=y
CONFIG_CMD_FAT=y
CONFIG_USB=y
CONFIG_USB_STORAGE=y
diff --git a/configs/mx53evk_defconfig b/configs/mx53evk_defconfig
index 2c54942e836..eed381b2fa1 100644
--- a/configs/mx53evk_defconfig
+++ b/configs/mx53evk_defconfig
@@ -11,5 +11,6 @@ CONFIG_CMD_I2C=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
+CONFIG_CMD_DATE=y
CONFIG_CMD_FAT=y
CONFIG_OF_LIBFDT=y
diff --git a/configs/nas220_defconfig b/configs/nas220_defconfig
index e8b3c90cc2a..7a025383014 100644
--- a/configs/nas220_defconfig
+++ b/configs/nas220_defconfig
@@ -13,6 +13,7 @@ CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
+CONFIG_CMD_DATE=y
CONFIG_CMD_EXT2=y
CONFIG_CMD_EXT4=y
CONFIG_CMD_FAT=y
diff --git a/configs/pcm030_LOWBOOT_defconfig b/configs/pcm030_LOWBOOT_defconfig
index 456a699519a..d19908ca8f2 100644
--- a/configs/pcm030_LOWBOOT_defconfig
+++ b/configs/pcm030_LOWBOOT_defconfig
@@ -8,6 +8,7 @@ CONFIG_CMD_I2C=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
+CONFIG_CMD_DATE=y
# CONFIG_MMC is not set
CONFIG_MTD_NOR_FLASH=y
CONFIG_USB=y
diff --git a/configs/pcm030_defconfig b/configs/pcm030_defconfig
index 8c70e024791..ef5c85888c9 100644
--- a/configs/pcm030_defconfig
+++ b/configs/pcm030_defconfig
@@ -8,6 +8,7 @@ CONFIG_CMD_I2C=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
+CONFIG_CMD_DATE=y
# CONFIG_MMC is not set
CONFIG_MTD_NOR_FLASH=y
CONFIG_USB=y
diff --git a/configs/pcm052_defconfig b/configs/pcm052_defconfig
index 356268f65ff..1dbc0a8ce80 100644
--- a/configs/pcm052_defconfig
+++ b/configs/pcm052_defconfig
@@ -16,6 +16,7 @@ CONFIG_CMD_GPIO=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
+CONFIG_CMD_DATE=y
CONFIG_CMD_FAT=y
CONFIG_CMD_UBI=y
CONFIG_OF_CONTROL=y
diff --git a/configs/pdm360ng_defconfig b/configs/pdm360ng_defconfig
index 42cf0213466..f45a90caf93 100644
--- a/configs/pdm360ng_defconfig
+++ b/configs/pdm360ng_defconfig
@@ -16,6 +16,7 @@ CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_CMD_BMP=y
+CONFIG_CMD_DATE=y
# CONFIG_MMC is not set
CONFIG_MTD_NOR_FLASH=y
# CONFIG_PCI is not set
diff --git a/configs/sheevaplug_defconfig b/configs/sheevaplug_defconfig
index 63973eb9184..b3280557caf 100644
--- a/configs/sheevaplug_defconfig
+++ b/configs/sheevaplug_defconfig
@@ -15,6 +15,7 @@ CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
+CONFIG_CMD_DATE=y
CONFIG_CMD_EXT2=y
CONFIG_CMD_EXT4=y
CONFIG_CMD_FAT=y
diff --git a/configs/socrates_defconfig b/configs/socrates_defconfig
index c34670db800..9e00d650344 100644
--- a/configs/socrates_defconfig
+++ b/configs/socrates_defconfig
@@ -18,6 +18,7 @@ CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_CMD_SNTP=y
CONFIG_CMD_BMP=y
+CONFIG_CMD_DATE=y
CONFIG_CMD_EXT2=y
# CONFIG_MMC is not set
CONFIG_MTD_NOR_FLASH=y
diff --git a/configs/sycamore_defconfig b/configs/sycamore_defconfig
index 1e660ab01ed..5f56a516ff2 100644
--- a/configs/sycamore_defconfig
+++ b/configs/sycamore_defconfig
@@ -15,6 +15,7 @@ CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_CMD_SNTP=y
+CONFIG_CMD_DATE=y
CONFIG_CMD_DIAG=y
# CONFIG_MMC is not set
CONFIG_MTD_NOR_FLASH=y
diff --git a/configs/tbs2910_defconfig b/configs/tbs2910_defconfig
index 9ba16090b21..e4622830ca6 100644
--- a/configs/tbs2910_defconfig
+++ b/configs/tbs2910_defconfig
@@ -24,6 +24,7 @@ CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_CMD_CACHE=y
+CONFIG_CMD_DATE=y
CONFIG_CMD_TIME=y
CONFIG_CMD_EXT2=y
CONFIG_CMD_EXT4=y
diff --git a/configs/tqma6s_wru4_mmc_defconfig b/configs/tqma6s_wru4_mmc_defconfig
index 159ecd0f9d1..e24912e0c2b 100644
--- a/configs/tqma6s_wru4_mmc_defconfig
+++ b/configs/tqma6s_wru4_mmc_defconfig
@@ -24,6 +24,7 @@ CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_CMD_CACHE=y
+CONFIG_CMD_DATE=y
CONFIG_CMD_EXT2=y
CONFIG_CMD_EXT4=y
CONFIG_CMD_EXT4_WRITE=y
diff --git a/configs/v38b_defconfig b/configs/v38b_defconfig
index 94706288234..db4c47c3d25 100644
--- a/configs/v38b_defconfig
+++ b/configs/v38b_defconfig
@@ -9,6 +9,7 @@ CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
+CONFIG_CMD_DATE=y
CONFIG_CMD_FAT=y
CONFIG_CMD_DIAG=y
CONFIG_MAC_PARTITION=y
diff --git a/configs/vme8349_defconfig b/configs/vme8349_defconfig
index dcbf27ac9d6..c27a44744a4 100644
--- a/configs/vme8349_defconfig
+++ b/configs/vme8349_defconfig
@@ -9,6 +9,7 @@ CONFIG_CMD_I2C=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
+CONFIG_CMD_DATE=y
# CONFIG_MMC is not set
CONFIG_MTD_NOR_FLASH=y
CONFIG_BAUDRATE=9600
diff --git a/configs/walnut_defconfig b/configs/walnut_defconfig
index 1e660ab01ed..5f56a516ff2 100644
--- a/configs/walnut_defconfig
+++ b/configs/walnut_defconfig
@@ -15,6 +15,7 @@ CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_CMD_SNTP=y
+CONFIG_CMD_DATE=y
CONFIG_CMD_DIAG=y
# CONFIG_MMC is not set
CONFIG_MTD_NOR_FLASH=y
diff --git a/configs/woodburn_defconfig b/configs/woodburn_defconfig
index 8c17e6925c4..53a97078b3f 100644
--- a/configs/woodburn_defconfig
+++ b/configs/woodburn_defconfig
@@ -14,6 +14,7 @@ CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_CMD_CACHE=y
+CONFIG_CMD_DATE=y
CONFIG_CMD_EXT2=y
CONFIG_CMD_FAT=y
CONFIG_EFI_PARTITION=y
diff --git a/configs/woodburn_sd_defconfig b/configs/woodburn_sd_defconfig
index a7321895c53..fdc2b2aa223 100644
--- a/configs/woodburn_sd_defconfig
+++ b/configs/woodburn_sd_defconfig
@@ -23,6 +23,7 @@ CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_CMD_CACHE=y
+CONFIG_CMD_DATE=y
CONFIG_CMD_EXT2=y
CONFIG_CMD_FAT=y
CONFIG_EFI_PARTITION=y
diff --git a/configs/work_92105_defconfig b/configs/work_92105_defconfig
index 9307078fa19..ebcae43e3f8 100644
--- a/configs/work_92105_defconfig
+++ b/configs/work_92105_defconfig
@@ -20,6 +20,7 @@ CONFIG_CMD_GPIO=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
+CONFIG_CMD_DATE=y
CONFIG_DOS_PARTITION=y
CONFIG_DM=y
CONFIG_SPL_DM=y
diff --git a/configs/wtk_defconfig b/configs/wtk_defconfig
index d0c01369cec..ad9100e0f59 100644
--- a/configs/wtk_defconfig
+++ b/configs/wtk_defconfig
@@ -11,6 +11,7 @@ CONFIG_CMD_ASKENV=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_SNTP=y
CONFIG_CMD_BMP=y
+CONFIG_CMD_DATE=y
CONFIG_CMD_EXT2=y
CONFIG_MAC_PARTITION=y
CONFIG_DOS_PARTITION=y
diff --git a/configs/x600_defconfig b/configs/x600_defconfig
index a72c3d4ee77..01565ec33b0 100644
--- a/configs/x600_defconfig
+++ b/configs/x600_defconfig
@@ -26,6 +26,7 @@ CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_CMD_CACHE=y
+CONFIG_CMD_DATE=y
CONFIG_CMD_FAT=y
CONFIG_CMD_FS_GENERIC=y
CONFIG_CMD_UBI=y
diff --git a/configs/xpedite1000_defconfig b/configs/xpedite1000_defconfig
index 5b46c0a5724..9dd082bfdda 100644
--- a/configs/xpedite1000_defconfig
+++ b/configs/xpedite1000_defconfig
@@ -13,6 +13,7 @@ CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_CMD_SNTP=y
+CONFIG_CMD_DATE=y
# CONFIG_MMC is not set
CONFIG_MTD_NOR_FLASH=y
CONFIG_SYS_NS16550=y
diff --git a/configs/xpedite517x_defconfig b/configs/xpedite517x_defconfig
index 1358b7948fe..909efb1c08d 100644
--- a/configs/xpedite517x_defconfig
+++ b/configs/xpedite517x_defconfig
@@ -14,6 +14,7 @@ CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_CMD_SNTP=y
+CONFIG_CMD_DATE=y
# CONFIG_MMC is not set
CONFIG_MTD_NOR_FLASH=y
CONFIG_SYS_NS16550=y
diff --git a/configs/xpedite520x_defconfig b/configs/xpedite520x_defconfig
index bea0bb383de..e1fdfeb7599 100644
--- a/configs/xpedite520x_defconfig
+++ b/configs/xpedite520x_defconfig
@@ -14,6 +14,7 @@ CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_CMD_SNTP=y
+CONFIG_CMD_DATE=y
# CONFIG_MMC is not set
CONFIG_MTD_NOR_FLASH=y
CONFIG_SYS_NS16550=y
diff --git a/configs/xpedite537x_defconfig b/configs/xpedite537x_defconfig
index 5712edf2c4e..41dee5d839a 100644
--- a/configs/xpedite537x_defconfig
+++ b/configs/xpedite537x_defconfig
@@ -14,6 +14,7 @@ CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_CMD_SNTP=y
+CONFIG_CMD_DATE=y
CONFIG_SYS_FSL_DDR2=y
# CONFIG_MMC is not set
CONFIG_MTD_NOR_FLASH=y
diff --git a/configs/xpedite550x_defconfig b/configs/xpedite550x_defconfig
index e17a4fff614..785eeef8753 100644
--- a/configs/xpedite550x_defconfig
+++ b/configs/xpedite550x_defconfig
@@ -15,6 +15,7 @@ CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_CMD_SNTP=y
+CONFIG_CMD_DATE=y
# CONFIG_MMC is not set
CONFIG_MTD_NOR_FLASH=y
CONFIG_SYS_NS16550=y
diff --git a/include/config_cmd_all.h b/include/config_cmd_all.h
index bba3b789640..bc0bc2b6c8c 100644
--- a/include/config_cmd_all.h
+++ b/include/config_cmd_all.h
@@ -13,7 +13,6 @@
* Alphabetical list of all possible commands.
*/
-#define CONFIG_CMD_DATE /* support for RTC, date/time...*/
#define CONFIG_CMD_DTT /* Digital Therm and Thermostat */
#define CONFIG_CMD_EEPROM /* EEPROM read/write support */
#define CONFIG_CMD_FDC /* Floppy Disk Support */
diff --git a/include/configs/B4860QDS.h b/include/configs/B4860QDS.h
index 078b215450d..abfdbc92767 100644
--- a/include/configs/B4860QDS.h
+++ b/include/configs/B4860QDS.h
@@ -702,7 +702,6 @@ unsigned long get_board_ddr_clk(void);
/*
* Command line configuration.
*/
-#define CONFIG_CMD_DATE
#define CONFIG_CMD_EEPROM
#define CONFIG_CMD_ERRATA
#define CONFIG_CMD_IRQ
diff --git a/include/configs/BSC9132QDS.h b/include/configs/BSC9132QDS.h
index b23ec8fc8b0..9097932581c 100644
--- a/include/configs/BSC9132QDS.h
+++ b/include/configs/BSC9132QDS.h
@@ -522,7 +522,6 @@ combinations. this should be removed later
/*
* Command line configuration.
*/
-#define CONFIG_CMD_DATE
#define CONFIG_CMD_ERRATA
#define CONFIG_CMD_IRQ
#define CONFIG_CMD_REGINFO
diff --git a/include/configs/CPCI4052.h b/include/configs/CPCI4052.h
index d869a5fa611..deb6f826e1a 100644
--- a/include/configs/CPCI4052.h
+++ b/include/configs/CPCI4052.h
@@ -63,7 +63,6 @@
#define CONFIG_CMD_PCI
#define CONFIG_CMD_IRQ
#define CONFIG_CMD_IDE
-#define CONFIG_CMD_DATE
#define CONFIG_CMD_EEPROM
#define CONFIG_SUPPORT_VFAT
diff --git a/include/configs/M52277EVB.h b/include/configs/M52277EVB.h
index 9325be84695..7f5eecaad52 100644
--- a/include/configs/M52277EVB.h
+++ b/include/configs/M52277EVB.h
@@ -36,7 +36,6 @@
#define CONFIG_BOOTP_HOSTNAME
/* Command line configuration */
-#define CONFIG_CMD_DATE
#define CONFIG_CMD_JFFS2
#define CONFIG_CMD_REGINFO
diff --git a/include/configs/M53017EVB.h b/include/configs/M53017EVB.h
index 0c18b14c723..b88c3709c60 100644
--- a/include/configs/M53017EVB.h
+++ b/include/configs/M53017EVB.h
@@ -26,7 +26,6 @@
#define CONFIG_WATCHDOG_TIMEOUT 5000
/* Command line configuration */
-#define CONFIG_CMD_DATE
#define CONFIG_CMD_REGINFO
#define CONFIG_SYS_UNIFY_CACHE
diff --git a/include/configs/M5329EVB.h b/include/configs/M5329EVB.h
index 46c50ea1f25..999bcd94952 100644
--- a/include/configs/M5329EVB.h
+++ b/include/configs/M5329EVB.h
@@ -26,7 +26,6 @@
#define CONFIG_WATCHDOG_TIMEOUT 5000 /* timeout in milliseconds, max timeout is 6.71sec */
/* Command line configuration */
-#define CONFIG_CMD_DATE
#define CONFIG_CMD_REGINFO
#ifdef CONFIG_NANDFLASH_SIZE
diff --git a/include/configs/M5373EVB.h b/include/configs/M5373EVB.h
index 0204cd56949..3a39e5031d3 100644
--- a/include/configs/M5373EVB.h
+++ b/include/configs/M5373EVB.h
@@ -26,7 +26,6 @@
#define CONFIG_WATCHDOG_TIMEOUT 3360 /* timeout in ms, max is 3.36 sec */
/* Command line configuration */
-#define CONFIG_CMD_DATE
#define CONFIG_CMD_REGINFO
#ifdef CONFIG_NANDFLASH_SIZE
diff --git a/include/configs/M54418TWR.h b/include/configs/M54418TWR.h
index cbe0d1ef635..1817571efe4 100644
--- a/include/configs/M54418TWR.h
+++ b/include/configs/M54418TWR.h
@@ -37,7 +37,6 @@
#define CONFIG_BOOTP_HOSTNAME
/* Command line configuration */
-#undef CONFIG_CMD_DATE
#undef CONFIG_CMD_JFFS2
#undef CONFIG_CMD_NAND
#define CONFIG_CMD_REGINFO
diff --git a/include/configs/M54451EVB.h b/include/configs/M54451EVB.h
index 770472d8e0e..553e877ae79 100644
--- a/include/configs/M54451EVB.h
+++ b/include/configs/M54451EVB.h
@@ -36,7 +36,6 @@
#define CONFIG_BOOTP_HOSTNAME
/* Command line configuration */
-#define CONFIG_CMD_DATE
#undef CONFIG_CMD_JFFS2
#define CONFIG_CMD_REGINFO
diff --git a/include/configs/M54455EVB.h b/include/configs/M54455EVB.h
index db80871190f..806f00555f9 100644
--- a/include/configs/M54455EVB.h
+++ b/include/configs/M54455EVB.h
@@ -36,7 +36,6 @@
#define CONFIG_BOOTP_HOSTNAME
/* Command line configuration */
-#define CONFIG_CMD_DATE
#define CONFIG_CMD_IDE
#define CONFIG_CMD_JFFS2
#undef CONFIG_CMD_PCI
diff --git a/include/configs/M5475EVB.h b/include/configs/M5475EVB.h
index 2c31d99a62b..cf9d3b8e1b9 100644
--- a/include/configs/M5475EVB.h
+++ b/include/configs/M5475EVB.h
@@ -26,7 +26,6 @@
#define CONFIG_WATCHDOG_TIMEOUT 5000 /* timeout in milliseconds, max timeout is 6.71sec */
/* Command line configuration */
-#undef CONFIG_CMD_DATE
#define CONFIG_CMD_PCI
#define CONFIG_CMD_REGINFO
diff --git a/include/configs/M5485EVB.h b/include/configs/M5485EVB.h
index b9222e40d98..934c9d89036 100644
--- a/include/configs/M5485EVB.h
+++ b/include/configs/M5485EVB.h
@@ -26,7 +26,6 @@
#define CONFIG_WATCHDOG_TIMEOUT 5000 /* timeout in milliseconds, max timeout is 6.71sec */
/* Command line configuration */
-#undef CONFIG_CMD_DATE
#define CONFIG_CMD_PCI
#define CONFIG_CMD_REGINFO
diff --git a/include/configs/MIP405.h b/include/configs/MIP405.h
index bcdba714a54..30db7edde85 100644
--- a/include/configs/MIP405.h
+++ b/include/configs/MIP405.h
@@ -46,7 +46,6 @@
/*
* Command line configuration.
*/
-#define CONFIG_CMD_DATE
#define CONFIG_CMD_EEPROM
#define CONFIG_CMD_IDE
#define CONFIG_CMD_IRQ
diff --git a/include/configs/MPC8308RDB.h b/include/configs/MPC8308RDB.h
index b9745f60f4c..0f26467e294 100644
--- a/include/configs/MPC8308RDB.h
+++ b/include/configs/MPC8308RDB.h
@@ -416,7 +416,6 @@
/*
* Command line configuration.
*/
-#define CONFIG_CMD_DATE
#define CONFIG_CMD_PCI
#define CONFIG_CMDLINE_EDITING 1 /* add command line history */
diff --git a/include/configs/MPC8313ERDB.h b/include/configs/MPC8313ERDB.h
index 32ca242f35d..38a4a6220bf 100644
--- a/include/configs/MPC8313ERDB.h
+++ b/include/configs/MPC8313ERDB.h
@@ -468,7 +468,6 @@
/*
* Command line configuration.
*/
-#define CONFIG_CMD_DATE
#define CONFIG_CMD_PCI
#define CONFIG_CMDLINE_EDITING 1
diff --git a/include/configs/MPC8315ERDB.h b/include/configs/MPC8315ERDB.h
index 3093c56ec13..493e3fa646d 100644
--- a/include/configs/MPC8315ERDB.h
+++ b/include/configs/MPC8315ERDB.h
@@ -448,7 +448,6 @@
/*
* Command line configuration.
*/
-#define CONFIG_CMD_DATE
#define CONFIG_CMD_PCI
#define CONFIG_CMDLINE_EDITING 1 /* add command line history */
diff --git a/include/configs/MPC8349EMDS.h b/include/configs/MPC8349EMDS.h
index 70ef1b80b1a..2f91dd57bbf 100644
--- a/include/configs/MPC8349EMDS.h
+++ b/include/configs/MPC8349EMDS.h
@@ -463,7 +463,6 @@
/*
* Command line configuration.
*/
-#define CONFIG_CMD_DATE
#if defined(CONFIG_PCI)
#define CONFIG_CMD_PCI
diff --git a/include/configs/MPC8349ITX.h b/include/configs/MPC8349ITX.h
index ecad6250988..719c27966a3 100644
--- a/include/configs/MPC8349ITX.h
+++ b/include/configs/MPC8349ITX.h
@@ -479,7 +479,6 @@ boards, we say we have two, but don't display a message if we find only one. */
/*
* Command line configuration.
*/
-#define CONFIG_CMD_DATE
#define CONFIG_CMD_IRQ
#define CONFIG_CMD_SDRAM
diff --git a/include/configs/MPC837XEMDS.h b/include/configs/MPC837XEMDS.h
index 32274750a52..85b7c48fdfa 100644
--- a/include/configs/MPC837XEMDS.h
+++ b/include/configs/MPC837XEMDS.h
@@ -469,7 +469,6 @@ extern int board_pci_host_broken(void);
/*
* Command line configuration.
*/
-#define CONFIG_CMD_DATE
#if defined(CONFIG_PCI)
#define CONFIG_CMD_PCI
diff --git a/include/configs/MPC837XERDB.h b/include/configs/MPC837XERDB.h
index 5bd0d521355..d39dc1b465c 100644
--- a/include/configs/MPC837XERDB.h
+++ b/include/configs/MPC837XERDB.h
@@ -481,7 +481,6 @@
/*
* Command line configuration.
*/
-#define CONFIG_CMD_DATE
#if defined(CONFIG_PCI)
#define CONFIG_CMD_PCI
diff --git a/include/configs/P1010RDB.h b/include/configs/P1010RDB.h
index 97a75709f9d..95b42208e93 100644
--- a/include/configs/P1010RDB.h
+++ b/include/configs/P1010RDB.h
@@ -727,7 +727,6 @@ extern unsigned long get_sdram_size(void);
/*
* Command line configuration.
*/
-#define CONFIG_CMD_DATE
#define CONFIG_CMD_ERRATA
#define CONFIG_CMD_IRQ
#define CONFIG_CMD_REGINFO
diff --git a/include/configs/PIP405.h b/include/configs/PIP405.h
index 321059b7b2f..6c74b00cd59 100644
--- a/include/configs/PIP405.h
+++ b/include/configs/PIP405.h
@@ -44,7 +44,6 @@
#define CONFIG_CMD_REGINFO
#define CONFIG_CMD_FDC
#define CONFIG_SCSI
-#define CONFIG_CMD_DATE
#define CONFIG_CMD_SDRAM
#define CONFIG_CMD_SAVES
diff --git a/include/configs/PLU405.h b/include/configs/PLU405.h
index 3fc3bb844a6..4bb07d8bd46 100644
--- a/include/configs/PLU405.h
+++ b/include/configs/PLU405.h
@@ -58,7 +58,6 @@
#define CONFIG_CMD_IRQ
#define CONFIG_CMD_IDE
#define CONFIG_CMD_NAND
-#define CONFIG_CMD_DATE
#define CONFIG_CMD_EEPROM
#define CONFIG_SUPPORT_VFAT
diff --git a/include/configs/PMC405DE.h b/include/configs/PMC405DE.h
index 2c5bcbd60e2..d889306653c 100644
--- a/include/configs/PMC405DE.h
+++ b/include/configs/PMC405DE.h
@@ -48,7 +48,6 @@
/*
* Command line configuration.
*/
-#define CONFIG_CMD_DATE
#define CONFIG_CMD_EEPROM
#define CONFIG_CMD_IRQ
#define CONFIG_CMD_PCI
diff --git a/include/configs/PMC440.h b/include/configs/PMC440.h
index 31e95c1b65b..b9599b5e3b2 100644
--- a/include/configs/PMC440.h
+++ b/include/configs/PMC440.h
@@ -258,7 +258,6 @@
/* Partitions */
-#define CONFIG_CMD_DATE
#define CONFIG_CMD_DTT
#define CONFIG_CMD_EEPROM
#define CONFIG_CMD_NAND
diff --git a/include/configs/T102xQDS.h b/include/configs/T102xQDS.h
index 0fc5405bb9c..4da829d8389 100644
--- a/include/configs/T102xQDS.h
+++ b/include/configs/T102xQDS.h
@@ -780,7 +780,6 @@ unsigned long get_board_ddr_clk(void);
/*
* Command line configuration.
*/
-#define CONFIG_CMD_DATE
#define CONFIG_CMD_EEPROM
#define CONFIG_CMD_ERRATA
#define CONFIG_CMD_IRQ
diff --git a/include/configs/T102xRDB.h b/include/configs/T102xRDB.h
index 82794c424bd..3b55404cdab 100644
--- a/include/configs/T102xRDB.h
+++ b/include/configs/T102xRDB.h
@@ -790,7 +790,6 @@ unsigned long get_board_ddr_clk(void);
/*
* Command line configuration.
*/
-#define CONFIG_CMD_DATE
#define CONFIG_CMD_EEPROM
#define CONFIG_CMD_ERRATA
#define CONFIG_CMD_IRQ
diff --git a/include/configs/T1040QDS.h b/include/configs/T1040QDS.h
index 2f9497eb7dc..b2810b65f9b 100644
--- a/include/configs/T1040QDS.h
+++ b/include/configs/T1040QDS.h
@@ -661,7 +661,6 @@ unsigned long get_board_ddr_clk(void);
/*
* Command line configuration.
*/
-#define CONFIG_CMD_DATE
#define CONFIG_CMD_EEPROM
#define CONFIG_CMD_ERRATA
#define CONFIG_CMD_IRQ
diff --git a/include/configs/T104xRDB.h b/include/configs/T104xRDB.h
index 9bf09387b0b..55774080152 100644
--- a/include/configs/T104xRDB.h
+++ b/include/configs/T104xRDB.h
@@ -774,9 +774,6 @@ $(SRCTREE)/board/freescale/t104xrdb/t1042d4_sd_rcw.cfg
/*
* Command line configuration.
*/
-#ifdef CONFIG_TARGET_T1042RDB_PI
-#define CONFIG_CMD_DATE
-#endif
#define CONFIG_CMD_ERRATA
#define CONFIG_CMD_IRQ
#define CONFIG_CMD_REGINFO
diff --git a/include/configs/TQM5200.h b/include/configs/TQM5200.h
index 97c6cbf0490..13f4ef67e19 100644
--- a/include/configs/TQM5200.h
+++ b/include/configs/TQM5200.h
@@ -144,7 +144,6 @@
/*
* Command line configuration.
*/
-#define CONFIG_CMD_DATE
#define CONFIG_CMD_EEPROM
#define CONFIG_CMD_JFFS2
#define CONFIG_CMD_REGINFO
diff --git a/include/configs/TQM823L.h b/include/configs/TQM823L.h
index ddfadf1c1fd..f56bd239afc 100644
--- a/include/configs/TQM823L.h
+++ b/include/configs/TQM823L.h
@@ -91,7 +91,6 @@
/*
* Command line configuration.
*/
-#define CONFIG_CMD_DATE
#define CONFIG_CMD_IDE
#define CONFIG_CMD_JFFS2
diff --git a/include/configs/TQM823M.h b/include/configs/TQM823M.h
index 4b9ef9f9451..ed08d972f8b 100644
--- a/include/configs/TQM823M.h
+++ b/include/configs/TQM823M.h
@@ -89,7 +89,6 @@
/*
* Command line configuration.
*/
-#define CONFIG_CMD_DATE
#define CONFIG_CMD_IDE
#define CONFIG_CMD_JFFS2
diff --git a/include/configs/TQM834x.h b/include/configs/TQM834x.h
index 42a9f77e7c3..e3c2cca3c3b 100644
--- a/include/configs/TQM834x.h
+++ b/include/configs/TQM834x.h
@@ -280,7 +280,6 @@
/*
* Command line configuration.
*/
-#define CONFIG_CMD_DATE
#define CONFIG_CMD_DTT
#define CONFIG_CMD_EEPROM
#define CONFIG_CMD_JFFS2
diff --git a/include/configs/TQM850L.h b/include/configs/TQM850L.h
index 7edfab90502..c2b35fd196d 100644
--- a/include/configs/TQM850L.h
+++ b/include/configs/TQM850L.h
@@ -84,7 +84,6 @@
/*
* Command line configuration.
*/
-#define CONFIG_CMD_DATE
#define CONFIG_CMD_IDE
#define CONFIG_CMD_JFFS2
diff --git a/include/configs/TQM850M.h b/include/configs/TQM850M.h
index 3931eba60e3..76b52ab6b19 100644
--- a/include/configs/TQM850M.h
+++ b/include/configs/TQM850M.h
@@ -84,7 +84,6 @@
/*
* Command line configuration.
*/
-#define CONFIG_CMD_DATE
#define CONFIG_CMD_IDE
#define CONFIG_CMD_JFFS2
diff --git a/include/configs/TQM855L.h b/include/configs/TQM855L.h
index 9b2ec372a9f..10ba21d97dd 100644
--- a/include/configs/TQM855L.h
+++ b/include/configs/TQM855L.h
@@ -86,7 +86,6 @@
/*
* Command line configuration.
*/
-#define CONFIG_CMD_DATE
#define CONFIG_CMD_IDE
#define CONFIG_CMD_JFFS2
diff --git a/include/configs/TQM855M.h b/include/configs/TQM855M.h
index b1b38e7388c..7cfc351191d 100644
--- a/include/configs/TQM855M.h
+++ b/include/configs/TQM855M.h
@@ -115,7 +115,6 @@
/*
* Command line configuration.
*/
-#define CONFIG_CMD_DATE
#define CONFIG_CMD_EEPROM
#define CONFIG_CMD_IDE
#define CONFIG_CMD_JFFS2
diff --git a/include/configs/TQM860L.h b/include/configs/TQM860L.h
index dc2fe30e29e..7569cd1e83e 100644
--- a/include/configs/TQM860L.h
+++ b/include/configs/TQM860L.h
@@ -86,7 +86,6 @@
/*
* Command line configuration.
*/
-#define CONFIG_CMD_DATE
#define CONFIG_CMD_IDE
#define CONFIG_CMD_JFFS2
diff --git a/include/configs/TQM860M.h b/include/configs/TQM860M.h
index 06c92851eb9..d2cb4b9a877 100644
--- a/include/configs/TQM860M.h
+++ b/include/configs/TQM860M.h
@@ -86,7 +86,6 @@
/*
* Command line configuration.
*/
-#define CONFIG_CMD_DATE
#define CONFIG_CMD_IDE
#define CONFIG_CMD_JFFS2
diff --git a/include/configs/TQM862L.h b/include/configs/TQM862L.h
index aca58b1adf1..03ad2e63a01 100644
--- a/include/configs/TQM862L.h
+++ b/include/configs/TQM862L.h
@@ -89,7 +89,6 @@
/*
* Command line configuration.
*/
-#define CONFIG_CMD_DATE
#define CONFIG_CMD_IDE
#define CONFIG_CMD_JFFS2
diff --git a/include/configs/TQM862M.h b/include/configs/TQM862M.h
index 371d19f4fd5..485bd6c8a63 100644
--- a/include/configs/TQM862M.h
+++ b/include/configs/TQM862M.h
@@ -89,7 +89,6 @@
/*
* Command line configuration.
*/
-#define CONFIG_CMD_DATE
#define CONFIG_CMD_IDE
#define CONFIG_CMD_JFFS2
diff --git a/include/configs/TQM885D.h b/include/configs/TQM885D.h
index 98cec3d8c94..eaf07410714 100644
--- a/include/configs/TQM885D.h
+++ b/include/configs/TQM885D.h
@@ -125,7 +125,6 @@
/*
* Command line configuration.
*/
-#define CONFIG_CMD_DATE
#define CONFIG_CMD_EEPROM
#define CONFIG_CMD_IDE
diff --git a/include/configs/UCP1020.h b/include/configs/UCP1020.h
index a64ba1cfd37..c60743acd08 100644
--- a/include/configs/UCP1020.h
+++ b/include/configs/UCP1020.h
@@ -443,7 +443,6 @@
* Command line configuration.
*/
#define CONFIG_CMD_IRQ
-#define CONFIG_CMD_DATE
#define CONFIG_CMD_IRQ
#define CONFIG_CMD_REGINFO
#define CONFIG_CMD_ERRATA
diff --git a/include/configs/adp-ag101p.h b/include/configs/adp-ag101p.h
index d557c425671..b42fcfa8d53 100644
--- a/include/configs/adp-ag101p.h
+++ b/include/configs/adp-ag101p.h
@@ -103,11 +103,6 @@
#define CONFIG_FTSDC010_NUMBER 1
#define CONFIG_FTSDC010_SDIO
-/*
- * Command line configuration.
- */
-#define CONFIG_CMD_DATE
-
/*
* Miscellaneous configurable options
*/
diff --git a/include/configs/apf27.h b/include/configs/apf27.h
index 15149331378..40a82b884bd 100644
--- a/include/configs/apf27.h
+++ b/include/configs/apf27.h
@@ -54,7 +54,6 @@
/*
* U-Boot Commands
*/
-#define CONFIG_CMD_DATE
#define CONFIG_CMD_EEPROM
#define CONFIG_CMD_IMX_FUSE /* imx iim fuse */
#define CONFIG_CMD_MTDPARTS /* MTD partition support */
diff --git a/include/configs/apx4devkit.h b/include/configs/apx4devkit.h
index 5ae622c2056..a4c7847dab2 100644
--- a/include/configs/apx4devkit.h
+++ b/include/configs/apx4devkit.h
@@ -20,7 +20,6 @@
/* U-Boot Commands */
-#define CONFIG_CMD_DATE
#define CONFIG_CMD_NAND
/* Memory configuration */
diff --git a/include/configs/aristainetos-common.h b/include/configs/aristainetos-common.h
index d6726925842..4d16d335854 100644
--- a/include/configs/aristainetos-common.h
+++ b/include/configs/aristainetos-common.h
@@ -200,7 +200,6 @@
#define CONFIG_SYS_I2C_RTC_ADDR 0x68
#define CONFIG_SYS_RTC_BUS_NUM 2
#define CONFIG_RTC_M41T11
-#define CONFIG_CMD_DATE
/* USB Configs */
#define CONFIG_USB_EHCI
diff --git a/include/configs/astro_mcf5373l.h b/include/configs/astro_mcf5373l.h
index 4e3e5589f9a..8899579faa7 100644
--- a/include/configs/astro_mcf5373l.h
+++ b/include/configs/astro_mcf5373l.h
@@ -59,7 +59,6 @@
/* Define which commands should be available at u-boot command prompt */
-#define CONFIG_CMD_DATE
#if ENABLE_JFFS
#define CONFIG_CMD_JFFS2
#endif
diff --git a/include/configs/bamboo.h b/include/configs/bamboo.h
index aeb6507fc23..8868deb1c16 100644
--- a/include/configs/bamboo.h
+++ b/include/configs/bamboo.h
@@ -181,7 +181,6 @@
/*
* Commands additional to the ones defined in amcc-common.h
*/
-#define CONFIG_CMD_DATE
#define CONFIG_CMD_PCI
#define CONFIG_CMD_SDRAM
diff --git a/include/configs/bubinga.h b/include/configs/bubinga.h
index 8a5994af51d..7274b2d4fe7 100644
--- a/include/configs/bubinga.h
+++ b/include/configs/bubinga.h
@@ -90,7 +90,6 @@
/*
* Commands additional to the ones defined in amcc-common.h
*/
-#define CONFIG_CMD_DATE
#define CONFIG_CMD_PCI
#define CONFIG_CMD_SDRAM
diff --git a/include/configs/canmb.h b/include/configs/canmb.h
index 6cd66f28bdb..c70979ed1af 100644
--- a/include/configs/canmb.h
+++ b/include/configs/canmb.h
@@ -46,7 +46,6 @@
/*
* Command line configuration.
*/
-#define CONFIG_CMD_DATE
#define CONFIG_CMD_IMMAP
#define CONFIG_CMD_REGINFO
diff --git a/include/configs/canyonlands.h b/include/configs/canyonlands.h
index 5c1422d3472..a330372d19d 100644
--- a/include/configs/canyonlands.h
+++ b/include/configs/canyonlands.h
@@ -377,14 +377,12 @@
#define CONFIG_CMD_PCI
#define CONFIG_CMD_SDRAM
#elif defined(CONFIG_CANYONLANDS)
-#define CONFIG_CMD_DATE
#define CONFIG_CMD_DTT
#define CONFIG_CMD_NAND
#define CONFIG_CMD_PCI
#define CONFIG_CMD_SATA
#define CONFIG_CMD_SDRAM
#elif defined(CONFIG_GLACIER)
-#define CONFIG_CMD_DATE
#define CONFIG_CMD_DTT
#define CONFIG_CMD_NAND
#define CONFIG_CMD_PCI
diff --git a/include/configs/charon.h b/include/configs/charon.h
index 578c1082283..913b707a5f8 100644
--- a/include/configs/charon.h
+++ b/include/configs/charon.h
@@ -24,7 +24,6 @@
/* defines special on charon board */
#undef CONFIG_RTC_MPC5200
-#undef CONFIG_CMD_DATE
#undef CUSTOM_ENV_SETTINGS
#define CUSTOM_ENV_SETTINGS \
diff --git a/include/configs/cm5200.h b/include/configs/cm5200.h
index 9d0cb52ba64..0073cb53736 100644
--- a/include/configs/cm5200.h
+++ b/include/configs/cm5200.h
@@ -21,7 +21,6 @@
/*
* Supported commands
*/
-#define CONFIG_CMD_DATE
#define CONFIG_CMD_JFFS2
#define CONFIG_CMD_REGINFO
diff --git a/include/configs/cyrus.h b/include/configs/cyrus.h
index dfeee513a47..904da1a8acc 100644
--- a/include/configs/cyrus.h
+++ b/include/configs/cyrus.h
@@ -239,7 +239,6 @@
#define CONFIG_SYS_I2C_MAC2_CHIP_ADDR 0x50
#define CONFIG_SYS_I2C_MAC2_DATA_ADDR 0xfa
-#define CONFIG_CMD_DATE 1
#define CONFIG_RTC_MCP79411 1
#define CONFIG_SYS_RTC_BUS_NUM 3
#define CONFIG_SYS_I2C_RTC_ADDR 0x6f
diff --git a/include/configs/digsy_mtc.h b/include/configs/digsy_mtc.h
index f08a485f926..2b56945dd93 100644
--- a/include/configs/digsy_mtc.h
+++ b/include/configs/digsy_mtc.h
@@ -85,7 +85,6 @@
/*
* Command line configuration.
*/
-#define CONFIG_CMD_DATE
#define CONFIG_CMD_EEPROM
#define CONFIG_CMD_IDE
#define CONFIG_CMD_IRQ
diff --git a/include/configs/dns325.h b/include/configs/dns325.h
index c907d82b552..9450b62e4a3 100644
--- a/include/configs/dns325.h
+++ b/include/configs/dns325.h
@@ -31,7 +31,6 @@
#define CONFIG_CMD_ENV
#define CONFIG_CMD_NAND
#define CONFIG_CMD_IDE
-#define CONFIG_CMD_DATE
#define CONFIG_SYS_MVFS
#define CONFIG_NR_DRAM_BANKS 1
diff --git a/include/configs/eb_cpu5282.h b/include/configs/eb_cpu5282.h
index edd948522e5..45ce944eb10 100644
--- a/include/configs/eb_cpu5282.h
+++ b/include/configs/eb_cpu5282.h
@@ -57,7 +57,6 @@
* Command line configuration.
*/
#define CONFIG_CMDLINE_EDITING
-#define CONFIG_CMD_DATE
#define CONFIG_MCFTMR
diff --git a/include/configs/edb93xx.h b/include/configs/edb93xx.h
index f012af547fc..2fc85983e0e 100644
--- a/include/configs/edb93xx.h
+++ b/include/configs/edb93xx.h
@@ -76,7 +76,6 @@
#define CONFIG_SYS_CLK_FREQ 14745600 /* EP93xx has a 14.7456 clock */
/* Monitor configuration */
-#undef CONFIG_CMD_DATE
#define CONFIG_CMD_JFFS2
#define CONFIG_SYS_LONGHELP /* Enable "long" help in mon */
diff --git a/include/configs/ethernut5.h b/include/configs/ethernut5.h
index 2ae39c04883..481051c9c6e 100644
--- a/include/configs/ethernut5.h
+++ b/include/configs/ethernut5.h
@@ -89,7 +89,6 @@
#define CONFIG_CMD_NAND
#ifndef MINIMAL_LOADER
-#define CONFIG_CMD_DATE
#define CONFIG_CMD_REISER
#define CONFIG_CMD_SAVES
#define CONFIG_CMD_UBIFS
diff --git a/include/configs/goflexhome.h b/include/configs/goflexhome.h
index f36f34040fc..f9bced3f8f2 100644
--- a/include/configs/goflexhome.h
+++ b/include/configs/goflexhome.h
@@ -46,7 +46,6 @@
#define CONFIG_CMD_ENV
#define CONFIG_CMD_NAND
#define CONFIG_CMD_IDE
-#define CONFIG_CMD_DATE
#define CONFIG_SYS_MVFS /* Picks up Filesystem from mv-common.h */
/*
diff --git a/include/configs/icon.h b/include/configs/icon.h
index b459366719c..3ad296be909 100644
--- a/include/configs/icon.h
+++ b/include/configs/icon.h
@@ -159,7 +159,6 @@
/*
* Commands additional to the ones defined in amcc-common.h
*/
-#define CONFIG_CMD_DATE
#define CONFIG_CMD_PCI
#define CONFIG_CMD_SDRAM
diff --git a/include/configs/ids8313.h b/include/configs/ids8313.h
index e2c2552e7c8..6b6bbbd5c02 100644
--- a/include/configs/ids8313.h
+++ b/include/configs/ids8313.h
@@ -413,7 +413,6 @@
* U-Boot environment setup
*/
#define CONFIG_CMD_NAND
-#define CONFIG_CMD_DATE
#define CONFIG_CMDLINE_EDITING
#define CONFIG_CMD_JFFS2
#define CONFIG_BOOTP_SUBNETMASK
diff --git a/include/configs/inka4x0.h b/include/configs/inka4x0.h
index c3e1cae6cb3..5ee9c2bcb48 100644
--- a/include/configs/inka4x0.h
+++ b/include/configs/inka4x0.h
@@ -72,7 +72,6 @@
/*
* Command line configuration.
*/
-#define CONFIG_CMD_DATE
#define CONFIG_CMD_IDE
#define CONFIG_CMD_PCI
diff --git a/include/configs/intip.h b/include/configs/intip.h
index 7f73b66b553..f1f840923b0 100644
--- a/include/configs/intip.h
+++ b/include/configs/intip.h
@@ -272,7 +272,6 @@
/*
* Commands additional to the ones defined in amcc-common.h
*/
-#define CONFIG_CMD_DATE
#define CONFIG_CMD_DTT
#define CONFIG_CMD_PCI
#define CONFIG_CMD_SDRAM
diff --git a/include/configs/ipek01.h b/include/configs/ipek01.h
index eb7ac91a8d2..aff4adf5d0d 100644
--- a/include/configs/ipek01.h
+++ b/include/configs/ipek01.h
@@ -88,7 +88,6 @@
/*
* Command line configuration.
*/
-#define CONFIG_CMD_DATE /* support for RTC, date/time...*/
#define CONFIG_CMD_IDE /* IDE harddisk support */
#define CONFIG_CMD_IRQ /* irqinfo */
#define CONFIG_CMD_PCI /* pciinfo */
diff --git a/include/configs/katmai.h b/include/configs/katmai.h
index f33bfd6f44e..3143b631ce9 100644
--- a/include/configs/katmai.h
+++ b/include/configs/katmai.h
@@ -170,7 +170,6 @@
/*
* Commands additional to the ones defined in amcc-common.h
*/
-#define CONFIG_CMD_DATE
#define CONFIG_CMD_ECCTEST
#define CONFIG_CMD_PCI
#define CONFIG_CMD_SDRAM
diff --git a/include/configs/kilauea.h b/include/configs/kilauea.h
index f89f0ce92d1..1f5c2ad2342 100644
--- a/include/configs/kilauea.h
+++ b/include/configs/kilauea.h
@@ -364,7 +364,6 @@
/*
* Commands additional to the ones defined in amcc-common.h
*/
-#define CONFIG_CMD_DATE
#define CONFIG_CMD_NAND
#define CONFIG_CMD_PCI
diff --git a/include/configs/ls1012aqds.h b/include/configs/ls1012aqds.h
index 5aaf3a7c6a4..8d7e54305d2 100644
--- a/include/configs/ls1012aqds.h
+++ b/include/configs/ls1012aqds.h
@@ -58,7 +58,6 @@
#define RTC
#define CONFIG_RTC_PCF8563 1
#define CONFIG_SYS_I2C_RTC_ADDR 0x51 /* Channel 3*/
-#define CONFIG_CMD_DATE
/* EEPROM */
#define CONFIG_ID_EEPROM
diff --git a/include/configs/ls2080aqds.h b/include/configs/ls2080aqds.h
index beacb997a3d..f50ad429172 100644
--- a/include/configs/ls2080aqds.h
+++ b/include/configs/ls2080aqds.h
@@ -329,7 +329,6 @@ unsigned long get_board_ddr_clk(void);
#define RTC
#define CONFIG_RTC_DS3231 1
#define CONFIG_SYS_I2C_RTC_ADDR 0x68
-#define CONFIG_CMD_DATE
/* EEPROM */
#define CONFIG_ID_EEPROM
diff --git a/include/configs/ls2080ardb.h b/include/configs/ls2080ardb.h
index 2155a89e360..d0bf5520b70 100644
--- a/include/configs/ls2080ardb.h
+++ b/include/configs/ls2080ardb.h
@@ -275,7 +275,6 @@ unsigned long get_board_sys_clk(void);
#define RTC
#define CONFIG_RTC_DS3231 1
#define CONFIG_SYS_I2C_RTC_ADDR 0x68
-#define CONFIG_CMD_DATE
/* EEPROM */
#define CONFIG_ID_EEPROM
diff --git a/include/configs/lwmon5.h b/include/configs/lwmon5.h
index 7e634140f9b..911192da7a1 100644
--- a/include/configs/lwmon5.h
+++ b/include/configs/lwmon5.h
@@ -382,7 +382,6 @@
/*
* Command line configuration.
*/
-#define CONFIG_CMD_DATE
#define CONFIG_CMD_EEPROM
#define CONFIG_CMD_IRQ
#define CONFIG_CMD_REGINFO
diff --git a/include/configs/m28evk.h b/include/configs/m28evk.h
index f3abdb187e2..f6fa599e6bf 100644
--- a/include/configs/m28evk.h
+++ b/include/configs/m28evk.h
@@ -16,7 +16,6 @@
/* U-Boot Commands */
#define CONFIG_FAT_WRITE
-#define CONFIG_CMD_DATE
#define CONFIG_CMD_EEPROM
#define CONFIG_CMD_NAND
#define CONFIG_CMD_NAND_TRIMFFS
diff --git a/include/configs/m53evk.h b/include/configs/m53evk.h
index 9731d4942da..d85de5fa17f 100644
--- a/include/configs/m53evk.h
+++ b/include/configs/m53evk.h
@@ -22,7 +22,6 @@
*/
#define CONFIG_FAT_WRITE
-#define CONFIG_CMD_DATE
#define CONFIG_CMD_NAND
#define CONFIG_CMD_NAND_TRIMFFS
#define CONFIG_CMD_SATA
diff --git a/include/configs/makalu.h b/include/configs/makalu.h
index 42fdb370a78..da5cfa19d33 100644
--- a/include/configs/makalu.h
+++ b/include/configs/makalu.h
@@ -232,7 +232,6 @@
/*
* Commands additional to the ones defined in amcc-common.h
*/
-#define CONFIG_CMD_DATE
#define CONFIG_CMD_DTT
#define CONFIG_CMD_PCI
diff --git a/include/configs/malta.h b/include/configs/malta.h
index 14298f56b9b..fcee37400d7 100644
--- a/include/configs/malta.h
+++ b/include/configs/malta.h
@@ -101,7 +101,6 @@
/*
* Commands
*/
-#define CONFIG_CMD_DATE
#define CONFIG_CMD_IDE
#define CONFIG_CMD_PCI
diff --git a/include/configs/mcx.h b/include/configs/mcx.h
index 7c93976790c..e4f2a02dcf2 100644
--- a/include/configs/mcx.h
+++ b/include/configs/mcx.h
@@ -89,7 +89,6 @@
/* commands to include */
#define CONFIG_CMD_JFFS2 /* JFFS2 Support */
-#define CONFIG_CMD_DATE
#define CONFIG_CMD_NAND /* NAND support */
#define CONFIG_CMD_UBIFS
#define CONFIG_RBTREE
diff --git a/include/configs/mecp5123.h b/include/configs/mecp5123.h
index dbb242696b1..1a9cb675dfb 100644
--- a/include/configs/mecp5123.h
+++ b/include/configs/mecp5123.h
@@ -289,7 +289,6 @@
#define CONFIG_CMD_REGINFO
#define CONFIG_CMD_EEPROM
-#define CONFIG_CMD_DATE
#undef CONFIG_CMD_FUSE
#undef CONFIG_CMD_IDE
#define CONFIG_CMD_JFFS2
diff --git a/include/configs/motionpro.h b/include/configs/motionpro.h
index ec4f8f5df0a..136db0dd260 100644
--- a/include/configs/motionpro.h
+++ b/include/configs/motionpro.h
@@ -33,7 +33,6 @@
/*
* Command line configuration.
*/
-#define CONFIG_CMD_DATE
#define CONFIG_CMD_DTT
#define CONFIG_CMD_EEPROM
#define CONFIG_CMD_IDE
diff --git a/include/configs/mpc5121ads.h b/include/configs/mpc5121ads.h
index 8aa9f327c98..dafb724e3fc 100644
--- a/include/configs/mpc5121ads.h
+++ b/include/configs/mpc5121ads.h
@@ -396,7 +396,6 @@
#define CONFIG_LOADS_ECHO 1 /* echo on for serial download */
#define CONFIG_SYS_LOADS_BAUD_CHANGE 1 /* allow baudrate change */
-#define CONFIG_CMD_DATE
#define CONFIG_CMD_EEPROM
#define CONFIG_CMD_IDE
#define CONFIG_CMD_JFFS2
diff --git a/include/configs/mv-plug-common.h b/include/configs/mv-plug-common.h
index 2e43fab1eff..83c559ed66d 100644
--- a/include/configs/mv-plug-common.h
+++ b/include/configs/mv-plug-common.h
@@ -28,7 +28,6 @@
/*
* Commands configuration
*/
-#define CONFIG_CMD_DATE
#define CONFIG_CMD_ENV
#define CONFIG_CMD_IDE
diff --git a/include/configs/mx25pdk.h b/include/configs/mx25pdk.h
index 4cee64da962..a11a491fe65 100644
--- a/include/configs/mx25pdk.h
+++ b/include/configs/mx25pdk.h
@@ -101,7 +101,6 @@
/* RTC */
#define CONFIG_RTC_IMXDI
-#define CONFIG_CMD_DATE
/* Ethernet Configs */
diff --git a/include/configs/mx28evk.h b/include/configs/mx28evk.h
index 1d2350e96c0..fac26fb2f23 100644
--- a/include/configs/mx28evk.h
+++ b/include/configs/mx28evk.h
@@ -17,7 +17,6 @@
/* U-Boot Commands */
-#define CONFIG_CMD_DATE
#define CONFIG_CMD_NAND
#define CONFIG_CMD_NAND_TRIMFFS
diff --git a/include/configs/mx31ads.h b/include/configs/mx31ads.h
index 6ab822e58b4..5db36775663 100644
--- a/include/configs/mx31ads.h
+++ b/include/configs/mx31ads.h
@@ -55,12 +55,6 @@
#define CONFIG_ENV_OVERWRITE
#define CONFIG_CONS_INDEX 1
-/***********************************************************
- * Command definition
- ***********************************************************/
-#define CONFIG_CMD_DATE
-
-
#define CONFIG_LOADADDR 0x80800000 /* loadaddr env var */
#define CONFIG_EXTRA_ENV_SETTINGS \
diff --git a/include/configs/mx31pdk.h b/include/configs/mx31pdk.h
index 920507007b0..e45649f566a 100644
--- a/include/configs/mx31pdk.h
+++ b/include/configs/mx31pdk.h
@@ -72,7 +72,6 @@
/***********************************************************
* Command definition
***********************************************************/
-#define CONFIG_CMD_DATE
#define CONFIG_CMD_NAND
diff --git a/include/configs/mx35pdk.h b/include/configs/mx35pdk.h
index 9683a6511a1..79d92bb06ad 100644
--- a/include/configs/mx35pdk.h
+++ b/include/configs/mx35pdk.h
@@ -80,7 +80,6 @@
#define CONFIG_CMD_NAND
#define CONFIG_NET_RETRY_COUNT 100
-#define CONFIG_CMD_DATE
#define CONFIG_LOADADDR 0x80800000 /* loadaddr env var */
diff --git a/include/configs/mx51evk.h b/include/configs/mx51evk.h
index 726d3c88f2e..dfd7ea9d453 100644
--- a/include/configs/mx51evk.h
+++ b/include/configs/mx51evk.h
@@ -95,13 +95,6 @@
#define CONFIG_ENV_OVERWRITE
#define CONFIG_CONS_INDEX 1
-/***********************************************************
- * Command definition
- ***********************************************************/
-
-#define CONFIG_CMD_DATE
-
-
#define CONFIG_ETHPRIME "FEC0"
#define CONFIG_LOADADDR 0x92000000 /* loadaddr env var */
diff --git a/include/configs/mx53evk.h b/include/configs/mx53evk.h
index 63bd80d6628..ac9beb60abd 100644
--- a/include/configs/mx53evk.h
+++ b/include/configs/mx53evk.h
@@ -55,8 +55,6 @@
#define IMX_FEC_BASE FEC_BASE_ADDR
#define CONFIG_FEC_MXC_PHYADDR 0x1F
-#define CONFIG_CMD_DATE
-
/* allow to overwrite serial and ethaddr */
#define CONFIG_ENV_OVERWRITE
#define CONFIG_CONS_INDEX 1
diff --git a/include/configs/nas220.h b/include/configs/nas220.h
index 476825ecf16..861cb5df57d 100644
--- a/include/configs/nas220.h
+++ b/include/configs/nas220.h
@@ -42,7 +42,6 @@
* Commands configuration
*/
#define CONFIG_CMD_NAND
-#define CONFIG_CMD_DATE
#define CONFIG_CMD_IDE
#define CONFIG_SYS_LONGHELP
#define CONFIG_AUTO_COMPLETE
diff --git a/include/configs/p1_p2_rdb_pc.h b/include/configs/p1_p2_rdb_pc.h
index 479f45db02c..d995d0448c5 100644
--- a/include/configs/p1_p2_rdb_pc.h
+++ b/include/configs/p1_p2_rdb_pc.h
@@ -815,7 +815,6 @@
* Command line configuration.
*/
#define CONFIG_CMD_IRQ
-#define CONFIG_CMD_DATE
#define CONFIG_CMD_REGINFO
/*
diff --git a/include/configs/pcm030.h b/include/configs/pcm030.h
index 87aa9dc988e..6d8a2338a29 100644
--- a/include/configs/pcm030.h
+++ b/include/configs/pcm030.h
@@ -49,7 +49,6 @@ Serial console configuration
/*
* Command line configuration.
*/
-#define CONFIG_CMD_DATE
#define CONFIG_CMD_EEPROM
#define CONFIG_CMD_JFFS2
#define CONFIG_CMD_PCI
diff --git a/include/configs/pcm052.h b/include/configs/pcm052.h
index f506c9c8df9..51b489a809b 100644
--- a/include/configs/pcm052.h
+++ b/include/configs/pcm052.h
@@ -86,7 +86,6 @@
#define CONFIG_SYS_I2C_MXC
/* RTC (actually an RV-4162 but M41T62-compatible) */
-#define CONFIG_CMD_DATE
#define CONFIG_RTC_M41T62
#define CONFIG_SYS_I2C_RTC_ADDR 0x68
#define CONFIG_SYS_RTC_BUS_NUM 2
diff --git a/include/configs/pdm360ng.h b/include/configs/pdm360ng.h
index 5d529988cd2..501611dde72 100644
--- a/include/configs/pdm360ng.h
+++ b/include/configs/pdm360ng.h
@@ -367,7 +367,6 @@
#define CONFIG_LOADS_ECHO 1 /* echo on for serial download */
#define CONFIG_SYS_LOADS_BAUD_CHANGE 1 /* allow baudrate change */
-#define CONFIG_CMD_DATE
#define CONFIG_CMD_EEPROM
#define CONFIG_CMD_REGINFO
diff --git a/include/configs/sandbox.h b/include/configs/sandbox.h
index c02d3060e1d..37c6132b8af 100644
--- a/include/configs/sandbox.h
+++ b/include/configs/sandbox.h
@@ -162,7 +162,6 @@
#define CONFIG_LZMA
#define CONFIG_CMD_LZMADEC
-#define CONFIG_CMD_DATE
#ifndef CONFIG_SPL_BUILD
#define CONFIG_CMD_IDE
diff --git a/include/configs/socrates.h b/include/configs/socrates.h
index a1098abbc03..76b4038d509 100644
--- a/include/configs/socrates.h
+++ b/include/configs/socrates.h
@@ -286,7 +286,6 @@
/*
* Command line configuration.
*/
-#define CONFIG_CMD_DATE
#define CONFIG_CMD_DTT
#undef CONFIG_CMD_EEPROM
#define CONFIG_CMD_SDRAM
diff --git a/include/configs/tbs2910.h b/include/configs/tbs2910.h
index c19840c485d..b4a14eae7c4 100644
--- a/include/configs/tbs2910.h
+++ b/include/configs/tbs2910.h
@@ -115,7 +115,6 @@
#endif /* CONFIG_CMD_USB */
/* RTC */
-#define CONFIG_CMD_DATE
#ifdef CONFIG_CMD_DATE
#define CONFIG_RTC_DS1307
#define CONFIG_SYS_RTC_BUS_NUM 2
diff --git a/include/configs/tqma6_wru4.h b/include/configs/tqma6_wru4.h
index a3784066595..b9cc5d632f0 100644
--- a/include/configs/tqma6_wru4.h
+++ b/include/configs/tqma6_wru4.h
@@ -34,7 +34,6 @@
#define CONFIG_SYS_I2C_RTC_ADDR 0x68
/* Turn off RTC square-wave output to save battery */
#define CONFIG_SYS_RTC_DS1337_NOOSC
-#define CONFIG_CMD_DATE
/* LED */
diff --git a/include/configs/v38b.h b/include/configs/v38b.h
index 8e3746f337a..cc0007827d4 100644
--- a/include/configs/v38b.h
+++ b/include/configs/v38b.h
@@ -77,7 +77,6 @@
#define CONFIG_CMD_IRQ
#define CONFIG_CMD_JFFS2
#define CONFIG_CMD_SDRAM
-#define CONFIG_CMD_DATE
#define CONFIG_TIMESTAMP /* Print image info with timestamp */
diff --git a/include/configs/vme8349.h b/include/configs/vme8349.h
index 738b13ddfb7..ae18bd63388 100644
--- a/include/configs/vme8349.h
+++ b/include/configs/vme8349.h
@@ -342,7 +342,6 @@
/*
* Command line configuration.
*/
-#define CONFIG_CMD_DATE
#define CONFIG_SYS_RTC_BUS_NUM 0x01
#define CONFIG_SYS_I2C_RTC_ADDR 0x32
#define CONFIG_RTC_RX8025
diff --git a/include/configs/walnut.h b/include/configs/walnut.h
index c48a6ae4457..d2d1ce95bcb 100644
--- a/include/configs/walnut.h
+++ b/include/configs/walnut.h
@@ -51,7 +51,6 @@
/*
* Commands additional to the ones defined in amcc-common.h
*/
-#define CONFIG_CMD_DATE
#define CONFIG_CMD_PCI
#define CONFIG_CMD_SDRAM
diff --git a/include/configs/woodburn_common.h b/include/configs/woodburn_common.h
index f546c385e9f..46a67061716 100644
--- a/include/configs/woodburn_common.h
+++ b/include/configs/woodburn_common.h
@@ -72,7 +72,6 @@
/*
* Command definition
*/
-#define CONFIG_CMD_DATE
#define CONFIG_BOOTP_SUBNETMASK
#define CONFIG_BOOTP_GATEWAY
#define CONFIG_BOOTP_DNS
diff --git a/include/configs/work_92105.h b/include/configs/work_92105.h
index b35ba55d535..82f4af9c938 100644
--- a/include/configs/work_92105.h
+++ b/include/configs/work_92105.h
@@ -82,7 +82,6 @@
* I2C RTC
*/
-#define CONFIG_CMD_DATE
#define CONFIG_RTC_DS1374
/*
diff --git a/include/configs/x600.h b/include/configs/x600.h
index cf68374d1f8..6e52e562226 100644
--- a/include/configs/x600.h
+++ b/include/configs/x600.h
@@ -107,7 +107,6 @@
/*
* Command support defines
*/
-#define CONFIG_CMD_DATE
#define CONFIG_CMD_ENV
#define CONFIG_CMD_FPGA_LOADMK
#define CONFIG_CMD_MTDPARTS
diff --git a/include/configs/x86-common.h b/include/configs/x86-common.h
index e422a970486..653a30d3bd0 100644
--- a/include/configs/x86-common.h
+++ b/include/configs/x86-common.h
@@ -70,7 +70,6 @@
/*-----------------------------------------------------------------------
* Command line configuration.
*/
-#define CONFIG_CMD_DATE
#define CONFIG_CMD_FPGA_LOADMK
#define CONFIG_CMD_IO
#define CONFIG_CMD_IRQ
diff --git a/include/configs/xpedite1000.h b/include/configs/xpedite1000.h
index ba8eebe4626..2a7a48d21d8 100644
--- a/include/configs/xpedite1000.h
+++ b/include/configs/xpedite1000.h
@@ -175,7 +175,6 @@ extern void out32(unsigned int, unsigned long);
/*
* Command configuration
*/
-#define CONFIG_CMD_DATE
#define CONFIG_CMD_EEPROM
#define CONFIG_CMD_IRQ
#define CONFIG_CMD_JFFS2
diff --git a/include/configs/xpedite517x.h b/include/configs/xpedite517x.h
index d0041489507..447fd9557a4 100644
--- a/include/configs/xpedite517x.h
+++ b/include/configs/xpedite517x.h
@@ -502,7 +502,6 @@ extern unsigned long get_board_sys_clk(unsigned long dummy);
/*
* Command configuration.
*/
-#define CONFIG_CMD_DATE
#define CONFIG_CMD_DS4510
#define CONFIG_CMD_DS4510_INFO
#define CONFIG_CMD_DTT
diff --git a/include/configs/xpedite520x.h b/include/configs/xpedite520x.h
index 696ac88c3fd..ffc0d009baf 100644
--- a/include/configs/xpedite520x.h
+++ b/include/configs/xpedite520x.h
@@ -287,7 +287,6 @@
/*
* Command configuration.
*/
-#define CONFIG_CMD_DATE
#define CONFIG_CMD_EEPROM
#define CONFIG_CMD_JFFS2
#define CONFIG_CMD_NAND
diff --git a/include/configs/xpedite537x.h b/include/configs/xpedite537x.h
index 9c48e5eaaa2..48f07b08c02 100644
--- a/include/configs/xpedite537x.h
+++ b/include/configs/xpedite537x.h
@@ -354,7 +354,6 @@ extern unsigned long get_board_ddr_clk(unsigned long dummy);
/*
* Command configuration.
*/
-#define CONFIG_CMD_DATE
#define CONFIG_CMD_DS4510
#define CONFIG_CMD_DS4510_INFO
#define CONFIG_CMD_DTT
diff --git a/include/configs/xpedite550x.h b/include/configs/xpedite550x.h
index f8a1f4badcc..2793a9bfb96 100644
--- a/include/configs/xpedite550x.h
+++ b/include/configs/xpedite550x.h
@@ -339,7 +339,6 @@ extern unsigned long get_board_ddr_clk(unsigned long dummy);
/*
* Command configuration.
*/
-#define CONFIG_CMD_DATE
#define CONFIG_CMD_DTT
#define CONFIG_CMD_EEPROM
#define CONFIG_CMD_JFFS2
--
GitLab
From 26d61195f87006f2d37915de7eee8bb0f537e8a0 Mon Sep 17 00:00:00 2001
From: Tom Rini <trini@konsulko.com>
Date: Fri, 28 Apr 2017 08:51:44 -0400
Subject: [PATCH 191/282] fdt: Move fdt_fixup_ethernet to a common place
With 3f66149d9fb4 we no longer have a common call fdt_fixup_ethernet.
This was fine to do on PowerPC as they largely had calls already in
ft_cpu_fixup. On ARM however we largely relied on this call. Rather
than introduce a large number of changes to ft_cpu_fixup /
ft_board_fixup we recognize that this is a common enough call that we
should be doing it in a central location. Do it early enough that we
can do any further updates in ft_cpu_fixup / ft_board_fixup.
Cc: Gerd Hoffmann <kraxel@redhat.com>
Cc: Chen-Yu Tsai <wens@csie.org>
Cc: Maxime Ripard <maxime.ripard@free-electrons.com>
Cc: Thomas Chou <thomas@wytron.com.tw> (maintainer:NIOS)
Cc: York Sun <york.sun@nxp.com> (maintainer:POWERPC MPC85XX)
Cc: Stefan Roese <sr@denx.de> (maintainer:POWERPC PPC4XX)
Cc: Simon Glass <sjg@chromium.org>
Cc: Joakim Tjernlund <Joakim.Tjernlund@infinera.com>
Fixes: 3f66149d9fb4 ("Remove extra fdt_fixup_ethernet() call")
Signed-off-by: Tom Rini <trini@konsulko.com>
Acked-by: Stefan Roese <sr@denx.de>
Acked-by: York Sun <york.sun@nxp.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
---
arch/arm/cpu/armv7/ls102xa/fdt.c | 2 --
arch/nios2/cpu/Makefile | 1 -
arch/nios2/cpu/fdt.c | 38 --------------------------------
arch/powerpc/cpu/mpc512x/cpu.c | 3 ---
arch/powerpc/cpu/mpc8260/cpu.c | 5 -----
arch/powerpc/cpu/mpc83xx/fdt.c | 1 -
arch/powerpc/cpu/mpc85xx/fdt.c | 2 --
arch/powerpc/cpu/mpc86xx/fdt.c | 5 -----
arch/powerpc/cpu/mpc8xx/fdt.c | 3 ---
arch/powerpc/cpu/ppc4xx/fdt.c | 6 -----
common/bootm_os.c | 2 --
common/image-fdt.c | 2 ++
configs/10m50_defconfig | 1 -
configs/3c120_defconfig | 1 -
14 files changed, 2 insertions(+), 70 deletions(-)
delete mode 100644 arch/nios2/cpu/fdt.c
diff --git a/arch/arm/cpu/armv7/ls102xa/fdt.c b/arch/arm/cpu/armv7/ls102xa/fdt.c
index ae5e794230c..d21ad39f8ad 100644
--- a/arch/arm/cpu/armv7/ls102xa/fdt.c
+++ b/arch/arm/cpu/armv7/ls102xa/fdt.c
@@ -94,8 +94,6 @@ void ft_cpu_setup(void *blob, bd_t *bd)
}
#endif
- fdt_fixup_ethernet(blob);
-
off = fdt_node_offset_by_prop_value(blob, -1, "device_type", "cpu", 4);
while (off != -FDT_ERR_NOTFOUND) {
val = gd->cpu_clk;
diff --git a/arch/nios2/cpu/Makefile b/arch/nios2/cpu/Makefile
index 185ca3cdb76..c859b46bf83 100644
--- a/arch/nios2/cpu/Makefile
+++ b/arch/nios2/cpu/Makefile
@@ -8,4 +8,3 @@
extra-y = start.o
obj-y = exceptions.o
obj-y += cpu.o interrupts.o traps.o
-obj-y += fdt.o
diff --git a/arch/nios2/cpu/fdt.c b/arch/nios2/cpu/fdt.c
deleted file mode 100644
index a44f51a7f2a..00000000000
--- a/arch/nios2/cpu/fdt.c
+++ /dev/null
@@ -1,38 +0,0 @@
-/*
- * (C) Copyright 2011, Missing Link Electronics
- * Joachim Foerster <joachim@missinglinkelectronics.com>
- *
- * Taken from arch/powerpc/cpu/ppc4xx/fdt.c:
- *
- * (C) Copyright 2007-2008
- * Stefan Roese, DENX Software Engineering, sr@denx.de.
- *
- * SPDX-License-Identifier: GPL-2.0+
- */
-
-#include <common.h>
-
-#ifdef CONFIG_OF_BOARD_SETUP
-#include <libfdt.h>
-#include <fdt_support.h>
-
-DECLARE_GLOBAL_DATA_PTR;
-
-int __ft_board_setup(void *blob, bd_t *bd)
-{
- ft_cpu_setup(blob, bd);
-
- return 0;
-}
-int ft_board_setup(void *blob, bd_t *bd)
- __attribute__((weak, alias("__ft_board_setup")));
-
-void ft_cpu_setup(void *blob, bd_t *bd)
-{
- /*
- * Fixup all ethernet nodes
- * Note: aliases in the dts are required for this
- */
- fdt_fixup_ethernet(blob);
-}
-#endif /* CONFIG_OF_BOARD_SETUP */
diff --git a/arch/powerpc/cpu/mpc512x/cpu.c b/arch/powerpc/cpu/mpc512x/cpu.c
index 4ee91e16f9c..ce524fcdc79 100644
--- a/arch/powerpc/cpu/mpc512x/cpu.c
+++ b/arch/powerpc/cpu/mpc512x/cpu.c
@@ -176,9 +176,6 @@ void ft_cpu_setup(void *blob, bd_t *bd)
old_ft_cpu_setup(blob, bd);
#endif
ft_clock_setup(blob, bd);
-#ifdef CONFIG_HAS_ETH0
- fdt_fixup_ethernet(blob);
-#endif
fdt_fixup_memory(blob, (u64)bd->bi_memstart, (u64)bd->bi_memsize);
}
#endif
diff --git a/arch/powerpc/cpu/mpc8260/cpu.c b/arch/powerpc/cpu/mpc8260/cpu.c
index 58d1c0261cb..7302b37f209 100644
--- a/arch/powerpc/cpu/mpc8260/cpu.c
+++ b/arch/powerpc/cpu/mpc8260/cpu.c
@@ -294,11 +294,6 @@ void watchdog_reset (void)
#ifdef CONFIG_OF_BOARD_SETUP
void ft_cpu_setup (void *blob, bd_t *bd)
{
-#if defined(CONFIG_HAS_ETH0) || defined(CONFIG_HAS_ETH1) ||\
- defined(CONFIG_HAS_ETH2) || defined(CONFIG_HAS_ETH3)
- fdt_fixup_ethernet(blob);
-#endif
-
do_fixup_by_compat_u32(blob, "fsl,cpm2-brg",
"clock-frequency", bd->bi_brgfreq, 1);
diff --git a/arch/powerpc/cpu/mpc83xx/fdt.c b/arch/powerpc/cpu/mpc83xx/fdt.c
index f249a585edf..3ac4eb1dd8f 100644
--- a/arch/powerpc/cpu/mpc83xx/fdt.c
+++ b/arch/powerpc/cpu/mpc83xx/fdt.c
@@ -53,7 +53,6 @@ void ft_cpu_setup(void *blob, bd_t *bd)
#if defined(CONFIG_HAS_ETH0) || defined(CONFIG_HAS_ETH1) ||\
defined(CONFIG_HAS_ETH2) || defined(CONFIG_HAS_ETH3) ||\
defined(CONFIG_HAS_ETH4) || defined(CONFIG_HAS_ETH5)
- fdt_fixup_ethernet(blob);
#ifdef CONFIG_MPC8313
/*
* mpc8313e erratum IPIC1 swapped TSEC interrupt ID numbers on rev. 1
diff --git a/arch/powerpc/cpu/mpc85xx/fdt.c b/arch/powerpc/cpu/mpc85xx/fdt.c
index 67140ba9ee1..a9ea947305f 100644
--- a/arch/powerpc/cpu/mpc85xx/fdt.c
+++ b/arch/powerpc/cpu/mpc85xx/fdt.c
@@ -612,8 +612,6 @@ void ft_cpu_setup(void *blob, bd_t *bd)
}
#endif
- fdt_fixup_ethernet(blob);
-
fdt_add_enet_stashing(blob);
#ifndef CONFIG_FSL_TBCLK_EXTRA_DIV
diff --git a/arch/powerpc/cpu/mpc86xx/fdt.c b/arch/powerpc/cpu/mpc86xx/fdt.c
index 5f9ad6b0b6d..30fbf14f1bd 100644
--- a/arch/powerpc/cpu/mpc86xx/fdt.c
+++ b/arch/powerpc/cpu/mpc86xx/fdt.c
@@ -32,11 +32,6 @@ void ft_cpu_setup(void *blob, bd_t *bd)
fdt_fixup_memory(blob, (u64)bd->bi_memstart, (u64)bd->bi_memsize);
-#if defined(CONFIG_HAS_ETH0) || defined(CONFIG_HAS_ETH1) \
- || defined(CONFIG_HAS_ETH2) || defined(CONFIG_HAS_ETH3)
- fdt_fixup_ethernet(blob);
-#endif
-
#ifdef CONFIG_SYS_NS16550
do_fixup_by_compat_u32(blob, "ns16550",
"clock-frequency", CONFIG_SYS_NS16550_CLK, 1);
diff --git a/arch/powerpc/cpu/mpc8xx/fdt.c b/arch/powerpc/cpu/mpc8xx/fdt.c
index 97830e3c8bd..34d36478d30 100644
--- a/arch/powerpc/cpu/mpc8xx/fdt.c
+++ b/arch/powerpc/cpu/mpc8xx/fdt.c
@@ -23,8 +23,5 @@ void ft_cpu_setup(void *blob, bd_t *bd)
do_fixup_by_compat_u32(blob, "fsl,cpm-brg", "clock-frequency",
gd->arch.brg_clk, 1);
- /* Fixup ethernet MAC addresses */
- fdt_fixup_ethernet(blob);
-
fdt_fixup_memory(blob, (u64)bd->bi_memstart, (u64)bd->bi_memsize);
}
diff --git a/arch/powerpc/cpu/ppc4xx/fdt.c b/arch/powerpc/cpu/ppc4xx/fdt.c
index c73509b3ee3..28080583a79 100644
--- a/arch/powerpc/cpu/ppc4xx/fdt.c
+++ b/arch/powerpc/cpu/ppc4xx/fdt.c
@@ -149,12 +149,6 @@ void ft_cpu_setup(void *blob, bd_t *bd)
(void *)&gd->arch.uart_clk, 4);
}
- /*
- * Fixup all ethernet nodes
- * Note: aliases in the dts are required for this
- */
- fdt_fixup_ethernet(blob);
-
/*
* Fixup all available PCIe nodes by setting the device_type property
*/
diff --git a/common/bootm_os.c b/common/bootm_os.c
index 6e463c317e8..e1024069766 100644
--- a/common/bootm_os.c
+++ b/common/bootm_os.c
@@ -288,8 +288,6 @@ void do_bootvx_fdt(bootm_headers_t *images)
if (ret)
return;
- fdt_fixup_ethernet(*of_flat_tree);
-
ret = fdt_add_subnode(*of_flat_tree, 0, "chosen");
if ((ret >= 0 || ret == -FDT_ERR_EXISTS)) {
bootline = getenv("bootargs");
diff --git a/common/image-fdt.c b/common/image-fdt.c
index 7468b902b8d..c6e8832d668 100644
--- a/common/image-fdt.c
+++ b/common/image-fdt.c
@@ -478,6 +478,8 @@ int image_setup_libfdt(bootm_headers_t *images, void *blob,
printf("ERROR: arch-specific fdt fixup failed\n");
goto err;
}
+ /* Update ethernet nodes */
+ fdt_fixup_ethernet(blob);
if (IMAGE_OF_BOARD_SETUP) {
fdt_ret = ft_board_setup(blob, gd->bd);
if (fdt_ret) {
diff --git a/configs/10m50_defconfig b/configs/10m50_defconfig
index 68da5ff1108..ed9a867d728 100644
--- a/configs/10m50_defconfig
+++ b/configs/10m50_defconfig
@@ -2,7 +2,6 @@ CONFIG_NIOS2=y
CONFIG_SYS_CONFIG_NAME="10m50_devboard"
CONFIG_DEFAULT_DEVICE_TREE="10m50_devboard"
CONFIG_FIT=y
-CONFIG_OF_BOARD_SETUP=y
CONFIG_SYS_CONSOLE_INFO_QUIET=y
CONFIG_VERSION_VARIABLE=y
CONFIG_HUSH_PARSER=y
diff --git a/configs/3c120_defconfig b/configs/3c120_defconfig
index 9adf97adb63..95e794afca8 100644
--- a/configs/3c120_defconfig
+++ b/configs/3c120_defconfig
@@ -2,7 +2,6 @@ CONFIG_NIOS2=y
CONFIG_SYS_CONFIG_NAME="3c120_devboard"
CONFIG_DEFAULT_DEVICE_TREE="3c120_devboard"
CONFIG_FIT=y
-CONFIG_OF_BOARD_SETUP=y
CONFIG_SYS_CONSOLE_INFO_QUIET=y
CONFIG_VERSION_VARIABLE=y
CONFIG_HUSH_PARSER=y
--
GitLab
From f73be5f1de969667e0e119d9aad0093ca98848b7 Mon Sep 17 00:00:00 2001
From: Fabio Estevam <fabio.estevam@nxp.com>
Date: Sat, 29 Apr 2017 19:01:57 -0300
Subject: [PATCH 192/282] warp7: MAINTAINERS: Add warp7_secure_defconfig entry
Add warp7_secure_defconfig entry to avoid the following warning:
WARNING: no maintainers for 'warp7_secure'
Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
---
board/warp7/MAINTAINERS | 1 +
1 file changed, 1 insertion(+)
diff --git a/board/warp7/MAINTAINERS b/board/warp7/MAINTAINERS
index 1d3ee292222..0fc9746606b 100644
--- a/board/warp7/MAINTAINERS
+++ b/board/warp7/MAINTAINERS
@@ -4,3 +4,4 @@ S: Maintained
F: board/warp7/
F: include/configs/warp7.h
F: configs/warp7_defconfig
+F: configs/warp7_secure_defconfig
--
GitLab
From 57ba664ebfee5e6f39edd51188d0465fab25b635 Mon Sep 17 00:00:00 2001
From: Tom Rini <trini@konsulko.com>
Date: Mon, 1 May 2017 11:34:12 -0400
Subject: [PATCH 193/282] scripts/config_whitelist.txt: Re-sync
Signed-off-by: Tom Rini <trini@konsulko.com>
---
scripts/config_whitelist.txt | 126 -----------------------------------
1 file changed, 126 deletions(-)
diff --git a/scripts/config_whitelist.txt b/scripts/config_whitelist.txt
index 5cd7103c0d6..ed349b9e6b2 100644
--- a/scripts/config_whitelist.txt
+++ b/scripts/config_whitelist.txt
@@ -70,7 +70,6 @@ CONFIG_ADNPESC1
CONFIG_ADP_AG101P
CONFIG_AEABI
CONFIG_AEMIF_CNTRL_BASE
-CONFIG_ALTERA_SDRAM
CONFIG_ALTERA_SPI_IDLE_VAL
CONFIG_ALTIVEC
CONFIG_ALT_LB_ADDR
@@ -82,7 +81,6 @@ CONFIG_AM335X_USB0_MODE
CONFIG_AM335X_USB1
CONFIG_AM335X_USB1_MODE
CONFIG_AM437X_USB2PHY2_HOST
-CONFIG_AMBAPP_IOAREA
CONFIG_AMCC_DEF_ENV
CONFIG_AMCC_DEF_ENV_NOR_UPD
CONFIG_AMCC_DEF_ENV_POWERPC
@@ -185,7 +183,6 @@ CONFIG_AT91SAM9XE
CONFIG_AT91SAM9_WATCHDOG
CONFIG_AT91_CAN
CONFIG_AT91_EFLASH
-CONFIG_AT91_GPIO
CONFIG_AT91_GPIO_PULLUP
CONFIG_AT91_HW_WDT_TIMEOUT
CONFIG_AT91_LED
@@ -196,7 +193,6 @@ CONFIG_ATI
CONFIG_ATI_RADEON_FB
CONFIG_ATM
CONFIG_ATMEL_DATAFLASH_SPI
-CONFIG_ATMEL_HLCD
CONFIG_ATMEL_LCD
CONFIG_ATMEL_LCD_BGR555
CONFIG_ATMEL_LCD_RGB565
@@ -222,7 +218,6 @@ CONFIG_BARIX_IPAM390
CONFIG_BAT_CMD
CONFIG_BAT_PAIR
CONFIG_BAT_RW
-CONFIG_BAUDRATE
CONFIG_BCH
CONFIG_BCH_CONST_M
CONFIG_BCH_CONST_PARAMS
@@ -233,10 +228,6 @@ CONFIG_BCM_SF2_ETH
CONFIG_BCM_SF2_ETH_DEFAULT_PORT
CONFIG_BCM_SF2_ETH_GMAC
CONFIG_BD_NUM_CPUS
-CONFIG_BFIN_ATA_MODE
-CONFIG_BFIN_MAC_PINS
-CONFIG_BFIN_NFC_BOOTROM_ECC
-CONFIG_BFIN_NFC_NO_HW_ECC
CONFIG_BIOSEMU
CONFIG_BITBANGMII_MULTI
CONFIG_BKUP_FLASH
@@ -393,7 +384,6 @@ CONFIG_CM922T_XA10
CONFIG_CMDLINE_EDITING
CONFIG_CMDLINE_PS_SUPPORT
CONFIG_CMDLINE_TAG
-CONFIG_CMD_DATE
CONFIG_CMD_DS4510
CONFIG_CMD_DS4510_INFO
CONFIG_CMD_DS4510_MEM
@@ -440,11 +430,7 @@ CONFIG_CMD_MAX6957
CONFIG_CMD_MEM
CONFIG_CMD_MFSL
CONFIG_CMD_MMC_SPI
-CONFIG_CMD_MTDPARTS
CONFIG_CMD_MTDPARTS_SPREAD
-CONFIG_CMD_NAND_LOCK_UNLOCK
-CONFIG_CMD_NAND_TORTURE
-CONFIG_CMD_NAND_TRIMFFS
CONFIG_CMD_ONENAND
CONFIG_CMD_PCA953X
CONFIG_CMD_PCA953X_INFO
@@ -473,7 +459,6 @@ CONFIG_CMD_TFTP
CONFIG_CMD_THOR_DOWNLOAD
CONFIG_CMD_TRACE
CONFIG_CMD_TSI148
-CONFIG_CMD_UBIFS
CONFIG_CMD_UNIVERSE
CONFIG_CMD_UUID
CONFIG_CMD_ZBOOT
@@ -518,7 +503,6 @@ CONFIG_CORTINA_FW_LENGTH
CONFIG_CPCI405
CONFIG_CPCI405_6U
CONFIG_CPCI405_VER2
-CONFIG_CPCI_AX2000
CONFIG_CPLD_BR_PRELIM
CONFIG_CPLD_OR_PRELIM
CONFIG_CPM2
@@ -584,7 +568,6 @@ CONFIG_DA850_EVM_MAX_CPU_CLK
CONFIG_DA850_LOWLEVEL
CONFIG_DA8XX_GPIO
CONFIG_DASA_SIM
-CONFIG_DATA
CONFIG_DAVINCI_SPI
CONFIG_DBAU1000
CONFIG_DBAU1X00
@@ -634,7 +617,6 @@ CONFIG_DEEP_SLEEP
CONFIG_DEFAULT
CONFIG_DEFAULT_CONSOLE
CONFIG_DEFAULT_IMMR
-CONFIG_DEFAULT_KERNEL_COMMAND_LINE
CONFIG_DEFAULT_OMAP_RESET_TIME_MAX_USEC
CONFIG_DEFAULT_SPI_BUS
CONFIG_DEFAULT_SPI_CS
@@ -688,7 +670,6 @@ CONFIG_DRAM_TIMINGS_
CONFIG_DRIVER_AT91EMAC
CONFIG_DRIVER_AT91EMAC_PHYADDR
CONFIG_DRIVER_AT91EMAC_QUIET
-CONFIG_DRIVER_AX88180
CONFIG_DRIVER_AX88796L
CONFIG_DRIVER_DM9000
CONFIG_DRIVER_EP93XX_MAC
@@ -718,7 +699,6 @@ CONFIG_DTT_DS620
CONFIG_DTT_HYSTERESIS
CONFIG_DTT_LM63
CONFIG_DTT_LM75
-CONFIG_DTT_LM81
CONFIG_DTT_MAX_TEMP
CONFIG_DTT_MIN_TEMP
CONFIG_DTT_PWM_LOOKUPTABLE
@@ -788,8 +768,6 @@ CONFIG_EDB93XX_SDCS2
CONFIG_EDB93XX_SDCS3
CONFIG_EEPRO100
CONFIG_EEPRO100_SROM_WRITE
-CONFIG_EEPROM_BUS_ADDRESS
-CONFIG_EEPROM_CHIP_ADDRESS
CONFIG_EEPROM_LAYOUT_HELP_STRING
CONFIG_EFLASH_PROTSECTORS
CONFIG_EHCI_DESC_BIG_ENDIAN
@@ -830,18 +808,13 @@ CONFIG_ENV_IS_IN_DATAFLASH
CONFIG_ENV_IS_IN_EEPROM
CONFIG_ENV_IS_IN_FAT
CONFIG_ENV_IS_IN_FLASH
-CONFIG_ENV_IS_IN_MMC
CONFIG_ENV_IS_IN_MRAM
-CONFIG_ENV_IS_IN_NAND
CONFIG_ENV_IS_IN_NVRAM
CONFIG_ENV_IS_IN_ONENAND
CONFIG_ENV_IS_IN_REMOTE
CONFIG_ENV_IS_IN_SPI_FLASH
-CONFIG_ENV_IS_IN_UBI
-CONFIG_ENV_IS_NOWHERE
CONFIG_ENV_MAX_ENTRIES
CONFIG_ENV_MIN_ENTRIES
-CONFIG_ENV_OFFSET
CONFIG_ENV_OFFSET_OOB
CONFIG_ENV_OFFSET_REDUND
CONFIG_ENV_OVERWRITE
@@ -854,7 +827,6 @@ CONFIG_ENV_SETTINGS_NAND_V1
CONFIG_ENV_SETTINGS_NAND_V2
CONFIG_ENV_SETTINGS_V1
CONFIG_ENV_SETTINGS_V2
-CONFIG_ENV_SIZE
CONFIG_ENV_SIZE_FLEX
CONFIG_ENV_SIZE_REDUND
CONFIG_ENV_SPI_BASE
@@ -866,8 +838,6 @@ CONFIG_ENV_SROM_BANK
CONFIG_ENV_TOTAL_SIZE
CONFIG_ENV_UBIFS_OPTION
CONFIG_ENV_UBI_MTD
-CONFIG_ENV_UBI_PART
-CONFIG_ENV_UBI_VOLUME
CONFIG_ENV_UBI_VOLUME_REDUND
CONFIG_ENV_VARS_UBOOT_CONFIG
CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
@@ -916,10 +886,8 @@ CONFIG_EXTRA_ENV_BOARD_SETTINGS
CONFIG_EXTRA_ENV_ITB
CONFIG_EXTRA_ENV_KS2_BOARD_SETTINGS
CONFIG_EXTRA_ENV_SETTINGS
-CONFIG_EXTRA_ENV_SETTINGS_BASE
CONFIG_EXTRA_ENV_SETTINGS_COMMON
CONFIG_EXTRA_ENV_SETTINGS_DEVEL
-CONFIG_EXTRA_ENV_SETTINGS_SELECT
CONFIG_EXTRA_ENV_UNLOCK
CONFIG_EXTRA_ENV_USBTTY
CONFIG_EXT_AHB2AHB_BASE
@@ -990,7 +958,6 @@ CONFIG_FIXED_SDHCI_ALIGNED_BUFFER
CONFIG_FLASHBOOTCOMMAND
CONFIG_FLASHCARD
CONFIG_FLASH_16BIT
-CONFIG_FLASH_8BIT
CONFIG_FLASH_BASE
CONFIG_FLASH_BR_PRELIM
CONFIG_FLASH_CFI_DRIVER
@@ -1141,7 +1108,6 @@ CONFIG_FZOTG266HD0A_BASE
CONFIG_GATEWAYIP
CONFIG_GCOV_KERNEL
CONFIG_GCOV_PROFILE_ALL
-CONFIG_GENERIC_ATMEL_MCI
CONFIG_GICV2
CONFIG_GICV3
CONFIG_GLOBAL_DATA_NOT_REG10
@@ -1158,11 +1124,6 @@ CONFIG_GPIO_ENABLE_SPI_FLASH
CONFIG_GPIO_LED_INVERTED_TABLE
CONFIG_GPIO_LED_STUBS
CONFIG_GREEN_LED
-CONFIG_GRETH
-CONFIG_GRETH_10MBIT
-CONFIG_GRSIM
-CONFIG_GRXC3S1500
-CONFIG_GR_EP2S60
CONFIG_GURNARD_FPGA
CONFIG_GURNARD_SPLASH
CONFIG_GZIP
@@ -1625,10 +1586,6 @@ CONFIG_LCD_ROTATION
CONFIG_LD9040
CONFIG_LEGACY
CONFIG_LEGACY_BOOTCMD_ENV
-CONFIG_LEON_RAM_SDRAM
-CONFIG_LEON_RAM_SDRAM_NOSRAM
-CONFIG_LEON_RAM_SELECT
-CONFIG_LEON_RAM_SRAM
CONFIG_LG4573
CONFIG_LG4573_BUS
CONFIG_LG4573_CS
@@ -1683,7 +1640,6 @@ CONFIG_LWMON5
CONFIG_LXT971_NO_SLEEP
CONFIG_LYNXKDI
CONFIG_LZMA
-CONFIG_LZO
CONFIG_M41T94_SPI_CS
CONFIG_M520x
CONFIG_M52277EVB
@@ -1718,7 +1674,6 @@ CONFIG_MACH_SHEEVAPLUG
CONFIG_MACH_SPECIFIC
CONFIG_MACH_TYPE
CONFIG_MACH_TYPE_COMPAT_REV
-CONFIG_MACPWR
CONFIG_MACRESET_TIMEOUT
CONFIG_MAC_ADDR_IN_EEPROM
CONFIG_MAC_ADDR_IN_SPIFLASH
@@ -1891,8 +1846,6 @@ CONFIG_MTD_UBI_MODULE
CONFIG_MULTI_CS
CONFIG_MUNICES
CONFIG_MUSB_HOST
-CONFIG_MV88E61XX_CPU_PORT
-CONFIG_MV88E61XX_PHY_PORTS
CONFIG_MVEBU_MMC
CONFIG_MVGBE
CONFIG_MVGBE_PORTS
@@ -2151,7 +2104,6 @@ CONFIG_PHY_ADDR
CONFIG_PHY_BASE_ADR
CONFIG_PHY_BCM5421S
CONFIG_PHY_CLK_FREQ
-CONFIG_PHY_CLOCK_FREQ
CONFIG_PHY_CMD_DELAY
CONFIG_PHY_DYNAMIC_ANEG
CONFIG_PHY_ET1011C_TX_CLK_FIX
@@ -2349,7 +2301,6 @@ CONFIG_RAM_BOOT
CONFIG_RAM_BOOT_PHYS
CONFIG_RANDOM_UUID
CONFIG_RAPIDIO
-CONFIG_RBTREE
CONFIG_RCAR_BOARD_STRING
CONFIG_RD_LVL
CONFIG_REALMODE_DEBUG
@@ -2362,7 +2313,6 @@ CONFIG_REG_2
CONFIG_REG_3
CONFIG_REG_8
CONFIG_REG_APER_SIZE
-CONFIG_RELOC_GOT_SKIP_NULL
CONFIG_REMAKE_ELF
CONFIG_REQ
CONFIG_RESERVED_01_BASE
@@ -2379,7 +2329,6 @@ CONFIG_REV1
CONFIG_REV3
CONFIG_REVISION_TAG
CONFIG_RFSPART
-CONFIG_RGMII
CONFIG_RIO
CONFIG_RMII
CONFIG_RMOBILE_BOARD_STRING
@@ -2472,7 +2421,6 @@ CONFIG_SAR2_REG
CONFIG_SAR_REG
CONFIG_SATA1
CONFIG_SATA2
-CONFIG_SATAPWR
CONFIG_SATA_DWC
CONFIG_SATA_MV
CONFIG_SATA_SIL
@@ -2620,7 +2568,6 @@ CONFIG_SMC911X_16_BIT
CONFIG_SMC911X_32_BIT
CONFIG_SMC911X_BASE
CONFIG_SMC911X_NO_EEPROM
-CONFIG_SMC_91111_EXT_PHY
CONFIG_SMC_AUTONEG_TIMEOUT
CONFIG_SMC_USE_32_BIT
CONFIG_SMC_USE_IOFUNCS
@@ -2663,12 +2610,6 @@ CONFIG_SOC_KEYSTONE
CONFIG_SOC_OMAP3430
CONFIG_SOFT_I2C_GPIO_SCL
CONFIG_SOFT_I2C_GPIO_SDA
-CONFIG_SOFT_I2C_I2C10_SCL
-CONFIG_SOFT_I2C_I2C10_SDA
-CONFIG_SOFT_I2C_I2C5_SCL
-CONFIG_SOFT_I2C_I2C5_SDA
-CONFIG_SOFT_I2C_I2C9_SCL
-CONFIG_SOFT_I2C_I2C9_SDA
CONFIG_SOFT_I2C_READ_REPEATED_START
CONFIG_SOFT_SPI
CONFIG_SOFT_TWS
@@ -2722,7 +2663,6 @@ CONFIG_SPLASH_SCREEN_ALIGN
CONFIG_SPLASH_SOURCE
CONFIG_SPLL_FREQ
CONFIG_SPL_
-CONFIG_SPL_ABORT_ON_RAW_IMAGE
CONFIG_SPL_AM33XX_ENABLE_RTC32K_OSC
CONFIG_SPL_ATMEL_SIZE
CONFIG_SPL_BOARD_INIT
@@ -2856,7 +2796,6 @@ CONFIG_STV0991
CONFIG_STV0991_HZ
CONFIG_STV0991_HZ_CLOCK
CONFIG_ST_SMI
-CONFIG_SUN4
CONFIG_SUNXI_AHCI
CONFIG_SUNXI_EMAC
CONFIG_SUNXI_GMAC
@@ -3013,7 +2952,6 @@ CONFIG_SYS_BOOT_EEPROM_PAGE_WRITE_BITS
CONFIG_SYS_BOOT_GET_CMDLINE
CONFIG_SYS_BOOT_GET_KBD
CONFIG_SYS_BOOT_RAMDISK_HIGH
-CONFIG_SYS_BOOT_SPINOR
CONFIG_SYS_BR0_64M
CONFIG_SYS_BR0_8M
CONFIG_SYS_BR0_PRELIM
@@ -3504,7 +3442,6 @@ CONFIG_SYS_DIMM_SLOTS_PER_CTLR
CONFIG_SYS_DIRECT_FLASH_NFS
CONFIG_SYS_DIRECT_FLASH_TFTP
CONFIG_SYS_DISCOVER_PHY
-CONFIG_SYS_DISPLAY_BASE
CONFIG_SYS_DISP_CHR_RAM
CONFIG_SYS_DIU_ADDR
CONFIG_SYS_DM36x_PINMUX0
@@ -3672,7 +3609,6 @@ CONFIG_SYS_FLASH_BR_PRELIM
CONFIG_SYS_FLASH_CFI
CONFIG_SYS_FLASH_CFI_AMD_RESET
CONFIG_SYS_FLASH_CFI_BROKEN_TABLE
-CONFIG_SYS_FLASH_CFI_BYPASS_READ
CONFIG_SYS_FLASH_CFI_NONBLOCK
CONFIG_SYS_FLASH_CFI_WIDTH
CONFIG_SYS_FLASH_CHECKSUM
@@ -4057,7 +3993,6 @@ CONFIG_SYS_FSL_SFP_VER_3_0
CONFIG_SYS_FSL_SFP_VER_3_2
CONFIG_SYS_FSL_SFP_VER_3_4
CONFIG_SYS_FSL_SINGLE_SOURCE_CLK
-CONFIG_SYS_FSL_SNVS_LE
CONFIG_SYS_FSL_SRDS_3
CONFIG_SYS_FSL_SRDS_4
CONFIG_SYS_FSL_SRDS_NUM_PLLS
@@ -4139,7 +4074,6 @@ CONFIG_SYS_GAFR3_L_VAL
CONFIG_SYS_GAFR3_U_VAL
CONFIG_SYS_GBIT_MII1_BUSNAME
CONFIG_SYS_GBIT_MII_BUSNAME
-CONFIG_SYS_GBL_DATA_ADDR
CONFIG_SYS_GBL_DATA_OFFSET
CONFIG_SYS_GBL_DATA_SIZE
CONFIG_SYS_GENERIC_BOARD
@@ -4239,7 +4173,6 @@ CONFIG_SYS_GPIO_STARTUP_FINISHED_N
CONFIG_SYS_GPIO_SYSMON_STATUS
CONFIG_SYS_GPIO_TCR
CONFIG_SYS_GPIO_WATCHDOG
-CONFIG_SYS_GPIO_WIDTH
CONFIG_SYS_GPR1
CONFIG_SYS_GPSR0_VAL
CONFIG_SYS_GPSR1_VAL
@@ -4248,50 +4181,7 @@ CONFIG_SYS_GPSR3_VAL
CONFIG_SYS_GPS_PORT_CONFIG
CONFIG_SYS_GPS_PORT_CONFIG_1
CONFIG_SYS_GPS_PORT_CONFIG_2
-CONFIG_SYS_GRLIB_APBUART_INDEX
-CONFIG_SYS_GRLIB_ESA_MCTRL1
-CONFIG_SYS_GRLIB_ESA_MCTRL1_CFG1
-CONFIG_SYS_GRLIB_ESA_MCTRL1_CFG2
-CONFIG_SYS_GRLIB_ESA_MCTRL1_CFG3
-CONFIG_SYS_GRLIB_ESA_MCTRL2
-CONFIG_SYS_GRLIB_ESA_MCTRL2_CFG1
-CONFIG_SYS_GRLIB_ESA_MCTRL2_CFG2
-CONFIG_SYS_GRLIB_ESA_MCTRL2_CFG3
-CONFIG_SYS_GRLIB_GAISLER_DDR2SPA1
-CONFIG_SYS_GRLIB_GAISLER_DDR2SPA1_CFG1
-CONFIG_SYS_GRLIB_GAISLER_DDR2SPA1_CFG3
-CONFIG_SYS_GRLIB_GAISLER_DDR2SPA1_CFG4
-CONFIG_SYS_GRLIB_GAISLER_DDR2SPA2
-CONFIG_SYS_GRLIB_GAISLER_DDR2SPA2_CFG1
-CONFIG_SYS_GRLIB_GAISLER_DDR2SPA2_CFG3
-CONFIG_SYS_GRLIB_GAISLER_DDR2SPA2_CFG4
-CONFIG_SYS_GRLIB_GAISLER_DDRSPA1
-CONFIG_SYS_GRLIB_GAISLER_DDRSPA1_CTRL
-CONFIG_SYS_GRLIB_GAISLER_DDRSPA2
-CONFIG_SYS_GRLIB_GAISLER_DDRSPA2_CTRL
-CONFIG_SYS_GRLIB_GAISLER_FTMCTRL1
-CONFIG_SYS_GRLIB_GAISLER_FTMCTRL1_CFG1
-CONFIG_SYS_GRLIB_GAISLER_FTMCTRL1_CFG2
-CONFIG_SYS_GRLIB_GAISLER_FTMCTRL1_CFG3
-CONFIG_SYS_GRLIB_GAISLER_FTMCTRL2
-CONFIG_SYS_GRLIB_GAISLER_FTMCTRL2_CFG1
-CONFIG_SYS_GRLIB_GAISLER_FTMCTRL2_CFG2
-CONFIG_SYS_GRLIB_GAISLER_FTMCTRL2_CFG3
-CONFIG_SYS_GRLIB_GAISLER_SDCTRL1
-CONFIG_SYS_GRLIB_GAISLER_SDCTRL1_CTRL
-CONFIG_SYS_GRLIB_GAISLER_SDCTRL2
-CONFIG_SYS_GRLIB_GAISLER_SDCTRL2_CTRL
-CONFIG_SYS_GRLIB_GPTIMER_INDEX
-CONFIG_SYS_GRLIB_GRETH_INDEX
-CONFIG_SYS_GRLIB_GRETH_PHYADDR
-CONFIG_SYS_GRLIB_GRUSB_INDEX
-CONFIG_SYS_GRLIB_MEMCFG1
-CONFIG_SYS_GRLIB_MEMCFG2
-CONFIG_SYS_GRLIB_MEMCFG3
-CONFIG_SYS_GRLIB_SDRAM
-CONFIG_SYS_GRLIB_SINGLE_BUS
CONFIG_SYS_HALT_BEFOR_RAM_JUMP
-CONFIG_SYS_HAS_NO_CACHE
CONFIG_SYS_HELP_CMD_WIDTH
CONFIG_SYS_HID0_FINAL
CONFIG_SYS_HID0_INIT
@@ -4712,7 +4602,6 @@ CONFIG_SYS_LOW_RES_TIMER
CONFIG_SYS_LPAE_SDRAM_BASE
CONFIG_SYS_LPC32XX_UART
CONFIG_SYS_LS1_DDR_BLOCK1_SIZE
-CONFIG_SYS_LS2_DDR_BLOCK1_SIZE
CONFIG_SYS_LS_MC_AIOP_IMG_MAX_LENGTH
CONFIG_SYS_LS_MC_BOOT_TIMEOUT_MS
CONFIG_SYS_LS_MC_DPC_ADDR
@@ -4738,7 +4627,6 @@ CONFIG_SYS_MACB3_BASE
CONFIG_SYS_MAIN_PWR_ON
CONFIG_SYS_MALLOC_BASE
CONFIG_SYS_MALLOC_CLEAR_ON_INIT
-CONFIG_SYS_MALLOC_END
CONFIG_SYS_MALLOC_LEN
CONFIG_SYS_MALLOC_SIMPLE
CONFIG_SYS_MAMR
@@ -5192,7 +5080,6 @@ CONFIG_SYS_OMAP_ABE_SYSCK
CONFIG_SYS_ONENAND_BASE
CONFIG_SYS_ONENAND_BLOCK_SIZE
CONFIG_SYS_ONENAND_PAGE_SIZE
-CONFIG_SYS_OPENRISC_TMR_HZ
CONFIG_SYS_OPER_FLASH
CONFIG_SYS_OR0_64M
CONFIG_SYS_OR0_8M
@@ -5653,8 +5540,6 @@ CONFIG_SYS_PPC_DDR_WIMGE
CONFIG_SYS_PQSPAR
CONFIG_SYS_PRELIM_OR_AM
CONFIG_SYS_PROMPT_HUSH_PS2
-CONFIG_SYS_PROM_OFFSET
-CONFIG_SYS_PROM_SIZE
CONFIG_SYS_PSC1
CONFIG_SYS_PSC3
CONFIG_SYS_PSC4
@@ -5695,7 +5580,6 @@ CONFIG_SYS_R7780MP_OLD_FLASH
CONFIG_SYS_RAMBOOT
CONFIG_SYS_RAM_BASE
CONFIG_SYS_RAM_CS
-CONFIG_SYS_RAM_END
CONFIG_SYS_RAM_FREQ_DIV
CONFIG_SYS_RAM_SIZE
CONFIG_SYS_RCAR_I2C0_BASE
@@ -5710,8 +5594,6 @@ CONFIG_SYS_RCCR
CONFIG_SYS_RCWH_PCIHOST
CONFIG_SYS_READ_SPD
CONFIG_SYS_REDUNDAND_ENVIRONMENT
-CONFIG_SYS_RELOC_MONITOR_BASE
-CONFIG_SYS_RELOC_MONITOR_MAX_END
CONFIG_SYS_REMAP_OR_AM
CONFIG_SYS_RESET_ADDR
CONFIG_SYS_RESET_ADDRESS
@@ -5857,7 +5739,6 @@ CONFIG_SYS_SDRAM_CTRL
CONFIG_SYS_SDRAM_DRVSTRENGTH
CONFIG_SYS_SDRAM_DRV_STRENGTH
CONFIG_SYS_SDRAM_EMOD
-CONFIG_SYS_SDRAM_END
CONFIG_SYS_SDRAM_LDF
CONFIG_SYS_SDRAM_LIST
CONFIG_SYS_SDRAM_LOWER
@@ -5995,7 +5876,6 @@ CONFIG_SYS_SPL_MALLOC_START
CONFIG_SYS_SPL_MAX_LEN
CONFIG_SYS_SPR
CONFIG_SYS_SRAM_BASE
-CONFIG_SYS_SRAM_END
CONFIG_SYS_SRAM_SIZE
CONFIG_SYS_SRAM_START
CONFIG_SYS_SRGPL0_CFG_BAR
@@ -6021,7 +5901,6 @@ CONFIG_SYS_SSD_BASE
CONFIG_SYS_SSD_BASE_PHYS
CONFIG_SYS_SST_SECT
CONFIG_SYS_SST_SECTSZ
-CONFIG_SYS_STACK_LENGTH
CONFIG_SYS_STACK_SIZE
CONFIG_SYS_STATUS_C
CONFIG_SYS_STATUS_OK
@@ -6040,7 +5919,6 @@ CONFIG_SYS_TEXT_BASE_NOR
CONFIG_SYS_TEXT_BASE_SPL
CONFIG_SYS_TFP410_ADDR
CONFIG_SYS_TFP410_BUS
-CONFIG_SYS_THUMB_BUILD
CONFIG_SYS_TIMERBASE
CONFIG_SYS_TIMER_BASE
CONFIG_SYS_TIMER_COUNTER
@@ -6069,8 +5947,6 @@ CONFIG_SYS_UART2_ALT1_GPIO
CONFIG_SYS_UART2_ALT3_GPIO
CONFIG_SYS_UART2_PRI_GPIO
CONFIG_SYS_UART_BASE
-CONFIG_SYS_UART_BAUD
-CONFIG_SYS_UART_FREQ
CONFIG_SYS_UART_PORT
CONFIG_SYS_UBOOT_BASE
CONFIG_SYS_UBOOT_END
@@ -6325,7 +6201,6 @@ CONFIG_TSEC_ENET
CONFIG_TSEC_TBI
CONFIG_TSEC_TBICR_SETTINGS
CONFIG_TSI108_ETH_NUM_PORTS
-CONFIG_TSIM
CONFIG_TUGE1
CONFIG_TULIP
CONFIG_TULIP_FIX_DAVICOM
@@ -6548,7 +6423,6 @@ CONFIG_VE8313
CONFIG_VERY_BIG_RAM
CONFIG_VEXPRESS_EXTENDED_MEMORY_MAP
CONFIG_VEXPRESS_ORIGINAL_MEMORY_MAP
-CONFIG_VF610
CONFIG_VID
CONFIG_VIDEO_BCM2835
CONFIG_VIDEO_BMP_GZIP
--
GitLab
From 2681e78a5ee0e3d6d45abc195c81d1c527fcea0b Mon Sep 17 00:00:00 2001
From: Tom Rini <trini@konsulko.com>
Date: Mon, 1 May 2017 11:41:11 -0400
Subject: [PATCH 194/282] configs: Re-sync
Signed-off-by: Tom Rini <trini@konsulko.com>
---
configs/A10-OLinuXino-Lime_defconfig | 5 +---
configs/A20-OLinuXino-Lime2_defconfig | 5 +---
configs/A20-OLinuXino-Lime_defconfig | 5 +---
configs/A20-OLinuXino_MICRO_defconfig | 5 +---
configs/C29XPCIE_NAND_defconfig | 6 ++---
configs/CHIP_defconfig | 1 -
configs/CHIP_pro_defconfig | 3 +--
configs/LicheePi_Zero_defconfig | 2 --
.../Nintendo_NES_Classic_Edition_defconfig | 1 -
configs/P1010RDB-PA_36BIT_NAND_defconfig | 6 ++---
configs/P1010RDB-PA_NAND_defconfig | 6 ++---
configs/P1010RDB-PB_36BIT_NAND_defconfig | 6 ++---
configs/P1010RDB-PB_NAND_defconfig | 6 ++---
configs/P1020RDB-PC_36BIT_NAND_defconfig | 6 ++---
configs/P1020RDB-PC_NAND_defconfig | 6 ++---
configs/P1020RDB-PD_NAND_defconfig | 6 ++---
configs/P1021RDB-PC_36BIT_NAND_defconfig | 6 ++---
configs/P1021RDB-PC_NAND_defconfig | 6 ++---
configs/P1022DS_36BIT_NAND_defconfig | 6 ++---
configs/P1022DS_NAND_defconfig | 6 ++---
configs/P1024RDB_NAND_defconfig | 6 ++---
configs/P1025RDB_NAND_defconfig | 6 ++---
configs/P2020RDB-PC_36BIT_NAND_defconfig | 6 ++---
configs/P2020RDB-PC_NAND_defconfig | 6 ++---
configs/Sunchip_CX-A99_defconfig | 2 --
configs/ap143_defconfig | 1 -
configs/arches_defconfig | 2 +-
configs/canyonlands_defconfig | 2 +-
configs/colibri_vf_defconfig | 5 ++--
configs/dragonboard410c_defconfig | 2 +-
configs/evb-rk3288_defconfig | 1 -
configs/evb-rk3328_defconfig | 4 ----
configs/evb-rk3399_defconfig | 24 +++++++------------
configs/fennec-rk3288_defconfig | 1 -
configs/firefly-rk3288_defconfig | 1 -
configs/glacier_defconfig | 2 +-
configs/glacier_ramboot_defconfig | 2 +-
configs/gwventana_emmc_defconfig | 4 ++--
configs/gwventana_gw5904_defconfig | 4 ++--
configs/gwventana_nand_defconfig | 6 ++---
configs/imx6ul_isiot_emmc_defconfig | 10 ++++----
configs/imx6ul_isiot_mmc_defconfig | 10 ++++----
configs/imx6ul_isiot_nand_defconfig | 12 +++++-----
configs/k2e_evm_defconfig | 2 +-
configs/k2e_hs_evm_defconfig | 2 --
configs/k2g_evm_defconfig | 2 +-
configs/k2g_hs_evm_defconfig | 4 +---
configs/k2hk_evm_defconfig | 2 +-
configs/k2hk_hs_evm_defconfig | 2 --
configs/k2l_evm_defconfig | 2 +-
configs/ls1012ardb_qspi_SECURE_BOOT_defconfig | 17 +++++++------
configs/ls1021aqds_ddr4_nor_defconfig | 2 +-
configs/ls1021aqds_ddr4_nor_lpuart_defconfig | 2 +-
configs/ls1021aqds_nand_defconfig | 2 +-
configs/ls1021aqds_nor_SECURE_BOOT_defconfig | 2 +-
configs/ls1021aqds_nor_defconfig | 2 +-
configs/ls1021aqds_nor_lpuart_defconfig | 2 +-
configs/ls1021aqds_qspi_defconfig | 2 +-
configs/ls1021aqds_sdcard_ifc_defconfig | 2 +-
configs/ls1021aqds_sdcard_qspi_defconfig | 2 +-
configs/ls1021atwr_nor_SECURE_BOOT_defconfig | 2 +-
configs/ls1021atwr_nor_defconfig | 2 +-
configs/ls1021atwr_nor_lpuart_defconfig | 2 +-
configs/ls1021atwr_qspi_defconfig | 2 +-
...s1021atwr_sdcard_ifc_SECURE_BOOT_defconfig | 2 +-
configs/ls1021atwr_sdcard_ifc_defconfig | 2 +-
configs/ls1021atwr_sdcard_qspi_defconfig | 2 +-
configs/ls1043aqds_defconfig | 1 -
configs/ls1043aqds_lpuart_defconfig | 1 -
configs/ls1043aqds_nand_defconfig | 3 +--
configs/ls1043aqds_nor_ddr3_defconfig | 1 -
configs/ls1043aqds_qspi_defconfig | 1 -
configs/ls1043aqds_sdcard_ifc_defconfig | 3 +--
configs/ls1043aqds_sdcard_qspi_defconfig | 3 +--
configs/ls1043ardb_SECURE_BOOT_defconfig | 3 +--
configs/ls1043ardb_nand_SECURE_BOOT_defconfig | 13 +++++-----
configs/ls1043ardb_nand_defconfig | 3 +--
.../ls1043ardb_sdcard_SECURE_BOOT_defconfig | 11 ++++-----
configs/ls1043ardb_sdcard_defconfig | 3 +--
configs/ls1046aqds_SECURE_BOOT_defconfig | 2 +-
configs/ls1046aqds_defconfig | 3 +--
configs/ls1046aqds_lpuart_defconfig | 3 +--
configs/ls1046aqds_nand_defconfig | 3 +--
configs/ls1046aqds_qspi_defconfig | 3 +--
configs/ls1046aqds_sdcard_ifc_defconfig | 3 +--
configs/ls1046aqds_sdcard_qspi_defconfig | 3 +--
configs/ls1046ardb_emmc_defconfig | 3 +--
configs/ls1046ardb_qspi_SECURE_BOOT_defconfig | 2 +-
.../ls1046ardb_sdcard_SECURE_BOOT_defconfig | 9 ++++---
configs/ls1046ardb_sdcard_defconfig | 3 +--
configs/miqi-rk3288_defconfig | 1 -
configs/mvebu_db-88f3720_defconfig | 6 ++---
configs/mvebu_espressobin-88f3720_defconfig | 6 ++---
configs/mvebu_mcbin-88f8040_defconfig | 9 ++++---
configs/mx7ulp_evk_defconfig | 15 ++++++------
configs/mx7ulp_evk_plugin_defconfig | 16 ++++++-------
configs/odroid-c2_defconfig | 3 +--
configs/opos6uldev_defconfig | 6 ++---
configs/orangepi_pc2_defconfig | 6 ++---
configs/popmetal-rk3288_defconfig | 1 -
configs/puma-rk3399_defconfig | 5 +---
configs/sama5d3_xplained_nandflash_defconfig | 4 ++--
configs/sama5d4_xplained_mmc_defconfig | 6 ++---
configs/sama5d4_xplained_nandflash_defconfig | 6 ++---
configs/sama5d4ek_mmc_defconfig | 5 ++--
configs/sama5d4ek_nandflash_defconfig | 5 ++--
configs/sama5d4ek_spiflash_defconfig | 1 -
configs/sandbox_defconfig | 4 ++--
configs/sandbox_noblk_defconfig | 4 ++--
configs/sandbox_spl_defconfig | 4 ++--
configs/sh7752evb_defconfig | 2 +-
configs/sh7753evb_defconfig | 2 +-
configs/sh7757lcr_defconfig | 2 +-
configs/socfpga_arria5_defconfig | 4 +---
configs/socfpga_cyclone5_defconfig | 4 +---
configs/socfpga_de0_nano_soc_defconfig | 4 +---
configs/socfpga_de10_nano_defconfig | 2 +-
configs/socfpga_de1_soc_defconfig | 2 +-
configs/socfpga_sockit_defconfig | 2 +-
configs/socfpga_socrates_defconfig | 2 +-
configs/socfpga_sr1500_defconfig | 2 +-
configs/stm32f746-disco_defconfig | 8 +++----
configs/tinker-rk3288_defconfig | 1 -
configs/trats2_defconfig | 4 ++--
configs/trats_defconfig | 2 +-
configs/vf610twr_defconfig | 1 -
configs/vf610twr_nand_defconfig | 1 -
127 files changed, 220 insertions(+), 304 deletions(-)
diff --git a/configs/A10-OLinuXino-Lime_defconfig b/configs/A10-OLinuXino-Lime_defconfig
index 50cd9e16748..ec16a44fbd6 100644
--- a/configs/A10-OLinuXino-Lime_defconfig
+++ b/configs/A10-OLinuXino-Lime_defconfig
@@ -5,6 +5,7 @@ CONFIG_DRAM_CLK=480
CONFIG_DRAM_EMR1=4
CONFIG_SYS_CLK_FREQ=912000000
CONFIG_MMC0_CD_PIN="PH1"
+CONFIG_I2C1_ENABLE=y
CONFIG_SATAPWR="PC3"
CONFIG_DEFAULT_DEVICE_TREE="sun4i-a10-olinuxino-lime"
CONFIG_AHCI=y
@@ -14,10 +15,6 @@ CONFIG_SPL_I2C_SUPPORT=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
# CONFIG_CMD_FPGA is not set
-CONFIG_NET_ETHADDR_EEPROM=y
-CONFIG_NET_ETHADDR_EEPROM_I2C=y
-CONFIG_NET_ETHADDR_EEPROM_I2C_BUS=1
-CONFIG_I2C1_ENABLE=y
# CONFIG_SPL_DOS_PARTITION is not set
# CONFIG_SPL_ISO_PARTITION is not set
# CONFIG_SPL_EFI_PARTITION is not set
diff --git a/configs/A20-OLinuXino-Lime2_defconfig b/configs/A20-OLinuXino-Lime2_defconfig
index 427b7c313a0..1f2daa67069 100644
--- a/configs/A20-OLinuXino-Lime2_defconfig
+++ b/configs/A20-OLinuXino-Lime2_defconfig
@@ -5,6 +5,7 @@ CONFIG_DRAM_CLK=384
CONFIG_MMC0_CD_PIN="PH1"
CONFIG_USB0_VBUS_PIN="PC17"
CONFIG_USB0_VBUS_DET="PH5"
+CONFIG_I2C1_ENABLE=y
CONFIG_SATAPWR="PC3"
CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-olinuxino-lime2"
CONFIG_AHCI=y
@@ -21,10 +22,6 @@ CONFIG_CMD_USB_MASS_STORAGE=y
# CONFIG_SPL_PARTITION_UUIDS is not set
CONFIG_DFU_RAM=y
CONFIG_ETH_DESIGNWARE=y
-CONFIG_NET_ETHADDR_EEPROM=y
-CONFIG_NET_ETHADDR_EEPROM_I2C=y
-CONFIG_NET_ETHADDR_EEPROM_I2C_BUS=1
-CONFIG_I2C1_ENABLE=y
CONFIG_RGMII=y
CONFIG_SUN7I_GMAC=y
CONFIG_AXP_ALDO3_VOLT=2800
diff --git a/configs/A20-OLinuXino-Lime_defconfig b/configs/A20-OLinuXino-Lime_defconfig
index 285f1ac85b5..7f63d4af54a 100644
--- a/configs/A20-OLinuXino-Lime_defconfig
+++ b/configs/A20-OLinuXino-Lime_defconfig
@@ -3,6 +3,7 @@ CONFIG_ARCH_SUNXI=y
CONFIG_MACH_SUN7I=y
CONFIG_DRAM_CLK=384
CONFIG_MMC0_CD_PIN="PH1"
+CONFIG_I2C1_ENABLE=y
CONFIG_SATAPWR="PC3"
CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-olinuxino-lime"
CONFIG_AHCI=y
@@ -16,10 +17,6 @@ CONFIG_SPL_I2C_SUPPORT=y
# CONFIG_SPL_ISO_PARTITION is not set
# CONFIG_SPL_EFI_PARTITION is not set
CONFIG_ETH_DESIGNWARE=y
-CONFIG_NET_ETHADDR_EEPROM=y
-CONFIG_NET_ETHADDR_EEPROM_I2C=y
-CONFIG_NET_ETHADDR_EEPROM_I2C_BUS=1
-CONFIG_I2C1_ENABLE=y
CONFIG_SUN7I_GMAC=y
CONFIG_AXP_ALDO3_VOLT=2800
CONFIG_AXP_ALDO4_VOLT=2800
diff --git a/configs/A20-OLinuXino_MICRO_defconfig b/configs/A20-OLinuXino_MICRO_defconfig
index 4aab6409d2f..89e87e799b1 100644
--- a/configs/A20-OLinuXino_MICRO_defconfig
+++ b/configs/A20-OLinuXino_MICRO_defconfig
@@ -5,6 +5,7 @@ CONFIG_DRAM_CLK=384
CONFIG_MMC0_CD_PIN="PH1"
CONFIG_MMC3_CD_PIN="PH11"
CONFIG_MMC_SUNXI_SLOT_EXTRA=3
+CONFIG_I2C1_ENABLE=y
CONFIG_VIDEO_VGA=y
CONFIG_SATAPWR="PB8"
CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-olinuxino-micro"
@@ -19,10 +20,6 @@ CONFIG_SPL_I2C_SUPPORT=y
# CONFIG_SPL_ISO_PARTITION is not set
# CONFIG_SPL_EFI_PARTITION is not set
CONFIG_ETH_DESIGNWARE=y
-CONFIG_NET_ETHADDR_EEPROM=y
-CONFIG_NET_ETHADDR_EEPROM_I2C=y
-CONFIG_NET_ETHADDR_EEPROM_I2C_BUS=1
-CONFIG_I2C1_ENABLE=y
CONFIG_SUN7I_GMAC=y
CONFIG_AXP_ALDO3_VOLT=2800
CONFIG_AXP_ALDO4_VOLT=2800
diff --git a/configs/C29XPCIE_NAND_defconfig b/configs/C29XPCIE_NAND_defconfig
index fa0556800fb..88964b30bde 100644
--- a/configs/C29XPCIE_NAND_defconfig
+++ b/configs/C29XPCIE_NAND_defconfig
@@ -1,5 +1,8 @@
CONFIG_PPC=y
CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_TPL_LIBCOMMON_SUPPORT=y
+CONFIG_TPL_LIBGENERIC_SUPPORT=y
+CONFIG_TPL_SERIAL_SUPPORT=y
CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
CONFIG_SPL_NAND_SUPPORT=y
CONFIG_MPC85xx=y
@@ -15,10 +18,7 @@ CONFIG_SPL=y
CONFIG_TPL=y
CONFIG_TPL_ENV_SUPPORT=y
CONFIG_TPL_I2C_SUPPORT=y
-CONFIG_TPL_LIBCOMMON_SUPPORT=y
-CONFIG_TPL_LIBGENERIC_SUPPORT=y
CONFIG_TPL_MPC8XXX_INIT_DDR_SUPPORT=y
-CONFIG_TPL_SERIAL_SUPPORT=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_SF=y
CONFIG_CMD_I2C=y
diff --git a/configs/CHIP_defconfig b/configs/CHIP_defconfig
index 3e8bc1631d5..9b9e0b7e627 100644
--- a/configs/CHIP_defconfig
+++ b/configs/CHIP_defconfig
@@ -1,6 +1,5 @@
CONFIG_ARM=y
CONFIG_ARCH_SUNXI=y
-# CONFIG_SPL_MMC_SUPPORT is not set
CONFIG_MACH_SUN5I=y
CONFIG_DRAM_TIMINGS_DDR3_800E_1066G_1333J=y
CONFIG_USB0_VBUS_PIN="PB10"
diff --git a/configs/CHIP_pro_defconfig b/configs/CHIP_pro_defconfig
index 78fdb0e7d8e..52572bd0555 100644
--- a/configs/CHIP_pro_defconfig
+++ b/configs/CHIP_pro_defconfig
@@ -1,7 +1,5 @@
CONFIG_ARM=y
CONFIG_ARCH_SUNXI=y
-CONFIG_SPL_I2C_SUPPORT=y
-# CONFIG_SPL_MMC_SUPPORT is not set
CONFIG_SPL_NAND_SUPPORT=y
CONFIG_MACH_SUN5I=y
CONFIG_DRAM_TIMINGS_DDR3_800E_1066G_1333J=y
@@ -12,6 +10,7 @@ CONFIG_ENV_IS_IN_UBI=y
CONFIG_ENV_UBI_PART="UBI"
CONFIG_ENV_UBI_VOLUME="uboot-env"
CONFIG_SPL=y
+CONFIG_SPL_I2C_SUPPORT=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_LOADB is not set
# CONFIG_CMD_LOADS is not set
diff --git a/configs/LicheePi_Zero_defconfig b/configs/LicheePi_Zero_defconfig
index c1470848495..887997bd4fd 100644
--- a/configs/LicheePi_Zero_defconfig
+++ b/configs/LicheePi_Zero_defconfig
@@ -4,8 +4,6 @@ CONFIG_MACH_SUN8I_V3S=y
CONFIG_DRAM_CLK=360
CONFIG_DRAM_ZQ=14779
CONFIG_DEFAULT_DEVICE_TREE="sun8i-v3s-licheepi-zero"
-# CONFIG_CONSOLE_MUX is not set
-CONFIG_SPL=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
# CONFIG_CMD_FPGA is not set
diff --git a/configs/Nintendo_NES_Classic_Edition_defconfig b/configs/Nintendo_NES_Classic_Edition_defconfig
index 133d82bdc00..5f91c351c3b 100644
--- a/configs/Nintendo_NES_Classic_Edition_defconfig
+++ b/configs/Nintendo_NES_Classic_Edition_defconfig
@@ -1,6 +1,5 @@
CONFIG_ARM=y
CONFIG_ARCH_SUNXI=y
-# CONFIG_SPL_MMC_SUPPORT is not set
CONFIG_MACH_SUN8I_A33=y
CONFIG_DRAM_CLK=600
CONFIG_DRAM_ZQ=15291
diff --git a/configs/P1010RDB-PA_36BIT_NAND_defconfig b/configs/P1010RDB-PA_36BIT_NAND_defconfig
index 469cdbbf36a..fb8ccd8ec46 100644
--- a/configs/P1010RDB-PA_36BIT_NAND_defconfig
+++ b/configs/P1010RDB-PA_36BIT_NAND_defconfig
@@ -1,5 +1,8 @@
CONFIG_PPC=y
CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_TPL_LIBCOMMON_SUPPORT=y
+CONFIG_TPL_LIBGENERIC_SUPPORT=y
+CONFIG_TPL_SERIAL_SUPPORT=y
CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
CONFIG_SPL_NAND_SUPPORT=y
CONFIG_MPC85xx=y
@@ -17,10 +20,7 @@ CONFIG_SPL=y
CONFIG_TPL=y
CONFIG_TPL_ENV_SUPPORT=y
CONFIG_TPL_I2C_SUPPORT=y
-CONFIG_TPL_LIBCOMMON_SUPPORT=y
-CONFIG_TPL_LIBGENERIC_SUPPORT=y
CONFIG_TPL_MPC8XXX_INIT_DDR_SUPPORT=y
-CONFIG_TPL_SERIAL_SUPPORT=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
diff --git a/configs/P1010RDB-PA_NAND_defconfig b/configs/P1010RDB-PA_NAND_defconfig
index 77b4b9437fd..81a083edb3b 100644
--- a/configs/P1010RDB-PA_NAND_defconfig
+++ b/configs/P1010RDB-PA_NAND_defconfig
@@ -1,5 +1,8 @@
CONFIG_PPC=y
CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_TPL_LIBCOMMON_SUPPORT=y
+CONFIG_TPL_LIBGENERIC_SUPPORT=y
+CONFIG_TPL_SERIAL_SUPPORT=y
CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
CONFIG_SPL_NAND_SUPPORT=y
CONFIG_MPC85xx=y
@@ -16,10 +19,7 @@ CONFIG_SPL=y
CONFIG_TPL=y
CONFIG_TPL_ENV_SUPPORT=y
CONFIG_TPL_I2C_SUPPORT=y
-CONFIG_TPL_LIBCOMMON_SUPPORT=y
-CONFIG_TPL_LIBGENERIC_SUPPORT=y
CONFIG_TPL_MPC8XXX_INIT_DDR_SUPPORT=y
-CONFIG_TPL_SERIAL_SUPPORT=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
diff --git a/configs/P1010RDB-PB_36BIT_NAND_defconfig b/configs/P1010RDB-PB_36BIT_NAND_defconfig
index 36d9b1652df..93bd550cff7 100644
--- a/configs/P1010RDB-PB_36BIT_NAND_defconfig
+++ b/configs/P1010RDB-PB_36BIT_NAND_defconfig
@@ -1,5 +1,8 @@
CONFIG_PPC=y
CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_TPL_LIBCOMMON_SUPPORT=y
+CONFIG_TPL_LIBGENERIC_SUPPORT=y
+CONFIG_TPL_SERIAL_SUPPORT=y
CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
CONFIG_SPL_NAND_SUPPORT=y
CONFIG_MPC85xx=y
@@ -17,10 +20,7 @@ CONFIG_SPL=y
CONFIG_TPL=y
CONFIG_TPL_ENV_SUPPORT=y
CONFIG_TPL_I2C_SUPPORT=y
-CONFIG_TPL_LIBCOMMON_SUPPORT=y
-CONFIG_TPL_LIBGENERIC_SUPPORT=y
CONFIG_TPL_MPC8XXX_INIT_DDR_SUPPORT=y
-CONFIG_TPL_SERIAL_SUPPORT=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
diff --git a/configs/P1010RDB-PB_NAND_defconfig b/configs/P1010RDB-PB_NAND_defconfig
index 0a81999547c..f238caee152 100644
--- a/configs/P1010RDB-PB_NAND_defconfig
+++ b/configs/P1010RDB-PB_NAND_defconfig
@@ -1,5 +1,8 @@
CONFIG_PPC=y
CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_TPL_LIBCOMMON_SUPPORT=y
+CONFIG_TPL_LIBGENERIC_SUPPORT=y
+CONFIG_TPL_SERIAL_SUPPORT=y
CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
CONFIG_SPL_NAND_SUPPORT=y
CONFIG_MPC85xx=y
@@ -16,11 +19,8 @@ CONFIG_SPL=y
CONFIG_TPL=y
CONFIG_TPL_ENV_SUPPORT=y
CONFIG_TPL_I2C_SUPPORT=y
-CONFIG_TPL_LIBCOMMON_SUPPORT=y
-CONFIG_TPL_LIBGENERIC_SUPPORT=y
CONFIG_TPL_MPC8XXX_INIT_DDR_SUPPORT=y
CONFIG_TPL_NAND_SUPPORT=y
-CONFIG_TPL_SERIAL_SUPPORT=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
diff --git a/configs/P1020RDB-PC_36BIT_NAND_defconfig b/configs/P1020RDB-PC_36BIT_NAND_defconfig
index d04f3dd26a1..4b94619350c 100644
--- a/configs/P1020RDB-PC_36BIT_NAND_defconfig
+++ b/configs/P1020RDB-PC_36BIT_NAND_defconfig
@@ -1,5 +1,8 @@
CONFIG_PPC=y
CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_TPL_LIBCOMMON_SUPPORT=y
+CONFIG_TPL_LIBGENERIC_SUPPORT=y
+CONFIG_TPL_SERIAL_SUPPORT=y
CONFIG_SPL_NAND_SUPPORT=y
CONFIG_MPC85xx=y
CONFIG_TARGET_P1020RDB_PC=y
@@ -15,10 +18,7 @@ CONFIG_SPL=y
CONFIG_TPL=y
CONFIG_TPL_ENV_SUPPORT=y
CONFIG_TPL_I2C_SUPPORT=y
-CONFIG_TPL_LIBCOMMON_SUPPORT=y
-CONFIG_TPL_LIBGENERIC_SUPPORT=y
CONFIG_TPL_MPC8XXX_INIT_DDR_SUPPORT=y
-CONFIG_TPL_SERIAL_SUPPORT=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
diff --git a/configs/P1020RDB-PC_NAND_defconfig b/configs/P1020RDB-PC_NAND_defconfig
index e99890ce914..c817ff38fc3 100644
--- a/configs/P1020RDB-PC_NAND_defconfig
+++ b/configs/P1020RDB-PC_NAND_defconfig
@@ -1,5 +1,8 @@
CONFIG_PPC=y
CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_TPL_LIBCOMMON_SUPPORT=y
+CONFIG_TPL_LIBGENERIC_SUPPORT=y
+CONFIG_TPL_SERIAL_SUPPORT=y
CONFIG_SPL_NAND_SUPPORT=y
CONFIG_MPC85xx=y
CONFIG_TARGET_P1020RDB_PC=y
@@ -14,10 +17,7 @@ CONFIG_SPL=y
CONFIG_TPL=y
CONFIG_TPL_ENV_SUPPORT=y
CONFIG_TPL_I2C_SUPPORT=y
-CONFIG_TPL_LIBCOMMON_SUPPORT=y
-CONFIG_TPL_LIBGENERIC_SUPPORT=y
CONFIG_TPL_MPC8XXX_INIT_DDR_SUPPORT=y
-CONFIG_TPL_SERIAL_SUPPORT=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
diff --git a/configs/P1020RDB-PD_NAND_defconfig b/configs/P1020RDB-PD_NAND_defconfig
index 56e874630b8..698d362835e 100644
--- a/configs/P1020RDB-PD_NAND_defconfig
+++ b/configs/P1020RDB-PD_NAND_defconfig
@@ -1,5 +1,8 @@
CONFIG_PPC=y
CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_TPL_LIBCOMMON_SUPPORT=y
+CONFIG_TPL_LIBGENERIC_SUPPORT=y
+CONFIG_TPL_SERIAL_SUPPORT=y
CONFIG_SPL_NAND_SUPPORT=y
CONFIG_MPC85xx=y
CONFIG_TARGET_P1020RDB_PD=y
@@ -14,10 +17,7 @@ CONFIG_SPL=y
CONFIG_TPL=y
CONFIG_TPL_ENV_SUPPORT=y
CONFIG_TPL_I2C_SUPPORT=y
-CONFIG_TPL_LIBCOMMON_SUPPORT=y
-CONFIG_TPL_LIBGENERIC_SUPPORT=y
CONFIG_TPL_MPC8XXX_INIT_DDR_SUPPORT=y
-CONFIG_TPL_SERIAL_SUPPORT=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
diff --git a/configs/P1021RDB-PC_36BIT_NAND_defconfig b/configs/P1021RDB-PC_36BIT_NAND_defconfig
index de7188866ee..034db7d95e1 100644
--- a/configs/P1021RDB-PC_36BIT_NAND_defconfig
+++ b/configs/P1021RDB-PC_36BIT_NAND_defconfig
@@ -1,5 +1,8 @@
CONFIG_PPC=y
CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_TPL_LIBCOMMON_SUPPORT=y
+CONFIG_TPL_LIBGENERIC_SUPPORT=y
+CONFIG_TPL_SERIAL_SUPPORT=y
CONFIG_SPL_NAND_SUPPORT=y
CONFIG_MPC85xx=y
CONFIG_TARGET_P1021RDB=y
@@ -15,10 +18,7 @@ CONFIG_SPL=y
CONFIG_TPL=y
CONFIG_TPL_ENV_SUPPORT=y
CONFIG_TPL_I2C_SUPPORT=y
-CONFIG_TPL_LIBCOMMON_SUPPORT=y
-CONFIG_TPL_LIBGENERIC_SUPPORT=y
CONFIG_TPL_MPC8XXX_INIT_DDR_SUPPORT=y
-CONFIG_TPL_SERIAL_SUPPORT=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
diff --git a/configs/P1021RDB-PC_NAND_defconfig b/configs/P1021RDB-PC_NAND_defconfig
index 126cfc9b9ff..a31cc06d079 100644
--- a/configs/P1021RDB-PC_NAND_defconfig
+++ b/configs/P1021RDB-PC_NAND_defconfig
@@ -1,5 +1,8 @@
CONFIG_PPC=y
CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_TPL_LIBCOMMON_SUPPORT=y
+CONFIG_TPL_LIBGENERIC_SUPPORT=y
+CONFIG_TPL_SERIAL_SUPPORT=y
CONFIG_SPL_NAND_SUPPORT=y
CONFIG_MPC85xx=y
CONFIG_TARGET_P1021RDB=y
@@ -14,10 +17,7 @@ CONFIG_SPL=y
CONFIG_TPL=y
CONFIG_TPL_ENV_SUPPORT=y
CONFIG_TPL_I2C_SUPPORT=y
-CONFIG_TPL_LIBCOMMON_SUPPORT=y
-CONFIG_TPL_LIBGENERIC_SUPPORT=y
CONFIG_TPL_MPC8XXX_INIT_DDR_SUPPORT=y
-CONFIG_TPL_SERIAL_SUPPORT=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
diff --git a/configs/P1022DS_36BIT_NAND_defconfig b/configs/P1022DS_36BIT_NAND_defconfig
index dd43517690b..77436fefd51 100644
--- a/configs/P1022DS_36BIT_NAND_defconfig
+++ b/configs/P1022DS_36BIT_NAND_defconfig
@@ -1,5 +1,8 @@
CONFIG_PPC=y
CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_TPL_LIBCOMMON_SUPPORT=y
+CONFIG_TPL_LIBGENERIC_SUPPORT=y
+CONFIG_TPL_SERIAL_SUPPORT=y
CONFIG_SPL_NAND_SUPPORT=y
CONFIG_MPC85xx=y
CONFIG_TARGET_P1022DS=y
@@ -15,10 +18,7 @@ CONFIG_SPL=y
CONFIG_TPL=y
CONFIG_TPL_ENV_SUPPORT=y
CONFIG_TPL_I2C_SUPPORT=y
-CONFIG_TPL_LIBCOMMON_SUPPORT=y
-CONFIG_TPL_LIBGENERIC_SUPPORT=y
CONFIG_TPL_MPC8XXX_INIT_DDR_SUPPORT=y
-CONFIG_TPL_SERIAL_SUPPORT=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
diff --git a/configs/P1022DS_NAND_defconfig b/configs/P1022DS_NAND_defconfig
index d4bd7620acb..f02457fac1c 100644
--- a/configs/P1022DS_NAND_defconfig
+++ b/configs/P1022DS_NAND_defconfig
@@ -1,5 +1,8 @@
CONFIG_PPC=y
CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_TPL_LIBCOMMON_SUPPORT=y
+CONFIG_TPL_LIBGENERIC_SUPPORT=y
+CONFIG_TPL_SERIAL_SUPPORT=y
CONFIG_SPL_NAND_SUPPORT=y
CONFIG_MPC85xx=y
CONFIG_TARGET_P1022DS=y
@@ -14,11 +17,8 @@ CONFIG_SPL=y
CONFIG_TPL=y
CONFIG_TPL_ENV_SUPPORT=y
CONFIG_TPL_I2C_SUPPORT=y
-CONFIG_TPL_LIBCOMMON_SUPPORT=y
-CONFIG_TPL_LIBGENERIC_SUPPORT=y
CONFIG_TPL_MPC8XXX_INIT_DDR_SUPPORT=y
CONFIG_TPL_NAND_SUPPORT=y
-CONFIG_TPL_SERIAL_SUPPORT=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
diff --git a/configs/P1024RDB_NAND_defconfig b/configs/P1024RDB_NAND_defconfig
index 350923a0653..d832d3c0705 100644
--- a/configs/P1024RDB_NAND_defconfig
+++ b/configs/P1024RDB_NAND_defconfig
@@ -1,5 +1,8 @@
CONFIG_PPC=y
CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_TPL_LIBCOMMON_SUPPORT=y
+CONFIG_TPL_LIBGENERIC_SUPPORT=y
+CONFIG_TPL_SERIAL_SUPPORT=y
CONFIG_SPL_NAND_SUPPORT=y
CONFIG_MPC85xx=y
CONFIG_TARGET_P1024RDB=y
@@ -14,10 +17,7 @@ CONFIG_SPL=y
CONFIG_TPL=y
CONFIG_TPL_ENV_SUPPORT=y
CONFIG_TPL_I2C_SUPPORT=y
-CONFIG_TPL_LIBCOMMON_SUPPORT=y
-CONFIG_TPL_LIBGENERIC_SUPPORT=y
CONFIG_TPL_MPC8XXX_INIT_DDR_SUPPORT=y
-CONFIG_TPL_SERIAL_SUPPORT=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
diff --git a/configs/P1025RDB_NAND_defconfig b/configs/P1025RDB_NAND_defconfig
index 49436efc46c..b6d0dc663d3 100644
--- a/configs/P1025RDB_NAND_defconfig
+++ b/configs/P1025RDB_NAND_defconfig
@@ -1,5 +1,8 @@
CONFIG_PPC=y
CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_TPL_LIBCOMMON_SUPPORT=y
+CONFIG_TPL_LIBGENERIC_SUPPORT=y
+CONFIG_TPL_SERIAL_SUPPORT=y
CONFIG_SPL_NAND_SUPPORT=y
CONFIG_MPC85xx=y
CONFIG_TARGET_P1025RDB=y
@@ -14,11 +17,8 @@ CONFIG_SPL=y
CONFIG_TPL=y
CONFIG_TPL_ENV_SUPPORT=y
CONFIG_TPL_I2C_SUPPORT=y
-CONFIG_TPL_LIBCOMMON_SUPPORT=y
-CONFIG_TPL_LIBGENERIC_SUPPORT=y
CONFIG_TPL_MPC8XXX_INIT_DDR_SUPPORT=y
CONFIG_TPL_NAND_SUPPORT=y
-CONFIG_TPL_SERIAL_SUPPORT=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
diff --git a/configs/P2020RDB-PC_36BIT_NAND_defconfig b/configs/P2020RDB-PC_36BIT_NAND_defconfig
index 378e8094218..e0fdd36b515 100644
--- a/configs/P2020RDB-PC_36BIT_NAND_defconfig
+++ b/configs/P2020RDB-PC_36BIT_NAND_defconfig
@@ -1,5 +1,8 @@
CONFIG_PPC=y
CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_TPL_LIBCOMMON_SUPPORT=y
+CONFIG_TPL_LIBGENERIC_SUPPORT=y
+CONFIG_TPL_SERIAL_SUPPORT=y
CONFIG_SPL_NAND_SUPPORT=y
CONFIG_MPC85xx=y
CONFIG_TARGET_P2020RDB=y
@@ -15,11 +18,8 @@ CONFIG_SPL=y
CONFIG_TPL=y
CONFIG_TPL_ENV_SUPPORT=y
CONFIG_TPL_I2C_SUPPORT=y
-CONFIG_TPL_LIBCOMMON_SUPPORT=y
-CONFIG_TPL_LIBGENERIC_SUPPORT=y
CONFIG_TPL_MPC8XXX_INIT_DDR_SUPPORT=y
CONFIG_TPL_NAND_SUPPORT=y
-CONFIG_TPL_SERIAL_SUPPORT=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
diff --git a/configs/P2020RDB-PC_NAND_defconfig b/configs/P2020RDB-PC_NAND_defconfig
index 7ca8282c86f..332dc8071df 100644
--- a/configs/P2020RDB-PC_NAND_defconfig
+++ b/configs/P2020RDB-PC_NAND_defconfig
@@ -1,5 +1,8 @@
CONFIG_PPC=y
CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_TPL_LIBCOMMON_SUPPORT=y
+CONFIG_TPL_LIBGENERIC_SUPPORT=y
+CONFIG_TPL_SERIAL_SUPPORT=y
CONFIG_SPL_NAND_SUPPORT=y
CONFIG_MPC85xx=y
CONFIG_TARGET_P2020RDB=y
@@ -14,10 +17,7 @@ CONFIG_SPL=y
CONFIG_TPL=y
CONFIG_TPL_ENV_SUPPORT=y
CONFIG_TPL_I2C_SUPPORT=y
-CONFIG_TPL_LIBCOMMON_SUPPORT=y
-CONFIG_TPL_LIBGENERIC_SUPPORT=y
CONFIG_TPL_MPC8XXX_INIT_DDR_SUPPORT=y
-CONFIG_TPL_SERIAL_SUPPORT=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
diff --git a/configs/Sunchip_CX-A99_defconfig b/configs/Sunchip_CX-A99_defconfig
index 7530d7db20a..0641b1fceb4 100644
--- a/configs/Sunchip_CX-A99_defconfig
+++ b/configs/Sunchip_CX-A99_defconfig
@@ -7,8 +7,6 @@ CONFIG_DRAM_ODT_EN=y
CONFIG_MMC0_CD_PIN="PH17"
CONFIG_MMC_SUNXI_SLOT_EXTRA=2
CONFIG_USB0_VBUS_PIN="PH15"
-CONFIG_USB0_VBUS_DET=""
-CONFIG_USB0_ID_DET=""
CONFIG_USB1_VBUS_PIN="PL7"
CONFIG_USB3_VBUS_PIN="PL8"
CONFIG_DEFAULT_DEVICE_TREE="sun9i-a80-cx-a99"
diff --git a/configs/ap143_defconfig b/configs/ap143_defconfig
index ed886b202f3..0753221d7fc 100644
--- a/configs/ap143_defconfig
+++ b/configs/ap143_defconfig
@@ -37,7 +37,6 @@ CONFIG_SPI_FLASH_WINBOND=y
CONFIG_SPI_FLASH_DATAFLASH=y
CONFIG_SPI_FLASH_MTD=y
CONFIG_PINCTRL=y
-CONFIG_QCA953X_PINCTRL=y
CONFIG_DM_SERIAL=y
CONFIG_DEBUG_UART=y
CONFIG_DEBUG_UART_BASE=0xb8020000
diff --git a/configs/arches_defconfig b/configs/arches_defconfig
index c76c8d6ebf5..4477bab5ee4 100644
--- a/configs/arches_defconfig
+++ b/configs/arches_defconfig
@@ -1,8 +1,8 @@
CONFIG_PPC=y
CONFIG_4xx=y
CONFIG_TARGET_CANYONLANDS=y
-CONFIG_ARCHES=y
CONFIG_CMD_CHIP_CONFIG=y
+CONFIG_ARCHES=y
CONFIG_DEFAULT_DEVICE_TREE="arches"
CONFIG_OF_BOARD_SETUP=y
CONFIG_BOOTDELAY=5
diff --git a/configs/canyonlands_defconfig b/configs/canyonlands_defconfig
index bcdb3b84a3c..e76736afc4b 100644
--- a/configs/canyonlands_defconfig
+++ b/configs/canyonlands_defconfig
@@ -1,8 +1,8 @@
CONFIG_PPC=y
CONFIG_4xx=y
CONFIG_TARGET_CANYONLANDS=y
-CONFIG_CANYONLANDS=y
CONFIG_CMD_CHIP_CONFIG=y
+CONFIG_CANYONLANDS=y
CONFIG_DEFAULT_DEVICE_TREE="canyonlands"
CONFIG_OF_BOARD_SETUP=y
CONFIG_BOOTDELAY=5
diff --git a/configs/colibri_vf_defconfig b/configs/colibri_vf_defconfig
index a5ef07cf56f..78c478f4201 100644
--- a/configs/colibri_vf_defconfig
+++ b/configs/colibri_vf_defconfig
@@ -2,6 +2,7 @@ CONFIG_ARM=y
CONFIG_SYS_THUMB_BUILD=y
CONFIG_ARCH_VF610=y
CONFIG_TARGET_COLIBRI_VF=y
+CONFIG_VIDEO=y
CONFIG_DEFAULT_DEVICE_TREE="vf610-colibri"
CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/toradex/colibri_vf/imximage.cfg,ENV_IS_IN_NAND,IMX_NAND"
CONFIG_BOOTDELAY=1
@@ -52,8 +53,6 @@ CONFIG_USB_GADGET_DOWNLOAD=y
CONFIG_G_DNL_MANUFACTURER="Toradex"
CONFIG_G_DNL_VENDOR_NUM=0x1b67
CONFIG_G_DNL_PRODUCT_NUM=0x4000
-CONFIG_OF_LIBFDT_OVERLAY=y
-CONFIG_VIDEO=y
CONFIG_VIDEO_FSL_DCU_FB=y
CONFIG_SYS_CONSOLE_FG_COL=0x00
-CONFIG_SYS_CONSOLE_BG_COL=0x00
+CONFIG_OF_LIBFDT_OVERLAY=y
diff --git a/configs/dragonboard410c_defconfig b/configs/dragonboard410c_defconfig
index 6b5096407e8..90c145aa153 100644
--- a/configs/dragonboard410c_defconfig
+++ b/configs/dragonboard410c_defconfig
@@ -8,6 +8,7 @@ CONFIG_DISTRO_DEFAULTS=y
CONFIG_SYS_PROMPT="dragonboard410c => "
# CONFIG_CMD_IMI is not set
# CONFIG_CMD_IMLS is not set
+CONFIG_CMD_MD5SUM=y
CONFIG_CMD_MEMINFO=y
CONFIG_CMD_UNZIP=y
CONFIG_CMD_GPT=y
@@ -36,4 +37,3 @@ CONFIG_USB_EHCI_MSM=y
CONFIG_USB_ULPI_VIEWPORT=y
CONFIG_USB_ULPI=y
CONFIG_USB_STORAGE=y
-CONFIG_CMD_MD5SUM=y
diff --git a/configs/evb-rk3288_defconfig b/configs/evb-rk3288_defconfig
index 6507011cabd..227150d3449 100644
--- a/configs/evb-rk3288_defconfig
+++ b/configs/evb-rk3288_defconfig
@@ -42,7 +42,6 @@ CONFIG_LED_GPIO=y
CONFIG_MMC_DW=y
CONFIG_MMC_DW_ROCKCHIP=y
CONFIG_DM_ETH=y
-CONFIG_NETDEVICES=y
CONFIG_ETH_DESIGNWARE=y
CONFIG_GMAC_ROCKCHIP=y
CONFIG_PINCTRL=y
diff --git a/configs/evb-rk3328_defconfig b/configs/evb-rk3328_defconfig
index c834a4af286..96241f6f9bd 100644
--- a/configs/evb-rk3328_defconfig
+++ b/configs/evb-rk3328_defconfig
@@ -11,10 +11,6 @@ CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_TIME=y
-CONFIG_CMD_EXT2=y
-CONFIG_CMD_EXT4=y
-CONFIG_CMD_FAT=y
-CONFIG_CMD_FS_GENERIC=y
CONFIG_REGMAP=y
CONFIG_SYSCON=y
CONFIG_CLK=y
diff --git a/configs/evb-rk3399_defconfig b/configs/evb-rk3399_defconfig
index b115f045073..eb5e7aa9e71 100644
--- a/configs/evb-rk3399_defconfig
+++ b/configs/evb-rk3399_defconfig
@@ -1,20 +1,17 @@
CONFIG_ARM=y
CONFIG_ARCH_ROCKCHIP=y
+CONFIG_SPL_LIBCOMMON_SUPPORT=y
+CONFIG_SPL_LIBGENERIC_SUPPORT=y
+CONFIG_SYS_MALLOC_F_LEN=0x4000
CONFIG_ROCKCHIP_RK3399=y
+CONFIG_SPL_STACK_R_ADDR=0x80000
CONFIG_DEFAULT_DEVICE_TREE="rk3399-evb"
CONFIG_FIT=y
CONFIG_SPL_LOAD_FIT=y
-CONFIG_SPL_OF_LIBFDT=y
-CONFIG_SPL_ATF_SUPPORT=y
-CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x200
-CONFIG_SPL_ATF_TEXT_BASE=0x00010000
# CONFIG_DISPLAY_CPUINFO is not set
CONFIG_SPL_STACK_R=y
-CONFIG_SPL_STACK_R_ADDR=0x80000
CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x4000
-CONFIG_SPL_LIBCOMMON_SUPPORT=y
-CONFIG_SPL_LIBGENERIC_SUPPORT=y
-CONFIG_SYS_MALLOC_F_LEN=0x4000
+CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x200
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMLS is not set
CONFIG_CMD_GPT=y
@@ -23,7 +20,6 @@ CONFIG_CMD_SF=y
CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_TIME=y
-CONFIG_CMD_PXE=y
CONFIG_SPL_OF_CONTROL=y
CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
CONFIG_SPL_OF_PLATDATA=y
@@ -34,14 +30,18 @@ CONFIG_SPL_SYSCON=y
CONFIG_CLK=y
CONFIG_SPL_CLK=y
CONFIG_ROCKCHIP_GPIO=y
+CONFIG_SYS_I2C_ROCKCHIP=y
CONFIG_MMC_DW=y
CONFIG_MMC_SDHCI=y
CONFIG_MMC_SDHCI_ROCKCHIP=y
CONFIG_PINCTRL=y
CONFIG_SPL_PINCTRL=y
CONFIG_PINCTRL_ROCKCHIP_RK3399=y
+CONFIG_DM_PMIC=y
+CONFIG_PMIC_RK808=y
CONFIG_REGULATOR_PWM=y
CONFIG_DM_REGULATOR_FIXED=y
+CONFIG_REGULATOR_RK808=y
CONFIG_PWM_ROCKCHIP=y
CONFIG_RAM=y
CONFIG_SPL_RAM=y
@@ -60,9 +60,3 @@ CONFIG_USB_EHCI_GENERIC=y
CONFIG_USB_STORAGE=y
CONFIG_USE_TINY_PRINTF=y
CONFIG_ERRNO_STR=y
-CONFIG_SYS_I2C_ROCKCHIP=y
-CONFIG_DM_PMIC=y
-CONFIG_PMIC_CHILDREN=y
-CONFIG_SPL_PMIC_CHILDREN=y
-CONFIG_PMIC_RK808=y
-CONFIG_REGULATOR_RK808=y
diff --git a/configs/fennec-rk3288_defconfig b/configs/fennec-rk3288_defconfig
index a2d273c804a..befba1882f6 100644
--- a/configs/fennec-rk3288_defconfig
+++ b/configs/fennec-rk3288_defconfig
@@ -42,7 +42,6 @@ CONFIG_SYS_I2C_ROCKCHIP=y
CONFIG_MMC_DW=y
CONFIG_MMC_DW_ROCKCHIP=y
CONFIG_DM_ETH=y
-CONFIG_NETDEVICES=y
CONFIG_ETH_DESIGNWARE=y
CONFIG_GMAC_ROCKCHIP=y
CONFIG_PINCTRL=y
diff --git a/configs/firefly-rk3288_defconfig b/configs/firefly-rk3288_defconfig
index 69a54921777..f2872a606cc 100644
--- a/configs/firefly-rk3288_defconfig
+++ b/configs/firefly-rk3288_defconfig
@@ -63,7 +63,6 @@ CONFIG_DEBUG_UART_BASE=0xff690000
CONFIG_DEBUG_UART_CLOCK=24000000
CONFIG_DEBUG_UART_SHIFT=2
CONFIG_SYS_NS16550=y
-CONFIG_ROCKCHIP_SERIAL=y
CONFIG_SYSRESET=y
CONFIG_USB=y
CONFIG_USB_STORAGE=y
diff --git a/configs/glacier_defconfig b/configs/glacier_defconfig
index 3fb53cc23c4..b47bfb5c247 100644
--- a/configs/glacier_defconfig
+++ b/configs/glacier_defconfig
@@ -1,8 +1,8 @@
CONFIG_PPC=y
CONFIG_4xx=y
CONFIG_TARGET_CANYONLANDS=y
-CONFIG_GLACIER=y
CONFIG_CMD_CHIP_CONFIG=y
+CONFIG_GLACIER=y
CONFIG_DEFAULT_DEVICE_TREE="glacier"
CONFIG_OF_BOARD_SETUP=y
CONFIG_BOOTDELAY=5
diff --git a/configs/glacier_ramboot_defconfig b/configs/glacier_ramboot_defconfig
index e5c2be416db..7e6957053d9 100644
--- a/configs/glacier_ramboot_defconfig
+++ b/configs/glacier_ramboot_defconfig
@@ -1,8 +1,8 @@
CONFIG_PPC=y
CONFIG_4xx=y
CONFIG_TARGET_CANYONLANDS=y
-CONFIG_GLACIER=y
CONFIG_CMD_CHIP_CONFIG=y
+CONFIG_GLACIER=y
CONFIG_DEFAULT_DEVICE_TREE="glacier"
CONFIG_OF_BOARD_SETUP=y
CONFIG_SYS_EXTRA_OPTIONS="SYS_RAMBOOT,SYS_TEXT_BASE=0x01000000,SYS_LDSCRIPT=board/amcc/canyonlands/u-boot-ram.lds"
diff --git a/configs/gwventana_emmc_defconfig b/configs/gwventana_emmc_defconfig
index 2788219e960..dfabb6bb39e 100644
--- a/configs/gwventana_emmc_defconfig
+++ b/configs/gwventana_emmc_defconfig
@@ -4,11 +4,10 @@ CONFIG_SPL_GPIO_SUPPORT=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_TARGET_GW_VENTANA=y
-CONFIG_SPL_I2C_SUPPORT=y
CONFIG_SPL_MMC_SUPPORT=y
-CONFIG_SPL_POWER_SUPPORT=y
CONFIG_SPL_SERIAL_SUPPORT=y
CONFIG_SPL_WATCHDOG_SUPPORT=y
+CONFIG_SPL_POWER_SUPPORT=y
CONFIG_VIDEO=y
CONFIG_SPL_STACK_R_ADDR=0x18000000
CONFIG_FIT=y
@@ -22,6 +21,7 @@ CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_SPL=y
CONFIG_SPL_STACK_R=y
CONFIG_SPL_DMA_SUPPORT=y
+CONFIG_SPL_I2C_SUPPORT=y
CONFIG_SPL_OS_BOOT=y
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="Ventana > "
diff --git a/configs/gwventana_gw5904_defconfig b/configs/gwventana_gw5904_defconfig
index 7369d2388a3..f95aa44390c 100644
--- a/configs/gwventana_gw5904_defconfig
+++ b/configs/gwventana_gw5904_defconfig
@@ -4,11 +4,10 @@ CONFIG_SPL_GPIO_SUPPORT=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_TARGET_GW_VENTANA=y
-CONFIG_SPL_I2C_SUPPORT=y
CONFIG_SPL_MMC_SUPPORT=y
-CONFIG_SPL_POWER_SUPPORT=y
CONFIG_SPL_SERIAL_SUPPORT=y
CONFIG_SPL_WATCHDOG_SUPPORT=y
+CONFIG_SPL_POWER_SUPPORT=y
CONFIG_VIDEO=y
CONFIG_SPL_STACK_R_ADDR=0x18000000
CONFIG_FIT=y
@@ -22,6 +21,7 @@ CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_SPL=y
CONFIG_SPL_STACK_R=y
CONFIG_SPL_DMA_SUPPORT=y
+CONFIG_SPL_I2C_SUPPORT=y
CONFIG_SPL_OS_BOOT=y
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="Ventana > "
diff --git a/configs/gwventana_nand_defconfig b/configs/gwventana_nand_defconfig
index e1e5200889e..169570d8fde 100644
--- a/configs/gwventana_nand_defconfig
+++ b/configs/gwventana_nand_defconfig
@@ -4,12 +4,11 @@ CONFIG_SPL_GPIO_SUPPORT=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_TARGET_GW_VENTANA=y
-CONFIG_SPL_I2C_SUPPORT=y
CONFIG_SPL_MMC_SUPPORT=y
-CONFIG_SPL_NAND_SUPPORT=y
-CONFIG_SPL_POWER_SUPPORT=y
CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_NAND_SUPPORT=y
CONFIG_SPL_WATCHDOG_SUPPORT=y
+CONFIG_SPL_POWER_SUPPORT=y
CONFIG_VIDEO=y
CONFIG_SPL_STACK_R_ADDR=0x18000000
CONFIG_FIT=y
@@ -23,6 +22,7 @@ CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_SPL=y
CONFIG_SPL_STACK_R=y
CONFIG_SPL_DMA_SUPPORT=y
+CONFIG_SPL_I2C_SUPPORT=y
CONFIG_SPL_OS_BOOT=y
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="Ventana > "
diff --git a/configs/imx6ul_isiot_emmc_defconfig b/configs/imx6ul_isiot_emmc_defconfig
index a08a1759651..58c56f51eee 100644
--- a/configs/imx6ul_isiot_emmc_defconfig
+++ b/configs/imx6ul_isiot_emmc_defconfig
@@ -4,20 +4,20 @@ CONFIG_SPL_GPIO_SUPPORT=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_TARGET_MX6UL_ISIOT=y
-CONFIG_SPL_EXT_SUPPORT=y
-CONFIG_SPL_LIBDISK_SUPPORT=y
CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_LIBDISK_SUPPORT=y
CONFIG_SPL_WATCHDOG_SUPPORT=y
# CONFIG_CMD_BMODE is not set
CONFIG_DEFAULT_DEVICE_TREE="imx6ul-isiot-emmc"
+CONFIG_FIT=y
+CONFIG_FIT_SIGNATURE=y
+CONFIG_FIT_VERBOSE=y
CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/imx-common/spl_sd.cfg,ENV_IS_IN_MMC"
CONFIG_BOOTDELAY=3
CONFIG_DEFAULT_FDT_FILE="imx6ul-isiot-emmc.dtb"
CONFIG_SPL=y
+CONFIG_SPL_EXT_SUPPORT=y
CONFIG_HUSH_PARSER=y
-CONFIG_FIT=y
-CONFIG_FIT_VERBOSE=y
-CONFIG_FIT_SIGNATURE=y
CONFIG_SYS_PROMPT="isiotmx6ul> "
# CONFIG_CMD_IMLS is not set
CONFIG_CMD_MEMTEST=y
diff --git a/configs/imx6ul_isiot_mmc_defconfig b/configs/imx6ul_isiot_mmc_defconfig
index 08624a1ce08..89bd8a04a83 100644
--- a/configs/imx6ul_isiot_mmc_defconfig
+++ b/configs/imx6ul_isiot_mmc_defconfig
@@ -4,20 +4,20 @@ CONFIG_SPL_GPIO_SUPPORT=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_TARGET_MX6UL_ISIOT=y
-CONFIG_SPL_EXT_SUPPORT=y
-CONFIG_SPL_LIBDISK_SUPPORT=y
CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_LIBDISK_SUPPORT=y
CONFIG_SPL_WATCHDOG_SUPPORT=y
# CONFIG_CMD_BMODE is not set
CONFIG_DEFAULT_DEVICE_TREE="imx6ul-isiot-mmc"
+CONFIG_FIT=y
+CONFIG_FIT_SIGNATURE=y
+CONFIG_FIT_VERBOSE=y
CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/imx-common/spl_sd.cfg,ENV_IS_IN_MMC"
CONFIG_BOOTDELAY=3
CONFIG_DEFAULT_FDT_FILE="imx6ul-isiot-emmc.dtb"
CONFIG_SPL=y
+CONFIG_SPL_EXT_SUPPORT=y
CONFIG_HUSH_PARSER=y
-CONFIG_FIT=y
-CONFIG_FIT_VERBOSE=y
-CONFIG_FIT_SIGNATURE=y
CONFIG_SYS_PROMPT="isiotmx6ul> "
# CONFIG_CMD_IMLS is not set
CONFIG_CMD_MEMTEST=y
diff --git a/configs/imx6ul_isiot_nand_defconfig b/configs/imx6ul_isiot_nand_defconfig
index 045c3e7ab82..f7240cc953e 100644
--- a/configs/imx6ul_isiot_nand_defconfig
+++ b/configs/imx6ul_isiot_nand_defconfig
@@ -8,36 +8,36 @@ CONFIG_SPL_SERIAL_SUPPORT=y
CONFIG_SPL_WATCHDOG_SUPPORT=y
# CONFIG_CMD_BMODE is not set
CONFIG_DEFAULT_DEVICE_TREE="imx6ul-isiot-nand"
+CONFIG_FIT=y
+CONFIG_FIT_SIGNATURE=y
+CONFIG_FIT_VERBOSE=y
CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/imx-common/spl_sd.cfg,ENV_IS_IN_NAND"
CONFIG_BOOTDELAY=3
CONFIG_DEFAULT_FDT_FILE="imx6ul-isiot-nand.dtb"
CONFIG_SPL=y
CONFIG_SPL_DMA_SUPPORT=y
CONFIG_HUSH_PARSER=y
-CONFIG_FIT=y
-CONFIG_FIT_VERBOSE=y
-CONFIG_FIT_SIGNATURE=y
CONFIG_SYS_PROMPT="isiotmx6ul> "
# CONFIG_CMD_IMLS is not set
CONFIG_CMD_MEMTEST=y
CONFIG_CMD_MMC=y
CONFIG_CMD_NAND=y
-CONFIG_CMD_UBI=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_GPIO=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_CMD_CACHE=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_EXT4=y
CONFIG_CMD_EXT4_WRITE=y
CONFIG_CMD_FAT=y
CONFIG_CMD_FS_GENERIC=y
+CONFIG_CMD_UBI=y
# CONFIG_BLK is not set
+CONFIG_SYS_I2C_MXC=y
# CONFIG_DM_MMC_OPS is not set
CONFIG_NAND_MXS=y
CONFIG_FEC_MXC=y
CONFIG_PINCTRL=y
CONFIG_PINCTRL_IMX6=y
-CONFIG_SYS_I2C_MXC=y
CONFIG_MXC_UART=y
CONFIG_IMX_THERMAL=y
diff --git a/configs/k2e_evm_defconfig b/configs/k2e_evm_defconfig
index abe207b38fc..e8620469321 100644
--- a/configs/k2e_evm_defconfig
+++ b/configs/k2e_evm_defconfig
@@ -1,5 +1,6 @@
CONFIG_ARM=y
CONFIG_ARCH_KEYSTONE=y
+CONFIG_SYS_TEXT_BASE=0x0c000000
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_TARGET_K2E_EVM=y
@@ -7,7 +8,6 @@ CONFIG_SPL_SERIAL_SUPPORT=y
CONFIG_SPL_SPI_FLASH_SUPPORT=y
CONFIG_SPL_SPI_SUPPORT=y
CONFIG_SPL_POWER_SUPPORT=y
-CONFIG_SYS_TEXT_BASE=0x0c000000
CONFIG_DEFAULT_DEVICE_TREE="keystone-k2e-evm"
CONFIG_OF_BOARD_SETUP=y
CONFIG_SYS_CONSOLE_INFO_QUIET=y
diff --git a/configs/k2e_hs_evm_defconfig b/configs/k2e_hs_evm_defconfig
index 36e141a8fe2..268b56efdb3 100644
--- a/configs/k2e_hs_evm_defconfig
+++ b/configs/k2e_hs_evm_defconfig
@@ -2,9 +2,7 @@ CONFIG_ARM=y
CONFIG_ARCH_KEYSTONE=y
CONFIG_SYS_TEXT_BASE=0x0c000060
CONFIG_TARGET_K2E_EVM=y
-CONFIG_TI_SECURE_DEVICE=y
CONFIG_DEFAULT_DEVICE_TREE="keystone-k2e-evm"
-CONFIG_FIT_IMAGE_POST_PROCESS=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_SYS_CONSOLE_INFO_QUIET=y
CONFIG_VERSION_VARIABLE=y
diff --git a/configs/k2g_evm_defconfig b/configs/k2g_evm_defconfig
index 44c9dff747b..40fc7f098f7 100644
--- a/configs/k2g_evm_defconfig
+++ b/configs/k2g_evm_defconfig
@@ -1,5 +1,6 @@
CONFIG_ARM=y
CONFIG_ARCH_KEYSTONE=y
+CONFIG_SYS_TEXT_BASE=0x0c000000
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_TARGET_K2G_EVM=y
@@ -7,7 +8,6 @@ CONFIG_SPL_SERIAL_SUPPORT=y
CONFIG_SPL_SPI_FLASH_SUPPORT=y
CONFIG_SPL_SPI_SUPPORT=y
CONFIG_SPL_POWER_SUPPORT=y
-CONFIG_SYS_TEXT_BASE=0x0c000000
CONFIG_DEFAULT_DEVICE_TREE="keystone-k2g-evm"
CONFIG_OF_BOARD_SETUP=y
CONFIG_SYS_CONSOLE_INFO_QUIET=y
diff --git a/configs/k2g_hs_evm_defconfig b/configs/k2g_hs_evm_defconfig
index 462b807fa29..d6266dff5c0 100644
--- a/configs/k2g_hs_evm_defconfig
+++ b/configs/k2g_hs_evm_defconfig
@@ -1,11 +1,9 @@
CONFIG_ARM=y
CONFIG_ARCH_KEYSTONE=y
-CONFIG_TARGET_K2G_EVM=y
-CONFIG_TI_SECURE_DEVICE=y
CONFIG_SYS_TEXT_BASE=0x0c000060
+CONFIG_TARGET_K2G_EVM=y
CONFIG_DEFAULT_DEVICE_TREE="keystone-k2g-evm"
CONFIG_OF_BOARD_SETUP=y
-CONFIG_FIT_IMAGE_POST_PROCESS=y
CONFIG_SYS_CONSOLE_INFO_QUIET=y
CONFIG_VERSION_VARIABLE=y
CONFIG_HUSH_PARSER=y
diff --git a/configs/k2hk_evm_defconfig b/configs/k2hk_evm_defconfig
index 55fd3ac67cd..4ec6b6f2ab3 100644
--- a/configs/k2hk_evm_defconfig
+++ b/configs/k2hk_evm_defconfig
@@ -1,5 +1,6 @@
CONFIG_ARM=y
CONFIG_ARCH_KEYSTONE=y
+CONFIG_SYS_TEXT_BASE=0x0c000000
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_TARGET_K2HK_EVM=y
@@ -7,7 +8,6 @@ CONFIG_SPL_SERIAL_SUPPORT=y
CONFIG_SPL_SPI_FLASH_SUPPORT=y
CONFIG_SPL_SPI_SUPPORT=y
CONFIG_SPL_POWER_SUPPORT=y
-CONFIG_SYS_TEXT_BASE=0x0c000000
CONFIG_DEFAULT_DEVICE_TREE="keystone-k2hk-evm"
CONFIG_OF_BOARD_SETUP=y
CONFIG_SYS_CONSOLE_INFO_QUIET=y
diff --git a/configs/k2hk_hs_evm_defconfig b/configs/k2hk_hs_evm_defconfig
index 5a0e6749271..500707fdecd 100644
--- a/configs/k2hk_hs_evm_defconfig
+++ b/configs/k2hk_hs_evm_defconfig
@@ -2,9 +2,7 @@ CONFIG_ARM=y
CONFIG_ARCH_KEYSTONE=y
CONFIG_SYS_TEXT_BASE=0x0c000060
CONFIG_TARGET_K2HK_EVM=y
-CONFIG_TI_SECURE_DEVICE=y
CONFIG_DEFAULT_DEVICE_TREE="keystone-k2hk-evm"
-CONFIG_FIT_IMAGE_POST_PROCESS=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_SYS_CONSOLE_INFO_QUIET=y
CONFIG_VERSION_VARIABLE=y
diff --git a/configs/k2l_evm_defconfig b/configs/k2l_evm_defconfig
index 2abe43160c4..564a179bb9b 100644
--- a/configs/k2l_evm_defconfig
+++ b/configs/k2l_evm_defconfig
@@ -1,5 +1,6 @@
CONFIG_ARM=y
CONFIG_ARCH_KEYSTONE=y
+CONFIG_SYS_TEXT_BASE=0x0c000000
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_TARGET_K2L_EVM=y
@@ -7,7 +8,6 @@ CONFIG_SPL_SERIAL_SUPPORT=y
CONFIG_SPL_SPI_FLASH_SUPPORT=y
CONFIG_SPL_SPI_SUPPORT=y
CONFIG_SPL_POWER_SUPPORT=y
-CONFIG_SYS_TEXT_BASE=0x0c000000
CONFIG_DEFAULT_DEVICE_TREE="keystone-k2l-evm"
CONFIG_OF_BOARD_SETUP=y
CONFIG_SYS_CONSOLE_INFO_QUIET=y
diff --git a/configs/ls1012ardb_qspi_SECURE_BOOT_defconfig b/configs/ls1012ardb_qspi_SECURE_BOOT_defconfig
index 97f49d5bd57..ec6ed377d4d 100644
--- a/configs/ls1012ardb_qspi_SECURE_BOOT_defconfig
+++ b/configs/ls1012ardb_qspi_SECURE_BOOT_defconfig
@@ -1,22 +1,17 @@
CONFIG_ARM=y
CONFIG_TARGET_LS1012ARDB=y
-CONFIG_SYS_EXTRA_OPTIONS="QSPI_BOOT"
-# CONFIG_CMD_IMLS is not set
-CONFIG_SYS_NS16550=y
-CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1012a-rdb"
+CONFIG_SECURE_BOOT=y
CONFIG_FSL_LS_PPA=y
-CONFIG_OF_CONTROL=y
-CONFIG_DM=y
-CONFIG_SPI_FLASH=y
+CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1012a-rdb"
# CONFIG_SYS_MALLOC_F is not set
-CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
-CONFIG_SECURE_BOOT=y
+CONFIG_SYS_EXTRA_OPTIONS="QSPI_BOOT"
CONFIG_QSPI_BOOT=y
CONFIG_BOOTDELAY=10
CONFIG_HUSH_PARSER=y
+# CONFIG_CMD_IMLS is not set
CONFIG_CMD_GREPENV=y
CONFIG_CMD_GPT=y
CONFIG_CMD_MMC=y
@@ -30,14 +25,18 @@ CONFIG_CMD_PING=y
CONFIG_CMD_CACHE=y
CONFIG_CMD_EXT2=y
CONFIG_CMD_FAT=y
+CONFIG_OF_CONTROL=y
CONFIG_NET_RANDOM_ETHADDR=y
+CONFIG_DM=y
CONFIG_DM_SPI_FLASH=y
+CONFIG_SPI_FLASH=y
CONFIG_NETDEVICES=y
CONFIG_E1000=y
CONFIG_PCI=y
CONFIG_DM_PCI=y
CONFIG_DM_PCI_COMPAT=y
CONFIG_PCIE_LAYERSCAPE=y
+CONFIG_SYS_NS16550=y
CONFIG_DM_SPI=y
CONFIG_FSL_DSPI=y
CONFIG_USB=y
diff --git a/configs/ls1021aqds_ddr4_nor_defconfig b/configs/ls1021aqds_ddr4_nor_defconfig
index 62345a93016..e753f4c5895 100644
--- a/configs/ls1021aqds_ddr4_nor_defconfig
+++ b/configs/ls1021aqds_ddr4_nor_defconfig
@@ -43,5 +43,5 @@ CONFIG_DM_USB=y
CONFIG_USB_XHCI_HCD=y
CONFIG_USB_XHCI_DWC3=y
CONFIG_USB_STORAGE=y
-# CONFIG_VIDEO_SW_CURSOR is not set
CONFIG_VIDEO_FSL_DCU_FB=y
+# CONFIG_VIDEO_SW_CURSOR is not set
diff --git a/configs/ls1021aqds_ddr4_nor_lpuart_defconfig b/configs/ls1021aqds_ddr4_nor_lpuart_defconfig
index 992adba76c1..ed03812a92c 100644
--- a/configs/ls1021aqds_ddr4_nor_lpuart_defconfig
+++ b/configs/ls1021aqds_ddr4_nor_lpuart_defconfig
@@ -44,5 +44,5 @@ CONFIG_DM_USB=y
CONFIG_USB_XHCI_HCD=y
CONFIG_USB_XHCI_DWC3=y
CONFIG_USB_STORAGE=y
-# CONFIG_VIDEO_SW_CURSOR is not set
CONFIG_VIDEO_FSL_DCU_FB=y
+# CONFIG_VIDEO_SW_CURSOR is not set
diff --git a/configs/ls1021aqds_nand_defconfig b/configs/ls1021aqds_nand_defconfig
index 248d0365007..e1ddd293dc5 100644
--- a/configs/ls1021aqds_nand_defconfig
+++ b/configs/ls1021aqds_nand_defconfig
@@ -57,5 +57,5 @@ CONFIG_USB=y
CONFIG_USB_XHCI_HCD=y
CONFIG_USB_XHCI_DWC3=y
CONFIG_USB_STORAGE=y
-# CONFIG_VIDEO_SW_CURSOR is not set
CONFIG_VIDEO_FSL_DCU_FB=y
+# CONFIG_VIDEO_SW_CURSOR is not set
diff --git a/configs/ls1021aqds_nor_SECURE_BOOT_defconfig b/configs/ls1021aqds_nor_SECURE_BOOT_defconfig
index 11399426f33..6b5477fbd65 100644
--- a/configs/ls1021aqds_nor_SECURE_BOOT_defconfig
+++ b/configs/ls1021aqds_nor_SECURE_BOOT_defconfig
@@ -43,7 +43,7 @@ CONFIG_USB=y
CONFIG_USB_XHCI_HCD=y
CONFIG_USB_XHCI_DWC3=y
CONFIG_USB_STORAGE=y
-# CONFIG_VIDEO_SW_CURSOR is not set
CONFIG_VIDEO_FSL_DCU_FB=y
+# CONFIG_VIDEO_SW_CURSOR is not set
CONFIG_RSA=y
CONFIG_SPL_RSA=y
diff --git a/configs/ls1021aqds_nor_defconfig b/configs/ls1021aqds_nor_defconfig
index a604dba0695..6b435cc4d56 100644
--- a/configs/ls1021aqds_nor_defconfig
+++ b/configs/ls1021aqds_nor_defconfig
@@ -44,5 +44,5 @@ CONFIG_DM_USB=y
CONFIG_USB_XHCI_HCD=y
CONFIG_USB_XHCI_DWC3=y
CONFIG_USB_STORAGE=y
-# CONFIG_VIDEO_SW_CURSOR is not set
CONFIG_VIDEO_FSL_DCU_FB=y
+# CONFIG_VIDEO_SW_CURSOR is not set
diff --git a/configs/ls1021aqds_nor_lpuart_defconfig b/configs/ls1021aqds_nor_lpuart_defconfig
index 762d1af162e..8fdd8b63db4 100644
--- a/configs/ls1021aqds_nor_lpuart_defconfig
+++ b/configs/ls1021aqds_nor_lpuart_defconfig
@@ -45,5 +45,5 @@ CONFIG_DM_USB=y
CONFIG_USB_XHCI_HCD=y
CONFIG_USB_XHCI_DWC3=y
CONFIG_USB_STORAGE=y
-# CONFIG_VIDEO_SW_CURSOR is not set
CONFIG_VIDEO_FSL_DCU_FB=y
+# CONFIG_VIDEO_SW_CURSOR is not set
diff --git a/configs/ls1021aqds_qspi_defconfig b/configs/ls1021aqds_qspi_defconfig
index f11709e13d4..7993a69ee3d 100644
--- a/configs/ls1021aqds_qspi_defconfig
+++ b/configs/ls1021aqds_qspi_defconfig
@@ -50,5 +50,5 @@ CONFIG_USB=y
CONFIG_USB_XHCI_HCD=y
CONFIG_USB_XHCI_DWC3=y
CONFIG_USB_STORAGE=y
-# CONFIG_VIDEO_SW_CURSOR is not set
CONFIG_VIDEO_FSL_DCU_FB=y
+# CONFIG_VIDEO_SW_CURSOR is not set
diff --git a/configs/ls1021aqds_sdcard_ifc_defconfig b/configs/ls1021aqds_sdcard_ifc_defconfig
index 328c7779d6d..b349fea4d6f 100644
--- a/configs/ls1021aqds_sdcard_ifc_defconfig
+++ b/configs/ls1021aqds_sdcard_ifc_defconfig
@@ -55,5 +55,5 @@ CONFIG_USB=y
CONFIG_USB_XHCI_HCD=y
CONFIG_USB_XHCI_DWC3=y
CONFIG_USB_STORAGE=y
-# CONFIG_VIDEO_SW_CURSOR is not set
CONFIG_VIDEO_FSL_DCU_FB=y
+# CONFIG_VIDEO_SW_CURSOR is not set
diff --git a/configs/ls1021aqds_sdcard_qspi_defconfig b/configs/ls1021aqds_sdcard_qspi_defconfig
index d7264ae6072..ea8738fa90e 100644
--- a/configs/ls1021aqds_sdcard_qspi_defconfig
+++ b/configs/ls1021aqds_sdcard_qspi_defconfig
@@ -61,5 +61,5 @@ CONFIG_USB=y
CONFIG_USB_XHCI_HCD=y
CONFIG_USB_XHCI_DWC3=y
CONFIG_USB_STORAGE=y
-# CONFIG_VIDEO_SW_CURSOR is not set
CONFIG_VIDEO_FSL_DCU_FB=y
+# CONFIG_VIDEO_SW_CURSOR is not set
diff --git a/configs/ls1021atwr_nor_SECURE_BOOT_defconfig b/configs/ls1021atwr_nor_SECURE_BOOT_defconfig
index 122b12f6824..cf99770a606 100644
--- a/configs/ls1021atwr_nor_SECURE_BOOT_defconfig
+++ b/configs/ls1021atwr_nor_SECURE_BOOT_defconfig
@@ -42,7 +42,7 @@ CONFIG_USB=y
CONFIG_USB_XHCI_HCD=y
CONFIG_USB_XHCI_DWC3=y
CONFIG_USB_STORAGE=y
-# CONFIG_VIDEO_SW_CURSOR is not set
CONFIG_VIDEO_FSL_DCU_FB=y
+# CONFIG_VIDEO_SW_CURSOR is not set
CONFIG_RSA=y
CONFIG_SPL_RSA=y
diff --git a/configs/ls1021atwr_nor_defconfig b/configs/ls1021atwr_nor_defconfig
index 4fe45cf8c3d..c56533af3bb 100644
--- a/configs/ls1021atwr_nor_defconfig
+++ b/configs/ls1021atwr_nor_defconfig
@@ -42,5 +42,5 @@ CONFIG_USB=y
CONFIG_USB_XHCI_HCD=y
CONFIG_USB_XHCI_DWC3=y
CONFIG_USB_STORAGE=y
-# CONFIG_VIDEO_SW_CURSOR is not set
CONFIG_VIDEO_FSL_DCU_FB=y
+# CONFIG_VIDEO_SW_CURSOR is not set
diff --git a/configs/ls1021atwr_nor_lpuart_defconfig b/configs/ls1021atwr_nor_lpuart_defconfig
index a786c0ae3b7..89b89cd2115 100644
--- a/configs/ls1021atwr_nor_lpuart_defconfig
+++ b/configs/ls1021atwr_nor_lpuart_defconfig
@@ -43,5 +43,5 @@ CONFIG_USB=y
CONFIG_USB_XHCI_HCD=y
CONFIG_USB_XHCI_DWC3=y
CONFIG_USB_STORAGE=y
-# CONFIG_VIDEO_SW_CURSOR is not set
CONFIG_VIDEO_FSL_DCU_FB=y
+# CONFIG_VIDEO_SW_CURSOR is not set
diff --git a/configs/ls1021atwr_qspi_defconfig b/configs/ls1021atwr_qspi_defconfig
index 608b1736dd5..07a414397a3 100644
--- a/configs/ls1021atwr_qspi_defconfig
+++ b/configs/ls1021atwr_qspi_defconfig
@@ -50,5 +50,5 @@ CONFIG_USB=y
CONFIG_USB_XHCI_HCD=y
CONFIG_USB_XHCI_DWC3=y
CONFIG_USB_STORAGE=y
-# CONFIG_VIDEO_SW_CURSOR is not set
CONFIG_VIDEO_FSL_DCU_FB=y
+# CONFIG_VIDEO_SW_CURSOR is not set
diff --git a/configs/ls1021atwr_sdcard_ifc_SECURE_BOOT_defconfig b/configs/ls1021atwr_sdcard_ifc_SECURE_BOOT_defconfig
index 1da03468dae..d13652a2f5c 100644
--- a/configs/ls1021atwr_sdcard_ifc_SECURE_BOOT_defconfig
+++ b/configs/ls1021atwr_sdcard_ifc_SECURE_BOOT_defconfig
@@ -57,7 +57,7 @@ CONFIG_USB=y
CONFIG_USB_XHCI_HCD=y
CONFIG_USB_XHCI_DWC3=y
CONFIG_USB_STORAGE=y
-# CONFIG_VIDEO_SW_CURSOR is not set
CONFIG_VIDEO_FSL_DCU_FB=y
+# CONFIG_VIDEO_SW_CURSOR is not set
CONFIG_RSA=y
CONFIG_SPL_RSA=y
diff --git a/configs/ls1021atwr_sdcard_ifc_defconfig b/configs/ls1021atwr_sdcard_ifc_defconfig
index a93a16d5180..9809c60d350 100644
--- a/configs/ls1021atwr_sdcard_ifc_defconfig
+++ b/configs/ls1021atwr_sdcard_ifc_defconfig
@@ -54,5 +54,5 @@ CONFIG_USB=y
CONFIG_USB_XHCI_HCD=y
CONFIG_USB_XHCI_DWC3=y
CONFIG_USB_STORAGE=y
-# CONFIG_VIDEO_SW_CURSOR is not set
CONFIG_VIDEO_FSL_DCU_FB=y
+# CONFIG_VIDEO_SW_CURSOR is not set
diff --git a/configs/ls1021atwr_sdcard_qspi_defconfig b/configs/ls1021atwr_sdcard_qspi_defconfig
index 86e70d8c86c..5ccfc96e9d8 100644
--- a/configs/ls1021atwr_sdcard_qspi_defconfig
+++ b/configs/ls1021atwr_sdcard_qspi_defconfig
@@ -61,5 +61,5 @@ CONFIG_USB=y
CONFIG_USB_XHCI_HCD=y
CONFIG_USB_XHCI_DWC3=y
CONFIG_USB_STORAGE=y
-# CONFIG_VIDEO_SW_CURSOR is not set
CONFIG_VIDEO_FSL_DCU_FB=y
+# CONFIG_VIDEO_SW_CURSOR is not set
diff --git a/configs/ls1043aqds_defconfig b/configs/ls1043aqds_defconfig
index cb137b2efc8..37662082c65 100644
--- a/configs/ls1043aqds_defconfig
+++ b/configs/ls1043aqds_defconfig
@@ -2,7 +2,6 @@ CONFIG_ARM=y
CONFIG_TARGET_LS1043AQDS=y
CONFIG_FSL_LS_PPA=y
CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1043a-qds-duart"
-CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_BOOTDELAY=10
diff --git a/configs/ls1043aqds_lpuart_defconfig b/configs/ls1043aqds_lpuart_defconfig
index 0acaba1f700..ed125d7494b 100644
--- a/configs/ls1043aqds_lpuart_defconfig
+++ b/configs/ls1043aqds_lpuart_defconfig
@@ -2,7 +2,6 @@ CONFIG_ARM=y
CONFIG_TARGET_LS1043AQDS=y
CONFIG_FSL_LS_PPA=y
CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1043a-qds-lpuart"
-CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_SYS_EXTRA_OPTIONS="LPUART"
diff --git a/configs/ls1043aqds_nand_defconfig b/configs/ls1043aqds_nand_defconfig
index d168e7859be..b9246234b23 100644
--- a/configs/ls1043aqds_nand_defconfig
+++ b/configs/ls1043aqds_nand_defconfig
@@ -1,14 +1,13 @@
CONFIG_ARM=y
CONFIG_TARGET_LS1043AQDS=y
-CONFIG_FSL_LS_PPA=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
+CONFIG_FSL_LS_PPA=y
CONFIG_SPL_SERIAL_SUPPORT=y
CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
CONFIG_SPL_NAND_SUPPORT=y
CONFIG_SPL_WATCHDOG_SUPPORT=y
CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1043a-qds-duart"
-CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPL_FSL_PBL,NAND_BOOT"
diff --git a/configs/ls1043aqds_nor_ddr3_defconfig b/configs/ls1043aqds_nor_ddr3_defconfig
index fd8d0f6a95d..6974a58797a 100644
--- a/configs/ls1043aqds_nor_ddr3_defconfig
+++ b/configs/ls1043aqds_nor_ddr3_defconfig
@@ -2,7 +2,6 @@ CONFIG_ARM=y
CONFIG_TARGET_LS1043AQDS=y
CONFIG_FSL_LS_PPA=y
CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1043a-qds-duart"
-CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_BOOTDELAY=10
diff --git a/configs/ls1043aqds_qspi_defconfig b/configs/ls1043aqds_qspi_defconfig
index 4da173db539..348be3b1b94 100644
--- a/configs/ls1043aqds_qspi_defconfig
+++ b/configs/ls1043aqds_qspi_defconfig
@@ -2,7 +2,6 @@ CONFIG_ARM=y
CONFIG_TARGET_LS1043AQDS=y
CONFIG_FSL_LS_PPA=y
CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1043a-qds-duart"
-CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_SYS_EXTRA_OPTIONS="QSPI_BOOT"
diff --git a/configs/ls1043aqds_sdcard_ifc_defconfig b/configs/ls1043aqds_sdcard_ifc_defconfig
index ba484e426d5..2680892276e 100644
--- a/configs/ls1043aqds_sdcard_ifc_defconfig
+++ b/configs/ls1043aqds_sdcard_ifc_defconfig
@@ -1,14 +1,13 @@
CONFIG_ARM=y
CONFIG_TARGET_LS1043AQDS=y
-CONFIG_FSL_LS_PPA=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
+CONFIG_FSL_LS_PPA=y
CONFIG_SPL_MMC_SUPPORT=y
CONFIG_SPL_SERIAL_SUPPORT=y
CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
CONFIG_SPL_WATCHDOG_SUPPORT=y
CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1043a-qds-duart"
-CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPL_FSL_PBL,SD_BOOT"
diff --git a/configs/ls1043aqds_sdcard_qspi_defconfig b/configs/ls1043aqds_sdcard_qspi_defconfig
index 35688a4cfc1..88c99a2216c 100644
--- a/configs/ls1043aqds_sdcard_qspi_defconfig
+++ b/configs/ls1043aqds_sdcard_qspi_defconfig
@@ -1,14 +1,13 @@
CONFIG_ARM=y
CONFIG_TARGET_LS1043AQDS=y
-CONFIG_FSL_LS_PPA=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
+CONFIG_FSL_LS_PPA=y
CONFIG_SPL_MMC_SUPPORT=y
CONFIG_SPL_SERIAL_SUPPORT=y
CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
CONFIG_SPL_WATCHDOG_SUPPORT=y
CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1043a-qds-duart"
-CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPL_FSL_PBL,SD_BOOT,SD_BOOT_QSPI"
diff --git a/configs/ls1043ardb_SECURE_BOOT_defconfig b/configs/ls1043ardb_SECURE_BOOT_defconfig
index 861d49bb02a..d914be2309d 100644
--- a/configs/ls1043ardb_SECURE_BOOT_defconfig
+++ b/configs/ls1043ardb_SECURE_BOOT_defconfig
@@ -1,9 +1,8 @@
CONFIG_ARM=y
CONFIG_TARGET_LS1043ARDB=y
CONFIG_SECURE_BOOT=y
-CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1043a-rdb"
-CONFIG_FIT=y
CONFIG_FSL_LS_PPA=y
+CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1043a-rdb"
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_BOOTDELAY=10
diff --git a/configs/ls1043ardb_nand_SECURE_BOOT_defconfig b/configs/ls1043ardb_nand_SECURE_BOOT_defconfig
index 70f28d8258c..957f2c7fbb4 100644
--- a/configs/ls1043ardb_nand_SECURE_BOOT_defconfig
+++ b/configs/ls1043ardb_nand_SECURE_BOOT_defconfig
@@ -2,23 +2,24 @@ CONFIG_ARM=y
CONFIG_TARGET_LS1043ARDB=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
-CONFIG_SPL_NAND_SUPPORT=y
+CONFIG_SECURE_BOOT=y
+CONFIG_FSL_LS_PPA=y
CONFIG_SPL_SERIAL_SUPPORT=y
-CONFIG_SPL_ENV_SUPPORT=y
CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
+CONFIG_SPL_NAND_SUPPORT=y
CONFIG_SPL_WATCHDOG_SUPPORT=y
CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1043a-rdb"
-CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
-CONFIG_FSL_LS_PPA=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPL_FSL_PBL,NAND_BOOT"
CONFIG_NAND_BOOT=y
-CONFIG_SECURE_BOOT=y
CONFIG_BOOTDELAY=10
CONFIG_SPL=y
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0xf0
+CONFIG_SPL_CRYPTO_SUPPORT=y
+CONFIG_SPL_HASH_SUPPORT=y
+CONFIG_SPL_ENV_SUPPORT=y
CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_GPT=y
@@ -54,5 +55,3 @@ CONFIG_USB_XHCI_DWC3=y
CONFIG_USB_STORAGE=y
CONFIG_RSA=y
CONFIG_SPL_RSA=y
-CONFIG_SPL_CRYPTO_SUPPORT=y
-CONFIG_SPL_HASH_SUPPORT=y
diff --git a/configs/ls1043ardb_nand_defconfig b/configs/ls1043ardb_nand_defconfig
index ed429cb5097..0144db585f9 100644
--- a/configs/ls1043ardb_nand_defconfig
+++ b/configs/ls1043ardb_nand_defconfig
@@ -2,14 +2,13 @@ CONFIG_ARM=y
CONFIG_TARGET_LS1043ARDB=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
+CONFIG_FSL_LS_PPA=y
CONFIG_SPL_SERIAL_SUPPORT=y
CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
CONFIG_SPL_NAND_SUPPORT=y
CONFIG_SPL_WATCHDOG_SUPPORT=y
CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1043a-rdb"
-CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
-CONFIG_FSL_LS_PPA=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPL_FSL_PBL,NAND_BOOT"
CONFIG_NAND_BOOT=y
diff --git a/configs/ls1043ardb_sdcard_SECURE_BOOT_defconfig b/configs/ls1043ardb_sdcard_SECURE_BOOT_defconfig
index 5f9b21dec8d..4e959bfe60b 100644
--- a/configs/ls1043ardb_sdcard_SECURE_BOOT_defconfig
+++ b/configs/ls1043ardb_sdcard_SECURE_BOOT_defconfig
@@ -2,23 +2,24 @@ CONFIG_ARM=y
CONFIG_TARGET_LS1043ARDB=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
+CONFIG_SECURE_BOOT=y
+CONFIG_FSL_LS_PPA=y
CONFIG_SPL_MMC_SUPPORT=y
CONFIG_SPL_SERIAL_SUPPORT=y
-CONFIG_SPL_ENV_SUPPORT=y
CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
CONFIG_SPL_WATCHDOG_SUPPORT=y
CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1043a-rdb"
-CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
-CONFIG_FSL_LS_PPA=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPL_FSL_PBL,SD_BOOT"
-CONFIG_SECURE_BOOT=y
CONFIG_SD_BOOT=y
CONFIG_BOOTDELAY=10
CONFIG_SPL=y
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x110
+CONFIG_SPL_CRYPTO_SUPPORT=y
+CONFIG_SPL_HASH_SUPPORT=y
+CONFIG_SPL_ENV_SUPPORT=y
CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_GPT=y
@@ -54,5 +55,3 @@ CONFIG_USB_XHCI_DWC3=y
CONFIG_USB_STORAGE=y
CONFIG_RSA=y
CONFIG_SPL_RSA=y
-CONFIG_SPL_CRYPTO_SUPPORT=y
-CONFIG_SPL_HASH_SUPPORT=y
diff --git a/configs/ls1043ardb_sdcard_defconfig b/configs/ls1043ardb_sdcard_defconfig
index d34a253f113..329dd3b0d55 100644
--- a/configs/ls1043ardb_sdcard_defconfig
+++ b/configs/ls1043ardb_sdcard_defconfig
@@ -2,14 +2,13 @@ CONFIG_ARM=y
CONFIG_TARGET_LS1043ARDB=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
+CONFIG_FSL_LS_PPA=y
CONFIG_SPL_MMC_SUPPORT=y
CONFIG_SPL_SERIAL_SUPPORT=y
CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
CONFIG_SPL_WATCHDOG_SUPPORT=y
CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1043a-rdb"
-CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
-CONFIG_FSL_LS_PPA=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPL_FSL_PBL,SD_BOOT"
CONFIG_SD_BOOT=y
diff --git a/configs/ls1046aqds_SECURE_BOOT_defconfig b/configs/ls1046aqds_SECURE_BOOT_defconfig
index dc16fa0b8fa..cead5afe037 100644
--- a/configs/ls1046aqds_SECURE_BOOT_defconfig
+++ b/configs/ls1046aqds_SECURE_BOOT_defconfig
@@ -1,10 +1,10 @@
CONFIG_ARM=y
CONFIG_TARGET_LS1046AQDS=y
+CONFIG_SECURE_BOOT=y
CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1046a-qds-duart"
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
-CONFIG_SECURE_BOOT=y
CONFIG_BOOTDELAY=10
CONFIG_HUSH_PARSER=y
CONFIG_CMD_BOOTZ=y
diff --git a/configs/ls1046aqds_defconfig b/configs/ls1046aqds_defconfig
index b9329337eca..87df2fec9bd 100644
--- a/configs/ls1046aqds_defconfig
+++ b/configs/ls1046aqds_defconfig
@@ -1,7 +1,7 @@
CONFIG_ARM=y
CONFIG_TARGET_LS1046AQDS=y
+CONFIG_FSL_LS_PPA=y
CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1046a-qds-duart"
-CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_BOOTDELAY=10
@@ -36,4 +36,3 @@ CONFIG_DM_SPI=y
CONFIG_FSL_DSPI=y
CONFIG_USB=y
CONFIG_DM_USB=y
-CONFIG_FSL_LS_PPA=y
diff --git a/configs/ls1046aqds_lpuart_defconfig b/configs/ls1046aqds_lpuart_defconfig
index c282a64da67..47dba49fbdf 100644
--- a/configs/ls1046aqds_lpuart_defconfig
+++ b/configs/ls1046aqds_lpuart_defconfig
@@ -1,7 +1,7 @@
CONFIG_ARM=y
CONFIG_TARGET_LS1046AQDS=y
+CONFIG_FSL_LS_PPA=y
CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1046a-qds-lpuart"
-CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_SYS_EXTRA_OPTIONS="LPUART"
@@ -32,4 +32,3 @@ CONFIG_DM_SPI=y
CONFIG_FSL_DSPI=y
CONFIG_USB=y
CONFIG_DM_USB=y
-CONFIG_FSL_LS_PPA=y
diff --git a/configs/ls1046aqds_nand_defconfig b/configs/ls1046aqds_nand_defconfig
index 923d41755e3..cdcc25d8f91 100644
--- a/configs/ls1046aqds_nand_defconfig
+++ b/configs/ls1046aqds_nand_defconfig
@@ -1,7 +1,7 @@
CONFIG_ARM=y
CONFIG_TARGET_LS1046AQDS=y
+CONFIG_FSL_LS_PPA=y
CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1046a-qds-duart"
-CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPL_FSL_PBL"
@@ -41,4 +41,3 @@ CONFIG_DM_SPI=y
CONFIG_FSL_DSPI=y
CONFIG_USB=y
CONFIG_DM_USB=y
-CONFIG_FSL_LS_PPA=y
diff --git a/configs/ls1046aqds_qspi_defconfig b/configs/ls1046aqds_qspi_defconfig
index 5d7da728d26..d145c5a3a2a 100644
--- a/configs/ls1046aqds_qspi_defconfig
+++ b/configs/ls1046aqds_qspi_defconfig
@@ -1,7 +1,7 @@
CONFIG_ARM=y
CONFIG_TARGET_LS1046AQDS=y
+CONFIG_FSL_LS_PPA=y
CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1046a-qds-duart"
-CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_QSPI_BOOT=y
@@ -38,4 +38,3 @@ CONFIG_FSL_DSPI=y
CONFIG_FSL_QSPI=y
CONFIG_USB=y
CONFIG_DM_USB=y
-CONFIG_FSL_LS_PPA=y
diff --git a/configs/ls1046aqds_sdcard_ifc_defconfig b/configs/ls1046aqds_sdcard_ifc_defconfig
index 7e8f1a18f3c..a35e1be5bed 100644
--- a/configs/ls1046aqds_sdcard_ifc_defconfig
+++ b/configs/ls1046aqds_sdcard_ifc_defconfig
@@ -1,7 +1,7 @@
CONFIG_ARM=y
CONFIG_TARGET_LS1046AQDS=y
+CONFIG_FSL_LS_PPA=y
CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1046a-qds-duart"
-CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPL_FSL_PBL"
@@ -42,4 +42,3 @@ CONFIG_DM_SPI=y
CONFIG_FSL_DSPI=y
CONFIG_USB=y
CONFIG_DM_USB=y
-CONFIG_FSL_LS_PPA=y
diff --git a/configs/ls1046aqds_sdcard_qspi_defconfig b/configs/ls1046aqds_sdcard_qspi_defconfig
index 1707bc4a637..922f202863a 100644
--- a/configs/ls1046aqds_sdcard_qspi_defconfig
+++ b/configs/ls1046aqds_sdcard_qspi_defconfig
@@ -1,7 +1,7 @@
CONFIG_ARM=y
CONFIG_TARGET_LS1046AQDS=y
+CONFIG_FSL_LS_PPA=y
CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1046a-qds-duart"
-CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPL_FSL_PBL,SD_BOOT_QSPI"
@@ -43,4 +43,3 @@ CONFIG_FSL_DSPI=y
CONFIG_FSL_QSPI=y
CONFIG_USB=y
CONFIG_DM_USB=y
-CONFIG_FSL_LS_PPA=y
diff --git a/configs/ls1046ardb_emmc_defconfig b/configs/ls1046ardb_emmc_defconfig
index 711fc10ab60..94bd8a52e13 100644
--- a/configs/ls1046ardb_emmc_defconfig
+++ b/configs/ls1046ardb_emmc_defconfig
@@ -1,9 +1,8 @@
CONFIG_ARM=y
CONFIG_TARGET_LS1046ARDB=y
+CONFIG_FSL_LS_PPA=y
CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1046a-rdb"
-CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
-CONFIG_FSL_LS_PPA=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPL_FSL_PBL,EMMC_BOOT"
CONFIG_SD_BOOT=y
diff --git a/configs/ls1046ardb_qspi_SECURE_BOOT_defconfig b/configs/ls1046ardb_qspi_SECURE_BOOT_defconfig
index af14e194679..de14dc1a33e 100644
--- a/configs/ls1046ardb_qspi_SECURE_BOOT_defconfig
+++ b/configs/ls1046ardb_qspi_SECURE_BOOT_defconfig
@@ -1,12 +1,12 @@
CONFIG_ARM=y
CONFIG_TARGET_LS1046ARDB=y
+CONFIG_SECURE_BOOT=y
CONFIG_FSL_LS_PPA=y
CONFIG_QSPI_AHB_INIT=y
CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1046a-rdb"
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_QSPI_BOOT=y
-CONFIG_SECURE_BOOT=y
CONFIG_BOOTDELAY=10
CONFIG_HUSH_PARSER=y
# CONFIG_CMD_IMLS is not set
diff --git a/configs/ls1046ardb_sdcard_SECURE_BOOT_defconfig b/configs/ls1046ardb_sdcard_SECURE_BOOT_defconfig
index 1e320239220..5162c2cadc3 100644
--- a/configs/ls1046ardb_sdcard_SECURE_BOOT_defconfig
+++ b/configs/ls1046ardb_sdcard_SECURE_BOOT_defconfig
@@ -1,17 +1,18 @@
CONFIG_ARM=y
CONFIG_TARGET_LS1046ARDB=y
+CONFIG_SECURE_BOOT=y
+CONFIG_FSL_LS_PPA=y
CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1046a-rdb"
-CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
-CONFIG_FSL_LS_PPA=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPL_FSL_PBL"
-CONFIG_SECURE_BOOT=y
CONFIG_SD_BOOT=y
CONFIG_BOOTDELAY=10
CONFIG_SPL=y
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x110
+CONFIG_SPL_CRYPTO_SUPPORT=y
+CONFIG_SPL_HASH_SUPPORT=y
CONFIG_HUSH_PARSER=y
# CONFIG_CMD_IMLS is not set
CONFIG_CMD_GPT=y
@@ -42,5 +43,3 @@ CONFIG_USB=y
CONFIG_DM_USB=y
CONFIG_RSA=y
CONFIG_SPL_RSA=y
-CONFIG_SPL_CRYPTO_SUPPORT=y
-CONFIG_SPL_HASH_SUPPORT=y
diff --git a/configs/ls1046ardb_sdcard_defconfig b/configs/ls1046ardb_sdcard_defconfig
index a3965f245f3..d70a3870eb4 100644
--- a/configs/ls1046ardb_sdcard_defconfig
+++ b/configs/ls1046ardb_sdcard_defconfig
@@ -1,9 +1,8 @@
CONFIG_ARM=y
CONFIG_TARGET_LS1046ARDB=y
+CONFIG_FSL_LS_PPA=y
CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1046a-rdb"
-CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
-CONFIG_FSL_LS_PPA=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPL_FSL_PBL"
CONFIG_SD_BOOT=y
diff --git a/configs/miqi-rk3288_defconfig b/configs/miqi-rk3288_defconfig
index 2b9da554a95..d93bd97e46e 100644
--- a/configs/miqi-rk3288_defconfig
+++ b/configs/miqi-rk3288_defconfig
@@ -60,7 +60,6 @@ CONFIG_DEBUG_UART_BASE=0xff690000
CONFIG_DEBUG_UART_CLOCK=24000000
CONFIG_DEBUG_UART_SHIFT=2
CONFIG_SYS_NS16550=y
-CONFIG_ROCKCHIP_SERIAL=y
CONFIG_SYSRESET=y
CONFIG_USB=y
CONFIG_USB_STORAGE=y
diff --git a/configs/mvebu_db-88f3720_defconfig b/configs/mvebu_db-88f3720_defconfig
index 3e548a84718..4ea142cc2f0 100644
--- a/configs/mvebu_db-88f3720_defconfig
+++ b/configs/mvebu_db-88f3720_defconfig
@@ -26,6 +26,7 @@ CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_CMD_CACHE=y
CONFIG_CMD_TIME=y
+CONFIG_CMD_MVEBU_BUBT=y
CONFIG_CMD_EXT4=y
CONFIG_CMD_EXT4_WRITE=y
CONFIG_CMD_FAT=y
@@ -33,9 +34,6 @@ CONFIG_CMD_FS_GENERIC=y
CONFIG_MAC_PARTITION=y
CONFIG_ISO_PARTITION=y
CONFIG_EFI_PARTITION=y
-CONFIG_CMD_MVEBU_BUBT=y
-CONFIG_SHA1=y
-CONFIG_SHA256=y
CONFIG_BLOCK_CACHE=y
CONFIG_DM_I2C=y
CONFIG_MISC=y
@@ -63,3 +61,5 @@ CONFIG_DM_USB=y
CONFIG_USB_XHCI_HCD=y
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_STORAGE=y
+CONFIG_SHA1=y
+CONFIG_SHA256=y
diff --git a/configs/mvebu_espressobin-88f3720_defconfig b/configs/mvebu_espressobin-88f3720_defconfig
index f02ae64ff14..d5047450b86 100644
--- a/configs/mvebu_espressobin-88f3720_defconfig
+++ b/configs/mvebu_espressobin-88f3720_defconfig
@@ -26,6 +26,7 @@ CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_CMD_CACHE=y
CONFIG_CMD_TIME=y
+CONFIG_CMD_MVEBU_BUBT=y
CONFIG_CMD_EXT4=y
CONFIG_CMD_EXT4_WRITE=y
CONFIG_CMD_FAT=y
@@ -33,9 +34,6 @@ CONFIG_CMD_FS_GENERIC=y
CONFIG_MAC_PARTITION=y
CONFIG_ISO_PARTITION=y
CONFIG_EFI_PARTITION=y
-CONFIG_CMD_MVEBU_BUBT=y
-CONFIG_SHA1=y
-CONFIG_SHA256=y
CONFIG_BLOCK_CACHE=y
CONFIG_DM_I2C=y
CONFIG_MISC=y
@@ -64,3 +62,5 @@ CONFIG_DM_USB=y
CONFIG_USB_XHCI_HCD=y
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_STORAGE=y
+CONFIG_SHA1=y
+CONFIG_SHA256=y
diff --git a/configs/mvebu_mcbin-88f8040_defconfig b/configs/mvebu_mcbin-88f8040_defconfig
index 0de3d9e6a8e..72549201d14 100644
--- a/configs/mvebu_mcbin-88f8040_defconfig
+++ b/configs/mvebu_mcbin-88f8040_defconfig
@@ -21,6 +21,7 @@ CONFIG_CMD_SPI=y
CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
# CONFIG_CMD_FPGA is not set
+CONFIG_CMD_GPIO=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_TFTPPUT=y
CONFIG_CMD_DHCP=y
@@ -29,6 +30,7 @@ CONFIG_CMD_PING=y
CONFIG_CMD_CACHE=y
CONFIG_CMD_TIME=y
CONFIG_CMD_MVEBU_BUBT=y
+CONFIG_CMD_REGULATOR=y
CONFIG_CMD_EXT4=y
CONFIG_CMD_EXT4_WRITE=y
CONFIG_CMD_FAT=y
@@ -36,14 +38,10 @@ CONFIG_CMD_FS_GENERIC=y
CONFIG_MAC_PARTITION=y
CONFIG_ISO_PARTITION=y
CONFIG_EFI_PARTITION=y
-CONFIG_CMD_GPIO=y
-CONFIG_CMD_REGULATOR=y
CONFIG_BLOCK_CACHE=y
+CONFIG_DM_GPIO=y
CONFIG_DM_I2C=y
CONFIG_SYS_I2C_MVTWSI=y
-CONFIG_DM_GPIO=y
-CONFIG_MVEBU_GPIO=y
-CONFIG_DM_REGULATOR_FIXED=y
CONFIG_MISC=y
CONFIG_DM_MMC=y
CONFIG_MMC_SDHCI=y
@@ -59,6 +57,7 @@ CONFIG_DM_PCI=y
CONFIG_PCIE_DW_MVEBU=y
CONFIG_MVEBU_COMPHY_SUPPORT=y
CONFIG_PINCTRL=y
+CONFIG_DM_REGULATOR_FIXED=y
# CONFIG_SPL_SERIAL_PRESENT is not set
CONFIG_DEBUG_UART=y
CONFIG_DEBUG_UART_BASE=0xf0512000
diff --git a/configs/mx7ulp_evk_defconfig b/configs/mx7ulp_evk_defconfig
index ea2a0cf2a58..c457d348d39 100644
--- a/configs/mx7ulp_evk_defconfig
+++ b/configs/mx7ulp_evk_defconfig
@@ -4,22 +4,21 @@ CONFIG_TARGET_MX7ULP_EVK=y
CONFIG_DEFAULT_DEVICE_TREE="imx7ulp-evk"
CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/mx7ulp_evk/imximage.cfg"
CONFIG_HUSH_PARSER=y
+CONFIG_CMD_MMC=y
CONFIG_CMD_I2C=y
+CONFIG_CMD_GPIO=y
CONFIG_OF_CONTROL=y
CONFIG_DM=y
+# CONFIG_BLK is not set
CONFIG_DM_GPIO=y
CONFIG_IMX_RGPIO2P=y
CONFIG_DM_I2C=y
-CONFIG_SYS_LPI2C_IMX=y
-CONFIG_PINCTRL=y
-CONFIG_PINCTRL_IMX7ULP=y
-CONFIG_DM_SERIAL=y
-CONFIG_FSL_LPUART=y
-CONFIG_CMD_MMC=y
CONFIG_DM_MMC=y
# CONFIG_DM_MMC_OPS is not set
-# CONFIG_BLK is not set
+CONFIG_PINCTRL=y
+CONFIG_PINCTRL_IMX7ULP=y
CONFIG_DM_REGULATOR=y
CONFIG_DM_REGULATOR_FIXED=y
CONFIG_DM_REGULATOR_GPIO=y
-CONFIG_CMD_GPIO=y
+CONFIG_DM_SERIAL=y
+CONFIG_FSL_LPUART=y
diff --git a/configs/mx7ulp_evk_plugin_defconfig b/configs/mx7ulp_evk_plugin_defconfig
index d4c36d9c00f..c457d348d39 100644
--- a/configs/mx7ulp_evk_plugin_defconfig
+++ b/configs/mx7ulp_evk_plugin_defconfig
@@ -1,26 +1,24 @@
CONFIG_ARM=y
CONFIG_ARCH_MX7ULP=y
CONFIG_TARGET_MX7ULP_EVK=y
-CONFIG_USE_IMXIMG_PLUGIN=y
CONFIG_DEFAULT_DEVICE_TREE="imx7ulp-evk"
CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/mx7ulp_evk/imximage.cfg"
CONFIG_HUSH_PARSER=y
+CONFIG_CMD_MMC=y
CONFIG_CMD_I2C=y
+CONFIG_CMD_GPIO=y
CONFIG_OF_CONTROL=y
CONFIG_DM=y
+# CONFIG_BLK is not set
CONFIG_DM_GPIO=y
CONFIG_IMX_RGPIO2P=y
CONFIG_DM_I2C=y
-CONFIG_SYS_LPI2C_IMX=y
-CONFIG_PINCTRL=y
-CONFIG_PINCTRL_IMX7ULP=y
-CONFIG_DM_SERIAL=y
-CONFIG_FSL_LPUART=y
-CONFIG_CMD_MMC=y
CONFIG_DM_MMC=y
# CONFIG_DM_MMC_OPS is not set
-# CONFIG_BLK is not set
+CONFIG_PINCTRL=y
+CONFIG_PINCTRL_IMX7ULP=y
CONFIG_DM_REGULATOR=y
CONFIG_DM_REGULATOR_FIXED=y
CONFIG_DM_REGULATOR_GPIO=y
-CONFIG_CMD_GPIO=y
+CONFIG_DM_SERIAL=y
+CONFIG_FSL_LPUART=y
diff --git a/configs/odroid-c2_defconfig b/configs/odroid-c2_defconfig
index 00da76e49ee..c9d01031873 100644
--- a/configs/odroid-c2_defconfig
+++ b/configs/odroid-c2_defconfig
@@ -10,14 +10,13 @@ CONFIG_DEFAULT_DEVICE_TREE="meson-gxbb-odroidc2"
# CONFIG_CMD_IMI is not set
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_LOADS is not set
+CONFIG_CMD_MMC=y
# CONFIG_CMD_FPGA is not set
# CONFIG_CMD_SETEXPR is not set
CONFIG_OF_CONTROL=y
CONFIG_NET_RANDOM_ETHADDR=y
-CONFIG_MMC=y
CONFIG_DM_MMC=y
CONFIG_MMC_MESON_GX=y
-CONFIG_CMD_MMC=y
CONFIG_DM_ETH=y
CONFIG_ETH_DESIGNWARE=y
CONFIG_PINCTRL=y
diff --git a/configs/opos6uldev_defconfig b/configs/opos6uldev_defconfig
index c092cc699a3..4f8f659321c 100644
--- a/configs/opos6uldev_defconfig
+++ b/configs/opos6uldev_defconfig
@@ -3,14 +3,12 @@ CONFIG_ARCH_MX6=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_TARGET_OPOS6ULDEV=y
-CONFIG_SPL_LIBDISK_SUPPORT=y
CONFIG_SPL_MMC_SUPPORT=y
CONFIG_SPL_SERIAL_SUPPORT=y
-CONFIG_SPL_ENV_SUPPORT=y
+CONFIG_SPL_LIBDISK_SUPPORT=y
CONFIG_SPL_WATCHDOG_SUPPORT=y
# CONFIG_CMD_BMODE is not set
CONFIG_VIDEO=y
-CONFIG_SPL_YMODEM_SUPPORT=y
CONFIG_DEFAULT_DEVICE_TREE="imx6ul-opos6uldev"
CONFIG_BOOTDELAY=5
# CONFIG_CONSOLE_MUX is not set
@@ -18,6 +16,8 @@ CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_DEFAULT_FDT_FILE="imx6ul-opos6uldev.dtb"
CONFIG_VERSION_VARIABLE=y
CONFIG_SPL=y
+CONFIG_SPL_ENV_SUPPORT=y
+CONFIG_SPL_YMODEM_SUPPORT=y
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="BIOS> "
CONFIG_CMD_CONFIG=y
diff --git a/configs/orangepi_pc2_defconfig b/configs/orangepi_pc2_defconfig
index 19a5c2b8827..8e01284f753 100644
--- a/configs/orangepi_pc2_defconfig
+++ b/configs/orangepi_pc2_defconfig
@@ -1,19 +1,19 @@
CONFIG_ARM=y
CONFIG_ARCH_SUNXI=y
+CONFIG_SPL_SPI_FLASH_SUPPORT=y
CONFIG_MACH_SUN50I_H5=y
-CONFIG_SPL=y
CONFIG_DRAM_CLK=672
CONFIG_DRAM_ZQ=3881977
CONFIG_DEFAULT_DEVICE_TREE="sun50i-h5-orangepi-pc2"
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
CONFIG_CONSOLE_MUX=y
+CONFIG_SPL=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
# CONFIG_CMD_FPGA is not set
# CONFIG_SPL_DOS_PARTITION is not set
# CONFIG_SPL_ISO_PARTITION is not set
# CONFIG_SPL_EFI_PARTITION is not set
+CONFIG_SPL_SPI_SUNXI=y
CONFIG_SUN8I_EMAC=y
CONFIG_USB_EHCI_HCD=y
-CONFIG_SPL_SPI_SUNXI=y
-CONFIG_SPL_SPI_FLASH_SUPPORT=y
diff --git a/configs/popmetal-rk3288_defconfig b/configs/popmetal-rk3288_defconfig
index 80bc83b2c2d..748cda4f9c7 100644
--- a/configs/popmetal-rk3288_defconfig
+++ b/configs/popmetal-rk3288_defconfig
@@ -42,7 +42,6 @@ CONFIG_SYS_I2C_ROCKCHIP=y
CONFIG_MMC_DW=y
CONFIG_MMC_DW_ROCKCHIP=y
CONFIG_DM_ETH=y
-CONFIG_NETDEVICES=y
CONFIG_ETH_DESIGNWARE=y
CONFIG_GMAC_ROCKCHIP=y
CONFIG_PINCTRL=y
diff --git a/configs/puma-rk3399_defconfig b/configs/puma-rk3399_defconfig
index 137f7fb1ed4..62453604c61 100644
--- a/configs/puma-rk3399_defconfig
+++ b/configs/puma-rk3399_defconfig
@@ -1,10 +1,10 @@
CONFIG_ARM=y
CONFIG_ARCH_ROCKCHIP=y
-CONFIG_TARGET_PUMA_RK3399=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_SYS_MALLOC_F_LEN=0x4000
CONFIG_ROCKCHIP_RK3399=y
+CONFIG_TARGET_PUMA_RK3399=y
CONFIG_SPL_SPI_FLASH_SUPPORT=y
CONFIG_SPL_SPI_SUPPORT=y
CONFIG_SPL_STACK_R_ADDR=0x80000
@@ -12,7 +12,6 @@ CONFIG_DEFAULT_DEVICE_TREE="rk3399-puma"
CONFIG_FIT=y
CONFIG_SPL_FIT=y
CONFIG_SPL_LOAD_FIT=y
-CONFIG_SPL_FIT_SOURCE="board/theobroma-systems/puma_rk3399/fit_spl_atf.its"
# CONFIG_DISPLAY_CPUINFO is not set
# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
# CONFIG_SPL_LEGACY_IMAGE_SUPPORT is not set
@@ -44,7 +43,6 @@ CONFIG_MMC_SDHCI_ROCKCHIP=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_WINBOND=y
CONFIG_PHY_MICREL=y
-CONFIG_PHY_MICREL_KSZ9031=y
CONFIG_DM_ETH=y
CONFIG_ETH_DESIGNWARE=y
CONFIG_GMAC_ROCKCHIP=y
@@ -56,7 +54,6 @@ CONFIG_DM_REGULATOR_FIXED=y
CONFIG_PWM_ROCKCHIP=y
CONFIG_RAM=y
CONFIG_SPL_RAM=y
-CONFIG_BAUDRATE=115200
CONFIG_DEBUG_UART=y
CONFIG_DEBUG_UART_BASE=0xFF180000
CONFIG_DEBUG_UART_CLOCK=24000000
diff --git a/configs/sama5d3_xplained_nandflash_defconfig b/configs/sama5d3_xplained_nandflash_defconfig
index 8cc8169de56..6f2432473dd 100644
--- a/configs/sama5d3_xplained_nandflash_defconfig
+++ b/configs/sama5d3_xplained_nandflash_defconfig
@@ -4,10 +4,10 @@ CONFIG_TARGET_SAMA5D3_XPLAINED=y
CONFIG_SPL_GPIO_SUPPORT=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
-CONFIG_SPL_SERIAL_SUPPORT=y
-CONFIG_SPL_NAND_SUPPORT=y
CONFIG_SYS_MALLOC_F_LEN=0x2000
+CONFIG_SPL_SERIAL_SUPPORT=y
CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
+CONFIG_SPL_NAND_SUPPORT=y
CONFIG_DEFAULT_DEVICE_TREE="at91-sama5d3_xplained"
CONFIG_FIT=y
CONFIG_SYS_EXTRA_OPTIONS="SAMA5D3,SYS_USE_NANDFLASH"
diff --git a/configs/sama5d4_xplained_mmc_defconfig b/configs/sama5d4_xplained_mmc_defconfig
index 2b95a16fc9c..4fc44e57478 100644
--- a/configs/sama5d4_xplained_mmc_defconfig
+++ b/configs/sama5d4_xplained_mmc_defconfig
@@ -4,14 +4,14 @@ CONFIG_TARGET_SAMA5D4_XPLAINED=y
CONFIG_SPL_GPIO_SUPPORT=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
+CONFIG_SYS_MALLOC_F_LEN=0x2000
CONFIG_SPL_MMC_SUPPORT=y
CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
CONFIG_SPL_LIBDISK_SUPPORT=y
CONFIG_SPL_FAT_SUPPORT=y
-CONFIG_SYS_MALLOC_F_LEN=0x2000
-CONFIG_FIT=y
-CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
CONFIG_DEFAULT_DEVICE_TREE="at91-sama5d4_xplained"
+CONFIG_FIT=y
CONFIG_SYS_EXTRA_OPTIONS="SAMA5D4,SYS_USE_MMC"
CONFIG_BOOTDELAY=3
# CONFIG_DISPLAY_BOARDINFO is not set
diff --git a/configs/sama5d4_xplained_nandflash_defconfig b/configs/sama5d4_xplained_nandflash_defconfig
index b0466c29739..02defebbc53 100644
--- a/configs/sama5d4_xplained_nandflash_defconfig
+++ b/configs/sama5d4_xplained_nandflash_defconfig
@@ -4,12 +4,12 @@ CONFIG_TARGET_SAMA5D4_XPLAINED=y
CONFIG_SPL_GPIO_SUPPORT=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
-CONFIG_SPL_SERIAL_SUPPORT=y
-CONFIG_SPL_NAND_SUPPORT=y
CONFIG_SYS_MALLOC_F_LEN=0x2000
-CONFIG_FIT=y
+CONFIG_SPL_SERIAL_SUPPORT=y
CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
+CONFIG_SPL_NAND_SUPPORT=y
CONFIG_DEFAULT_DEVICE_TREE="at91-sama5d4_xplained"
+CONFIG_FIT=y
CONFIG_SYS_EXTRA_OPTIONS="SAMA5D4,SYS_USE_NANDFLASH"
CONFIG_BOOTDELAY=3
# CONFIG_DISPLAY_BOARDINFO is not set
diff --git a/configs/sama5d4ek_mmc_defconfig b/configs/sama5d4ek_mmc_defconfig
index 8601d5622b2..204d128395e 100644
--- a/configs/sama5d4ek_mmc_defconfig
+++ b/configs/sama5d4ek_mmc_defconfig
@@ -4,12 +4,12 @@ CONFIG_TARGET_SAMA5D4EK=y
CONFIG_SPL_GPIO_SUPPORT=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
+CONFIG_SYS_MALLOC_F_LEN=0x2000
CONFIG_SPL_MMC_SUPPORT=y
CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
CONFIG_SPL_LIBDISK_SUPPORT=y
CONFIG_SPL_FAT_SUPPORT=y
-CONFIG_SYS_MALLOC_F_LEN=0x2000
-CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
CONFIG_DEFAULT_DEVICE_TREE="at91-sama5d4ek"
CONFIG_FIT=y
CONFIG_SYS_EXTRA_OPTIONS="SAMA5D4,SYS_USE_MMC"
@@ -72,4 +72,3 @@ CONFIG_USB_STORAGE=y
CONFIG_USB_GADGET=y
CONFIG_USB_GADGET_ATMEL_USBA=y
CONFIG_LCD=y
-CONFIG_OF_LIBFDT=y
diff --git a/configs/sama5d4ek_nandflash_defconfig b/configs/sama5d4ek_nandflash_defconfig
index a9bcabf1825..494edc1b1c0 100644
--- a/configs/sama5d4ek_nandflash_defconfig
+++ b/configs/sama5d4ek_nandflash_defconfig
@@ -4,15 +4,14 @@ CONFIG_TARGET_SAMA5D4EK=y
CONFIG_SPL_GPIO_SUPPORT=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
-CONFIG_SPL_SERIAL_SUPPORT=y
-CONFIG_SPL_NAND_SUPPORT=y
CONFIG_SYS_MALLOC_F_LEN=0x2000
+CONFIG_SPL_SERIAL_SUPPORT=y
CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
+CONFIG_SPL_NAND_SUPPORT=y
CONFIG_DEFAULT_DEVICE_TREE="at91-sama5d4ek"
CONFIG_FIT=y
CONFIG_SYS_EXTRA_OPTIONS="SAMA5D4,SYS_USE_NANDFLASH"
CONFIG_BOOTDELAY=3
-CONFIG_SYS_CONSOLE_IS_IN_ENV=y
# CONFIG_CONSOLE_MUX is not set
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
# CONFIG_DISPLAY_BOARDINFO is not set
diff --git a/configs/sama5d4ek_spiflash_defconfig b/configs/sama5d4ek_spiflash_defconfig
index b56fd631f5f..41f16ea871b 100644
--- a/configs/sama5d4ek_spiflash_defconfig
+++ b/configs/sama5d4ek_spiflash_defconfig
@@ -13,7 +13,6 @@ CONFIG_DEFAULT_DEVICE_TREE="at91-sama5d4ek"
CONFIG_FIT=y
CONFIG_SYS_EXTRA_OPTIONS="SAMA5D4,SYS_USE_SERIALFLASH"
CONFIG_BOOTDELAY=3
-CONFIG_SYS_CONSOLE_IS_IN_ENV=y
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_SPL=y
CONFIG_HUSH_PARSER=y
diff --git a/configs/sandbox_defconfig b/configs/sandbox_defconfig
index 7db9807e611..d3fee89f48c 100644
--- a/configs/sandbox_defconfig
+++ b/configs/sandbox_defconfig
@@ -141,6 +141,8 @@ CONFIG_REGULATOR_RK808=y
CONFIG_REGULATOR_S5M8767=y
CONFIG_DM_REGULATOR_SANDBOX=y
CONFIG_REGULATOR_TPS65090=y
+CONFIG_DM_PWM=y
+CONFIG_PWM_SANDBOX=y
CONFIG_RAM=y
CONFIG_REMOTEPROC_SANDBOX=y
CONFIG_DM_RESET=y
@@ -178,5 +180,3 @@ CONFIG_UNIT_TEST=y
CONFIG_UT_TIME=y
CONFIG_UT_DM=y
CONFIG_UT_ENV=y
-CONFIG_DM_PWM=y
-CONFIG_PWM_SANDBOX=y
diff --git a/configs/sandbox_noblk_defconfig b/configs/sandbox_noblk_defconfig
index d051fde990f..fb98ab8b6ea 100644
--- a/configs/sandbox_noblk_defconfig
+++ b/configs/sandbox_noblk_defconfig
@@ -145,6 +145,8 @@ CONFIG_REGULATOR_RK808=y
CONFIG_REGULATOR_S5M8767=y
CONFIG_DM_REGULATOR_SANDBOX=y
CONFIG_REGULATOR_TPS65090=y
+CONFIG_DM_PWM=y
+CONFIG_PWM_SANDBOX=y
CONFIG_RAM=y
CONFIG_REMOTEPROC_SANDBOX=y
CONFIG_DM_RTC=y
@@ -180,5 +182,3 @@ CONFIG_UNIT_TEST=y
CONFIG_UT_TIME=y
CONFIG_UT_DM=y
CONFIG_UT_ENV=y
-CONFIG_DM_PWM=y
-CONFIG_PWM_SANDBOX=y
diff --git a/configs/sandbox_spl_defconfig b/configs/sandbox_spl_defconfig
index ef41fce104a..9b7b1fef52b 100644
--- a/configs/sandbox_spl_defconfig
+++ b/configs/sandbox_spl_defconfig
@@ -147,6 +147,8 @@ CONFIG_REGULATOR_RK808=y
CONFIG_REGULATOR_S5M8767=y
CONFIG_DM_REGULATOR_SANDBOX=y
CONFIG_REGULATOR_TPS65090=y
+CONFIG_DM_PWM=y
+CONFIG_PWM_SANDBOX=y
CONFIG_RAM=y
CONFIG_REMOTEPROC_SANDBOX=y
CONFIG_DM_RESET=y
@@ -184,5 +186,3 @@ CONFIG_UNIT_TEST=y
CONFIG_UT_TIME=y
CONFIG_UT_DM=y
CONFIG_UT_ENV=y
-CONFIG_DM_PWM=y
-CONFIG_PWM_SANDBOX=y
diff --git a/configs/sh7752evb_defconfig b/configs/sh7752evb_defconfig
index 224b55bc90c..4e19243f0d3 100644
--- a/configs/sh7752evb_defconfig
+++ b/configs/sh7752evb_defconfig
@@ -11,6 +11,7 @@ CONFIG_VERSION_VARIABLE=y
# CONFIG_CMD_XIMG is not set
# CONFIG_CMD_EDITENV is not set
# CONFIG_CMD_ENV_EXISTS is not set
+CONFIG_CMD_MD5SUM=y
# CONFIG_CMD_LOADB is not set
# CONFIG_CMD_FLASH is not set
CONFIG_CMD_MMC=y
@@ -27,7 +28,6 @@ CONFIG_CMD_EXT2=y
CONFIG_MAC_PARTITION=y
CONFIG_DOS_PARTITION=y
CONFIG_MMC=y
-CONFIG_CMD_MD5SUM=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_MACRONIX=y
CONFIG_SPI_FLASH_STMICRO=y
diff --git a/configs/sh7753evb_defconfig b/configs/sh7753evb_defconfig
index 7bf886290d4..23b7d7df487 100644
--- a/configs/sh7753evb_defconfig
+++ b/configs/sh7753evb_defconfig
@@ -10,6 +10,7 @@ CONFIG_VERSION_VARIABLE=y
# CONFIG_CMD_XIMG is not set
# CONFIG_CMD_EDITENV is not set
# CONFIG_CMD_ENV_EXISTS is not set
+CONFIG_CMD_MD5SUM=y
# CONFIG_CMD_LOADB is not set
# CONFIG_CMD_FLASH is not set
CONFIG_CMD_MMC=y
@@ -26,7 +27,6 @@ CONFIG_CMD_EXT2=y
CONFIG_MAC_PARTITION=y
CONFIG_DOS_PARTITION=y
CONFIG_MMC=y
-CONFIG_CMD_MD5SUM=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_MACRONIX=y
CONFIG_SPI_FLASH_STMICRO=y
diff --git a/configs/sh7757lcr_defconfig b/configs/sh7757lcr_defconfig
index 00870ac720a..44224e1e438 100644
--- a/configs/sh7757lcr_defconfig
+++ b/configs/sh7757lcr_defconfig
@@ -11,6 +11,7 @@ CONFIG_VERSION_VARIABLE=y
# CONFIG_CMD_XIMG is not set
# CONFIG_CMD_EDITENV is not set
# CONFIG_CMD_ENV_EXISTS is not set
+CONFIG_CMD_MD5SUM=y
# CONFIG_CMD_LOADB is not set
# CONFIG_CMD_FLASH is not set
CONFIG_CMD_MMC=y
@@ -27,7 +28,6 @@ CONFIG_CMD_EXT2=y
CONFIG_MAC_PARTITION=y
CONFIG_DOS_PARTITION=y
CONFIG_MMC=y
-CONFIG_CMD_MD5SUM=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_STMICRO=y
CONFIG_USE_PRIVATE_LIBGCC=y
diff --git a/configs/socfpga_arria5_defconfig b/configs/socfpga_arria5_defconfig
index 5aa8e253154..a565384ea12 100644
--- a/configs/socfpga_arria5_defconfig
+++ b/configs/socfpga_arria5_defconfig
@@ -4,11 +4,11 @@ CONFIG_SYS_MALLOC_F_LEN=0x2000
CONFIG_TARGET_SOCFPGA_ARRIA5_SOCDK=y
CONFIG_SPL_STACK_R_ADDR=0x00800000
CONFIG_DEFAULT_DEVICE_TREE="socfpga_arria5_socdk"
-CONFIG_DEFAULT_FDT_FILE="socfpga_arria5_socdk.dtb"
CONFIG_FIT=y
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE=y
CONFIG_SYS_CONSOLE_ENV_OVERWRITE=y
+CONFIG_DEFAULT_FDT_FILE="socfpga_arria5_socdk.dtb"
CONFIG_VERSION_VARIABLE=y
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_SPL=y
@@ -65,5 +65,3 @@ CONFIG_G_DNL_MANUFACTURER="altera"
CONFIG_G_DNL_VENDOR_NUM=0x0525
CONFIG_G_DNL_PRODUCT_NUM=0xa4a5
CONFIG_USE_TINY_PRINTF=y
-CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION_TYPE=y
-CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION_TYPE=0xa2
diff --git a/configs/socfpga_cyclone5_defconfig b/configs/socfpga_cyclone5_defconfig
index c8b80844552..06fc82c2617 100644
--- a/configs/socfpga_cyclone5_defconfig
+++ b/configs/socfpga_cyclone5_defconfig
@@ -4,11 +4,11 @@ CONFIG_SYS_MALLOC_F_LEN=0x2000
CONFIG_TARGET_SOCFPGA_CYCLONE5_SOCDK=y
CONFIG_SPL_STACK_R_ADDR=0x00800000
CONFIG_DEFAULT_DEVICE_TREE="socfpga_cyclone5_socdk"
-CONFIG_DEFAULT_FDT_FILE="socfpga_cyclone5_socdk.dtb"
CONFIG_FIT=y
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE=y
CONFIG_SYS_CONSOLE_ENV_OVERWRITE=y
+CONFIG_DEFAULT_FDT_FILE="socfpga_cyclone5_socdk.dtb"
CONFIG_VERSION_VARIABLE=y
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_SPL=y
@@ -65,5 +65,3 @@ CONFIG_G_DNL_MANUFACTURER="altera"
CONFIG_G_DNL_VENDOR_NUM=0x0525
CONFIG_G_DNL_PRODUCT_NUM=0xa4a5
CONFIG_USE_TINY_PRINTF=y
-CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION_TYPE=y
-CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION_TYPE=0xa2
diff --git a/configs/socfpga_de0_nano_soc_defconfig b/configs/socfpga_de0_nano_soc_defconfig
index b122135690d..0697e2ec373 100644
--- a/configs/socfpga_de0_nano_soc_defconfig
+++ b/configs/socfpga_de0_nano_soc_defconfig
@@ -4,11 +4,11 @@ CONFIG_SYS_MALLOC_F_LEN=0x2000
CONFIG_TARGET_SOCFPGA_TERASIC_DE0_NANO=y
CONFIG_SPL_STACK_R_ADDR=0x00800000
CONFIG_DEFAULT_DEVICE_TREE="socfpga_cyclone5_de0_nano_soc"
-CONFIG_DEFAULT_FDT_FILE="socfpga_cyclone5_de0_nano_soc.dtb"
CONFIG_FIT=y
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE=y
CONFIG_SYS_CONSOLE_ENV_OVERWRITE=y
+CONFIG_DEFAULT_FDT_FILE="socfpga_cyclone5_de0_nano_soc.dtb"
CONFIG_VERSION_VARIABLE=y
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_SPL=y
@@ -59,5 +59,3 @@ CONFIG_G_DNL_MANUFACTURER="terasic"
CONFIG_G_DNL_VENDOR_NUM=0x0525
CONFIG_G_DNL_PRODUCT_NUM=0xa4a5
CONFIG_USE_TINY_PRINTF=y
-CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION_TYPE=y
-CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION_TYPE=0xa2
\ No newline at end of file
diff --git a/configs/socfpga_de10_nano_defconfig b/configs/socfpga_de10_nano_defconfig
index 2fcd95cd55a..cd64fb90c34 100644
--- a/configs/socfpga_de10_nano_defconfig
+++ b/configs/socfpga_de10_nano_defconfig
@@ -4,11 +4,11 @@ CONFIG_SYS_MALLOC_F_LEN=0x2000
CONFIG_TARGET_SOCFPGA_TERASIC_DE10_NANO=y
CONFIG_SPL_STACK_R_ADDR=0x00800000
CONFIG_DEFAULT_DEVICE_TREE="socfpga_cyclone5_de10_nano"
-CONFIG_DEFAULT_FDT_FILE="socfpga_cyclone5_de10_nano.dtb"
CONFIG_FIT=y
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE=y
CONFIG_SYS_CONSOLE_ENV_OVERWRITE=y
+CONFIG_DEFAULT_FDT_FILE="socfpga_cyclone5_de10_nano.dtb"
CONFIG_VERSION_VARIABLE=y
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_SPL=y
diff --git a/configs/socfpga_de1_soc_defconfig b/configs/socfpga_de1_soc_defconfig
index 211ea410223..bba90bef28a 100644
--- a/configs/socfpga_de1_soc_defconfig
+++ b/configs/socfpga_de1_soc_defconfig
@@ -5,11 +5,11 @@ CONFIG_SYS_MALLOC_F_LEN=0x2000
CONFIG_TARGET_SOCFPGA_TERASIC_DE1_SOC=y
CONFIG_SPL_STACK_R_ADDR=0x00800000
CONFIG_DEFAULT_DEVICE_TREE="socfpga_cyclone5_de1_soc"
-CONFIG_DEFAULT_FDT_FILE="socfpga_cyclone5_de1_soc.dtb"
CONFIG_FIT=y
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE=y
CONFIG_SYS_CONSOLE_ENV_OVERWRITE=y
+CONFIG_DEFAULT_FDT_FILE="socfpga_cyclone5_de1_soc.dtb"
CONFIG_VERSION_VARIABLE=y
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_SPL=y
diff --git a/configs/socfpga_sockit_defconfig b/configs/socfpga_sockit_defconfig
index bf607830ac6..bf5d63db3cd 100644
--- a/configs/socfpga_sockit_defconfig
+++ b/configs/socfpga_sockit_defconfig
@@ -4,11 +4,11 @@ CONFIG_SYS_MALLOC_F_LEN=0x2000
CONFIG_TARGET_SOCFPGA_TERASIC_SOCKIT=y
CONFIG_SPL_STACK_R_ADDR=0x00800000
CONFIG_DEFAULT_DEVICE_TREE="socfpga_cyclone5_sockit"
-CONFIG_DEFAULT_FDT_FILE="socfpga_cyclone5_sockit.dtb"
CONFIG_FIT=y
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE=y
CONFIG_SYS_CONSOLE_ENV_OVERWRITE=y
+CONFIG_DEFAULT_FDT_FILE="socfpga_cyclone5_sockit.dtb"
CONFIG_VERSION_VARIABLE=y
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_SPL=y
diff --git a/configs/socfpga_socrates_defconfig b/configs/socfpga_socrates_defconfig
index 4246ad65162..5915fafbbb9 100644
--- a/configs/socfpga_socrates_defconfig
+++ b/configs/socfpga_socrates_defconfig
@@ -4,11 +4,11 @@ CONFIG_SYS_MALLOC_F_LEN=0x2000
CONFIG_TARGET_SOCFPGA_EBV_SOCRATES=y
CONFIG_SPL_STACK_R_ADDR=0x00800000
CONFIG_DEFAULT_DEVICE_TREE="socfpga_cyclone5_socrates"
-CONFIG_DEFAULT_FDT_FILE="socfpga_cyclone5_socrates.dtb"
CONFIG_FIT=y
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE=y
CONFIG_SYS_CONSOLE_ENV_OVERWRITE=y
+CONFIG_DEFAULT_FDT_FILE="socfpga_cyclone5_socrates.dtb"
CONFIG_VERSION_VARIABLE=y
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_SPL=y
diff --git a/configs/socfpga_sr1500_defconfig b/configs/socfpga_sr1500_defconfig
index ac1ed53eb43..4468d3b71df 100644
--- a/configs/socfpga_sr1500_defconfig
+++ b/configs/socfpga_sr1500_defconfig
@@ -4,12 +4,12 @@ CONFIG_SYS_MALLOC_F_LEN=0x2000
CONFIG_TARGET_SOCFPGA_SR1500=y
CONFIG_SPL_STACK_R_ADDR=0x00800000
CONFIG_DEFAULT_DEVICE_TREE="socfpga_cyclone5_sr1500"
-CONFIG_DEFAULT_FDT_FILE="socfpga_cyclone5_sr1500.dtb"
CONFIG_FIT=y
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE=y
CONFIG_SYS_CONSOLE_ENV_OVERWRITE=y
CONFIG_SYS_CONSOLE_INFO_QUIET=y
+CONFIG_DEFAULT_FDT_FILE="socfpga_cyclone5_sr1500.dtb"
CONFIG_VERSION_VARIABLE=y
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_BOARD_EARLY_INIT_F=y
diff --git a/configs/stm32f746-disco_defconfig b/configs/stm32f746-disco_defconfig
index b5457c6a24e..ea98391684b 100644
--- a/configs/stm32f746-disco_defconfig
+++ b/configs/stm32f746-disco_defconfig
@@ -26,6 +26,7 @@ CONFIG_CMD_TIMER=y
CONFIG_OF_CONTROL=y
CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_NETCONSOLE=y
+CONFIG_CLK=y
# CONFIG_MMC is not set
CONFIG_MTD=y
CONFIG_MTD_NOR_FLASH=y
@@ -34,12 +35,11 @@ CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_STMICRO=y
CONFIG_DM_ETH=y
CONFIG_ETH_DESIGNWARE=y
+CONFIG_PINCTRL=y
+# CONFIG_PINCTRL_FULL is not set
+CONFIG_PINCTRL_STM32=y
# CONFIG_SPL_SERIAL_PRESENT is not set
CONFIG_DM_SPI=y
CONFIG_STM32_QSPI=y
CONFIG_OF_LIBFDT_OVERLAY=y
# CONFIG_EFI_LOADER is not set
-CONFIG_CLK=y
-CONFIG_PINCTRL=y
-# CONFIG_PINCTRL_FULL is not set
-CONFIG_PINCTRL_STM32=y
diff --git a/configs/tinker-rk3288_defconfig b/configs/tinker-rk3288_defconfig
index cd9189f0aff..ada59504aa7 100644
--- a/configs/tinker-rk3288_defconfig
+++ b/configs/tinker-rk3288_defconfig
@@ -42,7 +42,6 @@ CONFIG_SYS_I2C_ROCKCHIP=y
CONFIG_MMC_DW=y
CONFIG_MMC_DW_ROCKCHIP=y
CONFIG_DM_ETH=y
-CONFIG_NETDEVICES=y
CONFIG_ETH_DESIGNWARE=y
CONFIG_GMAC_ROCKCHIP=y
CONFIG_PINCTRL=y
diff --git a/configs/trats2_defconfig b/configs/trats2_defconfig
index 6f9bdb28f43..8c92f2f4085 100644
--- a/configs/trats2_defconfig
+++ b/configs/trats2_defconfig
@@ -34,15 +34,15 @@ CONFIG_CMD_FAT=y
CONFIG_CMD_FS_GENERIC=y
CONFIG_ISO_PARTITION=y
CONFIG_OF_CONTROL=y
-CONFIG_DM_I2C_GPIO=y
CONFIG_DFU_MMC=y
+CONFIG_DM_I2C_GPIO=y
+CONFIG_SYS_I2C_S3C24X0=y
CONFIG_MMC_DW=y
CONFIG_MMC_SDHCI=y
CONFIG_MMC_SDHCI_SDMA=y
CONFIG_MMC_SDHCI_S5P=y
CONFIG_DM_PMIC=y
CONFIG_DM_PMIC_MAX77686=y
-CONFIG_SYS_I2C_S3C24X0=y
CONFIG_USB=y
CONFIG_DM_USB=y
CONFIG_USB_GADGET=y
diff --git a/configs/trats_defconfig b/configs/trats_defconfig
index 23024fdd6db..09797c31412 100644
--- a/configs/trats_defconfig
+++ b/configs/trats_defconfig
@@ -35,13 +35,13 @@ CONFIG_ISO_PARTITION=y
CONFIG_OF_CONTROL=y
CONFIG_DFU_MMC=y
CONFIG_DM_I2C_GPIO=y
+CONFIG_SYS_I2C_S3C24X0=y
CONFIG_MMC_DW=y
CONFIG_MMC_SDHCI=y
CONFIG_MMC_SDHCI_SDMA=y
CONFIG_MMC_SDHCI_S5P=y
CONFIG_DM_PMIC=y
CONFIG_PMIC_MAX8997=y
-CONFIG_SYS_I2C_S3C24X0=y
CONFIG_USB=y
CONFIG_DM_USB=y
CONFIG_USB_GADGET=y
diff --git a/configs/vf610twr_defconfig b/configs/vf610twr_defconfig
index 12f269662f2..9198f65eaa0 100644
--- a/configs/vf610twr_defconfig
+++ b/configs/vf610twr_defconfig
@@ -1,6 +1,5 @@
CONFIG_ARM=y
CONFIG_ARCH_VF610=y
-CONFIG_TARGET_VF610TWR=y
CONFIG_DEFAULT_DEVICE_TREE="vf610-twr"
CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/vf610twr/imximage.cfg,ENV_IS_IN_MMC"
CONFIG_BOOTDELAY=3
diff --git a/configs/vf610twr_nand_defconfig b/configs/vf610twr_nand_defconfig
index a313910decb..ba4e5965cad 100644
--- a/configs/vf610twr_nand_defconfig
+++ b/configs/vf610twr_nand_defconfig
@@ -1,6 +1,5 @@
CONFIG_ARM=y
CONFIG_ARCH_VF610=y
-CONFIG_TARGET_VF610TWR=y
CONFIG_DEFAULT_DEVICE_TREE="vf610-twr"
CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/vf610twr/imximage.cfg,ENV_IS_IN_NAND"
CONFIG_BOOTDELAY=3
--
GitLab
From 1f677e4266b1265fca9c8cc93f755900b3ce7503 Mon Sep 17 00:00:00 2001
From: "xypron.glpk@gmx.de" <xypron.glpk@gmx.de>
Date: Sat, 15 Apr 2017 21:30:39 +0200
Subject: [PATCH 195/282] meson: gxbb: enable MMC as boot target
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
To enable automatic booting from SD card or eMMC the MMC
devices 0, 1, and 2 are added to the BOOT_TARGET_DEVICES.
Booting from SD card, eMMC, and DHCP are tried in sequence.
A missing or failing device is gracefully handled.
Cc: Andreas Färber <afaerber@suse.de>
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Tested-by: Vagrant Cascadian <vagrant@debian.org>
Reviewed-by: Andreas Färber <afaerber@suse.de>
Tested-by: Andreas Färber <afaerber@suse.de>
---
include/configs/meson-gxbb-common.h | 3 +++
1 file changed, 3 insertions(+)
diff --git a/include/configs/meson-gxbb-common.h b/include/configs/meson-gxbb-common.h
index cc2b5b61d4f..997ce2df198 100644
--- a/include/configs/meson-gxbb-common.h
+++ b/include/configs/meson-gxbb-common.h
@@ -39,6 +39,9 @@
#include <config_distro_defaults.h>
#define BOOT_TARGET_DEVICES(func) \
+ func(MMC, mmc, 0) \
+ func(MMC, mmc, 1) \
+ func(MMC, mmc, 2) \
func(DHCP, dhcp, na)
#include <config_distro_bootcmd.h>
--
GitLab
From d03857485e7f0e61fa778d2f64a6d0cf92bb54f7 Mon Sep 17 00:00:00 2001
From: "xypron.glpk@gmx.de" <xypron.glpk@gmx.de>
Date: Fri, 14 Apr 2017 20:04:46 +0200
Subject: [PATCH 196/282] meson: gxbb: change ramdisk_addr_r
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
0x10000000 is the start of a 2 MiB area used by the
ARM Trusted Firmware (BL31).
See
https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux-stable.git/tree/arch/arm64/boot/dts/amlogic/meson-gx.dtsi?id=refs/tags/v4.10.10
So we should not load the ramdisk here.
The legacy Ubuntu image for the Odroid C2 comes with the
following line in boot.ini:
setenv initrd_loadaddr "0x13000000"
See
http://odroid.in/ubuntu_16.04lts/ubuntu64-16.04-minimal-odroid-c2-20160815.img.xz
http://deb.odroid.in/c2/pool/main/u/u-boot/u-boot_20170226-752a100-8_arm64.deb
So let's use the same address.
With the patch booting Linux with booti succeeds on an Odroid C2,
without the patch Linux hangs.
Cc: Andreas Färber <afaerber@suse.de>
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Vagrant Cascadian <vagrant@debian.org>
---
include/configs/meson-gxbb-common.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/include/configs/meson-gxbb-common.h b/include/configs/meson-gxbb-common.h
index 997ce2df198..fab2e671171 100644
--- a/include/configs/meson-gxbb-common.h
+++ b/include/configs/meson-gxbb-common.h
@@ -51,7 +51,7 @@
"scriptaddr=0x1f000000\0" \
"kernel_addr_r=0x01080000\0" \
"pxefile_addr_r=0x01080000\0" \
- "ramdisk_addr_r=0x10000000\0" \
+ "ramdisk_addr_r=0x13000000\0" \
MESON_FDTFILE_SETTING \
BOOTENV
--
GitLab
From 7880dcf04c42ec4fe73b86e3b366ac56aab74ca6 Mon Sep 17 00:00:00 2001
From: "xypron.glpk@gmx.de" <xypron.glpk@gmx.de>
Date: Sat, 15 Apr 2017 11:29:06 +0200
Subject: [PATCH 197/282] odroid-c2: README: MMC is supported
Mention eMMC and microSD as supported devices.
They have been enabled with patch
d0c5c8d529f16fa88ab52a3b5dd2d4fc03664f19
odroid-c2: enable new Meson GX MMC driver in board defconfig
which was accepted for u-boot-mmc.git.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
---
board/amlogic/odroid-c2/README | 1 +
1 file changed, 1 insertion(+)
diff --git a/board/amlogic/odroid-c2/README b/board/amlogic/odroid-c2/README
index d6d266a5cee..b407c049526 100644
--- a/board/amlogic/odroid-c2/README
+++ b/board/amlogic/odroid-c2/README
@@ -18,6 +18,7 @@ Schematics are available on the manufacturer website.
Currently the u-boot port supports the following devices:
- serial
+ - eMMC, microSD
- Ethernet
u-boot compilation
--
GitLab
From a63d800196ebee59b0f8ff924f67843cd597a8c1 Mon Sep 17 00:00:00 2001
From: Tom Rini <trini@konsulko.com>
Date: Mon, 1 May 2017 19:54:41 -0400
Subject: [PATCH 198/282] Prepare v2017.05-rc3
Signed-off-by: Tom Rini <trini@konsulko.com>
---
Makefile | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/Makefile b/Makefile
index 131d62e0a79..b8816add1fc 100644
--- a/Makefile
+++ b/Makefile
@@ -5,7 +5,7 @@
VERSION = 2017
PATCHLEVEL = 05
SUBLEVEL =
-EXTRAVERSION = -rc2
+EXTRAVERSION = -rc3
NAME =
# *DOCUMENTATION*
--
GitLab
From 3abfd887e820010d73839263e49849dcefc9b59e Mon Sep 17 00:00:00 2001
From: Masahiro Yamada <yamada.masahiro@socionext.com>
Date: Fri, 28 Apr 2017 19:42:18 +0900
Subject: [PATCH 199/282] ARM: sunxi: move board/sunxi/Kconfig to
arch/arm/mach-sunxi/Kconfig
For the consistent location of SoC-level Kconfig.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
---
arch/arm/Kconfig | 3 ++-
{board/sunxi => arch/arm/mach-sunxi}/Kconfig | 0
2 files changed, 2 insertions(+), 1 deletion(-)
rename {board/sunxi => arch/arm/mach-sunxi}/Kconfig (100%)
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 42f93b4670d..07fd1e08e44 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -1226,6 +1226,8 @@ source "arch/arm/mach-sti/Kconfig"
source "arch/arm/mach-stm32/Kconfig"
+source "arch/arm/mach-sunxi/Kconfig"
+
source "arch/arm/mach-tegra/Kconfig"
source "arch/arm/mach-uniphier/Kconfig"
@@ -1311,7 +1313,6 @@ source "board/spear/spear320/Kconfig"
source "board/spear/spear600/Kconfig"
source "board/spear/x600/Kconfig"
source "board/st/stv0991/Kconfig"
-source "board/sunxi/Kconfig"
source "board/syteco/zmx25/Kconfig"
source "board/tcl/sl50/Kconfig"
source "board/ti/am335x/Kconfig"
diff --git a/board/sunxi/Kconfig b/arch/arm/mach-sunxi/Kconfig
similarity index 100%
rename from board/sunxi/Kconfig
rename to arch/arm/mach-sunxi/Kconfig
--
GitLab
From af83a604b33dde3bbc75fe7b467e649970d674e8 Mon Sep 17 00:00:00 2001
From: Masahiro Yamada <yamada.masahiro@socionext.com>
Date: Fri, 28 Apr 2017 19:42:19 +0900
Subject: [PATCH 200/282] ARM: sunxi: use imply instead of bare default y in
Kconfig
Fix annoying config redefines in SoC/board level Kconfig.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
---
arch/arm/Kconfig | 8 ++++++++
arch/arm/mach-sunxi/Kconfig | 26 --------------------------
2 files changed, 8 insertions(+), 26 deletions(-)
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 07fd1e08e44..3adafd6c6e2 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -822,6 +822,14 @@ config ARCH_SUNXI
select USB_STORAGE if DISTRO_DEFAULTS
select USB_KEYBOARD if DISTRO_DEFAULTS
select USE_TINY_PRINTF
+ imply PRE_CONSOLE_BUFFER
+ imply SPL_GPIO_SUPPORT
+ imply SPL_LIBCOMMON_SUPPORT
+ imply SPL_LIBDISK_SUPPORT
+ imply SPL_LIBGENERIC_SUPPORT
+ imply SPL_MMC_SUPPORT if GENERIC_MMC
+ imply SPL_POWER_SUPPORT
+ imply SPL_SERIAL_SUPPORT
config TARGET_TS4600
bool "Support TS4600"
diff --git a/arch/arm/mach-sunxi/Kconfig b/arch/arm/mach-sunxi/Kconfig
index ac3be300fed..8d9900e00b5 100644
--- a/arch/arm/mach-sunxi/Kconfig
+++ b/arch/arm/mach-sunxi/Kconfig
@@ -3,32 +3,6 @@ if ARCH_SUNXI
config IDENT_STRING
default " Allwinner Technology"
-# FIXME: Should not redefine these Kconfig symbols
-config PRE_CONSOLE_BUFFER
- default y
-
-config SPL_GPIO_SUPPORT
- default y
-
-config SPL_LIBCOMMON_SUPPORT
- default y
-
-config SPL_LIBDISK_SUPPORT
- default y
-
-config SPL_LIBGENERIC_SUPPORT
- default y
-
-config SPL_MMC_SUPPORT
- depends on SPL && GENERIC_MMC
- default y
-
-config SPL_POWER_SUPPORT
- default y
-
-config SPL_SERIAL_SUPPORT
- default y
-
config SUNXI_HIGH_SRAM
bool
default n
--
GitLab
From 9946631a0f2d8e8493ea17e9fe1f0e190aa3372d Mon Sep 17 00:00:00 2001
From: Icenowy Zheng <icenowy@aosc.io>
Date: Mon, 1 May 2017 14:31:56 +0800
Subject: [PATCH 201/282] sunxi: add clock configuration of R40 sata
R40 has a similar SATA controller with the ones on A10/A20, but with a
reset line added (like other peripherals on sun6i+), and two extra VDD
pins added (1.2v and 2.5v).
Add clock configuration of R40 SATA.
Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
---
arch/arm/include/asm/arch-sunxi/clock_sun6i.h | 18 ++++++++++++++++--
arch/arm/mach-sunxi/clock_sun6i.c | 7 +++++++
2 files changed, 23 insertions(+), 2 deletions(-)
diff --git a/arch/arm/include/asm/arch-sunxi/clock_sun6i.h b/arch/arm/include/asm/arch-sunxi/clock_sun6i.h
index a44ea775763..faa14791f99 100644
--- a/arch/arm/include/asm/arch-sunxi/clock_sun6i.h
+++ b/arch/arm/include/asm/arch-sunxi/clock_sun6i.h
@@ -25,7 +25,7 @@ struct sunxi_ccm_reg {
u32 pll6_cfg; /* 0x28 pll6 control */
u32 reserved5;
u32 pll7_cfg; /* 0x30 pll7 control */
- u32 reserved6;
+ u32 sata_pll_cfg; /* 0x34 SATA pll control (R40 only) */
u32 pll8_cfg; /* 0x38 pll8 control */
u32 reserved7;
u32 mipi_pll_cfg; /* 0x40 MIPI pll control */
@@ -58,7 +58,8 @@ struct sunxi_ccm_reg {
u32 i2s1_clk_cfg; /* 0xb4 I2S1 clock control */
u32 reserved10[2];
u32 spdif_clk_cfg; /* 0xc0 SPDIF clock control */
- u32 reserved11[2];
+ u32 reserved11;
+ u32 sata_clk_cfg; /* 0xc8 SATA clock control (R40 only) */
u32 usb_clk_cfg; /* 0xcc USB clock control */
u32 gmac_clk_cfg; /* 0xd0 GMAC clock control */
u32 reserved12[7];
@@ -224,6 +225,8 @@ struct sunxi_ccm_reg {
#define CCM_PLL6_CTRL_K_MASK (0x3 << CCM_PLL6_CTRL_K_SHIFT)
#define CCM_PLL6_CTRL_LOCK (1 << 28)
+#define CCM_SATA_PLL_DEFAULT 0x90005811 /* 100 MHz */
+
#define CCM_MIPI_PLL_CTRL_M_SHIFT 0
#define CCM_MIPI_PLL_CTRL_M_MASK (0xf << CCM_MIPI_PLL_CTRL_M_SHIFT)
#define CCM_MIPI_PLL_CTRL_M(n) ((((n) - 1) & 0xf) << 0)
@@ -280,7 +283,12 @@ struct sunxi_ccm_reg {
#define AHB_GATE_OFFSET_USB_EHCI1 27
#define AHB_GATE_OFFSET_USB_EHCI0 26
#endif
+#ifndef CONFIG_MACH_SUN8I_R40
#define AHB_GATE_OFFSET_USB0 24
+#else
+#define AHB_GATE_OFFSET_USB0 25
+#define AHB_GATE_OFFSET_SATA 24
+#endif
#define AHB_GATE_OFFSET_MCTL 14
#define AHB_GATE_OFFSET_GMAC 17
#define AHB_GATE_OFFSET_NAND0 13
@@ -315,6 +323,9 @@ struct sunxi_ccm_reg {
#define CCM_MMC_CTRL_PLL6 (0x1 << 24)
#define CCM_MMC_CTRL_ENABLE (0x1 << 31)
+#define CCM_SATA_CTRL_ENABLE (0x1 << 31)
+#define CCM_SATA_CTRL_USE_EXTCLK (0x1 << 24)
+
#define CCM_USB_CTRL_PHY0_RST (0x1 << 0)
#define CCM_USB_CTRL_PHY1_RST (0x1 << 1)
#define CCM_USB_CTRL_PHY2_RST (0x1 << 2)
@@ -417,6 +428,9 @@ struct sunxi_ccm_reg {
#define CCM_PLL11_PATTERN 0xf5860000
/* ahb_reset0 offsets */
+#ifdef CONFIG_MACH_SUN8I_R40
+#define AHB_RESET_OFFSET_SATA 24
+#endif
#define AHB_RESET_OFFSET_GMAC 17
#define AHB_RESET_OFFSET_MCTL 14
#define AHB_RESET_OFFSET_MMC3 11
diff --git a/arch/arm/mach-sunxi/clock_sun6i.c b/arch/arm/mach-sunxi/clock_sun6i.c
index 631bc6e2500..ec5b026ef56 100644
--- a/arch/arm/mach-sunxi/clock_sun6i.c
+++ b/arch/arm/mach-sunxi/clock_sun6i.c
@@ -51,6 +51,13 @@ void clock_init_safe(void)
writel(MBUS_CLK_DEFAULT, &ccm->mbus0_clk_cfg);
if (IS_ENABLED(CONFIG_MACH_SUN6I))
writel(MBUS_CLK_DEFAULT, &ccm->mbus1_clk_cfg);
+
+#if defined(CONFIG_MACH_SUN8I_R40) && defined(CONFIG_SUNXI_AHCI)
+ setbits_le32(&ccm->sata_pll_cfg, CCM_SATA_PLL_DEFAULT);
+ setbits_le32(&ccm->ahb_reset0_cfg, 0x1 << AHB_GATE_OFFSET_SATA);
+ setbits_le32(&ccm->ahb_gate0, 0x1 << AHB_GATE_OFFSET_SATA);
+ setbits_le32(&ccm->sata_clk_cfg, CCM_SATA_CTRL_ENABLE);
+#endif
}
#endif
--
GitLab
From daa8b75a5527f96c2b2e5aa8d3fff3fa29b57b9b Mon Sep 17 00:00:00 2001
From: Icenowy Zheng <icenowy@aosc.io>
Date: Mon, 1 May 2017 14:31:57 +0800
Subject: [PATCH 202/282] sunxi: enable SATA on Banana Pi M2 Ultra
Banana Pi M2 Ultra has a SATA port connected to the internal SATA
controller of R40 SoC. The controller's 1.2v VDD is connected to ELDO3
and the 2.5v VDD is connected to DLDO4.
Enable these regulators as well as the SATA support of Banana Pi M2
Ultra, by adding needed config lines into its defconfig.
Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
---
configs/Bananapi_M2_Ultra_defconfig | 3 +++
1 file changed, 3 insertions(+)
diff --git a/configs/Bananapi_M2_Ultra_defconfig b/configs/Bananapi_M2_Ultra_defconfig
index c6da7274e17..4332eca68f7 100644
--- a/configs/Bananapi_M2_Ultra_defconfig
+++ b/configs/Bananapi_M2_Ultra_defconfig
@@ -7,9 +7,12 @@ CONFIG_DRAM_ODT_EN=y
CONFIG_MMC0_CD_PIN="PH13"
CONFIG_MMC_SUNXI_SLOT_EXTRA=2
CONFIG_DEFAULT_DEVICE_TREE="sun8i-r40-bananapi-m2-ultra"
+CONFIG_AHCI=y
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
CONFIG_SPL=y
CONFIG_SPL_I2C_SUPPORT=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
# CONFIG_CMD_FPGA is not set
+CONFIG_AXP_DLDO4_VOLT=2500
+CONFIG_AXP_ELDO3_VOLT=1200
--
GitLab
From 61a77ce1d5a63856328605822b69d8abaeb7f593 Mon Sep 17 00:00:00 2001
From: Wenyou Yang <wenyou.yang@atmel.com>
Date: Fri, 7 Apr 2017 15:14:46 +0800
Subject: [PATCH 203/282] spi: atmel: check GPIO validity before using cs_gpios
Before using the cs_gpio, check if the GPIO is valid or not.
Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
---
drivers/spi/atmel_spi.c | 9 +++++++++
1 file changed, 9 insertions(+)
diff --git a/drivers/spi/atmel_spi.c b/drivers/spi/atmel_spi.c
index 76491142318..4701b79f161 100644
--- a/drivers/spi/atmel_spi.c
+++ b/drivers/spi/atmel_spi.c
@@ -296,6 +296,9 @@ static void atmel_spi_cs_activate(struct udevice *dev)
struct dm_spi_slave_platdata *slave_plat = dev_get_parent_platdata(dev);
u32 cs = slave_plat->cs;
+ if (!dm_gpio_is_valid(&priv->cs_gpios[cs]))
+ return;
+
dm_gpio_set_value(&priv->cs_gpios[cs], 0);
}
@@ -306,6 +309,9 @@ static void atmel_spi_cs_deactivate(struct udevice *dev)
struct dm_spi_slave_platdata *slave_plat = dev_get_parent_platdata(dev);
u32 cs = slave_plat->cs;
+ if (!dm_gpio_is_valid(&priv->cs_gpios[cs]))
+ return;
+
dm_gpio_set_value(&priv->cs_gpios[cs], 1);
}
@@ -473,6 +479,9 @@ static int atmel_spi_probe(struct udevice *bus)
}
for(i = 0; i < ARRAY_SIZE(priv->cs_gpios); i++) {
+ if (!dm_gpio_is_valid(&priv->cs_gpios[i]))
+ continue;
+
dm_gpio_set_dir_flags(&priv->cs_gpios[i],
GPIOD_IS_OUT | GPIOD_IS_OUT_ACTIVE);
}
--
GitLab
From ac6991fb5fc1a694b29f4ebd5e07baebf818d7cc Mon Sep 17 00:00:00 2001
From: Moritz Fischer <moritz.fischer@ettus.com>
Date: Thu, 8 Dec 2016 12:11:09 -0800
Subject: [PATCH 204/282] zynq: spi: Honour the activation / deactivation delay
This is not currently implemented. Add support for this so that the
Chrome OS EC can be used reliably.
Signed-off-by: Moritz Fischer <moritz.fischer@ettus.com>
Acked-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Jagan Teki <jagan@openedev.com>
---
drivers/spi/zynq_spi.c | 24 ++++++++++++++++++++++++
1 file changed, 24 insertions(+)
diff --git a/drivers/spi/zynq_spi.c b/drivers/spi/zynq_spi.c
index 5a9b1f0f2ee..2b77f1ccdcf 100644
--- a/drivers/spi/zynq_spi.c
+++ b/drivers/spi/zynq_spi.c
@@ -56,6 +56,8 @@ struct zynq_spi_platdata {
struct zynq_spi_regs *regs;
u32 frequency; /* input frequency */
u32 speed_hz;
+ uint deactivate_delay_us; /* Delay to wait after deactivate */
+ uint activate_delay_us; /* Delay to wait after activate */
};
/* zynq spi priv */
@@ -63,6 +65,7 @@ struct zynq_spi_priv {
struct zynq_spi_regs *regs;
u8 cs;
u8 mode;
+ ulong last_transaction_us; /* Time of last transaction end */
u8 fifo_depth;
u32 freq; /* required frequency */
};
@@ -78,6 +81,10 @@ static int zynq_spi_ofdata_to_platdata(struct udevice *bus)
/* FIXME: Use 250MHz as a suitable default */
plat->frequency = fdtdec_get_int(blob, node, "spi-max-frequency",
250000000);
+ plat->deactivate_delay_us = fdtdec_get_int(blob, node,
+ "spi-deactivate-delay", 0);
+ plat->activate_delay_us = fdtdec_get_int(blob, node,
+ "spi-activate-delay", 0);
plat->speed_hz = plat->frequency / 2;
debug("%s: regs=%p max-frequency=%d\n", __func__,
@@ -133,10 +140,19 @@ static int zynq_spi_probe(struct udevice *bus)
static void spi_cs_activate(struct udevice *dev)
{
struct udevice *bus = dev->parent;
+ struct zynq_spi_platdata *plat = bus->platdata;
struct zynq_spi_priv *priv = dev_get_priv(bus);
struct zynq_spi_regs *regs = priv->regs;
u32 cr;
+ /* If it's too soon to do another transaction, wait */
+ if (plat->deactivate_delay_us && priv->last_transaction_us) {
+ ulong delay_us; /* The delay completed so far */
+ delay_us = timer_get_us() - priv->last_transaction_us;
+ if (delay_us < plat->deactivate_delay_us)
+ udelay(plat->deactivate_delay_us - delay_us);
+ }
+
clrbits_le32(®s->cr, ZYNQ_SPI_CR_CS_MASK);
cr = readl(®s->cr);
/*
@@ -147,15 +163,23 @@ static void spi_cs_activate(struct udevice *dev)
*/
cr |= (~(1 << priv->cs) << ZYNQ_SPI_CR_SS_SHIFT) & ZYNQ_SPI_CR_CS_MASK;
writel(cr, ®s->cr);
+
+ if (plat->activate_delay_us)
+ udelay(plat->activate_delay_us);
}
static void spi_cs_deactivate(struct udevice *dev)
{
struct udevice *bus = dev->parent;
+ struct zynq_spi_platdata *plat = bus->platdata;
struct zynq_spi_priv *priv = dev_get_priv(bus);
struct zynq_spi_regs *regs = priv->regs;
setbits_le32(®s->cr, ZYNQ_SPI_CR_CS_MASK);
+
+ /* Remember time of this transaction so we can honour the bus delay */
+ if (plat->deactivate_delay_us)
+ priv->last_transaction_us = timer_get_us();
}
static int zynq_spi_claim_bus(struct udevice *dev)
--
GitLab
From afa81a7750d63be9cb9eeb99a26c73bc93f4e1d9 Mon Sep 17 00:00:00 2001
From: Andreas Fenkart <afenkart@gmail.com>
Date: Sat, 8 Apr 2017 11:59:31 +0200
Subject: [PATCH 205/282] env_sf: factor out prepare_flash_device
copy&paste code found in single/double buffered code path
Signed-off-by: Andreas Fenkart <afenkart@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Tested-by: Jagan Teki <jagan@openedev.com>
---
common/env_sf.c | 48 +++++++++++++++++++-----------------------------
1 file changed, 19 insertions(+), 29 deletions(-)
diff --git a/common/env_sf.c b/common/env_sf.c
index 27b4d1226a6..8af590a3d9a 100644
--- a/common/env_sf.c
+++ b/common/env_sf.c
@@ -45,15 +45,11 @@ char *env_name_spec = "SPI Flash";
static struct spi_flash *env_flash;
-#if defined(CONFIG_ENV_OFFSET_REDUND)
-int saveenv(void)
+static int setup_flash_device(void)
{
- env_t env_new;
- char *saved_buffer = NULL, flag = OBSOLETE_FLAG;
- u32 saved_size, saved_offset, sector = 1;
- int ret;
#ifdef CONFIG_DM_SPI_FLASH
struct udevice *new;
+ int ret;
/* speed and mode will be read from DT */
ret = spi_flash_probe_bus_cs(CONFIG_ENV_SPI_BUS, CONFIG_ENV_SPI_CS,
@@ -76,6 +72,20 @@ int saveenv(void)
}
}
#endif
+ return 0;
+}
+
+#if defined(CONFIG_ENV_OFFSET_REDUND)
+int saveenv(void)
+{
+ env_t env_new;
+ char *saved_buffer = NULL, flag = OBSOLETE_FLAG;
+ u32 saved_size, saved_offset, sector = 1;
+ int ret;
+
+ ret = setup_flash_device();
+ if (ret)
+ return ret;
ret = env_export(&env_new);
if (ret)
@@ -242,30 +252,10 @@ int saveenv(void)
char *saved_buffer = NULL;
int ret = 1;
env_t env_new;
-#ifdef CONFIG_DM_SPI_FLASH
- struct udevice *new;
- /* speed and mode will be read from DT */
- ret = spi_flash_probe_bus_cs(CONFIG_ENV_SPI_BUS, CONFIG_ENV_SPI_CS,
- 0, 0, &new);
- if (ret) {
- set_default_env("!spi_flash_probe_bus_cs() failed");
- return 1;
- }
-
- env_flash = dev_get_uclass_priv(new);
-#else
-
- if (!env_flash) {
- env_flash = spi_flash_probe(CONFIG_ENV_SPI_BUS,
- CONFIG_ENV_SPI_CS,
- CONFIG_ENV_SPI_MAX_HZ, CONFIG_ENV_SPI_MODE);
- if (!env_flash) {
- set_default_env("!spi_flash_probe() failed");
- return 1;
- }
- }
-#endif
+ ret = setup_flash_device();
+ if (ret)
+ return ret;
/* Is the sector larger than the env (i.e. embedded) */
if (CONFIG_ENV_SECT_SIZE > CONFIG_ENV_SIZE) {
--
GitLab
From 8fee8845e7543aec3edd64fcef2d6ff268d65a0d Mon Sep 17 00:00:00 2001
From: Andreas Fenkart <afenkart@gmail.com>
Date: Sat, 8 Apr 2017 11:59:32 +0200
Subject: [PATCH 206/282] enf_sf: reuse setup_flash_device instead of open
coding it
setup_flash_device selects one of two code paths depending on the driver
model being used (=CONFIG_DM_SPI_FLASH). env_relocate_spec only used
the non driver-model code path. I'm unsure why, either none of the
platforms that need relocation use the driver model, or - worse - the
driver model is not yet usable when relocating.
Signed-off-by: Andreas Fenkart <afenkart@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Tested-by: Jagan Teki <jagan@openedev.com>
---
common/env_sf.c | 14 +++++---------
1 file changed, 5 insertions(+), 9 deletions(-)
diff --git a/common/env_sf.c b/common/env_sf.c
index 8af590a3d9a..a52fb734c85 100644
--- a/common/env_sf.c
+++ b/common/env_sf.c
@@ -176,12 +176,9 @@ void env_relocate_spec(void)
goto out;
}
- env_flash = spi_flash_probe(CONFIG_ENV_SPI_BUS, CONFIG_ENV_SPI_CS,
- CONFIG_ENV_SPI_MAX_HZ, CONFIG_ENV_SPI_MODE);
- if (!env_flash) {
- set_default_env("!spi_flash_probe() failed");
+ ret = setup_flash_device();
+ if (ret)
goto out;
- }
ret = spi_flash_read(env_flash, CONFIG_ENV_OFFSET,
CONFIG_ENV_SIZE, tmp_env1);
@@ -316,10 +313,9 @@ void env_relocate_spec(void)
char *buf = NULL;
buf = (char *)memalign(ARCH_DMA_MINALIGN, CONFIG_ENV_SIZE);
- env_flash = spi_flash_probe(CONFIG_ENV_SPI_BUS, CONFIG_ENV_SPI_CS,
- CONFIG_ENV_SPI_MAX_HZ, CONFIG_ENV_SPI_MODE);
- if (!env_flash) {
- set_default_env("!spi_flash_probe() failed");
+
+ ret = setup_flash_device();
+ if (ret) {
if (buf)
free(buf);
return;
--
GitLab
From c041c60c6c5c1eafcff21eec76e16ee958a7506e Mon Sep 17 00:00:00 2001
From: Andreas Fenkart <afenkart@gmail.com>
Date: Sat, 8 Apr 2017 11:59:33 +0200
Subject: [PATCH 207/282] env_sf: re-order error handling in single-buffer
env_relocate_spec
this makes it easier comparable to the double-buffered version
Signed-off-by: Andreas Fenkart <afenkart@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Tested-by: Jagan Teki <jagan@openedev.com>
---
common/env_sf.c | 20 +++++++++++---------
1 file changed, 11 insertions(+), 9 deletions(-)
diff --git a/common/env_sf.c b/common/env_sf.c
index a52fb734c85..6a1583ebec3 100644
--- a/common/env_sf.c
+++ b/common/env_sf.c
@@ -313,29 +313,31 @@ void env_relocate_spec(void)
char *buf = NULL;
buf = (char *)memalign(ARCH_DMA_MINALIGN, CONFIG_ENV_SIZE);
-
- ret = setup_flash_device();
- if (ret) {
- if (buf)
- free(buf);
+ if (!buf) {
+ set_default_env("!malloc() failed");
return;
}
+ ret = setup_flash_device();
+ if (ret)
+ goto out;
+
ret = spi_flash_read(env_flash,
CONFIG_ENV_OFFSET, CONFIG_ENV_SIZE, buf);
if (ret) {
set_default_env("!spi_flash_read() failed");
- goto out;
+ goto err_read;
}
ret = env_import(buf, 1);
if (ret)
gd->env_valid = 1;
-out:
+
+err_read:
spi_flash_free(env_flash);
- if (buf)
- free(buf);
env_flash = NULL;
+out:
+ free(buf);
}
#endif
--
GitLab
From 0b2e5bbe6a4f3d25522675198b8beb0093a2e750 Mon Sep 17 00:00:00 2001
From: Andreas Fenkart <afenkart@gmail.com>
Date: Sat, 8 Apr 2017 11:59:34 +0200
Subject: [PATCH 208/282] env_sf: use DIV_ROUND_UP to calculate number of
sectors to erase
simpler to read
Signed-off-by: Andreas Fenkart <afenkart@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Tested-by: Jagan Teki <jagan@openedev.com>
---
common/env_sf.c | 18 +++++-------------
1 file changed, 5 insertions(+), 13 deletions(-)
diff --git a/common/env_sf.c b/common/env_sf.c
index 6a1583ebec3..9944602367b 100644
--- a/common/env_sf.c
+++ b/common/env_sf.c
@@ -80,7 +80,7 @@ int saveenv(void)
{
env_t env_new;
char *saved_buffer = NULL, flag = OBSOLETE_FLAG;
- u32 saved_size, saved_offset, sector = 1;
+ u32 saved_size, saved_offset, sector;
int ret;
ret = setup_flash_device();
@@ -115,11 +115,7 @@ int saveenv(void)
goto done;
}
- if (CONFIG_ENV_SIZE > CONFIG_ENV_SECT_SIZE) {
- sector = CONFIG_ENV_SIZE / CONFIG_ENV_SECT_SIZE;
- if (CONFIG_ENV_SIZE % CONFIG_ENV_SECT_SIZE)
- sector++;
- }
+ sector = DIV_ROUND_UP(CONFIG_ENV_SIZE, CONFIG_ENV_SECT_SIZE);
puts("Erasing SPI flash...");
ret = spi_flash_erase(env_flash, env_new_offset,
@@ -245,7 +241,7 @@ out:
#else
int saveenv(void)
{
- u32 saved_size, saved_offset, sector = 1;
+ u32 saved_size, saved_offset, sector;
char *saved_buffer = NULL;
int ret = 1;
env_t env_new;
@@ -268,16 +264,12 @@ int saveenv(void)
goto done;
}
- if (CONFIG_ENV_SIZE > CONFIG_ENV_SECT_SIZE) {
- sector = CONFIG_ENV_SIZE / CONFIG_ENV_SECT_SIZE;
- if (CONFIG_ENV_SIZE % CONFIG_ENV_SECT_SIZE)
- sector++;
- }
-
ret = env_export(&env_new);
if (ret)
goto done;
+ sector = DIV_ROUND_UP(CONFIG_ENV_SIZE, CONFIG_ENV_SECT_SIZE);
+
puts("Erasing SPI flash...");
ret = spi_flash_erase(env_flash, CONFIG_ENV_OFFSET,
sector * CONFIG_ENV_SECT_SIZE);
--
GitLab
From 2f54205829429d82c7591340a106bf68f3916120 Mon Sep 17 00:00:00 2001
From: Suniel Mahesh <suniel.spartan@gmail.com>
Date: Wed, 3 May 2017 11:47:29 +0530
Subject: [PATCH 209/282] drivers: spi: Remove duplicate .probe method
.probe method has been assigned twice when declaring
a driver with U_BOOT_DRIVER(). Removed one of them.
Here is the last commit which had the duplicate entry:
"spi: omap3: Convert to driver model"
(sha1: 77b8d04854f486741471ad02b93b473b5b3d72f8)
Signed-off-by: Suniel Mahesh <suniel.spartan@gmail.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
---
drivers/spi/omap3_spi.c | 1 -
1 file changed, 1 deletion(-)
diff --git a/drivers/spi/omap3_spi.c b/drivers/spi/omap3_spi.c
index 8a894501097..76d376ac445 100644
--- a/drivers/spi/omap3_spi.c
+++ b/drivers/spi/omap3_spi.c
@@ -692,6 +692,5 @@ U_BOOT_DRIVER(omap3_spi) = {
.probe = omap3_spi_probe,
.ops = &omap3_spi_ops,
.priv_auto_alloc_size = sizeof(struct omap3_spi_priv),
- .probe = omap3_spi_probe,
};
#endif
--
GitLab
From 5a49b2929c0c73e43470cc53b80a6dfa47b5efda Mon Sep 17 00:00:00 2001
From: Icenowy Zheng <icenowy@aosc.io>
Date: Wed, 3 May 2017 23:45:09 +0800
Subject: [PATCH 210/282] sunxi: add support for Banana Pi M2 Plus board
Banana Pi M2 Plus is an Allwinner H3-based SBC by Sinovoip, which has
already mainline device tree file that have landed into U-Boot source
tree.
Add a defconfig file for it and add the MAINTAINERS items.
Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
---
board/sunxi/MAINTAINERS | 5 +++++
configs/Sinovoip_BPI_M2_Plus_defconfig | 20 ++++++++++++++++++++
2 files changed, 25 insertions(+)
create mode 100644 configs/Sinovoip_BPI_M2_Plus_defconfig
diff --git a/board/sunxi/MAINTAINERS b/board/sunxi/MAINTAINERS
index f39402b89cd..1c8817375d5 100644
--- a/board/sunxi/MAINTAINERS
+++ b/board/sunxi/MAINTAINERS
@@ -280,6 +280,11 @@ S: Maintained
F: configs/Sinlinx_SinA33_defconfig
W: http://linux-sunxi.org/Sinlinx_SinA33
+SINOVOIP BPI M2 PLUS H3 BOARD
+M: Icenowy Zheng <icenowy@aosc.io>
+S: Maintained
+F: configs/Sinovoip_BPI_M2_Plus_defconfig
+
SINOVOIP BPI M3 A83T BOARD
M: VishnuPatekar <vishnupatekar0510@gmail.com>
S: Maintained
diff --git a/configs/Sinovoip_BPI_M2_Plus_defconfig b/configs/Sinovoip_BPI_M2_Plus_defconfig
new file mode 100644
index 00000000000..e8cd4fb9eca
--- /dev/null
+++ b/configs/Sinovoip_BPI_M2_Plus_defconfig
@@ -0,0 +1,20 @@
+CONFIG_ARM=y
+CONFIG_ARCH_SUNXI=y
+CONFIG_MACH_SUN8I_H3=y
+CONFIG_DRAM_CLK=672
+CONFIG_DRAM_ZQ=3881979
+CONFIG_DRAM_ODT_EN=y
+CONFIG_MACPWR="PD6"
+CONFIG_MMC_SUNXI_SLOT_EXTRA=2
+CONFIG_DEFAULT_DEVICE_TREE="sun8i-h3-bananapi-m2-plus"
+# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
+CONFIG_CONSOLE_MUX=y
+CONFIG_SPL=y
+# CONFIG_CMD_IMLS is not set
+# CONFIG_CMD_FLASH is not set
+# CONFIG_CMD_FPGA is not set
+# CONFIG_SPL_DOS_PARTITION is not set
+# CONFIG_SPL_ISO_PARTITION is not set
+# CONFIG_SPL_EFI_PARTITION is not set
+CONFIG_SUN8I_EMAC=y
+CONFIG_USB_EHCI_HCD=y
--
GitLab
From cc93834dee106553e76b69b5cedab2de0c506fff Mon Sep 17 00:00:00 2001
From: "xypron.glpk@gmx.de" <xypron.glpk@gmx.de>
Date: Fri, 14 Apr 2017 19:54:40 +0200
Subject: [PATCH 211/282] meson: gxbb: increase CONFIG_SYS_BOOTM_LEN
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
A feature rich Linux kernel needs more than 8 MiB.
Hence enlarge CONFIG_SYS_BOOTM_LEN to 64 MiB for the GXBB systems.
As all known GXBB systems have at least 512 MiB of RAM this poses no problem.
Cc: Andreas Färber <afaerber@suse.de>
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
---
include/configs/meson-gxbb-common.h | 2 ++
1 file changed, 2 insertions(+)
diff --git a/include/configs/meson-gxbb-common.h b/include/configs/meson-gxbb-common.h
index fab2e671171..f1734c0e21d 100644
--- a/include/configs/meson-gxbb-common.h
+++ b/include/configs/meson-gxbb-common.h
@@ -55,4 +55,6 @@
MESON_FDTFILE_SETTING \
BOOTENV
+#define CONFIG_SYS_BOOTM_LEN (64 << 20) /* 64 MiB */
+
#endif /* __MESON_GXBB_COMMON_CONFIG_H */
--
GitLab
From 1275a44e2f0579aba11d59c92c1717d5f9abc5e9 Mon Sep 17 00:00:00 2001
From: "xypron.glpk@gmx.de" <xypron.glpk@gmx.de>
Date: Wed, 3 May 2017 23:31:58 +0200
Subject: [PATCH 212/282] arm64: mvebu: incorrect check of fdt address cells
In dram_init_banksize there seems to be a typo concerning
a plausibility check of the fdt.
Testing sc > 2 twice does not make any sense.
The problem was indicated by cppcheck.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
---
arch/arm/mach-mvebu/arm64-common.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/mach-mvebu/arm64-common.c b/arch/arm/mach-mvebu/arm64-common.c
index 1c0477a3cac..2ef5726905d 100644
--- a/arch/arm/mach-mvebu/arm64-common.c
+++ b/arch/arm/mach-mvebu/arm64-common.c
@@ -94,7 +94,7 @@ int dram_init_banksize(void)
ac = fdt_address_cells(fdt, 0);
sc = fdt_size_cells(fdt, 0);
- if (ac < 1 || sc > 2 || sc < 1 || sc > 2) {
+ if (ac < 1 || ac > 2 || sc < 1 || sc > 2) {
printf("invalid address/size cells\n");
return -ENXIO;
}
--
GitLab
From 05d887b4619e54a2b7d487ac1c31b4544ce58533 Mon Sep 17 00:00:00 2001
From: "xypron.glpk@gmx.de" <xypron.glpk@gmx.de>
Date: Wed, 3 May 2017 23:20:10 +0200
Subject: [PATCH 213/282] lib: circbuf: avoid possible null pointer dereference
We should not first dereference p and afterwards assert that is
was not NULL. Instead do the assert first.
The problem was indicated by cppcheck.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
---
lib/circbuf.c | 8 ++++++--
1 file changed, 6 insertions(+), 2 deletions(-)
diff --git a/lib/circbuf.c b/lib/circbuf.c
index 9848da3b7b6..6ed05164304 100644
--- a/lib/circbuf.c
+++ b/lib/circbuf.c
@@ -41,11 +41,13 @@ int buf_free (circbuf_t * buf)
int buf_pop (circbuf_t * buf, char *dest, unsigned int len)
{
unsigned int i;
- char *p = buf->top;
+ char *p;
assert (buf != NULL);
assert (dest != NULL);
+ p = buf->top;
+
/* Cap to number of bytes in buffer */
if (len > buf->size)
len = buf->size;
@@ -69,11 +71,13 @@ int buf_push (circbuf_t * buf, const char *src, unsigned int len)
{
/* NOTE: this function allows push to overwrite old data. */
unsigned int i;
- char *p = buf->tail;
+ char *p;
assert (buf != NULL);
assert (src != NULL);
+ p = buf->tail;
+
for (i = 0; i < len; i++) {
*p++ = src[i];
if (p == buf->end) {
--
GitLab
From d27e35f2564f751a3cc47daa5ab9897f04401a40 Mon Sep 17 00:00:00 2001
From: "xypron.glpk@gmx.de" <xypron.glpk@gmx.de>
Date: Wed, 3 May 2017 22:40:11 +0200
Subject: [PATCH 214/282] relocate-rela: add missing va_end()
va_start must always be matched by va_end.
The problem was indicated by cppcheck.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
---
tools/relocate-rela.c | 6 ++++--
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/tools/relocate-rela.c b/tools/relocate-rela.c
index 3c9d134ac26..df968eb5fd1 100644
--- a/tools/relocate-rela.c
+++ b/tools/relocate-rela.c
@@ -27,9 +27,11 @@ static void debug(const char *fmt, ...)
{
va_list args;
- va_start(args, fmt);
- if (debug_en)
+ if (debug_en) {
+ va_start(args, fmt);
vprintf(fmt, args);
+ va_end(args);
+ }
}
static bool supported_rela(Elf64_Rela *rela)
--
GitLab
From f59a3b21f60190793dc3cee97338c2f6ee9f2336 Mon Sep 17 00:00:00 2001
From: "xypron.glpk@gmx.de" <xypron.glpk@gmx.de>
Date: Thu, 4 May 2017 22:26:42 +0200
Subject: [PATCH 215/282] tools: sunxi: avoid read after end of string
The evaluation of option -c is incorrect:
According to the C99 standard endptr in the first strtol is always
set as &endptr is not NULL.
So the first part of the or condition is always true.
If all digits in optarg are valid endptr will point to the closing \0
and the second strtol will read beyond the end of the string optarg
points to.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Acked-by: Boris Brezillon <boris.brezillon@free-electrons.com>
---
tools/sunxi-spl-image-builder.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/tools/sunxi-spl-image-builder.c b/tools/sunxi-spl-image-builder.c
index d538a388131..a367f117740 100644
--- a/tools/sunxi-spl-image-builder.c
+++ b/tools/sunxi-spl-image-builder.c
@@ -433,7 +433,7 @@ int main(int argc, char **argv)
break;
case 'c':
info.ecc_strength = strtol(optarg, &endptr, 0);
- if (endptr || *endptr == '/')
+ if (*endptr == '/')
info.ecc_step_size = strtol(endptr + 1, NULL, 0);
break;
case 'p':
--
GitLab
From 169b50efe2635952d9679268860a3e37aa13adf6 Mon Sep 17 00:00:00 2001
From: "xypron.glpk@gmx.de" <xypron.glpk@gmx.de>
Date: Fri, 5 May 2017 20:57:32 +0200
Subject: [PATCH 216/282] board/BuR/common: incorrect check of dtb
The logical expression to check the dtb is incorrect in
load_devicetree.
The problem was indicated by cppcheck.
The inconsistent variable name dtppart is changed to dtbpart.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Hannes Schmelzer <oe5hpm@oevsv.at>
Acked-by: Hannes Schmelzer <oe5hpm@oevsv.at>
---
board/BuR/common/common.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/board/BuR/common/common.c b/board/BuR/common/common.c
index 876150402c8..5cc82c9473a 100644
--- a/board/BuR/common/common.c
+++ b/board/BuR/common/common.c
@@ -264,13 +264,13 @@ static int load_devicetree(void)
#else
char *dtbname = getenv("dtb");
char *dtbdev = getenv("dtbdev");
- char *dtppart = getenv("dtbpart");
- if (!dtbdev || !dtbdev || !dtbname) {
+ char *dtbpart = getenv("dtbpart");
+ if (!dtbdev || !dtbpart || !dtbname) {
printf("%s: <dtbdev>/<dtbpart>/<dtb> missing.\n", __func__);
return -1;
}
- if (fs_set_blk_dev(dtbdev, dtppart, FS_TYPE_EXT)) {
+ if (fs_set_blk_dev(dtbdev, dtbpart, FS_TYPE_EXT)) {
puts("load_devicetree: set_blk_dev failed.\n");
return -1;
}
--
GitLab
From 64c4ffa9fa223f7ae8640f9c8f3044bfa0e3bfda Mon Sep 17 00:00:00 2001
From: Tom Rini <trini@konsulko.com>
Date: Mon, 8 May 2017 10:11:08 -0400
Subject: [PATCH 217/282] Prepare v2017.05
Signed-off-by: Tom Rini <trini@konsulko.com>
---
Makefile | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/Makefile b/Makefile
index b8816add1fc..600a4d623a9 100644
--- a/Makefile
+++ b/Makefile
@@ -5,7 +5,7 @@
VERSION = 2017
PATCHLEVEL = 05
SUBLEVEL =
-EXTRAVERSION = -rc3
+EXTRAVERSION =
NAME =
# *DOCUMENTATION*
--
GitLab
From 67566ab66b555a33eb4ba85404628675e1937b81 Mon Sep 17 00:00:00 2001
From: Uri Mashiach <uri.mashiach@compulab.co.il>
Date: Thu, 23 Feb 2017 15:39:35 +0200
Subject: [PATCH 218/282] arm: dra7xx: move CONFIG_DRA7XX to Kconfig
The symbol CONFIG_DRA7XX is needed for Kconfig conditions.
Cc: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Uri Mashiach <uri.mashiach@compulab.co.il>
Reviewed-by: Tom Rini <trini@konsulko.com>
---
arch/arm/mach-omap2/omap5/Kconfig | 8 ++++++++
include/configs/am57xx_evm.h | 2 --
include/configs/cl-som-am57x.h | 2 --
include/configs/dra7xx_evm.h | 2 --
scripts/config_whitelist.txt | 1 -
5 files changed, 8 insertions(+), 7 deletions(-)
diff --git a/arch/arm/mach-omap2/omap5/Kconfig b/arch/arm/mach-omap2/omap5/Kconfig
index 4041adc9742..c89c4383058 100644
--- a/arch/arm/mach-omap2/omap5/Kconfig
+++ b/arch/arm/mach-omap2/omap5/Kconfig
@@ -1,11 +1,17 @@
if OMAP54XX
+config DRA7XX
+ bool
+ help
+ DRA7xx is an OMAP based SOC with Dual Core A-15s.
+
choice
prompt "OMAP5 board select"
optional
config TARGET_CL_SOM_AM57X
bool "CompuLab CL-SOM-AM57x"
+ select DRA7XX
config TARGET_CM_T54
bool "CompuLab CM-T54"
@@ -16,12 +22,14 @@ config TARGET_OMAP5_UEVM
config TARGET_DRA7XX_EVM
bool "TI DRA7XX"
select BOARD_LATE_INIT
+ select DRA7XX
select TI_I2C_BOARD_DETECT
select PHYS_64BIT
config TARGET_AM57XX_EVM
bool "AM57XX"
select BOARD_LATE_INIT
+ select DRA7XX
select TI_I2C_BOARD_DETECT
endchoice
diff --git a/include/configs/am57xx_evm.h b/include/configs/am57xx_evm.h
index dc7a3702086..6962039c3ac 100644
--- a/include/configs/am57xx_evm.h
+++ b/include/configs/am57xx_evm.h
@@ -14,8 +14,6 @@
#include <environment/ti/dfu.h>
-#define CONFIG_DRA7XX
-
#ifdef CONFIG_SPL_BUILD
#define CONFIG_IODELAY_RECALIBRATION
#endif
diff --git a/include/configs/cl-som-am57x.h b/include/configs/cl-som-am57x.h
index a4950f39e3a..d9965d667c9 100644
--- a/include/configs/cl-som-am57x.h
+++ b/include/configs/cl-som-am57x.h
@@ -11,8 +11,6 @@
#ifndef __CONFIG_CL_SOM_AM57X_H
#define __CONFIG_CL_SOM_AM57X_H
-#define CONFIG_DRA7XX
-
#define CONFIG_NR_DRAM_BANKS 2
#define CONSOLEDEV "ttyO2"
diff --git a/include/configs/dra7xx_evm.h b/include/configs/dra7xx_evm.h
index 7d6f7ff2788..a9ca0231f58 100644
--- a/include/configs/dra7xx_evm.h
+++ b/include/configs/dra7xx_evm.h
@@ -14,8 +14,6 @@
#include <environment/ti/dfu.h>
-#define CONFIG_DRA7XX
-
#ifdef CONFIG_SPL_BUILD
#define CONFIG_IODELAY_RECALIBRATION
#endif
diff --git a/scripts/config_whitelist.txt b/scripts/config_whitelist.txt
index ed349b9e6b2..1704f9c09a4 100644
--- a/scripts/config_whitelist.txt
+++ b/scripts/config_whitelist.txt
@@ -664,7 +664,6 @@ CONFIG_DNET_AUTONEG_TIMEOUT
CONFIG_DP_DDR_CTRL
CONFIG_DP_DDR_DIMM_SLOTS_PER_CTLR
CONFIG_DP_DDR_NUM_CTRLS
-CONFIG_DRA7XX
CONFIG_DRAM_2G
CONFIG_DRAM_TIMINGS_
CONFIG_DRIVER_AT91EMAC
--
GitLab
From ef3f3b8100b28f2110c8a5f5181a5d6ee5db9160 Mon Sep 17 00:00:00 2001
From: Uri Mashiach <uri.mashiach@compulab.co.il>
Date: Thu, 23 Feb 2017 15:39:36 +0200
Subject: [PATCH 219/282] arm: usb: dra7xx: xHCI registers based on USB port
index
Modify the determination of the base address of xHCI registers of DRA7XX
targets.
Before the commit: by the target.
After the commit: by the USB port index.
Cc: Lokesh Vutla <lokeshvutla@ti.com>
Cc: Marek Vasut <marex@denx.de>
Cc: Roger Quadros <rogerq@ti.com>
Signed-off-by: Uri Mashiach <uri.mashiach@compulab.co.il>
Reviewed-by: Marek Vasut <marex@denx.de>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Roger Quadros <rogerq@ti.com>
Acked-by: Marek Vasut <marex@denx.de>
Acked-by: Marek Vasut <marex@denx.de>
---
configs/dra7xx_evm_defconfig | 1 +
configs/dra7xx_hs_evm_defconfig | 1 +
drivers/usb/host/Kconfig | 9 +++++++++
include/linux/usb/xhci-omap.h | 6 ++++--
4 files changed, 15 insertions(+), 2 deletions(-)
diff --git a/configs/dra7xx_evm_defconfig b/configs/dra7xx_evm_defconfig
index 462e6ff4082..b52885c12a6 100644
--- a/configs/dra7xx_evm_defconfig
+++ b/configs/dra7xx_evm_defconfig
@@ -91,6 +91,7 @@ CONFIG_OMAP_TIMER=y
CONFIG_USB=y
CONFIG_USB_XHCI_HCD=y
CONFIG_USB_XHCI_DWC3=y
+CONFIG_USB_XHCI_DRA7XX_INDEX=1
CONFIG_USB_DWC3=y
CONFIG_USB_DWC3_GADGET=y
CONFIG_USB_DWC3_OMAP=y
diff --git a/configs/dra7xx_hs_evm_defconfig b/configs/dra7xx_hs_evm_defconfig
index a348878342b..885ecae637d 100644
--- a/configs/dra7xx_hs_evm_defconfig
+++ b/configs/dra7xx_hs_evm_defconfig
@@ -96,6 +96,7 @@ CONFIG_OMAP_TIMER=y
CONFIG_USB=y
CONFIG_USB_XHCI_HCD=y
CONFIG_USB_XHCI_DWC3=y
+CONFIG_USB_XHCI_DRA7XX_INDEX=1
CONFIG_USB_DWC3=y
CONFIG_USB_DWC3_GADGET=y
CONFIG_USB_DWC3_OMAP=y
diff --git a/drivers/usb/host/Kconfig b/drivers/usb/host/Kconfig
index 0bf8274405f..fb5aa6f8891 100644
--- a/drivers/usb/host/Kconfig
+++ b/drivers/usb/host/Kconfig
@@ -44,6 +44,15 @@ config USB_XHCI_ZYNQMP
help
Enables support for the on-chip xHCI controller on Xilinx ZynqMP SoCs.
+config USB_XHCI_DRA7XX_INDEX
+ int "DRA7XX xHCI USB index"
+ range 0 1
+ default 0
+ depends on DRA7XX
+ help
+ Select the DRA7XX xHCI USB index.
+ Current supported values: 0, 1.
+
endif # USB_XHCI_HCD
config USB_EHCI_HCD
diff --git a/include/linux/usb/xhci-omap.h b/include/linux/usb/xhci-omap.h
index 9de80d738ec..f038ddb6693 100644
--- a/include/linux/usb/xhci-omap.h
+++ b/include/linux/usb/xhci-omap.h
@@ -10,14 +10,16 @@
#ifndef _ASM_ARCH_XHCI_OMAP_H_
#define _ASM_ARCH_XHCI_OMAP_H_
-#ifdef CONFIG_TARGET_DRA7XX_EVM
+#ifdef CONFIG_DRA7XX
+#if CONFIG_USB_XHCI_DRA7XX_INDEX == 1
#define OMAP_XHCI_BASE 0x488d0000
#define OMAP_OCP1_SCP_BASE 0x4A081000
#define OMAP_OTG_WRAPPER_BASE 0x488c0000
-#elif defined CONFIG_TARGET_AM57XX_EVM
+#elif CONFIG_USB_XHCI_DRA7XX_INDEX == 0
#define OMAP_XHCI_BASE 0x48890000
#define OMAP_OCP1_SCP_BASE 0x4A084c00
#define OMAP_OTG_WRAPPER_BASE 0x48880000
+#endif /* CONFIG_USB_XHCI_DRA7XX_INDEX == 1 */
#elif defined CONFIG_AM43XX
#define OMAP_XHCI_BASE 0x483d0000
#define OMAP_OCP1_SCP_BASE 0x483E8000
--
GitLab
From 1a9a5f7a39d655868d7e51327786ca6bccbbec68 Mon Sep 17 00:00:00 2001
From: Uri Mashiach <uri.mashiach@compulab.co.il>
Date: Thu, 23 Feb 2017 15:39:37 +0200
Subject: [PATCH 220/282] usb: host: xhci-omap: fix double weak board_usb_init
functions
A weak version of the function board_usb_init is implemented in:
common/usb.c
drivers/usb/host/xhci-omap.c
To fix the double implementations:
* Convert the board_usb_init function in drivers/usb/host/xhci-omap.c
normal (not weak).
* The function board_usb_init in drivers/usb/host/xhci-omap.c calls to
the weak function omap_xhci_board_usb_init.
* Rename board version of the function board_usb_init to
omap_xhci_board_usb_init.
Done only for boards that defines CONFIG_USB_XHCI_OMAP.
To achieve the same flexibility with the function board_usb_cleanup:
* Add a normal (not weak) implementation of the function
board_usb_cleanup in drivers/usb/host/xhci-omap.c
* The function board_usb_cleanup in drivers/usb/host/xhci-omap.c calls
to the weak function omap_xhci_board_usb_cleanup.
* Rename board version of the function board_usb_cleanup to
omap_xhci_board_usb_cleanup.
Done only for boards that defines CONFIG_USB_XHCI_OMAP.
Cc: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Uri Mashiach <uri.mashiach@compulab.co.il>
Acked-by: Marek Vasut <marex@denx.de>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Roger Quadros <rogerq@ti.com>
---
board/compulab/cl-som-am57x/cl-som-am57x.c | 2 +-
board/ti/am43xx/board.c | 4 ++--
board/ti/am57xx/board.c | 4 ++--
board/ti/dra7xx/evm.c | 4 ++--
drivers/usb/host/xhci-omap.c | 17 +++++++++++++++--
5 files changed, 22 insertions(+), 9 deletions(-)
diff --git a/board/compulab/cl-som-am57x/cl-som-am57x.c b/board/compulab/cl-som-am57x/cl-som-am57x.c
index bdd0a2ba198..fe1468f80b9 100644
--- a/board/compulab/cl-som-am57x/cl-som-am57x.c
+++ b/board/compulab/cl-som-am57x/cl-som-am57x.c
@@ -54,7 +54,7 @@ int board_mmc_init(bd_t *bis)
#endif /* CONFIG_GENERIC_MMC */
#ifdef CONFIG_USB_XHCI_OMAP
-int board_usb_init(int index, enum usb_init_type init)
+int omap_xhci_board_usb_init(int index, enum usb_init_type init)
{
setbits_le32((*prcm)->cm_l3init_usb_otg_ss1_clkctrl,
OTG_SS_CLKCTRL_MODULEMODE_HW | OPTFCLKEN_REFCLK960M);
diff --git a/board/ti/am43xx/board.c b/board/ti/am43xx/board.c
index 390cc168cda..2572029a256 100644
--- a/board/ti/am43xx/board.c
+++ b/board/ti/am43xx/board.c
@@ -694,7 +694,7 @@ int usb_gadget_handle_interrupts(int index)
#endif /* CONFIG_USB_DWC3 */
#if defined(CONFIG_USB_DWC3) || defined(CONFIG_USB_XHCI_OMAP)
-int board_usb_init(int index, enum usb_init_type init)
+int omap_xhci_board_usb_init(int index, enum usb_init_type init)
{
enable_usb_clocks(index);
#ifdef CONFIG_USB_DWC3
@@ -725,7 +725,7 @@ int board_usb_init(int index, enum usb_init_type init)
return 0;
}
-int board_usb_cleanup(int index, enum usb_init_type init)
+int omap_xhci_board_usb_cleanup(int index, enum usb_init_type init)
{
#ifdef CONFIG_USB_DWC3
switch (index) {
diff --git a/board/ti/am57xx/board.c b/board/ti/am57xx/board.c
index 1cfc08bc9ce..6d444e09faf 100644
--- a/board/ti/am57xx/board.c
+++ b/board/ti/am57xx/board.c
@@ -720,7 +720,7 @@ int usb_gadget_handle_interrupts(int index)
#endif /* CONFIG_USB_DWC3 */
#if defined(CONFIG_USB_DWC3) || defined(CONFIG_USB_XHCI_OMAP)
-int board_usb_init(int index, enum usb_init_type init)
+int omap_xhci_board_usb_init(int index, enum usb_init_type init)
{
enable_usb_clocks(index);
switch (index) {
@@ -754,7 +754,7 @@ int board_usb_init(int index, enum usb_init_type init)
return 0;
}
-int board_usb_cleanup(int index, enum usb_init_type init)
+int omap_xhci_board_usb_cleanup(int index, enum usb_init_type init)
{
#ifdef CONFIG_USB_DWC3
switch (index) {
diff --git a/board/ti/dra7xx/evm.c b/board/ti/dra7xx/evm.c
index ed0bc181cf5..d8e48dd3f82 100644
--- a/board/ti/dra7xx/evm.c
+++ b/board/ti/dra7xx/evm.c
@@ -750,7 +750,7 @@ static struct ti_usb_phy_device usb_phy2_device = {
.index = 1,
};
-int board_usb_init(int index, enum usb_init_type init)
+int omap_xhci_board_usb_init(int index, enum usb_init_type init)
{
enable_usb_clocks(index);
switch (index) {
@@ -787,7 +787,7 @@ int board_usb_init(int index, enum usb_init_type init)
return 0;
}
-int board_usb_cleanup(int index, enum usb_init_type init)
+int omap_xhci_board_usb_cleanup(int index, enum usb_init_type init)
{
switch (index) {
case 0:
diff --git a/drivers/usb/host/xhci-omap.c b/drivers/usb/host/xhci-omap.c
index b881b198fc8..a1b4f2f05cc 100644
--- a/drivers/usb/host/xhci-omap.c
+++ b/drivers/usb/host/xhci-omap.c
@@ -27,12 +27,25 @@ DECLARE_GLOBAL_DATA_PTR;
static struct omap_xhci omap;
-__weak int __board_usb_init(int index, enum usb_init_type init)
+__weak int omap_xhci_board_usb_init(int index, enum usb_init_type init)
{
return 0;
}
+
int board_usb_init(int index, enum usb_init_type init)
- __attribute__((weak, alias("__board_usb_init")));
+{
+ return omap_xhci_board_usb_init(index, init);
+}
+
+__weak int omap_xhci_board_usb_cleanup(int index, enum usb_init_type init)
+{
+ return 0;
+}
+
+int board_usb_cleanup(int index, enum usb_init_type init)
+{
+ return omap_xhci_board_usb_cleanup(index, init);
+}
static int omap_xhci_core_init(struct omap_xhci *omap)
{
--
GitLab
From 4acfe1ae46ca7731544dda57ce42d10acc2d63c5 Mon Sep 17 00:00:00 2001
From: Uri Mashiach <uri.mashiach@compulab.co.il>
Date: Thu, 23 Feb 2017 15:39:38 +0200
Subject: [PATCH 221/282] arm: am57xx: cl-som-am57x: invoke clock API to
enable/disable clocks
Invoke enable_usb_clocks during board_usb_init and disable_usb_clocks
during board_usb_exit to enable and disable clocks respectively.
Modifications:
* Enable USB clocks in the OMAP version of the function
board_usb_init.
* Disable USB clocks in the OMAP version of the function
board_usb_cleanup.
Cc: Marek Vasut <marex@denx.de>
Signed-off-by: Uri Mashiach <uri.mashiach@compulab.co.il>
Reviewed-by: Marek Vasut <marex@denx.de>
Reviewed-by: Tom Rini <trini@konsulko.com>
---
board/compulab/cl-som-am57x/cl-som-am57x.c | 10 ----------
drivers/usb/host/xhci-omap.c | 2 ++
2 files changed, 2 insertions(+), 10 deletions(-)
diff --git a/board/compulab/cl-som-am57x/cl-som-am57x.c b/board/compulab/cl-som-am57x/cl-som-am57x.c
index fe1468f80b9..4701b711025 100644
--- a/board/compulab/cl-som-am57x/cl-som-am57x.c
+++ b/board/compulab/cl-som-am57x/cl-som-am57x.c
@@ -53,16 +53,6 @@ int board_mmc_init(bd_t *bis)
}
#endif /* CONFIG_GENERIC_MMC */
-#ifdef CONFIG_USB_XHCI_OMAP
-int omap_xhci_board_usb_init(int index, enum usb_init_type init)
-{
- setbits_le32((*prcm)->cm_l3init_usb_otg_ss1_clkctrl,
- OTG_SS_CLKCTRL_MODULEMODE_HW | OPTFCLKEN_REFCLK960M);
-
- return 0;
-}
-#endif /* CONFIG_USB_XHCI_OMAP */
-
int misc_init_r(void)
{
cl_print_pcb_info();
diff --git a/drivers/usb/host/xhci-omap.c b/drivers/usb/host/xhci-omap.c
index a1b4f2f05cc..d6c57448184 100644
--- a/drivers/usb/host/xhci-omap.c
+++ b/drivers/usb/host/xhci-omap.c
@@ -29,6 +29,7 @@ static struct omap_xhci omap;
__weak int omap_xhci_board_usb_init(int index, enum usb_init_type init)
{
+ enable_usb_clocks(index);
return 0;
}
@@ -39,6 +40,7 @@ int board_usb_init(int index, enum usb_init_type init)
__weak int omap_xhci_board_usb_cleanup(int index, enum usb_init_type init)
{
+ disable_usb_clocks(index);
return 0;
}
--
GitLab
From e627290ac63c4d43b24407179d7439dd50a50bfe Mon Sep 17 00:00:00 2001
From: Uri Mashiach <uri.mashiach@compulab.co.il>
Date: Thu, 23 Feb 2017 15:39:39 +0200
Subject: [PATCH 222/282] arm: am57xx: cl-som-am57x: fix USB scan
USB bus scan attempt:
----------------------------------cut----------------------------------
=> usb start
starting USB...
USB0: Register 2000140 NbrPorts 2
Starting the controller
USB XHCI 1.00
scanning bus 0 for devices... data abort
pc : [<fff6240e>] lr : [<fff623b3>]
reloc pc : [<8081b40e>] lr : [<8081b3b3>]
sp : fdf42930 ip : fdf42960 fp : 00000000
r10: 00000001 r9 : fdf42ef0 r8 : 48890020
r7 : 00000002 r6 : fffa5840 r5 : fff8b140 r4 : fdf429c0
r3 : 00000000 r2 : 00000004 r1 : 00000000 r0 : 00000000
Flags: nZcv IRQs off FIQs off Mode SVC_32
Resetting CPU ...
resetting ...
----------------------------------cut----------------------------------
Fix by enabling USB configuration in the SPL.
Signed-off-by: Uri Mashiach <uri.mashiach@compulab.co.il>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Igor Grinberg <grinberg@compulab.co.il>
---
include/configs/cl-som-am57x.h | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/include/configs/cl-som-am57x.h b/include/configs/cl-som-am57x.h
index d9965d667c9..30004535632 100644
--- a/include/configs/cl-som-am57x.h
+++ b/include/configs/cl-som-am57x.h
@@ -82,6 +82,8 @@
#define CONFIG_SYS_I2C_PCA953X_ADDR 0x20
#define CONFIG_SYS_I2C_PCA953X_WIDTH { {0x20, 16} }
+#endif /* !CONFIG_SPL_BUILD */
+
/* USB xHCI HOST */
#define CONFIG_USB_XHCI_OMAP
#define CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS 2
@@ -96,8 +98,6 @@
#define CONFIG_USB_ETHER_ASIX
#define CONFIG_USB_ETHER_MCS7830
-#endif /* !CONFIG_SPL_BUILD */
-
/* CPSW Ethernet */
#define CONFIG_DRIVER_TI_CPSW
#define CONFIG_MII
--
GitLab
From d9eb26eb15150cf11dd522be1a54c4edfbae42e6 Mon Sep 17 00:00:00 2001
From: Uri Mashiach <uri.mashiach@compulab.co.il>
Date: Thu, 23 Feb 2017 15:39:40 +0200
Subject: [PATCH 223/282] arm: am57xx: cl-som-am57x: enable USB storage
Add CONFIG_USB_STORAGE to the defconfig file.
Signed-off-by: Uri Mashiach <uri.mashiach@compulab.co.il>
Reviewed-by: Tom Rini <trini@konsulko.com>
---
configs/cl-som-am57x_defconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/configs/cl-som-am57x_defconfig b/configs/cl-som-am57x_defconfig
index 356266f409b..f2e55794f52 100644
--- a/configs/cl-som-am57x_defconfig
+++ b/configs/cl-som-am57x_defconfig
@@ -48,4 +48,5 @@ CONFIG_TI_QSPI=y
CONFIG_USB=y
CONFIG_USB_XHCI_HCD=y
CONFIG_USB_XHCI_DWC3=y
+CONFIG_USB_STORAGE=y
CONFIG_OF_LIBFDT=y
--
GitLab
From dc07961f5eb505bbf1d2cdfccf337b9e757ec41e Mon Sep 17 00:00:00 2001
From: Uri Mashiach <uri.mashiach@compulab.co.il>
Date: Thu, 23 Feb 2017 15:39:41 +0200
Subject: [PATCH 224/282] arm: am57xx: cl-som-am57x: enable USB commands
Add CONFIG_CMD_USB to the defconfig file.
Signed-off-by: Uri Mashiach <uri.mashiach@compulab.co.il>
Reviewed-by: Tom Rini <trini@konsulko.com>
---
configs/cl-som-am57x_defconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/configs/cl-som-am57x_defconfig b/configs/cl-som-am57x_defconfig
index f2e55794f52..ed419a34d17 100644
--- a/configs/cl-som-am57x_defconfig
+++ b/configs/cl-som-am57x_defconfig
@@ -16,6 +16,7 @@ CONFIG_CMD_PART=y
CONFIG_CMD_SF=y
CONFIG_CMD_SPI=y
CONFIG_CMD_I2C=y
+CONFIG_CMD_USB=y
CONFIG_CMD_GPIO=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
--
GitLab
From 5bf5250e9d1555aa388a810213fd85106a60388e Mon Sep 17 00:00:00 2001
From: Vikas Manocha <vikas.manocha@st.com>
Date: Fri, 7 Apr 2017 15:38:13 -0700
Subject: [PATCH 225/282] spl: make image arg or fdt blob address
reconfigurable
At present fdt blob or argument address being passed to kernel is fixed at
compile time using macro CONFIG_SYS_SPL_ARGS_ADDR. FDT blob from
different media like nand, nor flash are copied to the address pointed
by the macro.
The problem is, it makes args/fdt blob compulsory to copy which is not required
in cases like for NOR Flash. This patch removes this limitation.
Signed-off-by: Vikas Manocha <vikas.manocha@st.com>
---
arch/arm/lib/spl.c | 7 +++----
arch/microblaze/cpu/spl.c | 6 +++---
arch/powerpc/lib/spl.c | 8 ++++----
common/spl/spl.c | 6 ++++--
common/spl/spl_nor.c | 8 +-------
include/spl.h | 5 ++---
6 files changed, 17 insertions(+), 23 deletions(-)
diff --git a/arch/arm/lib/spl.c b/arch/arm/lib/spl.c
index e606d470e38..8ff2c5065dd 100644
--- a/arch/arm/lib/spl.c
+++ b/arch/arm/lib/spl.c
@@ -44,22 +44,21 @@ void __weak board_init_f(ulong dummy)
/*
* This function jumps to an image with argument. Normally an FDT or ATAGS
* image.
- * arg: Pointer to paramter image in RAM
*/
#ifdef CONFIG_SPL_OS_BOOT
-void __noreturn jump_to_image_linux(struct spl_image_info *spl_image, void *arg)
+void __noreturn jump_to_image_linux(struct spl_image_info *spl_image)
{
unsigned long machid = 0xffffffff;
#ifdef CONFIG_MACH_TYPE
machid = CONFIG_MACH_TYPE;
#endif
- debug("Entering kernel arg pointer: 0x%p\n", arg);
+ debug("Entering kernel arg pointer: 0x%p\n", spl_image->arg);
typedef void (*image_entry_arg_t)(int, int, void *)
__attribute__ ((noreturn));
image_entry_arg_t image_entry =
(image_entry_arg_t)(uintptr_t) spl_image->entry_point;
cleanup_before_linux();
- image_entry(0, machid, arg);
+ image_entry(0, machid, spl_image->arg);
}
#endif
diff --git a/arch/microblaze/cpu/spl.c b/arch/microblaze/cpu/spl.c
index 8e6d9269dac..3d57a5a8593 100644
--- a/arch/microblaze/cpu/spl.c
+++ b/arch/microblaze/cpu/spl.c
@@ -29,15 +29,15 @@ void spl_board_init(void)
}
#ifdef CONFIG_SPL_OS_BOOT
-void __noreturn jump_to_image_linux(struct spl_image_info *spl_image, void *arg)
+void __noreturn jump_to_image_linux(struct spl_image_info *spl_image)
{
- debug("Entering kernel arg pointer: 0x%p\n", arg);
+ debug("Entering kernel arg pointer: 0x%p\n", spl_image->arg);
typedef void (*image_entry_arg_t)(char *, ulong, ulong)
__attribute__ ((noreturn));
image_entry_arg_t image_entry =
(image_entry_arg_t)spl_image->entry_point;
- image_entry(NULL, 0, (ulong)arg);
+ image_entry(NULL, 0, (ulong)spl_image->arg);
}
#endif /* CONFIG_SPL_OS_BOOT */
diff --git a/arch/powerpc/lib/spl.c b/arch/powerpc/lib/spl.c
index 080b978799b..b93197030e3 100644
--- a/arch/powerpc/lib/spl.c
+++ b/arch/powerpc/lib/spl.c
@@ -14,18 +14,18 @@ DECLARE_GLOBAL_DATA_PTR;
/*
* This function jumps to an image with argument. Normally an FDT or ATAGS
* image.
- * arg: Pointer to paramter image in RAM
*/
#ifdef CONFIG_SPL_OS_BOOT
-void __noreturn jump_to_image_linux(struct spl_image_info *spl_image, void *arg)
+void __noreturn jump_to_image_linux(struct spl_image_info *spl_image)
{
- debug("Entering kernel arg pointer: 0x%p\n", arg);
+ debug("Entering kernel arg pointer: 0x%p\n", spl_image->arg);
typedef void (*image_entry_arg_t)(void *, ulong r4, ulong r5, ulong r6,
ulong r7, ulong r8, ulong r9)
__attribute__ ((noreturn));
image_entry_arg_t image_entry =
(image_entry_arg_t)spl_image->entry_point;
- image_entry(arg, 0, 0, EPAPR_MAGIC, CONFIG_SYS_BOOTMAPSZ, 0, 0);
+ image_entry(spl_image->arg, 0, 0, EPAPR_MAGIC, CONFIG_SYS_BOOTMAPSZ,
+ 0, 0);
}
#endif /* CONFIG_SPL_OS_BOOT */
diff --git a/common/spl/spl.c b/common/spl/spl.c
index a3e73b87bc6..50828e60218 100644
--- a/common/spl/spl.c
+++ b/common/spl/spl.c
@@ -345,6 +345,9 @@ void board_init_r(gd_t *dummy1, ulong dummy2)
#endif
memset(&spl_image, '\0', sizeof(spl_image));
+#ifdef CONFIG_SYS_SPL_ARGS_ADDR
+ spl_image.arg = (void *)CONFIG_SYS_SPL_ARGS_ADDR;
+#endif
board_boot_order(spl_boot_list);
if (boot_from_devices(&spl_image, spl_boot_list,
@@ -361,8 +364,7 @@ void board_init_r(gd_t *dummy1, ulong dummy2)
case IH_OS_LINUX:
debug("Jumping to Linux\n");
spl_board_prepare_for_linux();
- jump_to_image_linux(&spl_image,
- (void *)CONFIG_SYS_SPL_ARGS_ADDR);
+ jump_to_image_linux(&spl_image);
#endif
default:
debug("Unsupported OS image.. Jumping nevertheless..\n");
diff --git a/common/spl/spl_nor.c b/common/spl/spl_nor.c
index d07ca843824..1ef8ac8b89b 100644
--- a/common/spl/spl_nor.c
+++ b/common/spl/spl_nor.c
@@ -39,13 +39,7 @@ static int spl_nor_load_image(struct spl_image_info *spl_image,
sizeof(struct image_header)),
spl_image->size);
- /*
- * Copy DT blob (fdt) to SDRAM. Passing pointer to
- * flash doesn't work
- */
- memcpy((void *)CONFIG_SYS_SPL_ARGS_ADDR,
- (void *)(CONFIG_SYS_FDT_BASE),
- CONFIG_SYS_FDT_SIZE);
+ spl_image->arg = (void *)CONFIG_SYS_FDT_BASE;
return 0;
} else {
diff --git a/include/spl.h b/include/spl.h
index 2e5b885c8d6..d1638e9d7cb 100644
--- a/include/spl.h
+++ b/include/spl.h
@@ -27,6 +27,7 @@ struct spl_image_info {
ulong entry_point;
u32 size;
u32 flags;
+ void *arg;
};
/*
@@ -106,10 +107,8 @@ int spl_board_ubi_load_image(u32 boot_device);
* This jumps into a Linux kernel using the information in @spl_image.
*
* @spl_image: Image description to set up
- * @arg: Argument to pass to Linux (typically a device tree pointer)
*/
-void __noreturn jump_to_image_linux(struct spl_image_info *spl_image,
- void *arg);
+void __noreturn jump_to_image_linux(struct spl_image_info *spl_image);
/**
* spl_start_uboot() - Check if SPL should start the kernel or U-Boot
--
GitLab
From 890bafd752460b79c607e829f58bf88f0f8484b7 Mon Sep 17 00:00:00 2001
From: Vikas Manocha <vikas.manocha@st.com>
Date: Mon, 10 Apr 2017 15:02:50 -0700
Subject: [PATCH 226/282] stm32f7: use clock driver to enable qspi controller
clock
Signed-off-by: Vikas Manocha <vikas.manocha@st.com>
cc: Christophe KERELLO <christophe.kerello@st.com>
---
arch/arm/dts/stm32f746.dtsi | 1 +
drivers/spi/stm32_qspi.c | 16 +++++++++++++++-
2 files changed, 16 insertions(+), 1 deletion(-)
diff --git a/arch/arm/dts/stm32f746.dtsi b/arch/arm/dts/stm32f746.dtsi
index b2b0b5f0992..883f818578c 100644
--- a/arch/arm/dts/stm32f746.dtsi
+++ b/arch/arm/dts/stm32f746.dtsi
@@ -78,6 +78,7 @@
reg-names = "QuadSPI", "QuadSPI-memory";
interrupts = <92>;
spi-max-frequency = <108000000>;
+ clocks = <&rcc 0 65>;
status = "disabled";
};
usart1: serial@40011000 {
diff --git a/drivers/spi/stm32_qspi.c b/drivers/spi/stm32_qspi.c
index 05358ebf4cd..f0434a4413d 100644
--- a/drivers/spi/stm32_qspi.c
+++ b/drivers/spi/stm32_qspi.c
@@ -17,6 +17,7 @@
#include <errno.h>
#include <asm/arch/stm32.h>
#include <asm/arch/stm32_defs.h>
+#include <clk.h>
DECLARE_GLOBAL_DATA_PTR;
@@ -457,7 +458,20 @@ static int stm32_qspi_probe(struct udevice *bus)
priv->max_hz = plat->max_hz;
- clock_setup(QSPI_CLOCK_CFG);
+#ifdef CONFIG_CLK
+ int ret;
+ struct clk clk;
+ ret = clk_get_by_index(bus, 0, &clk);
+ if (ret < 0)
+ return ret;
+
+ ret = clk_enable(&clk);
+
+ if (ret) {
+ dev_err(bus, "failed to enable clock\n");
+ return ret;
+ }
+#endif
setbits_le32(&priv->regs->cr, STM32_QSPI_CR_SSHIFT);
--
GitLab
From bf1ae4426b89bd8b3e036e012acc4bc88fec4c6e Mon Sep 17 00:00:00 2001
From: Vikas Manocha <vikas.manocha@st.com>
Date: Mon, 10 Apr 2017 15:02:51 -0700
Subject: [PATCH 227/282] stm32f7: sdram: move sdram driver code to ram drivers
area
Signed-off-by: Vikas Manocha <vikas.manocha@st.com>
cc: Christophe KERELLO <christophe.kerello@st.com>
---
board/st/stm32f746-disco/stm32f746-disco.c | 113 +------------------
configs/stm32f746-disco_defconfig | 6 ++
drivers/ram/Kconfig | 8 ++
drivers/ram/Makefile | 1 +
drivers/ram/stm32_sdram.c | 119 +++++++++++++++++++++
5 files changed, 135 insertions(+), 112 deletions(-)
create mode 100644 drivers/ram/stm32_sdram.c
diff --git a/board/st/stm32f746-disco/stm32f746-disco.c b/board/st/stm32f746-disco/stm32f746-disco.c
index fdad8d13a7c..15693588137 100644
--- a/board/st/stm32f746-disco/stm32f746-disco.c
+++ b/board/st/stm32f746-disco/stm32f746-disco.c
@@ -10,7 +10,6 @@
#include <asm/armv7m.h>
#include <asm/arch/stm32.h>
#include <asm/arch/gpio.h>
-#include <asm/arch/fmc.h>
#include <dm/platdata.h>
#include <dm/platform_data/serial_stm32x7.h>
#include <asm/arch/stm32_periph.h>
@@ -106,57 +105,8 @@ out:
return rv;
}
-static inline u32 _ns2clk(u32 ns, u32 freq)
-{
- u32 tmp = freq/1000000;
- return (tmp * ns) / 1000;
-}
-
-#define NS2CLK(ns) (_ns2clk(ns, freq))
-
-/*
- * Following are timings for IS42S16400J, from corresponding datasheet
- */
-#define SDRAM_CAS 3 /* 3 cycles */
-#define SDRAM_NB 1 /* Number of banks */
-#define SDRAM_MWID 1 /* 16 bit memory */
-
-#define SDRAM_NR 0x1 /* 12-bit row */
-#define SDRAM_NC 0x0 /* 8-bit col */
-#define SDRAM_RBURST 0x1 /* Single read requests always as bursts */
-#define SDRAM_RPIPE 0x0 /* No HCLK clock cycle delay */
-
-#define SDRAM_TRRD NS2CLK(12)
-#define SDRAM_TRCD NS2CLK(18)
-#define SDRAM_TRP NS2CLK(18)
-#define SDRAM_TRAS NS2CLK(42)
-#define SDRAM_TRC NS2CLK(60)
-#define SDRAM_TRFC NS2CLK(60)
-#define SDRAM_TCDL (1 - 1)
-#define SDRAM_TRDL NS2CLK(12)
-#define SDRAM_TBDL (1 - 1)
-#define SDRAM_TREF (NS2CLK(64000000 / 8192) - 20)
-#define SDRAM_TCCD (1 - 1)
-
-#define SDRAM_TXSR SDRAM_TRFC /* Row cycle time after precharge */
-#define SDRAM_TMRD 1 /* Page 10, Mode Register Set */
-
-
-/* Last data in to row precharge, need also comply ineq on page 1648 */
-#define SDRAM_TWR max(\
- (int)max((int)SDRAM_TRDL, (int)(SDRAM_TRAS - SDRAM_TRCD)), \
- (int)(SDRAM_TRC - SDRAM_TRCD - SDRAM_TRP)\
-)
-
-
-#define SDRAM_MODE_BL_SHIFT 0
-#define SDRAM_MODE_CAS_SHIFT 4
-#define SDRAM_MODE_BL 0
-#define SDRAM_MODE_CAS SDRAM_CAS
-
int dram_init(void)
{
- u32 freq;
int rv;
rv = fmc_setup_gpio();
@@ -164,67 +114,7 @@ int dram_init(void)
return rv;
clock_setup(FMC_CLOCK_CFG);
-
- /*
- * Get frequency for NS2CLK calculation.
- */
- freq = clock_get(CLOCK_AHB) / CONFIG_SYS_RAM_FREQ_DIV;
-
- writel(
- CONFIG_SYS_RAM_FREQ_DIV << FMC_SDCR_SDCLK_SHIFT
- | SDRAM_CAS << FMC_SDCR_CAS_SHIFT
- | SDRAM_NB << FMC_SDCR_NB_SHIFT
- | SDRAM_MWID << FMC_SDCR_MWID_SHIFT
- | SDRAM_NR << FMC_SDCR_NR_SHIFT
- | SDRAM_NC << FMC_SDCR_NC_SHIFT
- | SDRAM_RPIPE << FMC_SDCR_RPIPE_SHIFT
- | SDRAM_RBURST << FMC_SDCR_RBURST_SHIFT,
- &STM32_SDRAM_FMC->sdcr1);
-
- writel(
- SDRAM_TRCD << FMC_SDTR_TRCD_SHIFT
- | SDRAM_TRP << FMC_SDTR_TRP_SHIFT
- | SDRAM_TWR << FMC_SDTR_TWR_SHIFT
- | SDRAM_TRC << FMC_SDTR_TRC_SHIFT
- | SDRAM_TRAS << FMC_SDTR_TRAS_SHIFT
- | SDRAM_TXSR << FMC_SDTR_TXSR_SHIFT
- | SDRAM_TMRD << FMC_SDTR_TMRD_SHIFT,
- &STM32_SDRAM_FMC->sdtr1);
-
- writel(FMC_SDCMR_BANK_1 | FMC_SDCMR_MODE_START_CLOCK,
- &STM32_SDRAM_FMC->sdcmr);
-
- udelay(200); /* 200 us delay, page 10, "Power-Up" */
- FMC_BUSY_WAIT();
-
- writel(FMC_SDCMR_BANK_1 | FMC_SDCMR_MODE_PRECHARGE,
- &STM32_SDRAM_FMC->sdcmr);
-
- udelay(100);
- FMC_BUSY_WAIT();
-
- writel((FMC_SDCMR_BANK_1 | FMC_SDCMR_MODE_AUTOREFRESH
- | 7 << FMC_SDCMR_NRFS_SHIFT), &STM32_SDRAM_FMC->sdcmr);
-
- udelay(100);
- FMC_BUSY_WAIT();
-
- writel(FMC_SDCMR_BANK_1 | (SDRAM_MODE_BL << SDRAM_MODE_BL_SHIFT
- | SDRAM_MODE_CAS << SDRAM_MODE_CAS_SHIFT)
- << FMC_SDCMR_MODE_REGISTER_SHIFT | FMC_SDCMR_MODE_WRITE_MODE,
- &STM32_SDRAM_FMC->sdcmr);
-
- udelay(100);
-
- FMC_BUSY_WAIT();
-
- writel(FMC_SDCMR_BANK_1 | FMC_SDCMR_MODE_NORMAL,
- &STM32_SDRAM_FMC->sdcmr);
-
- FMC_BUSY_WAIT();
-
- /* Refresh timer */
- writel(SDRAM_TREF, &STM32_SDRAM_FMC->sdrtr);
+ stm32_sdram_init();
/*
* Fill in global info with description of SRAM configuration
@@ -233,7 +123,6 @@ int dram_init(void)
gd->bd->bi_dram[0].size = CONFIG_SYS_RAM_SIZE;
gd->ram_size = CONFIG_SYS_RAM_SIZE;
-
return rv;
}
diff --git a/configs/stm32f746-disco_defconfig b/configs/stm32f746-disco_defconfig
index ea98391684b..57a0d610df3 100644
--- a/configs/stm32f746-disco_defconfig
+++ b/configs/stm32f746-disco_defconfig
@@ -43,3 +43,9 @@ CONFIG_DM_SPI=y
CONFIG_STM32_QSPI=y
CONFIG_OF_LIBFDT_OVERLAY=y
# CONFIG_EFI_LOADER is not set
+CONFIG_CLK=y
+CONFIG_PINCTRL=y
+# CONFIG_PINCTRL_FULL is not set
+CONFIG_PINCTRL_STM32=y
+CONFIG_RAM=y
+CONFIG_STM32_SDRAM=y
diff --git a/drivers/ram/Kconfig b/drivers/ram/Kconfig
index ff09f226dfd..61afd7a92a4 100644
--- a/drivers/ram/Kconfig
+++ b/drivers/ram/Kconfig
@@ -16,3 +16,11 @@ config SPL_RAM
If this is acceptable and you have a need to use RAM drivers in
SPL, enable this option. It might provide a cleaner interface to
setting up RAM (e.g. SDRAM / DDR) within SPL.
+
+config STM32_SDRAM
+ bool "Enable STM32 SDRAM support"
+ depends on RAM
+ help
+ STM32F7 family devices support flexible memory controller(FMC) to
+ support external memories like sdram, psram & nand.
+ This driver is for the sdram memory interface with the FMC.
diff --git a/drivers/ram/Makefile b/drivers/ram/Makefile
index 0e102491a4a..ecb036dfbab 100644
--- a/drivers/ram/Makefile
+++ b/drivers/ram/Makefile
@@ -6,3 +6,4 @@
#
obj-$(CONFIG_RAM) += ram-uclass.o
obj-$(CONFIG_SANDBOX) += sandbox_ram.o
+obj-$(CONFIG_STM32_SDRAM) += stm32_sdram.o
diff --git a/drivers/ram/stm32_sdram.c b/drivers/ram/stm32_sdram.c
new file mode 100644
index 00000000000..13f896484e6
--- /dev/null
+++ b/drivers/ram/stm32_sdram.c
@@ -0,0 +1,119 @@
+/*
+ * (C) Copyright 2017
+ * Vikas Manocha, <vikas.manocha@st.com>
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include <common.h>
+#include <asm/io.h>
+#include <asm/arch/fmc.h>
+#include <asm/arch/stm32.h>
+
+static inline u32 _ns2clk(u32 ns, u32 freq)
+{
+ u32 tmp = freq/1000000;
+ return (tmp * ns) / 1000;
+}
+
+#define NS2CLK(ns) (_ns2clk(ns, freq))
+
+/*
+ * Following are timings for IS42S16400J, from corresponding datasheet
+ */
+#define SDRAM_CAS 3 /* 3 cycles */
+#define SDRAM_NB 1 /* Number of banks */
+#define SDRAM_MWID 1 /* 16 bit memory */
+
+#define SDRAM_NR 0x1 /* 12-bit row */
+#define SDRAM_NC 0x0 /* 8-bit col */
+#define SDRAM_RBURST 0x1 /* Single read requests always as bursts */
+#define SDRAM_RPIPE 0x0 /* No HCLK clock cycle delay */
+
+#define SDRAM_TRRD NS2CLK(12)
+#define SDRAM_TRCD NS2CLK(18)
+#define SDRAM_TRP NS2CLK(18)
+#define SDRAM_TRAS NS2CLK(42)
+#define SDRAM_TRC NS2CLK(60)
+#define SDRAM_TRFC NS2CLK(60)
+#define SDRAM_TCDL (1 - 1)
+#define SDRAM_TRDL NS2CLK(12)
+#define SDRAM_TBDL (1 - 1)
+#define SDRAM_TREF (NS2CLK(64000000 / 8192) - 20)
+#define SDRAM_TCCD (1 - 1)
+
+#define SDRAM_TXSR SDRAM_TRFC /* Row cycle time after precharge */
+#define SDRAM_TMRD 1 /* Page 10, Mode Register Set */
+
+
+/* Last data in to row precharge, need also comply ineq on page 1648 */
+#define SDRAM_TWR max(\
+ (int)max((int)SDRAM_TRDL, (int)(SDRAM_TRAS - SDRAM_TRCD)), \
+ (int)(SDRAM_TRC - SDRAM_TRCD - SDRAM_TRP)\
+ )
+
+
+#define SDRAM_MODE_BL_SHIFT 0
+#define SDRAM_MODE_CAS_SHIFT 4
+#define SDRAM_MODE_BL 0
+#define SDRAM_MODE_CAS SDRAM_CAS
+
+int stm32_sdram_init(void)
+{
+ u32 freq;
+
+ /*
+ * Get frequency for NS2CLK calculation.
+ */
+ freq = clock_get(CLOCK_AHB) / CONFIG_SYS_RAM_FREQ_DIV;
+
+ writel(CONFIG_SYS_RAM_FREQ_DIV << FMC_SDCR_SDCLK_SHIFT
+ | SDRAM_CAS << FMC_SDCR_CAS_SHIFT
+ | SDRAM_NB << FMC_SDCR_NB_SHIFT
+ | SDRAM_MWID << FMC_SDCR_MWID_SHIFT
+ | SDRAM_NR << FMC_SDCR_NR_SHIFT
+ | SDRAM_NC << FMC_SDCR_NC_SHIFT
+ | SDRAM_RPIPE << FMC_SDCR_RPIPE_SHIFT
+ | SDRAM_RBURST << FMC_SDCR_RBURST_SHIFT,
+ &STM32_SDRAM_FMC->sdcr1);
+
+ writel(SDRAM_TRCD << FMC_SDTR_TRCD_SHIFT
+ | SDRAM_TRP << FMC_SDTR_TRP_SHIFT
+ | SDRAM_TWR << FMC_SDTR_TWR_SHIFT
+ | SDRAM_TRC << FMC_SDTR_TRC_SHIFT
+ | SDRAM_TRAS << FMC_SDTR_TRAS_SHIFT
+ | SDRAM_TXSR << FMC_SDTR_TXSR_SHIFT
+ | SDRAM_TMRD << FMC_SDTR_TMRD_SHIFT,
+ &STM32_SDRAM_FMC->sdtr1);
+
+ writel(FMC_SDCMR_BANK_1 | FMC_SDCMR_MODE_START_CLOCK,
+ &STM32_SDRAM_FMC->sdcmr);
+ udelay(200); /* 200 us delay, page 10, "Power-Up" */
+ FMC_BUSY_WAIT();
+
+ writel(FMC_SDCMR_BANK_1 | FMC_SDCMR_MODE_PRECHARGE,
+ &STM32_SDRAM_FMC->sdcmr);
+ udelay(100);
+ FMC_BUSY_WAIT();
+
+ writel((FMC_SDCMR_BANK_1 | FMC_SDCMR_MODE_AUTOREFRESH
+ | 7 << FMC_SDCMR_NRFS_SHIFT), &STM32_SDRAM_FMC->sdcmr);
+ udelay(100);
+ FMC_BUSY_WAIT();
+
+ writel(FMC_SDCMR_BANK_1 | (SDRAM_MODE_BL << SDRAM_MODE_BL_SHIFT
+ | SDRAM_MODE_CAS << SDRAM_MODE_CAS_SHIFT)
+ << FMC_SDCMR_MODE_REGISTER_SHIFT | FMC_SDCMR_MODE_WRITE_MODE,
+ &STM32_SDRAM_FMC->sdcmr);
+ udelay(100);
+ FMC_BUSY_WAIT();
+
+ writel(FMC_SDCMR_BANK_1 | FMC_SDCMR_MODE_NORMAL,
+ &STM32_SDRAM_FMC->sdcmr);
+ FMC_BUSY_WAIT();
+
+ /* Refresh timer */
+ writel(SDRAM_TREF, &STM32_SDRAM_FMC->sdrtr);
+
+ return 0;
+}
--
GitLab
From 910a52ede3d7cf75b3157b9a3ef6f40879a38194 Mon Sep 17 00:00:00 2001
From: Vikas Manocha <vikas.manocha@st.com>
Date: Mon, 10 Apr 2017 15:02:52 -0700
Subject: [PATCH 228/282] stm32f7: dm: add driver model support for sdram
Signed-off-by: Vikas Manocha <vikas.manocha@st.com>
cc: Christophe KERELLO <christophe.kerello@st.com>
---
drivers/ram/stm32_sdram.c | 31 +++++++++++++++++++++++++++++++
1 file changed, 31 insertions(+)
diff --git a/drivers/ram/stm32_sdram.c b/drivers/ram/stm32_sdram.c
index 13f896484e6..67be61f01ac 100644
--- a/drivers/ram/stm32_sdram.c
+++ b/drivers/ram/stm32_sdram.c
@@ -6,6 +6,8 @@
*/
#include <common.h>
+#include <dm.h>
+#include <ram.h>
#include <asm/io.h>
#include <asm/arch/fmc.h>
#include <asm/arch/stm32.h>
@@ -117,3 +119,32 @@ int stm32_sdram_init(void)
return 0;
}
+
+static int stm32_fmc_probe(struct udevice *dev)
+{
+ stm32_sdram_init();
+ return 0;
+}
+
+static int stm32_fmc_get_info(struct udevice *dev, struct ram_info *info)
+{
+ info->size = CONFIG_SYS_RAM_SIZE;
+ return 0;
+}
+
+static struct ram_ops stm32_fmc_ops = {
+ .get_info = stm32_fmc_get_info,
+};
+
+static const struct udevice_id stm32_fmc_ids[] = {
+ { .compatible = "st,stm32-fmc" },
+ { }
+};
+
+U_BOOT_DRIVER(stm32_fmc) = {
+ .name = "stm32_fmc",
+ .id = UCLASS_RAM,
+ .of_match = stm32_fmc_ids,
+ .ops = &stm32_fmc_ops,
+ .probe = stm32_fmc_probe,
+};
--
GitLab
From fd198ee1a8c5de79d31df9ca3c04d6d783868690 Mon Sep 17 00:00:00 2001
From: Vikas Manocha <vikas.manocha@st.com>
Date: Mon, 10 Apr 2017 15:02:53 -0700
Subject: [PATCH 229/282] ARM: DT: stm32f7: add sdram pin contol node
Also added DT binding doc for stm32 fmc(flexible memory controller).
Signed-off-by: Vikas Manocha <vikas.manocha@st.com>
cc: Christophe KERELLO <christophe.kerello@st.com>
---
arch/arm/dts/stm32f746-disco.dts | 7 +++
arch/arm/dts/stm32f746.dtsi | 56 +++++++++++++++++++
doc/device-tree-bindings/ram/st,stm32-fmc.txt | 51 +++++++++++++++++
3 files changed, 114 insertions(+)
create mode 100644 doc/device-tree-bindings/ram/st,stm32-fmc.txt
diff --git a/arch/arm/dts/stm32f746-disco.dts b/arch/arm/dts/stm32f746-disco.dts
index 07e0ca70210..5846b0d7e74 100644
--- a/arch/arm/dts/stm32f746-disco.dts
+++ b/arch/arm/dts/stm32f746-disco.dts
@@ -1,5 +1,6 @@
/*
* Copyright 2016 - Michael Kurz <michi.kurz@gmail.com>
+ * Copyright 2016 - Vikas MANOCHA <vikas.manocha@st.com>
*
* Based on:
* stm32f469-disco.dts from Linux
@@ -76,6 +77,12 @@
status = "okay";
};
+&fmc {
+ pinctrl-0 = <&fmc_pins>;
+ pinctrl-names = "default";
+ status = "okay";
+};
+
&mac {
status = "okay";
pinctrl-0 = <ðernet_mii>;
diff --git a/arch/arm/dts/stm32f746.dtsi b/arch/arm/dts/stm32f746.dtsi
index 883f818578c..3707550b039 100644
--- a/arch/arm/dts/stm32f746.dtsi
+++ b/arch/arm/dts/stm32f746.dtsi
@@ -1,5 +1,6 @@
/*
* Copyright 2016 - Michael Kurz <michi.kurz@gmail.com>
+ * Copyright 2016 - Vikas MANOCHA <vikas.manocha@st.com>
*
* Based on:
* stm32f429.dtsi from Linux
@@ -70,6 +71,12 @@
status = "disabled";
};
+ fmc: fmc@A0000000 {
+ compatible = "st,stm32-fmc";
+ reg = <0xA0000000 0x1000>;
+ u-boot,dm-pre-reloc;
+ };
+
qspi: quadspi@A0001000 {
compatible = "st,stm32-qspi";
#address-cells = <1>;
@@ -143,6 +150,55 @@
slew-rate = <2>;
};
};
+
+ fmc_pins: fmc@0 {
+ pins {
+ pinmux = <STM32F746_PD10_FUNC_FMC_D15>,
+ <STM32F746_PD9_FUNC_FMC_D14>,
+ <STM32F746_PD8_FUNC_FMC_D13>,
+ <STM32F746_PE15_FUNC_FMC_D12>,
+ <STM32F746_PE14_FUNC_FMC_D11>,
+ <STM32F746_PE13_FUNC_FMC_D10>,
+ <STM32F746_PE12_FUNC_FMC_D9>,
+ <STM32F746_PE11_FUNC_FMC_D8>,
+ <STM32F746_PE10_FUNC_FMC_D7>,
+ <STM32F746_PE9_FUNC_FMC_D6>,
+ <STM32F746_PE8_FUNC_FMC_D5>,
+ <STM32F746_PE7_FUNC_FMC_D4>,
+ <STM32F746_PD1_FUNC_FMC_D3>,
+ <STM32F746_PD0_FUNC_FMC_D2>,
+ <STM32F746_PD15_FUNC_FMC_D1>,
+ <STM32F746_PD14_FUNC_FMC_D0>,
+
+ <STM32F746_PE1_FUNC_FMC_NBL1>,
+ <STM32F746_PE0_FUNC_FMC_NBL0>,
+
+ <STM32F746_PG5_FUNC_FMC_A15_FMC_BA1>,
+ <STM32F746_PG4_FUNC_FMC_A14_FMC_BA0>,
+
+ <STM32F746_PG1_FUNC_FMC_A11>,
+ <STM32F746_PG0_FUNC_FMC_A10>,
+ <STM32F746_PF15_FUNC_FMC_A9>,
+ <STM32F746_PF14_FUNC_FMC_A8>,
+ <STM32F746_PF13_FUNC_FMC_A7>,
+ <STM32F746_PF12_FUNC_FMC_A6>,
+ <STM32F746_PF5_FUNC_FMC_A5>,
+ <STM32F746_PF4_FUNC_FMC_A4>,
+ <STM32F746_PF3_FUNC_FMC_A3>,
+ <STM32F746_PF2_FUNC_FMC_A2>,
+ <STM32F746_PF1_FUNC_FMC_A1>,
+ <STM32F746_PF0_FUNC_FMC_A0>,
+
+ <STM32F746_PH3_FUNC_FMC_SDNE0>,
+ <STM32F746_PH5_FUNC_FMC_SDNWE>,
+ <STM32F746_PF11_FUNC_FMC_SDNRAS>,
+ <STM32F746_PG15_FUNC_FMC_SDNCAS>,
+ <STM32F746_PC3_FUNC_FMC_SDCKE0>,
+ <STM32F746_PG8_FUNC_FMC_SDCLK>;
+ slew-rate = <2>;
+ };
+ };
+
};
};
};
diff --git a/doc/device-tree-bindings/ram/st,stm32-fmc.txt b/doc/device-tree-bindings/ram/st,stm32-fmc.txt
new file mode 100644
index 00000000000..3d1392c7640
--- /dev/null
+++ b/doc/device-tree-bindings/ram/st,stm32-fmc.txt
@@ -0,0 +1,51 @@
+ST, stm32 flexible memory controller Drive
+Required properties:
+- compatible : "st,stm32-fmc"
+- reg : fmc controller base address
+- clocks : fmc controller clock
+u-boot,dm-pre-reloc: flag to initialize memory before relocation.
+
+on-board sdram memory attributes:
+- st,sdram-control : parameters for sdram configuration, in this order:
+ number of columns
+ number of rows
+ memory width
+ number of intenal banks in memory
+ cas latency
+ read burst enable or disable
+ read pipe delay
+
+- st,sdram-timing: timings for sdram, in this order:
+ tmrd
+ txsr
+ tras
+ trc
+ trp
+ trcd
+
+There is device tree include file at :
+include/dt-bindings/memory/stm32-sdram.h to define sdram control and timing
+parameters as MACROS.
+
+Example:
+ fmc: fmc@A0000000 {
+ compatible = "st,stm32-fmc";
+ reg = <0xA0000000 0x1000>;
+ clocks = <&rcc 0 64>;
+ u-boot,dm-pre-reloc;
+ };
+
+ &fmc {
+ pinctrl-0 = <&fmc_pins>;
+ pinctrl-names = "default";
+ status = "okay";
+
+ mr-nbanks = <1>;
+ /* sdram memory configuration from sdram datasheet */
+ bank1: bank@0 {
+ st,sdram-control = /bits/ 8 <NO_COL_8 NO_ROW_12 MWIDTH_16 BANKS_2
+ CAS_3 RD_BURST_EN RD_PIPE_DL_0>;
+ st,sdram-timing = /bits/ 8 <TMRD_1 TXSR_60 TRAS_42 TRC_60 TRP_18
+ TRCD_18>;
+ };
+}
--
GitLab
From 2d9c33ca3f7ba69eaf4b2b88f36a0f3cf1a1e19f Mon Sep 17 00:00:00 2001
From: Vikas Manocha <vikas.manocha@st.com>
Date: Mon, 10 Apr 2017 15:02:54 -0700
Subject: [PATCH 230/282] stm32f7: use driver model for sdram initialization
As driver model takes care of pin control configuraion, this patch also
removes the sdram/fmc pin configuration.
Signed-off-by: Vikas Manocha <vikas.manocha@st.com>
cc: Christophe KERELLO <christophe.kerello@st.com>
---
board/st/stm32f746-disco/stm32f746-disco.c | 89 +++++-----------------
1 file changed, 19 insertions(+), 70 deletions(-)
diff --git a/board/st/stm32f746-disco/stm32f746-disco.c b/board/st/stm32f746-disco/stm32f746-disco.c
index 15693588137..e1113a6989b 100644
--- a/board/st/stm32f746-disco/stm32f746-disco.c
+++ b/board/st/stm32f746-disco/stm32f746-disco.c
@@ -6,6 +6,8 @@
*/
#include <common.h>
+#include <dm.h>
+#include <ram.h>
#include <asm/io.h>
#include <asm/armv7m.h>
#include <asm/arch/stm32.h>
@@ -26,66 +28,8 @@ const struct stm32_gpio_ctl gpio_ctl_gpout = {
.af = STM32_GPIO_AF0
};
-const struct stm32_gpio_ctl gpio_ctl_fmc = {
- .mode = STM32_GPIO_MODE_AF,
- .otype = STM32_GPIO_OTYPE_PP,
- .speed = STM32_GPIO_SPEED_100M,
- .pupd = STM32_GPIO_PUPD_NO,
- .af = STM32_GPIO_AF12
-};
-
-static const struct stm32_gpio_dsc ext_ram_fmc_gpio[] = {
- /* Chip is LQFP144, see DM00077036.pdf for details */
- {STM32_GPIO_PORT_D, STM32_GPIO_PIN_10}, /* 79, FMC_D15 */
- {STM32_GPIO_PORT_D, STM32_GPIO_PIN_9}, /* 78, FMC_D14 */
- {STM32_GPIO_PORT_D, STM32_GPIO_PIN_8}, /* 77, FMC_D13 */
- {STM32_GPIO_PORT_E, STM32_GPIO_PIN_15}, /* 68, FMC_D12 */
- {STM32_GPIO_PORT_E, STM32_GPIO_PIN_14}, /* 67, FMC_D11 */
- {STM32_GPIO_PORT_E, STM32_GPIO_PIN_13}, /* 66, FMC_D10 */
- {STM32_GPIO_PORT_E, STM32_GPIO_PIN_12}, /* 65, FMC_D9 */
- {STM32_GPIO_PORT_E, STM32_GPIO_PIN_11}, /* 64, FMC_D8 */
- {STM32_GPIO_PORT_E, STM32_GPIO_PIN_10}, /* 63, FMC_D7 */
- {STM32_GPIO_PORT_E, STM32_GPIO_PIN_9}, /* 60, FMC_D6 */
- {STM32_GPIO_PORT_E, STM32_GPIO_PIN_8}, /* 59, FMC_D5 */
- {STM32_GPIO_PORT_E, STM32_GPIO_PIN_7}, /* 58, FMC_D4 */
- {STM32_GPIO_PORT_D, STM32_GPIO_PIN_1}, /* 115, FMC_D3 */
- {STM32_GPIO_PORT_D, STM32_GPIO_PIN_0}, /* 114, FMC_D2 */
- {STM32_GPIO_PORT_D, STM32_GPIO_PIN_15}, /* 86, FMC_D1 */
- {STM32_GPIO_PORT_D, STM32_GPIO_PIN_14}, /* 85, FMC_D0 */
-
- {STM32_GPIO_PORT_E, STM32_GPIO_PIN_1}, /* 142, FMC_NBL1 */
- {STM32_GPIO_PORT_E, STM32_GPIO_PIN_0}, /* 141, FMC_NBL0 */
-
- {STM32_GPIO_PORT_G, STM32_GPIO_PIN_5}, /* 90, FMC_A15, BA1 */
- {STM32_GPIO_PORT_G, STM32_GPIO_PIN_4}, /* 89, FMC_A14, BA0 */
-
- {STM32_GPIO_PORT_G, STM32_GPIO_PIN_1}, /* 57, FMC_A11 */
- {STM32_GPIO_PORT_G, STM32_GPIO_PIN_0}, /* 56, FMC_A10 */
- {STM32_GPIO_PORT_F, STM32_GPIO_PIN_15}, /* 55, FMC_A9 */
- {STM32_GPIO_PORT_F, STM32_GPIO_PIN_14}, /* 54, FMC_A8 */
- {STM32_GPIO_PORT_F, STM32_GPIO_PIN_13}, /* 53, FMC_A7 */
- {STM32_GPIO_PORT_F, STM32_GPIO_PIN_12}, /* 50, FMC_A6 */
- {STM32_GPIO_PORT_F, STM32_GPIO_PIN_5}, /* 15, FMC_A5 */
- {STM32_GPIO_PORT_F, STM32_GPIO_PIN_4}, /* 14, FMC_A4 */
- {STM32_GPIO_PORT_F, STM32_GPIO_PIN_3}, /* 13, FMC_A3 */
- {STM32_GPIO_PORT_F, STM32_GPIO_PIN_2}, /* 12, FMC_A2 */
- {STM32_GPIO_PORT_F, STM32_GPIO_PIN_1}, /* 11, FMC_A1 */
- {STM32_GPIO_PORT_F, STM32_GPIO_PIN_0}, /* 10, FMC_A0 */
-
- {STM32_GPIO_PORT_H, STM32_GPIO_PIN_3}, /* 136, SDRAM_NE */
- {STM32_GPIO_PORT_F, STM32_GPIO_PIN_11}, /* 49, SDRAM_NRAS */
- {STM32_GPIO_PORT_G, STM32_GPIO_PIN_15}, /* 132, SDRAM_NCAS */
- {STM32_GPIO_PORT_H, STM32_GPIO_PIN_5}, /* 26, SDRAM_NWE */
- {STM32_GPIO_PORT_C, STM32_GPIO_PIN_3}, /* 135, SDRAM_CKE */
-
- {STM32_GPIO_PORT_G, STM32_GPIO_PIN_8}, /* 93, SDRAM_CLK */
-};
-
static int fmc_setup_gpio(void)
{
- int rv = 0;
- int i;
-
clock_setup(GPIO_B_CLOCK_CFG);
clock_setup(GPIO_C_CLOCK_CFG);
clock_setup(GPIO_D_CLOCK_CFG);
@@ -94,19 +38,13 @@ static int fmc_setup_gpio(void)
clock_setup(GPIO_G_CLOCK_CFG);
clock_setup(GPIO_H_CLOCK_CFG);
- for (i = 0; i < ARRAY_SIZE(ext_ram_fmc_gpio); i++) {
- rv = stm32_gpio_config(&ext_ram_fmc_gpio[i],
- &gpio_ctl_fmc);
- if (rv)
- goto out;
- }
-
-out:
- return rv;
+ return 0;
}
int dram_init(void)
{
+ struct udevice *dev;
+ struct ram_info ram;
int rv;
rv = fmc_setup_gpio();
@@ -114,15 +52,26 @@ int dram_init(void)
return rv;
clock_setup(FMC_CLOCK_CFG);
- stm32_sdram_init();
+
+ rv = uclass_get_device(UCLASS_RAM, 0, &dev);
+ if (rv) {
+ debug("DRAM init failed: %d\n", rv);
+ return rv;
+ }
+ rv = ram_get_info(dev, &ram);
+ if (rv) {
+ debug("Cannot get DRAM size: %d\n", rv);
+ return rv;
+ }
+ debug("SDRAM base=%lx, size=%x\n", ram.base, ram.size);
+ gd->ram_size = ram.size;
/*
* Fill in global info with description of SRAM configuration
*/
gd->bd->bi_dram[0].start = CONFIG_SYS_RAM_BASE;
- gd->bd->bi_dram[0].size = CONFIG_SYS_RAM_SIZE;
+ gd->bd->bi_dram[0].size = ram.size;
- gd->ram_size = CONFIG_SYS_RAM_SIZE;
return rv;
}
--
GitLab
From d0b24c1aa96729d4d9fee02e2c60fc920068c6c5 Mon Sep 17 00:00:00 2001
From: Vikas Manocha <vikas.manocha@st.com>
Date: Mon, 10 Apr 2017 15:02:55 -0700
Subject: [PATCH 231/282] stm32f7: use clock driver to enable sdram controller
clock
This patch also removes the sdram/fmc clock enable from board specific
code.
Signed-off-by: Vikas Manocha <vikas.manocha@st.com>
cc: Christophe KERELLO <christophe.kerello@st.com>
---
arch/arm/dts/stm32f746.dtsi | 1 +
board/st/stm32f746-disco/stm32f746-disco.c | 2 --
drivers/ram/stm32_sdram.c | 15 +++++++++++++++
3 files changed, 16 insertions(+), 2 deletions(-)
diff --git a/arch/arm/dts/stm32f746.dtsi b/arch/arm/dts/stm32f746.dtsi
index 3707550b039..e9fd6f4e2ef 100644
--- a/arch/arm/dts/stm32f746.dtsi
+++ b/arch/arm/dts/stm32f746.dtsi
@@ -74,6 +74,7 @@
fmc: fmc@A0000000 {
compatible = "st,stm32-fmc";
reg = <0xA0000000 0x1000>;
+ clocks = <&rcc 0 64>;
u-boot,dm-pre-reloc;
};
diff --git a/board/st/stm32f746-disco/stm32f746-disco.c b/board/st/stm32f746-disco/stm32f746-disco.c
index e1113a6989b..370db15bea9 100644
--- a/board/st/stm32f746-disco/stm32f746-disco.c
+++ b/board/st/stm32f746-disco/stm32f746-disco.c
@@ -51,8 +51,6 @@ int dram_init(void)
if (rv)
return rv;
- clock_setup(FMC_CLOCK_CFG);
-
rv = uclass_get_device(UCLASS_RAM, 0, &dev);
if (rv) {
debug("DRAM init failed: %d\n", rv);
diff --git a/drivers/ram/stm32_sdram.c b/drivers/ram/stm32_sdram.c
index 67be61f01ac..67d885572d6 100644
--- a/drivers/ram/stm32_sdram.c
+++ b/drivers/ram/stm32_sdram.c
@@ -6,6 +6,7 @@
*/
#include <common.h>
+#include <clk.h>
#include <dm.h>
#include <ram.h>
#include <asm/io.h>
@@ -122,6 +123,20 @@ int stm32_sdram_init(void)
static int stm32_fmc_probe(struct udevice *dev)
{
+#ifdef CONFIG_CLK
+ int ret;
+ struct clk clk;
+ ret = clk_get_by_index(dev, 0, &clk);
+ if (ret < 0)
+ return ret;
+
+ ret = clk_enable(&clk);
+
+ if (ret) {
+ dev_err(dev, "failed to enable clock\n");
+ return ret;
+ }
+#endif
stm32_sdram_init();
return 0;
}
--
GitLab
From 6c9a10034a21680c4b2595d9b6468a767dedebca Mon Sep 17 00:00:00 2001
From: Vikas Manocha <vikas.manocha@st.com>
Date: Mon, 10 Apr 2017 15:02:56 -0700
Subject: [PATCH 232/282] stm32f7: sdram: use sdram device tree node to
configure sdram controller
Signed-off-by: Vikas Manocha <vikas.manocha@st.com>
cc: Christophe KERELLO <christophe.kerello@st.com>
---
arch/arm/dts/stm32f746-disco.dts | 10 ++
drivers/ram/stm32_sdram.c | 144 ++++++++++++++---------
include/dt-bindings/memory/stm32-sdram.h | 34 ++++++
3 files changed, 135 insertions(+), 53 deletions(-)
create mode 100644 include/dt-bindings/memory/stm32-sdram.h
diff --git a/arch/arm/dts/stm32f746-disco.dts b/arch/arm/dts/stm32f746-disco.dts
index 5846b0d7e74..f098d2eba31 100644
--- a/arch/arm/dts/stm32f746-disco.dts
+++ b/arch/arm/dts/stm32f746-disco.dts
@@ -47,6 +47,7 @@
/dts-v1/;
#include "stm32f746.dtsi"
+#include <dt-bindings/memory/stm32-sdram.h>
/ {
model = "STMicroelectronics STM32F746-DISCO board";
@@ -81,6 +82,15 @@
pinctrl-0 = <&fmc_pins>;
pinctrl-names = "default";
status = "okay";
+
+ mr-nbanks = <1>;
+ /* sdram memory configuration from sdram datasheet IS42S16400J */
+ bank1: bank@0 {
+ st,sdram-control = /bits/ 8 <NO_COL_8 NO_ROW_12 MWIDTH_16 BANKS_2
+ CAS_3 RD_BURST_EN RD_PIPE_DL_0>;
+ st,sdram-timing = /bits/ 8 <TMRD_1 TXSR_60 TRAS_42 TRC_60 TRP_18
+ TRCD_18>;
+ };
};
&mac {
diff --git a/drivers/ram/stm32_sdram.c b/drivers/ram/stm32_sdram.c
index 67d885572d6..eb1ab945b50 100644
--- a/drivers/ram/stm32_sdram.c
+++ b/drivers/ram/stm32_sdram.c
@@ -13,6 +13,31 @@
#include <asm/arch/fmc.h>
#include <asm/arch/stm32.h>
+DECLARE_GLOBAL_DATA_PTR;
+
+struct stm32_sdram_control {
+ u8 no_columns;
+ u8 no_rows;
+ u8 memory_width;
+ u8 no_banks;
+ u8 cas_latency;
+ u8 rd_burst;
+ u8 rd_pipe_delay;
+};
+
+struct stm32_sdram_timing {
+ u8 tmrd;
+ u8 txsr;
+ u8 tras;
+ u8 trc;
+ u8 trp;
+ u8 trcd;
+};
+struct stm32_sdram_params {
+ u8 no_sdram_banks;
+ struct stm32_sdram_control sdram_control;
+ struct stm32_sdram_timing sdram_timing;
+};
static inline u32 _ns2clk(u32 ns, u32 freq)
{
u32 tmp = freq/1000000;
@@ -21,73 +46,53 @@ static inline u32 _ns2clk(u32 ns, u32 freq)
#define NS2CLK(ns) (_ns2clk(ns, freq))
-/*
- * Following are timings for IS42S16400J, from corresponding datasheet
- */
-#define SDRAM_CAS 3 /* 3 cycles */
-#define SDRAM_NB 1 /* Number of banks */
-#define SDRAM_MWID 1 /* 16 bit memory */
-
-#define SDRAM_NR 0x1 /* 12-bit row */
-#define SDRAM_NC 0x0 /* 8-bit col */
-#define SDRAM_RBURST 0x1 /* Single read requests always as bursts */
-#define SDRAM_RPIPE 0x0 /* No HCLK clock cycle delay */
-
-#define SDRAM_TRRD NS2CLK(12)
-#define SDRAM_TRCD NS2CLK(18)
-#define SDRAM_TRP NS2CLK(18)
-#define SDRAM_TRAS NS2CLK(42)
-#define SDRAM_TRC NS2CLK(60)
-#define SDRAM_TRFC NS2CLK(60)
-#define SDRAM_TCDL (1 - 1)
-#define SDRAM_TRDL NS2CLK(12)
-#define SDRAM_TBDL (1 - 1)
#define SDRAM_TREF (NS2CLK(64000000 / 8192) - 20)
-#define SDRAM_TCCD (1 - 1)
-
-#define SDRAM_TXSR SDRAM_TRFC /* Row cycle time after precharge */
-#define SDRAM_TMRD 1 /* Page 10, Mode Register Set */
-
-
-/* Last data in to row precharge, need also comply ineq on page 1648 */
-#define SDRAM_TWR max(\
- (int)max((int)SDRAM_TRDL, (int)(SDRAM_TRAS - SDRAM_TRCD)), \
- (int)(SDRAM_TRC - SDRAM_TRCD - SDRAM_TRP)\
- )
-
#define SDRAM_MODE_BL_SHIFT 0
#define SDRAM_MODE_CAS_SHIFT 4
#define SDRAM_MODE_BL 0
-#define SDRAM_MODE_CAS SDRAM_CAS
+#define SDRAM_MODE_CAS 3
+
+#define SDRAM_TRDL 12
-int stm32_sdram_init(void)
+int stm32_sdram_init(struct udevice *dev)
{
u32 freq;
+ u32 sdram_twr;
+ struct stm32_sdram_params *params = dev_get_platdata(dev);
/*
* Get frequency for NS2CLK calculation.
*/
freq = clock_get(CLOCK_AHB) / CONFIG_SYS_RAM_FREQ_DIV;
+ debug("%s, sdram freq = %d\n", __func__, freq);
+
+ /* Last data in to row precharge, need also comply ineq on page 1648 */
+ sdram_twr = max(
+ max(SDRAM_TRDL, params->sdram_timing.tras
+ - params->sdram_timing.trcd),
+ params->sdram_timing.trc - params->sdram_timing.trcd
+ - params->sdram_timing.trp
+ );
writel(CONFIG_SYS_RAM_FREQ_DIV << FMC_SDCR_SDCLK_SHIFT
- | SDRAM_CAS << FMC_SDCR_CAS_SHIFT
- | SDRAM_NB << FMC_SDCR_NB_SHIFT
- | SDRAM_MWID << FMC_SDCR_MWID_SHIFT
- | SDRAM_NR << FMC_SDCR_NR_SHIFT
- | SDRAM_NC << FMC_SDCR_NC_SHIFT
- | SDRAM_RPIPE << FMC_SDCR_RPIPE_SHIFT
- | SDRAM_RBURST << FMC_SDCR_RBURST_SHIFT,
- &STM32_SDRAM_FMC->sdcr1);
-
- writel(SDRAM_TRCD << FMC_SDTR_TRCD_SHIFT
- | SDRAM_TRP << FMC_SDTR_TRP_SHIFT
- | SDRAM_TWR << FMC_SDTR_TWR_SHIFT
- | SDRAM_TRC << FMC_SDTR_TRC_SHIFT
- | SDRAM_TRAS << FMC_SDTR_TRAS_SHIFT
- | SDRAM_TXSR << FMC_SDTR_TXSR_SHIFT
- | SDRAM_TMRD << FMC_SDTR_TMRD_SHIFT,
- &STM32_SDRAM_FMC->sdtr1);
+ | params->sdram_control.cas_latency << FMC_SDCR_CAS_SHIFT
+ | params->sdram_control.no_banks << FMC_SDCR_NB_SHIFT
+ | params->sdram_control.memory_width << FMC_SDCR_MWID_SHIFT
+ | params->sdram_control.no_rows << FMC_SDCR_NR_SHIFT
+ | params->sdram_control.no_columns << FMC_SDCR_NC_SHIFT
+ | params->sdram_control.rd_pipe_delay << FMC_SDCR_RPIPE_SHIFT
+ | params->sdram_control.rd_burst << FMC_SDCR_RBURST_SHIFT,
+ &STM32_SDRAM_FMC->sdcr1);
+
+ writel(NS2CLK(params->sdram_timing.trcd) << FMC_SDTR_TRCD_SHIFT
+ | NS2CLK(params->sdram_timing.trp) << FMC_SDTR_TRP_SHIFT
+ | NS2CLK(sdram_twr) << FMC_SDTR_TWR_SHIFT
+ | NS2CLK(params->sdram_timing.trc) << FMC_SDTR_TRC_SHIFT
+ | NS2CLK(params->sdram_timing.tras) << FMC_SDTR_TRAS_SHIFT
+ | NS2CLK(params->sdram_timing.txsr) << FMC_SDTR_TXSR_SHIFT
+ | NS2CLK(params->sdram_timing.tmrd) << FMC_SDTR_TMRD_SHIFT,
+ &STM32_SDRAM_FMC->sdtr1);
writel(FMC_SDCMR_BANK_1 | FMC_SDCMR_MODE_START_CLOCK,
&STM32_SDRAM_FMC->sdcmr);
@@ -121,11 +126,39 @@ int stm32_sdram_init(void)
return 0;
}
+static int stm32_fmc_ofdata_to_platdata(struct udevice *dev)
+{
+ int ret;
+ int node = dev->of_offset;
+ const void *blob = gd->fdt_blob;
+ struct stm32_sdram_params *params = dev_get_platdata(dev);
+
+ params->no_sdram_banks = fdtdec_get_uint(blob, node, "mr-nbanks", 1);
+ debug("%s, no of banks = %d\n", __func__, params->no_sdram_banks);
+
+ fdt_for_each_subnode(node, blob, node) {
+ ret = fdtdec_get_byte_array(blob, node, "st,sdram-control",
+ (u8 *)¶ms->sdram_control,
+ sizeof(params->sdram_control));
+ if (ret)
+ return ret;
+
+ ret = fdtdec_get_byte_array(blob, node, "st,sdram-timing",
+ (u8 *)¶ms->sdram_timing,
+ sizeof(params->sdram_timing));
+ if (ret)
+ return ret;
+ }
+
+ return 0;
+}
+
static int stm32_fmc_probe(struct udevice *dev)
{
#ifdef CONFIG_CLK
int ret;
struct clk clk;
+
ret = clk_get_by_index(dev, 0, &clk);
if (ret < 0)
return ret;
@@ -137,7 +170,10 @@ static int stm32_fmc_probe(struct udevice *dev)
return ret;
}
#endif
- stm32_sdram_init();
+ ret = stm32_sdram_init(dev);
+ if (ret)
+ return ret;
+
return 0;
}
@@ -161,5 +197,7 @@ U_BOOT_DRIVER(stm32_fmc) = {
.id = UCLASS_RAM,
.of_match = stm32_fmc_ids,
.ops = &stm32_fmc_ops,
+ .ofdata_to_platdata = stm32_fmc_ofdata_to_platdata,
.probe = stm32_fmc_probe,
+ .platdata_auto_alloc_size = sizeof(struct stm32_sdram_params),
};
diff --git a/include/dt-bindings/memory/stm32-sdram.h b/include/dt-bindings/memory/stm32-sdram.h
new file mode 100644
index 00000000000..4cd6c2b77cb
--- /dev/null
+++ b/include/dt-bindings/memory/stm32-sdram.h
@@ -0,0 +1,34 @@
+#ifndef DT_BINDINGS_STM32_SDRAM_H
+#define DT_BINDINGS_STM32_SDRAM_H
+
+#define NO_COL_8 0x0
+#define NO_COL_9 0x1
+#define NO_COL_10 0x2
+#define NO_COL_11 0x3
+
+#define NO_ROW_11 0x0
+#define NO_ROW_12 0x1
+#define NO_ROW_13 0x2
+
+#define MWIDTH_8 0x0
+#define MWIDTH_16 0x1
+#define MWIDTH_32 0x2
+#define BANKS_2 0x0
+#define BANKS_4 0x1
+#define CAS_1 0x1
+#define CAS_2 0x2
+#define CAS_3 0x3
+#define RD_BURST_EN 0x1
+#define RD_BURST_DIS 0x0
+#define RD_PIPE_DL_0 0x0
+#define RD_PIPE_DL_1 0x1
+#define RD_PIPE_DL_2 0x2
+
+#define TMRD_1 0x1
+#define TXSR_60 60
+#define TRAS_42 42
+#define TRC_60 60
+#define TRP_18 18
+#define TRCD_18 18
+
+#endif
--
GitLab
From 774171020beaf3af19dcc8056c9de38653bc121b Mon Sep 17 00:00:00 2001
From: Vikas Manocha <vikas.manocha@st.com>
Date: Mon, 10 Apr 2017 15:02:57 -0700
Subject: [PATCH 233/282] dm: gpio: Add driver for stm32f7 gpio controller
This patch adds gpio driver supporting driver model for stm32f7 gpio.
Signed-off-by: Vikas Manocha <vikas.manocha@st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Cc: Christophe KERELLO <christophe.kerello@st.com>
[trini: Add depends on STM32]
Signed-off-by: Tom Rini <trini@konsulko.com>
---
arch/arm/include/asm/arch-stm32f7/gpio.h | 20 +++-
drivers/gpio/Kconfig | 9 ++
drivers/gpio/Makefile | 1 +
drivers/gpio/stm32f7_gpio.c | 135 +++++++++++++++++++++++
drivers/pinctrl/pinctrl_stm32.c | 38 ++++++-
5 files changed, 198 insertions(+), 5 deletions(-)
create mode 100644 drivers/gpio/stm32f7_gpio.c
diff --git a/arch/arm/include/asm/arch-stm32f7/gpio.h b/arch/arm/include/asm/arch-stm32f7/gpio.h
index 2942cd923c0..45999b4d2e3 100644
--- a/arch/arm/include/asm/arch-stm32f7/gpio.h
+++ b/arch/arm/include/asm/arch-stm32f7/gpio.h
@@ -96,6 +96,22 @@ struct stm32_gpio_ctl {
enum stm32_gpio_af af;
};
+struct stm32_gpio_regs {
+ u32 moder; /* GPIO port mode */
+ u32 otyper; /* GPIO port output type */
+ u32 ospeedr; /* GPIO port output speed */
+ u32 pupdr; /* GPIO port pull-up/pull-down */
+ u32 idr; /* GPIO port input data */
+ u32 odr; /* GPIO port output data */
+ u32 bsrr; /* GPIO port bit set/reset */
+ u32 lckr; /* GPIO port configuration lock */
+ u32 afr[2]; /* GPIO alternate function */
+};
+
+struct stm32_gpio_priv {
+ struct stm32_gpio_regs *regs;
+};
+
static inline unsigned stm32_gpio_to_port(unsigned gpio)
{
return gpio / 16;
@@ -106,8 +122,4 @@ static inline unsigned stm32_gpio_to_pin(unsigned gpio)
return gpio % 16;
}
-int stm32_gpio_config(const struct stm32_gpio_dsc *gpio_dsc,
- const struct stm32_gpio_ctl *gpio_ctl);
-int stm32_gpout_set(const struct stm32_gpio_dsc *gpio_dsc, int state);
-
#endif /* _STM32_GPIO_H_ */
diff --git a/drivers/gpio/Kconfig b/drivers/gpio/Kconfig
index c95e9acd5f7..99516119ff1 100644
--- a/drivers/gpio/Kconfig
+++ b/drivers/gpio/Kconfig
@@ -171,6 +171,15 @@ config PIC32_GPIO
help
Say yes here to support Microchip PIC32 GPIOs.
+config STM32F7_GPIO
+ bool "ST STM32 GPIO driver"
+ depends on DM_GPIO && STM32
+ default y
+ help
+ Device model driver support for STM32 GPIO controller. It should be
+ usable on many stm32 families like stm32f4 & stm32H7.
+ Tested on STM32F7.
+
config MVEBU_GPIO
bool "Marvell MVEBU GPIO driver"
depends on DM_GPIO && ARCH_MVEBU
diff --git a/drivers/gpio/Makefile b/drivers/gpio/Makefile
index 27f8068e3e6..0ca845f54ca 100644
--- a/drivers/gpio/Makefile
+++ b/drivers/gpio/Makefile
@@ -49,6 +49,7 @@ oby-$(CONFIG_SX151X) += sx151x.o
obj-$(CONFIG_SUNXI_GPIO) += sunxi_gpio.o
obj-$(CONFIG_LPC32XX_GPIO) += lpc32xx_gpio.o
obj-$(CONFIG_STM32_GPIO) += stm32_gpio.o
+obj-$(CONFIG_STM32F7_GPIO) += stm32f7_gpio.o
obj-$(CONFIG_GPIO_UNIPHIER) += gpio-uniphier.o
obj-$(CONFIG_ZYNQ_GPIO) += zynq_gpio.o
obj-$(CONFIG_VYBRID_GPIO) += vybrid_gpio.o
diff --git a/drivers/gpio/stm32f7_gpio.c b/drivers/gpio/stm32f7_gpio.c
new file mode 100644
index 00000000000..5e0546357f9
--- /dev/null
+++ b/drivers/gpio/stm32f7_gpio.c
@@ -0,0 +1,135 @@
+/*
+ * (C) Copyright 2017
+ * Vikas Manocha, <vikas.manocha@st.com>
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include <common.h>
+#include <clk.h>
+#include <dm.h>
+#include <fdtdec.h>
+#include <asm/arch/gpio.h>
+#include <asm/arch/stm32.h>
+#include <asm/gpio.h>
+#include <asm/io.h>
+#include <linux/errno.h>
+#include <linux/io.h>
+
+#define MAX_SIZE_BANK_NAME 5
+#define STM32_GPIOS_PER_BANK 16
+#define MODE_BITS(gpio_pin) (gpio_pin * 2)
+#define MODE_BITS_MASK 3
+#define IN_OUT_BIT_INDEX(gpio_pin) (1UL << (gpio_pin))
+
+DECLARE_GLOBAL_DATA_PTR;
+
+static int stm32_gpio_direction_input(struct udevice *dev, unsigned offset)
+{
+ struct stm32_gpio_priv *priv = dev_get_priv(dev);
+ struct stm32_gpio_regs *regs = priv->regs;
+ int bits_index = MODE_BITS(offset);
+ int mask = MODE_BITS_MASK << bits_index;
+
+ clrsetbits_le32(®s->moder, mask, STM32_GPIO_MODE_IN << bits_index);
+
+ return 0;
+}
+
+static int stm32_gpio_direction_output(struct udevice *dev, unsigned offset,
+ int value)
+{
+ struct stm32_gpio_priv *priv = dev_get_priv(dev);
+ struct stm32_gpio_regs *regs = priv->regs;
+ int bits_index = MODE_BITS(offset);
+ int mask = MODE_BITS_MASK << bits_index;
+
+ clrsetbits_le32(®s->moder, mask, STM32_GPIO_MODE_OUT << bits_index);
+ mask = IN_OUT_BIT_INDEX(offset);
+ clrsetbits_le32(®s->odr, mask, value ? mask : 0);
+
+ return 0;
+}
+
+static int stm32_gpio_get_value(struct udevice *dev, unsigned offset)
+{
+ struct stm32_gpio_priv *priv = dev_get_priv(dev);
+ struct stm32_gpio_regs *regs = priv->regs;
+
+ return readl(®s->idr) & IN_OUT_BIT_INDEX(offset) ? 1 : 0;
+}
+
+static int stm32_gpio_set_value(struct udevice *dev, unsigned offset, int value)
+{
+ struct stm32_gpio_priv *priv = dev_get_priv(dev);
+ struct stm32_gpio_regs *regs = priv->regs;
+ int mask = IN_OUT_BIT_INDEX(offset);
+
+ clrsetbits_le32(®s->odr, mask, value ? mask : 0);
+
+ return 0;
+}
+
+static const struct dm_gpio_ops gpio_stm32_ops = {
+ .direction_input = stm32_gpio_direction_input,
+ .direction_output = stm32_gpio_direction_output,
+ .get_value = stm32_gpio_get_value,
+ .set_value = stm32_gpio_set_value,
+};
+
+static int gpio_stm32_probe(struct udevice *dev)
+{
+ struct gpio_dev_priv *uc_priv = dev_get_uclass_priv(dev);
+ struct stm32_gpio_priv *priv = dev_get_priv(dev);
+ fdt_addr_t addr;
+ char *name;
+
+ addr = dev_get_addr(dev);
+ if (addr == FDT_ADDR_T_NONE)
+ return -EINVAL;
+
+ priv->regs = (struct stm32_gpio_regs *)addr;
+ name = (char *)fdtdec_locate_byte_array(gd->fdt_blob,
+ dev_of_offset(dev),
+ "st,bank-name",
+ MAX_SIZE_BANK_NAME);
+ if (!name)
+ return -EINVAL;
+ uc_priv->bank_name = name;
+ uc_priv->gpio_count = STM32_GPIOS_PER_BANK;
+ debug("%s, addr = 0x%p, bank_name = %s\n", __func__, (u32 *)priv->regs,
+ uc_priv->bank_name);
+
+#ifdef CONFIG_CLK
+ struct clk clk;
+ int ret;
+ ret = clk_get_by_index(dev, 0, &clk);
+ if (ret < 0)
+ return ret;
+
+ ret = clk_enable(&clk);
+
+ if (ret) {
+ dev_err(dev, "failed to enable clock\n");
+ return ret;
+ }
+ debug("clock enabled for device %s\n", dev->name);
+#endif
+
+ return 0;
+}
+
+static const struct udevice_id stm32_gpio_ids[] = {
+ { .compatible = "st,stm32-gpio" },
+ { }
+};
+
+U_BOOT_DRIVER(gpio_stm32) = {
+ .name = "gpio_stm32",
+ .id = UCLASS_GPIO,
+ .of_match = stm32_gpio_ids,
+ .probe = gpio_stm32_probe,
+ .ops = &gpio_stm32_ops,
+ .flags = DM_FLAG_PRE_RELOC | DM_UC_FLAG_SEQ_ALIAS,
+ .priv_auto_alloc_size = sizeof(struct stm32_gpio_priv),
+};
diff --git a/drivers/pinctrl/pinctrl_stm32.c b/drivers/pinctrl/pinctrl_stm32.c
index aa2c440b143..0e74d051c30 100644
--- a/drivers/pinctrl/pinctrl_stm32.c
+++ b/drivers/pinctrl/pinctrl_stm32.c
@@ -1,10 +1,45 @@
#include <common.h>
-#include <asm/arch/gpio.h>
#include <dm.h>
#include <dm/pinctrl.h>
+#include <asm/arch/gpio.h>
+#include <asm/gpio.h>
+#include <asm/io.h>
DECLARE_GLOBAL_DATA_PTR;
+#define MODE_BITS_MASK 3
+#define OSPEED_MASK 3
+#define PUPD_MASK 3
+#define OTYPE_MSK 1
+#define AFR_MASK 0xF
+
+static int stm32_gpio_config(struct gpio_desc *desc,
+ const struct stm32_gpio_ctl *ctl)
+{
+ struct stm32_gpio_priv *priv = dev_get_priv(desc->dev);
+ struct stm32_gpio_regs *regs = priv->regs;
+ u32 index;
+
+ if (!ctl || ctl->af > 15 || ctl->mode > 3 || ctl->otype > 1 ||
+ ctl->pupd > 2 || ctl->speed > 3)
+ return -EINVAL;
+
+ index = (desc->offset & 0x07) * 4;
+ clrsetbits_le32(®s->afr[desc->offset >> 3], AFR_MASK << index,
+ ctl->af << index);
+
+ index = desc->offset * 2;
+ clrsetbits_le32(®s->moder, MODE_BITS_MASK << index,
+ ctl->mode << index);
+ clrsetbits_le32(®s->ospeedr, OSPEED_MASK << index,
+ ctl->speed << index);
+ clrsetbits_le32(®s->pupdr, PUPD_MASK << index, ctl->pupd << index);
+
+ index = desc->offset;
+ clrsetbits_le32(®s->otyper, OTYPE_MSK << index, ctl->otype << index);
+
+ return 0;
+}
static int prep_gpio_dsc(struct stm32_gpio_dsc *gpio_dsc, u32 port_pin)
{
gpio_dsc->port = (port_pin & 0xF000) >> 12;
@@ -18,6 +53,7 @@ static int prep_gpio_dsc(struct stm32_gpio_dsc *gpio_dsc, u32 port_pin)
static int prep_gpio_ctl(struct stm32_gpio_ctl *gpio_ctl, u32 gpio_fn, int node)
{
gpio_fn &= 0x00FF;
+ gpio_ctl->af = 0;
switch (gpio_fn) {
case 0:
--
GitLab
From d33a6a2f064a5dabfc277d5345aa03a9fbce4680 Mon Sep 17 00:00:00 2001
From: Vikas Manocha <vikas.manocha@st.com>
Date: Mon, 10 Apr 2017 15:02:58 -0700
Subject: [PATCH 234/282] ARM: DT: stm32f7: add gpio device tree nodes
Also created alias for gpios for stm32f7 discovery board. Based on these
aliases, it would be possible to get gpio devices by sequence.
Signed-off-by: Vikas Manocha <vikas.manocha@st.com>
cc: Christophe KERELLO <christophe.kerello@st.com>
---
arch/arm/dts/stm32f746-disco.dts | 12 ++++
arch/arm/dts/stm32f746.dtsi | 111 +++++++++++++++++++++++++++++++
2 files changed, 123 insertions(+)
diff --git a/arch/arm/dts/stm32f746-disco.dts b/arch/arm/dts/stm32f746-disco.dts
index f098d2eba31..f830aa90efd 100644
--- a/arch/arm/dts/stm32f746-disco.dts
+++ b/arch/arm/dts/stm32f746-disco.dts
@@ -65,6 +65,18 @@
aliases {
serial0 = &usart1;
spi0 = &qspi;
+ /* Aliases for gpios so as to use sequence */
+ gpio0 = &gpioa;
+ gpio1 = &gpiob;
+ gpio2 = &gpioc;
+ gpio3 = &gpiod;
+ gpio4 = &gpioe;
+ gpio5 = &gpiof;
+ gpio6 = &gpiog;
+ gpio7 = &gpioh;
+ gpio8 = &gpioi;
+ gpio9 = &gpioj;
+ gpio10 = &gpiok;
};
};
diff --git a/arch/arm/dts/stm32f746.dtsi b/arch/arm/dts/stm32f746.dtsi
index e9fd6f4e2ef..865d5cfbe43 100644
--- a/arch/arm/dts/stm32f746.dtsi
+++ b/arch/arm/dts/stm32f746.dtsi
@@ -114,6 +114,117 @@
u-boot,dm-pre-reloc;
pins-are-numbered;
+ gpioa: gpio@40020000 {
+ gpio-controller;
+ #gpio-cells = <2>;
+ compatible = "st,stm32-gpio";
+ reg = <0x0 0x400>;
+ clocks = <&rcc 0 0>;
+ st,bank-name = "GPIOA";
+ u-boot,dm-pre-reloc;
+ };
+
+ gpiob: gpio@40020400 {
+ gpio-controller;
+ #gpio-cells = <2>;
+ compatible = "st,stm32-gpio";
+ reg = <0x400 0x400>;
+ clocks = <&rcc 0 1>;
+ st,bank-name = "GPIOB";
+ u-boot,dm-pre-reloc;
+ };
+
+
+ gpioc: gpio@40020800 {
+ gpio-controller;
+ #gpio-cells = <2>;
+ compatible = "st,stm32-gpio";
+ reg = <0x800 0x400>;
+ clocks = <&rcc 0 2>;
+ st,bank-name = "GPIOC";
+ u-boot,dm-pre-reloc;
+ };
+
+ gpiod: gpio@40020c00 {
+ gpio-controller;
+ #gpio-cells = <2>;
+ compatible = "st,stm32-gpio";
+ reg = <0xc00 0x400>;
+ clocks = <&rcc 0 3>;
+ st,bank-name = "GPIOD";
+ u-boot,dm-pre-reloc;
+ };
+
+ gpioe: gpio@40021000 {
+ gpio-controller;
+ #gpio-cells = <2>;
+ compatible = "st,stm32-gpio";
+ reg = <0x1000 0x400>;
+ clocks = <&rcc 0 4>;
+ st,bank-name = "GPIOE";
+ u-boot,dm-pre-reloc;
+ };
+
+ gpiof: gpio@40021400 {
+ gpio-controller;
+ #gpio-cells = <2>;
+ compatible = "st,stm32-gpio";
+ reg = <0x1400 0x400>;
+ clocks = <&rcc 0 5>;
+ st,bank-name = "GPIOF";
+ u-boot,dm-pre-reloc;
+ };
+
+ gpiog: gpio@40021800 {
+ gpio-controller;
+ #gpio-cells = <2>;
+ compatible = "st,stm32-gpio";
+ reg = <0x1800 0x400>;
+ clocks = <&rcc 0 6>;
+ st,bank-name = "GPIOG";
+ u-boot,dm-pre-reloc;
+ };
+
+ gpioh: gpio@40021c00 {
+ gpio-controller;
+ #gpio-cells = <2>;
+ compatible = "st,stm32-gpio";
+ reg = <0x1c00 0x400>;
+ clocks = <&rcc 0 7>;
+ st,bank-name = "GPIOH";
+ u-boot,dm-pre-reloc;
+ };
+
+ gpioi: gpio@40022000 {
+ gpio-controller;
+ #gpio-cells = <2>;
+ compatible = "st,stm32-gpio";
+ reg = <0x2000 0x400>;
+ clocks = <&rcc 0 8>;
+ st,bank-name = "GPIOI";
+ u-boot,dm-pre-reloc;
+ };
+
+ gpioj: gpio@40022400 {
+ gpio-controller;
+ #gpio-cells = <2>;
+ compatible = "st,stm32-gpio";
+ reg = <0x2400 0x400>;
+ clocks = <&rcc 0 9>;
+ st,bank-name = "GPIOJ";
+ u-boot,dm-pre-reloc;
+ };
+
+ gpiok: gpio@40022800 {
+ gpio-controller;
+ #gpio-cells = <2>;
+ compatible = "st,stm32-gpio";
+ reg = <0x2800 0x400>;
+ clocks = <&rcc 0 10>;
+ st,bank-name = "GPIOK";
+ u-boot,dm-pre-reloc;
+ };
+
usart1_pins_a: usart1@0 {
pins1 {
pinmux = <STM32F746_PA9_FUNC_USART1_TX>;
--
GitLab
From 280057bd7dd623420b2d8b383fe5bbe26820bc93 Mon Sep 17 00:00:00 2001
From: Vikas Manocha <vikas.manocha@st.com>
Date: Mon, 10 Apr 2017 15:02:59 -0700
Subject: [PATCH 235/282] stm32f7: use stm32f7 gpio driver supporting driver
model
With this gpio driver supporting DM, there is no need to enable clocks
for different gpios (for pin muxing) in the board specific code.
Need to increase the allocatable area required before relocation from 0x400 to
0xC00 becuase of 10 new gpio devices(& new gpio class) added in device tree.
Signed-off-by: Vikas Manocha <vikas.manocha@st.com>
cc: Christophe KERELLO <christophe.kerello@st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
---
arch/arm/include/asm/arch-stm32f7/gpio.h | 1 +
board/st/stm32f746-disco/stm32f746-disco.c | 70 +---------------------
configs/stm32f746-disco_defconfig | 4 ++
drivers/clk/clk_stm32f7.c | 39 ------------
drivers/pinctrl/pinctrl_stm32.c | 9 ++-
include/configs/stm32f746-disco.h | 1 -
6 files changed, 15 insertions(+), 109 deletions(-)
diff --git a/arch/arm/include/asm/arch-stm32f7/gpio.h b/arch/arm/include/asm/arch-stm32f7/gpio.h
index 45999b4d2e3..56e469e3023 100644
--- a/arch/arm/include/asm/arch-stm32f7/gpio.h
+++ b/arch/arm/include/asm/arch-stm32f7/gpio.h
@@ -7,6 +7,7 @@
#ifndef _STM32_GPIO_H_
#define _STM32_GPIO_H_
+#include <asm/gpio.h>
enum stm32_gpio_port {
STM32_GPIO_PORT_A = 0,
diff --git a/board/st/stm32f746-disco/stm32f746-disco.c b/board/st/stm32f746-disco/stm32f746-disco.c
index 370db15bea9..45a2c47aa28 100644
--- a/board/st/stm32f746-disco/stm32f746-disco.c
+++ b/board/st/stm32f746-disco/stm32f746-disco.c
@@ -20,37 +20,12 @@
DECLARE_GLOBAL_DATA_PTR;
-const struct stm32_gpio_ctl gpio_ctl_gpout = {
- .mode = STM32_GPIO_MODE_OUT,
- .otype = STM32_GPIO_OTYPE_PP,
- .speed = STM32_GPIO_SPEED_50M,
- .pupd = STM32_GPIO_PUPD_NO,
- .af = STM32_GPIO_AF0
-};
-
-static int fmc_setup_gpio(void)
-{
- clock_setup(GPIO_B_CLOCK_CFG);
- clock_setup(GPIO_C_CLOCK_CFG);
- clock_setup(GPIO_D_CLOCK_CFG);
- clock_setup(GPIO_E_CLOCK_CFG);
- clock_setup(GPIO_F_CLOCK_CFG);
- clock_setup(GPIO_G_CLOCK_CFG);
- clock_setup(GPIO_H_CLOCK_CFG);
-
- return 0;
-}
-
int dram_init(void)
{
struct udevice *dev;
struct ram_info ram;
int rv;
- rv = fmc_setup_gpio();
- if (rv)
- return rv;
-
rv = uclass_get_device(UCLASS_RAM, 0, &dev);
if (rv) {
debug("DRAM init failed: %d\n", rv);
@@ -73,37 +48,21 @@ int dram_init(void)
return rv;
}
-int uart_setup_gpio(void)
-{
- clock_setup(GPIO_A_CLOCK_CFG);
- clock_setup(GPIO_B_CLOCK_CFG);
- return 0;
-}
-
#ifdef CONFIG_ETH_DESIGNWARE
-
static int stmmac_setup(void)
{
clock_setup(SYSCFG_CLOCK_CFG);
/* Set >RMII mode */
STM32_SYSCFG->pmc |= SYSCFG_PMC_MII_RMII_SEL;
-
- clock_setup(GPIO_A_CLOCK_CFG);
- clock_setup(GPIO_C_CLOCK_CFG);
- clock_setup(GPIO_G_CLOCK_CFG);
clock_setup(STMMAC_CLOCK_CFG);
return 0;
}
-#endif
-#ifdef CONFIG_STM32_QSPI
-
-static int qspi_setup(void)
+int board_early_init_f(void)
{
- clock_setup(GPIO_B_CLOCK_CFG);
- clock_setup(GPIO_D_CLOCK_CFG);
- clock_setup(GPIO_E_CLOCK_CFG);
+ stmmac_setup();
+
return 0;
}
#endif
@@ -113,29 +72,6 @@ u32 get_board_rev(void)
return 0;
}
-int board_early_init_f(void)
-{
- int res;
-
- res = uart_setup_gpio();
- if (res)
- return res;
-
-#ifdef CONFIG_ETH_DESIGNWARE
- res = stmmac_setup();
- if (res)
- return res;
-#endif
-
-#ifdef CONFIG_STM32_QSPI
- res = qspi_setup();
- if (res)
- return res;
-#endif
-
- return 0;
-}
-
int board_init(void)
{
gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
diff --git a/configs/stm32f746-disco_defconfig b/configs/stm32f746-disco_defconfig
index 57a0d610df3..4322aad14d2 100644
--- a/configs/stm32f746-disco_defconfig
+++ b/configs/stm32f746-disco_defconfig
@@ -24,6 +24,7 @@ CONFIG_CMD_DNS=y
CONFIG_CMD_LINK_LOCAL=y
CONFIG_CMD_TIMER=y
CONFIG_OF_CONTROL=y
+CONFIG_DM_SEQ_ALIAS=y
CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_NETCONSOLE=y
CONFIG_CLK=y
@@ -49,3 +50,6 @@ CONFIG_PINCTRL=y
CONFIG_PINCTRL_STM32=y
CONFIG_RAM=y
CONFIG_STM32_SDRAM=y
+CONFIG_DM_GPIO=y
+CONFIG_STM32F7_GPIO=y
+CONFIG_SYS_MALLOC_F_LEN=0xC00
diff --git a/drivers/clk/clk_stm32f7.c b/drivers/clk/clk_stm32f7.c
index 0d86395d476..da3c204ff50 100644
--- a/drivers/clk/clk_stm32f7.c
+++ b/drivers/clk/clk_stm32f7.c
@@ -228,56 +228,17 @@ static int stm32_clk_enable(struct clk *clk)
void clock_setup(int peripheral)
{
switch (peripheral) {
- case GPIO_A_CLOCK_CFG:
- setbits_le32(&STM32_RCC->ahb1enr, RCC_AHB1ENR_GPIO_A_EN);
- break;
- case GPIO_B_CLOCK_CFG:
- setbits_le32(&STM32_RCC->ahb1enr, RCC_AHB1ENR_GPIO_B_EN);
- break;
- case GPIO_C_CLOCK_CFG:
- setbits_le32(&STM32_RCC->ahb1enr, RCC_AHB1ENR_GPIO_C_EN);
- break;
- case GPIO_D_CLOCK_CFG:
- setbits_le32(&STM32_RCC->ahb1enr, RCC_AHB1ENR_GPIO_D_EN);
- break;
- case GPIO_E_CLOCK_CFG:
- setbits_le32(&STM32_RCC->ahb1enr, RCC_AHB1ENR_GPIO_E_EN);
- break;
- case GPIO_F_CLOCK_CFG:
- setbits_le32(&STM32_RCC->ahb1enr, RCC_AHB1ENR_GPIO_F_EN);
- break;
- case GPIO_G_CLOCK_CFG:
- setbits_le32(&STM32_RCC->ahb1enr, RCC_AHB1ENR_GPIO_G_EN);
- break;
- case GPIO_H_CLOCK_CFG:
- setbits_le32(&STM32_RCC->ahb1enr, RCC_AHB1ENR_GPIO_H_EN);
- break;
- case GPIO_I_CLOCK_CFG:
- setbits_le32(&STM32_RCC->ahb1enr, RCC_AHB1ENR_GPIO_I_EN);
- break;
- case GPIO_J_CLOCK_CFG:
- setbits_le32(&STM32_RCC->ahb1enr, RCC_AHB1ENR_GPIO_J_EN);
- break;
- case GPIO_K_CLOCK_CFG:
- setbits_le32(&STM32_RCC->ahb1enr, RCC_AHB1ENR_GPIO_K_EN);
- break;
case SYSCFG_CLOCK_CFG:
setbits_le32(&STM32_RCC->apb2enr, RCC_APB2ENR_SYSCFGEN);
break;
case TIMER2_CLOCK_CFG:
setbits_le32(&STM32_RCC->apb1enr, RCC_APB1ENR_TIM2EN);
break;
- case FMC_CLOCK_CFG:
- setbits_le32(&STM32_RCC->ahb3enr, RCC_AHB3ENR_FMC_EN);
- break;
case STMMAC_CLOCK_CFG:
setbits_le32(&STM32_RCC->ahb1enr, RCC_AHB1ENR_ETHMAC_EN);
setbits_le32(&STM32_RCC->ahb1enr, RCC_AHB1ENR_ETHMAC_RX_EN);
setbits_le32(&STM32_RCC->ahb1enr, RCC_AHB1ENR_ETHMAC_TX_EN);
break;
- case QSPI_CLOCK_CFG:
- setbits_le32(&STM32_RCC->ahb3enr, RCC_AHB3ENR_QSPI_EN);
- break;
default:
break;
}
diff --git a/drivers/pinctrl/pinctrl_stm32.c b/drivers/pinctrl/pinctrl_stm32.c
index 0e74d051c30..01f0429a399 100644
--- a/drivers/pinctrl/pinctrl_stm32.c
+++ b/drivers/pinctrl/pinctrl_stm32.c
@@ -121,11 +121,16 @@ static int stm32_pinctrl_set_state_simple(struct udevice *dev,
if (len < 0)
return -EINVAL;
for (i = 0; i < len; i++) {
+ struct gpio_desc desc;
debug("%s: pinmux = %x\n", __func__, *(pin_mux + i));
prep_gpio_dsc(&gpio_dsc, *(pin_mux + i));
prep_gpio_ctl(&gpio_ctl, *(pin_mux + i), args.node);
-
- rv = stm32_gpio_config(&gpio_dsc, &gpio_ctl);
+ rv = uclass_get_device_by_seq(UCLASS_GPIO,
+ gpio_dsc.port, &desc.dev);
+ if (rv)
+ return rv;
+ desc.offset = gpio_dsc.pin;
+ rv = stm32_gpio_config(&desc, &gpio_ctl);
debug("%s: rv = %d\n\n", __func__, rv);
if (rv)
return rv;
diff --git a/include/configs/stm32f746-disco.h b/include/configs/stm32f746-disco.h
index de3d661d60a..e917ba9162f 100644
--- a/include/configs/stm32f746-disco.h
+++ b/include/configs/stm32f746-disco.h
@@ -30,7 +30,6 @@
#define CONFIG_ENV_IS_NOWHERE
#define CONFIG_ENV_SIZE (8 << 10)
-#define CONFIG_STM32_GPIO
#define CONFIG_STM32_FLASH
#define CONFIG_STM32X7_SERIAL
--
GitLab
From 2f80a9f72ecf4cfee68279a45e3c155f6516faa1 Mon Sep 17 00:00:00 2001
From: Vikas Manocha <vikas.manocha@st.com>
Date: Mon, 10 Apr 2017 15:03:00 -0700
Subject: [PATCH 236/282] stm32f746: to switch on user LED1 & read user button
All discovery boards have one user button & one user LED. Here we are
just reading the button status & switching ON the user LED.
Signed-off-by: Vikas Manocha <vikas.manocha@st.com>
cc: Christophe KERELLO <christophe.kerello@st.com>
---
arch/arm/dts/stm32f746-disco.dts | 10 ++++++
board/st/stm32f746-disco/stm32f746-disco.c | 37 ++++++++++++++++++++++
include/configs/stm32f746-disco.h | 1 +
3 files changed, 48 insertions(+)
diff --git a/arch/arm/dts/stm32f746-disco.dts b/arch/arm/dts/stm32f746-disco.dts
index f830aa90efd..8e4576bdc1f 100644
--- a/arch/arm/dts/stm32f746-disco.dts
+++ b/arch/arm/dts/stm32f746-disco.dts
@@ -78,6 +78,16 @@
gpio9 = &gpioj;
gpio10 = &gpiok;
};
+
+ led1 {
+ compatible = "st,led1";
+ led-gpio = <&gpioi 1 0>;
+ };
+
+ button1 {
+ compatible = "st,button1";
+ button-gpio = <&gpioi 11 0>;
+ };
};
&clk_hse {
diff --git a/board/st/stm32f746-disco/stm32f746-disco.c b/board/st/stm32f746-disco/stm32f746-disco.c
index 45a2c47aa28..52c1900ee34 100644
--- a/board/st/stm32f746-disco/stm32f746-disco.c
+++ b/board/st/stm32f746-disco/stm32f746-disco.c
@@ -17,6 +17,7 @@
#include <asm/arch/stm32_periph.h>
#include <asm/arch/stm32_defs.h>
#include <asm/arch/syscfg.h>
+#include <asm/gpio.h>
DECLARE_GLOBAL_DATA_PTR;
@@ -72,6 +73,42 @@ u32 get_board_rev(void)
return 0;
}
+int board_late_init(void)
+{
+ struct gpio_desc gpio = {};
+ int node;
+
+ node = fdt_node_offset_by_compatible(gd->fdt_blob, 0, "st,led1");
+ if (node < 0)
+ return -1;
+
+ gpio_request_by_name_nodev(gd->fdt_blob, node, "led-gpio", 0, &gpio,
+ GPIOD_IS_OUT);
+
+ if (dm_gpio_is_valid(&gpio)) {
+ dm_gpio_set_value(&gpio, 0);
+ mdelay(10);
+ dm_gpio_set_value(&gpio, 1);
+ }
+
+ /* read button 1*/
+ node = fdt_node_offset_by_compatible(gd->fdt_blob, 0, "st,button1");
+ if (node < 0)
+ return -1;
+
+ gpio_request_by_name_nodev(gd->fdt_blob, node, "button-gpio", 0, &gpio,
+ GPIOD_IS_IN);
+
+ if (dm_gpio_is_valid(&gpio)) {
+ if (dm_gpio_get_value(&gpio))
+ puts("usr button is at HIGH LEVEL\n");
+ else
+ puts("usr button is at LOW LEVEL\n");
+ }
+
+ return 0;
+}
+
int board_init(void)
{
gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
diff --git a/include/configs/stm32f746-disco.h b/include/configs/stm32f746-disco.h
index e917ba9162f..48ac4413e02 100644
--- a/include/configs/stm32f746-disco.h
+++ b/include/configs/stm32f746-disco.h
@@ -75,4 +75,5 @@
#define CONFIG_CMD_MEM
#define CONFIG_CMD_CACHE
+#define CONFIG_BOARD_LATE_INIT
#endif /* __CONFIG_H */
--
GitLab
From 57af3cc32a7b39bc26987780fbca109e206d1c34 Mon Sep 17 00:00:00 2001
From: Vikas Manocha <vikas.manocha@st.com>
Date: Mon, 10 Apr 2017 15:03:01 -0700
Subject: [PATCH 237/282] stm32f7: stm32f746-disco: read memory info from
device tree
Signed-off-by: Vikas Manocha <vikas.manocha@st.com>
cc: Christophe KERELLO <christophe.kerello@st.com>
---
board/st/stm32f746-disco/stm32f746-disco.c | 42 +++++++++++++++-------
drivers/ram/stm32_sdram.c | 1 -
include/configs/stm32f746-disco.h | 6 +---
3 files changed, 31 insertions(+), 18 deletions(-)
diff --git a/board/st/stm32f746-disco/stm32f746-disco.c b/board/st/stm32f746-disco/stm32f746-disco.c
index 52c1900ee34..dc3a9dcade0 100644
--- a/board/st/stm32f746-disco/stm32f746-disco.c
+++ b/board/st/stm32f746-disco/stm32f746-disco.c
@@ -21,32 +21,51 @@
DECLARE_GLOBAL_DATA_PTR;
+int get_memory_base_size(fdt_addr_t *mr_base, fdt_addr_t *mr_size)
+{
+ int mr_node;
+
+ mr_node = fdt_path_offset(gd->fdt_blob, "/memory");
+ if (mr_node < 0)
+ return mr_node;
+ *mr_base = fdtdec_get_addr_size_auto_noparent(gd->fdt_blob, mr_node,
+ "reg", 0, mr_size, false);
+ debug("mr_base = %lx, mr_size= %lx\n", *mr_base, *mr_size);
+
+ return 0;
+}
int dram_init(void)
{
struct udevice *dev;
- struct ram_info ram;
int rv;
+ fdt_addr_t mr_base, mr_size;
rv = uclass_get_device(UCLASS_RAM, 0, &dev);
if (rv) {
debug("DRAM init failed: %d\n", rv);
return rv;
}
- rv = ram_get_info(dev, &ram);
- if (rv) {
- debug("Cannot get DRAM size: %d\n", rv);
+
+ rv = get_memory_base_size(&mr_base, &mr_size);
+ if (rv)
return rv;
- }
- debug("SDRAM base=%lx, size=%x\n", ram.base, ram.size);
- gd->ram_size = ram.size;
+ gd->ram_size = mr_size;
+ gd->ram_top = mr_base;
+ return rv;
+}
+
+int dram_init_banksize(void)
+{
+ fdt_addr_t mr_base, mr_size;
+ get_memory_base_size(&mr_base, &mr_size);
/*
* Fill in global info with description of SRAM configuration
*/
- gd->bd->bi_dram[0].start = CONFIG_SYS_RAM_BASE;
- gd->bd->bi_dram[0].size = ram.size;
+ gd->bd->bi_dram[0].start = mr_base;
+ gd->bd->bi_dram[0].size = mr_size;
- return rv;
+ return 0;
}
#ifdef CONFIG_ETH_DESIGNWARE
@@ -111,7 +130,6 @@ int board_late_init(void)
int board_init(void)
{
- gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
-
+ gd->bd->bi_boot_params = gd->bd->bi_dram[0].start + 0x100;
return 0;
}
diff --git a/drivers/ram/stm32_sdram.c b/drivers/ram/stm32_sdram.c
index eb1ab945b50..5e09f35b919 100644
--- a/drivers/ram/stm32_sdram.c
+++ b/drivers/ram/stm32_sdram.c
@@ -179,7 +179,6 @@ static int stm32_fmc_probe(struct udevice *dev)
static int stm32_fmc_get_info(struct udevice *dev, struct ram_info *info)
{
- info->size = CONFIG_SYS_RAM_SIZE;
return 0;
}
diff --git a/include/configs/stm32f746-disco.h b/include/configs/stm32f746-disco.h
index 48ac4413e02..349ee3af89e 100644
--- a/include/configs/stm32f746-disco.h
+++ b/include/configs/stm32f746-disco.h
@@ -16,11 +16,7 @@
* Configuration of the external SDRAM memory
*/
#define CONFIG_NR_DRAM_BANKS 1
-#define CONFIG_SYS_RAM_SIZE (8 * 1024 * 1024)
-#define CONFIG_SYS_RAM_CS 1
-#define CONFIG_SYS_RAM_FREQ_DIV 2
-#define CONFIG_SYS_RAM_BASE 0xC0000000
-#define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_RAM_BASE
+#define CONFIG_SYS_RAM_FREQ_DIV 2
#define CONFIG_SYS_LOAD_ADDR 0xC0400000
#define CONFIG_LOADADDR 0xC0400000
--
GitLab
From a241c241cf2b08bb7905f4825e76e49944648b60 Mon Sep 17 00:00:00 2001
From: Vikas Manocha <vikas.manocha@st.com>
Date: Mon, 10 Apr 2017 15:03:02 -0700
Subject: [PATCH 238/282] stm32f7: enable board info read from device tree
Signed-off-by: Vikas Manocha <vikas.manocha@st.com>
cc: Christophe KERELLO <christophe.kerello@st.com>
---
include/configs/stm32f746-disco.h | 1 +
1 file changed, 1 insertion(+)
diff --git a/include/configs/stm32f746-disco.h b/include/configs/stm32f746-disco.h
index 349ee3af89e..73a316d8066 100644
--- a/include/configs/stm32f746-disco.h
+++ b/include/configs/stm32f746-disco.h
@@ -72,4 +72,5 @@
#define CONFIG_CMD_MEM
#define CONFIG_CMD_CACHE
#define CONFIG_BOARD_LATE_INIT
+#define CONFIG_DISPLAY_BOARDINFO
#endif /* __CONFIG_H */
--
GitLab
From bfea69ad27936d619c0eb3c1be55cc292df8d7f5 Mon Sep 17 00:00:00 2001
From: Vikas Manocha <vikas.manocha@st.com>
Date: Mon, 10 Apr 2017 15:03:03 -0700
Subject: [PATCH 239/282] stm32f7: sdram: correct sdram configuration as per
micron sdram
Actually the sdram memory on stm32f746 discovery board is micron part
MT48LC_4M32_B2B5_6A. This patch does the modification required in the
device tree node & driver for the same.
Also we are passing here all the timing parameters in terms of clock
cycles, so no need to convert time(ns or ms) to cycles.
Signed-off-by: Vikas Manocha <vikas.manocha@st.com>
cc: Christophe KERELLO <christophe.kerello@st.com>
---
arch/arm/dts/stm32f746-disco.dts | 13 +++---
drivers/ram/stm32_sdram.c | 55 +++++++-----------------
include/configs/stm32f746-disco.h | 1 -
include/dt-bindings/memory/stm32-sdram.h | 15 ++++---
4 files changed, 33 insertions(+), 51 deletions(-)
diff --git a/arch/arm/dts/stm32f746-disco.dts b/arch/arm/dts/stm32f746-disco.dts
index 8e4576bdc1f..e720ff12078 100644
--- a/arch/arm/dts/stm32f746-disco.dts
+++ b/arch/arm/dts/stm32f746-disco.dts
@@ -106,12 +106,15 @@
status = "okay";
mr-nbanks = <1>;
- /* sdram memory configuration from sdram datasheet IS42S16400J */
+ /* Memory configuration from sdram datasheet MT48LC_4M32_B2B5-6A */
bank1: bank@0 {
- st,sdram-control = /bits/ 8 <NO_COL_8 NO_ROW_12 MWIDTH_16 BANKS_2
- CAS_3 RD_BURST_EN RD_PIPE_DL_0>;
- st,sdram-timing = /bits/ 8 <TMRD_1 TXSR_60 TRAS_42 TRC_60 TRP_18
- TRCD_18>;
+ st,sdram-control = /bits/ 8 <NO_COL_8 NO_ROW_12 MWIDTH_16 BANKS_4
+ CAS_3 SDCLK_2 RD_BURST_EN
+ RD_PIPE_DL_0>;
+ st,sdram-timing = /bits/ 8 <TMRD_2 TXSR_6 TRAS_4 TRC_6 TWR_2
+ TRP_2 TRCD_2>;
+ /* refcount = (64msec/total_row_sdram)*freq - 20 */
+ st,sdram-refcount = < 1542 >;
};
};
diff --git a/drivers/ram/stm32_sdram.c b/drivers/ram/stm32_sdram.c
index 5e09f35b919..48b4979e624 100644
--- a/drivers/ram/stm32_sdram.c
+++ b/drivers/ram/stm32_sdram.c
@@ -21,6 +21,7 @@ struct stm32_sdram_control {
u8 memory_width;
u8 no_banks;
u8 cas_latency;
+ u8 sdclk;
u8 rd_burst;
u8 rd_pipe_delay;
};
@@ -31,51 +32,25 @@ struct stm32_sdram_timing {
u8 tras;
u8 trc;
u8 trp;
+ u8 twr;
u8 trcd;
};
struct stm32_sdram_params {
u8 no_sdram_banks;
struct stm32_sdram_control sdram_control;
struct stm32_sdram_timing sdram_timing;
+ u32 sdram_ref_count;
};
-static inline u32 _ns2clk(u32 ns, u32 freq)
-{
- u32 tmp = freq/1000000;
- return (tmp * ns) / 1000;
-}
-
-#define NS2CLK(ns) (_ns2clk(ns, freq))
-
-#define SDRAM_TREF (NS2CLK(64000000 / 8192) - 20)
#define SDRAM_MODE_BL_SHIFT 0
#define SDRAM_MODE_CAS_SHIFT 4
#define SDRAM_MODE_BL 0
-#define SDRAM_MODE_CAS 3
-
-#define SDRAM_TRDL 12
int stm32_sdram_init(struct udevice *dev)
{
- u32 freq;
- u32 sdram_twr;
struct stm32_sdram_params *params = dev_get_platdata(dev);
- /*
- * Get frequency for NS2CLK calculation.
- */
- freq = clock_get(CLOCK_AHB) / CONFIG_SYS_RAM_FREQ_DIV;
- debug("%s, sdram freq = %d\n", __func__, freq);
-
- /* Last data in to row precharge, need also comply ineq on page 1648 */
- sdram_twr = max(
- max(SDRAM_TRDL, params->sdram_timing.tras
- - params->sdram_timing.trcd),
- params->sdram_timing.trc - params->sdram_timing.trcd
- - params->sdram_timing.trp
- );
-
- writel(CONFIG_SYS_RAM_FREQ_DIV << FMC_SDCR_SDCLK_SHIFT
+ writel(params->sdram_control.sdclk << FMC_SDCR_SDCLK_SHIFT
| params->sdram_control.cas_latency << FMC_SDCR_CAS_SHIFT
| params->sdram_control.no_banks << FMC_SDCR_NB_SHIFT
| params->sdram_control.memory_width << FMC_SDCR_MWID_SHIFT
@@ -85,13 +60,13 @@ int stm32_sdram_init(struct udevice *dev)
| params->sdram_control.rd_burst << FMC_SDCR_RBURST_SHIFT,
&STM32_SDRAM_FMC->sdcr1);
- writel(NS2CLK(params->sdram_timing.trcd) << FMC_SDTR_TRCD_SHIFT
- | NS2CLK(params->sdram_timing.trp) << FMC_SDTR_TRP_SHIFT
- | NS2CLK(sdram_twr) << FMC_SDTR_TWR_SHIFT
- | NS2CLK(params->sdram_timing.trc) << FMC_SDTR_TRC_SHIFT
- | NS2CLK(params->sdram_timing.tras) << FMC_SDTR_TRAS_SHIFT
- | NS2CLK(params->sdram_timing.txsr) << FMC_SDTR_TXSR_SHIFT
- | NS2CLK(params->sdram_timing.tmrd) << FMC_SDTR_TMRD_SHIFT,
+ writel(params->sdram_timing.trcd << FMC_SDTR_TRCD_SHIFT
+ | params->sdram_timing.trp << FMC_SDTR_TRP_SHIFT
+ | params->sdram_timing.twr << FMC_SDTR_TWR_SHIFT
+ | params->sdram_timing.trc << FMC_SDTR_TRC_SHIFT
+ | params->sdram_timing.tras << FMC_SDTR_TRAS_SHIFT
+ | params->sdram_timing.txsr << FMC_SDTR_TXSR_SHIFT
+ | params->sdram_timing.tmrd << FMC_SDTR_TMRD_SHIFT,
&STM32_SDRAM_FMC->sdtr1);
writel(FMC_SDCMR_BANK_1 | FMC_SDCMR_MODE_START_CLOCK,
@@ -110,7 +85,7 @@ int stm32_sdram_init(struct udevice *dev)
FMC_BUSY_WAIT();
writel(FMC_SDCMR_BANK_1 | (SDRAM_MODE_BL << SDRAM_MODE_BL_SHIFT
- | SDRAM_MODE_CAS << SDRAM_MODE_CAS_SHIFT)
+ | params->sdram_control.cas_latency << SDRAM_MODE_CAS_SHIFT)
<< FMC_SDCMR_MODE_REGISTER_SHIFT | FMC_SDCMR_MODE_WRITE_MODE,
&STM32_SDRAM_FMC->sdcmr);
udelay(100);
@@ -121,7 +96,7 @@ int stm32_sdram_init(struct udevice *dev)
FMC_BUSY_WAIT();
/* Refresh timer */
- writel(SDRAM_TREF, &STM32_SDRAM_FMC->sdrtr);
+ writel((params->sdram_ref_count) << 1, &STM32_SDRAM_FMC->sdrtr);
return 0;
}
@@ -142,12 +117,14 @@ static int stm32_fmc_ofdata_to_platdata(struct udevice *dev)
sizeof(params->sdram_control));
if (ret)
return ret;
-
ret = fdtdec_get_byte_array(blob, node, "st,sdram-timing",
(u8 *)¶ms->sdram_timing,
sizeof(params->sdram_timing));
if (ret)
return ret;
+
+ params->sdram_ref_count = fdtdec_get_int(blob, node,
+ "st,sdram-refcount", 8196);
}
return 0;
diff --git a/include/configs/stm32f746-disco.h b/include/configs/stm32f746-disco.h
index 73a316d8066..cc0f8fdf921 100644
--- a/include/configs/stm32f746-disco.h
+++ b/include/configs/stm32f746-disco.h
@@ -16,7 +16,6 @@
* Configuration of the external SDRAM memory
*/
#define CONFIG_NR_DRAM_BANKS 1
-#define CONFIG_SYS_RAM_FREQ_DIV 2
#define CONFIG_SYS_LOAD_ADDR 0xC0400000
#define CONFIG_LOADADDR 0xC0400000
diff --git a/include/dt-bindings/memory/stm32-sdram.h b/include/dt-bindings/memory/stm32-sdram.h
index 4cd6c2b77cb..89b719af534 100644
--- a/include/dt-bindings/memory/stm32-sdram.h
+++ b/include/dt-bindings/memory/stm32-sdram.h
@@ -18,17 +18,20 @@
#define CAS_1 0x1
#define CAS_2 0x2
#define CAS_3 0x3
+#define SDCLK_2 0x2
#define RD_BURST_EN 0x1
#define RD_BURST_DIS 0x0
#define RD_PIPE_DL_0 0x0
#define RD_PIPE_DL_1 0x1
#define RD_PIPE_DL_2 0x2
-#define TMRD_1 0x1
-#define TXSR_60 60
-#define TRAS_42 42
-#define TRC_60 60
-#define TRP_18 18
-#define TRCD_18 18
+/* Timing = value +1 cycles */
+#define TMRD_2 (2 - 1)
+#define TXSR_6 (6 - 1)
+#define TRAS_4 (4 - 1)
+#define TRC_6 (6 - 1)
+#define TWR_2 (2 - 1)
+#define TRP_2 (2 - 1)
+#define TRCD_2 (2 - 1)
#endif
--
GitLab
From 58fb3c8d89872f82a03c03625dcf5cc61b733bab Mon Sep 17 00:00:00 2001
From: Vikas Manocha <vikas.manocha@st.com>
Date: Mon, 10 Apr 2017 15:03:04 -0700
Subject: [PATCH 240/282] stm32f7: increase the max no of pin configuration to
70
The number of pins to be configured could be more than 50 e.g. in case
of sdram controller, there are about 56 pins (32 data lines, 12 address
& some control signals).
Signed-off-by: Vikas Manocha <vikas.manocha@st.com>
cc: Christophe KERELLO <christophe.kerello@st.com>
---
drivers/pinctrl/pinctrl_stm32.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/pinctrl/pinctrl_stm32.c b/drivers/pinctrl/pinctrl_stm32.c
index 01f0429a399..d7b5ea3e1c0 100644
--- a/drivers/pinctrl/pinctrl_stm32.c
+++ b/drivers/pinctrl/pinctrl_stm32.c
@@ -7,6 +7,7 @@
DECLARE_GLOBAL_DATA_PTR;
+#define MAX_PINS_ONE_IP 70
#define MODE_BITS_MASK 3
#define OSPEED_MASK 3
#define PUPD_MASK 3
@@ -95,7 +96,7 @@ static int prep_gpio_ctl(struct stm32_gpio_ctl *gpio_ctl, u32 gpio_fn, int node)
static int stm32_pinctrl_set_state_simple(struct udevice *dev,
struct udevice *periph)
{
- u32 pin_mux[50];
+ u32 pin_mux[MAX_PINS_ONE_IP];
struct fdtdec_phandle_args args;
int rv, len;
--
GitLab
From bd4a985f5021876cd410f4a8110fce2c1b652333 Mon Sep 17 00:00:00 2001
From: Vikas Manocha <vikas.manocha@st.com>
Date: Mon, 10 Apr 2017 15:03:05 -0700
Subject: [PATCH 241/282] stm32f7: move board specific pin muxing to dts
Signed-off-by: Vikas Manocha <vikas.manocha@st.com>
cc: Christophe KERELLO <christophe.kerello@st.com>
---
arch/arm/dts/stm32f746-disco.dts | 90 ++++++++++++++++++++++++++++++++
arch/arm/dts/stm32f746.dtsi | 86 ------------------------------
2 files changed, 90 insertions(+), 86 deletions(-)
diff --git a/arch/arm/dts/stm32f746-disco.dts b/arch/arm/dts/stm32f746-disco.dts
index e720ff12078..2c7fa799bf2 100644
--- a/arch/arm/dts/stm32f746-disco.dts
+++ b/arch/arm/dts/stm32f746-disco.dts
@@ -94,6 +94,96 @@
clock-frequency = <25000000>;
};
+&pinctrl {
+ usart1_pins_a: usart1@0 {
+ pins1 {
+ pinmux = <STM32F746_PA9_FUNC_USART1_TX>;
+ bias-disable;
+ drive-push-pull;
+ slew-rate = <2>;
+ };
+ pins2 {
+ pinmux = <STM32F746_PB7_FUNC_USART1_RX>;
+ bias-disable;
+ };
+ };
+
+ ethernet_mii: mii@0 {
+ pins {
+ pinmux = <STM32F746_PG13_FUNC_ETH_MII_TXD0_ETH_RMII_TXD0>,
+ <STM32F746_PG14_FUNC_ETH_MII_TXD1_ETH_RMII_TXD1>,
+ <STM32F746_PG11_FUNC_ETH_MII_TX_EN_ETH_RMII_TX_EN>,
+ <STM32F746_PA2_FUNC_ETH_MDIO>,
+ <STM32F746_PC1_FUNC_ETH_MDC>,
+ <STM32F746_PA1_FUNC_ETH_MII_RX_CLK_ETH_RMII_REF_CLK>,
+ <STM32F746_PA7_FUNC_ETH_MII_RX_DV_ETH_RMII_CRS_DV>,
+ <STM32F746_PC4_FUNC_ETH_MII_RXD0_ETH_RMII_RXD0>,
+ <STM32F746_PC5_FUNC_ETH_MII_RXD1_ETH_RMII_RXD1>;
+ slew-rate = <2>;
+ };
+ };
+
+ qspi_pins: qspi@0 {
+ pins {
+ pinmux = <STM32F746_PB2_FUNC_QUADSPI_CLK>,
+ <STM32F746_PB6_FUNC_QUADSPI_BK1_NCS>,
+ <STM32F746_PD11_FUNC_QUADSPI_BK1_IO0>,
+ <STM32F746_PD12_FUNC_QUADSPI_BK1_IO1>,
+ <STM32F746_PD13_FUNC_QUADSPI_BK1_IO3>,
+ <STM32F746_PE2_FUNC_QUADSPI_BK1_IO2>;
+ slew-rate = <2>;
+ };
+ };
+
+ fmc_pins: fmc@0 {
+ pins {
+ pinmux = <STM32F746_PD10_FUNC_FMC_D15>,
+ <STM32F746_PD9_FUNC_FMC_D14>,
+ <STM32F746_PD8_FUNC_FMC_D13>,
+ <STM32F746_PE15_FUNC_FMC_D12>,
+ <STM32F746_PE14_FUNC_FMC_D11>,
+ <STM32F746_PE13_FUNC_FMC_D10>,
+ <STM32F746_PE12_FUNC_FMC_D9>,
+ <STM32F746_PE11_FUNC_FMC_D8>,
+ <STM32F746_PE10_FUNC_FMC_D7>,
+ <STM32F746_PE9_FUNC_FMC_D6>,
+ <STM32F746_PE8_FUNC_FMC_D5>,
+ <STM32F746_PE7_FUNC_FMC_D4>,
+ <STM32F746_PD1_FUNC_FMC_D3>,
+ <STM32F746_PD0_FUNC_FMC_D2>,
+ <STM32F746_PD15_FUNC_FMC_D1>,
+ <STM32F746_PD14_FUNC_FMC_D0>,
+
+ <STM32F746_PE1_FUNC_FMC_NBL1>,
+ <STM32F746_PE0_FUNC_FMC_NBL0>,
+
+ <STM32F746_PG5_FUNC_FMC_A15_FMC_BA1>,
+ <STM32F746_PG4_FUNC_FMC_A14_FMC_BA0>,
+
+ <STM32F746_PG1_FUNC_FMC_A11>,
+ <STM32F746_PG0_FUNC_FMC_A10>,
+ <STM32F746_PF15_FUNC_FMC_A9>,
+ <STM32F746_PF14_FUNC_FMC_A8>,
+ <STM32F746_PF13_FUNC_FMC_A7>,
+ <STM32F746_PF12_FUNC_FMC_A6>,
+ <STM32F746_PF5_FUNC_FMC_A5>,
+ <STM32F746_PF4_FUNC_FMC_A4>,
+ <STM32F746_PF3_FUNC_FMC_A3>,
+ <STM32F746_PF2_FUNC_FMC_A2>,
+ <STM32F746_PF1_FUNC_FMC_A1>,
+ <STM32F746_PF0_FUNC_FMC_A0>,
+
+ <STM32F746_PH3_FUNC_FMC_SDNE0>,
+ <STM32F746_PH5_FUNC_FMC_SDNWE>,
+ <STM32F746_PF11_FUNC_FMC_SDNRAS>,
+ <STM32F746_PG15_FUNC_FMC_SDNCAS>,
+ <STM32F746_PC3_FUNC_FMC_SDCKE0>,
+ <STM32F746_PG8_FUNC_FMC_SDCLK>;
+ slew-rate = <2>;
+ };
+ };
+};
+
&usart1 {
pinctrl-0 = <&usart1_pins_a>;
pinctrl-names = "default";
diff --git a/arch/arm/dts/stm32f746.dtsi b/arch/arm/dts/stm32f746.dtsi
index 865d5cfbe43..ac24d986e08 100644
--- a/arch/arm/dts/stm32f746.dtsi
+++ b/arch/arm/dts/stm32f746.dtsi
@@ -225,92 +225,6 @@
u-boot,dm-pre-reloc;
};
- usart1_pins_a: usart1@0 {
- pins1 {
- pinmux = <STM32F746_PA9_FUNC_USART1_TX>;
- bias-disable;
- drive-push-pull;
- slew-rate = <2>;
- };
- pins2 {
- pinmux = <STM32F746_PB7_FUNC_USART1_RX>;
- bias-disable;
- };
- };
- ethernet_mii: mii@0 {
- pins {
- pinmux = <STM32F746_PG13_FUNC_ETH_MII_TXD0_ETH_RMII_TXD0>,
- <STM32F746_PG14_FUNC_ETH_MII_TXD1_ETH_RMII_TXD1>,
- <STM32F746_PG11_FUNC_ETH_MII_TX_EN_ETH_RMII_TX_EN>,
- <STM32F746_PA2_FUNC_ETH_MDIO>,
- <STM32F746_PC1_FUNC_ETH_MDC>,
- <STM32F746_PA1_FUNC_ETH_MII_RX_CLK_ETH_RMII_REF_CLK>,
- <STM32F746_PA7_FUNC_ETH_MII_RX_DV_ETH_RMII_CRS_DV>,
- <STM32F746_PC4_FUNC_ETH_MII_RXD0_ETH_RMII_RXD0>,
- <STM32F746_PC5_FUNC_ETH_MII_RXD1_ETH_RMII_RXD1>;
- slew-rate = <2>;
- };
- };
- qspi_pins: qspi@0{
- pins {
- pinmux = <STM32F746_PB2_FUNC_QUADSPI_CLK>,
- <STM32F746_PB6_FUNC_QUADSPI_BK1_NCS>,
- <STM32F746_PD11_FUNC_QUADSPI_BK1_IO0>,
- <STM32F746_PD12_FUNC_QUADSPI_BK1_IO1>,
- <STM32F746_PD13_FUNC_QUADSPI_BK1_IO3>,
- <STM32F746_PE2_FUNC_QUADSPI_BK1_IO2>;
- slew-rate = <2>;
- };
- };
-
- fmc_pins: fmc@0 {
- pins {
- pinmux = <STM32F746_PD10_FUNC_FMC_D15>,
- <STM32F746_PD9_FUNC_FMC_D14>,
- <STM32F746_PD8_FUNC_FMC_D13>,
- <STM32F746_PE15_FUNC_FMC_D12>,
- <STM32F746_PE14_FUNC_FMC_D11>,
- <STM32F746_PE13_FUNC_FMC_D10>,
- <STM32F746_PE12_FUNC_FMC_D9>,
- <STM32F746_PE11_FUNC_FMC_D8>,
- <STM32F746_PE10_FUNC_FMC_D7>,
- <STM32F746_PE9_FUNC_FMC_D6>,
- <STM32F746_PE8_FUNC_FMC_D5>,
- <STM32F746_PE7_FUNC_FMC_D4>,
- <STM32F746_PD1_FUNC_FMC_D3>,
- <STM32F746_PD0_FUNC_FMC_D2>,
- <STM32F746_PD15_FUNC_FMC_D1>,
- <STM32F746_PD14_FUNC_FMC_D0>,
-
- <STM32F746_PE1_FUNC_FMC_NBL1>,
- <STM32F746_PE0_FUNC_FMC_NBL0>,
-
- <STM32F746_PG5_FUNC_FMC_A15_FMC_BA1>,
- <STM32F746_PG4_FUNC_FMC_A14_FMC_BA0>,
-
- <STM32F746_PG1_FUNC_FMC_A11>,
- <STM32F746_PG0_FUNC_FMC_A10>,
- <STM32F746_PF15_FUNC_FMC_A9>,
- <STM32F746_PF14_FUNC_FMC_A8>,
- <STM32F746_PF13_FUNC_FMC_A7>,
- <STM32F746_PF12_FUNC_FMC_A6>,
- <STM32F746_PF5_FUNC_FMC_A5>,
- <STM32F746_PF4_FUNC_FMC_A4>,
- <STM32F746_PF3_FUNC_FMC_A3>,
- <STM32F746_PF2_FUNC_FMC_A2>,
- <STM32F746_PF1_FUNC_FMC_A1>,
- <STM32F746_PF0_FUNC_FMC_A0>,
-
- <STM32F746_PH3_FUNC_FMC_SDNE0>,
- <STM32F746_PH5_FUNC_FMC_SDNWE>,
- <STM32F746_PF11_FUNC_FMC_SDNRAS>,
- <STM32F746_PG15_FUNC_FMC_SDNCAS>,
- <STM32F746_PC3_FUNC_FMC_SDCKE0>,
- <STM32F746_PG8_FUNC_FMC_SDCLK>;
- slew-rate = <2>;
- };
- };
-
};
};
};
--
GitLab
From 97c20932361124782cd28ec2028601d04b43ce1e Mon Sep 17 00:00:00 2001
From: Vikas Manocha <vikas.manocha@st.com>
Date: Mon, 10 Apr 2017 15:03:06 -0700
Subject: [PATCH 242/282] stm32f7: add support for stm32f769 disco board
This board support stm32f7 family device stm32f769-I with 2MB internal Flash &
512KB RAM.
STM32F769 lines offer the performance of the Cortex-M7 core (with double
precision floating point unit) running up to 216 MHz.
To compile for stm32f769 board, use same defconfig as stm32f746-disco,
the only difference is to pass "DEVICE_TREE=stm32f769-disco".
Signed-off-by: Vikas Manocha <vikas.manocha@st.com>
cc: Christophe KERELLO <christophe.kerello@st.com>
---
arch/arm/dts/Makefile | 3 +-
arch/arm/dts/stm32f769-disco.dts | 255 +++++++++++++++++++++++++++++++
2 files changed, 257 insertions(+), 1 deletion(-)
create mode 100644 arch/arm/dts/stm32f769-disco.dts
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index f3f53f3e291..4d656ce4cc3 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -185,7 +185,8 @@ dtb-$(CONFIG_FSL_LSCH2) += fsl-ls1043a-qds-duart.dtb \
dtb-$(CONFIG_ARCH_SNAPDRAGON) += dragonboard410c.dtb
-dtb-$(CONFIG_STM32F7) += stm32f746-disco.dtb
+dtb-$(CONFIG_STM32F7) += stm32f746-disco.dtb \
+ stm32f769-disco.dtb
dtb-$(CONFIG_MACH_SUN4I) += \
sun4i-a10-a1000.dtb \
diff --git a/arch/arm/dts/stm32f769-disco.dts b/arch/arm/dts/stm32f769-disco.dts
new file mode 100644
index 00000000000..6591cc8110a
--- /dev/null
+++ b/arch/arm/dts/stm32f769-disco.dts
@@ -0,0 +1,255 @@
+/*
+ * Copyright 2016 - Vikas Manocha <vikas.manocha@st.com>
+ *
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPL or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.
+ *
+ * a) This file is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of the
+ * License, or (at your option) any later version.
+ *
+ * This file is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * Or, alternatively,
+ *
+ * b) Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use,
+ * copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following
+ * conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+/dts-v1/;
+#include "stm32f746.dtsi"
+#include <dt-bindings/memory/stm32-sdram.h>
+
+/ {
+ model = "STMicroelectronics STM32F769-DISCO board";
+ compatible = "st,stm32f769-disco", "st,stm32f7";
+
+ chosen {
+ bootargs = "root=/dev/ram rdinit=/linuxrc";
+ stdout-path = "serial0:115200n8";
+ };
+
+ memory {
+ reg = <0xC0000000 0x1000000>;
+ };
+
+ aliases {
+ serial0 = &usart1;
+ spi0 = &qspi;
+ /* Aliases for gpios so as to use sequence */
+ gpio0 = &gpioa;
+ gpio1 = &gpiob;
+ gpio2 = &gpioc;
+ gpio3 = &gpiod;
+ gpio4 = &gpioe;
+ gpio5 = &gpiof;
+ gpio6 = &gpiog;
+ gpio7 = &gpioh;
+ gpio8 = &gpioi;
+ gpio9 = &gpioj;
+ gpio10 = &gpiok;
+ };
+
+ led1 {
+ compatible = "st,led1";
+ led-gpio = <&gpioj 5 0>;
+ };
+
+ button1 {
+ compatible = "st,button1";
+ button-gpio = <&gpioa 0 0>;
+ };
+};
+
+&clk_hse {
+ clock-frequency = <25000000>;
+};
+
+&pinctrl {
+ usart1_pins_a: usart1@0 {
+ pins1 {
+ pinmux = <STM32F746_PA9_FUNC_USART1_TX>;
+ bias-disable;
+ drive-push-pull;
+ slew-rate = <2>;
+ };
+ pins2 {
+ pinmux = <STM32F746_PA10_FUNC_USART1_RX>;
+ bias-disable;
+ };
+ };
+
+ ethernet_mii: mii@0 {
+ pins {
+ pinmux = <STM32F746_PG13_FUNC_ETH_MII_TXD0_ETH_RMII_TXD0>,
+ <STM32F746_PG14_FUNC_ETH_MII_TXD1_ETH_RMII_TXD1>,
+ <STM32F746_PG11_FUNC_ETH_MII_TX_EN_ETH_RMII_TX_EN>,
+ <STM32F746_PA2_FUNC_ETH_MDIO>,
+ <STM32F746_PC1_FUNC_ETH_MDC>,
+ <STM32F746_PA1_FUNC_ETH_MII_RX_CLK_ETH_RMII_REF_CLK>,
+ <STM32F746_PA7_FUNC_ETH_MII_RX_DV_ETH_RMII_CRS_DV>,
+ <STM32F746_PC4_FUNC_ETH_MII_RXD0_ETH_RMII_RXD0>,
+ <STM32F746_PC5_FUNC_ETH_MII_RXD1_ETH_RMII_RXD1>;
+ slew-rate = <2>;
+ };
+ };
+
+ qspi_pins: qspi@0 {
+ pins {
+ pinmux = <STM32F746_PB2_FUNC_QUADSPI_CLK>,
+ <STM32F746_PB6_FUNC_QUADSPI_BK1_NCS>,
+ <STM32F746_PC9_FUNC_QUADSPI_BK1_IO0>,
+ <STM32F746_PC10_FUNC_QUADSPI_BK1_IO1>,
+ <STM32F746_PD13_FUNC_QUADSPI_BK1_IO3>,
+ <STM32F746_PE2_FUNC_QUADSPI_BK1_IO2>;
+ slew-rate = <2>;
+ };
+ };
+
+ fmc_pins: fmc@0 {
+ pins {
+ pinmux = <STM32F746_PI10_FUNC_FMC_D31>,
+ <STM32F746_PI9_FUNC_FMC_D30>,
+ <STM32F746_PI7_FUNC_FMC_D29>,
+ <STM32F746_PI6_FUNC_FMC_D28>,
+ <STM32F746_PI3_FUNC_FMC_D27>,
+ <STM32F746_PI2_FUNC_FMC_D26>,
+ <STM32F746_PI1_FUNC_FMC_D25>,
+ <STM32F746_PI0_FUNC_FMC_D24>,
+ <STM32F746_PH15_FUNC_FMC_D23>,
+ <STM32F746_PH14_FUNC_FMC_D22>,
+ <STM32F746_PH13_FUNC_FMC_D21>,
+ <STM32F746_PH12_FUNC_FMC_D20>,
+ <STM32F746_PH11_FUNC_FMC_D19>,
+ <STM32F746_PH10_FUNC_FMC_D18>,
+ <STM32F746_PH9_FUNC_FMC_D17>,
+ <STM32F746_PH8_FUNC_FMC_D16>,
+
+ <STM32F746_PD10_FUNC_FMC_D15>,
+ <STM32F746_PD9_FUNC_FMC_D14>,
+ <STM32F746_PD8_FUNC_FMC_D13>,
+ <STM32F746_PE15_FUNC_FMC_D12>,
+ <STM32F746_PE14_FUNC_FMC_D11>,
+ <STM32F746_PE13_FUNC_FMC_D10>,
+ <STM32F746_PE12_FUNC_FMC_D9>,
+ <STM32F746_PE11_FUNC_FMC_D8>,
+ <STM32F746_PE10_FUNC_FMC_D7>,
+ <STM32F746_PE9_FUNC_FMC_D6>,
+ <STM32F746_PE8_FUNC_FMC_D5>,
+ <STM32F746_PE7_FUNC_FMC_D4>,
+ <STM32F746_PD1_FUNC_FMC_D3>,
+ <STM32F746_PD0_FUNC_FMC_D2>,
+ <STM32F746_PD15_FUNC_FMC_D1>,
+ <STM32F746_PD14_FUNC_FMC_D0>,
+
+ <STM32F746_PI5_FUNC_FMC_NBL3>,
+ <STM32F746_PI4_FUNC_FMC_NBL2>,
+ <STM32F746_PE1_FUNC_FMC_NBL1>,
+ <STM32F746_PE0_FUNC_FMC_NBL0>,
+
+ <STM32F746_PG5_FUNC_FMC_A15_FMC_BA1>,
+ <STM32F746_PG4_FUNC_FMC_A14_FMC_BA0>,
+
+ <STM32F746_PG1_FUNC_FMC_A11>,
+ <STM32F746_PG0_FUNC_FMC_A10>,
+ <STM32F746_PF15_FUNC_FMC_A9>,
+ <STM32F746_PF14_FUNC_FMC_A8>,
+ <STM32F746_PF13_FUNC_FMC_A7>,
+ <STM32F746_PF12_FUNC_FMC_A6>,
+ <STM32F746_PF5_FUNC_FMC_A5>,
+ <STM32F746_PF4_FUNC_FMC_A4>,
+ <STM32F746_PF3_FUNC_FMC_A3>,
+ <STM32F746_PF2_FUNC_FMC_A2>,
+ <STM32F746_PF1_FUNC_FMC_A1>,
+ <STM32F746_PF0_FUNC_FMC_A0>,
+
+ <STM32F746_PH3_FUNC_FMC_SDNE0>,
+ <STM32F746_PH5_FUNC_FMC_SDNWE>,
+ <STM32F746_PF11_FUNC_FMC_SDNRAS>,
+ <STM32F746_PG15_FUNC_FMC_SDNCAS>,
+ <STM32F746_PH2_FUNC_FMC_SDCKE0>,
+ <STM32F746_PG8_FUNC_FMC_SDCLK>;
+ slew-rate = <2>;
+ };
+ };
+};
+
+&usart1 {
+ pinctrl-0 = <&usart1_pins_a>;
+ pinctrl-names = "default";
+ status = "okay";
+};
+
+&fmc {
+ pinctrl-0 = <&fmc_pins>;
+ pinctrl-names = "default";
+ status = "okay";
+
+ mr-nbanks = <1>;
+ /* Memory configuration from sdram datasheet MT48LC_4M32_B2B5-6A */
+ bank1: bank@0 {
+ st,sdram-control = /bits/ 8 <NO_COL_8 NO_ROW_12 MWIDTH_32 BANKS_4
+ CAS_3 SDCLK_2 RD_BURST_EN
+ RD_PIPE_DL_0>;
+ st,sdram-timing = /bits/ 8 <TMRD_2 TXSR_6 TRAS_4 TRC_6 TWR_2
+ TRP_2 TRCD_2>;
+ /* refcount = (64msec/total_row_sdram)*freq - 20 */
+ st,sdram-refcount = < 1542 >;
+ };
+};
+
+&mac {
+ status = "okay";
+ pinctrl-0 = <ðernet_mii>;
+ phy-mode = "rmii";
+ phy-handle = <&phy0>;
+
+ mdio0 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "snps,dwmac-mdio";
+ phy0: ethernet-phy@0 {
+ reg = <0>;
+ };
+ };
+};
+
+&qspi {
+ pinctrl-0 = <&qspi_pins>;
+ status = "okay";
+
+ qflash0: n25q128a {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "micron,n25q128a13", "spi-flash";
+ spi-max-frequency = <108000000>;
+ spi-tx-bus-width = <1>;
+ spi-rx-bus-width = <1>;
+ memory-map = <0x90000000 0x1000000>;
+ reg = <0>;
+ };
+};
--
GitLab
From fddd70ef37475c2c9d35595cefa32f238deb2b57 Mon Sep 17 00:00:00 2001
From: Vikas Manocha <vikas.manocha@st.com>
Date: Mon, 10 Apr 2017 15:03:07 -0700
Subject: [PATCH 243/282] stm32f7: remove not needed configuration from board
config
This patch removes:
- CONFIG_CMD_MEM: enabled by default
- CONFIG_DESIGNWARE_ETH : not being used anywhere.
Signed-off-by: Vikas Manocha <vikas.manocha@st.com>
cc: Christophe KERELLO <christophe.kerello@st.com>
---
include/configs/stm32f746-disco.h | 3 ---
1 file changed, 3 deletions(-)
diff --git a/include/configs/stm32f746-disco.h b/include/configs/stm32f746-disco.h
index cc0f8fdf921..1ee58156e0e 100644
--- a/include/configs/stm32f746-disco.h
+++ b/include/configs/stm32f746-disco.h
@@ -28,7 +28,6 @@
#define CONFIG_STM32_FLASH
#define CONFIG_STM32X7_SERIAL
-#define CONFIG_DESIGNWARE_ETH
#define CONFIG_DW_GMAC_DEFAULT_DMA_PBL (8)
#define CONFIG_DW_ALTDESCRIPTOR
#define CONFIG_MII
@@ -67,8 +66,6 @@
#define CONFIG_SYS_LONGHELP
#define CONFIG_AUTO_COMPLETE
#define CONFIG_CMDLINE_EDITING
-
-#define CONFIG_CMD_MEM
#define CONFIG_CMD_CACHE
#define CONFIG_BOARD_LATE_INIT
#define CONFIG_DISPLAY_BOARDINFO
--
GitLab
From df9f07fa3d5a4aedac366eadbee7055ee2c60698 Mon Sep 17 00:00:00 2001
From: Ladislav Michl <ladis@linux-mips.org>
Date: Sat, 1 Apr 2017 17:14:28 +0200
Subject: [PATCH 244/282] ARM: am33xx: fix typo in spl.h
Signed-off-by: Ladislav Michl <ladis@linux-mips.org>
Tested-by: Pau Pajuelo <ppajuel@gmail.com>
---
arch/arm/include/asm/arch-am33xx/spl.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/include/asm/arch-am33xx/spl.h b/arch/arm/include/asm/arch-am33xx/spl.h
index f744ab0782e..9df7b4ac45e 100644
--- a/arch/arm/include/asm/arch-am33xx/spl.h
+++ b/arch/arm/include/asm/arch-am33xx/spl.h
@@ -28,7 +28,7 @@
#define BOOT_DEVICE_XIP 0x01
#define BOOT_DEVICE_XIPWAIT 0x02
#define BOOT_DEVICE_NAND 0x03
-#define BOOT_DEVICE_ONENAD 0x04
+#define BOOT_DEVICE_ONENAND 0x04
#define BOOT_DEVICE_MMC2 0x05 /* ROM only supports 2nd instance. */
#define BOOT_DEVICE_MMC1 0x06
#define BOOT_DEVICE_UART 0x43
--
GitLab
From bf86392251b25da5f34283597bce90d35e71e4a2 Mon Sep 17 00:00:00 2001
From: Ladislav Michl <ladis@linux-mips.org>
Date: Sat, 1 Apr 2017 17:15:04 +0200
Subject: [PATCH 245/282] ARM: am33xx: define BOOT_DEVICE_ONENAND
am33xx does not support OneNAND, but we need this define anyway
to let UBI SPL code compile.
Signed-off-by: Ladislav Michl <ladis@linux-mips.org>
Tested-by: Pau Pajuelo <ppajuel@gmail.com>
---
arch/arm/include/asm/arch-am33xx/spl.h | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm/include/asm/arch-am33xx/spl.h b/arch/arm/include/asm/arch-am33xx/spl.h
index 9df7b4ac45e..4b5a48edd87 100644
--- a/arch/arm/include/asm/arch-am33xx/spl.h
+++ b/arch/arm/include/asm/arch-am33xx/spl.h
@@ -47,6 +47,7 @@
#define BOOT_DEVICE_UART 0x41
#define BOOT_DEVICE_USBETH 0x44
#define BOOT_DEVICE_CPGMAC 0x46
+#define BOOT_DEVICE_ONENAND 0xFF /* ROM does not support OneNAND. */
#define MMC_BOOT_DEVICES_START BOOT_DEVICE_MMC1
#define MMC_BOOT_DEVICES_END BOOT_DEVICE_MMC2
--
GitLab
From 18cae43b62cce86becf84b75829b307fefff54c2 Mon Sep 17 00:00:00 2001
From: Ladislav Michl <ladis@linux-mips.org>
Date: Sun, 16 Apr 2017 15:31:59 +0200
Subject: [PATCH 246/282] mtd: nand: Consolidate nand spl loaders
implementation
nand_spl_load_image implementation was copied over into three
different drivers and now with nand_spl_read_block used for
ubispl situation gets even worse. For now use least intrusive
solution and #include the same implementation to nand drivers.
Signed-off-by: Ladislav Michl <ladis@linux-mips.org>
Tested-by: Pau Pajuelo <ppajuel@gmail.com>
---
drivers/mtd/nand/am335x_spl_bch.c | 49 +------------
drivers/mtd/nand/atmel_nand.c | 30 +-------
drivers/mtd/nand/nand_spl_loaders.c | 104 ++++++++++++++++++++++++++++
drivers/mtd/nand/nand_spl_simple.c | 98 +-------------------------
4 files changed, 110 insertions(+), 171 deletions(-)
create mode 100644 drivers/mtd/nand/nand_spl_loaders.c
diff --git a/drivers/mtd/nand/am335x_spl_bch.c b/drivers/mtd/nand/am335x_spl_bch.c
index 5b189a1d8a5..e68b4a5b196 100644
--- a/drivers/mtd/nand/am335x_spl_bch.c
+++ b/drivers/mtd/nand/am335x_spl_bch.c
@@ -198,53 +198,6 @@ static int nand_read_page(int block, int page, void *dst)
return 0;
}
-int nand_spl_load_image(uint32_t offs, unsigned int size, void *dst)
-{
- unsigned int block, lastblock;
- unsigned int page, page_offset;
-
- /*
- * offs has to be aligned to a page address!
- */
- block = offs / CONFIG_SYS_NAND_BLOCK_SIZE;
- lastblock = (offs + size - 1) / CONFIG_SYS_NAND_BLOCK_SIZE;
- page = (offs % CONFIG_SYS_NAND_BLOCK_SIZE) / CONFIG_SYS_NAND_PAGE_SIZE;
- page_offset = offs % CONFIG_SYS_NAND_PAGE_SIZE;
-
- while (block <= lastblock) {
- if (!nand_is_bad_block(block)) {
- /*
- * Skip bad blocks
- */
- while (page < CONFIG_SYS_NAND_PAGE_COUNT) {
- nand_read_page(block, page, dst);
- /*
- * When offs is not aligned to page address the
- * extra offset is copied to dst as well. Copy
- * the image such that its first byte will be
- * at the dst.
- */
- if (unlikely(page_offset)) {
- memmove(dst, dst + page_offset,
- CONFIG_SYS_NAND_PAGE_SIZE);
- dst = (void *)((int)dst - page_offset);
- page_offset = 0;
- }
- dst += CONFIG_SYS_NAND_PAGE_SIZE;
- page++;
- }
-
- page = 0;
- } else {
- lastblock++;
- }
-
- block++;
- }
-
- return 0;
-}
-
/* nand_init() - initialize data to make nand usable by SPL */
void nand_init(void)
{
@@ -269,3 +222,5 @@ void nand_deselect(void)
if (nand_chip.select_chip)
nand_chip.select_chip(mtd, -1);
}
+
+#include "nand_spl_loaders.c"
diff --git a/drivers/mtd/nand/atmel_nand.c b/drivers/mtd/nand/atmel_nand.c
index 21d5d0e70d0..7c10bfedc6d 100644
--- a/drivers/mtd/nand/atmel_nand.c
+++ b/drivers/mtd/nand/atmel_nand.c
@@ -1380,34 +1380,6 @@ static int nand_read_page(int block, int page, void *dst)
}
#endif /* CONFIG_SPL_NAND_ECC */
-int nand_spl_load_image(uint32_t offs, unsigned int size, void *dst)
-{
- unsigned int block, lastblock;
- unsigned int page;
-
- block = offs / CONFIG_SYS_NAND_BLOCK_SIZE;
- lastblock = (offs + size - 1) / CONFIG_SYS_NAND_BLOCK_SIZE;
- page = (offs % CONFIG_SYS_NAND_BLOCK_SIZE) / CONFIG_SYS_NAND_PAGE_SIZE;
-
- while (block <= lastblock) {
- if (!nand_is_bad_block(block)) {
- while (page < CONFIG_SYS_NAND_PAGE_COUNT) {
- nand_read_page(block, page, dst);
- dst += CONFIG_SYS_NAND_PAGE_SIZE;
- page++;
- }
-
- page = 0;
- } else {
- lastblock++;
- }
-
- block++;
- }
-
- return 0;
-}
-
int at91_nand_wait_ready(struct mtd_info *mtd)
{
struct nand_chip *this = mtd_to_nand(mtd);
@@ -1474,6 +1446,8 @@ void nand_deselect(void)
nand_chip.select_chip(mtd, -1);
}
+#include "nand_spl_loaders.c"
+
#else
#ifndef CONFIG_SYS_NAND_BASE_LIST
diff --git a/drivers/mtd/nand/nand_spl_loaders.c b/drivers/mtd/nand/nand_spl_loaders.c
new file mode 100644
index 00000000000..177c12b5815
--- /dev/null
+++ b/drivers/mtd/nand/nand_spl_loaders.c
@@ -0,0 +1,104 @@
+int nand_spl_load_image(uint32_t offs, unsigned int size, void *dst)
+{
+ unsigned int block, lastblock;
+ unsigned int page, page_offset;
+
+ /* offs has to be aligned to a page address! */
+ block = offs / CONFIG_SYS_NAND_BLOCK_SIZE;
+ lastblock = (offs + size - 1) / CONFIG_SYS_NAND_BLOCK_SIZE;
+ page = (offs % CONFIG_SYS_NAND_BLOCK_SIZE) / CONFIG_SYS_NAND_PAGE_SIZE;
+ page_offset = offs % CONFIG_SYS_NAND_PAGE_SIZE;
+
+ while (block <= lastblock) {
+ if (!nand_is_bad_block(block)) {
+ /* Skip bad blocks */
+ while (page < CONFIG_SYS_NAND_PAGE_COUNT) {
+ nand_read_page(block, page, dst);
+ /*
+ * When offs is not aligned to page address the
+ * extra offset is copied to dst as well. Copy
+ * the image such that its first byte will be
+ * at the dst.
+ */
+ if (unlikely(page_offset)) {
+ memmove(dst, dst + page_offset,
+ CONFIG_SYS_NAND_PAGE_SIZE);
+ dst = (void *)((int)dst - page_offset);
+ page_offset = 0;
+ }
+ dst += CONFIG_SYS_NAND_PAGE_SIZE;
+ page++;
+ }
+
+ page = 0;
+ } else {
+ lastblock++;
+ }
+
+ block++;
+ }
+
+ return 0;
+}
+
+#ifdef CONFIG_SPL_UBI
+/*
+ * Temporary storage for non NAND page aligned and non NAND page sized
+ * reads. Note: This does not support runtime detected FLASH yet, but
+ * that should be reasonably easy to fix by making the buffer large
+ * enough :)
+ */
+static u8 scratch_buf[CONFIG_SYS_NAND_PAGE_SIZE];
+
+/**
+ * nand_spl_read_block - Read data from physical eraseblock into a buffer
+ * @block: Number of the physical eraseblock
+ * @offset: Data offset from the start of @peb
+ * @len: Data size to read
+ * @dst: Address of the destination buffer
+ *
+ * This could be further optimized if we'd have a subpage read
+ * function in the simple code. On NAND which allows subpage reads
+ * this would spare quite some time to readout e.g. the VID header of
+ * UBI.
+ *
+ * Notes:
+ * @offset + @len are not allowed to be larger than a physical
+ * erase block. No sanity check done for simplicity reasons.
+ *
+ * To support runtime detected flash this needs to be extended by
+ * information about the actual flash geometry, but thats beyond the
+ * scope of this effort and for most applications where fast boot is
+ * required it is not an issue anyway.
+ */
+int nand_spl_read_block(int block, int offset, int len, void *dst)
+{
+ int page, read;
+
+ /* Calculate the page number */
+ page = offset / CONFIG_SYS_NAND_PAGE_SIZE;
+
+ /* Offset to the start of a flash page */
+ offset = offset % CONFIG_SYS_NAND_PAGE_SIZE;
+
+ while (len) {
+ /*
+ * Non page aligned reads go to the scratch buffer.
+ * Page aligned reads go directly to the destination.
+ */
+ if (offset || len < CONFIG_SYS_NAND_PAGE_SIZE) {
+ nand_read_page(block, page, scratch_buf);
+ read = min(len, CONFIG_SYS_NAND_PAGE_SIZE - offset);
+ memcpy(dst, scratch_buf + offset, read);
+ offset = 0;
+ } else {
+ nand_read_page(block, page, dst);
+ read = CONFIG_SYS_NAND_PAGE_SIZE;
+ }
+ page++;
+ len -= read;
+ dst += read;
+ }
+ return 0;
+}
+#endif
diff --git a/drivers/mtd/nand/nand_spl_simple.c b/drivers/mtd/nand/nand_spl_simple.c
index 55f48d3a142..56e86d17609 100644
--- a/drivers/mtd/nand/nand_spl_simple.c
+++ b/drivers/mtd/nand/nand_spl_simple.c
@@ -209,102 +209,6 @@ static int nand_read_page(int block, int page, void *dst)
}
#endif
-#ifdef CONFIG_SPL_UBI
-/*
- * Temporary storage for non NAND page aligned and non NAND page sized
- * reads. Note: This does not support runtime detected FLASH yet, but
- * that should be reasonably easy to fix by making the buffer large
- * enough :)
- */
-static u8 scratch_buf[CONFIG_SYS_NAND_PAGE_SIZE];
-
-/**
- * nand_spl_read_block - Read data from physical eraseblock into a buffer
- * @block: Number of the physical eraseblock
- * @offset: Data offset from the start of @peb
- * @len: Data size to read
- * @dst: Address of the destination buffer
- *
- * This could be further optimized if we'd have a subpage read
- * function in the simple code. On NAND which allows subpage reads
- * this would spare quite some time to readout e.g. the VID header of
- * UBI.
- *
- * Notes:
- * @offset + @len are not allowed to be larger than a physical
- * erase block. No sanity check done for simplicity reasons.
- *
- * To support runtime detected flash this needs to be extended by
- * information about the actual flash geometry, but thats beyond the
- * scope of this effort and for most applications where fast boot is
- * required it is not an issue anyway.
- */
-int nand_spl_read_block(int block, int offset, int len, void *dst)
-{
- int page, read;
-
- /* Calculate the page number */
- page = offset / CONFIG_SYS_NAND_PAGE_SIZE;
-
- /* Offset to the start of a flash page */
- offset = offset % CONFIG_SYS_NAND_PAGE_SIZE;
-
- while (len) {
- /*
- * Non page aligned reads go to the scratch buffer.
- * Page aligned reads go directly to the destination.
- */
- if (offset || len < CONFIG_SYS_NAND_PAGE_SIZE) {
- nand_read_page(block, page, scratch_buf);
- read = min(len, CONFIG_SYS_NAND_PAGE_SIZE - offset);
- memcpy(dst, scratch_buf + offset, read);
- offset = 0;
- } else {
- nand_read_page(block, page, dst);
- read = CONFIG_SYS_NAND_PAGE_SIZE;
- }
- page++;
- len -= read;
- dst += read;
- }
- return 0;
-}
-#endif
-
-int nand_spl_load_image(uint32_t offs, unsigned int size, void *dst)
-{
- unsigned int block, lastblock;
- unsigned int page;
-
- /*
- * offs has to be aligned to a page address!
- */
- block = offs / CONFIG_SYS_NAND_BLOCK_SIZE;
- lastblock = (offs + size - 1) / CONFIG_SYS_NAND_BLOCK_SIZE;
- page = (offs % CONFIG_SYS_NAND_BLOCK_SIZE) / CONFIG_SYS_NAND_PAGE_SIZE;
-
- while (block <= lastblock) {
- if (!nand_is_bad_block(block)) {
- /*
- * Skip bad blocks
- */
- while (page < CONFIG_SYS_NAND_PAGE_COUNT) {
- nand_read_page(block, page, dst);
- dst += CONFIG_SYS_NAND_PAGE_SIZE;
- page++;
- }
-
- page = 0;
- } else {
- lastblock++;
- }
-
- block++;
- }
-
- return 0;
-}
-
/* nand_init() - initialize data to make nand usable by SPL */
void nand_init(void)
{
@@ -333,3 +237,5 @@ void nand_deselect(void)
if (nand_chip.select_chip)
nand_chip.select_chip(mtd, -1);
}
+
+#include "nand_spl_loaders.c"
--
GitLab
From a96c08f509da6c2ba38abe7dd6f8f092df1e0ca5 Mon Sep 17 00:00:00 2001
From: Ladislav Michl <ladis@linux-mips.org>
Date: Sat, 1 Apr 2017 17:17:16 +0200
Subject: [PATCH 247/282] igep0033: Rename to igep003x
Rename igep0033 to igep003x as IGEP SMARC AM335x module (igep0034)
can use the same source files.
Signed-off-by: Ladislav Michl <ladis@linux-mips.org>
Tested-by: Pau Pajuelo <ppajuel@gmail.com>
---
arch/arm/Kconfig | 2 +-
arch/arm/mach-omap2/am33xx/Kconfig | 4 ++--
board/isee/{igep0033 => igep003x}/Kconfig | 6 +++---
board/isee/{igep0033 => igep003x}/MAINTAINERS | 6 +++---
board/isee/{igep0033 => igep003x}/Makefile | 0
board/isee/{igep0033 => igep003x}/board.c | 0
board/isee/{igep0033 => igep003x}/board.h | 0
board/isee/{igep0033 => igep003x}/mux.c | 0
configs/am335x_igep0033_defconfig | 5 ++++-
include/configs/{am335x_igep0033.h => am335x_igep003x.h} | 9 +++------
10 files changed, 16 insertions(+), 16 deletions(-)
rename board/isee/{igep0033 => igep003x}/Kconfig (61%)
rename board/isee/{igep0033 => igep003x}/MAINTAINERS (56%)
rename board/isee/{igep0033 => igep003x}/Makefile (100%)
rename board/isee/{igep0033 => igep003x}/board.c (100%)
rename board/isee/{igep0033 => igep003x}/board.h (100%)
rename board/isee/{igep0033 => igep003x}/mux.c (100%)
rename include/configs/{am335x_igep0033.h => am335x_igep003x.h} (96%)
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 513a35fc4e9..08480ac36d3 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -1102,7 +1102,7 @@ source "board/gumstix/pepper/Kconfig"
source "board/h2200/Kconfig"
source "board/hisilicon/hikey/Kconfig"
source "board/imx31_phycore/Kconfig"
-source "board/isee/igep0033/Kconfig"
+source "board/isee/igep003x/Kconfig"
source "board/olimex/mx23_olinuxino/Kconfig"
source "board/phytec/pcm051/Kconfig"
source "board/ppcag/bg0900/Kconfig"
diff --git a/arch/arm/mach-omap2/am33xx/Kconfig b/arch/arm/mach-omap2/am33xx/Kconfig
index cf5d95a26d0..387d488c478 100644
--- a/arch/arm/mach-omap2/am33xx/Kconfig
+++ b/arch/arm/mach-omap2/am33xx/Kconfig
@@ -44,8 +44,8 @@ config TARGET_AM335X_BALTOS
select DM_SERIAL
select DM_GPIO
-config TARGET_AM335X_IGEP0033
- bool "Support am335x_igep0033"
+config TARGET_AM335X_IGEP003X
+ bool "Support am335x_igep003x"
select DM
select DM_SERIAL
select DM_GPIO
diff --git a/board/isee/igep0033/Kconfig b/board/isee/igep003x/Kconfig
similarity index 61%
rename from board/isee/igep0033/Kconfig
rename to board/isee/igep003x/Kconfig
index e989e4b15cf..68a68fc52fa 100644
--- a/board/isee/igep0033/Kconfig
+++ b/board/isee/igep003x/Kconfig
@@ -1,7 +1,7 @@
-if TARGET_AM335X_IGEP0033
+if TARGET_AM335X_IGEP003X
config SYS_BOARD
- default "igep0033"
+ default "igep003x"
config SYS_VENDOR
default "isee"
@@ -10,6 +10,6 @@ config SYS_SOC
default "am33xx"
config SYS_CONFIG_NAME
- default "am335x_igep0033"
+ default "am335x_igep003x"
endif
diff --git a/board/isee/igep0033/MAINTAINERS b/board/isee/igep003x/MAINTAINERS
similarity index 56%
rename from board/isee/igep0033/MAINTAINERS
rename to board/isee/igep003x/MAINTAINERS
index bd8a1f2eb4b..748b189c4e1 100644
--- a/board/isee/igep0033/MAINTAINERS
+++ b/board/isee/igep003x/MAINTAINERS
@@ -1,6 +1,6 @@
-IGEP0033 BOARD
+IGEP003X BOARD
M: Enric Balletbo i Serra <eballetbo@gmail.com>
S: Maintained
-F: board/isee/igep0033/
-F: include/configs/am335x_igep0033.h
+F: board/isee/igep003x/
+F: include/configs/am335x_igep003x.h
F: configs/am335x_igep0033_defconfig
diff --git a/board/isee/igep0033/Makefile b/board/isee/igep003x/Makefile
similarity index 100%
rename from board/isee/igep0033/Makefile
rename to board/isee/igep003x/Makefile
diff --git a/board/isee/igep0033/board.c b/board/isee/igep003x/board.c
similarity index 100%
rename from board/isee/igep0033/board.c
rename to board/isee/igep003x/board.c
diff --git a/board/isee/igep0033/board.h b/board/isee/igep003x/board.h
similarity index 100%
rename from board/isee/igep0033/board.h
rename to board/isee/igep003x/board.h
diff --git a/board/isee/igep0033/mux.c b/board/isee/igep003x/mux.c
similarity index 100%
rename from board/isee/igep0033/mux.c
rename to board/isee/igep003x/mux.c
diff --git a/configs/am335x_igep0033_defconfig b/configs/am335x_igep0033_defconfig
index 27bd3f1884b..3b9ed438561 100644
--- a/configs/am335x_igep0033_defconfig
+++ b/configs/am335x_igep0033_defconfig
@@ -4,7 +4,8 @@ CONFIG_SPL_GPIO_SUPPORT=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_AM33XX=y
-CONFIG_TARGET_AM335X_IGEP0033=y
+CONFIG_SYS_MALLOC_F_LEN=0x2000
+CONFIG_TARGET_AM335X_IGEP003X=y
CONFIG_SPL_MMC_SUPPORT=y
CONFIG_SPL_SERIAL_SUPPORT=y
CONFIG_SPL_LIBDISK_SUPPORT=y
@@ -13,6 +14,7 @@ CONFIG_SPL_WATCHDOG_SUPPORT=y
CONFIG_SPL_FAT_SUPPORT=y
CONFIG_SPL_POWER_SUPPORT=y
CONFIG_SPL_STACK_R_ADDR=0x82000000
+CONFIG_SYS_EXTRA_OPTIONS="MACH_TYPE=MACH_TYPE_IGEP0033"
CONFIG_SYS_CONSOLE_INFO_QUIET=y
CONFIG_VERSION_VARIABLE=y
CONFIG_SPL=y
@@ -45,3 +47,4 @@ CONFIG_EFI_PARTITION=y
CONFIG_MMC_OMAP_HS=y
CONFIG_SYS_NS16550=y
CONFIG_OF_LIBFDT=y
+# CONFIG_GENERATE_SMBIOS_TABLE is not set
diff --git a/include/configs/am335x_igep0033.h b/include/configs/am335x_igep003x.h
similarity index 96%
rename from include/configs/am335x_igep0033.h
rename to include/configs/am335x_igep003x.h
index 7ee8ea79752..cf47fcfe463 100644
--- a/include/configs/am335x_igep0033.h
+++ b/include/configs/am335x_igep003x.h
@@ -11,15 +11,12 @@
* GNU General Public License for more details.
*/
-#ifndef __CONFIG_IGEP0033_H
-#define __CONFIG_IGEP0033_H
+#ifndef __CONFIG_IGEP003X_H
+#define __CONFIG_IGEP003X_H
#define CONFIG_NAND
#include <configs/ti_am335x_common.h>
-/* Mach type */
-#define CONFIG_MACH_TYPE MACH_TYPE_IGEP0033
-
/* Clock defines */
#define V_OSCK 24000000 /* Clock output from T2 */
#define V_SCLK (V_OSCK)
@@ -143,4 +140,4 @@
#define CONFIG_SYS_NAND_U_BOOT_OFFS 0x80000
-#endif /* ! __CONFIG_IGEP0033_H */
+#endif /* ! __CONFIG_IGEP003X_H */
--
GitLab
From 3607e0f86f592a649948c940fd7acc4f51f1e000 Mon Sep 17 00:00:00 2001
From: Ladislav Michl <ladis@linux-mips.org>
Date: Sat, 1 Apr 2017 17:17:57 +0200
Subject: [PATCH 248/282] igep003x: UBIize
Convert IGEP board to use UBI volumes for U-Boot, its environment and
kernel. With exception of first four sectors read by SoC BootROM whole
NAND is UBI managed.
Signed-off-by: Ladislav Michl <ladis@linux-mips.org>
Reviewed-by: Heiko Schocher<hs@denx.de>
Tested-by: Pau Pajuelo <ppajuel@gmail.com>
---
board/isee/igep003x/board.c | 17 ++++++++++++
configs/am335x_igep0033_defconfig | 4 +++
include/configs/am335x_igep003x.h | 45 ++++++++++++++++++-------------
3 files changed, 48 insertions(+), 18 deletions(-)
diff --git a/board/isee/igep003x/board.c b/board/isee/igep003x/board.c
index 5fea7ffaef1..9abb4824b58 100644
--- a/board/isee/igep003x/board.c
+++ b/board/isee/igep003x/board.c
@@ -23,6 +23,9 @@
#include <i2c.h>
#include <miiphy.h>
#include <cpsw.h>
+#include <fdt_support.h>
+#include <mtd_node.h>
+#include <jffs2/load_kernel.h>
#include "board.h"
DECLARE_GLOBAL_DATA_PTR;
@@ -104,6 +107,20 @@ int board_init(void)
return 0;
}
+#ifdef CONFIG_OF_BOARD_SETUP
+int ft_board_setup(void *blob, bd_t *bd)
+{
+#ifdef CONFIG_FDT_FIXUP_PARTITIONS
+ static struct node_info nodes[] = {
+ { "ti,omap2-nand", MTD_DEV_TYPE_NAND, },
+ };
+
+ fdt_fixup_mtdparts(blob, nodes, ARRAY_SIZE(nodes));
+#endif
+ return 0;
+}
+#endif
+
#if defined(CONFIG_DRIVER_TI_CPSW)
static void cpsw_control(int enabled)
{
diff --git a/configs/am335x_igep0033_defconfig b/configs/am335x_igep0033_defconfig
index 3b9ed438561..fa468f05e7f 100644
--- a/configs/am335x_igep0033_defconfig
+++ b/configs/am335x_igep0033_defconfig
@@ -14,6 +14,7 @@ CONFIG_SPL_WATCHDOG_SUPPORT=y
CONFIG_SPL_FAT_SUPPORT=y
CONFIG_SPL_POWER_SUPPORT=y
CONFIG_SPL_STACK_R_ADDR=0x82000000
+CONFIG_OF_BOARD_SETUP=y
CONFIG_SYS_EXTRA_OPTIONS="MACH_TYPE=MACH_TYPE_IGEP0033"
CONFIG_SYS_CONSOLE_INFO_QUIET=y
CONFIG_VERSION_VARIABLE=y
@@ -42,9 +43,12 @@ CONFIG_CMD_EXT4=y
CONFIG_CMD_EXT4_WRITE=y
CONFIG_CMD_FAT=y
CONFIG_CMD_FS_GENERIC=y
+CONFIG_CMD_UBI=y
CONFIG_ISO_PARTITION=y
CONFIG_EFI_PARTITION=y
CONFIG_MMC_OMAP_HS=y
+CONFIG_MTD_UBI_FASTMAP=y
CONFIG_SYS_NS16550=y
CONFIG_OF_LIBFDT=y
+CONFIG_FDT_FIXUP_PARTITIONS=y
# CONFIG_GENERATE_SMBIOS_TABLE is not set
diff --git a/include/configs/am335x_igep003x.h b/include/configs/am335x_igep003x.h
index cf47fcfe463..65941579ba0 100644
--- a/include/configs/am335x_igep003x.h
+++ b/include/configs/am335x_igep003x.h
@@ -21,7 +21,7 @@
#define V_OSCK 24000000 /* Clock output from T2 */
#define V_SCLK (V_OSCK)
-#define CONFIG_ENV_SIZE (128 << 10) /* 128 KiB */
+#define CONFIG_ENV_SIZE (96 << 10) /* 96 KiB */
/* Make the verbose messages from UBI stop printing */
#define CONFIG_UBI_SILENCE_MSG
@@ -67,11 +67,11 @@
"fi;\0" \
"mtdids=" MTDIDS_DEFAULT "\0" \
"mtdparts=" MTDPARTS_DEFAULT "\0" \
- "nandroot=ubi0:filesystem rw ubi.mtd=3,2048\0" \
+ "nandroot=ubi0:rootfs rw ubi.mtd=1\0" \
"nandrootfstype=ubifs rootwait\0" \
- "nandload=ubi part filesystem 2048; ubifsmount ubi0; " \
- "ubifsload ${loadaddr} ${bootdir}/${bootfile}; " \
- "ubifsload ${fdtaddr} ${bootdir}/${dtbfile} \0" \
+ "nandload=ubi part UBI; " \
+ "ubi read ${loadaddr} kernel; " \
+ "ubi read ${fdtaddr} dtb \0" \
"nandargs=setenv bootargs console=${console} " \
"${optargs} " \
"root=${nandroot} " \
@@ -97,12 +97,6 @@
/* NAND support */
#define CONFIG_NAND_OMAP_ELM
#define CONFIG_SYS_NAND_ONFI_DETECTION 1
-#define CONFIG_SYS_ENV_SECT_SIZE (128 << 10) /* 128 KiB */
-#define CONFIG_SYS_REDUNDAND_ENVIRONMENT
-#define CONFIG_ENV_IS_IN_NAND
-#define CONFIG_ENV_OFFSET 0x180000 /* environment starts here */
-#define CONFIG_ENV_ADDR_REDUND (CONFIG_ENV_OFFSET + CONFIG_SYS_ENV_SECT_SIZE)
-#define CONFIG_ENV_SIZE_REDUND (CONFIG_ENV_SIZE)
#define CONFIG_MTD_PARTITIONS
#define CONFIG_MTD_DEVICE
@@ -110,13 +104,32 @@
#define CONFIG_LZO
#define MTDIDS_DEFAULT "nand0=omap2-nand.0"
-#define MTDPARTS_DEFAULT "mtdparts=omap2-nand.0:512k(spl),"\
- "1m(uboot),256k(environment),"\
- "-(filesystem)"
+#define MTDPARTS_DEFAULT "mtdparts=omap2-nand.0:512k(SPL),-(UBI)"
/* SPL */
#define CONFIG_SPL_LDSCRIPT "arch/arm/mach-omap2/am33xx/u-boot-spl.lds"
+/* UBI configuration */
+#define CONFIG_SPL_UBI 1
+#define CONFIG_SPL_UBI_MAX_VOL_LEBS 256
+#define CONFIG_SPL_UBI_MAX_PEB_SIZE (256*1024)
+#define CONFIG_SPL_UBI_MAX_PEBS 4096
+#define CONFIG_SPL_UBI_VOL_IDS 8
+#define CONFIG_SPL_UBI_LOAD_MONITOR_ID 0
+#define CONFIG_SPL_UBI_LOAD_KERNEL_ID 3
+#define CONFIG_SPL_UBI_LOAD_ARGS_ID 4
+#define CONFIG_SPL_UBI_PEB_OFFSET 4
+#define CONFIG_SPL_UBI_VID_OFFSET 512
+#define CONFIG_SPL_UBI_LEB_START 2048
+#define CONFIG_SPL_UBI_INFO_ADDR 0x88080000
+
+/* environment organization */
+#define CONFIG_ENV_IS_IN_UBI 1
+#define CONFIG_ENV_UBI_PART "UBI"
+#define CONFIG_ENV_UBI_VOLUME "config"
+#define CONFIG_ENV_UBI_VOLUME_REDUND "config_r"
+
+/* NAND config */
#define CONFIG_SYS_NAND_5_ADDR_CYCLE
#define CONFIG_SYS_NAND_PAGE_COUNT (CONFIG_SYS_NAND_BLOCK_SIZE / \
CONFIG_SYS_NAND_PAGE_SIZE)
@@ -136,8 +149,4 @@
#define CONFIG_SYS_NAND_ECCBYTES 14
#define CONFIG_NAND_OMAP_ECCSCHEME OMAP_ECC_BCH8_CODE_HW
-#define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE
-
-#define CONFIG_SYS_NAND_U_BOOT_OFFS 0x80000
-
#endif /* ! __CONFIG_IGEP003X_H */
--
GitLab
From 09533e5de7069e597fdd2787b641cc1c6256930f Mon Sep 17 00:00:00 2001
From: Pau Pajuelo <ppajuelo@iseebcn.com>
Date: Sat, 1 Apr 2017 17:18:40 +0200
Subject: [PATCH 249/282] igep003x: Add support for IGEP SMARC AM335x
The IGEP SMARC AM335x is an industrial processor module with
following highlights:
o AM3352 TI processor (Up to AM3359)
o Cortex-A8 ARM CPU
o SMARC form factor module
o Up to 512 MB DDR3 SDRAM / 512 MB FLASH
o WiFi a/b/g/n and Bluetooth v4.0 on-board
o Ethernet 10/100/1000 Mbps and 10/100 Mbps controller on-board
o JTAG debug connector available
o Designed for industrial range purposes
Signed-off-by: Pau Pajuelo <ppajuelo@iseebcn.com>
Signed-off-by: Ladislav Michl <ladis@linux-mips.org>
Tested-by: Pau Pajuelo <ppajuel@gmail.com>
---
arch/arm/mach-omap2/am33xx/Kconfig | 1 +
board/isee/igep003x/board.c | 126 +++++++++++++++---
board/isee/igep003x/mux.c | 10 +-
...33_defconfig => am335x_igep003x_defconfig} | 0
include/configs/am335x_igep003x.h | 15 ++-
5 files changed, 133 insertions(+), 19 deletions(-)
rename configs/{am335x_igep0033_defconfig => am335x_igep003x_defconfig} (100%)
diff --git a/arch/arm/mach-omap2/am33xx/Kconfig b/arch/arm/mach-omap2/am33xx/Kconfig
index 387d488c478..db3c70fe21d 100644
--- a/arch/arm/mach-omap2/am33xx/Kconfig
+++ b/arch/arm/mach-omap2/am33xx/Kconfig
@@ -46,6 +46,7 @@ config TARGET_AM335X_BALTOS
config TARGET_AM335X_IGEP003X
bool "Support am335x_igep003x"
+ select BOARD_LATE_INIT
select DM
select DM_SERIAL
select DM_GPIO
diff --git a/board/isee/igep003x/board.c b/board/isee/igep003x/board.c
index 9abb4824b58..2d0ebbf5ef7 100644
--- a/board/isee/igep003x/board.c
+++ b/board/isee/igep003x/board.c
@@ -1,7 +1,7 @@
/*
- * Board functions for IGEP COM AQUILA based boards
+ * Board functions for IGEP COM AQUILA and SMARC AM335x based boards
*
- * Copyright (C) 2013, ISEE 2007 SL - http://www.isee.biz/
+ * Copyright (C) 2013-2017, ISEE 2007 SL - http://www.isee.biz/
*
* SPDX-License-Identifier: GPL-2.0+
*/
@@ -26,21 +26,72 @@
#include <fdt_support.h>
#include <mtd_node.h>
#include <jffs2/load_kernel.h>
+#include <environment.h>
#include "board.h"
DECLARE_GLOBAL_DATA_PTR;
+/* GPIO0_27 and GPIO0_26 are used to read board revision from IGEP003x boards
+ * and control IGEP0034 green and red LEDs.
+ * U-boot configures these pins as input pullup to detect board revision:
+ * IGEP0034-LITE = 0b00
+ * IGEP0034 (FULL) = 0b01
+ * IGEP0033 = 0b1X
+ */
+#define GPIO_GREEN_REVISION 27
+#define GPIO_RED_REVISION 26
+
static struct ctrl_dev *cdev = (struct ctrl_dev *)CTRL_DEVICE_BASE;
+/*
+ * Routine: get_board_revision
+ * Description: Returns the board revision
+ */
+static int get_board_revision(void)
+{
+ int revision;
+
+ gpio_request(GPIO_GREEN_REVISION, "green_revision");
+ gpio_direction_input(GPIO_GREEN_REVISION);
+ revision = 2 * gpio_get_value(GPIO_GREEN_REVISION);
+ gpio_free(GPIO_GREEN_REVISION);
+
+ gpio_request(GPIO_RED_REVISION, "red_revision");
+ gpio_direction_input(GPIO_RED_REVISION);
+ revision = revision + gpio_get_value(GPIO_RED_REVISION);
+ gpio_free(GPIO_RED_REVISION);
+
+ return revision;
+}
+
#ifdef CONFIG_SPL_BUILD
-static const struct ddr_data ddr3_data = {
+/* PN H5TQ4G63AFR is equivalent to MT41K256M16HA125*/
+static const struct ddr_data ddr3_igep0034_data = {
+ .datardsratio0 = MT41K256M16HA125E_RD_DQS,
+ .datawdsratio0 = MT41K256M16HA125E_WR_DQS,
+ .datafwsratio0 = MT41K256M16HA125E_PHY_FIFO_WE,
+ .datawrsratio0 = MT41K256M16HA125E_PHY_WR_DATA,
+};
+
+static const struct ddr_data ddr3_igep0034_lite_data = {
.datardsratio0 = K4B2G1646EBIH9_RD_DQS,
.datawdsratio0 = K4B2G1646EBIH9_WR_DQS,
.datafwsratio0 = K4B2G1646EBIH9_PHY_FIFO_WE,
.datawrsratio0 = K4B2G1646EBIH9_PHY_WR_DATA,
};
-static const struct cmd_control ddr3_cmd_ctrl_data = {
+static const struct cmd_control ddr3_igep0034_cmd_ctrl_data = {
+ .cmd0csratio = MT41K256M16HA125E_RATIO,
+ .cmd0iclkout = MT41K256M16HA125E_INVERT_CLKOUT,
+
+ .cmd1csratio = MT41K256M16HA125E_RATIO,
+ .cmd1iclkout = MT41K256M16HA125E_INVERT_CLKOUT,
+
+ .cmd2csratio = MT41K256M16HA125E_RATIO,
+ .cmd2iclkout = MT41K256M16HA125E_INVERT_CLKOUT,
+};
+
+static const struct cmd_control ddr3_igep0034_lite_cmd_ctrl_data = {
.cmd0csratio = K4B2G1646EBIH9_RATIO,
.cmd0iclkout = K4B2G1646EBIH9_INVERT_CLKOUT,
@@ -51,7 +102,17 @@ static const struct cmd_control ddr3_cmd_ctrl_data = {
.cmd2iclkout = K4B2G1646EBIH9_INVERT_CLKOUT,
};
-static struct emif_regs ddr3_emif_reg_data = {
+static struct emif_regs ddr3_igep0034_emif_reg_data = {
+ .sdram_config = MT41K256M16HA125E_EMIF_SDCFG,
+ .ref_ctrl = MT41K256M16HA125E_EMIF_SDREF,
+ .sdram_tim1 = MT41K256M16HA125E_EMIF_TIM1,
+ .sdram_tim2 = MT41K256M16HA125E_EMIF_TIM2,
+ .sdram_tim3 = MT41K256M16HA125E_EMIF_TIM3,
+ .zq_config = MT41K256M16HA125E_ZQ_CFG,
+ .emif_ddr_phy_ctlr_1 = MT41K256M16HA125E_EMIF_READ_LATENCY,
+};
+
+static struct emif_regs ddr3_igep0034_lite_emif_reg_data = {
.sdram_config = K4B2G1646EBIH9_EMIF_SDCFG,
.ref_ctrl = K4B2G1646EBIH9_EMIF_SDREF,
.sdram_tim1 = K4B2G1646EBIH9_EMIF_TIM1,
@@ -61,6 +122,22 @@ static struct emif_regs ddr3_emif_reg_data = {
.emif_ddr_phy_ctlr_1 = K4B2G1646EBIH9_EMIF_READ_LATENCY,
};
+const struct ctrl_ioregs ioregs_igep0034 = {
+ .cm0ioctl = MT41K256M16HA125E_IOCTRL_VALUE,
+ .cm1ioctl = MT41K256M16HA125E_IOCTRL_VALUE,
+ .cm2ioctl = MT41K256M16HA125E_IOCTRL_VALUE,
+ .dt0ioctl = MT41K256M16HA125E_IOCTRL_VALUE,
+ .dt1ioctl = MT41K256M16HA125E_IOCTRL_VALUE,
+};
+
+const struct ctrl_ioregs ioregs_igep0034_lite = {
+ .cm0ioctl = K4B2G1646EBIH9_IOCTRL_VALUE,
+ .cm1ioctl = K4B2G1646EBIH9_IOCTRL_VALUE,
+ .cm2ioctl = K4B2G1646EBIH9_IOCTRL_VALUE,
+ .dt0ioctl = K4B2G1646EBIH9_IOCTRL_VALUE,
+ .dt1ioctl = K4B2G1646EBIH9_IOCTRL_VALUE,
+};
+
#define OSC (V_OSCK/1000000)
const struct dpll_params dpll_ddr = {
400, OSC-1, 1, -1, -1, -1, -1};
@@ -80,18 +157,14 @@ void set_mux_conf_regs(void)
enable_board_pin_mux();
}
-const struct ctrl_ioregs ioregs = {
- .cm0ioctl = K4B2G1646EBIH9_IOCTRL_VALUE,
- .cm1ioctl = K4B2G1646EBIH9_IOCTRL_VALUE,
- .cm2ioctl = K4B2G1646EBIH9_IOCTRL_VALUE,
- .dt0ioctl = K4B2G1646EBIH9_IOCTRL_VALUE,
- .dt1ioctl = K4B2G1646EBIH9_IOCTRL_VALUE,
-};
-
void sdram_init(void)
{
- config_ddr(400, &ioregs, &ddr3_data,
- &ddr3_cmd_ctrl_data, &ddr3_emif_reg_data, 0);
+ if (get_board_revision() == 1)
+ config_ddr(400, &ioregs_igep0034, &ddr3_igep0034_data,
+ &ddr3_igep0034_cmd_ctrl_data, &ddr3_igep0034_emif_reg_data, 0);
+ else
+ config_ddr(400, &ioregs_igep0034_lite, &ddr3_igep0034_lite_data,
+ &ddr3_igep0034_lite_cmd_ctrl_data, &ddr3_igep0034_lite_emif_reg_data, 0);
}
#endif
@@ -107,6 +180,26 @@ int board_init(void)
return 0;
}
+#ifdef CONFIG_BOARD_LATE_INIT
+int board_late_init(void)
+{
+#ifdef CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
+ switch (get_board_revision()) {
+ case 0:
+ setenv("board_name", "igep0034-lite");
+ break;
+ case 1:
+ setenv("board_name", "igep0034");
+ break;
+ default:
+ setenv("board_name", "igep0033");
+ break;
+ }
+#endif
+ return 0;
+}
+#endif
+
#ifdef CONFIG_OF_BOARD_SETUP
int ft_board_setup(void *blob, bd_t *bd)
{
@@ -180,6 +273,9 @@ int board_eth_init(bd_t *bis)
writel((GMII1_SEL_RMII | RMII1_IO_CLK_EN),
&cdev->miisel);
+ if (get_board_revision() == 1)
+ cpsw_slaves[0].phy_addr = 1;
+
rv = cpsw_register(&cpsw_data);
if (rv < 0)
printf("Error %d registering CPSW switch\n", rv);
diff --git a/board/isee/igep003x/mux.c b/board/isee/igep003x/mux.c
index e86277663d4..550e3b3197d 100644
--- a/board/isee/igep003x/mux.c
+++ b/board/isee/igep003x/mux.c
@@ -32,7 +32,7 @@ static struct module_pin_mux mmc0_pin_mux[] = {
{OFFSET(mmc0_dat0), (MODE(0) | RXACTIVE | PULLUP_EN)}, /* MMC0_DAT0 */
{OFFSET(mmc0_clk), (MODE(0) | RXACTIVE | PULLUP_EN)}, /* MMC0_CLK */
{OFFSET(mmc0_cmd), (MODE(0) | RXACTIVE | PULLUP_EN)}, /* MMC0_CMD */
- {OFFSET(mcasp0_aclkx), (MODE(4) | RXACTIVE)}, /* MMC0_CD */
+ {OFFSET(spi0_cs1), (MODE(5) | RXACTIVE | PULLUP_EN)}, /* MMC0_CD */
{-1},
};
@@ -69,6 +69,12 @@ static struct module_pin_mux rmii1_pin_mux[] = {
{-1},
};
+static struct module_pin_mux gpio_pin_mux[] = {
+ {OFFSET(gpmc_ad10), (MODE(7) | RXACTIVE | PULLUP_EN)}, /* GPIO0_26 */
+ {OFFSET(gpmc_ad11), (MODE(7) | RXACTIVE | PULLUP_EN)}, /* GPIO0_27 */
+ {-1},
+};
+
void enable_uart0_pin_mux(void)
{
configure_module_pin_mux(uart0_pin_mux);
@@ -85,4 +91,6 @@ void enable_board_pin_mux(void)
configure_module_pin_mux(mmc0_pin_mux);
/* Ethernet pinmux. */
configure_module_pin_mux(rmii1_pin_mux);
+ /* GPIO pinmux. */
+ configure_module_pin_mux(gpio_pin_mux);
}
diff --git a/configs/am335x_igep0033_defconfig b/configs/am335x_igep003x_defconfig
similarity index 100%
rename from configs/am335x_igep0033_defconfig
rename to configs/am335x_igep003x_defconfig
diff --git a/include/configs/am335x_igep003x.h b/include/configs/am335x_igep003x.h
index 65941579ba0..1b189887d23 100644
--- a/include/configs/am335x_igep003x.h
+++ b/include/configs/am335x_igep003x.h
@@ -34,7 +34,6 @@
DEFAULT_LINUX_BOOT_ENV \
"bootdir=/boot\0" \
"bootfile=zImage\0" \
- "dtbfile=am335x-base0033.dtb\0" \
"console=ttyO0,115200n8\0" \
"mmcdev=0\0" \
"mmcroot=/dev/mmcblk0p2 rw\0" \
@@ -48,7 +47,7 @@
"importbootenv=echo Importing environment from mmc ...; " \
"env import -t ${loadaddr} ${filesize}\0" \
"mmcload=load mmc ${mmcdev}:2 ${loadaddr} ${bootdir}/${bootfile}; " \
- "load mmc ${mmcdev}:2 ${fdtaddr} ${bootdir}/${dtbfile}\0" \
+ "load mmc ${mmcdev}:2 ${fdtaddr} ${bootdir}/${fdtfile}\0" \
"mmcboot=mmc dev ${mmcdev}; " \
"if mmc rescan; then " \
"echo SD/MMC found on device ${mmcdev};" \
@@ -79,10 +78,20 @@
"nandboot=echo Booting from nand ...; " \
"run nandargs; " \
"run nandload; " \
- "bootz ${loadaddr} - ${fdtaddr} \0"
+ "bootz ${loadaddr} - ${fdtaddr} \0" \
+ "findfdt="\
+ "if test ${board_name} = igep0033; then " \
+ "setenv fdtfile am335x-igep-base0033.dtb; fi; " \
+ "if test ${board_name} = igep0034; then " \
+ "setenv fdtfile am335x-igep-base0040.dtb; fi; " \
+ "if test ${board_name} = igep0034-lite; then " \
+ "setenv fdtfile am335x-igep-base0040-lite.dtb; fi; " \
+ "if test ${fdtfile} = ''; then " \
+ "echo WARNING: Could not determine device tree to use; fi; \0"
#endif
#define CONFIG_BOOTCOMMAND \
+ "run findfdt;" \
"run mmcboot;" \
"run nandboot;"
--
GitLab
From 2e0c6f38f3893a247c23de180999b2618ed01c8a Mon Sep 17 00:00:00 2001
From: Pau Pajuelo <ppajuelo@iseebcn.com>
Date: Sat, 1 Apr 2017 17:19:43 +0200
Subject: [PATCH 250/282] igep003x: Add netboot support
netboot allows to boot an external image using TFTP and NFS protocols
Signed-off-by: Pau Pajuelo <ppajuelo@iseebcn.com>
Signed-off-by: Ladislav Michl <ladis@linux-mips.org>
Tested-by: Pau Pajuelo <ppajuel@gmail.com>
---
include/configs/am335x_igep003x.h | 13 ++++++++++++-
1 file changed, 12 insertions(+), 1 deletion(-)
diff --git a/include/configs/am335x_igep003x.h b/include/configs/am335x_igep003x.h
index 1b189887d23..55b511c408e 100644
--- a/include/configs/am335x_igep003x.h
+++ b/include/configs/am335x_igep003x.h
@@ -79,6 +79,16 @@
"run nandargs; " \
"run nandload; " \
"bootz ${loadaddr} - ${fdtaddr} \0" \
+ "netload=tftpboot ${loadaddr} ${bootfile}; " \
+ "tftpboot ${fdtaddr} ${fdtfile} \0" \
+ "netargs=setenv bootargs console=${console} " \
+ "${optargs} " \
+ "root=/dev/nfs " \
+ "ip=${ipaddr} nfsroot=${serverip}:${rootnfs},v3,tcp \0" \
+ "netboot=echo Booting from net ...; " \
+ "run netargs; " \
+ "run netload; " \
+ "bootz ${loadaddr} - ${fdtaddr} \0" \
"findfdt="\
"if test ${board_name} = igep0033; then " \
"setenv fdtfile am335x-igep-base0033.dtb; fi; " \
@@ -93,7 +103,8 @@
#define CONFIG_BOOTCOMMAND \
"run findfdt;" \
"run mmcboot;" \
- "run nandboot;"
+ "run nandboot;" \
+ "run netboot;"
/* NS16550 Configuration */
#define CONFIG_SYS_NS16550_COM1 0x44e09000 /* UART0 */
--
GitLab
From d425d6056e0159ee26cb7f7037ff0b72ffd93658 Mon Sep 17 00:00:00 2001
From: Chris Packham <judge.packham@gmail.com>
Date: Sat, 29 Apr 2017 15:20:29 +1200
Subject: [PATCH 251/282] rtc: Add DM support to ds1307
Add an implementation of the ds1307 driver that uses the driver model
i2c APIs.
Signed-off-by: Chris Packham <judge.packham@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
---
drivers/rtc/Kconfig | 7 ++
drivers/rtc/ds1307.c | 209 ++++++++++++++++++++++++++++++++++++++-----
2 files changed, 196 insertions(+), 20 deletions(-)
diff --git a/drivers/rtc/Kconfig b/drivers/rtc/Kconfig
index cb79a016316..d06130c7a2e 100644
--- a/drivers/rtc/Kconfig
+++ b/drivers/rtc/Kconfig
@@ -23,4 +23,11 @@ config RTC_PCF2127
has a selectable I2C-bus or SPI-bus, a backup battery switch-over circuit, a
programmable watchdog function, a timestamp function, and many other features.
+config RTC_DS1307
+ bool "Enable DS1307 driver"
+ depends on DM_RTC
+ help
+ Support for Dallas Semiconductor (now Maxim) DS1307 and DS1338/9 and
+ compatible Real Time Clock devices.
+
endmenu
diff --git a/drivers/rtc/ds1307.c b/drivers/rtc/ds1307.c
index 3be1da68731..5df15c7fd6c 100644
--- a/drivers/rtc/ds1307.c
+++ b/drivers/rtc/ds1307.c
@@ -16,28 +16,16 @@
#include <common.h>
#include <command.h>
+#include <dm.h>
#include <rtc.h>
#include <i2c.h>
-#if defined(CONFIG_CMD_DATE)
-
-/*---------------------------------------------------------------------*/
-#undef DEBUG_RTC
-
-#ifdef DEBUG_RTC
-#define DEBUGR(fmt,args...) printf(fmt ,##args)
-#else
-#define DEBUGR(fmt,args...)
-#endif
-/*---------------------------------------------------------------------*/
-
-#ifndef CONFIG_SYS_I2C_RTC_ADDR
-# define CONFIG_SYS_I2C_RTC_ADDR 0x68
-#endif
-
-#if defined(CONFIG_RTC_DS1307) && (CONFIG_SYS_I2C_SPEED > 100000)
-# error The DS1307 is specified only up to 100kHz!
-#endif
+enum ds_type {
+ ds_1307,
+ ds_1337,
+ ds_1340,
+ mcp794xx,
+};
/*
* RTC register addresses
@@ -62,6 +50,28 @@
#define MCP7941X_BIT_ST 0x80
#define MCP7941X_BIT_VBATEN 0x08
+#ifndef CONFIG_DM_RTC
+
+#if defined(CONFIG_CMD_DATE)
+
+/*---------------------------------------------------------------------*/
+#undef DEBUG_RTC
+
+#ifdef DEBUG_RTC
+#define DEBUGR(fmt, args...) printf(fmt, ##args)
+#else
+#define DEBUGR(fmt, args...)
+#endif
+/*---------------------------------------------------------------------*/
+
+#ifndef CONFIG_SYS_I2C_RTC_ADDR
+# define CONFIG_SYS_I2C_RTC_ADDR 0x68
+#endif
+
+#if defined(CONFIG_RTC_DS1307) && (CONFIG_SYS_I2C_SPEED > 100000)
+# error The DS1307 is specified only up to 100kHz!
+#endif
+
static uchar rtc_read (uchar reg);
static void rtc_write (uchar reg, uchar val);
@@ -211,4 +221,163 @@ static void rtc_write (uchar reg, uchar val)
{
i2c_reg_write (CONFIG_SYS_I2C_RTC_ADDR, reg, val);
}
-#endif
+
+#endif /* CONFIG_CMD_DATE*/
+
+#endif /* !CONFIG_DM_RTC */
+
+#ifdef CONFIG_DM_RTC
+static int ds1307_rtc_set(struct udevice *dev, const struct rtc_time *tm)
+{
+ int ret;
+ uchar buf[7];
+ enum ds_type type = dev_get_driver_data(dev);
+
+ debug("Set DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n",
+ tm->tm_year, tm->tm_mon, tm->tm_mday, tm->tm_wday,
+ tm->tm_hour, tm->tm_min, tm->tm_sec);
+
+ if (tm->tm_year < 1970 || tm->tm_year > 2069)
+ printf("WARNING: year should be between 1970 and 2069!\n");
+
+ buf[RTC_YR_REG_ADDR] = bin2bcd(tm->tm_year % 100);
+ buf[RTC_MON_REG_ADDR] = bin2bcd(tm->tm_mon);
+ buf[RTC_DAY_REG_ADDR] = bin2bcd(tm->tm_wday + 1);
+ buf[RTC_DATE_REG_ADDR] = bin2bcd(tm->tm_mday);
+ buf[RTC_HR_REG_ADDR] = bin2bcd(tm->tm_hour);
+ buf[RTC_MIN_REG_ADDR] = bin2bcd(tm->tm_min);
+ buf[RTC_SEC_REG_ADDR] = bin2bcd(tm->tm_sec);
+
+ if (type == mcp794xx) {
+ buf[RTC_DAY_REG_ADDR] |= MCP7941X_BIT_VBATEN;
+ buf[RTC_SEC_REG_ADDR] |= MCP7941X_BIT_ST;
+ }
+
+ ret = dm_i2c_write(dev, 0, buf, sizeof(buf));
+ if (ret < 0)
+ return ret;
+
+ return 0;
+}
+
+static int ds1307_rtc_get(struct udevice *dev, struct rtc_time *tm)
+{
+ int ret;
+ uchar buf[7];
+ enum ds_type type = dev_get_driver_data(dev);
+
+read_rtc:
+ ret = dm_i2c_read(dev, 0, buf, sizeof(buf));
+ if (ret < 0)
+ return ret;
+
+ if (type == ds_1307) {
+ if (buf[RTC_SEC_REG_ADDR] & RTC_SEC_BIT_CH) {
+ printf("### Warning: RTC oscillator has stopped\n");
+ /* clear the CH flag */
+ buf[RTC_SEC_REG_ADDR] &= ~RTC_SEC_BIT_CH;
+ dm_i2c_reg_write(dev, RTC_SEC_REG_ADDR,
+ buf[RTC_SEC_REG_ADDR]);
+ return -1;
+ }
+ }
+
+ if (type == mcp794xx) {
+ /* make sure that the backup battery is enabled */
+ if (!(buf[RTC_DAY_REG_ADDR] & MCP7941X_BIT_VBATEN)) {
+ dm_i2c_reg_write(dev, RTC_DAY_REG_ADDR,
+ buf[RTC_DAY_REG_ADDR] |
+ MCP7941X_BIT_VBATEN);
+ }
+
+ /* clock halted? turn it on, so clock can tick. */
+ if (!(buf[RTC_SEC_REG_ADDR] & MCP7941X_BIT_ST)) {
+ dm_i2c_reg_write(dev, RTC_SEC_REG_ADDR,
+ MCP7941X_BIT_ST);
+ printf("Started RTC\n");
+ goto read_rtc;
+ }
+ }
+
+ tm->tm_sec = bcd2bin(buf[RTC_SEC_REG_ADDR] & 0x7F);
+ tm->tm_min = bcd2bin(buf[RTC_MIN_REG_ADDR] & 0x7F);
+ tm->tm_hour = bcd2bin(buf[RTC_HR_REG_ADDR] & 0x3F);
+ tm->tm_mday = bcd2bin(buf[RTC_DATE_REG_ADDR] & 0x3F);
+ tm->tm_mon = bcd2bin(buf[RTC_MON_REG_ADDR] & 0x1F);
+ tm->tm_year = bcd2bin(buf[RTC_YR_REG_ADDR]) +
+ (bcd2bin(buf[RTC_YR_REG_ADDR]) >= 70 ?
+ 1900 : 2000);
+ tm->tm_wday = bcd2bin((buf[RTC_DAY_REG_ADDR] - 1) & 0x07);
+ tm->tm_yday = 0;
+ tm->tm_isdst = 0;
+
+ debug("Get DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n",
+ tm->tm_year, tm->tm_mon, tm->tm_mday, tm->tm_wday,
+ tm->tm_hour, tm->tm_min, tm->tm_sec);
+
+ return 0;
+}
+
+static int ds1307_rtc_reset(struct udevice *dev)
+{
+ int ret;
+ struct rtc_time tmp = {
+ .tm_year = 1970,
+ .tm_mon = 1,
+ .tm_mday = 1,
+ .tm_hour = 0,
+ .tm_min = 0,
+ .tm_sec = 0,
+ };
+
+ /* clear Clock Halt */
+ ret = dm_i2c_reg_write(dev, RTC_SEC_REG_ADDR, 0x00);
+ if (ret < 0)
+ return ret;
+ ret = dm_i2c_reg_write(dev, RTC_CTL_REG_ADDR,
+ RTC_CTL_BIT_SQWE | RTC_CTL_BIT_RS1 |
+ RTC_CTL_BIT_RS0);
+ if (ret < 0)
+ return ret;
+
+ ret = ds1307_rtc_set(dev, &tmp);
+ if (ret < 0)
+ return ret;
+
+ debug("RTC: %4d-%02d-%02d %2d:%02d:%02d UTC\n",
+ tmp.tm_year, tmp.tm_mon, tmp.tm_mday,
+ tmp.tm_hour, tmp.tm_min, tmp.tm_sec);
+
+ return 0;
+}
+
+static int ds1307_probe(struct udevice *dev)
+{
+ i2c_set_chip_flags(dev, DM_I2C_CHIP_RD_ADDRESS |
+ DM_I2C_CHIP_WR_ADDRESS);
+
+ return 0;
+}
+
+static const struct rtc_ops ds1307_rtc_ops = {
+ .get = ds1307_rtc_get,
+ .set = ds1307_rtc_set,
+ .reset = ds1307_rtc_reset,
+};
+
+static const struct udevice_id ds1307_rtc_ids[] = {
+ { .compatible = "dallas,ds1307", .data = ds_1307 },
+ { .compatible = "dallas,ds1337", .data = ds_1337 },
+ { .compatible = "dallas,ds1340", .data = ds_1340 },
+ { .compatible = "microchip,mcp7941x", .data = mcp794xx },
+ { }
+};
+
+U_BOOT_DRIVER(rtc_ds1307) = {
+ .name = "rtc-ds1307",
+ .id = UCLASS_RTC,
+ .probe = ds1307_probe,
+ .of_match = ds1307_rtc_ids,
+ .ops = &ds1307_rtc_ops,
+};
+#endif /* CONFIG_DM_RTC */
--
GitLab
From 85edfc1f6fdf1630c00dc57a63ab66d51608092e Mon Sep 17 00:00:00 2001
From: Chris Packham <judge.packham@gmail.com>
Date: Tue, 2 May 2017 21:30:46 +1200
Subject: [PATCH 252/282] tools: moveconfig: extract helper function for user
confirmation
Avoid repetitive code dealing with asking the user for confirmation.
Signed-off-by: Chris Packham <judge.packham@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
---
tools/moveconfig.py | 37 ++++++++++++++++++-------------------
1 file changed, 18 insertions(+), 19 deletions(-)
diff --git a/tools/moveconfig.py b/tools/moveconfig.py
index dcca0ecb5eb..f8d485703f8 100755
--- a/tools/moveconfig.py
+++ b/tools/moveconfig.py
@@ -435,6 +435,20 @@ def extend_matched_lines(lines, matched, pre_patterns, post_patterns, extend_pre
matched += extended_matched
matched.sort()
+def confirm(options, prompt):
+ if not options.yes:
+ while True:
+ choice = raw_input('{} [y/n]: '.format(prompt))
+ choice = choice.lower()
+ print choice
+ if choice == 'y' or choice == 'n':
+ break
+
+ if choice == 'n':
+ return False
+
+ return True
+
def cleanup_one_header(header_path, patterns, options):
"""Clean regex-matched lines away from a file.
@@ -502,15 +516,8 @@ def cleanup_headers(configs, options):
configs: A list of CONFIGs to remove.
options: option flags.
"""
- if not options.yes:
- while True:
- choice = raw_input('Clean up headers? [y/n]: ').lower()
- print choice
- if choice == 'y' or choice == 'n':
- break
-
- if choice == 'n':
- return
+ if not confirm(options, 'Clean up headers?'):
+ return
patterns = []
for config in configs:
@@ -582,16 +589,8 @@ def cleanup_extra_options(configs, options):
configs: A list of CONFIGs to remove.
options: option flags.
"""
- if not options.yes:
- while True:
- choice = (raw_input('Clean up CONFIG_SYS_EXTRA_OPTIONS? [y/n]: ').
- lower())
- print choice
- if choice == 'y' or choice == 'n':
- break
-
- if choice == 'n':
- return
+ if not confirm(options, 'Clean up CONFIG_SYS_EXTRA_OPTIONS?'):
+ return
configs = [ config[len('CONFIG_'):] for config in configs ]
--
GitLab
From ca43834d66f08ed7244c26ef8edbe1a9ee2b8e8c Mon Sep 17 00:00:00 2001
From: Chris Packham <judge.packham@gmail.com>
Date: Tue, 2 May 2017 21:30:47 +1200
Subject: [PATCH 253/282] tools: moveconfig: cleanup whitelist entries
After moving to KConfig and removing from all headers options should be
removed from config_whitelist.txt so the build starts complaining if
someone adds them back.
Acked-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Chris Packham <judge.packham@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
---
tools/moveconfig.py | 20 ++++++++++++++++++++
1 file changed, 20 insertions(+)
diff --git a/tools/moveconfig.py b/tools/moveconfig.py
index f8d485703f8..2361a430dc8 100755
--- a/tools/moveconfig.py
+++ b/tools/moveconfig.py
@@ -600,6 +600,25 @@ def cleanup_extra_options(configs, options):
cleanup_one_extra_option(os.path.join('configs', defconfig), configs,
options)
+def cleanup_whitelist(configs, options):
+ """Delete config whitelist entries
+
+ Arguments:
+ configs: A list of CONFIGs to remove.
+ options: option flags.
+ """
+ if not confirm(options, 'Clean up whitelist entries?'):
+ return
+
+ with open(os.path.join('scripts', 'config_whitelist.txt')) as f:
+ lines = f.readlines()
+
+ lines = [x for x in lines if x.strip() not in configs]
+
+ with open(os.path.join('scripts', 'config_whitelist.txt'), 'w') as f:
+ f.write(''.join(lines))
+
+
### classes ###
class Progress:
@@ -1296,6 +1315,7 @@ def main():
if configs:
cleanup_headers(configs, options)
cleanup_extra_options(configs, options)
+ cleanup_whitelist(configs, options)
if options.commit:
subprocess.call(['git', 'add', '-u'])
--
GitLab
From f90df596a87bcec97873c247f1948190355539a9 Mon Sep 17 00:00:00 2001
From: Chris Packham <judge.packham@gmail.com>
Date: Tue, 2 May 2017 21:30:48 +1200
Subject: [PATCH 254/282] tools: moveconfig: cleanup README entires
The Kconfig description replaces the description in the README file so
as options are migrated they can be removed from the README.
Signed-off-by: Chris Packham <judge.packham@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
---
tools/moveconfig.py | 41 +++++++++++++++++++++++++++++++++++++++++
1 file changed, 41 insertions(+)
diff --git a/tools/moveconfig.py b/tools/moveconfig.py
index 2361a430dc8..95ef352f05f 100755
--- a/tools/moveconfig.py
+++ b/tools/moveconfig.py
@@ -618,6 +618,46 @@ def cleanup_whitelist(configs, options):
with open(os.path.join('scripts', 'config_whitelist.txt'), 'w') as f:
f.write(''.join(lines))
+def find_matching(patterns, line):
+ for pat in patterns:
+ if pat.search(line):
+ return True
+ return False
+
+def cleanup_readme(configs, options):
+ """Delete config description in README
+
+ Arguments:
+ configs: A list of CONFIGs to remove.
+ options: option flags.
+ """
+ if not confirm(options, 'Clean up README?'):
+ return
+
+ patterns = []
+ for config in configs:
+ patterns.append(re.compile(r'^\s+%s' % config))
+
+ with open('README') as f:
+ lines = f.readlines()
+
+ found = False
+ newlines = []
+ for line in lines:
+ if not found:
+ found = find_matching(patterns, line)
+ if found:
+ continue
+
+ if found and re.search(r'^\s+CONFIG', line):
+ found = False
+
+ if not found:
+ newlines.append(line)
+
+ with open('README', 'w') as f:
+ f.write(''.join(newlines))
+
### classes ###
class Progress:
@@ -1316,6 +1356,7 @@ def main():
cleanup_headers(configs, options)
cleanup_extra_options(configs, options)
cleanup_whitelist(configs, options)
+ cleanup_readme(configs, options)
if options.commit:
subprocess.call(['git', 'add', '-u'])
--
GitLab
From d7f53065d9193407a95af412393c9b11709fe231 Mon Sep 17 00:00:00 2001
From: Chris Packham <judge.packham@gmail.com>
Date: Tue, 2 May 2017 21:30:49 +1200
Subject: [PATCH 255/282] README: remove CONFIG_CMD_DATE
CONFIG_CMD_DATE was recently moved to Kconfig. Remove the now duplicate
description of the option.
Signed-off-by: Chris Packham <judge.packham@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
---
README | 1 -
1 file changed, 1 deletion(-)
diff --git a/README b/README
index 0ac01363f7a..78173e2d867 100644
--- a/README
+++ b/README
@@ -828,7 +828,6 @@ The following options need to be configured:
CONFIG_CMD_CACHE * icache, dcache
CONFIG_CMD_CONSOLE coninfo
CONFIG_CMD_CRC32 * crc32
- CONFIG_CMD_DATE * support for RTC, date/time...
CONFIG_CMD_DHCP * DHCP support
CONFIG_CMD_DIAG * Diagnostics
CONFIG_CMD_DS4510 * ds4510 I2C gpio commands
--
GitLab
From f22f3dc996a55047334a2e9312ac440877174470 Mon Sep 17 00:00:00 2001
From: Vikas Manocha <vikas.manocha@st.com>
Date: Wed, 12 Apr 2017 14:16:36 -0700
Subject: [PATCH 256/282] ARM: DT: STM32F746: add u-boot, dm-pre-reloc property
to sub nodes
This patch is required for correct SPL device tree creation by fdtgrep
as fdtgrep looks for u-boot,dm-pre-reloc property of the node to include
it in the spl device tree.
Not adding it in these subnodes ignores the pin muxing of peripherals
which is almost always in the subnodes.
Signed-off-by: Vikas Manocha <vikas.manocha@st.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
---
arch/arm/dts/stm32f7-u-boot.dtsi | 24 ++++++++++++++++++++++++
1 file changed, 24 insertions(+)
create mode 100644 arch/arm/dts/stm32f7-u-boot.dtsi
diff --git a/arch/arm/dts/stm32f7-u-boot.dtsi b/arch/arm/dts/stm32f7-u-boot.dtsi
new file mode 100644
index 00000000000..5f77f578af8
--- /dev/null
+++ b/arch/arm/dts/stm32f7-u-boot.dtsi
@@ -0,0 +1,24 @@
+&pinctrl {
+ usart1_pins_a: usart1@0 {
+ u-boot,dm-pre-reloc;
+ pins1 {
+ u-boot,dm-pre-reloc;
+ };
+ pins2 {
+ u-boot,dm-pre-reloc;
+ };
+ };
+ fmc_pins: fmc@0 {
+ u-boot,dm-pre-reloc;
+ pins
+ {
+ u-boot,dm-pre-reloc;
+ };
+ };
+};
+
+&fmc {
+ bank1: bank@0 {
+ u-boot,dm-pre-reloc;
+ };
+};
--
GitLab
From 17c5fb195376f5883b7f0fdfbf19e42e3be7de43 Mon Sep 17 00:00:00 2001
From: "maxims@google.com" <maxims@google.com>
Date: Mon, 17 Apr 2017 12:00:20 -0700
Subject: [PATCH 257/282] aspeed: Update ast2500 Device Tree
Pull in the Device Tree for ast2500 from the mainline Linux kernel.
The file is copied from
https://raw.githubusercontent.com/torvalds/linux/34ea5c9d/arch/arm/boot/dts/aspeed-g5.dtsi
Signed-off-by: Maxim Sloyko <maxims@google.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
---
arch/arm/dts/ast2500.dtsi | 881 +++++++++++++++++++++++++++++++++++++-
1 file changed, 880 insertions(+), 1 deletion(-)
diff --git a/arch/arm/dts/ast2500.dtsi b/arch/arm/dts/ast2500.dtsi
index 97fac69d11f..7e0ad3a41ac 100644
--- a/arch/arm/dts/ast2500.dtsi
+++ b/arch/arm/dts/ast2500.dtsi
@@ -1,6 +1,6 @@
/*
* This device tree is copied from
- * https://raw.githubusercontent.com/torvalds/linux/02440622/arch/arm/boot/dts/
+ * https://raw.githubusercontent.com/torvalds/linux/34ea5c9d/arch/arm/boot/dts/aspeed-g5.dtsi
*/
#include "skeleton.dtsi"
@@ -36,6 +36,22 @@
reg = <0x1e6c0080 0x80>;
};
+ mac0: ethernet@1e660000 {
+ compatible = "faraday,ftgmac100";
+ reg = <0x1e660000 0x180>;
+ interrupts = <2>;
+ no-hw-checksum;
+ status = "disabled";
+ };
+
+ mac1: ethernet@1e680000 {
+ compatible = "faraday,ftgmac100";
+ reg = <0x1e680000 0x180>;
+ interrupts = <3>;
+ no-hw-checksum;
+ status = "disabled";
+ };
+
apb {
compatible = "simple-bus";
#address-cells = <1>;
@@ -48,6 +64,822 @@
reg = <0x1e6e2070 0x04>;
};
+ syscon: syscon@1e6e2000 {
+ compatible = "aspeed,g5-scu", "syscon", "simple-mfd";
+ reg = <0x1e6e2000 0x1a8>;
+
+ pinctrl: pinctrl {
+ compatible = "aspeed,g5-pinctrl";
+ aspeed,external-nodes = <&gfx &lhc>;
+
+ pinctrl_acpi_default: acpi_default {
+ function = "ACPI";
+ groups = "ACPI";
+ };
+
+ pinctrl_adc0_default: adc0_default {
+ function = "ADC0";
+ groups = "ADC0";
+ };
+
+ pinctrl_adc1_default: adc1_default {
+ function = "ADC1";
+ groups = "ADC1";
+ };
+
+ pinctrl_adc10_default: adc10_default {
+ function = "ADC10";
+ groups = "ADC10";
+ };
+
+ pinctrl_adc11_default: adc11_default {
+ function = "ADC11";
+ groups = "ADC11";
+ };
+
+ pinctrl_adc12_default: adc12_default {
+ function = "ADC12";
+ groups = "ADC12";
+ };
+
+ pinctrl_adc13_default: adc13_default {
+ function = "ADC13";
+ groups = "ADC13";
+ };
+
+ pinctrl_adc14_default: adc14_default {
+ function = "ADC14";
+ groups = "ADC14";
+ };
+
+ pinctrl_adc15_default: adc15_default {
+ function = "ADC15";
+ groups = "ADC15";
+ };
+
+ pinctrl_adc2_default: adc2_default {
+ function = "ADC2";
+ groups = "ADC2";
+ };
+
+ pinctrl_adc3_default: adc3_default {
+ function = "ADC3";
+ groups = "ADC3";
+ };
+
+ pinctrl_adc4_default: adc4_default {
+ function = "ADC4";
+ groups = "ADC4";
+ };
+
+ pinctrl_adc5_default: adc5_default {
+ function = "ADC5";
+ groups = "ADC5";
+ };
+
+ pinctrl_adc6_default: adc6_default {
+ function = "ADC6";
+ groups = "ADC6";
+ };
+
+ pinctrl_adc7_default: adc7_default {
+ function = "ADC7";
+ groups = "ADC7";
+ };
+
+ pinctrl_adc8_default: adc8_default {
+ function = "ADC8";
+ groups = "ADC8";
+ };
+
+ pinctrl_adc9_default: adc9_default {
+ function = "ADC9";
+ groups = "ADC9";
+ };
+
+ pinctrl_bmcint_default: bmcint_default {
+ function = "BMCINT";
+ groups = "BMCINT";
+ };
+
+ pinctrl_ddcclk_default: ddcclk_default {
+ function = "DDCCLK";
+ groups = "DDCCLK";
+ };
+
+ pinctrl_ddcdat_default: ddcdat_default {
+ function = "DDCDAT";
+ groups = "DDCDAT";
+ };
+
+ pinctrl_espi_default: espi_default {
+ function = "ESPI";
+ groups = "ESPI";
+ };
+
+ pinctrl_fwspics1_default: fwspics1_default {
+ function = "FWSPICS1";
+ groups = "FWSPICS1";
+ };
+
+ pinctrl_fwspics2_default: fwspics2_default {
+ function = "FWSPICS2";
+ groups = "FWSPICS2";
+ };
+
+ pinctrl_gpid0_default: gpid0_default {
+ function = "GPID0";
+ groups = "GPID0";
+ };
+
+ pinctrl_gpid2_default: gpid2_default {
+ function = "GPID2";
+ groups = "GPID2";
+ };
+
+ pinctrl_gpid4_default: gpid4_default {
+ function = "GPID4";
+ groups = "GPID4";
+ };
+
+ pinctrl_gpid6_default: gpid6_default {
+ function = "GPID6";
+ groups = "GPID6";
+ };
+
+ pinctrl_gpie0_default: gpie0_default {
+ function = "GPIE0";
+ groups = "GPIE0";
+ };
+
+ pinctrl_gpie2_default: gpie2_default {
+ function = "GPIE2";
+ groups = "GPIE2";
+ };
+
+ pinctrl_gpie4_default: gpie4_default {
+ function = "GPIE4";
+ groups = "GPIE4";
+ };
+
+ pinctrl_gpie6_default: gpie6_default {
+ function = "GPIE6";
+ groups = "GPIE6";
+ };
+
+ pinctrl_i2c10_default: i2c10_default {
+ function = "I2C10";
+ groups = "I2C10";
+ };
+
+ pinctrl_i2c11_default: i2c11_default {
+ function = "I2C11";
+ groups = "I2C11";
+ };
+
+ pinctrl_i2c12_default: i2c12_default {
+ function = "I2C12";
+ groups = "I2C12";
+ };
+
+ pinctrl_i2c13_default: i2c13_default {
+ function = "I2C13";
+ groups = "I2C13";
+ };
+
+ pinctrl_i2c14_default: i2c14_default {
+ function = "I2C14";
+ groups = "I2C14";
+ };
+
+ pinctrl_i2c3_default: i2c3_default {
+ function = "I2C3";
+ groups = "I2C3";
+ };
+
+ pinctrl_i2c4_default: i2c4_default {
+ function = "I2C4";
+ groups = "I2C4";
+ };
+
+ pinctrl_i2c5_default: i2c5_default {
+ function = "I2C5";
+ groups = "I2C5";
+ };
+
+ pinctrl_i2c6_default: i2c6_default {
+ function = "I2C6";
+ groups = "I2C6";
+ };
+
+ pinctrl_i2c7_default: i2c7_default {
+ function = "I2C7";
+ groups = "I2C7";
+ };
+
+ pinctrl_i2c8_default: i2c8_default {
+ function = "I2C8";
+ groups = "I2C8";
+ };
+
+ pinctrl_i2c9_default: i2c9_default {
+ function = "I2C9";
+ groups = "I2C9";
+ };
+
+ pinctrl_lad0_default: lad0_default {
+ function = "LAD0";
+ groups = "LAD0";
+ };
+
+ pinctrl_lad1_default: lad1_default {
+ function = "LAD1";
+ groups = "LAD1";
+ };
+
+ pinctrl_lad2_default: lad2_default {
+ function = "LAD2";
+ groups = "LAD2";
+ };
+
+ pinctrl_lad3_default: lad3_default {
+ function = "LAD3";
+ groups = "LAD3";
+ };
+
+ pinctrl_lclk_default: lclk_default {
+ function = "LCLK";
+ groups = "LCLK";
+ };
+
+ pinctrl_lframe_default: lframe_default {
+ function = "LFRAME";
+ groups = "LFRAME";
+ };
+
+ pinctrl_lpchc_default: lpchc_default {
+ function = "LPCHC";
+ groups = "LPCHC";
+ };
+
+ pinctrl_lpcpd_default: lpcpd_default {
+ function = "LPCPD";
+ groups = "LPCPD";
+ };
+
+ pinctrl_lpcplus_default: lpcplus_default {
+ function = "LPCPLUS";
+ groups = "LPCPLUS";
+ };
+
+ pinctrl_lpcpme_default: lpcpme_default {
+ function = "LPCPME";
+ groups = "LPCPME";
+ };
+
+ pinctrl_lpcrst_default: lpcrst_default {
+ function = "LPCRST";
+ groups = "LPCRST";
+ };
+
+ pinctrl_lpcsmi_default: lpcsmi_default {
+ function = "LPCSMI";
+ groups = "LPCSMI";
+ };
+
+ pinctrl_lsirq_default: lsirq_default {
+ function = "LSIRQ";
+ groups = "LSIRQ";
+ };
+
+ pinctrl_mac1link_default: mac1link_default {
+ function = "MAC1LINK";
+ groups = "MAC1LINK";
+ };
+
+ pinctrl_mac2link_default: mac2link_default {
+ function = "MAC2LINK";
+ groups = "MAC2LINK";
+ };
+
+ pinctrl_mdio1_default: mdio1_default {
+ function = "MDIO1";
+ groups = "MDIO1";
+ };
+
+ pinctrl_mdio2_default: mdio2_default {
+ function = "MDIO2";
+ groups = "MDIO2";
+ };
+
+ pinctrl_ncts1_default: ncts1_default {
+ function = "NCTS1";
+ groups = "NCTS1";
+ };
+
+ pinctrl_ncts2_default: ncts2_default {
+ function = "NCTS2";
+ groups = "NCTS2";
+ };
+
+ pinctrl_ncts3_default: ncts3_default {
+ function = "NCTS3";
+ groups = "NCTS3";
+ };
+
+ pinctrl_ncts4_default: ncts4_default {
+ function = "NCTS4";
+ groups = "NCTS4";
+ };
+
+ pinctrl_ndcd1_default: ndcd1_default {
+ function = "NDCD1";
+ groups = "NDCD1";
+ };
+
+ pinctrl_ndcd2_default: ndcd2_default {
+ function = "NDCD2";
+ groups = "NDCD2";
+ };
+
+ pinctrl_ndcd3_default: ndcd3_default {
+ function = "NDCD3";
+ groups = "NDCD3";
+ };
+
+ pinctrl_ndcd4_default: ndcd4_default {
+ function = "NDCD4";
+ groups = "NDCD4";
+ };
+
+ pinctrl_ndsr1_default: ndsr1_default {
+ function = "NDSR1";
+ groups = "NDSR1";
+ };
+
+ pinctrl_ndsr2_default: ndsr2_default {
+ function = "NDSR2";
+ groups = "NDSR2";
+ };
+
+ pinctrl_ndsr3_default: ndsr3_default {
+ function = "NDSR3";
+ groups = "NDSR3";
+ };
+
+ pinctrl_ndsr4_default: ndsr4_default {
+ function = "NDSR4";
+ groups = "NDSR4";
+ };
+
+ pinctrl_ndtr1_default: ndtr1_default {
+ function = "NDTR1";
+ groups = "NDTR1";
+ };
+
+ pinctrl_ndtr2_default: ndtr2_default {
+ function = "NDTR2";
+ groups = "NDTR2";
+ };
+
+ pinctrl_ndtr3_default: ndtr3_default {
+ function = "NDTR3";
+ groups = "NDTR3";
+ };
+
+ pinctrl_ndtr4_default: ndtr4_default {
+ function = "NDTR4";
+ groups = "NDTR4";
+ };
+
+ pinctrl_nri1_default: nri1_default {
+ function = "NRI1";
+ groups = "NRI1";
+ };
+
+ pinctrl_nri2_default: nri2_default {
+ function = "NRI2";
+ groups = "NRI2";
+ };
+
+ pinctrl_nri3_default: nri3_default {
+ function = "NRI3";
+ groups = "NRI3";
+ };
+
+ pinctrl_nri4_default: nri4_default {
+ function = "NRI4";
+ groups = "NRI4";
+ };
+
+ pinctrl_nrts1_default: nrts1_default {
+ function = "NRTS1";
+ groups = "NRTS1";
+ };
+
+ pinctrl_nrts2_default: nrts2_default {
+ function = "NRTS2";
+ groups = "NRTS2";
+ };
+
+ pinctrl_nrts3_default: nrts3_default {
+ function = "NRTS3";
+ groups = "NRTS3";
+ };
+
+ pinctrl_nrts4_default: nrts4_default {
+ function = "NRTS4";
+ groups = "NRTS4";
+ };
+
+ pinctrl_oscclk_default: oscclk_default {
+ function = "OSCCLK";
+ groups = "OSCCLK";
+ };
+
+ pinctrl_pewake_default: pewake_default {
+ function = "PEWAKE";
+ groups = "PEWAKE";
+ };
+
+ pinctrl_pnor_default: pnor_default {
+ function = "PNOR";
+ groups = "PNOR";
+ };
+
+ pinctrl_pwm0_default: pwm0_default {
+ function = "PWM0";
+ groups = "PWM0";
+ };
+
+ pinctrl_pwm1_default: pwm1_default {
+ function = "PWM1";
+ groups = "PWM1";
+ };
+
+ pinctrl_pwm2_default: pwm2_default {
+ function = "PWM2";
+ groups = "PWM2";
+ };
+
+ pinctrl_pwm3_default: pwm3_default {
+ function = "PWM3";
+ groups = "PWM3";
+ };
+
+ pinctrl_pwm4_default: pwm4_default {
+ function = "PWM4";
+ groups = "PWM4";
+ };
+
+ pinctrl_pwm5_default: pwm5_default {
+ function = "PWM5";
+ groups = "PWM5";
+ };
+
+ pinctrl_pwm6_default: pwm6_default {
+ function = "PWM6";
+ groups = "PWM6";
+ };
+
+ pinctrl_pwm7_default: pwm7_default {
+ function = "PWM7";
+ groups = "PWM7";
+ };
+
+ pinctrl_rgmii1_default: rgmii1_default {
+ function = "RGMII1";
+ groups = "RGMII1";
+ };
+
+ pinctrl_rgmii2_default: rgmii2_default {
+ function = "RGMII2";
+ groups = "RGMII2";
+ };
+
+ pinctrl_rmii1_default: rmii1_default {
+ function = "RMII1";
+ groups = "RMII1";
+ };
+
+ pinctrl_rmii2_default: rmii2_default {
+ function = "RMII2";
+ groups = "RMII2";
+ };
+
+ pinctrl_rxd1_default: rxd1_default {
+ function = "RXD1";
+ groups = "RXD1";
+ };
+
+ pinctrl_rxd2_default: rxd2_default {
+ function = "RXD2";
+ groups = "RXD2";
+ };
+
+ pinctrl_rxd3_default: rxd3_default {
+ function = "RXD3";
+ groups = "RXD3";
+ };
+
+ pinctrl_rxd4_default: rxd4_default {
+ function = "RXD4";
+ groups = "RXD4";
+ };
+
+ pinctrl_salt1_default: salt1_default {
+ function = "SALT1";
+ groups = "SALT1";
+ };
+
+ pinctrl_salt10_default: salt10_default {
+ function = "SALT10";
+ groups = "SALT10";
+ };
+
+ pinctrl_salt11_default: salt11_default {
+ function = "SALT11";
+ groups = "SALT11";
+ };
+
+ pinctrl_salt12_default: salt12_default {
+ function = "SALT12";
+ groups = "SALT12";
+ };
+
+ pinctrl_salt13_default: salt13_default {
+ function = "SALT13";
+ groups = "SALT13";
+ };
+
+ pinctrl_salt14_default: salt14_default {
+ function = "SALT14";
+ groups = "SALT14";
+ };
+
+ pinctrl_salt2_default: salt2_default {
+ function = "SALT2";
+ groups = "SALT2";
+ };
+
+ pinctrl_salt3_default: salt3_default {
+ function = "SALT3";
+ groups = "SALT3";
+ };
+
+ pinctrl_salt4_default: salt4_default {
+ function = "SALT4";
+ groups = "SALT4";
+ };
+
+ pinctrl_salt5_default: salt5_default {
+ function = "SALT5";
+ groups = "SALT5";
+ };
+
+ pinctrl_salt6_default: salt6_default {
+ function = "SALT6";
+ groups = "SALT6";
+ };
+
+ pinctrl_salt7_default: salt7_default {
+ function = "SALT7";
+ groups = "SALT7";
+ };
+
+ pinctrl_salt8_default: salt8_default {
+ function = "SALT8";
+ groups = "SALT8";
+ };
+
+ pinctrl_salt9_default: salt9_default {
+ function = "SALT9";
+ groups = "SALT9";
+ };
+
+ pinctrl_scl1_default: scl1_default {
+ function = "SCL1";
+ groups = "SCL1";
+ };
+
+ pinctrl_scl2_default: scl2_default {
+ function = "SCL2";
+ groups = "SCL2";
+ };
+
+ pinctrl_sd1_default: sd1_default {
+ function = "SD1";
+ groups = "SD1";
+ };
+
+ pinctrl_sd2_default: sd2_default {
+ function = "SD2";
+ groups = "SD2";
+ };
+
+ pinctrl_sda1_default: sda1_default {
+ function = "SDA1";
+ groups = "SDA1";
+ };
+
+ pinctrl_sda2_default: sda2_default {
+ function = "SDA2";
+ groups = "SDA2";
+ };
+
+ pinctrl_sgps1_default: sgps1_default {
+ function = "SGPS1";
+ groups = "SGPS1";
+ };
+
+ pinctrl_sgps2_default: sgps2_default {
+ function = "SGPS2";
+ groups = "SGPS2";
+ };
+
+ pinctrl_sioonctrl_default: sioonctrl_default {
+ function = "SIOONCTRL";
+ groups = "SIOONCTRL";
+ };
+
+ pinctrl_siopbi_default: siopbi_default {
+ function = "SIOPBI";
+ groups = "SIOPBI";
+ };
+
+ pinctrl_siopbo_default: siopbo_default {
+ function = "SIOPBO";
+ groups = "SIOPBO";
+ };
+
+ pinctrl_siopwreq_default: siopwreq_default {
+ function = "SIOPWREQ";
+ groups = "SIOPWREQ";
+ };
+
+ pinctrl_siopwrgd_default: siopwrgd_default {
+ function = "SIOPWRGD";
+ groups = "SIOPWRGD";
+ };
+
+ pinctrl_sios3_default: sios3_default {
+ function = "SIOS3";
+ groups = "SIOS3";
+ };
+
+ pinctrl_sios5_default: sios5_default {
+ function = "SIOS5";
+ groups = "SIOS5";
+ };
+
+ pinctrl_siosci_default: siosci_default {
+ function = "SIOSCI";
+ groups = "SIOSCI";
+ };
+
+ pinctrl_spi1_default: spi1_default {
+ function = "SPI1";
+ groups = "SPI1";
+ };
+
+ pinctrl_spi1cs1_default: spi1cs1_default {
+ function = "SPI1CS1";
+ groups = "SPI1CS1";
+ };
+
+ pinctrl_spi1debug_default: spi1debug_default {
+ function = "SPI1DEBUG";
+ groups = "SPI1DEBUG";
+ };
+
+ pinctrl_spi1passthru_default: spi1passthru_default {
+ function = "SPI1PASSTHRU";
+ groups = "SPI1PASSTHRU";
+ };
+
+ pinctrl_spi2ck_default: spi2ck_default {
+ function = "SPI2CK";
+ groups = "SPI2CK";
+ };
+
+ pinctrl_spi2cs0_default: spi2cs0_default {
+ function = "SPI2CS0";
+ groups = "SPI2CS0";
+ };
+
+ pinctrl_spi2cs1_default: spi2cs1_default {
+ function = "SPI2CS1";
+ groups = "SPI2CS1";
+ };
+
+ pinctrl_spi2miso_default: spi2miso_default {
+ function = "SPI2MISO";
+ groups = "SPI2MISO";
+ };
+
+ pinctrl_spi2mosi_default: spi2mosi_default {
+ function = "SPI2MOSI";
+ groups = "SPI2MOSI";
+ };
+
+ pinctrl_timer3_default: timer3_default {
+ function = "TIMER3";
+ groups = "TIMER3";
+ };
+
+ pinctrl_timer4_default: timer4_default {
+ function = "TIMER4";
+ groups = "TIMER4";
+ };
+
+ pinctrl_timer5_default: timer5_default {
+ function = "TIMER5";
+ groups = "TIMER5";
+ };
+
+ pinctrl_timer6_default: timer6_default {
+ function = "TIMER6";
+ groups = "TIMER6";
+ };
+
+ pinctrl_timer7_default: timer7_default {
+ function = "TIMER7";
+ groups = "TIMER7";
+ };
+
+ pinctrl_timer8_default: timer8_default {
+ function = "TIMER8";
+ groups = "TIMER8";
+ };
+
+ pinctrl_txd1_default: txd1_default {
+ function = "TXD1";
+ groups = "TXD1";
+ };
+
+ pinctrl_txd2_default: txd2_default {
+ function = "TXD2";
+ groups = "TXD2";
+ };
+
+ pinctrl_txd3_default: txd3_default {
+ function = "TXD3";
+ groups = "TXD3";
+ };
+
+ pinctrl_txd4_default: txd4_default {
+ function = "TXD4";
+ groups = "TXD4";
+ };
+
+ pinctrl_uart6_default: uart6_default {
+ function = "UART6";
+ groups = "UART6";
+ };
+
+ pinctrl_usbcki_default: usbcki_default {
+ function = "USBCKI";
+ groups = "USBCKI";
+ };
+
+ pinctrl_vgabiosrom_default: vgabiosrom_default {
+ function = "VGABIOSROM";
+ groups = "VGABIOSROM";
+ };
+
+ pinctrl_vgahs_default: vgahs_default {
+ function = "VGAHS";
+ groups = "VGAHS";
+ };
+
+ pinctrl_vgavs_default: vgavs_default {
+ function = "VGAVS";
+ groups = "VGAVS";
+ };
+
+ pinctrl_vpi24_default: vpi24_default {
+ function = "VPI24";
+ groups = "VPI24";
+ };
+
+ pinctrl_vpo_default: vpo_default {
+ function = "VPO";
+ groups = "VPO";
+ };
+
+ pinctrl_wdtrst1_default: wdtrst1_default {
+ function = "WDTRST1";
+ groups = "WDTRST1";
+ };
+
+ pinctrl_wdtrst2_default: wdtrst2_default {
+ function = "WDTRST2";
+ groups = "WDTRST2";
+ };
+
+ };
+ };
+
clk_hpll: clk_hpll@1e6e2024 {
#clock-cells = <0>;
compatible = "aspeed,g5-hpll-clock";
@@ -75,11 +907,27 @@
reg = <0x1e6e202c 0x4>;
};
+ gfx: display@1e6e6000 {
+ compatible = "aspeed,ast2500-gfx", "syscon";
+ reg = <0x1e6e6000 0x1000>;
+ reg-io-width = <4>;
+ };
+
sram@1e720000 {
compatible = "mmio-sram";
reg = <0x1e720000 0x9000>; // 36K
};
+ gpio: gpio@1e780000 {
+ #gpio-cells = <2>;
+ gpio-controller;
+ compatible = "aspeed,ast2500-gpio";
+ reg = <0x1e780000 0x1000>;
+ interrupts = <20>;
+ gpio-ranges = <&pinctrl 0 0 220>;
+ interrupt-controller;
+ };
+
timer: timer@1e782000 {
compatible = "aspeed,ast2400-timer";
reg = <0x1e782000 0x90>;
@@ -90,6 +938,7 @@
clocks = <&clk_apb>;
};
+
wdt1: wdt@1e785000 {
compatible = "aspeed,wdt";
reg = <0x1e785000 0x1c>;
@@ -119,6 +968,36 @@
status = "disabled";
};
+ lpc: lpc@1e789000 {
+ compatible = "aspeed,ast2500-lpc", "simple-mfd";
+ reg = <0x1e789000 0x1000>;
+
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0 0x1e789000 0x1000>;
+
+ lpc_bmc: lpc-bmc@0 {
+ compatible = "aspeed,ast2500-lpc-bmc";
+ reg = <0x0 0x80>;
+ };
+
+ lpc_host: lpc-host@80 {
+ compatible = "aspeed,ast2500-lpc-host", "simple-mfd", "syscon";
+ reg = <0x80 0x1e0>;
+
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0 0x80 0x1e0>;
+
+ reg-io-width = <4>;
+
+ lhc: lhc@20 {
+ compatible = "aspeed,ast2500-lhc";
+ reg = <0x20 0x24 0x48 0x8>;
+ };
+ };
+ };
+
uart2: serial@1e78d000 {
compatible = "ns16550a";
reg = <0x1e78d000 0x1000>;
--
GitLab
From 0753bc2d30d7ca4a0ea4ef7f97083961c3a9d0e0 Mon Sep 17 00:00:00 2001
From: "maxims@google.com" <maxims@google.com>
Date: Mon, 17 Apr 2017 12:00:21 -0700
Subject: [PATCH 258/282] dm: Simple Watchdog uclass
This is a simple uclass for Watchdog Timers. It has four operations:
start, restart, reset, stop. Drivers must implement start, restart and
stop operations, while implementing reset is optional: It's default
implementation expires watchdog timer in one clock tick.
Signed-off-by: Maxim Sloyko <maxims@google.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
---
arch/sandbox/dts/test.dts | 4 ++
arch/sandbox/include/asm/state.h | 9 +++
configs/sandbox_defconfig | 2 +
drivers/watchdog/Kconfig | 20 +++++-
drivers/watchdog/Makefile | 2 +
drivers/watchdog/sandbox_wdt.c | 76 ++++++++++++++++++++++
drivers/watchdog/wdt-uclass.c | 72 +++++++++++++++++++++
include/dm/uclass-id.h | 1 +
include/wdt.h | 107 +++++++++++++++++++++++++++++++
test/dm/Makefile | 1 +
test/dm/wdt.c | 40 ++++++++++++
11 files changed, 333 insertions(+), 1 deletion(-)
create mode 100644 drivers/watchdog/sandbox_wdt.c
create mode 100644 drivers/watchdog/wdt-uclass.c
create mode 100644 include/wdt.h
create mode 100644 test/dm/wdt.c
diff --git a/arch/sandbox/dts/test.dts b/arch/sandbox/dts/test.dts
index 50bcdebf74d..094c5aaf61a 100644
--- a/arch/sandbox/dts/test.dts
+++ b/arch/sandbox/dts/test.dts
@@ -426,6 +426,10 @@
};
};
};
+
+ wdt0: wdt@0 {
+ compatible = "sandbox,wdt";
+ };
};
#include "sandbox_pmic.dtsi"
diff --git a/arch/sandbox/include/asm/state.h b/arch/sandbox/include/asm/state.h
index 149f28d8732..987cc7b49dc 100644
--- a/arch/sandbox/include/asm/state.h
+++ b/arch/sandbox/include/asm/state.h
@@ -39,6 +39,12 @@ struct sandbox_spi_info {
struct udevice *emul;
};
+struct sandbox_wdt_info {
+ unsigned long long counter;
+ uint reset_count;
+ bool running;
+};
+
/* The complete state of the test system */
struct sandbox_state {
const char *cmd; /* Command to execute */
@@ -69,6 +75,9 @@ struct sandbox_state {
/* Pointer to information for each SPI bus/cs */
struct sandbox_spi_info spi[CONFIG_SANDBOX_SPI_MAX_BUS]
[CONFIG_SANDBOX_SPI_MAX_CS];
+
+ /* Information about Watchdog */
+ struct sandbox_wdt_info wdt;
};
/* Minimum space we guarantee in the state FDT when calling read/write*/
diff --git a/configs/sandbox_defconfig b/configs/sandbox_defconfig
index d3fee89f48c..64bb923c13a 100644
--- a/configs/sandbox_defconfig
+++ b/configs/sandbox_defconfig
@@ -180,3 +180,5 @@ CONFIG_UNIT_TEST=y
CONFIG_UT_TIME=y
CONFIG_UT_DM=y
CONFIG_UT_ENV=y
+CONFIG_WDT=y
+CONFIG_WDT_SANDBOX=y
diff --git a/drivers/watchdog/Kconfig b/drivers/watchdog/Kconfig
index dbdaafc1498..e8d2dba835c 100644
--- a/drivers/watchdog/Kconfig
+++ b/drivers/watchdog/Kconfig
@@ -1,8 +1,26 @@
-menu "WATCHDOG support"
+menu "Watchdog Timer Support"
config ULP_WATCHDOG
bool "i.MX7ULP watchdog"
help
Say Y here to enable i.MX7ULP watchdog driver.
+config WDT
+ bool "Enable driver model for watchdog timer drivers"
+ depends on DM
+ help
+ Enable driver model for watchdog timer. At the moment the API
+ is very simple and only supports four operations:
+ start, restart, stop and reset (expire immediately).
+ What exactly happens when the timer expires is up to a particular
+ device/driver.
+
+config WDT_SANDBOX
+ bool "Enable Watchdog Timer support for Sandbox"
+ depends on SANDBOX && WDT
+ help
+ Enable Watchdog Timer support in Sandbox. This is a dummy device that
+ can be probed and supports all of the methods of WDT, but does not
+ really do anything.
+
endmenu
diff --git a/drivers/watchdog/Makefile b/drivers/watchdog/Makefile
index 36745ca9c99..e891d648496 100644
--- a/drivers/watchdog/Makefile
+++ b/drivers/watchdog/Makefile
@@ -15,3 +15,5 @@ obj-$(CONFIG_XILINX_TB_WATCHDOG) += xilinx_tb_wdt.o
obj-$(CONFIG_OMAP_WATCHDOG) += omap_wdt.o
obj-$(CONFIG_DESIGNWARE_WATCHDOG) += designware_wdt.o
obj-$(CONFIG_ULP_WATCHDOG) += ulp_wdog.o
+obj-$(CONFIG_WDT) += wdt-uclass.o
+obj-$(CONFIG_WDT_SANDBOX) += sandbox_wdt.o
diff --git a/drivers/watchdog/sandbox_wdt.c b/drivers/watchdog/sandbox_wdt.c
new file mode 100644
index 00000000000..34d90bee7e8
--- /dev/null
+++ b/drivers/watchdog/sandbox_wdt.c
@@ -0,0 +1,76 @@
+/*
+ * Copyright 2017 Google, Inc
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include <common.h>
+#include <dm.h>
+#include <asm/state.h>
+#include <wdt.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+static int sandbox_wdt_start(struct udevice *dev, u64 timeout, ulong flags)
+{
+ struct sandbox_state *state = state_get_current();
+
+ state->wdt.counter = timeout;
+ state->wdt.running = true;
+
+ return 0;
+}
+
+static int sandbox_wdt_stop(struct udevice *dev)
+{
+ struct sandbox_state *state = state_get_current();
+
+ state->wdt.running = false;
+
+ return 0;
+}
+
+static int sandbox_wdt_reset(struct udevice *dev)
+{
+ struct sandbox_state *state = state_get_current();
+
+ state->wdt.reset_count++;
+
+ return 0;
+}
+
+static int sandbox_wdt_expire_now(struct udevice *dev, ulong flags)
+{
+ sandbox_wdt_start(dev, 1, flags);
+
+ return 0;
+}
+
+static int sandbox_wdt_probe(struct udevice *dev)
+{
+ struct sandbox_state *state = state_get_current();
+
+ memset(&state->wdt, 0, sizeof(state->wdt));
+
+ return 0;
+}
+
+static const struct wdt_ops sandbox_wdt_ops = {
+ .start = sandbox_wdt_start,
+ .reset = sandbox_wdt_reset,
+ .stop = sandbox_wdt_stop,
+ .expire_now = sandbox_wdt_expire_now,
+};
+
+static const struct udevice_id sandbox_wdt_ids[] = {
+ { .compatible = "sandbox,wdt" },
+ {}
+};
+
+U_BOOT_DRIVER(wdt_sandbox) = {
+ .name = "wdt_sandbox",
+ .id = UCLASS_WDT,
+ .of_match = sandbox_wdt_ids,
+ .ops = &sandbox_wdt_ops,
+ .probe = sandbox_wdt_probe,
+};
diff --git a/drivers/watchdog/wdt-uclass.c b/drivers/watchdog/wdt-uclass.c
new file mode 100644
index 00000000000..ab8a64c354a
--- /dev/null
+++ b/drivers/watchdog/wdt-uclass.c
@@ -0,0 +1,72 @@
+/*
+ * Copyright 2017 Google, Inc
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include <common.h>
+#include <dm.h>
+#include <errno.h>
+#include <wdt.h>
+#include <dm/device-internal.h>
+#include <dm/lists.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+int wdt_start(struct udevice *dev, u64 timeout, ulong flags)
+{
+ const struct wdt_ops *ops = device_get_ops(dev);
+
+ if (!ops->start)
+ return -ENOSYS;
+
+ return ops->start(dev, timeout, flags);
+}
+
+int wdt_stop(struct udevice *dev)
+{
+ const struct wdt_ops *ops = device_get_ops(dev);
+
+ if (!ops->stop)
+ return -ENOSYS;
+
+ return ops->stop(dev);
+}
+
+int wdt_reset(struct udevice *dev)
+{
+ const struct wdt_ops *ops = device_get_ops(dev);
+
+ if (!ops->reset)
+ return -ENOSYS;
+
+ return ops->reset(dev);
+}
+
+int wdt_expire_now(struct udevice *dev, ulong flags)
+{
+ int ret = 0;
+ const struct wdt_ops *ops;
+
+ debug("WDT Resettting: %lu\n", flags);
+ ops = device_get_ops(dev);
+ if (ops->expire_now) {
+ return ops->expire_now(dev, flags);
+ } else {
+ if (!ops->start)
+ return -ENOSYS;
+
+ ret = ops->start(dev, 1, flags);
+ if (ret < 0)
+ return ret;
+
+ hang();
+ }
+
+ return ret;
+}
+
+UCLASS_DRIVER(wdt) = {
+ .id = UCLASS_WDT,
+ .name = "wdt",
+};
diff --git a/include/dm/uclass-id.h b/include/dm/uclass-id.h
index 1b635e41103..4e7cc935bd2 100644
--- a/include/dm/uclass-id.h
+++ b/include/dm/uclass-id.h
@@ -84,6 +84,7 @@ enum uclass_id {
UCLASS_VIDEO, /* Video or LCD device */
UCLASS_VIDEO_BRIDGE, /* Video bridge, e.g. DisplayPort to LVDS */
UCLASS_VIDEO_CONSOLE, /* Text console driver for video device */
+ UCLASS_WDT, /* Watchdot Timer driver */
UCLASS_COUNT,
UCLASS_INVALID = -1,
diff --git a/include/wdt.h b/include/wdt.h
new file mode 100644
index 00000000000..0b5f05851a3
--- /dev/null
+++ b/include/wdt.h
@@ -0,0 +1,107 @@
+/*
+ * Copyright 2017 Google, Inc
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#ifndef _WDT_H_
+#define _WDT_H_
+
+/*
+ * Implement a simple watchdog uclass. Watchdog is basically a timer that
+ * is used to detect or recover from malfunction. During normal operation
+ * the watchdog would be regularly reset to prevent it from timing out.
+ * If, due to a hardware fault or program error, the computer fails to reset
+ * the watchdog, the timer will elapse and generate a timeout signal.
+ * The timeout signal is used to initiate corrective action or actions,
+ * which typically include placing the system in a safe, known state.
+ */
+
+/*
+ * Start the timer
+ *
+ * @dev: WDT Device
+ * @timeout: Number of ticks before timer expires
+ * @flags: Driver specific flags. This might be used to specify
+ * which action needs to be executed when the timer expires
+ * @return: 0 if OK, -ve on error
+ */
+int wdt_start(struct udevice *dev, u64 timeout, ulong flags);
+
+/*
+ * Stop the timer, thus disabling the Watchdog. Use wdt_start to start it again.
+ *
+ * @dev: WDT Device
+ * @return: 0 if OK, -ve on error
+ */
+int wdt_stop(struct udevice *dev);
+
+/*
+ * Reset the timer, typically restoring the counter to
+ * the value configured by start()
+ *
+ * @dev: WDT Device
+ * @return: 0 if OK, -ve on error
+ */
+int wdt_reset(struct udevice *dev);
+
+/*
+ * Expire the timer, thus executing its action immediately.
+ * This is typically used to reset the board or peripherals.
+ *
+ * @dev: WDT Device
+ * @flags: Driver specific flags
+ * @return 0 if OK -ve on error. If wdt action is system reset,
+ * this function may never return.
+ */
+int wdt_expire_now(struct udevice *dev, ulong flags);
+
+/*
+ * struct wdt_ops - Driver model wdt operations
+ *
+ * The uclass interface is implemented by all wdt devices which use
+ * driver model.
+ */
+struct wdt_ops {
+ /*
+ * Start the timer
+ *
+ * @dev: WDT Device
+ * @timeout: Number of ticks before the timer expires
+ * @flags: Driver specific flags. This might be used to specify
+ * which action needs to be executed when the timer expires
+ * @return: 0 if OK, -ve on error
+ */
+ int (*start)(struct udevice *dev, u64 timeout, ulong flags);
+ /*
+ * Stop the timer
+ *
+ * @dev: WDT Device
+ * @return: 0 if OK, -ve on error
+ */
+ int (*stop)(struct udevice *dev);
+ /*
+ * Reset the timer, typically restoring the counter to
+ * the value configured by start()
+ *
+ * @dev: WDT Device
+ * @return: 0 if OK, -ve on error
+ */
+ int (*reset)(struct udevice *dev);
+ /*
+ * Expire the timer, thus executing the action immediately (optional)
+ *
+ * If this function is not provided, a default implementation
+ * will be used, which sets the counter to 1
+ * and waits forever. This is good enough for system level
+ * reset, where the function is not expected to return, but might not be
+ * good enough for other use cases.
+ *
+ * @dev: WDT Device
+ * @flags: Driver specific flags
+ * @return 0 if OK -ve on error. May not return.
+ */
+ int (*expire_now)(struct udevice *dev, ulong flags);
+};
+
+#endif /* _WDT_H_ */
diff --git a/test/dm/Makefile b/test/dm/Makefile
index e956915bc3d..b15f1d0535a 100644
--- a/test/dm/Makefile
+++ b/test/dm/Makefile
@@ -42,4 +42,5 @@ obj-$(CONFIG_TIMER) += timer.o
obj-$(CONFIG_DM_VIDEO) += video.o
obj-$(CONFIG_ADC) += adc.o
obj-$(CONFIG_SPMI) += spmi.o
+obj-$(CONFIG_WDT) += wdt.o
endif
diff --git a/test/dm/wdt.c b/test/dm/wdt.c
new file mode 100644
index 00000000000..2ecfceaaff9
--- /dev/null
+++ b/test/dm/wdt.c
@@ -0,0 +1,40 @@
+/*
+ * Copyright 2017 Google, Inc
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include <common.h>
+#include <dm.h>
+#include <wdt.h>
+#include <asm/state.h>
+#include <asm/test.h>
+#include <dm/test.h>
+#include <test/ut.h>
+
+/* Test that watchdog driver functions are called */
+static int dm_test_wdt_base(struct unit_test_state *uts)
+{
+ struct sandbox_state *state = state_get_current();
+ struct udevice *dev;
+ const u64 timeout = 42;
+
+ ut_assertok(uclass_get_device(UCLASS_WDT, 0, &dev));
+ ut_asserteq(0, state->wdt.counter);
+ ut_asserteq(false, state->wdt.running);
+
+ ut_assertok(wdt_start(dev, timeout, 0));
+ ut_asserteq(timeout, state->wdt.counter);
+ ut_asserteq(true, state->wdt.running);
+
+ uint reset_count = state->wdt.reset_count;
+ ut_assertok(wdt_reset(dev));
+ ut_asserteq(reset_count + 1, state->wdt.reset_count);
+ ut_asserteq(true, state->wdt.running);
+
+ ut_assertok(wdt_stop(dev));
+ ut_asserteq(false, state->wdt.running);
+
+ return 0;
+}
+DM_TEST(dm_test_wdt_base, DM_TESTF_SCAN_PDATA | DM_TESTF_SCAN_FDT);
--
GitLab
From 1eb0a464b7434175800c98a175909588d38c1dae Mon Sep 17 00:00:00 2001
From: "maxims@google.com" <maxims@google.com>
Date: Mon, 17 Apr 2017 12:00:22 -0700
Subject: [PATCH 259/282] aspeed: Watchdog Timer Driver
This driver supports ast2500 and ast2400 SoCs.
Only ast2500 supports reset_mask and thus the option of resettting
individual peripherals using WDT.
Signed-off-by: Maxim Sloyko <maxims@google.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
---
arch/arm/include/asm/arch-aspeed/wdt.h | 53 ++++++++++-
arch/arm/mach-aspeed/ast_wdt.c | 40 ++++++--
drivers/watchdog/Kconfig | 11 +++
drivers/watchdog/Makefile | 1 +
drivers/watchdog/ast_wdt.c | 125 +++++++++++++++++++++++++
5 files changed, 217 insertions(+), 13 deletions(-)
create mode 100644 drivers/watchdog/ast_wdt.c
diff --git a/arch/arm/include/asm/arch-aspeed/wdt.h b/arch/arm/include/asm/arch-aspeed/wdt.h
index b292a0e67b5..981fa05a567 100644
--- a/arch/arm/include/asm/arch-aspeed/wdt.h
+++ b/arch/arm/include/asm/arch-aspeed/wdt.h
@@ -67,15 +67,60 @@ struct ast_wdt {
u32 timeout_status;
u32 clr_timeout_status;
u32 reset_width;
-#ifdef CONFIG_ASPEED_AST2500
+ /* On pre-ast2500 SoCs this register is reserved. */
u32 reset_mask;
-#else
- u32 reserved0;
-#endif
};
+/**
+ * Given flags parameter passed to wdt_reset or wdt_start uclass functions,
+ * gets Reset Mode value from it.
+ *
+ * @flags: flags parameter passed into wdt_reset or wdt_start
+ * @return Reset Mode value
+ */
+u32 ast_reset_mode_from_flags(ulong flags);
+
+/**
+ * Given flags parameter passed to wdt_reset or wdt_start uclass functions,
+ * gets Reset Mask value from it. Reset Mask is only supported on ast2500
+ *
+ * @flags: flags parameter passed into wdt_reset or wdt_start
+ * @return Reset Mask value
+ */
+u32 ast_reset_mask_from_flags(ulong flags);
+
+/**
+ * Given Reset Mask and Reset Mode values, converts them to flags,
+ * suitable for passing into wdt_start or wdt_reset uclass functions.
+ *
+ * On ast2500 Reset Mask is 25 bits wide and Reset Mode is 2 bits wide, so they
+ * can both be packed into single 32 bits wide value.
+ *
+ * @reset_mode: Reset Mode
+ * @reset_mask: Reset Mask
+ */
+ulong ast_flags_from_reset_mode_mask(u32 reset_mode, u32 reset_mask);
+
+#ifndef CONFIG_WDT
+/**
+ * Stop WDT
+ *
+ * @wdt: watchdog to stop
+ *
+ * When using driver model this function has different signature
+ */
void wdt_stop(struct ast_wdt *wdt);
+
+/**
+ * Stop WDT
+ *
+ * @wdt: watchdog to start
+ * @timeout watchdog timeout in number of clock ticks
+ *
+ * When using driver model this function has different signature
+ */
void wdt_start(struct ast_wdt *wdt, u32 timeout);
+#endif /* CONFIG_WDT */
/**
* Reset peripherals specified by mask
diff --git a/arch/arm/mach-aspeed/ast_wdt.c b/arch/arm/mach-aspeed/ast_wdt.c
index 22481ab7ea1..895fba3366c 100644
--- a/arch/arm/mach-aspeed/ast_wdt.c
+++ b/arch/arm/mach-aspeed/ast_wdt.c
@@ -9,6 +9,27 @@
#include <asm/arch/wdt.h>
#include <linux/err.h>
+u32 ast_reset_mode_from_flags(ulong flags)
+{
+ return flags & WDT_CTRL_RESET_MASK;
+}
+
+u32 ast_reset_mask_from_flags(ulong flags)
+{
+ return flags >> 2;
+}
+
+ulong ast_flags_from_reset_mode_mask(u32 reset_mode, u32 reset_mask)
+{
+ ulong ret = reset_mode & WDT_CTRL_RESET_MASK;
+
+ if (ret == WDT_CTRL_RESET_SOC)
+ ret |= (reset_mask << 2);
+
+ return ret;
+}
+
+#ifndef CONFIG_WDT
void wdt_stop(struct ast_wdt *wdt)
{
clrbits_le32(&wdt->ctrl, WDT_CTRL_EN);
@@ -26,15 +47,7 @@ void wdt_start(struct ast_wdt *wdt, u32 timeout)
setbits_le32(&wdt->ctrl,
WDT_CTRL_EN | WDT_CTRL_RESET | WDT_CTRL_CLK1MHZ);
}
-
-struct ast_wdt *ast_get_wdt(u8 wdt_number)
-{
- if (wdt_number > CONFIG_WDT_NUM - 1)
- return ERR_PTR(-EINVAL);
-
- return (struct ast_wdt *)(WDT_BASE +
- sizeof(struct ast_wdt) * wdt_number);
-}
+#endif /* CONFIG_WDT */
int ast_wdt_reset_masked(struct ast_wdt *wdt, u32 mask)
{
@@ -57,3 +70,12 @@ int ast_wdt_reset_masked(struct ast_wdt *wdt, u32 mask)
return -EINVAL;
#endif
}
+
+struct ast_wdt *ast_get_wdt(u8 wdt_number)
+{
+ if (wdt_number > CONFIG_WDT_NUM - 1)
+ return ERR_PTR(-EINVAL);
+
+ return (struct ast_wdt *)(WDT_BASE +
+ sizeof(struct ast_wdt) * wdt_number);
+}
diff --git a/drivers/watchdog/Kconfig b/drivers/watchdog/Kconfig
index e8d2dba835c..2034e3c620f 100644
--- a/drivers/watchdog/Kconfig
+++ b/drivers/watchdog/Kconfig
@@ -23,4 +23,15 @@ config WDT_SANDBOX
can be probed and supports all of the methods of WDT, but does not
really do anything.
+config WDT_ASPEED
+ bool "Aspeed ast2400/ast2500 watchdog timer support"
+ depends on WDT
+ default y if ARCH_ASPEED
+ help
+ Select this to enable watchdog timer for Aspeed ast2500/ast2400 devices.
+ The watchdog timer is stopped when initialized. It performs reset, either
+ full SoC reset or CPU or just some peripherals, based on the flags.
+ It currently does not support Boot Flash Addressing Mode Detection or
+ Second Boot.
+
endmenu
diff --git a/drivers/watchdog/Makefile b/drivers/watchdog/Makefile
index e891d648496..dfc7fbda4ab 100644
--- a/drivers/watchdog/Makefile
+++ b/drivers/watchdog/Makefile
@@ -17,3 +17,4 @@ obj-$(CONFIG_DESIGNWARE_WATCHDOG) += designware_wdt.o
obj-$(CONFIG_ULP_WATCHDOG) += ulp_wdog.o
obj-$(CONFIG_WDT) += wdt-uclass.o
obj-$(CONFIG_WDT_SANDBOX) += sandbox_wdt.o
+obj-$(CONFIG_WDT_ASPEED) += ast_wdt.o
diff --git a/drivers/watchdog/ast_wdt.c b/drivers/watchdog/ast_wdt.c
new file mode 100644
index 00000000000..b2bd912ad53
--- /dev/null
+++ b/drivers/watchdog/ast_wdt.c
@@ -0,0 +1,125 @@
+/*
+ * Copyright 2017 Google, Inc
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include <common.h>
+#include <dm.h>
+#include <errno.h>
+#include <wdt.h>
+#include <asm/io.h>
+#include <asm/arch/wdt.h>
+
+#define WDT_AST2500 2500
+#define WDT_AST2400 2400
+
+DECLARE_GLOBAL_DATA_PTR;
+
+struct ast_wdt_priv {
+ struct ast_wdt *regs;
+};
+
+static int ast_wdt_start(struct udevice *dev, u64 timeout, ulong flags)
+{
+ struct ast_wdt_priv *priv = dev_get_priv(dev);
+ ulong driver_data = dev_get_driver_data(dev);
+ u32 reset_mode = ast_reset_mode_from_flags(flags);
+
+ clrsetbits_le32(&priv->regs->ctrl,
+ WDT_CTRL_RESET_MASK << WDT_CTRL_RESET_MODE_SHIFT,
+ reset_mode << WDT_CTRL_RESET_MODE_SHIFT);
+
+ if (driver_data >= WDT_AST2500 && reset_mode == WDT_CTRL_RESET_SOC)
+ writel(ast_reset_mask_from_flags(flags),
+ &priv->regs->reset_mask);
+
+ writel((u32) timeout, &priv->regs->counter_reload_val);
+ writel(WDT_COUNTER_RESTART_VAL, &priv->regs->counter_restart);
+ /*
+ * Setting CLK1MHZ bit is just for compatibility with ast2400 part.
+ * On ast2500 watchdog timer clock is fixed at 1MHz and the bit is
+ * read-only
+ */
+ setbits_le32(&priv->regs->ctrl,
+ WDT_CTRL_EN | WDT_CTRL_RESET | WDT_CTRL_CLK1MHZ);
+
+ return 0;
+}
+
+static int ast_wdt_stop(struct udevice *dev)
+{
+ struct ast_wdt_priv *priv = dev_get_priv(dev);
+
+ clrbits_le32(&priv->regs->ctrl, WDT_CTRL_EN);
+
+ return 0;
+}
+
+static int ast_wdt_reset(struct udevice *dev)
+{
+ struct ast_wdt_priv *priv = dev_get_priv(dev);
+
+ writel(WDT_COUNTER_RESTART_VAL, &priv->regs->counter_restart);
+
+ return 0;
+}
+
+static int ast_wdt_expire_now(struct udevice *dev, ulong flags)
+{
+ struct ast_wdt_priv *priv = dev_get_priv(dev);
+ int ret;
+
+ ret = ast_wdt_start(dev, 1, flags);
+ if (ret)
+ return ret;
+
+ while (readl(&priv->regs->ctrl) & WDT_CTRL_EN)
+ ;
+
+ return ast_wdt_stop(dev);
+}
+
+static int ast_wdt_ofdata_to_platdata(struct udevice *dev)
+{
+ struct ast_wdt_priv *priv = dev_get_priv(dev);
+
+ priv->regs = dev_get_addr_ptr(dev);
+ if (IS_ERR(priv->regs))
+ return PTR_ERR(priv->regs);
+
+ return 0;
+}
+
+static const struct wdt_ops ast_wdt_ops = {
+ .start = ast_wdt_start,
+ .reset = ast_wdt_reset,
+ .stop = ast_wdt_stop,
+ .expire_now = ast_wdt_expire_now,
+};
+
+static const struct udevice_id ast_wdt_ids[] = {
+ { .compatible = "aspeed,wdt", .data = WDT_AST2500 },
+ { .compatible = "aspeed,ast2500-wdt", .data = WDT_AST2500 },
+ { .compatible = "aspeed,ast2400-wdt", .data = WDT_AST2400 },
+ {}
+};
+
+static int ast_wdt_probe(struct udevice *dev)
+{
+ debug("%s() wdt%u\n", __func__, dev->seq);
+ ast_wdt_stop(dev);
+
+ return 0;
+}
+
+U_BOOT_DRIVER(ast_wdt) = {
+ .name = "ast_wdt",
+ .id = UCLASS_WDT,
+ .of_match = ast_wdt_ids,
+ .probe = ast_wdt_probe,
+ .priv_auto_alloc_size = sizeof(struct ast_wdt_priv),
+ .ofdata_to_platdata = ast_wdt_ofdata_to_platdata,
+ .ops = &ast_wdt_ops,
+ .flags = DM_FLAG_PRE_RELOC,
+};
--
GitLab
From 413353b30b5d23c409b6a2fd70aa1cc28451a451 Mon Sep 17 00:00:00 2001
From: "maxims@google.com" <maxims@google.com>
Date: Mon, 17 Apr 2017 12:00:23 -0700
Subject: [PATCH 260/282] aspeed: Make SCU lock/unlock functions part of SCU
API
Make functions for locking and unlocking SCU part of SCU API.
Many drivers need to modify settings in SCU and thus need to unlock it
first. This change makes it possible.
Signed-off-by: Maxim Sloyko <maxims@google.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
---
arch/arm/include/asm/arch-aspeed/scu_ast2500.h | 14 ++++++++++++++
arch/arm/mach-aspeed/ast2500/clk_ast2500.c | 15 +++++++++++++++
drivers/clk/aspeed/clk_ast2500.c | 18 ++----------------
3 files changed, 31 insertions(+), 16 deletions(-)
diff --git a/arch/arm/include/asm/arch-aspeed/scu_ast2500.h b/arch/arm/include/asm/arch-aspeed/scu_ast2500.h
index fc0c01ae330..0fa3ecb9b91 100644
--- a/arch/arm/include/asm/arch-aspeed/scu_ast2500.h
+++ b/arch/arm/include/asm/arch-aspeed/scu_ast2500.h
@@ -120,6 +120,20 @@ int ast_get_clk(struct udevice **devp);
*/
void *ast_get_scu(void);
+/**
+ * ast_scu_unlock() - unlock protected registers
+ *
+ * @scu, pointer to ast2500_scu
+ */
+void ast_scu_unlock(struct ast2500_scu *scu);
+
+/**
+ * ast_scu_lock() - lock protected registers
+ *
+ * @scu, pointer to ast2500_scu
+ */
+void ast_scu_lock(struct ast2500_scu *scu);
+
#endif /* __ASSEMBLY__ */
#endif /* _ASM_ARCH_SCU_AST2500_H */
diff --git a/arch/arm/mach-aspeed/ast2500/clk_ast2500.c b/arch/arm/mach-aspeed/ast2500/clk_ast2500.c
index 079909fa646..30cfac1af0f 100644
--- a/arch/arm/mach-aspeed/ast2500/clk_ast2500.c
+++ b/arch/arm/mach-aspeed/ast2500/clk_ast2500.c
@@ -6,6 +6,7 @@
#include <common.h>
#include <dm.h>
+#include <asm/io.h>
#include <asm/arch/scu_ast2500.h>
int ast_get_clk(struct udevice **devp)
@@ -28,3 +29,17 @@ void *ast_get_scu(void)
return priv->scu;
}
+
+void ast_scu_unlock(struct ast2500_scu *scu)
+{
+ writel(SCU_UNLOCK_VALUE, &scu->protection_key);
+ while (!readl(&scu->protection_key))
+ ;
+}
+
+void ast_scu_lock(struct ast2500_scu *scu)
+{
+ writel(~SCU_UNLOCK_VALUE, &scu->protection_key);
+ while (readl(&scu->protection_key))
+ ;
+}
diff --git a/drivers/clk/aspeed/clk_ast2500.c b/drivers/clk/aspeed/clk_ast2500.c
index 26a5e58221c..504731271c3 100644
--- a/drivers/clk/aspeed/clk_ast2500.c
+++ b/drivers/clk/aspeed/clk_ast2500.c
@@ -132,20 +132,6 @@ static ulong ast2500_clk_get_rate(struct clk *clk)
return rate;
}
-static void ast2500_scu_unlock(struct ast2500_scu *scu)
-{
- writel(SCU_UNLOCK_VALUE, &scu->protection_key);
- while (!readl(&scu->protection_key))
- ;
-}
-
-static void ast2500_scu_lock(struct ast2500_scu *scu)
-{
- writel(~SCU_UNLOCK_VALUE, &scu->protection_key);
- while (readl(&scu->protection_key))
- ;
-}
-
static ulong ast2500_configure_ddr(struct ast2500_scu *scu, ulong rate)
{
ulong clkin = ast2500_get_clkin(scu);
@@ -197,9 +183,9 @@ static ulong ast2500_configure_ddr(struct ast2500_scu *scu, ulong rate)
| (best_num << SCU_MPLL_NUM_SHIFT)
| (best_denum << SCU_MPLL_DENUM_SHIFT);
- ast2500_scu_unlock(scu);
+ ast_scu_unlock(scu);
writel(mpll_reg, &scu->m_pll_param);
- ast2500_scu_lock(scu);
+ ast_scu_lock(scu);
return ast2500_get_mpll_rate(clkin, mpll_reg);
}
--
GitLab
From 858d4976293f0b3d72e5dcf0e8a1a973efafeee3 Mon Sep 17 00:00:00 2001
From: "maxims@google.com" <maxims@google.com>
Date: Mon, 17 Apr 2017 12:00:24 -0700
Subject: [PATCH 261/282] aspeed: Reset Driver
Add Reset Driver for ast2500 SoC. This driver uses Watchdog Timer to
perform resets and thus depends on it. The actual Watchdog device used
needs to be configured in Device Tree using "aspeed,wdt" property, which
must be WDT phandle, for example:
rst: reset-controller {
compatible = "aspeed,ast2500-reset";
aspeed,wdt = <&wdt1>;
}
Signed-off-by: Maxim Sloyko <maxims@google.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
---
.../arm/include/asm/arch-aspeed/scu_ast2500.h | 28 +++++
drivers/reset/Kconfig | 10 ++
drivers/reset/Makefile | 1 +
drivers/reset/ast2500-reset.c | 106 ++++++++++++++++++
4 files changed, 145 insertions(+)
create mode 100644 drivers/reset/ast2500-reset.c
diff --git a/arch/arm/include/asm/arch-aspeed/scu_ast2500.h b/arch/arm/include/asm/arch-aspeed/scu_ast2500.h
index 0fa3ecb9b91..e2556f920de 100644
--- a/arch/arm/include/asm/arch-aspeed/scu_ast2500.h
+++ b/arch/arm/include/asm/arch-aspeed/scu_ast2500.h
@@ -31,6 +31,34 @@
#define SCU_MISC_UARTCLK_DIV13 (1 << 12)
+/*
+ * SYSRESET is actually more like a Power register,
+ * except that corresponding bit set to 1 means that
+ * the peripheral is off.
+ */
+#define SCU_SYSRESET_XDMA (1 << 25)
+#define SCU_SYSRESET_MCTP (1 << 24)
+#define SCU_SYSRESET_ADC (1 << 23)
+#define SCU_SYSRESET_JTAG (1 << 22)
+#define SCU_SYSRESET_MIC (1 << 18)
+#define SCU_SYSRESET_SDIO (1 << 16)
+#define SCU_SYSRESET_USB11HOST (1 << 15)
+#define SCU_SYSRESET_USBHUB (1 << 14)
+#define SCU_SYSRESET_CRT (1 << 13)
+#define SCU_SYSRESET_MAC2 (1 << 12)
+#define SCU_SYSRESET_MAC1 (1 << 11)
+#define SCU_SYSRESET_PECI (1 << 10)
+#define SCU_SYSRESET_PWM (1 << 9)
+#define SCU_SYSRESET_PCI_VGA (1 << 8)
+#define SCU_SYSRESET_2D (1 << 7)
+#define SCU_SYSRESET_VIDEO (1 << 6)
+#define SCU_SYSRESET_LPC (1 << 5)
+#define SCU_SYSRESET_HAC (1 << 4)
+#define SCU_SYSRESET_USBHID (1 << 3)
+#define SCU_SYSRESET_I2C (1 << 2)
+#define SCU_SYSRESET_AHB (1 << 1)
+#define SCU_SYSRESET_SDRAM_WDT (1 << 0)
+
#ifndef __ASSEMBLY__
struct ast2500_clk_priv {
diff --git a/drivers/reset/Kconfig b/drivers/reset/Kconfig
index fa77ee4adae..80f4646a79c 100644
--- a/drivers/reset/Kconfig
+++ b/drivers/reset/Kconfig
@@ -51,4 +51,14 @@ config RESET_UNIPHIER
Say Y if you want to control reset signals provided by System Control
block, Media I/O block, Peripheral Block.
+config AST2500_RESET
+ bool "Reset controller driver for AST2500 SoCs"
+ depends on DM_RESET && WDT_ASPEED
+ default y if ASPEED_AST2500
+ help
+ Support for reset controller on AST2500 SoC. This controller uses
+ watchdog to reset different peripherals and thus only supports
+ resets that are supported by watchdog. The main limitation though
+ is that some reset signals, like I2C or MISC reset multiple devices.
+
endmenu
diff --git a/drivers/reset/Makefile b/drivers/reset/Makefile
index 2b963961d6b..630b4b4e541 100644
--- a/drivers/reset/Makefile
+++ b/drivers/reset/Makefile
@@ -9,3 +9,4 @@ obj-$(CONFIG_STI_RESET) += sti-reset.o
obj-$(CONFIG_TEGRA_CAR_RESET) += tegra-car-reset.o
obj-$(CONFIG_TEGRA186_RESET) += tegra186-reset.o
obj-$(CONFIG_RESET_UNIPHIER) += reset-uniphier.o
+obj-$(CONFIG_AST2500_RESET) += ast2500-reset.o
diff --git a/drivers/reset/ast2500-reset.c b/drivers/reset/ast2500-reset.c
new file mode 100644
index 00000000000..b2c89e1f1e2
--- /dev/null
+++ b/drivers/reset/ast2500-reset.c
@@ -0,0 +1,106 @@
+/*
+ * Copyright 2017 Google, Inc
+ *
+ * SPDX-License-Identifier: GPL-2.0
+ */
+
+#include <common.h>
+#include <dm.h>
+#include <misc.h>
+#include <reset.h>
+#include <reset-uclass.h>
+#include <wdt.h>
+#include <asm/io.h>
+#include <asm/arch/scu_ast2500.h>
+#include <asm/arch/wdt.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+struct ast2500_reset_priv {
+ /* WDT used to perform resets. */
+ struct udevice *wdt;
+ struct ast2500_scu *scu;
+};
+
+static int ast2500_ofdata_to_platdata(struct udevice *dev)
+{
+ struct ast2500_reset_priv *priv = dev_get_priv(dev);
+ int ret;
+
+ ret = uclass_get_device_by_phandle(UCLASS_WDT, dev, "aspeed,wdt",
+ &priv->wdt);
+ if (ret) {
+ debug("%s: can't find WDT for reset controller", __func__);
+ return ret;
+ }
+
+ return 0;
+}
+
+static int ast2500_reset_assert(struct reset_ctl *reset_ctl)
+{
+ struct ast2500_reset_priv *priv = dev_get_priv(reset_ctl->dev);
+ u32 reset_mode, reset_mask;
+ bool reset_sdram;
+ int ret;
+
+ /*
+ * To reset SDRAM, a specifal flag in SYSRESET register
+ * needs to be enabled first
+ */
+ reset_mode = ast_reset_mode_from_flags(reset_ctl->id);
+ reset_mask = ast_reset_mask_from_flags(reset_ctl->id);
+ reset_sdram = reset_mode == WDT_CTRL_RESET_SOC &&
+ (reset_mask & WDT_RESET_SDRAM);
+
+ if (reset_sdram) {
+ ast_scu_unlock(priv->scu);
+ setbits_le32(&priv->scu->sysreset_ctrl1,
+ SCU_SYSRESET_SDRAM_WDT);
+ ret = wdt_expire_now(priv->wdt, reset_ctl->id);
+ clrbits_le32(&priv->scu->sysreset_ctrl1,
+ SCU_SYSRESET_SDRAM_WDT);
+ ast_scu_lock(priv->scu);
+ } else {
+ ret = wdt_expire_now(priv->wdt, reset_ctl->id);
+ }
+
+ return ret;
+}
+
+static int ast2500_reset_request(struct reset_ctl *reset_ctl)
+{
+ debug("%s(reset_ctl=%p) (dev=%p, id=%lu)\n", __func__, reset_ctl,
+ reset_ctl->dev, reset_ctl->id);
+
+ return 0;
+}
+
+static int ast2500_reset_probe(struct udevice *dev)
+{
+ struct ast2500_reset_priv *priv = dev_get_priv(dev);
+
+ priv->scu = ast_get_scu();
+
+ return 0;
+}
+
+static const struct udevice_id ast2500_reset_ids[] = {
+ { .compatible = "aspeed,ast2500-reset" },
+ { }
+};
+
+struct reset_ops ast2500_reset_ops = {
+ .rst_assert = ast2500_reset_assert,
+ .request = ast2500_reset_request,
+};
+
+U_BOOT_DRIVER(ast2500_reset) = {
+ .name = "ast2500_reset",
+ .id = UCLASS_RESET,
+ .of_match = ast2500_reset_ids,
+ .probe = ast2500_reset_probe,
+ .ops = &ast2500_reset_ops,
+ .ofdata_to_platdata = ast2500_ofdata_to_platdata,
+ .priv_auto_alloc_size = sizeof(struct ast2500_reset_priv),
+};
--
GitLab
From c93adc08f393bc401c5929e1045d72dfbea3e126 Mon Sep 17 00:00:00 2001
From: "maxims@google.com" <maxims@google.com>
Date: Mon, 17 Apr 2017 12:00:25 -0700
Subject: [PATCH 262/282] aspeed: Device Tree configuration for Reset Driver
Add Reset Driver configuration to ast2500 SoC Device Tree and bindings
for various reset signals
Signed-off-by: Maxim Sloyko <maxims@google.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
---
arch/arm/dts/ast2500-evb.dts | 15 ++++++++
arch/arm/dts/ast2500-u-boot.dtsi | 10 +++++
include/dt-bindings/reset/ast2500-reset.h | 45 +++++++++++++++++++++++
3 files changed, 70 insertions(+)
create mode 100644 include/dt-bindings/reset/ast2500-reset.h
diff --git a/arch/arm/dts/ast2500-evb.dts b/arch/arm/dts/ast2500-evb.dts
index dc13952fb85..723941ac0be 100644
--- a/arch/arm/dts/ast2500-evb.dts
+++ b/arch/arm/dts/ast2500-evb.dts
@@ -21,3 +21,18 @@
&sdrammc {
clock-frequency = <400000000>;
};
+
+&wdt1 {
+ u-boot,dm-pre-reloc;
+ status = "okay";
+};
+
+&wdt2 {
+ u-boot,dm-pre-reloc;
+ status = "okay";
+};
+
+&wdt3 {
+ u-boot,dm-pre-reloc;
+ status = "okay";
+};
diff --git a/arch/arm/dts/ast2500-u-boot.dtsi b/arch/arm/dts/ast2500-u-boot.dtsi
index c95a7ba835a..faeeec1be4d 100644
--- a/arch/arm/dts/ast2500-u-boot.dtsi
+++ b/arch/arm/dts/ast2500-u-boot.dtsi
@@ -1,4 +1,5 @@
#include <dt-bindings/clock/ast2500-scu.h>
+#include <dt-bindings/reset/ast2500-reset.h>
#include "ast2500.dtsi"
@@ -11,12 +12,21 @@
#reset-cells = <1>;
};
+ rst: reset-controller {
+ u-boot,dm-pre-reloc;
+ compatible = "aspeed,ast2500-reset";
+ aspeed,wdt = <&wdt1>;
+ #reset-cells = <1>;
+ };
+
sdrammc: sdrammc@1e6e0000 {
u-boot,dm-pre-reloc;
compatible = "aspeed,ast2500-sdrammc";
reg = <0x1e6e0000 0x174
0x1e6e0200 0x1d4 >;
+ #reset-cells = <1>;
clocks = <&scu PLL_MPLL>;
+ resets = <&rst AST_RESET_SDRAM>;
};
ahb {
diff --git a/include/dt-bindings/reset/ast2500-reset.h b/include/dt-bindings/reset/ast2500-reset.h
new file mode 100644
index 00000000000..eb5e1db97b1
--- /dev/null
+++ b/include/dt-bindings/reset/ast2500-reset.h
@@ -0,0 +1,45 @@
+/*
+ * Copyright 2017 Google, Inc
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#ifndef _ABI_MACH_ASPEED_AST2500_RESET_H_
+#define _ABI_MACH_ASPEED_AST2500_RESET_H_
+
+/*
+ * The values are intentionally layed out as flags in
+ * WDT reset parameter.
+ */
+
+#define AST_RESET_SOC 0
+#define AST_RESET_CHIP 1
+#define AST_RESET_CPU (1 << 1)
+#define AST_RESET_ARM (1 << 2)
+#define AST_RESET_COPROC (1 << 3)
+#define AST_RESET_SDRAM (1 << 4)
+#define AST_RESET_AHB (1 << 5)
+#define AST_RESET_I2C (1 << 6)
+#define AST_RESET_MAC1 (1 << 7)
+#define AST_RESET_MAC2 (1 << 8)
+#define AST_RESET_GCRT (1 << 9)
+#define AST_RESET_USB20 (1 << 10)
+#define AST_RESET_USB11_HOST (1 << 11)
+#define AST_RESET_USB11_HID (1 << 12)
+#define AST_RESET_VIDEO (1 << 13)
+#define AST_RESET_HAC (1 << 14)
+#define AST_RESET_LPC (1 << 15)
+#define AST_RESET_SDIO (1 << 16)
+#define AST_RESET_MIC (1 << 17)
+#define AST_RESET_CRT2D (1 << 18)
+#define AST_RESET_PWM (1 << 19)
+#define AST_RESET_PECI (1 << 20)
+#define AST_RESET_JTAG (1 << 21)
+#define AST_RESET_ADC (1 << 22)
+#define AST_RESET_GPIO (1 << 23)
+#define AST_RESET_MCTP (1 << 24)
+#define AST_RESET_XDMA (1 << 25)
+#define AST_RESET_SPI (1 << 26)
+#define AST_RESET_MISC (1 << 27)
+
+#endif /* _ABI_MACH_ASPEED_AST2500_RESET_H_ */
--
GitLab
From 99f8ad7321fb9bbfbaff870a53b005d36a723b1f Mon Sep 17 00:00:00 2001
From: "maxims@google.com" <maxims@google.com>
Date: Mon, 17 Apr 2017 12:00:26 -0700
Subject: [PATCH 263/282] aspeed: Refactor AST2500 RAM Driver and Sysreset
Driver
This change switches all existing users of ast2500 Watchdog to Driver
Model based Watchdog driver.
To perform system reset Sysreset Driver uses first Watchdog device found
via uclass_first_device call. Since the system is going to be reset
anyway it does not make much difference which watchdog is used.
Instead of using Watchdog to reset itself, SDRAM driver now uses Reset
driver to do that.
These were the only users of the old Watchdog API, so that API is
removed.
This all is done in one change to avoid having to maintain dual API for
watchdog in between.
Signed-off-by: Maxim Sloyko <maxims@google.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
---
arch/arm/include/asm/arch-aspeed/wdt.h | 39 ---------------
arch/arm/mach-aspeed/Kconfig | 8 +--
arch/arm/mach-aspeed/ast2500/sdram_ast2500.c | 12 ++++-
arch/arm/mach-aspeed/ast_wdt.c | 51 --------------------
configs/evb-ast2500_defconfig | 2 +
drivers/sysreset/sysreset_ast.c | 24 +++++----
6 files changed, 24 insertions(+), 112 deletions(-)
diff --git a/arch/arm/include/asm/arch-aspeed/wdt.h b/arch/arm/include/asm/arch-aspeed/wdt.h
index 981fa05a567..db8ecbcbe4a 100644
--- a/arch/arm/include/asm/arch-aspeed/wdt.h
+++ b/arch/arm/include/asm/arch-aspeed/wdt.h
@@ -100,45 +100,6 @@ u32 ast_reset_mask_from_flags(ulong flags);
* @reset_mask: Reset Mask
*/
ulong ast_flags_from_reset_mode_mask(u32 reset_mode, u32 reset_mask);
-
-#ifndef CONFIG_WDT
-/**
- * Stop WDT
- *
- * @wdt: watchdog to stop
- *
- * When using driver model this function has different signature
- */
-void wdt_stop(struct ast_wdt *wdt);
-
-/**
- * Stop WDT
- *
- * @wdt: watchdog to start
- * @timeout watchdog timeout in number of clock ticks
- *
- * When using driver model this function has different signature
- */
-void wdt_start(struct ast_wdt *wdt, u32 timeout);
-#endif /* CONFIG_WDT */
-
-/**
- * Reset peripherals specified by mask
- *
- * Note, that this is only supported by ast2500 SoC
- *
- * @wdt: watchdog to use for this reset
- * @mask: reset mask.
- */
-int ast_wdt_reset_masked(struct ast_wdt *wdt, u32 mask);
-
-/**
- * ast_get_wdt() - get a pointer to watchdog registers
- *
- * @wdt_number: 0-based WDT peripheral number
- * @return pointer to registers or -ve error on error
- */
-struct ast_wdt *ast_get_wdt(u8 wdt_number);
#endif /* __ASSEMBLY__ */
#endif /* _ASM_ARCH_WDT_H */
diff --git a/arch/arm/mach-aspeed/Kconfig b/arch/arm/mach-aspeed/Kconfig
index c5b90bd96a4..4f021baa062 100644
--- a/arch/arm/mach-aspeed/Kconfig
+++ b/arch/arm/mach-aspeed/Kconfig
@@ -11,19 +11,13 @@ config SYS_TEXT_BASE
config ASPEED_AST2500
bool "Support Aspeed AST2500 SoC"
+ depends on DM_RESET
select CPU_ARM1176
help
The Aspeed AST2500 is a ARM-based SoC with arm1176 CPU.
It is used as Board Management Controller on many server boards,
which is enabled by support of LPC and eSPI peripherals.
-config WDT_NUM
- int "Number of Watchdog Timers"
- default 3 if ASPEED_AST2500
- help
- The number of Watchdot Timers on a SoC.
- AST2500 has three WDTsk earlier versions have two or fewer.
-
source "arch/arm/mach-aspeed/ast2500/Kconfig"
endif
diff --git a/arch/arm/mach-aspeed/ast2500/sdram_ast2500.c b/arch/arm/mach-aspeed/ast2500/sdram_ast2500.c
index cb6e03fa342..efcf452b178 100644
--- a/arch/arm/mach-aspeed/ast2500/sdram_ast2500.c
+++ b/arch/arm/mach-aspeed/ast2500/sdram_ast2500.c
@@ -12,6 +12,7 @@
#include <errno.h>
#include <ram.h>
#include <regmap.h>
+#include <reset.h>
#include <asm/io.h>
#include <asm/arch/scu_ast2500.h>
#include <asm/arch/sdram_ast2500.h>
@@ -328,6 +329,7 @@ static void ast2500_sdrammc_lock(struct dram_info *info)
static int ast2500_sdrammc_probe(struct udevice *dev)
{
+ struct reset_ctl reset_ctl;
struct dram_info *priv = (struct dram_info *)dev_get_priv(dev);
struct ast2500_sdrammc_regs *regs = priv->regs;
int i;
@@ -345,9 +347,15 @@ static int ast2500_sdrammc_probe(struct udevice *dev)
}
clk_set_rate(&priv->ddr_clk, priv->clock_rate);
- ret = ast_wdt_reset_masked(ast_get_wdt(0), WDT_RESET_SDRAM);
+ ret = reset_get_by_index(dev, 0, &reset_ctl);
if (ret) {
- debug("%s(): SDRAM reset failed\n", __func__);
+ debug("%s(): Failed to get reset signal\n", __func__);
+ return ret;
+ }
+
+ ret = reset_assert(&reset_ctl);
+ if (ret) {
+ debug("%s(): SDRAM reset failed: %u\n", __func__, ret);
return ret;
}
diff --git a/arch/arm/mach-aspeed/ast_wdt.c b/arch/arm/mach-aspeed/ast_wdt.c
index 895fba3366c..1a858b1020f 100644
--- a/arch/arm/mach-aspeed/ast_wdt.c
+++ b/arch/arm/mach-aspeed/ast_wdt.c
@@ -28,54 +28,3 @@ ulong ast_flags_from_reset_mode_mask(u32 reset_mode, u32 reset_mask)
return ret;
}
-
-#ifndef CONFIG_WDT
-void wdt_stop(struct ast_wdt *wdt)
-{
- clrbits_le32(&wdt->ctrl, WDT_CTRL_EN);
-}
-
-void wdt_start(struct ast_wdt *wdt, u32 timeout)
-{
- writel(timeout, &wdt->counter_reload_val);
- writel(WDT_COUNTER_RESTART_VAL, &wdt->counter_restart);
- /*
- * Setting CLK1MHZ bit is just for compatibility with ast2400 part.
- * On ast2500 watchdog timer clock is fixed at 1MHz and the bit is
- * read-only
- */
- setbits_le32(&wdt->ctrl,
- WDT_CTRL_EN | WDT_CTRL_RESET | WDT_CTRL_CLK1MHZ);
-}
-#endif /* CONFIG_WDT */
-
-int ast_wdt_reset_masked(struct ast_wdt *wdt, u32 mask)
-{
-#ifdef CONFIG_ASPEED_AST2500
- if (!mask)
- return -EINVAL;
-
- writel(mask, &wdt->reset_mask);
- clrbits_le32(&wdt->ctrl,
- WDT_CTRL_RESET_MASK << WDT_CTRL_RESET_MODE_SHIFT);
- wdt_start(wdt, 1);
-
- /* Wait for WDT to reset */
- while (readl(&wdt->ctrl) & WDT_CTRL_EN)
- ;
- wdt_stop(wdt);
-
- return 0;
-#else
- return -EINVAL;
-#endif
-}
-
-struct ast_wdt *ast_get_wdt(u8 wdt_number)
-{
- if (wdt_number > CONFIG_WDT_NUM - 1)
- return ERR_PTR(-EINVAL);
-
- return (struct ast_wdt *)(WDT_BASE +
- sizeof(struct ast_wdt) * wdt_number);
-}
diff --git a/configs/evb-ast2500_defconfig b/configs/evb-ast2500_defconfig
index cc5fea9a814..74808a71ee6 100644
--- a/configs/evb-ast2500_defconfig
+++ b/configs/evb-ast2500_defconfig
@@ -15,3 +15,5 @@ CONFIG_DM_SERIAL=y
CONFIG_SYS_NS16550=y
CONFIG_SYSRESET=y
CONFIG_TIMER=y
+CONFIG_WDT=y
+CONFIG_DM_RESET=y
diff --git a/drivers/sysreset/sysreset_ast.c b/drivers/sysreset/sysreset_ast.c
index a0ab12851d4..3c3f552df83 100644
--- a/drivers/sysreset/sysreset_ast.c
+++ b/drivers/sysreset/sysreset_ast.c
@@ -8,21 +8,19 @@
#include <dm.h>
#include <errno.h>
#include <sysreset.h>
+#include <wdt.h>
#include <asm/io.h>
#include <asm/arch/wdt.h>
#include <linux/err.h>
-/* Number of Watchdog Timer ticks before reset */
-#define AST_WDT_RESET_TIMEOUT 10
-#define AST_WDT_FOR_RESET 0
-
static int ast_sysreset_request(struct udevice *dev, enum sysreset_t type)
{
- struct ast_wdt *wdt = ast_get_wdt(AST_WDT_FOR_RESET);
- u32 reset_mode = 0;
+ struct udevice *wdt;
+ u32 reset_mode;
+ int ret = uclass_first_device(UCLASS_WDT, &wdt);
- if (IS_ERR(wdt))
- return PTR_ERR(wdt);
+ if (ret)
+ return ret;
switch (type) {
case SYSRESET_WARM:
@@ -35,11 +33,11 @@ static int ast_sysreset_request(struct udevice *dev, enum sysreset_t type)
return -EPROTONOSUPPORT;
}
- /* Clear reset mode bits */
- clrsetbits_le32(&wdt->ctrl,
- (WDT_CTRL_RESET_MODE_MASK << WDT_CTRL_RESET_MODE_SHIFT),
- (reset_mode << WDT_CTRL_RESET_MODE_SHIFT));
- wdt_start(wdt, AST_WDT_RESET_TIMEOUT);
+ ret = wdt_expire_now(wdt, reset_mode);
+ if (ret) {
+ debug("Sysreset failed: %d", ret);
+ return ret;
+ }
return -EINPROGRESS;
}
--
GitLab
From 4f0e44e46615e3c827dcd1ec59677be1058d394c Mon Sep 17 00:00:00 2001
From: "maxims@google.com" <maxims@google.com>
Date: Mon, 17 Apr 2017 12:00:27 -0700
Subject: [PATCH 264/282] aspeed: AST2500 Pinctrl Driver
This driver uses Generic Pinctrl framework and is compatible with
the Linux driver for ast2500: it uses the same device tree
configuration.
Not all pins are supported by the driver at the moment, so it actually
compatible with ast2400. In general, however, there are differences that
in the future would be easier to maintain separately.
Signed-off-by: Maxim Sloyko <maxims@google.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
---
arch/arm/include/asm/arch-aspeed/pinctrl.h | 52 +++++++
.../arm/include/asm/arch-aspeed/scu_ast2500.h | 19 +++
drivers/pinctrl/Kconfig | 9 ++
drivers/pinctrl/Makefile | 1 +
drivers/pinctrl/aspeed/Makefile | 1 +
drivers/pinctrl/aspeed/pinctrl_ast2500.c | 127 ++++++++++++++++++
6 files changed, 209 insertions(+)
create mode 100644 arch/arm/include/asm/arch-aspeed/pinctrl.h
create mode 100644 drivers/pinctrl/aspeed/Makefile
create mode 100644 drivers/pinctrl/aspeed/pinctrl_ast2500.c
diff --git a/arch/arm/include/asm/arch-aspeed/pinctrl.h b/arch/arm/include/asm/arch-aspeed/pinctrl.h
new file mode 100644
index 00000000000..365dc21dbc4
--- /dev/null
+++ b/arch/arm/include/asm/arch-aspeed/pinctrl.h
@@ -0,0 +1,52 @@
+/*
+ * Copyright (c) 2017 Google, Inc
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+#ifndef _ASM_ARCH_PERIPH_H
+#define _ASM_ARCH_PERIPH_H
+
+/*
+ * Peripherals supported by the hardware.
+ * These are used to specify pinctrl settings.
+ */
+
+enum periph_id {
+ PERIPH_ID_UART1,
+ PERIPH_ID_UART2,
+ PERIPH_ID_UART3,
+ PERIPH_ID_UART4,
+ PERIPH_ID_LPC,
+ PERIPH_ID_PWM0,
+ PERIPH_ID_PWM1,
+ PERIPH_ID_PWM2,
+ PERIPH_ID_PWM3,
+ PERIPH_ID_PWM4,
+ PERIPH_ID_PWM5,
+ PERIPH_ID_PWM6,
+ PERIPH_ID_PWM7,
+ PERIPH_ID_PWM8,
+ PERIPH_ID_MAC1,
+ PERIPH_ID_MAC2,
+ PERIPH_ID_VIDEO,
+ PERIPH_ID_SPI1,
+ PERIPH_ID_SPI2,
+ PERIPH_ID_I2C1,
+ PERIPH_ID_I2C2,
+ PERIPH_ID_I2C3,
+ PERIPH_ID_I2C4,
+ PERIPH_ID_I2C5,
+ PERIPH_ID_I2C6,
+ PERIPH_ID_I2C7,
+ PERIPH_ID_I2C8,
+ PERIPH_ID_I2C9,
+ PERIPH_ID_I2C10,
+ PERIPH_ID_I2C11,
+ PERIPH_ID_I2C12,
+ PERIPH_ID_I2C13,
+ PERIPH_ID_I2C14,
+ PERIPH_ID_SD1,
+ PERIPH_ID_SD2,
+};
+
+#endif /* _ASM_ARCH_SCU_AST2500_H */
diff --git a/arch/arm/include/asm/arch-aspeed/scu_ast2500.h b/arch/arm/include/asm/arch-aspeed/scu_ast2500.h
index e2556f920de..1cdd3b91982 100644
--- a/arch/arm/include/asm/arch-aspeed/scu_ast2500.h
+++ b/arch/arm/include/asm/arch-aspeed/scu_ast2500.h
@@ -10,6 +10,8 @@
#define SCU_HWSTRAP_VGAMEM_MASK 3
#define SCU_HWSTRAP_VGAMEM_SHIFT 2
+#define SCU_HWSTRAP_MAC1_RGMII (1 << 6)
+#define SCU_HWSTRAP_MAC2_RGMII (1 << 7)
#define SCU_HWSTRAP_DDR4 (1 << 24)
#define SCU_HWSTRAP_CLKIN_25MHZ (1 << 23)
@@ -59,6 +61,23 @@
#define SCU_SYSRESET_AHB (1 << 1)
#define SCU_SYSRESET_SDRAM_WDT (1 << 0)
+/* Bits 16-27 in the register control pin functions for I2C devices 3-14 */
+#define SCU_PINMUX_CTRL5_I2C (1 << 16)
+
+/*
+ * The values are grouped by function, not by register.
+ * They are actually scattered across multiple loosely related registers.
+ */
+#define SCU_PIN_FUN_MAC1_MDC (1 << 30)
+#define SCU_PIN_FUN_MAC1_MDIO (1 << 31)
+#define SCU_PIN_FUN_MAC1_PHY_LINK (1 << 0)
+#define SCU_PIN_FUN_MAC2_MDIO (1 << 2)
+#define SCU_PIN_FUN_MAC2_PHY_LINK (1 << 1)
+#define SCU_PIN_FUN_SCL1 (1 << 12)
+#define SCU_PIN_FUN_SCL2 (1 << 14)
+#define SCU_PIN_FUN_SDA1 (1 << 13)
+#define SCU_PIN_FUN_SDA2 (1 << 15)
+
#ifndef __ASSEMBLY__
struct ast2500_clk_priv {
diff --git a/drivers/pinctrl/Kconfig b/drivers/pinctrl/Kconfig
index 9cea6f202cf..f6616c5329b 100644
--- a/drivers/pinctrl/Kconfig
+++ b/drivers/pinctrl/Kconfig
@@ -248,6 +248,15 @@ config PINCTRL_STM32
the GPIO definitions and pin control functions for each available
multiplex function.
+config ASPEED_AST2500_PINCTRL
+ bool "Aspeed AST2500 pin control driver"
+ depends on DM && PINCTRL_GENERIC && ASPEED_AST2500
+ default y
+ help
+ Support pin multiplexing control on Aspeed ast2500 SoC. The driver uses
+ Generic Pinctrl framework and is compatible with the Linux driver,
+ i.e. it uses the same device tree configuration.
+
endif
source "drivers/pinctrl/meson/Kconfig"
diff --git a/drivers/pinctrl/Makefile b/drivers/pinctrl/Makefile
index 17a7173d355..1e5c4257c4d 100644
--- a/drivers/pinctrl/Makefile
+++ b/drivers/pinctrl/Makefile
@@ -8,6 +8,7 @@ obj-$(CONFIG_$(SPL_)PINCTRL_GENERIC) += pinctrl-generic.o
obj-$(CONFIG_PINCTRL_AT91) += pinctrl-at91.o
obj-$(CONFIG_PINCTRL_AT91PIO4) += pinctrl-at91-pio4.o
obj-y += nxp/
+obj-$(CONFIG_ARCH_ASPEED) += aspeed/
obj-$(CONFIG_ARCH_ATH79) += ath79/
obj-$(CONFIG_ARCH_ROCKCHIP) += rockchip/
obj-$(CONFIG_PINCTRL_SANDBOX) += pinctrl-sandbox.o
diff --git a/drivers/pinctrl/aspeed/Makefile b/drivers/pinctrl/aspeed/Makefile
new file mode 100644
index 00000000000..2e6ed604c8f
--- /dev/null
+++ b/drivers/pinctrl/aspeed/Makefile
@@ -0,0 +1 @@
+obj-$(CONFIG_ASPEED_AST2500_PINCTRL) += pinctrl_ast2500.o
diff --git a/drivers/pinctrl/aspeed/pinctrl_ast2500.c b/drivers/pinctrl/aspeed/pinctrl_ast2500.c
new file mode 100644
index 00000000000..01f97c1b48d
--- /dev/null
+++ b/drivers/pinctrl/aspeed/pinctrl_ast2500.c
@@ -0,0 +1,127 @@
+/*
+ * Copyright 2017 Google, Inc
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include <common.h>
+#include <dm.h>
+#include <errno.h>
+#include <asm/io.h>
+#include <asm/arch/pinctrl.h>
+#include <asm/arch/scu_ast2500.h>
+#include <dm/pinctrl.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+/*
+ * This driver works with very simple configuration that has the same name
+ * for group and function. This way it is compatible with the Linux Kernel
+ * driver.
+ */
+
+struct ast2500_pinctrl_priv {
+ struct ast2500_scu *scu;
+};
+
+static int ast2500_pinctrl_probe(struct udevice *dev)
+{
+ struct ast2500_pinctrl_priv *priv = dev_get_priv(dev);
+
+ priv->scu = ast_get_scu();
+
+ return 0;
+}
+
+struct ast2500_group_config {
+ char *group_name;
+ /* Control register number (1-10) */
+ unsigned reg_num;
+ /* The mask of control bits in the register */
+ u32 ctrl_bit_mask;
+};
+
+static const struct ast2500_group_config ast2500_groups[] = {
+ { "I2C1", 8, (1 << 13) | (1 << 12) },
+ { "I2C2", 8, (1 << 15) | (1 << 14) },
+ { "I2C3", 8, (1 << 16) },
+ { "I2C4", 5, (1 << 17) },
+ { "I2C4", 5, (1 << 17) },
+ { "I2C5", 5, (1 << 18) },
+ { "I2C6", 5, (1 << 19) },
+ { "I2C7", 5, (1 << 20) },
+ { "I2C8", 5, (1 << 21) },
+ { "I2C9", 5, (1 << 22) },
+ { "I2C10", 5, (1 << 23) },
+ { "I2C11", 5, (1 << 24) },
+ { "I2C12", 5, (1 << 25) },
+ { "I2C13", 5, (1 << 26) },
+ { "I2C14", 5, (1 << 27) },
+ { "MAC1LINK", 1, (1 << 0) },
+ { "MDIO1", 3, (1 << 31) | (1 << 30) },
+ { "MAC2LINK", 1, (1 << 1) },
+ { "MDIO2", 5, (1 << 2) },
+};
+
+static int ast2500_pinctrl_get_groups_count(struct udevice *dev)
+{
+ debug("PINCTRL: get_(functions/groups)_count\n");
+
+ return ARRAY_SIZE(ast2500_groups);
+}
+
+static const char *ast2500_pinctrl_get_group_name(struct udevice *dev,
+ unsigned selector)
+{
+ debug("PINCTRL: get_(function/group)_name %u\n", selector);
+
+ return ast2500_groups[selector].group_name;
+}
+
+static int ast2500_pinctrl_group_set(struct udevice *dev, unsigned selector,
+ unsigned func_selector)
+{
+ struct ast2500_pinctrl_priv *priv = dev_get_priv(dev);
+ const struct ast2500_group_config *config;
+ u32 *ctrl_reg;
+
+ debug("PINCTRL: group_set <%u, %u>\n", selector, func_selector);
+ if (selector >= ARRAY_SIZE(ast2500_groups))
+ return -EINVAL;
+
+ config = &ast2500_groups[selector];
+ if (config->reg_num > 6)
+ ctrl_reg = &priv->scu->pinmux_ctrl1[config->reg_num - 7];
+ else
+ ctrl_reg = &priv->scu->pinmux_ctrl[config->reg_num - 1];
+
+ ast_scu_unlock(priv->scu);
+ setbits_le32(ctrl_reg, config->ctrl_bit_mask);
+ ast_scu_lock(priv->scu);
+
+ return 0;
+}
+
+static struct pinctrl_ops ast2500_pinctrl_ops = {
+ .set_state = pinctrl_generic_set_state,
+ .get_groups_count = ast2500_pinctrl_get_groups_count,
+ .get_group_name = ast2500_pinctrl_get_group_name,
+ .get_functions_count = ast2500_pinctrl_get_groups_count,
+ .get_function_name = ast2500_pinctrl_get_group_name,
+ .pinmux_group_set = ast2500_pinctrl_group_set,
+};
+
+static const struct udevice_id ast2500_pinctrl_ids[] = {
+ { .compatible = "aspeed,ast2500-pinctrl" },
+ { .compatible = "aspeed,g5-pinctrl" },
+ { }
+};
+
+U_BOOT_DRIVER(pinctrl_ast2500) = {
+ .name = "aspeed_ast2500_pinctrl",
+ .id = UCLASS_PINCTRL,
+ .of_match = ast2500_pinctrl_ids,
+ .priv_auto_alloc_size = sizeof(struct ast2500_pinctrl_priv),
+ .ops = &ast2500_pinctrl_ops,
+ .probe = ast2500_pinctrl_probe,
+};
--
GitLab
From 3ef7f12cdd1b042cf657a1ea734bb9d2a4adc0da Mon Sep 17 00:00:00 2001
From: "maxims@google.com" <maxims@google.com>
Date: Mon, 17 Apr 2017 12:00:28 -0700
Subject: [PATCH 265/282] aspeed: Enable Pinctrl Driver in AST2500 EVB
Enable Pinctrl Driver in AST2500 Eval Board's defconfig
Signed-off-by: Maxim Sloyko <maxims@google.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
---
configs/evb-ast2500_defconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/configs/evb-ast2500_defconfig b/configs/evb-ast2500_defconfig
index 74808a71ee6..f8ef9b779ca 100644
--- a/configs/evb-ast2500_defconfig
+++ b/configs/evb-ast2500_defconfig
@@ -17,3 +17,4 @@ CONFIG_SYSRESET=y
CONFIG_TIMER=y
CONFIG_WDT=y
CONFIG_DM_RESET=y
+CONFIG_PINCTRL=y
--
GitLab
From 4999bb06cc2f21d3a517a068b183fb11827f49a7 Mon Sep 17 00:00:00 2001
From: "maxims@google.com" <maxims@google.com>
Date: Mon, 17 Apr 2017 12:00:29 -0700
Subject: [PATCH 266/282] aspeed: Add P-Bus clock in ast2500 clock driver
Add P-Bus Clock support to ast2500 clock driver.
This is the clock used by I2C devices.
Signed-off-by: Maxim Sloyko <maxims@google.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
---
arch/arm/include/asm/arch-aspeed/scu_ast2500.h | 3 ++-
drivers/clk/aspeed/clk_ast2500.c | 11 +++++++++++
2 files changed, 13 insertions(+), 1 deletion(-)
diff --git a/arch/arm/include/asm/arch-aspeed/scu_ast2500.h b/arch/arm/include/asm/arch-aspeed/scu_ast2500.h
index 1cdd3b91982..319d75e05ce 100644
--- a/arch/arm/include/asm/arch-aspeed/scu_ast2500.h
+++ b/arch/arm/include/asm/arch-aspeed/scu_ast2500.h
@@ -21,7 +21,8 @@
#define SCU_MPLL_NUM_MASK 0xff
#define SCU_MPLL_POST_SHIFT 13
#define SCU_MPLL_POST_MASK 0x3f
-
+#define SCU_PCLK_DIV_SHIFT 23
+#define SCU_PCLK_DIV_MASK 7
#define SCU_HPLL_DENUM_SHIFT 0
#define SCU_HPLL_DENUM_MASK 0x1f
#define SCU_HPLL_NUM_SHIFT 5
diff --git a/drivers/clk/aspeed/clk_ast2500.c b/drivers/clk/aspeed/clk_ast2500.c
index 504731271c3..9e4c66ea85f 100644
--- a/drivers/clk/aspeed/clk_ast2500.c
+++ b/drivers/clk/aspeed/clk_ast2500.c
@@ -110,6 +110,17 @@ static ulong ast2500_clk_get_rate(struct clk *clk)
rate = ast2500_get_mpll_rate(clkin,
readl(&priv->scu->m_pll_param));
break;
+ case BCLK_PCLK:
+ {
+ ulong apb_div = 4 + 4 * ((readl(&priv->scu->clk_sel1)
+ >> SCU_PCLK_DIV_SHIFT) &
+ SCU_PCLK_DIV_MASK);
+ rate = ast2500_get_hpll_rate(clkin,
+ readl(&priv->scu->
+ h_pll_param));
+ rate = rate / apb_div;
+ }
+ break;
case PCLK_UART1:
rate = ast2500_get_uart_clk_rate(priv->scu, 1);
break;
--
GitLab
From 4dc038f3a1c1b88b9b77afdcb1081fc399e5085a Mon Sep 17 00:00:00 2001
From: "maxims@google.com" <maxims@google.com>
Date: Mon, 17 Apr 2017 12:00:30 -0700
Subject: [PATCH 267/282] aspeed: Add I2C Driver
Add Device Model based I2C driver for ast2500/ast2400 SoCs.
The driver is very limited, it only supports master mode and
synchronous byte-by-byte reads/writes, no DMA or Pool Buffers.
Signed-off-by: Maxim Sloyko <maxims@google.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Acked-by: Heiko Schocher <hs@denx.de>
---
drivers/i2c/Kconfig | 9 ++
drivers/i2c/Makefile | 1 +
drivers/i2c/ast_i2c.c | 357 ++++++++++++++++++++++++++++++++++++++++++
drivers/i2c/ast_i2c.h | 132 ++++++++++++++++
4 files changed, 499 insertions(+)
create mode 100644 drivers/i2c/ast_i2c.c
create mode 100644 drivers/i2c/ast_i2c.h
diff --git a/drivers/i2c/Kconfig b/drivers/i2c/Kconfig
index 4e9afc120a3..c58bc1e1cf5 100644
--- a/drivers/i2c/Kconfig
+++ b/drivers/i2c/Kconfig
@@ -114,6 +114,15 @@ config SYS_I2C_DW_ENABLE_STATUS_UNSUPPORTED
enable status register. This config option can be enabled in such
cases.
+config SYS_I2C_ASPEED
+ bool "Aspeed I2C Controller"
+ depends on DM_I2C && ARCH_ASPEED
+ help
+ Say yes here to select Aspeed I2C Host Controller. The driver
+ supports AST2500 and AST2400 controllers, but is very limited.
+ Only single master mode is supported and only byte-by-byte
+ synchronous reads and writes are supported, no Pool Buffers or DMA.
+
config SYS_I2C_INTEL
bool "Intel I2C/SMBUS driver"
depends on DM_I2C
diff --git a/drivers/i2c/Makefile b/drivers/i2c/Makefile
index 4872c1d7022..d20fe7bb4ae 100644
--- a/drivers/i2c/Makefile
+++ b/drivers/i2c/Makefile
@@ -15,6 +15,7 @@ obj-$(CONFIG_I2C_MV) += mv_i2c.o
obj-$(CONFIG_TSI108_I2C) += tsi108_i2c.o
obj-$(CONFIG_SH_SH7734_I2C) += sh_sh7734_i2c.o
obj-$(CONFIG_SYS_I2C) += i2c_core.o
+obj-$(CONFIG_SYS_I2C_ASPEED) += ast_i2c.o
obj-$(CONFIG_SYS_I2C_AT91) += at91_i2c.o
obj-$(CONFIG_SYS_I2C_CADENCE) += i2c-cdns.o
obj-$(CONFIG_SYS_I2C_DAVINCI) += davinci_i2c.o
diff --git a/drivers/i2c/ast_i2c.c b/drivers/i2c/ast_i2c.c
new file mode 100644
index 00000000000..16dfb570669
--- /dev/null
+++ b/drivers/i2c/ast_i2c.c
@@ -0,0 +1,357 @@
+/*
+ * Copyright (C) 2012-2020 ASPEED Technology Inc.
+ * Copyright 2016 IBM Corporation
+ * Copyright 2017 Google, Inc.
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include <common.h>
+#include <clk.h>
+#include <dm.h>
+#include <errno.h>
+#include <fdtdec.h>
+#include <i2c.h>
+#include <asm/io.h>
+#include <asm/arch/scu_ast2500.h>
+
+#include "ast_i2c.h"
+
+#define I2C_TIMEOUT_US 100000
+#define I2C_SLEEP_STEP_US 20
+
+#define HIGHSPEED_TTIMEOUT 3
+
+DECLARE_GLOBAL_DATA_PTR;
+
+/*
+ * Device private data
+ */
+struct ast_i2c_priv {
+ /* This device's clock */
+ struct clk clk;
+ /* Device registers */
+ struct ast_i2c_regs *regs;
+ /* I2C speed in Hz */
+ int speed;
+};
+
+/*
+ * Given desired divider ratio, return the value that needs to be set
+ * in Clock and AC Timing Control register
+ */
+static u32 get_clk_reg_val(ulong divider_ratio)
+{
+ ulong inc = 0, div;
+ ulong scl_low, scl_high, data;
+
+ for (div = 0; divider_ratio >= 16; div++) {
+ inc |= (divider_ratio & 1);
+ divider_ratio >>= 1;
+ }
+ divider_ratio += inc;
+ scl_low = (divider_ratio >> 1) - 1;
+ scl_high = divider_ratio - scl_low - 2;
+ data = I2CD_CACTC_BASE
+ | (scl_high << I2CD_TCKHIGH_SHIFT)
+ | (scl_low << I2CD_TCKLOW_SHIFT)
+ | (div << I2CD_BASE_DIV_SHIFT);
+
+ return data;
+}
+
+static void ast_i2c_clear_interrupts(struct udevice *dev)
+{
+ struct ast_i2c_priv *priv = dev_get_priv(dev);
+
+ writel(~0, &priv->regs->isr);
+}
+
+static void ast_i2c_init_bus(struct udevice *dev)
+{
+ struct ast_i2c_priv *priv = dev_get_priv(dev);
+
+ /* Reset device */
+ writel(0, &priv->regs->fcr);
+ /* Enable Master Mode. Assuming single-master */
+ writel(I2CD_MASTER_EN
+ | I2CD_M_SDA_LOCK_EN
+ | I2CD_MULTI_MASTER_DIS | I2CD_M_SCL_DRIVE_EN,
+ &priv->regs->fcr);
+ /* Enable Interrupts */
+ writel(I2CD_INTR_TX_ACK
+ | I2CD_INTR_TX_NAK
+ | I2CD_INTR_RX_DONE
+ | I2CD_INTR_BUS_RECOVER_DONE
+ | I2CD_INTR_NORMAL_STOP
+ | I2CD_INTR_ABNORMAL, &priv->regs->icr);
+}
+
+static int ast_i2c_ofdata_to_platdata(struct udevice *dev)
+{
+ struct ast_i2c_priv *priv = dev_get_priv(dev);
+ int ret;
+
+ priv->regs = dev_get_addr_ptr(dev);
+ if (IS_ERR(priv->regs))
+ return PTR_ERR(priv->regs);
+
+ ret = clk_get_by_index(dev, 0, &priv->clk);
+ if (ret < 0) {
+ debug("%s: Can't get clock for %s: %d\n", __func__, dev->name,
+ ret);
+ return ret;
+ }
+
+ return 0;
+}
+
+static int ast_i2c_probe(struct udevice *dev)
+{
+ struct ast2500_scu *scu;
+
+ debug("Enabling I2C%u\n", dev->seq);
+
+ /*
+ * Get all I2C devices out of Reset.
+ * Only needs to be done once, but doing it for every
+ * device does not hurt.
+ */
+ scu = ast_get_scu();
+ ast_scu_unlock(scu);
+ clrbits_le32(&scu->sysreset_ctrl1, SCU_SYSRESET_I2C);
+ ast_scu_lock(scu);
+
+ ast_i2c_init_bus(dev);
+
+ return 0;
+}
+
+static int ast_i2c_wait_isr(struct udevice *dev, u32 flag)
+{
+ struct ast_i2c_priv *priv = dev_get_priv(dev);
+ int timeout = I2C_TIMEOUT_US;
+
+ while (!(readl(&priv->regs->isr) & flag) && timeout > 0) {
+ udelay(I2C_SLEEP_STEP_US);
+ timeout -= I2C_SLEEP_STEP_US;
+ }
+
+ ast_i2c_clear_interrupts(dev);
+ if (timeout <= 0)
+ return -ETIMEDOUT;
+
+ return 0;
+}
+
+static int ast_i2c_send_stop(struct udevice *dev)
+{
+ struct ast_i2c_priv *priv = dev_get_priv(dev);
+
+ writel(I2CD_M_STOP_CMD, &priv->regs->csr);
+
+ return ast_i2c_wait_isr(dev, I2CD_INTR_NORMAL_STOP);
+}
+
+static int ast_i2c_wait_tx(struct udevice *dev)
+{
+ struct ast_i2c_priv *priv = dev_get_priv(dev);
+ int timeout = I2C_TIMEOUT_US;
+ u32 flag = I2CD_INTR_TX_ACK | I2CD_INTR_TX_NAK;
+ u32 status = readl(&priv->regs->isr) & flag;
+ int ret = 0;
+
+ while (!status && timeout > 0) {
+ status = readl(&priv->regs->isr) & flag;
+ udelay(I2C_SLEEP_STEP_US);
+ timeout -= I2C_SLEEP_STEP_US;
+ }
+
+ if (status == I2CD_INTR_TX_NAK)
+ ret = -EREMOTEIO;
+
+ if (timeout <= 0)
+ ret = -ETIMEDOUT;
+
+ ast_i2c_clear_interrupts(dev);
+
+ return ret;
+}
+
+static int ast_i2c_start_txn(struct udevice *dev, uint devaddr)
+{
+ struct ast_i2c_priv *priv = dev_get_priv(dev);
+
+ /* Start and Send Device Address */
+ writel(devaddr, &priv->regs->trbbr);
+ writel(I2CD_M_START_CMD | I2CD_M_TX_CMD, &priv->regs->csr);
+
+ return ast_i2c_wait_tx(dev);
+}
+
+static int ast_i2c_read_data(struct udevice *dev, u8 chip_addr, u8 *buffer,
+ size_t len, bool send_stop)
+{
+ struct ast_i2c_priv *priv = dev_get_priv(dev);
+ u32 i2c_cmd = I2CD_M_RX_CMD;
+ int ret;
+
+ ret = ast_i2c_start_txn(dev, (chip_addr << 1) | I2C_M_RD);
+ if (ret < 0)
+ return ret;
+
+ for (; len > 0; len--, buffer++) {
+ if (len == 1)
+ i2c_cmd |= I2CD_M_S_RX_CMD_LAST;
+ writel(i2c_cmd, &priv->regs->csr);
+ ret = ast_i2c_wait_isr(dev, I2CD_INTR_RX_DONE);
+ if (ret < 0)
+ return ret;
+ *buffer = (readl(&priv->regs->trbbr) & I2CD_RX_DATA_MASK)
+ >> I2CD_RX_DATA_SHIFT;
+ }
+ ast_i2c_clear_interrupts(dev);
+
+ if (send_stop)
+ return ast_i2c_send_stop(dev);
+
+ return 0;
+}
+
+static int ast_i2c_write_data(struct udevice *dev, u8 chip_addr, u8
+ *buffer, size_t len, bool send_stop)
+{
+ struct ast_i2c_priv *priv = dev_get_priv(dev);
+ int ret;
+
+ ret = ast_i2c_start_txn(dev, (chip_addr << 1));
+ if (ret < 0)
+ return ret;
+
+ for (; len > 0; len--, buffer++) {
+ writel(*buffer, &priv->regs->trbbr);
+ writel(I2CD_M_TX_CMD, &priv->regs->csr);
+ ret = ast_i2c_wait_tx(dev);
+ if (ret < 0)
+ return ret;
+ }
+
+ if (send_stop)
+ return ast_i2c_send_stop(dev);
+
+ return 0;
+}
+
+static int ast_i2c_deblock(struct udevice *dev)
+{
+ struct ast_i2c_priv *priv = dev_get_priv(dev);
+ struct ast_i2c_regs *regs = priv->regs;
+ u32 csr = readl(®s->csr);
+ bool sda_high = csr & I2CD_SDA_LINE_STS;
+ bool scl_high = csr & I2CD_SCL_LINE_STS;
+ int ret = 0;
+
+ if (sda_high && scl_high) {
+ /* Bus is idle, no deblocking needed. */
+ return 0;
+ } else if (sda_high) {
+ /* Send stop command */
+ debug("Unterminated TXN in (%x), sending stop\n", csr);
+ ret = ast_i2c_send_stop(dev);
+ } else if (scl_high) {
+ /* Possibly stuck slave */
+ debug("Bus stuck (%x), attempting recovery\n", csr);
+ writel(I2CD_BUS_RECOVER_CMD, ®s->csr);
+ ret = ast_i2c_wait_isr(dev, I2CD_INTR_BUS_RECOVER_DONE);
+ } else {
+ /* Just try to reinit the device. */
+ ast_i2c_init_bus(dev);
+ }
+
+ return ret;
+}
+
+static int ast_i2c_xfer(struct udevice *dev, struct i2c_msg *msg, int nmsgs)
+{
+ int ret;
+
+ ret = ast_i2c_deblock(dev);
+ if (ret < 0)
+ return ret;
+
+ debug("i2c_xfer: %d messages\n", nmsgs);
+ for (; nmsgs > 0; nmsgs--, msg++) {
+ if (msg->flags & I2C_M_RD) {
+ debug("i2c_read: chip=0x%x, len=0x%x, flags=0x%x\n",
+ msg->addr, msg->len, msg->flags);
+ ret = ast_i2c_read_data(dev, msg->addr, msg->buf,
+ msg->len, (nmsgs == 1));
+ } else {
+ debug("i2c_write: chip=0x%x, len=0x%x, flags=0x%x\n",
+ msg->addr, msg->len, msg->flags);
+ ret = ast_i2c_write_data(dev, msg->addr, msg->buf,
+ msg->len, (nmsgs == 1));
+ }
+ if (ret) {
+ debug("%s: error (%d)\n", __func__, ret);
+ return -EREMOTEIO;
+ }
+ }
+
+ return 0;
+}
+
+static int ast_i2c_set_speed(struct udevice *dev, unsigned int speed)
+{
+ struct ast_i2c_priv *priv = dev_get_priv(dev);
+ struct ast_i2c_regs *regs = priv->regs;
+ ulong i2c_rate, divider;
+
+ debug("Setting speed for I2C%d to <%u>\n", dev->seq, speed);
+ if (!speed) {
+ debug("No valid speed specified\n");
+ return -EINVAL;
+ }
+
+ i2c_rate = clk_get_rate(&priv->clk);
+ divider = i2c_rate / speed;
+
+ priv->speed = speed;
+ if (speed > I2C_HIGHSPEED_RATE) {
+ debug("Enable High Speed\n");
+ setbits_le32(®s->fcr, I2CD_M_HIGH_SPEED_EN
+ | I2CD_M_SDA_DRIVE_1T_EN
+ | I2CD_SDA_DRIVE_1T_EN);
+ writel(HIGHSPEED_TTIMEOUT, ®s->cactcr2);
+ } else {
+ debug("Enabling Normal Speed\n");
+ writel(I2CD_NO_TIMEOUT_CTRL, ®s->cactcr2);
+ }
+
+ writel(get_clk_reg_val(divider), ®s->cactcr1);
+ ast_i2c_clear_interrupts(dev);
+
+ return 0;
+}
+
+static const struct dm_i2c_ops ast_i2c_ops = {
+ .xfer = ast_i2c_xfer,
+ .set_bus_speed = ast_i2c_set_speed,
+ .deblock = ast_i2c_deblock,
+};
+
+static const struct udevice_id ast_i2c_ids[] = {
+ { .compatible = "aspeed,ast2400-i2c-bus" },
+ { .compatible = "aspeed,ast2500-i2c-bus" },
+ { },
+};
+
+U_BOOT_DRIVER(ast_i2c) = {
+ .name = "ast_i2c",
+ .id = UCLASS_I2C,
+ .of_match = ast_i2c_ids,
+ .probe = ast_i2c_probe,
+ .ofdata_to_platdata = ast_i2c_ofdata_to_platdata,
+ .priv_auto_alloc_size = sizeof(struct ast_i2c_priv),
+ .ops = &ast_i2c_ops,
+};
diff --git a/drivers/i2c/ast_i2c.h b/drivers/i2c/ast_i2c.h
new file mode 100644
index 00000000000..e5dec7a480c
--- /dev/null
+++ b/drivers/i2c/ast_i2c.h
@@ -0,0 +1,132 @@
+/*
+ * Copyright (C) 2012-2020 ASPEED Technology Inc.
+ * Copyright 2016 IBM Corporation
+ * Copyright 2017 Google, Inc.
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+#ifndef __AST_I2C_H_
+#define __AST_I2C_H_
+
+struct ast_i2c_regs {
+ u32 fcr;
+ u32 cactcr1;
+ u32 cactcr2;
+ u32 icr;
+ u32 isr;
+ u32 csr;
+ u32 sdar;
+ u32 pbcr;
+ u32 trbbr;
+#ifdef CONFIG_ASPEED_AST2500
+ u32 dma_mbar;
+ u32 dma_tlr;
+#endif
+};
+
+/* Device Register Definition */
+/* 0x00 : I2CD Function Control Register */
+#define I2CD_BUFF_SEL_MASK (0x7 << 20)
+#define I2CD_BUFF_SEL(x) (x << 20)
+#define I2CD_M_SDA_LOCK_EN (0x1 << 16)
+#define I2CD_MULTI_MASTER_DIS (0x1 << 15)
+#define I2CD_M_SCL_DRIVE_EN (0x1 << 14)
+#define I2CD_MSB_STS (0x1 << 9)
+#define I2CD_SDA_DRIVE_1T_EN (0x1 << 8)
+#define I2CD_M_SDA_DRIVE_1T_EN (0x1 << 7)
+#define I2CD_M_HIGH_SPEED_EN (0x1 << 6)
+#define I2CD_DEF_ADDR_EN (0x1 << 5)
+#define I2CD_DEF_ALERT_EN (0x1 << 4)
+#define I2CD_DEF_ARP_EN (0x1 << 3)
+#define I2CD_DEF_GCALL_EN (0x1 << 2)
+#define I2CD_SLAVE_EN (0x1 << 1)
+#define I2CD_MASTER_EN (0x1)
+
+/* 0x04 : I2CD Clock and AC Timing Control Register #1 */
+/* Base register value. These bits are always set by the driver. */
+#define I2CD_CACTC_BASE 0xfff00300
+#define I2CD_TCKHIGH_SHIFT 16
+#define I2CD_TCKLOW_SHIFT 12
+#define I2CD_THDDAT_SHIFT 10
+#define I2CD_TO_DIV_SHIFT 8
+#define I2CD_BASE_DIV_SHIFT 0
+
+/* 0x08 : I2CD Clock and AC Timing Control Register #2 */
+#define I2CD_tTIMEOUT 1
+#define I2CD_NO_TIMEOUT_CTRL 0
+
+/* 0x0c : I2CD Interrupt Control Register &
+ * 0x10 : I2CD Interrupt Status Register
+ *
+ * These share bit definitions, so use the same values for the enable &
+ * status bits.
+ */
+#define I2CD_INTR_SDA_DL_TIMEOUT (0x1 << 14)
+#define I2CD_INTR_BUS_RECOVER_DONE (0x1 << 13)
+#define I2CD_INTR_SMBUS_ALERT (0x1 << 12)
+#define I2CD_INTR_SMBUS_ARP_ADDR (0x1 << 11)
+#define I2CD_INTR_SMBUS_DEV_ALERT_ADDR (0x1 << 10)
+#define I2CD_INTR_SMBUS_DEF_ADDR (0x1 << 9)
+#define I2CD_INTR_GCALL_ADDR (0x1 << 8)
+#define I2CD_INTR_SLAVE_MATCH (0x1 << 7)
+#define I2CD_INTR_SCL_TIMEOUT (0x1 << 6)
+#define I2CD_INTR_ABNORMAL (0x1 << 5)
+#define I2CD_INTR_NORMAL_STOP (0x1 << 4)
+#define I2CD_INTR_ARBIT_LOSS (0x1 << 3)
+#define I2CD_INTR_RX_DONE (0x1 << 2)
+#define I2CD_INTR_TX_NAK (0x1 << 1)
+#define I2CD_INTR_TX_ACK (0x1 << 0)
+
+/* 0x14 : I2CD Command/Status Register */
+#define I2CD_SDA_OE (0x1 << 28)
+#define I2CD_SDA_O (0x1 << 27)
+#define I2CD_SCL_OE (0x1 << 26)
+#define I2CD_SCL_O (0x1 << 25)
+#define I2CD_TX_TIMING (0x1 << 24)
+#define I2CD_TX_STATUS (0x1 << 23)
+
+/* Tx State Machine */
+#define I2CD_IDLE 0x0
+#define I2CD_MACTIVE 0x8
+#define I2CD_MSTART 0x9
+#define I2CD_MSTARTR 0xa
+#define I2CD_MSTOP 0xb
+#define I2CD_MTXD 0xc
+#define I2CD_MRXACK 0xd
+#define I2CD_MRXD 0xe
+#define I2CD_MTXACK 0xf
+#define I2CD_SWAIT 0x1
+#define I2CD_SRXD 0x4
+#define I2CD_STXACK 0x5
+#define I2CD_STXD 0x6
+#define I2CD_SRXACK 0x7
+#define I2CD_RECOVER 0x3
+
+#define I2CD_SCL_LINE_STS (0x1 << 18)
+#define I2CD_SDA_LINE_STS (0x1 << 17)
+#define I2CD_BUS_BUSY_STS (0x1 << 16)
+#define I2CD_SDA_OE_OUT_DIR (0x1 << 15)
+#define I2CD_SDA_O_OUT_DIR (0x1 << 14)
+#define I2CD_SCL_OE_OUT_DIR (0x1 << 13)
+#define I2CD_SCL_O_OUT_DIR (0x1 << 12)
+#define I2CD_BUS_RECOVER_CMD (0x1 << 11)
+#define I2CD_S_ALT_EN (0x1 << 10)
+#define I2CD_RX_DMA_ENABLE (0x1 << 9)
+#define I2CD_TX_DMA_ENABLE (0x1 << 8)
+
+/* Command Bit */
+#define I2CD_RX_BUFF_ENABLE (0x1 << 7)
+#define I2CD_TX_BUFF_ENABLE (0x1 << 6)
+#define I2CD_M_STOP_CMD (0x1 << 5)
+#define I2CD_M_S_RX_CMD_LAST (0x1 << 4)
+#define I2CD_M_RX_CMD (0x1 << 3)
+#define I2CD_S_TX_CMD (0x1 << 2)
+#define I2CD_M_TX_CMD (0x1 << 1)
+#define I2CD_M_START_CMD 0x1
+
+#define I2CD_RX_DATA_SHIFT 8
+#define I2CD_RX_DATA_MASK (0xff << I2CD_RX_DATA_SHIFT)
+
+#define I2C_HIGHSPEED_RATE 400000
+
+#endif /* __AST_I2C_H_ */
--
GitLab
From 7a88543b50db930a19929fd87d04a1ff48ec35f5 Mon Sep 17 00:00:00 2001
From: "maxims@google.com" <maxims@google.com>
Date: Mon, 17 Apr 2017 12:00:31 -0700
Subject: [PATCH 268/282] aspeed: Enable I2C in EVB defconfig
Enable I2C driver in ast2500 Eval Board defconfig.
Also enable i2c command.
Signed-off-by: Maxim Sloyko <maxims@google.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
---
configs/evb-ast2500_defconfig | 3 +++
1 file changed, 3 insertions(+)
diff --git a/configs/evb-ast2500_defconfig b/configs/evb-ast2500_defconfig
index f8ef9b779ca..08b5f85a344 100644
--- a/configs/evb-ast2500_defconfig
+++ b/configs/evb-ast2500_defconfig
@@ -18,3 +18,6 @@ CONFIG_TIMER=y
CONFIG_WDT=y
CONFIG_DM_RESET=y
CONFIG_PINCTRL=y
+CONFIG_DM_I2C=y
+CONFIG_SYS_I2C_ASPEED=y
+CONFIG_CMD_I2C=y
--
GitLab
From 3b95902d47f89f95242ac143cd2a9ed1fd196157 Mon Sep 17 00:00:00 2001
From: "maxims@google.com" <maxims@google.com>
Date: Mon, 17 Apr 2017 12:00:32 -0700
Subject: [PATCH 269/282] aspeed: Add support for Clocks needed by MACs
Add support for clocks needed by MACs to ast2500 clock driver.
The clocks are D2-PLL, which is used by both MACs and PCLK_MAC1 and
PCLK_MAC2 for MAC1 and MAC2 respectively.
The rate of D2-PLL is hardcoded to 250MHz -- the value used in Aspeed
SDK. It is not entirely clear from the datasheet how this clock is used
by MACs, so not clear if the rate would ever need to be different. So,
for now, hardcoding it is probably safer.
The rate of PCLK_MAC{1,2} is chosen based on MAC speed selected through
hardware strapping.
So, the network driver would only need to enable these clocks, no need
to configure the rate.
Signed-off-by: Maxim Sloyko <maxims@google.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
---
arch/arm/dts/ast2500-u-boot.dtsi | 8 +
.../arm/include/asm/arch-aspeed/scu_ast2500.h | 62 +++-
drivers/clk/aspeed/clk_ast2500.c | 265 ++++++++++++++++--
include/dt-bindings/clock/ast2500-scu.h | 2 +
4 files changed, 304 insertions(+), 33 deletions(-)
diff --git a/arch/arm/dts/ast2500-u-boot.dtsi b/arch/arm/dts/ast2500-u-boot.dtsi
index faeeec1be4d..f826646095f 100644
--- a/arch/arm/dts/ast2500-u-boot.dtsi
+++ b/arch/arm/dts/ast2500-u-boot.dtsi
@@ -61,3 +61,11 @@
};
};
};
+
+&mac0 {
+ clocks = <&scu PCLK_MAC1>, <&scu PLL_D2PLL>;
+};
+
+&mac1 {
+ clocks = <&scu PCLK_MAC2>, <&scu PLL_D2PLL>;
+};
diff --git a/arch/arm/include/asm/arch-aspeed/scu_ast2500.h b/arch/arm/include/asm/arch-aspeed/scu_ast2500.h
index 319d75e05ce..fe877b54304 100644
--- a/arch/arm/include/asm/arch-aspeed/scu_ast2500.h
+++ b/arch/arm/include/asm/arch-aspeed/scu_ast2500.h
@@ -30,9 +30,36 @@
#define SCU_HPLL_POST_SHIFT 13
#define SCU_HPLL_POST_MASK 0x3f
+#define SCU_MACCLK_SHIFT 16
+#define SCU_MACCLK_MASK (7 << SCU_MACCLK_SHIFT)
+
+#define SCU_MISC2_RGMII_HPLL (1 << 23)
+#define SCU_MISC2_RGMII_CLKDIV_SHIFT 20
+#define SCU_MISC2_RGMII_CLKDIV_MASK (3 << SCU_MISC2_RGMII_CLKDIV_SHIFT)
+#define SCU_MISC2_RMII_MPLL (1 << 19)
+#define SCU_MISC2_RMII_CLKDIV_SHIFT 16
+#define SCU_MISC2_RMII_CLKDIV_MASK (3 << SCU_MISC2_RMII_CLKDIV_SHIFT)
#define SCU_MISC2_UARTCLK_SHIFT 24
+#define SCU_MISC_D2PLL_OFF (1 << 4)
#define SCU_MISC_UARTCLK_DIV13 (1 << 12)
+#define SCU_MISC_GCRT_USB20CLK (1 << 21)
+
+#define SCU_MICDS_MAC1RGMII_TXDLY_SHIFT 0
+#define SCU_MICDS_MAC1RGMII_TXDLY_MASK (0x3f\
+ << SCU_MICDS_MAC1RGMII_TXDLY_SHIFT)
+#define SCU_MICDS_MAC2RGMII_TXDLY_SHIFT 6
+#define SCU_MICDS_MAC2RGMII_TXDLY_MASK (0x3f\
+ << SCU_MICDS_MAC2RGMII_TXDLY_SHIFT)
+#define SCU_MICDS_MAC1RMII_RDLY_SHIFT 12
+#define SCU_MICDS_MAC1RMII_RDLY_MASK (0x3f << SCU_MICDS_MAC1RMII_RDLY_SHIFT)
+#define SCU_MICDS_MAC2RMII_RDLY_SHIFT 18
+#define SCU_MICDS_MAC2RMII_RDLY_MASK (0x3f << SCU_MICDS_MAC2RMII_RDLY_SHIFT)
+#define SCU_MICDS_MAC1RMII_TXFALL (1 << 24)
+#define SCU_MICDS_MAC2RMII_TXFALL (1 << 25)
+#define SCU_MICDS_RMII1_RCLKEN (1 << 29)
+#define SCU_MICDS_RMII2_RCLKEN (1 << 30)
+#define SCU_MICDS_RGMIIPLL (1 << 31)
/*
* SYSRESET is actually more like a Power register,
@@ -71,14 +98,45 @@
*/
#define SCU_PIN_FUN_MAC1_MDC (1 << 30)
#define SCU_PIN_FUN_MAC1_MDIO (1 << 31)
-#define SCU_PIN_FUN_MAC1_PHY_LINK (1 << 0)
+#define SCU_PIN_FUN_MAC1_PHY_LINK (1 << 0)
#define SCU_PIN_FUN_MAC2_MDIO (1 << 2)
-#define SCU_PIN_FUN_MAC2_PHY_LINK (1 << 1)
+#define SCU_PIN_FUN_MAC2_PHY_LINK (1 << 1)
#define SCU_PIN_FUN_SCL1 (1 << 12)
#define SCU_PIN_FUN_SCL2 (1 << 14)
#define SCU_PIN_FUN_SDA1 (1 << 13)
#define SCU_PIN_FUN_SDA2 (1 << 15)
+#define SCU_CLKSTOP_MAC1 (1 << 20)
+#define SCU_CLKSTOP_MAC2 (1 << 21)
+
+#define SCU_D2PLL_EXT1_OFF (1 << 0)
+#define SCU_D2PLL_EXT1_BYPASS (1 << 1)
+#define SCU_D2PLL_EXT1_RESET (1 << 2)
+#define SCU_D2PLL_EXT1_MODE_SHIFT 3
+#define SCU_D2PLL_EXT1_MODE_MASK (3 << SCU_D2PLL_EXT1_MODE_SHIFT)
+#define SCU_D2PLL_EXT1_PARAM_SHIFT 5
+#define SCU_D2PLL_EXT1_PARAM_MASK (0x1ff << SCU_D2PLL_EXT1_PARAM_SHIFT)
+
+#define SCU_D2PLL_NUM_SHIFT 0
+#define SCU_D2PLL_NUM_MASK (0xff << SCU_D2PLL_NUM_SHIFT)
+#define SCU_D2PLL_DENUM_SHIFT 8
+#define SCU_D2PLL_DENUM_MASK (0x1f << SCU_D2PLL_DENUM_SHIFT)
+#define SCU_D2PLL_POST_SHIFT 13
+#define SCU_D2PLL_POST_MASK (0x3f << SCU_D2PLL_POST_SHIFT)
+#define SCU_D2PLL_ODIV_SHIFT 19
+#define SCU_D2PLL_ODIV_MASK (7 << SCU_D2PLL_ODIV_SHIFT)
+#define SCU_D2PLL_SIC_SHIFT 22
+#define SCU_D2PLL_SIC_MASK (0x1f << SCU_D2PLL_SIC_SHIFT)
+#define SCU_D2PLL_SIP_SHIFT 27
+#define SCU_D2PLL_SIP_MASK (0x1f << SCU_D2PLL_SIP_SHIFT)
+
+#define SCU_CLKDUTY_DCLK_SHIFT 0
+#define SCU_CLKDUTY_DCLK_MASK (0x3f << SCU_CLKDUTY_DCLK_SHIFT)
+#define SCU_CLKDUTY_RGMII1TXCK_SHIFT 8
+#define SCU_CLKDUTY_RGMII1TXCK_MASK (0x7f << SCU_CLKDUTY_RGMII1TXCK_SHIFT)
+#define SCU_CLKDUTY_RGMII2TXCK_SHIFT 16
+#define SCU_CLKDUTY_RGMII2TXCK_MASK (0x7f << SCU_CLKDUTY_RGMII2TXCK_SHIFT)
+
#ifndef __ASSEMBLY__
struct ast2500_clk_priv {
diff --git a/drivers/clk/aspeed/clk_ast2500.c b/drivers/clk/aspeed/clk_ast2500.c
index 9e4c66ea85f..7b4b5c64ac7 100644
--- a/drivers/clk/aspeed/clk_ast2500.c
+++ b/drivers/clk/aspeed/clk_ast2500.c
@@ -12,16 +12,39 @@
#include <dm/lists.h>
#include <dt-bindings/clock/ast2500-scu.h>
+/*
+ * MAC Clock Delay settings, taken from Aspeed SDK
+ */
+#define RGMII_TXCLK_ODLY 8
+#define RMII_RXCLK_IDLY 2
+
+/*
+ * TGMII Clock Duty constants, taken from Aspeed SDK
+ */
+#define RGMII2_TXCK_DUTY 0x66
+#define RGMII1_TXCK_DUTY 0x64
+
+#define D2PLL_DEFAULT_RATE (250 * 1000 * 1000)
+
DECLARE_GLOBAL_DATA_PTR;
/*
+ * Clock divider/multiplier configuration struct.
* For H-PLL and M-PLL the formula is
* (Output Frequency) = CLKIN * ((M + 1) / (N + 1)) / (P + 1)
* M - Numerator
* N - Denumerator
* P - Post Divider
* They have the same layout in their control register.
+ *
+ * D-PLL and D2-PLL have extra divider (OD + 1), which is not
+ * yet needed and ignored by clock configurations.
*/
+struct ast2500_div_config {
+ unsigned int num;
+ unsigned int denum;
+ unsigned int post_div;
+};
/*
* Get the rate of the M-PLL clock from input clock frequency and
@@ -143,30 +166,41 @@ static ulong ast2500_clk_get_rate(struct clk *clk)
return rate;
}
-static ulong ast2500_configure_ddr(struct ast2500_scu *scu, ulong rate)
+/*
+ * @input_rate - the rate of input clock in Hz
+ * @requested_rate - desired output rate in Hz
+ * @div - this is an IN/OUT parameter, at input all fields of the config
+ * need to be set to their maximum allowed values.
+ * The result (the best config we could find), would also be returned
+ * in this structure.
+ *
+ * @return The clock rate, when the resulting div_config is used.
+ */
+static ulong ast2500_calc_clock_config(ulong input_rate, ulong requested_rate,
+ struct ast2500_div_config *cfg)
{
- ulong clkin = ast2500_get_clkin(scu);
- u32 mpll_reg;
-
/*
- * There are not that many combinations of numerator, denumerator
- * and post divider, so just brute force the best combination.
- * However, to avoid overflow when multiplying, use kHz.
+ * The assumption is that kHz precision is good enough and
+ * also enough to avoid overflow when multiplying.
*/
- const ulong clkin_khz = clkin / 1000;
- const ulong rate_khz = rate / 1000;
- ulong best_num = 0;
- ulong best_denum = 0;
- ulong best_post = 0;
- ulong delta = rate;
- ulong num, denum, post;
-
- for (denum = 0; denum <= SCU_MPLL_DENUM_MASK; ++denum) {
- for (post = 0; post <= SCU_MPLL_POST_MASK; ++post) {
- num = (rate_khz * (post + 1) / clkin_khz) * (denum + 1);
- ulong new_rate_khz = (clkin_khz
- * ((num + 1) / (denum + 1)))
- / (post + 1);
+ const ulong input_rate_khz = input_rate / 1000;
+ const ulong rate_khz = requested_rate / 1000;
+ const struct ast2500_div_config max_vals = *cfg;
+ struct ast2500_div_config it = { 0, 0, 0 };
+ ulong delta = rate_khz;
+ ulong new_rate_khz = 0;
+
+ for (; it.denum <= max_vals.denum; ++it.denum) {
+ for (it.post_div = 0; it.post_div <= max_vals.post_div;
+ ++it.post_div) {
+ it.num = (rate_khz * (it.post_div + 1) / input_rate_khz)
+ * (it.denum + 1);
+ if (it.num > max_vals.num)
+ continue;
+
+ new_rate_khz = (input_rate_khz
+ * ((it.num + 1) / (it.denum + 1)))
+ / (it.post_div + 1);
/* Keep the rate below requested one. */
if (new_rate_khz > rate_khz)
@@ -174,25 +208,35 @@ static ulong ast2500_configure_ddr(struct ast2500_scu *scu, ulong rate)
if (new_rate_khz - rate_khz < delta) {
delta = new_rate_khz - rate_khz;
-
- best_num = num;
- best_denum = denum;
- best_post = post;
-
+ *cfg = it;
if (delta == 0)
- goto rate_calc_done;
+ return new_rate_khz * 1000;
}
}
}
- rate_calc_done:
+ return new_rate_khz * 1000;
+}
+
+static ulong ast2500_configure_ddr(struct ast2500_scu *scu, ulong rate)
+{
+ ulong clkin = ast2500_get_clkin(scu);
+ u32 mpll_reg;
+ struct ast2500_div_config div_cfg = {
+ .num = SCU_MPLL_NUM_MASK,
+ .denum = SCU_MPLL_DENUM_MASK,
+ .post_div = SCU_MPLL_POST_MASK
+ };
+
+ ast2500_calc_clock_config(clkin, rate, &div_cfg);
+
mpll_reg = readl(&scu->m_pll_param);
mpll_reg &= ~((SCU_MPLL_POST_MASK << SCU_MPLL_POST_SHIFT)
| (SCU_MPLL_NUM_MASK << SCU_MPLL_NUM_SHIFT)
| (SCU_MPLL_DENUM_MASK << SCU_MPLL_DENUM_SHIFT));
- mpll_reg |= (best_post << SCU_MPLL_POST_SHIFT)
- | (best_num << SCU_MPLL_NUM_SHIFT)
- | (best_denum << SCU_MPLL_DENUM_SHIFT);
+ mpll_reg |= (div_cfg.post_div << SCU_MPLL_POST_SHIFT)
+ | (div_cfg.num << SCU_MPLL_NUM_SHIFT)
+ | (div_cfg.denum << SCU_MPLL_DENUM_SHIFT);
ast_scu_unlock(scu);
writel(mpll_reg, &scu->m_pll_param);
@@ -201,6 +245,136 @@ static ulong ast2500_configure_ddr(struct ast2500_scu *scu, ulong rate)
return ast2500_get_mpll_rate(clkin, mpll_reg);
}
+static ulong ast2500_configure_mac(struct ast2500_scu *scu, int index)
+{
+ ulong clkin = ast2500_get_clkin(scu);
+ ulong hpll_rate = ast2500_get_hpll_rate(clkin,
+ readl(&scu->h_pll_param));
+ ulong required_rate;
+ u32 hwstrap;
+ u32 divisor;
+ u32 reset_bit;
+ u32 clkstop_bit;
+
+ /*
+ * According to data sheet, for 10/100 mode the MAC clock frequency
+ * should be at least 25MHz and for 1000 mode at least 100MHz
+ */
+ hwstrap = readl(&scu->hwstrap);
+ if (hwstrap & (SCU_HWSTRAP_MAC1_RGMII | SCU_HWSTRAP_MAC2_RGMII))
+ required_rate = 100 * 1000 * 1000;
+ else
+ required_rate = 25 * 1000 * 1000;
+
+ divisor = hpll_rate / required_rate;
+
+ if (divisor < 4) {
+ /* Clock can't run fast enough, but let's try anyway */
+ debug("MAC clock too slow\n");
+ divisor = 4;
+ } else if (divisor > 16) {
+ /* Can't slow down the clock enough, but let's try anyway */
+ debug("MAC clock too fast\n");
+ divisor = 16;
+ }
+
+ switch (index) {
+ case 1:
+ reset_bit = SCU_SYSRESET_MAC1;
+ clkstop_bit = SCU_CLKSTOP_MAC1;
+ break;
+ case 2:
+ reset_bit = SCU_SYSRESET_MAC2;
+ clkstop_bit = SCU_CLKSTOP_MAC2;
+ break;
+ default:
+ return -EINVAL;
+ }
+
+ ast_scu_unlock(scu);
+ clrsetbits_le32(&scu->clk_sel1, SCU_MACCLK_MASK,
+ ((divisor - 2) / 2) << SCU_MACCLK_SHIFT);
+
+ /*
+ * Disable MAC, start its clock and re-enable it.
+ * The procedure and the delays (100us & 10ms) are
+ * specified in the datasheet.
+ */
+ setbits_le32(&scu->sysreset_ctrl1, reset_bit);
+ udelay(100);
+ clrbits_le32(&scu->clk_stop_ctrl1, clkstop_bit);
+ mdelay(10);
+ clrbits_le32(&scu->sysreset_ctrl1, reset_bit);
+
+ writel((RGMII2_TXCK_DUTY << SCU_CLKDUTY_RGMII2TXCK_SHIFT)
+ | (RGMII1_TXCK_DUTY << SCU_CLKDUTY_RGMII1TXCK_SHIFT),
+ &scu->clk_duty_sel);
+
+ ast_scu_lock(scu);
+
+ return required_rate;
+}
+
+static ulong ast2500_configure_d2pll(struct ast2500_scu *scu, ulong rate)
+{
+ /*
+ * The values and the meaning of the next three
+ * parameters are undocumented. Taken from Aspeed SDK.
+ */
+ const u32 d2_pll_ext_param = 0x2c;
+ const u32 d2_pll_sip = 0x11;
+ const u32 d2_pll_sic = 0x18;
+ u32 clk_delay_settings =
+ (RMII_RXCLK_IDLY << SCU_MICDS_MAC1RMII_RDLY_SHIFT)
+ | (RMII_RXCLK_IDLY << SCU_MICDS_MAC2RMII_RDLY_SHIFT)
+ | (RGMII_TXCLK_ODLY << SCU_MICDS_MAC1RGMII_TXDLY_SHIFT)
+ | (RGMII_TXCLK_ODLY << SCU_MICDS_MAC2RGMII_TXDLY_SHIFT);
+ struct ast2500_div_config div_cfg = {
+ .num = SCU_D2PLL_NUM_MASK >> SCU_D2PLL_NUM_SHIFT,
+ .denum = SCU_D2PLL_DENUM_MASK >> SCU_D2PLL_DENUM_SHIFT,
+ .post_div = SCU_D2PLL_POST_MASK >> SCU_D2PLL_POST_SHIFT,
+ };
+ ulong clkin = ast2500_get_clkin(scu);
+ ulong new_rate;
+
+ ast_scu_unlock(scu);
+ writel((d2_pll_ext_param << SCU_D2PLL_EXT1_PARAM_SHIFT)
+ | SCU_D2PLL_EXT1_OFF
+ | SCU_D2PLL_EXT1_RESET, &scu->d2_pll_ext_param[0]);
+
+ /*
+ * Select USB2.0 port1 PHY clock as a clock source for GCRT.
+ * This would disconnect it from D2-PLL.
+ */
+ clrsetbits_le32(&scu->misc_ctrl1, SCU_MISC_D2PLL_OFF,
+ SCU_MISC_GCRT_USB20CLK);
+
+ new_rate = ast2500_calc_clock_config(clkin, rate, &div_cfg);
+ writel((d2_pll_sip << SCU_D2PLL_SIP_SHIFT)
+ | (d2_pll_sic << SCU_D2PLL_SIC_SHIFT)
+ | (div_cfg.num << SCU_D2PLL_NUM_SHIFT)
+ | (div_cfg.denum << SCU_D2PLL_DENUM_SHIFT)
+ | (div_cfg.post_div << SCU_D2PLL_POST_SHIFT),
+ &scu->d2_pll_param);
+
+ clrbits_le32(&scu->d2_pll_ext_param[0],
+ SCU_D2PLL_EXT1_OFF | SCU_D2PLL_EXT1_RESET);
+
+ clrsetbits_le32(&scu->misc_ctrl2,
+ SCU_MISC2_RGMII_HPLL | SCU_MISC2_RMII_MPLL
+ | SCU_MISC2_RGMII_CLKDIV_MASK |
+ SCU_MISC2_RMII_CLKDIV_MASK,
+ (4 << SCU_MISC2_RMII_CLKDIV_SHIFT));
+
+ writel(clk_delay_settings | SCU_MICDS_RGMIIPLL, &scu->mac_clk_delay);
+ writel(clk_delay_settings, &scu->mac_clk_delay_100M);
+ writel(clk_delay_settings, &scu->mac_clk_delay_10M);
+
+ ast_scu_lock(scu);
+
+ return new_rate;
+}
+
static ulong ast2500_clk_set_rate(struct clk *clk, ulong rate)
{
struct ast2500_clk_priv *priv = dev_get_priv(clk->dev);
@@ -211,6 +385,9 @@ static ulong ast2500_clk_set_rate(struct clk *clk, ulong rate)
case MCLK_DDR:
new_rate = ast2500_configure_ddr(priv->scu, rate);
break;
+ case PLL_D2PLL:
+ new_rate = ast2500_configure_d2pll(priv->scu, rate);
+ break;
default:
return -ENOENT;
}
@@ -218,9 +395,35 @@ static ulong ast2500_clk_set_rate(struct clk *clk, ulong rate)
return new_rate;
}
+static int ast2500_clk_enable(struct clk *clk)
+{
+ struct ast2500_clk_priv *priv = dev_get_priv(clk->dev);
+
+ switch (clk->id) {
+ /*
+ * For MAC clocks the clock rate is
+ * configured based on whether RGMII or RMII mode has been selected
+ * through hardware strapping.
+ */
+ case PCLK_MAC1:
+ ast2500_configure_mac(priv->scu, 1);
+ break;
+ case PCLK_MAC2:
+ ast2500_configure_mac(priv->scu, 2);
+ break;
+ case PLL_D2PLL:
+ ast2500_configure_d2pll(priv->scu, D2PLL_DEFAULT_RATE);
+ default:
+ return -ENOENT;
+ }
+
+ return 0;
+}
+
struct clk_ops ast2500_clk_ops = {
.get_rate = ast2500_clk_get_rate,
.set_rate = ast2500_clk_set_rate,
+ .enable = ast2500_clk_enable,
};
static int ast2500_clk_probe(struct udevice *dev)
diff --git a/include/dt-bindings/clock/ast2500-scu.h b/include/dt-bindings/clock/ast2500-scu.h
index ca58b12943b..e2d7aaf9fe8 100644
--- a/include/dt-bindings/clock/ast2500-scu.h
+++ b/include/dt-bindings/clock/ast2500-scu.h
@@ -27,3 +27,5 @@
#define PCLK_UART3 503
#define PCLK_UART4 504
#define PCLK_UART5 505
+#define PCLK_MAC1 506
+#define PCLK_MAC2 507
--
GitLab
From defb184904c05df8ca49bd0265969ce72cb92401 Mon Sep 17 00:00:00 2001
From: "maxims@google.com" <maxims@google.com>
Date: Mon, 17 Apr 2017 12:00:33 -0700
Subject: [PATCH 270/282] aspeed: Refactor SCU to use consistent mask & shift
Refactor SCU header to use consistent Mask & Shift values.
Now, consistently, to read value from SCU register, mask needs
to be applied before shift.
Signed-off-by: Maxim Sloyko <maxims@google.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
---
.../arm/include/asm/arch-aspeed/scu_ast2500.h | 12 +++---
arch/arm/mach-aspeed/ast2500/sdram_ast2500.c | 5 +--
drivers/clk/aspeed/clk_ast2500.c | 39 +++++++++----------
3 files changed, 27 insertions(+), 29 deletions(-)
diff --git a/arch/arm/include/asm/arch-aspeed/scu_ast2500.h b/arch/arm/include/asm/arch-aspeed/scu_ast2500.h
index fe877b54304..590aed2f6c2 100644
--- a/arch/arm/include/asm/arch-aspeed/scu_ast2500.h
+++ b/arch/arm/include/asm/arch-aspeed/scu_ast2500.h
@@ -8,8 +8,8 @@
#define SCU_UNLOCK_VALUE 0x1688a8a8
-#define SCU_HWSTRAP_VGAMEM_MASK 3
#define SCU_HWSTRAP_VGAMEM_SHIFT 2
+#define SCU_HWSTRAP_VGAMEM_MASK (3 << SCU_HWSTRAP_VGAMEM_SHIFT)
#define SCU_HWSTRAP_MAC1_RGMII (1 << 6)
#define SCU_HWSTRAP_MAC2_RGMII (1 << 7)
#define SCU_HWSTRAP_DDR4 (1 << 24)
@@ -18,17 +18,17 @@
#define SCU_MPLL_DENUM_SHIFT 0
#define SCU_MPLL_DENUM_MASK 0x1f
#define SCU_MPLL_NUM_SHIFT 5
-#define SCU_MPLL_NUM_MASK 0xff
+#define SCU_MPLL_NUM_MASK (0xff << SCU_MPLL_NUM_SHIFT)
#define SCU_MPLL_POST_SHIFT 13
-#define SCU_MPLL_POST_MASK 0x3f
+#define SCU_MPLL_POST_MASK (0x3f << SCU_MPLL_POST_SHIFT)
#define SCU_PCLK_DIV_SHIFT 23
-#define SCU_PCLK_DIV_MASK 7
+#define SCU_PCLK_DIV_MASK (7 << SCU_PCLK_DIV_SHIFT)
#define SCU_HPLL_DENUM_SHIFT 0
#define SCU_HPLL_DENUM_MASK 0x1f
#define SCU_HPLL_NUM_SHIFT 5
-#define SCU_HPLL_NUM_MASK 0xff
+#define SCU_HPLL_NUM_MASK (0xff << SCU_HPLL_NUM_SHIFT)
#define SCU_HPLL_POST_SHIFT 13
-#define SCU_HPLL_POST_MASK 0x3f
+#define SCU_HPLL_POST_MASK (0x3f << SCU_HPLL_POST_SHIFT)
#define SCU_MACCLK_SHIFT 16
#define SCU_MACCLK_MASK (7 << SCU_MACCLK_SHIFT)
diff --git a/arch/arm/mach-aspeed/ast2500/sdram_ast2500.c b/arch/arm/mach-aspeed/ast2500/sdram_ast2500.c
index efcf452b178..6383f727f2a 100644
--- a/arch/arm/mach-aspeed/ast2500/sdram_ast2500.c
+++ b/arch/arm/mach-aspeed/ast2500/sdram_ast2500.c
@@ -183,9 +183,8 @@ static int ast2500_sdrammc_ddr4_calibrate_vref(struct dram_info *info)
static size_t ast2500_sdrammc_get_vga_mem_size(struct dram_info *info)
{
size_t vga_mem_size_base = 8 * 1024 * 1024;
- u32 vga_hwconf = (readl(&info->scu->hwstrap)
- >> SCU_HWSTRAP_VGAMEM_SHIFT)
- & SCU_HWSTRAP_VGAMEM_MASK;
+ u32 vga_hwconf = (readl(&info->scu->hwstrap) & SCU_HWSTRAP_VGAMEM_MASK)
+ >> SCU_HWSTRAP_VGAMEM_SHIFT;
return vga_mem_size_base << vga_hwconf;
}
diff --git a/drivers/clk/aspeed/clk_ast2500.c b/drivers/clk/aspeed/clk_ast2500.c
index 7b4b5c64ac7..ccf47a1da11 100644
--- a/drivers/clk/aspeed/clk_ast2500.c
+++ b/drivers/clk/aspeed/clk_ast2500.c
@@ -52,11 +52,11 @@ struct ast2500_div_config {
*/
static ulong ast2500_get_mpll_rate(ulong clkin, u32 mpll_reg)
{
- const ulong num = (mpll_reg >> SCU_MPLL_NUM_SHIFT) & SCU_MPLL_NUM_MASK;
- const ulong denum = (mpll_reg >> SCU_MPLL_DENUM_SHIFT)
- & SCU_MPLL_DENUM_MASK;
- const ulong post_div = (mpll_reg >> SCU_MPLL_POST_SHIFT)
- & SCU_MPLL_POST_MASK;
+ const ulong num = (mpll_reg & SCU_MPLL_NUM_MASK) >> SCU_MPLL_NUM_SHIFT;
+ const ulong denum = (mpll_reg & SCU_MPLL_DENUM_MASK)
+ >> SCU_MPLL_DENUM_SHIFT;
+ const ulong post_div = (mpll_reg & SCU_MPLL_POST_MASK)
+ >> SCU_MPLL_POST_SHIFT;
return (clkin * ((num + 1) / (denum + 1))) / (post_div + 1);
}
@@ -67,11 +67,11 @@ static ulong ast2500_get_mpll_rate(ulong clkin, u32 mpll_reg)
*/
static ulong ast2500_get_hpll_rate(ulong clkin, u32 hpll_reg)
{
- const ulong num = (hpll_reg >> SCU_HPLL_NUM_SHIFT) & SCU_HPLL_NUM_MASK;
- const ulong denum = (hpll_reg >> SCU_HPLL_DENUM_SHIFT)
- & SCU_HPLL_DENUM_MASK;
- const ulong post_div = (hpll_reg >> SCU_HPLL_POST_SHIFT)
- & SCU_HPLL_POST_MASK;
+ const ulong num = (hpll_reg & SCU_HPLL_NUM_MASK) >> SCU_HPLL_NUM_SHIFT;
+ const ulong denum = (hpll_reg & SCU_HPLL_DENUM_MASK)
+ >> SCU_HPLL_DENUM_SHIFT;
+ const ulong post_div = (hpll_reg & SCU_HPLL_POST_MASK)
+ >> SCU_HPLL_POST_SHIFT;
return (clkin * ((num + 1) / (denum + 1))) / (post_div + 1);
}
@@ -136,11 +136,11 @@ static ulong ast2500_clk_get_rate(struct clk *clk)
case BCLK_PCLK:
{
ulong apb_div = 4 + 4 * ((readl(&priv->scu->clk_sel1)
- >> SCU_PCLK_DIV_SHIFT) &
- SCU_PCLK_DIV_MASK);
+ & SCU_PCLK_DIV_MASK)
+ >> SCU_PCLK_DIV_SHIFT);
rate = ast2500_get_hpll_rate(clkin,
- readl(&priv->scu->
- h_pll_param));
+ readl(&priv->
+ scu->h_pll_param));
rate = rate / apb_div;
}
break;
@@ -223,17 +223,16 @@ static ulong ast2500_configure_ddr(struct ast2500_scu *scu, ulong rate)
ulong clkin = ast2500_get_clkin(scu);
u32 mpll_reg;
struct ast2500_div_config div_cfg = {
- .num = SCU_MPLL_NUM_MASK,
- .denum = SCU_MPLL_DENUM_MASK,
- .post_div = SCU_MPLL_POST_MASK
+ .num = (SCU_MPLL_NUM_MASK >> SCU_MPLL_NUM_SHIFT),
+ .denum = (SCU_MPLL_DENUM_MASK >> SCU_MPLL_DENUM_SHIFT),
+ .post_div = (SCU_MPLL_POST_MASK >> SCU_MPLL_POST_SHIFT),
};
ast2500_calc_clock_config(clkin, rate, &div_cfg);
mpll_reg = readl(&scu->m_pll_param);
- mpll_reg &= ~((SCU_MPLL_POST_MASK << SCU_MPLL_POST_SHIFT)
- | (SCU_MPLL_NUM_MASK << SCU_MPLL_NUM_SHIFT)
- | (SCU_MPLL_DENUM_MASK << SCU_MPLL_DENUM_SHIFT));
+ mpll_reg &= ~(SCU_MPLL_POST_MASK | SCU_MPLL_NUM_MASK
+ | SCU_MPLL_DENUM_MASK);
mpll_reg |= (div_cfg.post_div << SCU_MPLL_POST_SHIFT)
| (div_cfg.num << SCU_MPLL_NUM_SHIFT)
| (div_cfg.denum << SCU_MPLL_DENUM_SHIFT);
--
GitLab
From d5c16d00932f819fa161b156c237a56683608078 Mon Sep 17 00:00:00 2001
From: "maxims@google.com" <maxims@google.com>
Date: Mon, 17 Apr 2017 12:00:34 -0700
Subject: [PATCH 271/282] aspeed: Cleanup ast2500-u-boot.dtsi Device Tree
Remove unnecessary apb and ahb nodes and just override necessary
nodes/values.
Signed-off-by: Maxim Sloyko <maxims@google.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
---
arch/arm/dts/ast2500-u-boot.dtsi | 41 ++++++++++++++++----------------
1 file changed, 21 insertions(+), 20 deletions(-)
diff --git a/arch/arm/dts/ast2500-u-boot.dtsi b/arch/arm/dts/ast2500-u-boot.dtsi
index f826646095f..7f80bad7d05 100644
--- a/arch/arm/dts/ast2500-u-boot.dtsi
+++ b/arch/arm/dts/ast2500-u-boot.dtsi
@@ -34,32 +34,33 @@
apb {
u-boot,dm-pre-reloc;
+ };
- timer: timer@1e782000 {
- u-boot,dm-pre-reloc;
- };
+ };
+};
- uart1: serial@1e783000 {
- clocks = <&scu PCLK_UART1>;
- };
+&uart1 {
+ clocks = <&scu PCLK_UART1>;
+};
- uart2: serial@1e78d000 {
- clocks = <&scu PCLK_UART2>;
- };
+&uart2 {
+ clocks = <&scu PCLK_UART2>;
+};
- uart3: serial@1e78e000 {
- clocks = <&scu PCLK_UART3>;
- };
+&uart3 {
+ clocks = <&scu PCLK_UART3>;
+};
- uart4: serial@1e78f000 {
- clocks = <&scu PCLK_UART4>;
- };
+&uart4 {
+ clocks = <&scu PCLK_UART4>;
+};
- uart5: serial@1e784000 {
- clocks = <&scu PCLK_UART5>;
- };
- };
- };
+&uart5 {
+ clocks = <&scu PCLK_UART5>;
+};
+
+&timer {
+ u-boot,dm-pre-reloc;
};
&mac0 {
--
GitLab
From 8776350d87c6aa02644a345f2fad04f3f952e48a Mon Sep 17 00:00:00 2001
From: Nisal Menuka <nisalmenuka23@gmail.com>
Date: Wed, 26 Apr 2017 16:18:01 -0500
Subject: [PATCH 272/282] Add ARM errata workaround 852421 and 852423 for
Cortex-A17
ARM errata 852421 and 852423 applies to r1p0, r1p1 and r1p2
revisions of Cortex-A17 processors. These workarounds
exist in Linux kernel and I thought it would be better
to add them in to U-Boot.
Signed-off-by: Nisal Menuka <nisalmenuka23@gmail.com>
---
arch/arm/Kconfig | 6 ++++++
arch/arm/cpu/armv7/start.S | 12 ++++++++++++
2 files changed, 18 insertions(+)
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 08480ac36d3..054ccac12bd 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -88,6 +88,12 @@ config ARM_ERRATA_833069
config ARM_ERRATA_833471
bool
+config ARM_ERRATA_852421
+ bool
+
+config ARM_ERRATA_852423
+ bool
+
config CPU_ARM720T
bool
select SYS_CACHE_SHIFT_5
diff --git a/arch/arm/cpu/armv7/start.S b/arch/arm/cpu/armv7/start.S
index 1a6aee94424..f06fd28940e 100644
--- a/arch/arm/cpu/armv7/start.S
+++ b/arch/arm/cpu/armv7/start.S
@@ -283,6 +283,18 @@ skip_errata_621766:
skip_errata_725233:
#endif
+#ifdef CONFIG_ARM_ERRATA_852421
+ mrc p15, 0, r0, c15, c0, 1 @ read diagnostic register
+ orr r0, r0, #1 << 24 @ set bit #24
+ mcr p15, 0, r0, c15, c0, 1 @ write diagnostic register
+#endif
+
+#ifdef CONFIG_ARM_ERRATA_852423
+ mrc p15, 0, r0, c15, c0, 1 @ read diagnostic register
+ orr r0, r0, #1 << 12 @ set bit #12
+ mcr p15, 0, r0, c15, c0, 1 @ write diagnostic register
+#endif
+
mov pc, r5 @ back to my caller
ENDPROC(cpu_init_cp15)
--
GitLab
From 690485e01b303ed716681c0dee840c2a78448530 Mon Sep 17 00:00:00 2001
From: Lokesh Vutla <lokeshvutla@ti.com>
Date: Thu, 27 Apr 2017 15:43:58 +0530
Subject: [PATCH 273/282] board: ti: Define Kconfig symbol for common cmd
options
Instead of defining command options in every defconfig,
define a common Kconfig symbol that consolidates all command
options that are supported by any TI platform. Also use imply
keyword so that that specific option can be disabled if
not required.
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
---
board/ti/common/Kconfig | 26 ++++++++++++++++++++++++++
1 file changed, 26 insertions(+)
diff --git a/board/ti/common/Kconfig b/board/ti/common/Kconfig
index 15b5ccf741b..08c39d94098 100644
--- a/board/ti/common/Kconfig
+++ b/board/ti/common/Kconfig
@@ -13,3 +13,29 @@ config EEPROM_CHIP_ADDRESS
hex "Board EEPROM's I2C chip address"
range 0 0xff
default 0x50
+
+config TI_COMMON_CMD_OPTIONS
+ bool "Enable cmd options on TI platforms"
+ imply CMD_ASKENV
+ imply CMD_BOOTZ
+ imply CMD_DFU if USB_GADGET_DOWNLOAD
+ imply CMD_DHCP
+ imply CMD_EXT2
+ imply CMD_EXT4
+ imply CMD_EXT4_WRITE
+ imply CMD_FASTBOOT if FASTBOOT
+ imply CMD_FAT
+ imply CMD_FS_GENERIC
+ imply CMD_GPIO
+ imply CMD_GPT
+ imply CMD_I2C
+ imply CMD_MII
+ imply CMD_MMC
+ imply CMD_PART
+ imply CMD_PING
+ imply CMD_PMIC if DM_PMIC
+ imply CMD_REGULATOR if DM_REGULATOR
+ imply CMD_SF if SPI_FLASH
+ imply CMD_SPI
+ imply CMD_TIME
+ imply CMD_USB if USB
--
GitLab
From 344edf0fee8df476b14c71f23c631ac289d1673c Mon Sep 17 00:00:00 2001
From: Lokesh Vutla <lokeshvutla@ti.com>
Date: Thu, 27 Apr 2017 15:43:59 +0530
Subject: [PATCH 274/282] configs: am335x: Enable TI_COMMON_CMD_OPTIONS
Enable TI_COMMON_CMD_OPTIONS on all am335x platforms.
Also sync with savedefconfig.
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
[trini: Re-sync, add in boneblack*, evm_hs_{norboot,spiboot,usbspl} configs]
Signed-off-by: Tom Rini <trini@konsulko.com>
---
configs/am335x_boneblack_defconfig | 11 +----------
configs/am335x_boneblack_vboot_defconfig | 11 +----------
configs/am335x_evm_defconfig | 11 +----------
configs/am335x_evm_norboot_defconfig | 11 +----------
configs/am335x_evm_spiboot_defconfig | 11 +----------
configs/am335x_evm_usbspl_defconfig | 11 +----------
configs/am335x_hs_evm_defconfig | 10 +---------
7 files changed, 7 insertions(+), 69 deletions(-)
diff --git a/configs/am335x_boneblack_defconfig b/configs/am335x_boneblack_defconfig
index d3cb828e41e..487ece45822 100644
--- a/configs/am335x_boneblack_defconfig
+++ b/configs/am335x_boneblack_defconfig
@@ -1,5 +1,6 @@
CONFIG_ARM=y
CONFIG_ARCH_OMAP2PLUS=y
+CONFIG_TI_COMMON_CMD_OPTIONS=y
CONFIG_AM33XX=y
CONFIG_TARGET_AM335X_EVM=y
# CONFIG_SPL_NAND_SUPPORT is not set
@@ -18,18 +19,8 @@ CONFIG_AUTOBOOT_PROMPT="Press SPACE to abort autoboot in %d seconds\n"
CONFIG_AUTOBOOT_DELAY_STR="d"
CONFIG_AUTOBOOT_STOP_STR=" "
# CONFIG_CMD_IMLS is not set
-CONFIG_CMD_ASKENV=y
# CONFIG_CMD_FLASH is not set
-CONFIG_CMD_GPT=y
-CONFIG_CMD_MMC=y
-CONFIG_CMD_SF=y
-CONFIG_CMD_SPI=y
-CONFIG_CMD_I2C=y
-CONFIG_CMD_USB=y
-CONFIG_CMD_DFU=y
-CONFIG_CMD_GPIO=y
# CONFIG_CMD_SETEXPR is not set
-CONFIG_CMD_EXT4_WRITE=y
CONFIG_DFU_TFTP=y
CONFIG_DFU_MMC=y
CONFIG_DFU_RAM=y
diff --git a/configs/am335x_boneblack_vboot_defconfig b/configs/am335x_boneblack_vboot_defconfig
index 109e2a26369..198efb48927 100644
--- a/configs/am335x_boneblack_vboot_defconfig
+++ b/configs/am335x_boneblack_vboot_defconfig
@@ -1,5 +1,6 @@
CONFIG_ARM=y
CONFIG_ARCH_OMAP2PLUS=y
+CONFIG_TI_COMMON_CMD_OPTIONS=y
CONFIG_AM33XX=y
CONFIG_TARGET_AM335X_EVM=y
# CONFIG_SPL_NAND_SUPPORT is not set
@@ -21,18 +22,8 @@ CONFIG_AUTOBOOT_PROMPT="Press SPACE to abort autoboot in %d seconds\n"
CONFIG_AUTOBOOT_DELAY_STR="d"
CONFIG_AUTOBOOT_STOP_STR=" "
# CONFIG_CMD_IMLS is not set
-CONFIG_CMD_ASKENV=y
# CONFIG_CMD_FLASH is not set
-CONFIG_CMD_GPT=y
-CONFIG_CMD_MMC=y
-CONFIG_CMD_SF=y
-CONFIG_CMD_SPI=y
-CONFIG_CMD_I2C=y
-CONFIG_CMD_USB=y
-CONFIG_CMD_DFU=y
-CONFIG_CMD_GPIO=y
# CONFIG_CMD_SETEXPR is not set
-CONFIG_CMD_EXT4_WRITE=y
CONFIG_OF_CONTROL=y
# CONFIG_BLK is not set
CONFIG_DFU_MMC=y
diff --git a/configs/am335x_evm_defconfig b/configs/am335x_evm_defconfig
index 0e5afba52f4..c3237f51e40 100644
--- a/configs/am335x_evm_defconfig
+++ b/configs/am335x_evm_defconfig
@@ -1,5 +1,6 @@
CONFIG_ARM=y
CONFIG_ARCH_OMAP2PLUS=y
+CONFIG_TI_COMMON_CMD_OPTIONS=y
CONFIG_AM33XX=y
CONFIG_TARGET_AM335X_EVM=y
CONFIG_SPL_STACK_R_ADDR=0x82000000
@@ -16,18 +17,8 @@ CONFIG_SPL_MTD_SUPPORT=y
CONFIG_SPL_MUSB_NEW_SUPPORT=y
CONFIG_SPL_OS_BOOT=y
# CONFIG_CMD_IMLS is not set
-CONFIG_CMD_ASKENV=y
# CONFIG_CMD_FLASH is not set
-CONFIG_CMD_GPT=y
-CONFIG_CMD_MMC=y
-CONFIG_CMD_SF=y
-CONFIG_CMD_SPI=y
-CONFIG_CMD_I2C=y
-CONFIG_CMD_USB=y
-CONFIG_CMD_DFU=y
-CONFIG_CMD_GPIO=y
# CONFIG_CMD_SETEXPR is not set
-CONFIG_CMD_EXT4_WRITE=y
CONFIG_OF_CONTROL=y
CONFIG_OF_LIST="am335x-evm am335x-bone am335x-boneblack am335x-evmsk am335x-bonegreen am335x-icev2"
# CONFIG_BLK is not set
diff --git a/configs/am335x_evm_norboot_defconfig b/configs/am335x_evm_norboot_defconfig
index 023cea461ca..ef8cb0b28d6 100644
--- a/configs/am335x_evm_norboot_defconfig
+++ b/configs/am335x_evm_norboot_defconfig
@@ -1,6 +1,7 @@
CONFIG_ARM=y
# CONFIG_SYS_THUMB_BUILD is not set
CONFIG_ARCH_OMAP2PLUS=y
+CONFIG_TI_COMMON_CMD_OPTIONS=y
CONFIG_AM33XX=y
CONFIG_TARGET_AM335X_EVM=y
CONFIG_NOR=y
@@ -11,17 +12,7 @@ CONFIG_VERSION_VARIABLE=y
CONFIG_ARCH_MISC_INIT=y
CONFIG_BOARD_EARLY_INIT_F=y
# CONFIG_CMD_IMLS is not set
-CONFIG_CMD_ASKENV=y
-CONFIG_CMD_GPT=y
-CONFIG_CMD_MMC=y
-CONFIG_CMD_SF=y
-CONFIG_CMD_SPI=y
-CONFIG_CMD_I2C=y
-CONFIG_CMD_USB=y
-CONFIG_CMD_DFU=y
-CONFIG_CMD_GPIO=y
# CONFIG_CMD_SETEXPR is not set
-CONFIG_CMD_EXT4_WRITE=y
CONFIG_DFU_MMC=y
CONFIG_DFU_RAM=y
CONFIG_MMC_OMAP_HS=y
diff --git a/configs/am335x_evm_spiboot_defconfig b/configs/am335x_evm_spiboot_defconfig
index c9373f91576..ece79c2f46d 100644
--- a/configs/am335x_evm_spiboot_defconfig
+++ b/configs/am335x_evm_spiboot_defconfig
@@ -1,5 +1,6 @@
CONFIG_ARM=y
CONFIG_ARCH_OMAP2PLUS=y
+CONFIG_TI_COMMON_CMD_OPTIONS=y
CONFIG_AM33XX=y
CONFIG_TARGET_AM335X_EVM=y
# CONFIG_SPL_NAND_SUPPORT is not set
@@ -16,18 +17,8 @@ CONFIG_SPL=y
CONFIG_SPL_STACK_R=y
CONFIG_SPL_MUSB_NEW_SUPPORT=y
# CONFIG_CMD_IMLS is not set
-CONFIG_CMD_ASKENV=y
# CONFIG_CMD_FLASH is not set
-CONFIG_CMD_GPT=y
-CONFIG_CMD_MMC=y
-CONFIG_CMD_SF=y
-CONFIG_CMD_SPI=y
-CONFIG_CMD_I2C=y
-CONFIG_CMD_USB=y
-CONFIG_CMD_DFU=y
-CONFIG_CMD_GPIO=y
# CONFIG_CMD_SETEXPR is not set
-CONFIG_CMD_EXT4_WRITE=y
CONFIG_DFU_MMC=y
CONFIG_DFU_RAM=y
CONFIG_MMC_OMAP_HS=y
diff --git a/configs/am335x_evm_usbspl_defconfig b/configs/am335x_evm_usbspl_defconfig
index 04005f0e777..ee3405cbabc 100644
--- a/configs/am335x_evm_usbspl_defconfig
+++ b/configs/am335x_evm_usbspl_defconfig
@@ -1,5 +1,6 @@
CONFIG_ARM=y
CONFIG_ARCH_OMAP2PLUS=y
+CONFIG_TI_COMMON_CMD_OPTIONS=y
CONFIG_AM33XX=y
CONFIG_TARGET_AM335X_EVM=y
CONFIG_SPL_STACK_R_ADDR=0x82000000
@@ -15,18 +16,8 @@ CONFIG_SPL_MUSB_NEW_SUPPORT=y
CONFIG_SPL_NET_SUPPORT=y
CONFIG_SPL_OS_BOOT=y
# CONFIG_CMD_IMLS is not set
-CONFIG_CMD_ASKENV=y
# CONFIG_CMD_FLASH is not set
-CONFIG_CMD_GPT=y
-CONFIG_CMD_MMC=y
-CONFIG_CMD_SF=y
-CONFIG_CMD_SPI=y
-CONFIG_CMD_I2C=y
-CONFIG_CMD_USB=y
-CONFIG_CMD_DFU=y
-CONFIG_CMD_GPIO=y
# CONFIG_CMD_SETEXPR is not set
-CONFIG_CMD_EXT4_WRITE=y
CONFIG_DFU_MMC=y
CONFIG_DFU_NAND=y
CONFIG_DFU_RAM=y
diff --git a/configs/am335x_hs_evm_defconfig b/configs/am335x_hs_evm_defconfig
index 62e763dbf96..73c9d012fd3 100644
--- a/configs/am335x_hs_evm_defconfig
+++ b/configs/am335x_hs_evm_defconfig
@@ -1,5 +1,6 @@
CONFIG_ARM=y
CONFIG_ARCH_OMAP2PLUS=y
+CONFIG_TI_COMMON_CMD_OPTIONS=y
CONFIG_AM33XX=y
CONFIG_TI_SECURE_DEVICE=y
CONFIG_TARGET_AM335X_EVM=y
@@ -22,17 +23,8 @@ CONFIG_SPL_STACK_R=y
CONFIG_SPL_MTD_SUPPORT=y
# CONFIG_SPL_YMODEM_SUPPORT is not set
# CONFIG_CMD_IMLS is not set
-CONFIG_CMD_ASKENV=y
# CONFIG_CMD_FLASH is not set
-CONFIG_CMD_MMC=y
-CONFIG_CMD_SF=y
-CONFIG_CMD_SPI=y
-CONFIG_CMD_I2C=y
-CONFIG_CMD_USB=y
-CONFIG_CMD_DFU=y
-CONFIG_CMD_GPIO=y
# CONFIG_CMD_SETEXPR is not set
-CONFIG_CMD_EXT4_WRITE=y
# CONFIG_SPL_EFI_PARTITION is not set
CONFIG_OF_CONTROL=y
CONFIG_OF_LIST="am335x-evm am335x-bone am335x-boneblack am335x-evmsk am335x-bonegreen am335x-icev2"
--
GitLab
From 14339d5f4a015f3148c1863c5c8b61d909db315e Mon Sep 17 00:00:00 2001
From: Lokesh Vutla <lokeshvutla@ti.com>
Date: Thu, 27 Apr 2017 15:44:00 +0530
Subject: [PATCH 275/282] configs: am43xx: Enable TI_COMMON_CMD_OPTIONS
Enable TI_COMMON_CMD_OPTIONS on all am43xx platforms.
Also sync with savedefconfig.
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
---
configs/am43xx_evm_defconfig | 20 +-------------------
configs/am43xx_hs_evm_defconfig | 20 +-------------------
2 files changed, 2 insertions(+), 38 deletions(-)
diff --git a/configs/am43xx_evm_defconfig b/configs/am43xx_evm_defconfig
index 89a37fb8090..4d9ec8841f8 100644
--- a/configs/am43xx_evm_defconfig
+++ b/configs/am43xx_evm_defconfig
@@ -2,6 +2,7 @@ CONFIG_ARM=y
CONFIG_ARCH_OMAP2PLUS=y
CONFIG_SYS_MALLOC_F_LEN=0x2000
CONFIG_AM43XX=y
+CONFIG_TI_COMMON_CMD_OPTIONS=y
CONFIG_TARGET_AM43XX_EVM=y
CONFIG_SPL_STACK_R_ADDR=0x82000000
CONFIG_DEFAULT_DEVICE_TREE="am437x-gp-evm"
@@ -14,28 +15,9 @@ CONFIG_SPL_STACK_R=y
CONFIG_SPL_MTD_SUPPORT=y
CONFIG_SPL_OS_BOOT=y
CONFIG_HUSH_PARSER=y
-CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMLS is not set
-CONFIG_CMD_ASKENV=y
# CONFIG_CMD_FLASH is not set
-CONFIG_CMD_GPT=y
-CONFIG_CMD_MMC=y
-CONFIG_CMD_PART=y
-CONFIG_CMD_SF=y
-CONFIG_CMD_SPI=y
-CONFIG_CMD_I2C=y
-CONFIG_CMD_USB=y
-CONFIG_CMD_DFU=y
-CONFIG_CMD_GPIO=y
# CONFIG_CMD_SETEXPR is not set
-CONFIG_CMD_DHCP=y
-CONFIG_CMD_MII=y
-CONFIG_CMD_PING=y
-CONFIG_CMD_EXT2=y
-CONFIG_CMD_EXT4=y
-CONFIG_CMD_EXT4_WRITE=y
-CONFIG_CMD_FAT=y
-CONFIG_CMD_FS_GENERIC=y
CONFIG_ISO_PARTITION=y
CONFIG_OF_CONTROL=y
CONFIG_OF_LIST="am437x-gp-evm am437x-sk-evm am43x-epos-evm am437x-idk-evm"
diff --git a/configs/am43xx_hs_evm_defconfig b/configs/am43xx_hs_evm_defconfig
index 886d54c484b..6f3cb516fd1 100644
--- a/configs/am43xx_hs_evm_defconfig
+++ b/configs/am43xx_hs_evm_defconfig
@@ -2,6 +2,7 @@ CONFIG_ARM=y
CONFIG_ARCH_OMAP2PLUS=y
CONFIG_SYS_MALLOC_F_LEN=0x2000
CONFIG_AM43XX=y
+CONFIG_TI_COMMON_CMD_OPTIONS=y
CONFIG_TI_SECURE_DEVICE=y
CONFIG_TARGET_AM43XX_EVM=y
CONFIG_ISW_ENTRY_ADDR=0x403018e0
@@ -24,28 +25,9 @@ CONFIG_SPL_USB_SUPPORT=y
CONFIG_SPL_USB_GADGET_SUPPORT=y
CONFIG_SPL_USBETH_SUPPORT=y
CONFIG_HUSH_PARSER=y
-CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMLS is not set
-CONFIG_CMD_ASKENV=y
# CONFIG_CMD_FLASH is not set
-CONFIG_CMD_GPT=y
-CONFIG_CMD_MMC=y
-CONFIG_CMD_PART=y
-CONFIG_CMD_SF=y
-CONFIG_CMD_SPI=y
-CONFIG_CMD_I2C=y
-CONFIG_CMD_USB=y
-CONFIG_CMD_DFU=y
-CONFIG_CMD_GPIO=y
# CONFIG_CMD_SETEXPR is not set
-CONFIG_CMD_DHCP=y
-CONFIG_CMD_MII=y
-CONFIG_CMD_PING=y
-CONFIG_CMD_EXT2=y
-CONFIG_CMD_EXT4=y
-CONFIG_CMD_EXT4_WRITE=y
-CONFIG_CMD_FAT=y
-CONFIG_CMD_FS_GENERIC=y
CONFIG_ISO_PARTITION=y
CONFIG_OF_CONTROL=y
CONFIG_OF_LIST="am437x-gp-evm am437x-sk-evm am43x-epos-evm am437x-idk-evm"
--
GitLab
From 1bf68652be229bf0cb02f88fac68e25126fba50e Mon Sep 17 00:00:00 2001
From: Lokesh Vutla <lokeshvutla@ti.com>
Date: Thu, 27 Apr 2017 15:44:01 +0530
Subject: [PATCH 276/282] configs: am57xx: Enable TI_COMMON_CMD_OPTIONS
Enable TI_COMMON_CMD_OPTIONS on all am57xx platforms.
Also sync with savedefconfig
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
---
configs/am57xx_evm_defconfig | 23 ++---------------------
configs/am57xx_hs_evm_defconfig | 22 +---------------------
2 files changed, 3 insertions(+), 42 deletions(-)
diff --git a/configs/am57xx_evm_defconfig b/configs/am57xx_evm_defconfig
index f64b5836cec..5dc9f4fdce3 100644
--- a/configs/am57xx_evm_defconfig
+++ b/configs/am57xx_evm_defconfig
@@ -2,6 +2,7 @@ CONFIG_ARM=y
CONFIG_ARCH_OMAP2PLUS=y
CONFIG_SYS_MALLOC_F_LEN=0x2000
CONFIG_OMAP54XX=y
+CONFIG_TI_COMMON_CMD_OPTIONS=y
CONFIG_TARGET_AM57XX_EVM=y
# CONFIG_SPL_NAND_SUPPORT is not set
CONFIG_SPL_SPI_FLASH_SUPPORT=y
@@ -23,36 +24,16 @@ CONFIG_SPL_OS_BOOT=y
CONFIG_HUSH_PARSER=y
CONFIG_FASTBOOT=y
CONFIG_USB_FUNCTION_FASTBOOT=y
-CONFIG_CMD_FASTBOOT=y
CONFIG_ANDROID_BOOT_IMAGE=y
CONFIG_FASTBOOT_BUF_ADDR=0x82000000
CONFIG_FASTBOOT_BUF_SIZE=0x2f000000
CONFIG_FASTBOOT_USB_DEV=1
CONFIG_FASTBOOT_FLASH=y
CONFIG_FASTBOOT_FLASH_MMC_DEV=1
-CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMLS is not set
-CONFIG_CMD_ASKENV=y
# CONFIG_CMD_FLASH is not set
-CONFIG_CMD_GPT=y
-CONFIG_CMD_MMC=y
-CONFIG_CMD_PART=y
-CONFIG_CMD_SF=y
-CONFIG_CMD_SPI=y
-CONFIG_CMD_I2C=y
-CONFIG_CMD_USB=y
-CONFIG_CMD_DFU=y
-CONFIG_CMD_GPIO=y
# CONFIG_CMD_SETEXPR is not set
-CONFIG_CMD_DHCP=y
-CONFIG_CMD_MII=y
-CONFIG_CMD_PING=y
-CONFIG_CMD_REGULATOR=y
-CONFIG_CMD_EXT2=y
-CONFIG_CMD_EXT4=y
-CONFIG_CMD_EXT4_WRITE=y
-CONFIG_CMD_FAT=y
-CONFIG_CMD_FS_GENERIC=y
+# CONFIG_CMD_PMIC is not set
CONFIG_ISO_PARTITION=y
CONFIG_OF_CONTROL=y
CONFIG_SPL_OF_CONTROL=y
diff --git a/configs/am57xx_hs_evm_defconfig b/configs/am57xx_hs_evm_defconfig
index 743f82ce1e1..517f7505dbf 100644
--- a/configs/am57xx_hs_evm_defconfig
+++ b/configs/am57xx_hs_evm_defconfig
@@ -2,6 +2,7 @@ CONFIG_ARM=y
CONFIG_ARCH_OMAP2PLUS=y
CONFIG_SYS_MALLOC_F_LEN=0x2000
CONFIG_OMAP54XX=y
+CONFIG_TI_COMMON_CMD_OPTIONS=y
CONFIG_TI_SECURE_DEVICE=y
CONFIG_TARGET_AM57XX_EVM=y
CONFIG_TI_SECURE_EMIF_REGION_START=0xbdb00000
@@ -28,36 +29,15 @@ CONFIG_SPL_DMA_SUPPORT=y
CONFIG_HUSH_PARSER=y
CONFIG_FASTBOOT=y
CONFIG_USB_FUNCTION_FASTBOOT=y
-CONFIG_CMD_FASTBOOT=y
CONFIG_ANDROID_BOOT_IMAGE=y
CONFIG_FASTBOOT_BUF_ADDR=0x82000000
CONFIG_FASTBOOT_BUF_SIZE=0x2f000000
CONFIG_FASTBOOT_USB_DEV=1
CONFIG_FASTBOOT_FLASH=y
CONFIG_FASTBOOT_FLASH_MMC_DEV=1
-CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMLS is not set
-CONFIG_CMD_ASKENV=y
# CONFIG_CMD_FLASH is not set
-CONFIG_CMD_GPT=y
-CONFIG_CMD_MMC=y
-CONFIG_CMD_PART=y
-CONFIG_CMD_SF=y
-CONFIG_CMD_SPI=y
-CONFIG_CMD_I2C=y
-CONFIG_CMD_USB=y
-CONFIG_CMD_DFU=y
-CONFIG_CMD_GPIO=y
# CONFIG_CMD_SETEXPR is not set
-CONFIG_CMD_DHCP=y
-CONFIG_CMD_MII=y
-CONFIG_CMD_PING=y
-CONFIG_CMD_REGULATOR=y
-CONFIG_CMD_EXT2=y
-CONFIG_CMD_EXT4=y
-CONFIG_CMD_EXT4_WRITE=y
-CONFIG_CMD_FAT=y
-CONFIG_CMD_FS_GENERIC=y
CONFIG_ISO_PARTITION=y
CONFIG_OF_CONTROL=y
CONFIG_SPL_OF_CONTROL=y
--
GitLab
From 6515aaa8382443ab5ccce5bb8deff42ed566e10f Mon Sep 17 00:00:00 2001
From: Lokesh Vutla <lokeshvutla@ti.com>
Date: Thu, 27 Apr 2017 15:44:02 +0530
Subject: [PATCH 277/282] configs: dra7xx: Enable TI_COMMON_CMD_OPTIONS
Enable TI_COMMON_CMD_OPTIONS on all dra7xx platforms.
Also sync with savedefconfig.
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
---
configs/dra7xx_evm_defconfig | 23 +----------------------
configs/dra7xx_hs_evm_defconfig | 23 +----------------------
2 files changed, 2 insertions(+), 44 deletions(-)
diff --git a/configs/dra7xx_evm_defconfig b/configs/dra7xx_evm_defconfig
index b52885c12a6..b50a762f17b 100644
--- a/configs/dra7xx_evm_defconfig
+++ b/configs/dra7xx_evm_defconfig
@@ -2,6 +2,7 @@ CONFIG_ARM=y
CONFIG_ARCH_OMAP2PLUS=y
CONFIG_SYS_MALLOC_F_LEN=0x2000
CONFIG_OMAP54XX=y
+CONFIG_TI_COMMON_CMD_OPTIONS=y
CONFIG_TARGET_DRA7XX_EVM=y
# CONFIG_SPL_NAND_SUPPORT is not set
CONFIG_SPL_SPI_FLASH_SUPPORT=y
@@ -23,36 +24,14 @@ CONFIG_SPL_OS_BOOT=y
CONFIG_HUSH_PARSER=y
CONFIG_FASTBOOT=y
CONFIG_USB_FUNCTION_FASTBOOT=y
-CONFIG_CMD_FASTBOOT=y
CONFIG_ANDROID_BOOT_IMAGE=y
CONFIG_FASTBOOT_BUF_ADDR=0x82000000
CONFIG_FASTBOOT_BUF_SIZE=0x2f000000
CONFIG_FASTBOOT_FLASH=y
CONFIG_FASTBOOT_FLASH_MMC_DEV=1
-CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMLS is not set
-CONFIG_CMD_ASKENV=y
# CONFIG_CMD_FLASH is not set
-CONFIG_CMD_GPT=y
-CONFIG_CMD_MMC=y
-CONFIG_CMD_PART=y
-CONFIG_CMD_SF=y
-CONFIG_CMD_SPI=y
-CONFIG_CMD_I2C=y
-CONFIG_CMD_USB=y
-CONFIG_CMD_DFU=y
-CONFIG_CMD_GPIO=y
# CONFIG_CMD_SETEXPR is not set
-CONFIG_CMD_DHCP=y
-CONFIG_CMD_MII=y
-CONFIG_CMD_PING=y
-CONFIG_CMD_PMIC=y
-CONFIG_CMD_REGULATOR=y
-CONFIG_CMD_EXT2=y
-CONFIG_CMD_EXT4=y
-CONFIG_CMD_EXT4_WRITE=y
-CONFIG_CMD_FAT=y
-CONFIG_CMD_FS_GENERIC=y
CONFIG_ISO_PARTITION=y
CONFIG_OF_CONTROL=y
CONFIG_SPL_OF_CONTROL=y
diff --git a/configs/dra7xx_hs_evm_defconfig b/configs/dra7xx_hs_evm_defconfig
index 885ecae637d..568c3f6b6d1 100644
--- a/configs/dra7xx_hs_evm_defconfig
+++ b/configs/dra7xx_hs_evm_defconfig
@@ -2,6 +2,7 @@ CONFIG_ARM=y
CONFIG_ARCH_OMAP2PLUS=y
CONFIG_SYS_MALLOC_F_LEN=0x2000
CONFIG_OMAP54XX=y
+CONFIG_TI_COMMON_CMD_OPTIONS=y
CONFIG_TI_SECURE_DEVICE=y
CONFIG_TARGET_DRA7XX_EVM=y
CONFIG_TI_SECURE_EMIF_REGION_START=0xbdb00000
@@ -28,36 +29,14 @@ CONFIG_SPL_DMA_SUPPORT=y
CONFIG_HUSH_PARSER=y
CONFIG_FASTBOOT=y
CONFIG_USB_FUNCTION_FASTBOOT=y
-CONFIG_CMD_FASTBOOT=y
CONFIG_ANDROID_BOOT_IMAGE=y
CONFIG_FASTBOOT_BUF_ADDR=0x82000000
CONFIG_FASTBOOT_BUF_SIZE=0x2f000000
CONFIG_FASTBOOT_FLASH=y
CONFIG_FASTBOOT_FLASH_MMC_DEV=1
-CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMLS is not set
-CONFIG_CMD_ASKENV=y
# CONFIG_CMD_FLASH is not set
-CONFIG_CMD_GPT=y
-CONFIG_CMD_MMC=y
-CONFIG_CMD_PART=y
-CONFIG_CMD_SF=y
-CONFIG_CMD_SPI=y
-CONFIG_CMD_I2C=y
-CONFIG_CMD_USB=y
-CONFIG_CMD_DFU=y
-CONFIG_CMD_GPIO=y
# CONFIG_CMD_SETEXPR is not set
-CONFIG_CMD_DHCP=y
-CONFIG_CMD_MII=y
-CONFIG_CMD_PING=y
-CONFIG_CMD_PMIC=y
-CONFIG_CMD_REGULATOR=y
-CONFIG_CMD_EXT2=y
-CONFIG_CMD_EXT4=y
-CONFIG_CMD_EXT4_WRITE=y
-CONFIG_CMD_FAT=y
-CONFIG_CMD_FS_GENERIC=y
CONFIG_ISO_PARTITION=y
CONFIG_OF_CONTROL=y
CONFIG_SPL_OF_CONTROL=y
--
GitLab
From 52f030ff6977109d709f8cd297fc2d06d9cad6f4 Mon Sep 17 00:00:00 2001
From: Lokesh Vutla <lokeshvutla@ti.com>
Date: Thu, 27 Apr 2017 15:44:03 +0530
Subject: [PATCH 278/282] configs: ks2: Enable TI_COMMON_CMD_OPTIONS
Enable TI_COMMON_CMD_OPTIONS on all keystone2 platforms.
Also sync with savedefconfig.
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
---
configs/k2e_evm_defconfig | 18 ++++--------------
configs/k2e_hs_evm_defconfig | 20 +++++---------------
configs/k2g_evm_defconfig | 19 +++----------------
configs/k2g_hs_evm_defconfig | 22 ++++++----------------
configs/k2hk_evm_defconfig | 19 ++++---------------
configs/k2hk_hs_evm_defconfig | 20 +++++---------------
configs/k2l_evm_defconfig | 19 ++++---------------
7 files changed, 31 insertions(+), 106 deletions(-)
diff --git a/configs/k2e_evm_defconfig b/configs/k2e_evm_defconfig
index e8620469321..83e21380b8e 100644
--- a/configs/k2e_evm_defconfig
+++ b/configs/k2e_evm_defconfig
@@ -4,6 +4,7 @@ CONFIG_SYS_TEXT_BASE=0x0c000000
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_TARGET_K2E_EVM=y
+CONFIG_TI_COMMON_CMD_OPTIONS=y
CONFIG_SPL_SERIAL_SUPPORT=y
CONFIG_SPL_SPI_FLASH_SUPPORT=y
CONFIG_SPL_SPI_SUPPORT=y
@@ -18,23 +19,12 @@ CONFIG_SPL_I2C_SUPPORT=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMLS is not set
-CONFIG_CMD_ASKENV=y
# CONFIG_CMD_FLASH is not set
+# CONFIG_CMD_GPT is not set
+# CONFIG_CMD_MMC is not set
CONFIG_CMD_NAND=y
-CONFIG_CMD_PART=y
-CONFIG_CMD_SF=y
-CONFIG_CMD_SPI=y
-CONFIG_CMD_I2C=y
-CONFIG_CMD_USB=y
+# CONFIG_CMD_GPIO is not set
# CONFIG_CMD_SETEXPR is not set
-CONFIG_CMD_DHCP=y
-CONFIG_CMD_MII=y
-CONFIG_CMD_PING=y
-CONFIG_CMD_EXT2=y
-CONFIG_CMD_EXT4=y
-CONFIG_CMD_EXT4_WRITE=y
-CONFIG_CMD_FAT=y
-CONFIG_CMD_FS_GENERIC=y
CONFIG_CMD_UBI=y
CONFIG_ISO_PARTITION=y
CONFIG_EFI_PARTITION=y
diff --git a/configs/k2e_hs_evm_defconfig b/configs/k2e_hs_evm_defconfig
index 268b56efdb3..d4ec83efc5e 100644
--- a/configs/k2e_hs_evm_defconfig
+++ b/configs/k2e_hs_evm_defconfig
@@ -2,30 +2,20 @@ CONFIG_ARM=y
CONFIG_ARCH_KEYSTONE=y
CONFIG_SYS_TEXT_BASE=0x0c000060
CONFIG_TARGET_K2E_EVM=y
+CONFIG_TI_COMMON_CMD_OPTIONS=y
+CONFIG_TI_SECURE_DEVICE=y
CONFIG_DEFAULT_DEVICE_TREE="keystone-k2e-evm"
CONFIG_OF_BOARD_SETUP=y
CONFIG_SYS_CONSOLE_INFO_QUIET=y
CONFIG_VERSION_VARIABLE=y
CONFIG_HUSH_PARSER=y
-CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMLS is not set
-CONFIG_CMD_ASKENV=y
# CONFIG_CMD_FLASH is not set
+# CONFIG_CMD_GPT is not set
+# CONFIG_CMD_MMC is not set
CONFIG_CMD_NAND=y
-CONFIG_CMD_PART=y
-CONFIG_CMD_SF=y
-CONFIG_CMD_SPI=y
-CONFIG_CMD_I2C=y
-CONFIG_CMD_USB=y
+# CONFIG_CMD_GPIO is not set
# CONFIG_CMD_SETEXPR is not set
-CONFIG_CMD_DHCP=y
-CONFIG_CMD_MII=y
-CONFIG_CMD_PING=y
-CONFIG_CMD_EXT2=y
-CONFIG_CMD_EXT4=y
-CONFIG_CMD_EXT4_WRITE=y
-CONFIG_CMD_FAT=y
-CONFIG_CMD_FS_GENERIC=y
CONFIG_CMD_UBI=y
CONFIG_ISO_PARTITION=y
CONFIG_EFI_PARTITION=y
diff --git a/configs/k2g_evm_defconfig b/configs/k2g_evm_defconfig
index 40fc7f098f7..674ddcc9fe7 100644
--- a/configs/k2g_evm_defconfig
+++ b/configs/k2g_evm_defconfig
@@ -4,6 +4,7 @@ CONFIG_SYS_TEXT_BASE=0x0c000000
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_TARGET_K2G_EVM=y
+CONFIG_TI_COMMON_CMD_OPTIONS=y
CONFIG_SPL_SERIAL_SUPPORT=y
CONFIG_SPL_SPI_FLASH_SUPPORT=y
CONFIG_SPL_SPI_SUPPORT=y
@@ -16,26 +17,12 @@ CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_SPL=y
CONFIG_SPL_I2C_SUPPORT=y
CONFIG_HUSH_PARSER=y
-CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMLS is not set
-CONFIG_CMD_ASKENV=y
# CONFIG_CMD_FLASH is not set
-CONFIG_CMD_MMC=y
-CONFIG_CMD_PART=y
-CONFIG_CMD_SF=y
-CONFIG_CMD_SPI=y
-CONFIG_CMD_I2C=y
-CONFIG_CMD_USB=y
+# CONFIG_CMD_GPT is not set
CONFIG_CMD_REMOTEPROC=y
+# CONFIG_CMD_GPIO is not set
# CONFIG_CMD_SETEXPR is not set
-CONFIG_CMD_DHCP=y
-CONFIG_CMD_MII=y
-CONFIG_CMD_PING=y
-CONFIG_CMD_EXT2=y
-CONFIG_CMD_EXT4=y
-CONFIG_CMD_EXT4_WRITE=y
-CONFIG_CMD_FAT=y
-CONFIG_CMD_FS_GENERIC=y
CONFIG_CMD_UBI=y
CONFIG_ISO_PARTITION=y
CONFIG_EFI_PARTITION=y
diff --git a/configs/k2g_hs_evm_defconfig b/configs/k2g_hs_evm_defconfig
index d6266dff5c0..2e06c8c46d3 100644
--- a/configs/k2g_hs_evm_defconfig
+++ b/configs/k2g_hs_evm_defconfig
@@ -2,31 +2,21 @@ CONFIG_ARM=y
CONFIG_ARCH_KEYSTONE=y
CONFIG_SYS_TEXT_BASE=0x0c000060
CONFIG_TARGET_K2G_EVM=y
+CONFIG_TI_COMMON_CMD_OPTIONS=y
+CONFIG_TI_SECURE_DEVICE=y
CONFIG_DEFAULT_DEVICE_TREE="keystone-k2g-evm"
+CONFIG_FIT=y
+CONFIG_FIT_IMAGE_POST_PROCESS=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_SYS_CONSOLE_INFO_QUIET=y
CONFIG_VERSION_VARIABLE=y
CONFIG_HUSH_PARSER=y
-CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMLS is not set
-CONFIG_CMD_ASKENV=y
# CONFIG_CMD_FLASH is not set
-CONFIG_CMD_MMC=y
-CONFIG_CMD_PART=y
-CONFIG_CMD_SF=y
-CONFIG_CMD_SPI=y
-CONFIG_CMD_I2C=y
-CONFIG_CMD_USB=y
+# CONFIG_CMD_GPT is not set
CONFIG_CMD_REMOTEPROC=y
+# CONFIG_CMD_GPIO is not set
# CONFIG_CMD_SETEXPR is not set
-CONFIG_CMD_DHCP=y
-CONFIG_CMD_MII=y
-CONFIG_CMD_PING=y
-CONFIG_CMD_EXT2=y
-CONFIG_CMD_EXT4=y
-CONFIG_CMD_EXT4_WRITE=y
-CONFIG_CMD_FAT=y
-CONFIG_CMD_FS_GENERIC=y
CONFIG_CMD_UBI=y
CONFIG_ISO_PARTITION=y
CONFIG_EFI_PARTITION=y
diff --git a/configs/k2hk_evm_defconfig b/configs/k2hk_evm_defconfig
index 4ec6b6f2ab3..7dc5cf51cfe 100644
--- a/configs/k2hk_evm_defconfig
+++ b/configs/k2hk_evm_defconfig
@@ -4,6 +4,7 @@ CONFIG_SYS_TEXT_BASE=0x0c000000
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_TARGET_K2HK_EVM=y
+CONFIG_TI_COMMON_CMD_OPTIONS=y
CONFIG_SPL_SERIAL_SUPPORT=y
CONFIG_SPL_SPI_FLASH_SUPPORT=y
CONFIG_SPL_SPI_SUPPORT=y
@@ -16,25 +17,13 @@ CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_SPL=y
CONFIG_SPL_I2C_SUPPORT=y
CONFIG_HUSH_PARSER=y
-CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMLS is not set
-CONFIG_CMD_ASKENV=y
# CONFIG_CMD_FLASH is not set
+# CONFIG_CMD_GPT is not set
+# CONFIG_CMD_MMC is not set
CONFIG_CMD_NAND=y
-CONFIG_CMD_PART=y
-CONFIG_CMD_SF=y
-CONFIG_CMD_SPI=y
-CONFIG_CMD_I2C=y
-CONFIG_CMD_USB=y
+# CONFIG_CMD_GPIO is not set
# CONFIG_CMD_SETEXPR is not set
-CONFIG_CMD_DHCP=y
-CONFIG_CMD_MII=y
-CONFIG_CMD_PING=y
-CONFIG_CMD_EXT2=y
-CONFIG_CMD_EXT4=y
-CONFIG_CMD_EXT4_WRITE=y
-CONFIG_CMD_FAT=y
-CONFIG_CMD_FS_GENERIC=y
CONFIG_CMD_UBI=y
CONFIG_ISO_PARTITION=y
CONFIG_EFI_PARTITION=y
diff --git a/configs/k2hk_hs_evm_defconfig b/configs/k2hk_hs_evm_defconfig
index 500707fdecd..67807e4ba8e 100644
--- a/configs/k2hk_hs_evm_defconfig
+++ b/configs/k2hk_hs_evm_defconfig
@@ -2,30 +2,20 @@ CONFIG_ARM=y
CONFIG_ARCH_KEYSTONE=y
CONFIG_SYS_TEXT_BASE=0x0c000060
CONFIG_TARGET_K2HK_EVM=y
+CONFIG_TI_COMMON_CMD_OPTIONS=y
+CONFIG_TI_SECURE_DEVICE=y
CONFIG_DEFAULT_DEVICE_TREE="keystone-k2hk-evm"
CONFIG_OF_BOARD_SETUP=y
CONFIG_SYS_CONSOLE_INFO_QUIET=y
CONFIG_VERSION_VARIABLE=y
CONFIG_HUSH_PARSER=y
-CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMLS is not set
-CONFIG_CMD_ASKENV=y
# CONFIG_CMD_FLASH is not set
+# CONFIG_CMD_GPT is not set
+# CONFIG_CMD_MMC is not set
CONFIG_CMD_NAND=y
-CONFIG_CMD_PART=y
-CONFIG_CMD_SF=y
-CONFIG_CMD_SPI=y
-CONFIG_CMD_I2C=y
-CONFIG_CMD_USB=y
+# CONFIG_CMD_GPIO is not set
# CONFIG_CMD_SETEXPR is not set
-CONFIG_CMD_DHCP=y
-CONFIG_CMD_MII=y
-CONFIG_CMD_PING=y
-CONFIG_CMD_EXT2=y
-CONFIG_CMD_EXT4=y
-CONFIG_CMD_EXT4_WRITE=y
-CONFIG_CMD_FAT=y
-CONFIG_CMD_FS_GENERIC=y
CONFIG_CMD_UBI=y
CONFIG_ISO_PARTITION=y
CONFIG_EFI_PARTITION=y
diff --git a/configs/k2l_evm_defconfig b/configs/k2l_evm_defconfig
index 564a179bb9b..6be4941f66b 100644
--- a/configs/k2l_evm_defconfig
+++ b/configs/k2l_evm_defconfig
@@ -4,6 +4,7 @@ CONFIG_SYS_TEXT_BASE=0x0c000000
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_TARGET_K2L_EVM=y
+CONFIG_TI_COMMON_CMD_OPTIONS=y
CONFIG_SPL_SERIAL_SUPPORT=y
CONFIG_SPL_SPI_FLASH_SUPPORT=y
CONFIG_SPL_SPI_SUPPORT=y
@@ -16,25 +17,13 @@ CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_SPL=y
CONFIG_SPL_I2C_SUPPORT=y
CONFIG_HUSH_PARSER=y
-CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMLS is not set
-CONFIG_CMD_ASKENV=y
# CONFIG_CMD_FLASH is not set
+# CONFIG_CMD_GPT is not set
+# CONFIG_CMD_MMC is not set
CONFIG_CMD_NAND=y
-CONFIG_CMD_PART=y
-CONFIG_CMD_SF=y
-CONFIG_CMD_SPI=y
-CONFIG_CMD_I2C=y
-CONFIG_CMD_USB=y
+# CONFIG_CMD_GPIO is not set
# CONFIG_CMD_SETEXPR is not set
-CONFIG_CMD_DHCP=y
-CONFIG_CMD_MII=y
-CONFIG_CMD_PING=y
-CONFIG_CMD_EXT2=y
-CONFIG_CMD_EXT4=y
-CONFIG_CMD_EXT4_WRITE=y
-CONFIG_CMD_FAT=y
-CONFIG_CMD_FS_GENERIC=y
CONFIG_CMD_UBI=y
CONFIG_ISO_PARTITION=y
CONFIG_EFI_PARTITION=y
--
GitLab
From c5f177debc8b430c0a0038a9d8f6309eb3bd6299 Mon Sep 17 00:00:00 2001
From: Lokesh Vutla <lokeshvutla@ti.com>
Date: Wed, 3 May 2017 16:58:25 +0530
Subject: [PATCH 279/282] ARM: k2g: Add support for dynamic programming of PLL
based on SYSCLK
K2G supports various sysclk frequencies which can be
determined using sysboot pins. PLLs should be configured
based on this sysclock frequency. Add PLL configurations
for all supported sysclk frequencies.
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
---
.../mach-keystone/include/mach/clock-k2g.h | 4 +-
.../mach-keystone/include/mach/hardware-k2g.h | 21 ++++
board/ti/ks2_evm/board_k2g.c | 116 ++++++++++++++----
3 files changed, 118 insertions(+), 23 deletions(-)
diff --git a/arch/arm/mach-keystone/include/mach/clock-k2g.h b/arch/arm/mach-keystone/include/mach/clock-k2g.h
index 74de6202fe5..374f0d92af0 100644
--- a/arch/arm/mach-keystone/include/mach/clock-k2g.h
+++ b/arch/arm/mach-keystone/include/mach/clock-k2g.h
@@ -12,8 +12,8 @@
#define PLLSET_CMD_LIST "<pa|arm|ddr3>"
-#define DEV_SUPPORTED_SPEEDS 0x1ff
-#define ARM_SUPPORTED_SPEEDS 0xff
+#define DEV_SUPPORTED_SPEEDS 0xff
+#define ARM_SUPPORTED_SPEEDS 0x3ff
#define KS2_CLK1_6 sys_clk0_6_clk
diff --git a/arch/arm/mach-keystone/include/mach/hardware-k2g.h b/arch/arm/mach-keystone/include/mach/hardware-k2g.h
index 0f6bf61867a..90ca1208d49 100644
--- a/arch/arm/mach-keystone/include/mach/hardware-k2g.h
+++ b/arch/arm/mach-keystone/include/mach/hardware-k2g.h
@@ -86,4 +86,25 @@
#define RSTMUX_OMODE8_INT 0x3
#define RSTMUX_OMODE8_INT_AND_DEV_RESET 0x4
+/* DEVSTAT register definition */
+#define KS2_DEVSTAT_REFCLK_SHIFT 7
+#define KS2_DEVSTAT_REFCLK_MASK (0x7 << 7)
+
+/* GPMC */
+#define KS2_GPMC_BASE 0x21818000
+
+/* SYSCLK indexes */
+#define SYSCLK_19MHz 0
+#define SYSCLK_24MHz 1
+#define SYSCLK_25MHz 2
+#define SYSCLK_26MHz 3
+#define MAX_SYSCLK 4
+
+#ifndef __ASSEMBLY__
+static inline u8 get_sysclk_index(void)
+{
+ u32 dev_stat = __raw_readl(KS2_DEVSTAT);
+ return (dev_stat & KS2_DEVSTAT_REFCLK_MASK) >> KS2_DEVSTAT_REFCLK_SHIFT;
+}
+#endif
#endif /* __ASM_ARCH_HARDWARE_K2G_H */
diff --git a/board/ti/ks2_evm/board_k2g.c b/board/ti/ks2_evm/board_k2g.c
index 79e110ef48a..20933426b1d 100644
--- a/board/ti/ks2_evm/board_k2g.c
+++ b/board/ti/ks2_evm/board_k2g.c
@@ -16,6 +16,13 @@
#define SYS_CLK 24000000
+const unsigned int sysclk_array[MAX_SYSCLK] = {
+ 19200000,
+ 24000000,
+ 25000000,
+ 26000000,
+};
+
unsigned int external_clk[ext_clk_count] = {
[sys_clk] = SYS_CLK,
[pa_clk] = SYS_CLK,
@@ -48,49 +55,116 @@ static int dev_speeds[DEVSPEED_NUMSPDS] = {
SPD400,
};
-static struct pll_init_data main_pll_config[NUM_SPDS] = {
- [SPD400] = {MAIN_PLL, 100, 3, 2},
- [SPD600] = {MAIN_PLL, 300, 6, 2},
- [SPD800] = {MAIN_PLL, 200, 3, 2},
- [SPD900] = {TETRIS_PLL, 75, 1, 2},
- [SPD1000] = {TETRIS_PLL, 250, 3, 2},
+static struct pll_init_data main_pll_config[MAX_SYSCLK][NUM_SPDS] = {
+ [SYSCLK_19MHz] = {
+ [SPD400] = {MAIN_PLL, 125, 3, 2},
+ [SPD600] = {MAIN_PLL, 125, 2, 2},
+ [SPD800] = {MAIN_PLL, 250, 3, 2},
+ [SPD900] = {TETRIS_PLL, 187, 2, 2},
+ [SPD1000] = {TETRIS_PLL, 104, 1, 2},
+ },
+ [SYSCLK_24MHz] = {
+ [SPD400] = {MAIN_PLL, 100, 3, 2},
+ [SPD600] = {MAIN_PLL, 300, 6, 2},
+ [SPD800] = {MAIN_PLL, 200, 3, 2},
+ [SPD900] = {TETRIS_PLL, 75, 1, 2},
+ [SPD1000] = {TETRIS_PLL, 250, 3, 2},
+ },
+ [SYSCLK_25MHz] = {
+ [SPD400] = {MAIN_PLL, 32, 1, 2},
+ [SPD600] = {MAIN_PLL, 48, 1, 2},
+ [SPD800] = {MAIN_PLL, 64, 1, 2},
+ [SPD900] = {TETRIS_PLL, 72, 1, 2},
+ [SPD1000] = {TETRIS_PLL, 80, 1, 2},
+ },
+ [SYSCLK_26MHz] = {
+ [SPD400] = {MAIN_PLL, 400, 13, 2},
+ [SPD600] = {MAIN_PLL, 230, 5, 2},
+ [SPD800] = {MAIN_PLL, 123, 2, 2},
+ [SPD900] = {TETRIS_PLL, 69, 1, 2},
+ [SPD1000] = {TETRIS_PLL, 384, 5, 2},
+ },
};
-static struct pll_init_data tetris_pll_config[NUM_SPDS] = {
- [SPD200] = {TETRIS_PLL, 250, 3, 10},
- [SPD400] = {TETRIS_PLL, 100, 1, 6},
- [SPD600] = {TETRIS_PLL, 100, 1, 4},
- [SPD800] = {TETRIS_PLL, 400, 3, 4},
- [SPD900] = {TETRIS_PLL, 75, 1, 2},
- [SPD1000] = {TETRIS_PLL, 250, 3, 2},
+static struct pll_init_data tetris_pll_config[MAX_SYSCLK][NUM_SPDS] = {
+ [SYSCLK_19MHz] = {
+ [SPD200] = {TETRIS_PLL, 625, 6, 10},
+ [SPD400] = {TETRIS_PLL, 125, 1, 6},
+ [SPD600] = {TETRIS_PLL, 125, 1, 4},
+ [SPD800] = {TETRIS_PLL, 333, 2, 4},
+ [SPD900] = {TETRIS_PLL, 187, 2, 2},
+ [SPD1000] = {TETRIS_PLL, 104, 1, 2},
+ },
+ [SYSCLK_24MHz] = {
+ [SPD200] = {TETRIS_PLL, 250, 3, 10},
+ [SPD400] = {TETRIS_PLL, 100, 1, 6},
+ [SPD600] = {TETRIS_PLL, 100, 1, 4},
+ [SPD800] = {TETRIS_PLL, 400, 3, 4},
+ [SPD900] = {TETRIS_PLL, 75, 1, 2},
+ [SPD1000] = {TETRIS_PLL, 250, 3, 2},
+ },
+ [SYSCLK_25MHz] = {
+ [SPD200] = {TETRIS_PLL, 80, 1, 10},
+ [SPD400] = {TETRIS_PLL, 96, 1, 6},
+ [SPD600] = {TETRIS_PLL, 96, 1, 4},
+ [SPD800] = {TETRIS_PLL, 128, 1, 4},
+ [SPD900] = {TETRIS_PLL, 72, 1, 2},
+ [SPD1000] = {TETRIS_PLL, 80, 1, 2},
+ },
+ [SYSCLK_26MHz] = {
+ [SPD200] = {TETRIS_PLL, 307, 4, 10},
+ [SPD400] = {TETRIS_PLL, 369, 4, 6},
+ [SPD600] = {TETRIS_PLL, 369, 4, 4},
+ [SPD800] = {TETRIS_PLL, 123, 1, 4},
+ [SPD900] = {TETRIS_PLL, 69, 1, 2},
+ [SPD1000] = {TETRIS_PLL, 384, 5, 2},
+ },
+};
+
+static struct pll_init_data uart_pll_config[MAX_SYSCLK] = {
+ [SYSCLK_19MHz] = {UART_PLL, 160, 1, 8},
+ [SYSCLK_24MHz] = {UART_PLL, 128, 1, 8},
+ [SYSCLK_25MHz] = {UART_PLL, 768, 5, 10},
+ [SYSCLK_26MHz] = {UART_PLL, 384, 13, 2},
};
-static struct pll_init_data uart_pll_config = {UART_PLL, 64, 1, 4};
-static struct pll_init_data nss_pll_config = {NSS_PLL, 250, 3, 2};
-static struct pll_init_data ddr3_pll_config = {DDR3A_PLL, 133, 1, 16};
+static struct pll_init_data nss_pll_config[MAX_SYSCLK] = {
+ [SYSCLK_19MHz] = {NSS_PLL, 625, 6, 2},
+ [SYSCLK_24MHz] = {NSS_PLL, 250, 3, 2},
+ [SYSCLK_25MHz] = {NSS_PLL, 80, 1, 2},
+ [SYSCLK_26MHz] = {NSS_PLL, 1000, 13, 2},
+};
+
+static struct pll_init_data ddr3_pll_config[MAX_SYSCLK] = {
+ [SYSCLK_19MHz] = {DDR3A_PLL, 167, 1, 16},
+ [SYSCLK_24MHz] = {DDR3A_PLL, 133, 1, 16},
+ [SYSCLK_25MHz] = {DDR3A_PLL, 128, 1, 16},
+ [SYSCLK_26MHz] = {DDR3A_PLL, 123, 1, 16},
+};
struct pll_init_data *get_pll_init_data(int pll)
{
int speed;
struct pll_init_data *data = NULL;
+ u8 sysclk_index = get_sysclk_index();
switch (pll) {
case MAIN_PLL:
speed = get_max_dev_speed(dev_speeds);
- data = &main_pll_config[speed];
+ data = &main_pll_config[sysclk_index][speed];
break;
case TETRIS_PLL:
speed = get_max_arm_speed(arm_speeds);
- data = &tetris_pll_config[speed];
+ data = &tetris_pll_config[sysclk_index][speed];
break;
case NSS_PLL:
- data = &nss_pll_config;
+ data = &nss_pll_config[sysclk_index];
break;
case UART_PLL:
- data = &uart_pll_config;
+ data = &uart_pll_config[sysclk_index];
break;
case DDR3_PLL:
- data = &ddr3_pll_config;
+ data = &ddr3_pll_config[sysclk_index];
break;
default:
data = NULL;
--
GitLab
From ee3c6532be343e495d11adfe15a457d24d9747d9 Mon Sep 17 00:00:00 2001
From: Lokesh Vutla <lokeshvutla@ti.com>
Date: Wed, 3 May 2017 16:58:26 +0530
Subject: [PATCH 280/282] ARM: keystone2: Add support for getting external
clock dynamically
One some keystone2 platforms like K2G ICE, there is an option
to switch between 24MHz or 25MHz as sysclk. But the existing
driver assumes it is always 24MHz. Add support for getting
all reference clocks dynamically by reading boot pins.
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
---
arch/arm/mach-keystone/clock.c | 12 +++----
arch/arm/mach-keystone/include/mach/clock.h | 2 +-
board/ti/ks2_evm/board_k2e.c | 30 +++++++++++++----
board/ti/ks2_evm/board_k2g.c | 37 ++++++++++++++++-----
board/ti/ks2_evm/board_k2hk.c | 31 +++++++++++++++++
board/ti/ks2_evm/board_k2l.c | 34 +++++++++++++++----
include/configs/ti_armv7_keystone2.h | 2 +-
7 files changed, 118 insertions(+), 30 deletions(-)
diff --git a/arch/arm/mach-keystone/clock.c b/arch/arm/mach-keystone/clock.c
index 68f898036ff..645bd9629e8 100644
--- a/arch/arm/mach-keystone/clock.c
+++ b/arch/arm/mach-keystone/clock.c
@@ -284,7 +284,7 @@ static unsigned long pll_freq_get(int pll)
u32 tmp, reg;
if (pll == MAIN_PLL) {
- ret = external_clk[sys_clk];
+ ret = get_external_clk(sys_clk);
if (pllctl_reg_read(pll, ctl) & PLLCTL_PLLEN_MASK) {
/* PLL mode */
tmp = __raw_readl(KS2_MAINPLLCTL0);
@@ -302,23 +302,23 @@ static unsigned long pll_freq_get(int pll)
} else {
switch (pll) {
case PASS_PLL:
- ret = external_clk[pa_clk];
+ ret = get_external_clk(pa_clk);
reg = KS2_PASSPLLCTL0;
break;
case TETRIS_PLL:
- ret = external_clk[tetris_clk];
+ ret = get_external_clk(tetris_clk);
reg = KS2_ARMPLLCTL0;
break;
case DDR3A_PLL:
- ret = external_clk[ddr3a_clk];
+ ret = get_external_clk(ddr3a_clk);
reg = KS2_DDR3APLLCTL0;
break;
case DDR3B_PLL:
- ret = external_clk[ddr3b_clk];
+ ret = get_external_clk(ddr3b_clk);
reg = KS2_DDR3BPLLCTL0;
break;
case UART_PLL:
- ret = external_clk[uart_clk];
+ ret = get_external_clk(uart_clk);
reg = KS2_UARTPLLCTL0;
break;
default:
diff --git a/arch/arm/mach-keystone/include/mach/clock.h b/arch/arm/mach-keystone/include/mach/clock.h
index 0d8a9444ded..006d0744d1c 100644
--- a/arch/arm/mach-keystone/include/mach/clock.h
+++ b/arch/arm/mach-keystone/include/mach/clock.h
@@ -117,7 +117,6 @@ struct pll_init_data {
int pll_od; /* PLL output divider */
};
-extern unsigned int external_clk[ext_clk_count];
extern const struct keystone_pll_regs keystone_pll_regs[];
extern s16 divn_val[];
extern int speeds[];
@@ -129,6 +128,7 @@ unsigned long ks_clk_get_rate(unsigned int clk);
int get_max_dev_speed(int *spds);
int get_max_arm_speed(int *spds);
void pll_pa_clk_sel(void);
+unsigned int get_external_clk(u32 clk);
#endif
#endif
diff --git a/board/ti/ks2_evm/board_k2e.c b/board/ti/ks2_evm/board_k2e.c
index cbb3077bc36..64f0c9cd5b5 100644
--- a/board/ti/ks2_evm/board_k2e.c
+++ b/board/ti/ks2_evm/board_k2e.c
@@ -14,12 +14,30 @@
DECLARE_GLOBAL_DATA_PTR;
-unsigned int external_clk[ext_clk_count] = {
- [sys_clk] = 100000000,
- [alt_core_clk] = 100000000,
- [pa_clk] = 100000000,
- [ddr3a_clk] = 100000000,
-};
+unsigned int get_external_clk(u32 clk)
+{
+ unsigned int clk_freq;
+
+ switch (clk) {
+ case sys_clk:
+ clk_freq = 100000000;
+ break;
+ case alt_core_clk:
+ clk_freq = 100000000;
+ break;
+ case pa_clk:
+ clk_freq = 100000000;
+ break;
+ case ddr3a_clk:
+ clk_freq = 100000000;
+ break;
+ default:
+ clk_freq = 0;
+ break;
+ }
+
+ return clk_freq;
+}
static struct pll_init_data core_pll_config[NUM_SPDS] = {
[SPD800] = CORE_PLL_800,
diff --git a/board/ti/ks2_evm/board_k2g.c b/board/ti/ks2_evm/board_k2g.c
index 20933426b1d..6e03f6bcd02 100644
--- a/board/ti/ks2_evm/board_k2g.c
+++ b/board/ti/ks2_evm/board_k2g.c
@@ -14,8 +14,6 @@
#include "mux-k2g.h"
#include "../common/board_detect.h"
-#define SYS_CLK 24000000
-
const unsigned int sysclk_array[MAX_SYSCLK] = {
19200000,
24000000,
@@ -23,13 +21,34 @@ const unsigned int sysclk_array[MAX_SYSCLK] = {
26000000,
};
-unsigned int external_clk[ext_clk_count] = {
- [sys_clk] = SYS_CLK,
- [pa_clk] = SYS_CLK,
- [tetris_clk] = SYS_CLK,
- [ddr3a_clk] = SYS_CLK,
- [uart_clk] = SYS_CLK,
-};
+unsigned int get_external_clk(u32 clk)
+{
+ unsigned int clk_freq;
+ u8 sysclk_index = get_sysclk_index();
+
+ switch (clk) {
+ case sys_clk:
+ clk_freq = sysclk_array[sysclk_index];
+ break;
+ case pa_clk:
+ clk_freq = sysclk_array[sysclk_index];
+ break;
+ case tetris_clk:
+ clk_freq = sysclk_array[sysclk_index];
+ break;
+ case ddr3a_clk:
+ clk_freq = sysclk_array[sysclk_index];
+ break;
+ case uart_clk:
+ clk_freq = sysclk_array[sysclk_index];
+ break;
+ default:
+ clk_freq = 0;
+ break;
+ }
+
+ return clk_freq;
+}
static int arm_speeds[DEVSPEED_NUMSPDS] = {
SPD400,
diff --git a/board/ti/ks2_evm/board_k2hk.c b/board/ti/ks2_evm/board_k2hk.c
index e217beaed5e..b35f24d7b58 100644
--- a/board/ti/ks2_evm/board_k2hk.c
+++ b/board/ti/ks2_evm/board_k2hk.c
@@ -23,6 +23,37 @@ unsigned int external_clk[ext_clk_count] = {
[ddr3b_clk] = 100000000,
};
+unsigned int get_external_clk(u32 clk)
+{
+ unsigned int clk_freq;
+
+ switch (clk) {
+ case sys_clk:
+ clk_freq = 122880000;
+ break;
+ case alt_core_clk:
+ clk_freq = 125000000;
+ break;
+ case pa_clk:
+ clk_freq = 122880000;
+ break;
+ case tetris_clk:
+ clk_freq = 125000000;
+ break;
+ case ddr3a_clk:
+ clk_freq = 100000000;
+ break;
+ case ddr3b_clk:
+ clk_freq = 100000000;
+ break;
+ default:
+ clk_freq = 0;
+ break;
+ }
+
+ return clk_freq;
+}
+
static struct pll_init_data core_pll_config[NUM_SPDS] = {
[SPD800] = CORE_PLL_799,
[SPD1000] = CORE_PLL_999,
diff --git a/board/ti/ks2_evm/board_k2l.c b/board/ti/ks2_evm/board_k2l.c
index 2a2e0057e24..f3eea4200cb 100644
--- a/board/ti/ks2_evm/board_k2l.c
+++ b/board/ti/ks2_evm/board_k2l.c
@@ -14,13 +14,33 @@
DECLARE_GLOBAL_DATA_PTR;
-unsigned int external_clk[ext_clk_count] = {
- [sys_clk] = 122880000,
- [alt_core_clk] = 100000000,
- [pa_clk] = 122880000,
- [tetris_clk] = 122880000,
- [ddr3a_clk] = 100000000,
-};
+unsigned int get_external_clk(u32 clk)
+{
+ unsigned int clk_freq;
+
+ switch (clk) {
+ case sys_clk:
+ clk_freq = 122880000;
+ break;
+ case alt_core_clk:
+ clk_freq = 100000000;
+ break;
+ case pa_clk:
+ clk_freq = 122880000;
+ break;
+ case tetris_clk:
+ clk_freq = 122880000;
+ break;
+ case ddr3a_clk:
+ clk_freq = 100000000;
+ break;
+ default:
+ clk_freq = 0;
+ break;
+ }
+
+ return clk_freq;
+}
static struct pll_init_data core_pll_config[NUM_SPDS] = {
[SPD800] = CORE_PLL_799,
diff --git a/include/configs/ti_armv7_keystone2.h b/include/configs/ti_armv7_keystone2.h
index 5d2a7ab509e..868464cd320 100644
--- a/include/configs/ti_armv7_keystone2.h
+++ b/include/configs/ti_armv7_keystone2.h
@@ -318,7 +318,7 @@
#ifndef CONFIG_SOC_K2G
#define CONFIG_SYS_HZ_CLOCK ks_clk_get_rate(KS2_CLK1_6)
#else
-#define CONFIG_SYS_HZ_CLOCK external_clk[sys_clk]
+#define CONFIG_SYS_HZ_CLOCK get_external_clk(sys_clk)
#endif
#endif /* __CONFIG_KS2_EVM_H */
--
GitLab
From 78df5e1ed0b6bf6919339d625abccea405d29167 Mon Sep 17 00:00:00 2001
From: Maxim Sloyko <maxims@google.com>
Date: Tue, 9 May 2017 09:08:07 -0400
Subject: [PATCH 281/282] dm: Update Simple Watchdog uclass
- Remove "probe" function from sandbox wdt driver
- Fix include order
Fixes: 0753bc2d30d7 ("dm: Simple Watchdog uclass")
Signed-off-by: Maxim Sloyko <maxims@google.com>
[trini: Create as the delta between v1 (applied) and v2 (should have
applied)].
Signed-off-by: Tom Rini <trini@konsulko.com>
---
drivers/watchdog/sandbox_wdt.c | 12 +-----------
1 file changed, 1 insertion(+), 11 deletions(-)
diff --git a/drivers/watchdog/sandbox_wdt.c b/drivers/watchdog/sandbox_wdt.c
index 34d90bee7e8..02b57f39865 100644
--- a/drivers/watchdog/sandbox_wdt.c
+++ b/drivers/watchdog/sandbox_wdt.c
@@ -6,8 +6,8 @@
#include <common.h>
#include <dm.h>
-#include <asm/state.h>
#include <wdt.h>
+#include <asm/state.h>
DECLARE_GLOBAL_DATA_PTR;
@@ -46,15 +46,6 @@ static int sandbox_wdt_expire_now(struct udevice *dev, ulong flags)
return 0;
}
-static int sandbox_wdt_probe(struct udevice *dev)
-{
- struct sandbox_state *state = state_get_current();
-
- memset(&state->wdt, 0, sizeof(state->wdt));
-
- return 0;
-}
-
static const struct wdt_ops sandbox_wdt_ops = {
.start = sandbox_wdt_start,
.reset = sandbox_wdt_reset,
@@ -72,5 +63,4 @@ U_BOOT_DRIVER(wdt_sandbox) = {
.id = UCLASS_WDT,
.of_match = sandbox_wdt_ids,
.ops = &sandbox_wdt_ops,
- .probe = sandbox_wdt_probe,
};
--
GitLab
From 85ea850976daea57c8045f3569566fad5ce9fe0f Mon Sep 17 00:00:00 2001
From: Tom Rini <trini@konsulko.com>
Date: Tue, 18 Apr 2017 22:26:35 -0400
Subject: [PATCH 282/282] p1_p2_rdb: Fix unused variable warning
With gcc-6 we see a warning that sysclk_tbl is defined but unused, so
remove it.
Cc: York Sun <york.sun@nxp.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: York Sun <york.sun@nxp.com>
---
board/freescale/p1_p2_rdb_pc/spl.c | 5 -----
1 file changed, 5 deletions(-)
diff --git a/board/freescale/p1_p2_rdb_pc/spl.c b/board/freescale/p1_p2_rdb_pc/spl.c
index 1cf3497aa68..ca7ba5754e2 100644
--- a/board/freescale/p1_p2_rdb_pc/spl.c
+++ b/board/freescale/p1_p2_rdb_pc/spl.c
@@ -17,11 +17,6 @@
DECLARE_GLOBAL_DATA_PTR;
-static const u32 sysclk_tbl[] = {
- 66666000, 7499900, 83332500, 8999900,
- 99999000, 11111000, 12499800, 13333200
-};
-
phys_size_t get_effective_memsize(void)
{
return CONFIG_SYS_L2_SIZE;
--
GitLab