diff --git a/arch/Kconfig b/arch/Kconfig
index 96db5c5088b6b6e0906a7b5dedc11bcf3ab5830d..afa1d6c2d782e00282d14e7838f578ef1b8cd4f7 100644
--- a/arch/Kconfig
+++ b/arch/Kconfig
@@ -18,7 +18,7 @@ config ARC
config ARM
bool "ARM architecture"
- select HAVE_PRIVATE_LIBGCC
+ select HAVE_PRIVATE_LIBGCC if !ARM64
select HAVE_GENERIC_BOARD
select SUPPORT_OF_CONTROL
diff --git a/arch/arm/cpu/armv7/start.S b/arch/arm/cpu/armv7/start.S
index 5ed0f45a26614159328928fbdeac84f692f54d71..1c7e6f01f9414c09bac40a5a4d81381d98bae4c5 100644
--- a/arch/arm/cpu/armv7/start.S
+++ b/arch/arm/cpu/armv7/start.S
@@ -22,10 +22,9 @@
*
* Startup Code (reset vector)
*
- * do important init only if we don't start from memory!
- * setup Memory and board specific bits prior to relocation.
- * relocate armboot to ram
- * setup stack
+ * Do important init only if we don't start from memory!
+ * Setup memory and board specific bits prior to relocation.
+ * Relocate armboot to ram. Setup stack.
*
*************************************************************************/
diff --git a/arch/arm/include/asm/u-boot.h b/arch/arm/include/asm/u-boot.h
index ae4c21bf36a8529d8feaf803cbfd48402b28ecdd..43cc49468382301da46fb98520bd0eedf0ff4628 100644
--- a/arch/arm/include/asm/u-boot.h
+++ b/arch/arm/include/asm/u-boot.h
@@ -49,8 +49,4 @@ typedef struct bd_info {
#define IH_ARCH_DEFAULT IH_ARCH_ARM64
#endif
-#if defined(CONFIG_USE_PRIVATE_LIBGCC) && defined(CONFIG_SYS_THUMB_BUILD)
-#error Thumb build does not work with private libgcc.
-#endif
-
#endif /* _U_BOOT_H_ */
diff --git a/arch/arm/lib/_ashldi3.S b/arch/arm/lib/_ashldi3.S
index 2c26f84ac701cd62d347e1c37593dd16faae6d55..9c34c212cb0ee2f663bf87dc7ed729914fc640dd 100644
--- a/arch/arm/lib/_ashldi3.S
+++ b/arch/arm/lib/_ashldi3.S
@@ -4,6 +4,8 @@
* SPDX-License-Identifier: GPL-2.0+
*/
+#include <linux/linkage.h>
+
#ifdef __ARMEB__
#define al r1
#define ah r0
@@ -13,9 +15,8 @@
#endif
.globl __ashldi3
-.globl __aeabi_llsl
__ashldi3:
-__aeabi_llsl:
+ENTRY(__aeabi_llsl)
subs r3, r2, #32
rsb ip, r2, #32
@@ -24,3 +25,4 @@ __aeabi_llsl:
orrmi ah, ah, al, lsr ip
mov al, al, lsl r2
mov pc, lr
+ENDPROC(__aeabi_llsl)
diff --git a/arch/arm/lib/_ashrdi3.S b/arch/arm/lib/_ashrdi3.S
index 4d93c8a5e6c09069774d9deaf9d55f830e09c0c5..c74fd6449933f804db83a821394ae074cf6394ce 100644
--- a/arch/arm/lib/_ashrdi3.S
+++ b/arch/arm/lib/_ashrdi3.S
@@ -4,6 +4,8 @@
* SPDX-License-Identifier: GPL-2.0+
*/
+#include <linux/linkage.h>
+
#ifdef __ARMEB__
#define al r1
#define ah r0
@@ -13,9 +15,8 @@
#endif
.globl __ashrdi3
-.globl __aeabi_lasr
__ashrdi3:
-__aeabi_lasr:
+ENTRY(__aeabi_lasr)
subs r3, r2, #32
rsb ip, r2, #32
@@ -24,3 +25,4 @@ __aeabi_lasr:
orrmi al, al, ah, lsl ip
mov ah, ah, asr r2
mov pc, lr
+ENDPROC(__aeabi_lasr)
diff --git a/arch/arm/lib/_divsi3.S b/arch/arm/lib/_divsi3.S
index 601549304e00d177b02ec9c491a1deb9dd0c5893..c463c68f85e8b9e974d908dfec1b379aa68c5bb5 100644
--- a/arch/arm/lib/_divsi3.S
+++ b/arch/arm/lib/_divsi3.S
@@ -1,3 +1,5 @@
+#include <linux/linkage.h>
+
.macro ARM_DIV_BODY dividend, divisor, result, curbit
#if __LINUX_ARM_ARCH__ >= 5
@@ -95,9 +97,8 @@
.align 5
.globl __divsi3
-.globl __aeabi_idiv
__divsi3:
-__aeabi_idiv:
+ENTRY(__aeabi_idiv)
cmp r1, #0
eor ip, r0, r1 @ save the sign of the result.
beq Ldiv0
@@ -139,3 +140,4 @@ Ldiv0:
bl __div0
mov r0, #0 @ About as wrong as it could be.
ldr pc, [sp], #4
+ENDPROC(__aeabi_idiv)
diff --git a/arch/arm/lib/_lshrdi3.S b/arch/arm/lib/_lshrdi3.S
index 33296a0a93e4036fcebca5623fd197c34ea9015f..1f9b91646494220efbfde3d1dc1939867cde0845 100644
--- a/arch/arm/lib/_lshrdi3.S
+++ b/arch/arm/lib/_lshrdi3.S
@@ -4,6 +4,8 @@
* SPDX-License-Identifier: GPL-2.0+
*/
+#include <linux/linkage.h>
+
#ifdef __ARMEB__
#define al r1
#define ah r0
@@ -13,9 +15,8 @@
#endif
.globl __lshrdi3
-.globl __aeabi_llsr
__lshrdi3:
-__aeabi_llsr:
+ENTRY(__aeabi_llsr)
subs r3, r2, #32
rsb ip, r2, #32
@@ -24,3 +25,4 @@ __aeabi_llsr:
orrmi al, al, ah, lsl ip
mov ah, ah, lsr r2
mov pc, lr
+ENDPROC(__aeabi_llsr)
diff --git a/arch/arm/lib/_modsi3.S b/arch/arm/lib/_modsi3.S
index 3d31a559f84e36be442729b5e49ab5b64324ef28..c5e1c229dfb25c3d4b676c94bb727fe8a7705415 100644
--- a/arch/arm/lib/_modsi3.S
+++ b/arch/arm/lib/_modsi3.S
@@ -1,3 +1,5 @@
+#include <linux/linkage.h>
+
.macro ARM_MOD_BODY dividend, divisor, order, spare
#if __LINUX_ARM_ARCH__ >= 5
@@ -69,8 +71,7 @@
.endm
.align 5
-.globl __modsi3
-__modsi3:
+ENTRY(__modsi3)
cmp r1, #0
beq Ldiv0
rsbmi r1, r1, #0 @ loops below use unsigned.
@@ -88,7 +89,7 @@ __modsi3:
10: cmp ip, #0
rsbmi r0, r0, #0
mov pc, lr
-
+ENDPROC(__modsi3)
Ldiv0:
diff --git a/arch/arm/lib/_udivsi3.S b/arch/arm/lib/_udivsi3.S
index 13098026104734f83075727b1a197f145ffb15d9..3b653bed99d10964828cf686b48380e9b560b779 100644
--- a/arch/arm/lib/_udivsi3.S
+++ b/arch/arm/lib/_udivsi3.S
@@ -1,3 +1,5 @@
+#include <linux/linkage.h>
+
/* # 1 "libgcc1.S" */
@ libgcc1 routines for ARM cpu.
@ Division routines, written by Richard Earnshaw, (rearnsha@armltd.co.uk)
@@ -72,8 +74,7 @@ Ldiv0:
ldmia sp!, {pc}
.size __udivsi3 , . - __udivsi3
-.globl __aeabi_uidivmod
-__aeabi_uidivmod:
+ENTRY(__aeabi_uidivmod)
stmfd sp!, {r0, r1, ip, lr}
bl __aeabi_uidiv
@@ -81,9 +82,9 @@ __aeabi_uidivmod:
mul r3, r0, r2
sub r1, r1, r3
mov pc, lr
+ENDPROC(__aeabi_uidivmod)
-.globl __aeabi_idivmod
-__aeabi_idivmod:
+ENTRY(__aeabi_idivmod)
stmfd sp!, {r0, r1, ip, lr}
bl __aeabi_idiv
@@ -91,3 +92,4 @@ __aeabi_idivmod:
mul r3, r0, r2
sub r1, r1, r3
mov pc, lr
+ENDPROC(__aeabi_idivmod)
diff --git a/arch/arm/lib/_umodsi3.S b/arch/arm/lib/_umodsi3.S
index 8465ef09d237a991426376035ba01184670cc043..b1667376c58a2bdcae9a5ac093320c7c33a104dd 100644
--- a/arch/arm/lib/_umodsi3.S
+++ b/arch/arm/lib/_umodsi3.S
@@ -1,3 +1,5 @@
+#include <linux/linkage.h>
+
/* # 1 "libgcc1.S" */
@ libgcc1 routines for ARM cpu.
@ Division routines, written by Richard Earnshaw, (rearnsha@armltd.co.uk)
@@ -11,10 +13,9 @@ curbit .req r3
/* lr .req r14 */
/* pc .req r15 */
.text
- .globl __umodsi3
.type __umodsi3 ,function
.align 0
- __umodsi3 :
+ ENTRY(__umodsi3)
cmp divisor, #0
beq Ldiv0
mov curbit, #1
@@ -86,3 +87,4 @@ Ldiv0:
/* # 456 "libgcc1.S" */
/* # 500 "libgcc1.S" */
/* # 580 "libgcc1.S" */
+ENDPROC(__umodsi3)
diff --git a/board/quipos/cairo/MAINTAINERS b/board/quipos/cairo/MAINTAINERS
new file mode 100644
index 0000000000000000000000000000000000000000..01332da5ab33a9fdce183576cb32c1072b753891
--- /dev/null
+++ b/board/quipos/cairo/MAINTAINERS
@@ -0,0 +1,6 @@
+CAIRO BOARD
+M: Albert ARIBAUD (3ADEV) <albert.aribaud@3adev.fr>
+S: Maintained
+F: board/quipos/cairo/
+F: include/configs/omap3_cairo.h
+F: configs/cairo_defconfig
diff --git a/board/ti/am43xx/MAINTAINERS b/board/ti/am43xx/MAINTAINERS
index d375278bed36a82da5330e0e0b2f3c8064e8ec7c..3d40b171d20f1caa50a7a91e439726359936a86c 100644
--- a/board/ti/am43xx/MAINTAINERS
+++ b/board/ti/am43xx/MAINTAINERS
@@ -5,3 +5,5 @@ F: board/ti/am43xx/
F: include/configs/am43xx_evm.h
F: configs/am43xx_evm_defconfig
F: configs/am43xx_evm_qspiboot_defconfig
+F: configs/am43xx_evm_ethboot_defconfig
+F: configs/am43xx_evm_usbhost_boot_defconfig
diff --git a/board/vscom/baltos/MAINTAINERS b/board/vscom/baltos/MAINTAINERS
new file mode 100644
index 0000000000000000000000000000000000000000..e82acfed161a8e6eb27abc8e44b47e40013d585c
--- /dev/null
+++ b/board/vscom/baltos/MAINTAINERS
@@ -0,0 +1,6 @@
+BALTOS BOARD
+M: Yegor Yefremov <yegorslists@googlemail.com>
+S: Maintained
+F: board/vscom/baltos/
+F: include/configs/baltos.h
+F: configs/am335x_baltos_defconfig
diff --git a/drivers/gpio/lpc32xx_gpio.c b/drivers/gpio/lpc32xx_gpio.c
index 96b312592b9fa8b92fbeb50b14862dc9d9e65ea9..8a9826e6ebf1c66a17a899e3d3fd5cee54ba9542 100644
--- a/drivers/gpio/lpc32xx_gpio.c
+++ b/drivers/gpio/lpc32xx_gpio.c
@@ -37,7 +37,7 @@
#define LPC32XX_GPIOS 128
-struct lpc32xx_gpio_platdata {
+struct lpc32xx_gpio_priv {
struct gpio_regs *regs;
/* GPIO FUNCTION: SEE WARNING #2 */
signed char function[LPC32XX_GPIOS];
@@ -60,8 +60,8 @@ struct lpc32xx_gpio_platdata {
static int lpc32xx_gpio_direction_input(struct udevice *dev, unsigned offset)
{
int port, mask;
- struct lpc32xx_gpio_platdata *gpio_platdata = dev_get_platdata(dev);
- struct gpio_regs *regs = gpio_platdata->regs;
+ struct lpc32xx_gpio_priv *gpio_priv = dev_get_priv(dev);
+ struct gpio_regs *regs = gpio_priv->regs;
port = GPIO_TO_PORT(offset);
mask = GPIO_TO_MASK(offset);
@@ -83,7 +83,7 @@ static int lpc32xx_gpio_direction_input(struct udevice *dev, unsigned offset)
}
/* GPIO FUNCTION: SEE WARNING #2 */
- gpio_platdata->function[offset] = GPIOF_INPUT;
+ gpio_priv->function[offset] = GPIOF_INPUT;
return 0;
}
@@ -95,8 +95,8 @@ static int lpc32xx_gpio_direction_input(struct udevice *dev, unsigned offset)
static int lpc32xx_gpio_get_value(struct udevice *dev, unsigned offset)
{
int port, rank, mask, value;
- struct lpc32xx_gpio_platdata *gpio_platdata = dev_get_platdata(dev);
- struct gpio_regs *regs = gpio_platdata->regs;
+ struct lpc32xx_gpio_priv *gpio_priv = dev_get_priv(dev);
+ struct gpio_regs *regs = gpio_priv->regs;
port = GPIO_TO_PORT(offset);
@@ -130,8 +130,8 @@ static int lpc32xx_gpio_get_value(struct udevice *dev, unsigned offset)
static int gpio_set(struct udevice *dev, unsigned gpio)
{
int port, mask;
- struct lpc32xx_gpio_platdata *gpio_platdata = dev_get_platdata(dev);
- struct gpio_regs *regs = gpio_platdata->regs;
+ struct lpc32xx_gpio_priv *gpio_priv = dev_get_priv(dev);
+ struct gpio_regs *regs = gpio_priv->regs;
port = GPIO_TO_PORT(gpio);
mask = GPIO_TO_MASK(gpio);
@@ -162,8 +162,8 @@ static int gpio_set(struct udevice *dev, unsigned gpio)
static int gpio_clr(struct udevice *dev, unsigned gpio)
{
int port, mask;
- struct lpc32xx_gpio_platdata *gpio_platdata = dev_get_platdata(dev);
- struct gpio_regs *regs = gpio_platdata->regs;
+ struct lpc32xx_gpio_priv *gpio_priv = dev_get_priv(dev);
+ struct gpio_regs *regs = gpio_priv->regs;
port = GPIO_TO_PORT(gpio);
mask = GPIO_TO_MASK(gpio);
@@ -208,8 +208,8 @@ static int lpc32xx_gpio_direction_output(struct udevice *dev, unsigned offset,
int value)
{
int port, mask;
- struct lpc32xx_gpio_platdata *gpio_platdata = dev_get_platdata(dev);
- struct gpio_regs *regs = gpio_platdata->regs;
+ struct lpc32xx_gpio_priv *gpio_priv = dev_get_priv(dev);
+ struct gpio_regs *regs = gpio_priv->regs;
port = GPIO_TO_PORT(offset);
mask = GPIO_TO_MASK(offset);
@@ -231,7 +231,7 @@ static int lpc32xx_gpio_direction_output(struct udevice *dev, unsigned offset,
}
/* GPIO FUNCTION: SEE WARNING #2 */
- gpio_platdata->function[offset] = GPIOF_OUTPUT;
+ gpio_priv->function[offset] = GPIOF_OUTPUT;
return lpc32xx_gpio_set_value(dev, offset, value);
}
@@ -251,8 +251,8 @@ static int lpc32xx_gpio_direction_output(struct udevice *dev, unsigned offset,
static int lpc32xx_gpio_get_function(struct udevice *dev, unsigned offset)
{
- struct lpc32xx_gpio_platdata *gpio_platdata = dev_get_platdata(dev);
- return gpio_platdata->function[offset];
+ struct lpc32xx_gpio_priv *gpio_priv = dev_get_priv(dev);
+ return gpio_priv->function[offset];
}
static const struct dm_gpio_ops gpio_lpc32xx_ops = {
@@ -265,7 +265,7 @@ static const struct dm_gpio_ops gpio_lpc32xx_ops = {
static int lpc32xx_gpio_probe(struct udevice *dev)
{
- struct lpc32xx_gpio_platdata *gpio_platdata = dev_get_platdata(dev);
+ struct lpc32xx_gpio_priv *gpio_priv = dev_get_priv(dev);
struct gpio_dev_priv *uc_priv = dev->uclass_priv;
if (dev->of_offset == -1) {
@@ -274,12 +274,11 @@ static int lpc32xx_gpio_probe(struct udevice *dev)
}
/* set base address for GPIO registers */
- gpio_platdata->regs = (struct gpio_regs *)GPIO_BASE;
+ gpio_priv->regs = (struct gpio_regs *)GPIO_BASE;
/* all GPIO functions are unknown until requested */
/* GPIO FUNCTION: SEE WARNING #2 */
- memset(gpio_platdata->function, GPIOF_UNKNOWN,
- sizeof(gpio_platdata->function));
+ memset(gpio_priv->function, GPIOF_UNKNOWN, sizeof(gpio_priv->function));
return 0;
}
@@ -289,5 +288,5 @@ U_BOOT_DRIVER(gpio_lpc32xx) = {
.id = UCLASS_GPIO,
.ops = &gpio_lpc32xx_ops,
.probe = lpc32xx_gpio_probe,
- .priv_auto_alloc_size = sizeof(struct lpc32xx_gpio_platdata),
+ .priv_auto_alloc_size = sizeof(struct lpc32xx_gpio_priv),
};
diff --git a/drivers/serial/arm_dcc.c b/drivers/serial/arm_dcc.c
index e77773740fb02d46a1c2067ef86b5f07db62c770..df7eb05e82460e998be15e56734e8ff8ff83f5e3 100644
--- a/drivers/serial/arm_dcc.c
+++ b/drivers/serial/arm_dcc.c
@@ -61,6 +61,22 @@
#define status_dcc(x) \
__asm__ volatile ("mrc p14, 0, %0, c14, c0, 0\n" : "=r" (x))
+#elif defined(CONFIG_CPU_ARMV8)
+/*
+ * ARMV8
+ */
+#define DCC_RBIT (1 << 30)
+#define DCC_WBIT (1 << 29)
+
+#define write_dcc(x) \
+ __asm__ volatile ("msr dbgdtrtx_el0, %0\n" : : "r" (x))
+
+#define read_dcc(x) \
+ __asm__ volatile ("mrs %0, dbgdtrrx_el0\n" : "=r" (x))
+
+#define status_dcc(x) \
+ __asm__ volatile ("mrs %0, mdccsr_el0\n" : "=r" (x))
+
#else
#define DCC_RBIT (1 << 0)
#define DCC_WBIT (1 << 1)