diff --git a/CHANGELOG b/CHANGELOG
index c1fc890d4932d8345b3f96bed3a7033a3e3ec910..af8df174d9fcdfb8279ed984a80784852d1f2572 100644
--- a/CHANGELOG
+++ b/CHANGELOG
@@ -2,6 +2,14 @@
 Changes since U-Boot 1.1.4:
 ======================================================================
 
+* Bugfix in I2C initialisation on S3C2400.
+  If the bus is blocked because of a previously interrupted
+  transfer, up to eleven clocks are generated on the I2CSCL
+  line to complete the transfer and to free the bus.
+  With this fix pin I2CSCL (PG6) is really configured as GPIO
+  so the clock pulses are really generated.
+  Patch by Martin Krause, 04 Apr 2006
+  
 * Fix DDR6 errata on TQM834x boards
   Patch by Thomas Waehner, 07 Mar 2006
 
diff --git a/cpu/arm920t/s3c24x0/i2c.c b/cpu/arm920t/s3c24x0/i2c.c
index ef56cd1c31d0adf5189de9fe37192f45fb65dde4..374b68313711bca01ea9848306ecd87f84828e0a 100644
--- a/cpu/arm920t/s3c24x0/i2c.c
+++ b/cpu/arm920t/s3c24x0/i2c.c
@@ -153,7 +153,7 @@ void i2c_init (int speed, int slaveadd)
 #endif
 #ifdef CONFIG_S3C2400
 		/* set I2CSDA and I2CSCL (PG5, PG6) to GPIO */
-		gpio->PGCON = (gpio->PGCON & ~0x00003c00) | 0x00000c00;
+		gpio->PGCON = (gpio->PGCON & ~0x00003c00) | 0x00001000;
 #endif
 
 		/* toggle I2CSCL until bus idle */