diff --git a/arch/powerpc/cpu/mpc8xxx/cpu.c b/arch/powerpc/cpu/mpc8xxx/cpu.c
index 2c487cac209521b4382a792ed93b46edcb4fea07..e8613be39310ced159744d8115ac2f198c791742 100644
--- a/arch/powerpc/cpu/mpc8xxx/cpu.c
+++ b/arch/powerpc/cpu/mpc8xxx/cpu.c
@@ -34,7 +34,7 @@
 
 DECLARE_GLOBAL_DATA_PTR;
 
-struct cpu_type cpu_type_list [] = {
+static struct cpu_type cpu_type_list[] = {
 #if defined(CONFIG_MPC85xx)
 	CPU_TYPE_ENTRY(8533, 8533, 1),
 	CPU_TYPE_ENTRY(8535, 8535, 1),
@@ -125,7 +125,7 @@ u32 compute_ppc_cpumask(void)
 #define compute_ppc_cpumask()	1
 #endif /* CONFIG_SYS_FSL_QORIQ_CHASSIS2 */
 
-struct cpu_type cpu_type_unknown = CPU_TYPE_ENTRY(Unknown, Unknown, 0);
+static struct cpu_type cpu_type_unknown = CPU_TYPE_ENTRY(Unknown, Unknown, 0);
 
 struct cpu_type *identify_cpu(u32 ver)
 {
@@ -143,7 +143,7 @@ struct cpu_type *identify_cpu(u32 ver)
 /*
  * Return a 32-bit mask indicating which cores are present on this SOC.
  */
-u32 cpu_mask()
+u32 cpu_mask(void)
 {
 	ccsr_pic_t __iomem *pic = (void *)CONFIG_SYS_MPC8xxx_PIC_ADDR;
 	struct cpu_type *cpu = gd->cpu;
@@ -162,7 +162,8 @@ u32 cpu_mask()
 /*
  * Return the number of cores on this SOC.
  */
-int cpu_numcores() {
+int cpu_numcores(void)
+{
 	struct cpu_type *cpu = gd->cpu;
 
 	/*
diff --git a/arch/powerpc/cpu/mpc8xxx/ddr/ctrl_regs.c b/arch/powerpc/cpu/mpc8xxx/ddr/ctrl_regs.c
index 5928eb8806c88badab3eabd789d9df6bb63b6039..088cc0e855074e1b3fc74e0b6072626082e8cccb 100644
--- a/arch/powerpc/cpu/mpc8xxx/ddr/ctrl_regs.c
+++ b/arch/powerpc/cpu/mpc8xxx/ddr/ctrl_regs.c
@@ -28,7 +28,7 @@
 	#error "Undefined _DDR_ADDR"
 #endif
 
-u32 fsl_ddr_get_version(void)
+static u32 fsl_ddr_get_version(void)
 {
 	ccsr_ddr_t *ddr;
 	u32 ver_major_minor_errata;
diff --git a/arch/powerpc/cpu/mpc8xxx/ddr/lc_common_dimm_params.c b/arch/powerpc/cpu/mpc8xxx/ddr/lc_common_dimm_params.c
index 6a1f4e4e38638072c03bc8ff6aaa398255dee04d..9adde31010925ef64eb3c0560bd3fa4faa6e323c 100644
--- a/arch/powerpc/cpu/mpc8xxx/ddr/lc_common_dimm_params.c
+++ b/arch/powerpc/cpu/mpc8xxx/ddr/lc_common_dimm_params.c
@@ -11,7 +11,8 @@
 
 #include "ddr.h"
 
-unsigned int
+#if defined(CONFIG_FSL_DDR3)
+static unsigned int
 compute_cas_latency_ddr3(const dimm_params_t *dimm_params,
 			 common_timing_params_t *outpdimm,
 			 unsigned int number_of_dimms)
@@ -65,6 +66,7 @@ compute_cas_latency_ddr3(const dimm_params_t *dimm_params,
 
 	return 0;
 }
+#endif
 
 /*
  * compute_lowest_common_dimm_parameters()
diff --git a/arch/powerpc/cpu/mpc8xxx/fsl_lbc.c b/arch/powerpc/cpu/mpc8xxx/fsl_lbc.c
index 023ac9ab30e6fd440728d035b65fcc038b629fc8..c1fe5790a31bed26380bcccb8bf9d801510e68e7 100644
--- a/arch/powerpc/cpu/mpc8xxx/fsl_lbc.c
+++ b/arch/powerpc/cpu/mpc8xxx/fsl_lbc.c
@@ -11,7 +11,7 @@
 
 #ifdef CONFIG_MPC85xx
 /* Boards should provide their own version of this if they use lbc sdram */
-void __lbc_sdram_init(void)
+static void __lbc_sdram_init(void)
 {
 	/* Do nothing */
 }