From 1c7639ae8a7bc7b4475bd45dc2c44e59467f9a70 Mon Sep 17 00:00:00 2001
From: Dirk Eibach <dirk.eibach@gdsys.cc>
Date: Wed, 28 Oct 2015 11:46:29 +0100
Subject: [PATCH] controlcenterd: Disable sideband clocks
Signed-off-by: Dirk Eibach <dirk.eibach@gdsys.cc>
---
board/gdsys/p1022/controlcenterd.c | 5 +++++
1 file changed, 5 insertions(+)
diff --git a/board/gdsys/p1022/controlcenterd.c b/board/gdsys/p1022/controlcenterd.c
index 64d90dd3fde..2f98e4757f9 100644
--- a/board/gdsys/p1022/controlcenterd.c
+++ b/board/gdsys/p1022/controlcenterd.c
@@ -57,6 +57,8 @@ struct ihs_fpga {
u32 versions; /* 0x0004 */
u32 fpga_version; /* 0x0008 */
u32 fpga_features; /* 0x000c */
+ u32 reserved[4]; /* 0x0010 */
+ u32 control; /* 0x0020 */
};
#ifndef CONFIG_TRAILBLAZER
@@ -384,6 +386,9 @@ static void hydra_initialize(void)
fpga = pci_map_bar(devno, PCI_BASE_ADDRESS_0,
PCI_REGION_MEM);
+ /* disable sideband clocks */
+ writel(1, &fpga->control);
+
versions = readl(&fpga->versions);
fpga_version = readl(&fpga->fpga_version);
fpga_features = readl(&fpga->fpga_features);
--
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