From 0d8c3a2096eaff8d7de89d45e9af4d4b0d4868fe Mon Sep 17 00:00:00 2001
From: Andy Fleming <afleming@freescale.com>
Date: Fri, 23 Feb 2007 17:12:25 -0600
Subject: [PATCH] Support 1G size on 8548
e500v2 and newer cores support 1G page sizes.
Signed-off-by: Ed Swarthout <Ed.Swarthout@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
---
cpu/mpc85xx/spd_sdram.c | 11 +++++++++--
1 file changed, 9 insertions(+), 2 deletions(-)
diff --git a/cpu/mpc85xx/spd_sdram.c b/cpu/mpc85xx/spd_sdram.c
index 16a697d40c1..3777f49adcc 100644
--- a/cpu/mpc85xx/spd_sdram.c
+++ b/cpu/mpc85xx/spd_sdram.c
@@ -995,17 +995,24 @@ setup_laws_and_tlbs(unsigned int memsize)
break;
case 256:
case 512:
+ tlb_size = BOOKE_PAGESZ_256M;
+ break;
case 1024:
case 2048:
- tlb_size = BOOKE_PAGESZ_256M;
+ if (PVR_VER(get_pvr()) > PVR_VER(PVR_85xx))
+ tlb_size = BOOKE_PAGESZ_1G;
+ else
+ tlb_size = BOOKE_PAGESZ_256M;
break;
default:
puts("DDR: only 16M,32M,64M,128M,256M,512M,1G and 2G are supported.\n");
/*
* The memory was not able to be mapped.
+ * Default to a small size.
*/
- return 0;
+ tlb_size = BOOKE_PAGESZ_64M;
+ memsize=64;
break;
}
--
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