From 07e82cb2e284a893df6693f2a1337ab2c47bf6a1 Mon Sep 17 00:00:00 2001
From: Heiko Schocher <hs@pollux.denx.de>
Date: Wed, 21 Mar 2007 08:45:17 +0100
Subject: [PATCH] [PATCH] TQM8272: dont change the bits given from the HRCW
for the SIUMCR and BCR Register. Fix the
calculation for the EEprom Size
Signed-off-by: Heiko Schocher <hs@denx.de>
---
board/tqm8272/tqm8272.c | 2 +-
cpu/mpc8260/cpu_init.c | 8 ++++----
cpu/mpc8260/pci.c | 18 +-----------------
3 files changed, 6 insertions(+), 22 deletions(-)
diff --git a/board/tqm8272/tqm8272.c b/board/tqm8272/tqm8272.c
index 8257c77502c..70d1bb889f7 100644
--- a/board/tqm8272/tqm8272.c
+++ b/board/tqm8272/tqm8272.c
@@ -768,7 +768,7 @@ int analyse_hwib (void)
p +=1;
p +=1; /* connector */
if (*p != '0') {
- hw->eeprom = 0x100 << (*p - 'A');
+ hw->eeprom = 0x1000 << (*p - 'A');
}
p++;
diff --git a/cpu/mpc8260/cpu_init.c b/cpu/mpc8260/cpu_init.c
index 7dcc94999dc..380d7af13d3 100644
--- a/cpu/mpc8260/cpu_init.c
+++ b/cpu/mpc8260/cpu_init.c
@@ -129,9 +129,9 @@ void cpu_init_f (volatile immap_t * immr)
/* BCR - Bus Configuration Register (4-25) */
#if defined(CFG_BCR_60x) && (CFG_BCR_SINGLE)
if (immr->im_siu_conf.sc_bcr & BCR_EBM) {
- immr->im_siu_conf.sc_bcr = CFG_BCR_60x;
+ immr->im_siu_conf.sc_bcr = SET_VAL_MASK(immr->im_siu_conf.sc_bcr, CFG_BCR_60x, 0x80000010);
} else {
- immr->im_siu_conf.sc_bcr = CFG_BCR_SINGLE;
+ immr->im_siu_conf.sc_bcr = SET_VAL_MASK(immr->im_siu_conf.sc_bcr, CFG_BCR_SINGLE, 0x80000010);
}
#else
immr->im_siu_conf.sc_bcr = CFG_BCR;
@@ -141,9 +141,9 @@ void cpu_init_f (volatile immap_t * immr)
#if defined(CFG_SIUMCR_LOW) && (CFG_SIUMCR_HIGH)
cpu_clk = board_get_cpu_clk_f ();
if (cpu_clk >= 100000000) {
- immr->im_siu_conf.sc_siumcr = CFG_SIUMCR_HIGH;
+ immr->im_siu_conf.sc_siumcr = SET_VAL_MASK(immr->im_siu_conf.sc_siumcr, CFG_SIUMCR_HIGH, 0x9f3cc000);
} else {
- immr->im_siu_conf.sc_siumcr = CFG_SIUMCR_LOW;
+ immr->im_siu_conf.sc_siumcr = SET_VAL_MASK(immr->im_siu_conf.sc_siumcr, CFG_SIUMCR_LOW, 0x9f3cc000);
}
#else
immr->im_siu_conf.sc_siumcr = CFG_SIUMCR;
diff --git a/cpu/mpc8260/pci.c b/cpu/mpc8260/pci.c
index 1edd6fb8ddd..75c6ab29856 100644
--- a/cpu/mpc8260/pci.c
+++ b/cpu/mpc8260/pci.c
@@ -275,22 +275,7 @@ void pci_mpc8250_init (struct pci_controller *hose)
| SIUMCR_BCTLC00
| SIUMCR_MMR11;
#elif defined(CONFIG_TQM8272)
-#if 0
- immap->im_siu_conf.sc_siumcr = (immap->im_siu_conf.sc_siumcr &
- ~SIUMCR_LBPC11 &
- ~SIUMCR_CS10PC11 &
- ~SIUMCR_LBPC11) |
- SIUMCR_LBPC01 |
- SIUMCR_CS10PC01 |
- SIUMCR_APPC10;
-#else
-#if 0
- immap->im_siu_conf.sc_siumcr = (immap->im_siu_conf.sc_siumcr |
- SIUMCR_APPC10);
-#else
- immap->im_siu_conf.sc_siumcr = 0x88000000;
-#endif
-#endif
+/* nothing to do for this Board here */
#else
/*
* Setting required to enable IRQ1-IRQ7 (SIUMCR [DPPC]),
@@ -304,7 +289,6 @@ void pci_mpc8250_init (struct pci_controller *hose)
SIUMCR_CS10PC01 |
SIUMCR_APPC10;
#endif
-printf("%s siumcr: %x\n", __FUNCTION__, immap->im_siu_conf.sc_siumcr);
/* Make PCI lowest priority */
/* Each 4 bits is a device bus request and the MS 4bits
--
GitLab