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    51ea5a06
    ARM: uniphier: reserve memory for DRAM PHY training on PH1-LD20 · 51ea5a06
    Masahiro Yamada authored
    
    The DRAM PHY layer on PH1-LD20 is able to calibrate PHY parameters
    periodically.  This compensates for the voltage and temperature
    deviation and improves the PHY parameter adjustment.  Instead, it
    requires 64 byte scratch memory in each DRAM channel for the dynamic
    training.  The memory regions must be reserved in DT before jumping
    to the kernel.
    
    The scratch area can be anywhere in each DRAM channel, but the DRAM
    init code in SPL currently assigns it at the end of each channel.
    So, it makes sense to reserve the regions on run-time by U-Boot
    instead of statically embedding it in the DT in Linux.  Anyway,
    a boot-loader should know much more about memory initialization
    than the kernel.
    
    Signed-off-by: default avatarMasahiro Yamada <yamada.masahiro@socionext.com>
    51ea5a06
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    ARM: uniphier: reserve memory for DRAM PHY training on PH1-LD20
    Masahiro Yamada authored
    
    The DRAM PHY layer on PH1-LD20 is able to calibrate PHY parameters
    periodically.  This compensates for the voltage and temperature
    deviation and improves the PHY parameter adjustment.  Instead, it
    requires 64 byte scratch memory in each DRAM channel for the dynamic
    training.  The memory regions must be reserved in DT before jumping
    to the kernel.
    
    The scratch area can be anywhere in each DRAM channel, but the DRAM
    init code in SPL currently assigns it at the end of each channel.
    So, it makes sense to reserve the regions on run-time by U-Boot
    instead of statically embedding it in the DT in Linux.  Anyway,
    a boot-loader should know much more about memory initialization
    than the kernel.
    
    Signed-off-by: default avatarMasahiro Yamada <yamada.masahiro@socionext.com>