diff --git a/board/boundary/nitrogen8m_som/lcdif.c b/board/boundary/nitrogen8m_som/lcdif.c index 77f13ca3cfe0e833eee4d1f5e49d3c991e13d7a8..08399c0fe5763e3b1ed1ae0f5569291378341460 100644 --- a/board/boundary/nitrogen8m_som/lcdif.c +++ b/board/boundary/nitrogen8m_som/lcdif.c @@ -988,11 +988,43 @@ out: void video_hw_exit(void) { + /* gracefully shut down lcdif */ + wr(lcdif, LCDIF_CTRL_CLR, CTRL_DOTCLK_MODE); + while(rr(lcdif, LCDIF_CTRL) & CTRL_RUN) + ; + lcdifreset(); + /* assert the resets */ mr(resetc, SRC_MIPIPHY_RCR, 0, RCR_MIPI_DSI_RESET_N); mr(resetc, SRC_MIPIPHY_RCR, 0, RCR_MIPI_DSI_PCLK_RESET_N); mr(resetc, SRC_MIPIPHY_RCR, 0, RCR_MIPI_DSI_ESC_RESET_N); mr(resetc, SRC_MIPIPHY_RCR, 0, RCR_MIPI_DSI_RESET_BYTE_N); mr(resetc, SRC_MIPIPHY_RCR, 0, RCR_MIPI_DSI_DPI_RESET_N); + + /* power mipi dsi */ + wr(gpc, GPC_PGC_CPU_0_1_MAPPING, 0x0000FFFF); + mr(gpc, GPC_PGC_PU_PGC_SW_PDN_REQ, 1, 1); + while(rr(gpc, GPC_PGC_PU_PGC_SW_PDN_REQ) & 1) + ; + wr(gpc, GPC_PGC_CPU_0_1_MAPPING, 0); + + /* disable display clocks */ + clock_enable(CCGR_DISPLAY, 0); + clock_enable(CCGR_SIM_DISPLAY, 0); + + clock_set_target_val(MIPI_DSI_CORE_CLK_ROOT, 0); + clock_set_target_val(MIPI_DSI_PHY_REF_CLK_ROOT, 0); + clock_set_target_val(LCDIF_PIXEL_CLK_ROOT, 0); + clock_set_target_val(DISPLAY_RTRM_CLK_ROOT, 0); + clock_set_target_val(DISPLAY_AXI_CLK_ROOT, 0); + + /* turn off bridge */ + gpio_direction_output(IMX_GPIO_NR(3, 20), 0); + + /* turn off backlight pwm */ + gpio_direction_output(IMX_GPIO_NR(1, 10), 0); + wr(pwm2, PWMCR, CR_SWR); + clock_enable(CCGR_PWM2, 0); + clock_set_target_val(PWM2_CLK_ROOT, 0); } diff --git a/board/boundary/nitrogen8m_som/nitrogen8m_som.c b/board/boundary/nitrogen8m_som/nitrogen8m_som.c index c2373707f4030f4ac0637684e1d8b6dcefad49ad..fa596ec88a042b507489d755d953fea33b042c19 100644 --- a/board/boundary/nitrogen8m_som/nitrogen8m_som.c +++ b/board/boundary/nitrogen8m_som/nitrogen8m_som.c @@ -397,6 +397,8 @@ board_quiesce_devices(void) { extern void video_hw_exit(void); /* lcdif.c */ + usb_stop(); + /* * Linux kermel mode setting seems to fail to * properly reset the mipi core, causing the